Current sampling circuit
By designing a multi-switch configuration current sampling circuit in a high-power cascade inverter, the problems of inflexible configuration of current sampling circuits and time-consuming and laborious operation are solved, fast and flexible sampling and signal conditioning are achieved, and test efficiency is improved. .
Patent Information
- Application Number
- CN202420632584.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Priority Date
- 2023-12-21
- Filing Date
- 2024-03-28
- Publication Date
- 2025-01-21
- Estimated Expiration
- 2034-03-28
AI Technical Summary
In high-power cascade frequency converters, the current sampling circuit is not flexible in configuration, time-consuming and labor-intensive operation, and error-prone.
A current sampling circuit is designed, which uses multiple switches to adjust the total resistance of the sampling resistor configuration circuit. Through the combination of the sampling resistor configuration circuit and the conditioning circuit, flexible sampling and signal conditioning of the current signal are achieved.
The current sampling circuit can quickly and flexibly adjust the sampling resistor to meet the needs of different power levels, reducing the complexity and error rate of operation and improving test efficiency.
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Figure CN222379784U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of current sampling, and in particular to a current sampling circuit. Background Art
[0002] In the field of high-power cascade inverters, the whole machine is often composed of multiple cabinets, which are large in size and long in distance. Therefore, the transmission distance of the current signal is increased and the signal is easily interfered by strong electric signals. The current sampling method is divided into voltage type signal and current type signal. The voltage type signal is easily affected by line impedance, interference, etc. during long-distance transmission, so it is mostly used in short-distance and no strong interference source occasions; the current type Hall or CT (Current Transformer) will not attenuate the signal during long-distance transmission and is not easily interfered, so it is more suitable for long-distance transmission.
[0003] In practical applications, the sampling range is often changed according to different power levels, different Hall or CT. The range is generally adjusted by changing the sampling resistor. The sampling resistor is limited by factors such as its own power and the size of the voltage after sampling. It is often necessary to replace the sampling resistor and then verify it based on calculations, which brings great inconvenience to the operator, is time-consuming, labor-intensive and prone to errors. Utility Model Content
[0004] The present application aims to provide a current sampling circuit to solve the problems of inflexible configuration and time-consuming and labor-intensive operation of the current sampling circuit in a high-power inverter.
[0005] The present application provides a current sampling circuit, comprising:
[0006] A sampling resistor configuration circuit is configured to receive a current signal output by a current sensor and convert it into a voltage signal for output; the sampling resistor configuration circuit includes a plurality of switches, and the switches are configured to be turned on or off to adjust the total resistance value of the sampling resistor configuration circuit;
[0007] The conditioning circuit is configured to receive the voltage signal output by the sampling resistor configuration circuit, and to condition the voltage signal before outputting it.
[0008] In one example, the sampling resistor configuration circuit includes a first electrical connection end and a second electrical connection end, m sampling resistor configuration branches connected between the first electrical connection end and the second electrical connection end, each sampling resistor configuration branch includes n sampling resistor configuration sub-branches connected in series, each sampling resistor configuration sub-branch is connected in parallel with a sampling resistor configuration sub-branch corresponding to an adjacent sampling resistor configuration branch, and each sampling resistor configuration sub-branch includes a sampling resistor and a first switch connected in series;
[0009] The sampling resistor configuration circuit further includes n-1 second switches having a common connection terminal. In each sampling resistor configuration branch, adjacent sampling resistor configuration sub-branches are connected to the other end of one of the second switches.
[0010] In one example, the resistance values of the sampling resistors in all the sampling resistor configuration sub-branches are the same.
[0011] In one example, the first electrical connection end is connected to the conditioning circuit and the current sensor, and the second electrical connection end is grounded.
[0012] In one example, the conditioning circuit includes a signal conditioning circuit and a bias circuit;
[0013] The signal conditioning circuit is configured to amplify the voltage signal to output an amplified voltage signal;
[0014] The bias circuit is configured to perform bias processing on the amplified voltage signal output by the signal conditioning circuit to output a biased voltage signal.
[0015] In one example, the signal conditioning circuit includes a first-stage signal conditioning circuit, a second-stage signal conditioning circuit, and a current limiting resistor connected between the first-stage signal conditioning circuit and the second-stage signal conditioning circuit, and the first-stage signal conditioning circuit and the second-stage signal conditioning circuit amplify the voltage signal in turn.
[0016] In one example, the signal conditioning circuit further includes a filter circuit connected between the sampling resistor configuration circuit and the first-stage signal conditioning circuit, and the filter circuit is used to filter the voltage signal.
[0017] In one example, the first-stage signal conditioning circuit includes a first operational amplifier, a positive input terminal of the first operational amplifier is connected to the sampling resistor configuration circuit, a negative input terminal of the first operational amplifier is grounded through a first resistor, and a first feedback resistor is connected between the negative input terminal and the output terminal of the first operational amplifier.
[0018] In one example, the second-stage signal conditioning circuit includes a second operational amplifier, the positive input terminal of the second operational amplifier is connected to the first-stage signal conditioning circuit through the current limiting resistor, the negative input terminal of the second operational amplifier is grounded through a second resistor, and a plurality of second feedback resistors and a chip select switch are connected between the negative input terminal and the output terminal of the second operational amplifier.
[0019] In one example, the bias circuit includes a third operational amplifier, a positive input terminal of the third operational amplifier is connected to the signal conditioning circuit and is connected to a bias voltage, and a third feedback resistor is connected between a negative input terminal and an output terminal of the third operational amplifier.
[0020] The current sampling circuit provided in the embodiment of the present application can flexibly adjust the total resistance of the sampling resistor configuration circuit, which can not only meet the power required by the sampling resistor, but also make the voltage signal after sampling not too small, and can be quickly verified and tested, and has good application value. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] Figure 1 A schematic diagram of a current sampling circuit provided in an embodiment of the present application;
[0022] Figure 2 A schematic diagram of a sampling resistor configuration circuit provided in an embodiment of the present application.
[0023] The realization of the purpose, functional features and advantages of this application will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION
[0024] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present application clearer and more understandable, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.
[0025] In the description of the present application, it should be understood that the orientations or positional relationships indicated by the terms "center", "upper", "lower", "front", "back", "left", "right", etc. are based on the orientations or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.
[0026] Figure 1 A schematic diagram of a current sampling circuit provided in an embodiment of the present application.
[0027] like Figure 1 As shown, the current sampling circuit includes: a sampling resistor configuration circuit (shown as T in the figure) and a conditioning circuit.
[0028] A sampling resistor configuration circuit is configured to receive a current signal output by a current sensor, such as a current type Hall or CT, and convert it into a voltage signal for output; the sampling resistor configuration circuit includes a plurality of switches, and the switches are configured to be turned on or off to adjust the total resistance of the sampling resistor configuration circuit;
[0029] The conditioning circuit is configured to receive the voltage signal output by the sampling resistor configuration circuit, and to condition the voltage signal before outputting it.
[0030] The sampling resistor configuration circuit can be made into an external circuit board, and the conditioning circuit can be made into a built-in circuit board, and the two circuit boards are connected through an interface.
[0031] like Figure 2 As shown, the sampling resistor configuration circuit is divided into three phases, and in other examples, it can also be one phase.
[0032] The sampling resistor configuration circuit includes a first electrical connection end (shown as the A_I end, B_I end or C_I end in the figure) and a second electrical connection end (shown as the A_O end, B_O end or C_O end in the figure). m sampling resistor configuration branches are connected between the first electrical connection end and the second electrical connection end, each sampling resistor configuration branch includes n sampling resistor configuration sub-branches connected in series, each sampling resistor configuration sub-branch is connected in parallel with the sampling resistor configuration sub-branch corresponding to the adjacent sampling resistor configuration branch, and each sampling resistor configuration sub-branch includes a sampling resistor connected in series and a first switch; the sampling resistor configuration circuit also includes n-1 second switches with a common connection end, and in each sampling resistor configuration branch, adjacent sampling resistor configuration sub-branches are connected to the other end of one of the second switches.
[0033] Taking the A_I terminal and the A_O terminal as an example, the A_I terminal is connected to the conditioning circuit and the current sensor, and the A_O terminal is grounded. It is assumed that the resistance values of the sampling resistors in all sampling resistor configuration sub-branches are the same. There are m sampling resistor configuration branches 10 connected between the A_I terminal and the A_O terminal, and each sampling resistor configuration branch 10 includes n sampling resistor configuration sub-branches 101 connected in series. Each sampling resistor configuration sub-branch 101 is connected in parallel with the sampling resistor configuration sub-branch corresponding to the adjacent sampling resistor configuration branch. Each sampling resistor configuration sub-branch 101 includes a sampling resistor connected in series (shown as R in the figure) and a first switch (shown as s11 to smn in the figure). For example, the sampling resistor R is connected in series with the first switch s11 to form a sampling resistor configuration sub-branch, and the sampling resistor R is connected in series with the first switch s21 to form a sampling resistor configuration sub-branch. The two sampling resistor configuration sub-branches are connected in parallel.
[0034] The sampling resistor configuration circuit also includes n-1 second switches (shown as sw1 to sw(n-1) in the figure, one end of all the second switches is connected together to form a common connection end) with a common connection end. In each sampling resistor configuration branch, adjacent sampling resistor configuration sub-branches are connected to the other end of one of the second switches. For example: the sampling resistor R is connected in series with the first switch s11, the sampling resistor R is connected in series with the first switch s12, and the two sampling resistor configuration sub-branches are connected to the other end of the second switch sw1. It should be noted that n and m can be the same or different.
[0035] Based on the above sampling resistor configuration circuit, the sampling resistor can be configured by switching switches S11~Snn and switches SW1~SW(n-1). For example: when a sampling resistor R is needed, switches S11 and SW1 can be closed; when two sampling resistors R are needed in series, switches S11, S12, and SW2 can be closed; when two sampling resistors R are needed in parallel, switches S11, S21, and SW1 can be closed; similarly, when sampling resistors corresponding to other resistance values and powers are needed, the sampling resistor can be adjusted by flexibly configuring the switching switches. Based on economy and the size of the sampling board, the number of overall resistors can be configured according to demand.
[0036] Refer to Figure 1 As shown, the voltage signal after the sampling resistor configuration circuit is connected to the input Vin of the first-stage signal conditioning circuit, and then enters the positive input terminal of the operational amplifier U1 after passing through the first filtering circuit, wherein the first filtering circuit is composed of a resistor R1 and a capacitor C1, and the positive input terminal of the operational amplifier U1 has a diode clamp circuit (composed of two diodes connected to the positive input terminal of the operational amplifier U1, wherein the cathode terminal of one diode is connected to the positive input terminal of the operational amplifier U1, and the anode terminal is connected to the power supply voltage VEE; the anode terminal of the other diode is connected to the positive input terminal of the operational amplifier U1, and the cathode terminal is connected to the power supply voltage VCC), ensuring that the signal input to the operational amplifier U1 does not exceed the power supply voltage of the operational amplifier U1, and the cutoff frequency of the RC filtering circuit is 1 / 2πR1C1, and the filter cutoff frequency can be adjusted according to the frequency of the signal to filter out high-frequency stray signals or some interference signals. In addition, the scaling ratio can be adjusted by adjusting the feedback resistor Rf, and the scaling ratio can be expressed as Vo / Vi=A1=1+Rf / R2. One end of the feedback resistor Rf is connected to the output port of the operational amplifier U1, and the other end is connected to the negative input terminal of the operational amplifier U1 and one end of the resistor R2. The other end of the resistor R2 is grounded.
[0037] The input of the output circuit of the first-stage signal conditioning circuit is then connected to the input of the second-stage signal conditioning circuit through the current limiting resistor R3, and the current limiting resistor R3 is connected to the positive input terminal of the operational amplifier U2. The negative feedback loop consists of a chip select switch chip and multiple feedback resistors (Rf1~Rf5), and the default is feedback resistor Rf1. One end of the resistor R4 is connected to the negative input terminal of the operational amplifier U2. The other end of the resistor R4 is grounded. The chip select switch port can be configured by software to select different channels to change the feedback scaling ratio. The scaling ratio can be expressed as Vo / Vi=A2=1+Rf(1~5) / R4.
[0038] The output of the second-stage signal conditioning circuit is connected to the input of the bias circuit, that is, connected to the positive input terminal of the operational amplifier U3 after passing through the second filter circuit, wherein the second filter circuit is composed of a resistor R5 and a capacitor C2, and the cutoff frequency of the RC filter is 1 / 2πR5C2, and the cutoff frequency can be adjusted to filter out stray signals. In addition, Vref is a bias voltage, which is connected to the positive input terminal of the operational amplifier U3 through a resistor R6. Because the sampling range of the AD sampling chip is positive voltage, and the output signal of the Hall current sensor or CT is positive and negative, the sampled signal is added with a DC bias to obtain a positive voltage signal, and finally the signal is output to the AD sampling chip after passing through a current limiting resistor R7. The feedback resistor Rf6 is connected between the negative input terminal and the output terminal of the operational amplifier U3.
[0039] Assume that the scaling ratio of the Hall current sensor or CT is Vo / Vi=A0, and the equivalent sampling resistor is Rs.
[0040] Then the scaling ratio of the entire current sampling circuit can be expressed as Vo / Vi=A=A0*Rs*A1*A2.
[0041] For example:
[0042] For example, the transformation ratio of the Hall or CT is 1000:1, that is, A0 is 1 / 1000, the equivalent sampling resistance Rs = 3.5Ω, A1 = 5.125, A2 = 1.41, then the scaling ratio of the entire circuit is A = 0.025291875. Assuming that the maximum voltage value of the AD sampling chip is 5V, the sampling range is 5 / A = ±197.69A.
[0043] The preferred embodiments of the present application are described above with reference to the accompanying drawings, but the scope of the present application is not limited thereby. Any modification, equivalent substitution and improvement made by a person skilled in the art without departing from the scope and essence of the present application shall be within the scope of the present application.
Claims
1. A current sampling circuit, characterized in that: include: A sampling resistor configuration circuit is configured to receive the current signal output by the current sensor and convert it into a voltage signal for output; The sampling resistor configuration circuit includes a plurality of switches, and the switches are configured to be turned on or off to adjust the total resistance of the sampling resistor configuration circuit; The conditioning circuit is configured to receive the voltage signal output by the sampling resistor configuration circuit, and to condition the voltage signal before outputting it.
2. The current sampling circuit according to claim 1, characterized in that: The sampling resistor configuration circuit includes a first electrical connection end and a second electrical connection end, m sampling resistor configuration branches connected between the first electrical connection end and the second electrical connection end, each sampling resistor configuration branch includes n sampling resistor configuration sub-branches connected in series, each sampling resistor configuration sub-branch is connected in parallel with a sampling resistor configuration sub-branch corresponding to an adjacent sampling resistor configuration branch, and each sampling resistor configuration sub-branch includes a sampling resistor and a first switch connected in series; The sampling resistor configuration circuit further includes n-1 second switches having a common connection terminal. In each sampling resistor configuration branch, adjacent sampling resistor configuration sub-branches are connected to the other end of one of the second switches.
3. The current sampling circuit according to claim 2, characterized in that: The resistance values of the sampling resistors in all the sampling resistor configuration sub-branches are the same.
4. The current sampling circuit according to claim 2, characterized in that: The first electrical connection end is connected to the conditioning circuit and the current sensor, and the second electrical connection end is grounded.
5. The current sampling circuit according to claim 1, characterized in that: The conditioning circuit includes a signal conditioning circuit and a bias circuit; The signal conditioning circuit is configured to amplify the voltage signal to output an amplified voltage signal; The bias circuit is configured to perform bias processing on the amplified voltage signal output by the signal conditioning circuit to output a biased voltage signal.
6. The current sampling circuit according to claim 5, characterized in that: The signal conditioning circuit includes a first-stage signal conditioning circuit, a second-stage signal conditioning circuit, and a current limiting resistor connected between the first-stage signal conditioning circuit and the second-stage signal conditioning circuit. The first-stage signal conditioning circuit and the second-stage signal conditioning circuit amplify the voltage signal in turn.
7. The current sampling circuit according to claim 6, characterized in that: The signal conditioning circuit further includes a filter circuit connected between the sampling resistor configuration circuit and the first-stage signal conditioning circuit, and the filter circuit is used for filtering the voltage signal.
8. The current sampling circuit according to claim 6, characterized in that: The first-stage signal conditioning circuit includes a first operational amplifier, a positive input terminal of the first operational amplifier is connected to the sampling resistor configuration circuit, a negative input terminal of the first operational amplifier is grounded through a first resistor, and a first feedback resistor is connected between the negative input terminal and the output terminal of the first operational amplifier.
9. The current sampling circuit according to claim 6, characterized in that: The second-stage signal conditioning circuit includes a second operational amplifier, the positive input terminal of the second operational amplifier is connected to the first-stage signal conditioning circuit through the current limiting resistor, the negative input terminal of the second operational amplifier is grounded through a second resistor, and a plurality of second feedback resistors and a chip select switch are connected between the negative input terminal and the output terminal of the second operational amplifier.
10. The current sampling circuit according to claim 5, characterized in that: The bias circuit comprises a third operational amplifier, a positive input terminal of the third operational amplifier is connected to the signal conditioning circuit and is connected to a bias voltage, and a third feedback resistor is connected between a negative input terminal and an output terminal of the third operational amplifier.