Network switching equipment

Abstract

The embodiment of the utility model provides network switching equipment. The network switching equipment comprises a switching chip, an Ethernet controller and a processor, the processor is provided with a first PCIE interface, the processor is connected with the Ethernet controller through the first PCIE interface, the switching chip is provided with an Ethernet interface, and the switching chip is connected with the Ethernet controller through the Ethernet interface. By adding the high-bandwidth Ethernet controller between the processor and the switching chip, the uplink bandwidth of network switching can be improved.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to the field of network switching technology, and in particular, to a network switching device. Background Art

[0002] Network switching technology is a technology that implements data exchange and forwarding through switches in computer networks. Its main goal is to improve network transmission efficiency and speed and reduce network congestion and transmission delay. When choosing a network switching solution, factors such as the overall network scale, security requirements, performance requirements, cost, and scalability need to be considered. Generally speaking, large enterprises and data centers will use more complex multi-layer switching and software defined networking (SDN) / network function virtualization (NFV) switching solutions. For small networks, basic Ethernet switching functions can meet the needs.

[0003] There are two traditional network switching solutions. One is a non-managed switching solution with limited functions, suitable for use in small networks. It does not support Address Resolution Protocol (ARP) protection, Media Access Control Address (MAC) and Virtual Local Area Network (VLAN) division, nor does it support flow-based control. The reliability of data transmission may be poor and packet loss may occur. The other is a solution that uses an external processor and Ethernet switching architecture, which can solve the technical problems of the above solutions. However, the uplink bandwidth is limited by the built-in Ethernet controller capability of the processor, resulting in low uplink bandwidth. Utility Model Content

[0004] The embodiments of the present disclosure provide a network switching device capable of improving the uplink bandwidth of network switching.

[0005] The present disclosure provides a network switching device, comprising: a switching chip, an Ethernet controller and a processor;

[0006] The processor is provided with a first PCIE interface, and the processor is connected to the Ethernet controller through the first PCIE interface; the switching chip is provided with an Ethernet interface, and the switching chip is connected to the Ethernet controller through the Ethernet interface.

[0007] In some embodiments of the present disclosure, the processor is provided with a second PCIE interface, and the processor is connected to the switching chip through the second PCIE interface to configure the switching chip.

[0008] In some embodiments of the present disclosure, the switching chip supports 48x1G, 48x2.5G or 24x5G downlink, and supports 10G, 25G, 40G, 50G or 100G uplink.

[0009] In some embodiments of the present disclosure, the Ethernet controller supports single-port 100G.

[0010] In some embodiments of the present disclosure, the Ethernet interface supports 100G uplink bandwidth.

[0011] In some embodiments of the present disclosure, the network switching device further comprises: an onboard;

[0012] The board is provided with eight 1000M external optical ports, sixteen 10G external optical ports and two 40G external optical ports, and the switching chip is connected to the 1000M external optical ports, the 10G external optical ports and the 40G external optical ports respectively.

[0013] In some embodiments of the present disclosure, the board is also provided with eight 1000M external electrical ports, and the switching chip is connected to the 1000M external electrical ports.

[0014] In some embodiments of the present disclosure, the board is also provided with an external PCIE slot;

[0015] The processor is provided with a first PCIE slot, and the processor is connected to the external PCIE slot through the first PCIE slot to expand a network card outside the network switching device.

[0016] In some embodiments of the present disclosure, the processor is provided with a second PCIE slot to expand a network card inside the network switching device.

[0017] In some embodiments of the present disclosure, the board is also provided with an external USB interface, and the processor is connected to the external USB interface.

[0018] In the technical solution of the embodiment of the present disclosure, the network switching device includes a switching chip, an Ethernet controller and a processor. The processor is provided with a first PCIE interface, and the processor is connected to the Ethernet controller through the first PCIE interface. The switching chip is provided with an Ethernet interface, and the switching chip is connected to the Ethernet controller through the Ethernet interface. By adding a high-bandwidth Ethernet controller between the processor and the switching chip, the uplink bandwidth of the network switching can be improved.

[0019] The above description is only an overview of the technical solution of the embodiment of the present application. In order to more clearly understand the technical means of the embodiment of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the embodiment of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions of the embodiments of the present application, a brief introduction will be given below to the drawings required for use in the description of the embodiments. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0021] Figure 1 A schematic diagram of the structure of a network switching device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0022] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by those skilled in the art without creative work also fall within the scope of protection of the present disclosure.

[0023] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by a person skilled in the art to which the subject matter of the present disclosure belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the specification and the relevant art, and will not be interpreted in an idealized or overly formal form unless otherwise explicitly defined herein. As used herein, a statement that two or more parts are "electrically connected" together shall mean that the parts are directly joined together or joined through one or more intermediate components.

[0024] Reference to "embodiments" in this disclosure means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase "embodiments" in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described in this disclosure may be combined with other embodiments.

[0025] In addition, the terms "first", "second", etc. in the specification and claims of the present disclosure or the above-mentioned drawings are used to distinguish different objects rather than to describe a specific order, and may explicitly or implicitly include one or more of the features.

[0026] The term "and / or" in this disclosure is only a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists, A and B exist at the same time, and B exists. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0027] In the description of the present disclosure, unless otherwise specified, "plurality" and "at least two" mean more than two (including two), and similarly, "multiple groups" and "at least two groups" mean more than two groups (including two).

[0028] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the accompanying drawings.

[0029] Network switching technology is a technology that implements data exchange and forwarding through switches in computer networks. Its main goal is to improve network transmission efficiency and speed and reduce network congestion and transmission delay. When choosing a network switching solution, factors such as the overall network scale, security requirements, performance requirements, cost, and scalability need to be considered. Generally speaking, large enterprises and data centers will use more complex multi-layer switching and software defined networking (SDN) / network function virtualization (NFV) switching solutions. For small networks, basic Ethernet switching functions can meet the needs.

[0030] There are two traditional network switching solutions. The first is a non-network-managed switching solution with limited functions, suitable for use in small networks. It does not support Address Resolution Protocol (ARP) protection, Media Access Control Address (MAC) and Virtual Local Area Network (VLAN) division, nor does it support flow-based control. The reliability of data transmission may be poor and packet loss may occur. The second is a solution with an external processor and Ethernet switching architecture, which can solve the technical problems of the first solution.

[0031] However, the upstream bandwidth is limited by the built-in Ethernet controller capabilities of the processor, resulting in low upstream bandwidth.

[0032] In order to solve the above technical problems, the present disclosure provides a network switching device, including a switching chip, an Ethernet controller and a processor. The processor is provided with a first PCIE interface, and the processor is connected to the Ethernet controller through the first PCIE interface. The switching chip is provided with an Ethernet interface, and the switching chip is connected to the Ethernet controller through the Ethernet interface. By adding a high-bandwidth Ethernet controller between the processor and the switching chip, the uplink bandwidth of the network switching can be improved.

[0033] The technical solution provided by the present disclosure is described in detail below with reference to several specific embodiments.

[0034] Figure 1 A schematic diagram of a network switching device provided for the implementation of the present disclosure, such as Figure 1 As shown, the network switching device 100 includes: a switching chip 110, an Ethernet controller 120 and a processor 130. The processor 130 is provided with a first PCIE interface 131, and the processor 130 is connected to the Ethernet controller 120 through the first PCIE interface 131. The switching chip 110 is provided with an Ethernet interface 111, and the switching chip 110 is connected to the Ethernet controller 120 through the Ethernet interface 111.

[0035] Exemplarily, the processor 130 may include eight cores and be compatible with the ARMv8.2 instruction set, with a maximum main frequency of up to 2.8 GHz, and the first PCIE interface 131 may be PICe 4.0x8. The Ethernet controller 120 may support single-port 100G, and the corresponding Ethernet interface 111 supports 100G uplink bandwidth. The switching chip supports 440G input / output (I / O) bandwidth, supports 48x1G, 48x2.5G or 24x5G downlink, and supports 10G, 25G, 40G, 50G or 100G uplink.

[0036] The switching chip also supports multiple interfaces such as Quad Serial Gigabit Media Independent Interface (QSGMII), Universal Serial 10G Media Independent Interface (USXGMII), 10G Attachment Unit Interface (XAUI), 10G Attachment Unit Interface (CAUI) and 10 Gigabit per second chip-to-chip electrical interface XFI.

[0037] Among them, QSGMII is a combination of four independent SGMIIs. SGMII has a pair of differential signal lines for transmission and reception, and the clock frequency is 625MHz. The clock signal is sampled at both the rising and falling edges. The reference clock RX_CLK is provided by the physical layer PHY side, which is mainly used when there is no clock on the MAC side. In general, the reference clock RX_CLK is not used, and both transmission and reception can recover the clock from the data. In the serial data of the SGMII data transmission signal TXD, two bits of control information, namely, the transmission enable signal TX_EN / transmission data error prompt signal TX_ER, will be inserted into every eight bits of data. Similarly, in the data of the SGMII data reception signal RXD, two bits of control information, namely, the data reception valid signal RX_DVC / reception data error prompt signal X_ER, will be inserted into every eight bits of data. Therefore, the total data rate of SGMII is 1.25Gbps=625M*2.

[0038] The data transmission signal TXD of USXGMII is 32-bit parallel data, and the data receiving signal RXD is 32-bit parallel data. When the transmission channel control signal TXC of USXGMII is 0, it means that the data transmission signal TXD transmits data. When the transmission channel control signal TXC=1, it means that the data transmission signal TXD transmits control characters. When the receiving channel control signal RXC of USXGMII is 0, it means that the data receiving signal RXD transmits data. When the receiving channel control signal RXC=1, it means that the data receiving signal RXD transmits control characters. The clock frequency of the reference clock TX_CLK of USXGMII is 156.25MHz, and data is sampled at both the rising and falling edges of the reference clock signal. 156.25MHz*2*32=10Gbps.

[0039] XAUI extends the physical distance of the XGMII interface based on XGMII, increasing the transmission distance of printed circuit board routing to 50cm and making backplane routing possible.

[0040] In this way, adding a high-bandwidth Ethernet controller 120 between the processor 130 and the switch chip 110 can increase the uplink bandwidth of the network switch.

[0041] In some embodiments, see Figure 1 The processor 130 is provided with a second PCIE interface 132 , and the processor 130 is connected to the switching chip 110 through the second PCIE interface 132 to configure the switching chip 110 .

[0042] Exemplarily, the second PCIE interface 132 is PCIe. The processor 130 is connected to the switch chip 110 through the second PCIE interface 132, and the processor 130 can configure parameters in the switch chip 110 through the second PCIE interface 132. For example, the relevant parameters of the registers in the switch chip 110 are configured.

[0043] In this way, the parameters in the switching chip 110 can be flexibly set, so that the switching chip 110 can adapt to different scenarios, thereby improving the universality of the network switching device.

[0044] In some embodiments, see Figure 1 The network switching device 100 further includes an onboard 140. The onboard 140 is provided with eight 1000M external optical ports 141, sixteen 10G external optical ports 142 and two 40G external optical ports 143, and the switching chip 110 is connected to the 1000M external optical ports 141, the 10G external optical ports 142 and the 40G external optical ports 143 respectively.

[0045] For example, Figure 1 As shown, the two 40G external optical ports 143 are two 1x40G QSFP interfaces, the sixteen 10G external optical ports 142 are two 8x40G SFP+ interfaces, and the eight 1000M external optical ports 141 are one 8x1G SFP interface. The switch chip 110 can provide a 1x40G QSFP interface to the outside through the 40G external optical port 143, can provide an 8x40G SFP+ interface to the outside through the external optical port 142, and can provide an 8x1G SFP interface to the outside through the external optical port 141.

[0046] In this way, the switch chip 110 is connected to the external network unit through the onboard 140 to meet the data transmission needs of more network units.

[0047] In some embodiments, the onboard 140 is provided with eight 1000M external electrical ports 144 , and the switch chip 110 is connected to the 1000M external electrical ports 144 .

[0048] For example, Figure 1 As shown, the eight 1000M external electrical ports 144 are two 4x1G RJ45 / BP interfaces. The switch chip 110 provides a 4x1G RJ45 / BP interface to the outside through the external electrical port 144. In this way, the switch chip 110 is connected to the external network unit through the onboard 140 to meet the data transmission of more network units.

[0049] In some embodiments, see Figure 1The onboard 140 is also provided with an external PCIE slot 145, and the processor 130 is provided with a first PCIE slot 133. The processor 130 is connected to the external PCIE slot 145 through the first PCIE slot 133 to expand a network card outside the network switching device 100.

[0050] Exemplarily, the first PCIE slot 133 is Slot1 PCIe x8, and the external PCIE slot 145 is Slot PCIex 8. The external PCIE slot 145 can be inserted with an external network card to meet more external network port requirements.

[0051] In some embodiments, see Figure 1 The processor 130 is provided with a second PCIE slot 134 to expand a network card inside the network switching device 100 .

[0052] Exemplarily, the second PCIE slot 134 is Slot2 PCIe 4.0x8. The second PCIE slot 134 can be inserted with an internal network card to meet the needs of more internal network ports.

[0053] In some embodiments, see Figure 1 The onboard 140 is also provided with an external USB interface 146 , and the processor 130 is connected to the external USB interface 146 .

[0054] Exemplarily, an external storage device can be inserted into the external USB interface to read external data, thereby transmitting the external data.

[0055] Unless the context clearly indicates otherwise, the singular form of the words used herein and in the appended claims includes the plural and vice versa. Thus, when referring to the singular, the plural form of the corresponding term is generally included. Similarly, the words "comprise" and "include" are to be interpreted as inclusive rather than exclusive. Likewise, the terms "include" and "or" should be interpreted as inclusive unless such interpretation is expressly prohibited herein. Where the term "example" is used herein, particularly when it is located after a group of terms, the "example" is merely exemplary and illustrative and should not be considered exclusive or comprehensive.

[0056] Further aspects and scopes of adaptability become apparent from the description provided herein. It should be understood that various aspects of the present application can be implemented individually or in combination with one or more other aspects. It should also be understood that the description and specific embodiments herein are intended for purposes of illustration only and are not intended to limit the scope of the present application.

[0057] Several embodiments of the present disclosure are described in detail above, but it is obvious that those skilled in the art can make various modifications and variations to the embodiments of the present disclosure without departing from the spirit and scope of the present disclosure. The protection scope of the present disclosure is defined by the attached claims.

Claims

1. A network switching device, characterized in that: include: Switch chips, Ethernet controllers, and processors; The processor is provided with a first PCIE interface, and the processor is connected to the Ethernet controller through the first PCIE interface; the switching chip is provided with an Ethernet interface, and the switching chip is connected to the Ethernet controller through the Ethernet interface.

2. The network switching device according to claim 1, characterized in that: The processor is provided with a second PCIE interface, and the processor is connected to the switching chip via the second PCIE interface to configure the switching chip.

3. The network switching device according to claim 1, characterized in that: The switching chip supports 48x1G, 48x2.5G or 24x5G downlink, and 10G, 25G, 40G, 50G or 100G uplink.

4. The network switching device according to claim 1, characterized in that: The Ethernet controller supports single-port 100G.

5. The network switching device according to claim 4, characterized in that: The Ethernet interface supports 100G uplink bandwidth.

6. The network switching device according to claim 1, characterized in that: The network switching device further comprises: an onboard; The board is provided with eight 1000M external optical ports, sixteen 10G external optical ports and two 40G external optical ports, and the switching chip is connected to the 1000M external optical ports, the 10G external optical ports and the 40G external optical ports respectively.

7. The network switching device according to claim 6, characterized in that: The board is also provided with eight 1000M external electrical ports, and the switching chip is connected to the 1000M external electrical ports.

8. The network switching device according to claim 6, characterized in that: The board is also provided with an external PCIE slot; The processor is provided with a first PCIE slot, and the processor is connected to the external PCIE slot through the first PCIE slot to expand a network card outside the network switching device.

9. The network switching device according to claim 1, characterized in that: The processor is provided with a second PCIE slot to expand a network card inside the network switching device.

10. The network switching device according to claim 6, characterized in that: The board is also provided with an external USB interface, and the processor is connected to the external USB interface.

Images