Thin film transistor array substrate for improving panel TP cross grain and display device

By designing a toothed TPBlock interface between concave and convex phases in the common electrode layer of the TDDI display panel, the Pixel/Sub Pixel is displayed interlaced, which solves the problem of TP horizontal lines and improves the display effect.

CN222461858UActive Publication Date: 2025-02-11CPT TECH GRP
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Patent Information

Application Number
CN202420033775.8
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-01-08
Publication Date
2025-02-11
Estimated Expiration
2034-01-08

AI Technical Summary

Technical Problem

In the TDDI display panel, due to the impact of TP trace resistance on charging capacity, the Vcom signal may deviate from the level due to the coupling of gate signal, resulting in the emergence of TP horizontal lines.

Method used

The upper and lower interfaces of the TPBlock of the common electrode layer are toothed in concave and convex phases. Through this design, the upper and lower Pixel/Sub Pixels in the upper and lower rows are displayed staggeredly, thereby reducing the appearance of TP transverse lines.

Benefits of technology

Through this design, the TP horizontal lines can be blurred, the visual effect of the bad picture and the display effect can be improved.

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Abstract

A thin film transistor array substrate for improving panel TP cross grains comprises a common electrode layer which comprises M rows and N columns of touch control rectangular blocks; patterns at the upper and lower junctions of the common electrodes where the touch control rectangular blocks are located are in concave-convex tooth shapes, and the common electrodes where the upper and lower touch control rectangular blocks are located are meshed through the concave-convex tooth shapes. And the common electrode layer is made of ITO (Indium Tin Oxide). The display device comprises the thin film transistor array substrate as described above. According to the utility model, the upper interface and the lower interface of the TPBlock of the common electrode layer are designed to be tooth-shaped concave-convex, so that the Pixel / SubPixel in the upper row and the lower row of the TPBlock are displayed in a staggered manner, and therefore, TP cross grains are fuzzified, and the visual effect of bad pictures is improved.
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Description

Technical Field

[0001] The utility model belongs to the technical field of liquid crystal display, and specifically refers to a thin film transistor array substrate and a display device for improving panel TP horizontal stripes. Background Art

[0002] Today, TDDI (touch and display driver integration) has become the mainstream display panel integration solution. TDDI brings a unified system architecture. The original system architecture separates the display and touch chips, which may cause some display noise. TDDI realizes unified control ( Figure 1 ), which will have a better effect in signal-to-noise management, which can improve the overall sensitivity of the sensor, reduce display noise, and provide first-class capacitive touch performance. The TDDI architecture makes the display panel thinner and significantly improves the brightness, while reducing manufacturing costs and simplifying the supply chain.

[0003] Figure 2 It is a more common TDDI architecture design at present. This design transmits the IC voltage to TPBlock (touch matrix block) through the TP (touch) line jump layer. Due to the influence of the TP line resistance on the charging capacity, there will be a situation where the Vcom signal deviates from the level due to the coupling of the gate signal. Usually, this situation will not occur under the offset of the positive and reverse timing. However, the coupling effect at the boundary position of TPBlock cannot be offset, causing the Vcom signal to deviate from the level, resulting in the pixel voltage at the head and tail positions being different from that in the middle position, and thus generating TP stripes. Due to the high integration of the TDDI architecture, it is accompanied by more stringent design and process requirements, and some display defects also arise. Among them, TP stripes are one of the problems caused by parasitic capacitance coupling in the display screen. In actual production, the inventor found that the influence of the gate on VCOM will cause TP stripes to appear on the display screen. For this reason, the inventor proposed a TP design scheme to improve the above-mentioned display defects. Summary of the invention

[0004] The technical problem to be solved by the utility model is to provide a thin film transistor array substrate which improves the horizontal stripes of the panel TP.

[0005] The utility model is achieved in this way:

[0006] A thin film transistor array substrate for improving panel TP horizontal stripes comprises: a common electrode layer, wherein the common electrode layer comprises touch matrix blocks in M ​​rows and N columns; the characteristic is that: the pattern at the upper and lower junctions of the common electrodes where each touch matrix block is located is a toothed shape with alternating concave and convex shapes, and the common electrodes where the upper and lower touch matrix blocks are located are meshed with each other through the toothed shapes with alternating concave and convex shapes.

[0007] Furthermore, the common electrode layer is made of ITO.

[0008] A display device comprises the thin film transistor array substrate as described above.

[0009] The advantages of the utility model are:

[0010] The utility model designs the upper and lower interfaces of the TPBlock of the common electrode layer into tooth-shaped projections and depressions, so that the upper and lower rows of pixels / sub pixels of a TP Block are displayed alternately, thereby blurring the TP horizontal stripes and improving the poor visual effect of the picture. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The present invention will be further described below in conjunction with the embodiments with reference to the accompanying drawings.

[0012] Figure 1 This is a structural diagram of a display panel in the prior art (the position of the color filter substrate is slightly moved).

[0013] Figure 2 This is the TDDI architecture design diagram.

[0014] Figure 3 This is a schematic diagram of the display panel structure of the utility model

[0015] Figure 4 yes Figure 3 An enlarged schematic diagram of part A.

[0016] Reference numerals:

[0017] 1-color film substrate, 2-touch matrix, 3-array substrate glass, 4-touch and display driver. DETAILED DESCRIPTION

[0018] like Figure 3 and Figure 4 As shown, a thin film transistor array substrate for improving the horizontal stripes of the panel TP includes: a common electrode layer, the common electrode layer includes M rows and N columns of touch matrix blocks 2 (the values ​​of M and N depend on the size of the panel); the pattern at the upper and lower junctions of the common electrodes where each touch matrix block 2 is located is a tooth-like shape with alternating concave and convex shapes, and the common electrodes where the upper and lower touch matrix blocks 2 are located are meshed with each other through the tooth-like shape with alternating concave and convex shapes.

[0019] The material of the common electrode layer is ITO.

[0020] The utility model also includes a display device, comprising the thin film transistor array substrate as described above.

[0021] The utility model designs the upper and lower interfaces of the TPBlock of the common electrode layer into tooth-shaped projections and depressions, so that the upper and lower rows of pixels / sub pixels of a TP Block are displayed alternately, thereby blurring the TP horizontal stripes and improving the poor visual effect of the picture.

[0022] The above embodiments and drawings do not limit the product form and style of the present utility model. Any appropriate changes or modifications made by ordinary technicians in the relevant technical field should be deemed to be within the patent scope of the present utility model.

Claims

1. A thin film transistor array substrate for improving panel TP horizontal stripes, comprising: The common electrode layer comprises M rows and N columns of touch matrix blocks; the characteristic is that the pattern at the upper and lower junctions of the common electrodes where each touch matrix block is located is a toothed shape with alternating concave and convex shapes, and the common electrodes where the upper and lower touch matrix blocks are located are meshed with each other through the toothed shapes with alternating concave and convex shapes.

2. A thin film transistor array substrate for improving panel TP horizontal stripes as claimed in claim 1, characterized in that: The material of the common electrode layer is ITO.

3. A display device, characterized in that: The display device comprises the thin film transistor array substrate as claimed in claim 1 or 2.