MOSFET device with ESD protection capability

Abstract

The utility model discloses an MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) device with ESD (Electro-Static Discharge) protection capability, which is characterized in that a transient suppression diode is configured between pins of a grid electrode and a source electrode and is used for directly leading pulse high voltage into a circuit ground electrically connected with the source electrode when the pulse high voltage exists in the grid electrode. According to the MOSFET device, the transient voltage suppressor is arranged between the grid electrode and the source electrode, and when the pulse voltage on the grid electrode is high, the pulse voltage is directly led into the source electrode (ground), so that the high electric surge is effectively prevented from flowing into the device to cause electric impact on the device and cause failure.

Description

Technical Field

[0001] The utility model belongs to the field of semiconductors, and in particular relates to a MOSFET device with ESD protection capability. Background Art

[0002] MOSFET refers to metal oxide semiconductor field effect transistor, which is a device made of three materials: metal, oxide (SiO2 or SiN) and semiconductor. MOSFET is a voltage-controlled power semiconductor device with significant advantages such as fast switching speed, good high-frequency characteristics, good thermal stability, low noise, simple driving circuit, low driving power, wide safe working area, and no secondary breakdown problem.

[0003] Currently, most MOSFET wafers and devices are not designed with ESD protection capabilities, which can easily lead to ESD breakdown failure of the device during process manufacturing or system application. Utility Model Content

[0004] In order to solve the technical problems existing in the prior art, a MOSFET device with ESD protection capability is provided herein, which can effectively prevent high electrical surges from flowing into the device and causing electrical shocks to the product, thereby causing failure.

[0005] The MOSFET device is provided with a transient suppression diode between the gate and the source pins, which is used to directly introduce the pulse high voltage into the circuit ground electrically connected to the source when the gate has a high pulse voltage.

[0006] In some embodiments, the TVS diode is disposed between lead frame pins connected to the gate and source inside the MOSFET wafer and then encapsulated by the MOSFET device.

[0007] In some embodiments, the MOSFET device comprises:

[0008] A lead frame is divided into a chip area for assembling a MOSFET chip wafer and a pin area electrically connected to the internal electrodes of the MOSFET chip wafer, the pin area includes a gate pin area, a source pin area and a drain pin area, and the positive and negative electrodes of the transient suppression diode are electrically connected to the gate pin area and the source pin area respectively;

[0009] The encapsulation layer is formed on the surface of the lead frame to seal the chip area and the pin area;

[0010] The pin terminal has one end mounted on the pin area and electrically connected to the pin area, and the other end extends out of the device body mainly formed by the lead frame and the packaging layer for electrical connection with the external circuit.

[0011] In some embodiments, the chip area is electrically connected to the drain inside the MOSFET chip wafer, and the chip area is integrally formed with the drain pin area; the gate pin area and the source pin area are spaced apart from the chip area, and the gate and drain inside the MOSFET chip wafer are electrically connected to the gate pin area and the source pin area respectively through metal bonding wires or copper sheets.

[0012] In some embodiments, the gate pin region and the source pin region are located on the same side.

[0013] In some embodiments, the gate pin region is configured as one, and the source pin region and the drain pin region are configured as a plurality.

[0014] In some embodiments, the MOSFET chip wafer is configured as one.

[0015] In some embodiments, the encapsulation layer is silicone gel or epoxy resin.

[0016] The beneficial effects of the utility model include:

[0017] This MOSFET device is equipped with a transient suppression diode between the gate and the source. When there is a high pulse voltage on the gate, it is directly introduced into the source (ground), effectively preventing high surges from flowing into the device and causing electrical shocks to the device, resulting in failure.

[0018] This MOSFET device integrates a transient suppression diode into a device body mainly formed by a lead frame and a packaging layer, and there is no need to increase device pin terminals, thereby simplifying the pin layout of the MOSFET device and reducing interference between pins caused by the pin layout; and there is no need to consider adding the design of ESD protection devices at the system (the system refers to the circuit constructed by the MOSFET device) level or the PCB board (referring to the PCB board used to construct the system) level, thereby simplifying the layout at the system level. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The drawings herein are incorporated into the specification and constitute a part of the specification, showing embodiments of the utility model and used together with the specification to explain the principle of the utility model. Obviously, the drawings described below are only some embodiments of the utility model, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. In the drawings:

[0020] Figure 1 A layout diagram of a MOSFET device provided by the utility model;

[0021] Figure 2 A circuit topology diagram of a MOSFET device provided by the utility model;

[0022] Figure 3 This is an appearance diagram of the MOSFET device provided by the utility model. DETAILED DESCRIPTION

[0023] In order to make the purpose, technical solution and advantages of the embodiment of the utility model clearer, the technical solution in the embodiment of the utility model will be clearly and completely described below in conjunction with the drawings in the embodiment of the utility model. Obviously, the described embodiment is a part of the embodiment of the utility model, not all of the embodiments. Based on the embodiment of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0024] Please refer to Figure 1 , 2 3. The utility model aims to solve the technical problem that the existing MOSFET wafers and devices are not designed with ESD protection capability, which may easily lead to ESD breakdown failure of the device during process manufacturing or system application (system application refers to the application in which the MOSFET wafer is used to build a functional circuit, and the functional circuit refers to a circuit that can realize a specific function, such as an amplifier circuit, a drive circuit, a radio frequency circuit, a power supply circuit, etc.). A MOSFET device with ESD protection capability is provided. The MOSFET device is configured with a transient suppression diode between the gate and source pins, which is used to directly introduce the pulse high voltage into the circuit ground electrically connected to the source when the gate has a high pulse voltage.

[0025] The transient suppression diode configured in the MOSFET device is configured between the lead frame pins connected to the gate and source inside the MOSFET wafer, and then the MOSFET device is molded and encapsulated. Figure 3 As shown, the transient suppression diode is integrated inside the MOSFET device, and the appearance is the same as the existing device structure. However, when there is a pulse high voltage on the gate G, it will be introduced into the circuit ground electrically connected to the source S through the transient suppression diode inside the MOSFET device.

[0026] Please refer to Figure 1 , 3 , the MOSFET device includes:

[0027] The lead frame 1 is divided into a chip area 11 for assembling the MOSFET chip wafer 2 and a pin area electrically connected to the internal electrodes of the MOSFET chip wafer 2, the pin area includes a gate pin area 12, a source pin area 13 and a drain pin area 14, and the positive and negative electrodes of the transient suppression diode 3 are electrically connected to the gate pin area 12 and the source pin area 13 respectively;

[0028] The packaging layer 4 is formed on the surface of the lead frame 1 to seal the chip area 11 and the pin area;

[0029] The pin terminal 5 has one end mounted on the pin area and electrically connected to the pin area, and the other end extending out of the device body mainly formed by the lead frame 1 and the packaging layer 4 for electrically connecting to an external circuit.

[0030] The electrical connection relationship inside the MOSFET device can be: the chip area 11 is electrically connected to the drain inside the MOSFET chip wafer 2, and the chip area 11 and the drain pin area 14 are integrally formed, so that the drain inside the MOSFET chip wafer 2 is electrically connected to the drain pin area 14; the gate pin area 12 and the source pin area 13 are spaced apart from the chip area 11, and the gate and drain inside the MOSFET chip wafer 2 are electrically connected to the gate pin area 12 and the source pin area 13 respectively through metal bonding wires or copper sheets 6.

[0031] In order to reduce the wiring between the transient suppression diode 3 and the gate pin area 12 and the source pin area 13, and thus avoid the influence of parasitic inductance and capacitance generated by the wiring on the device, the gate pin area 12 and the source pin area 13 of the MOSFET device are located on the same side, so that the transient suppression diode 3 is connected to the gate pin area 12 and the source pin area 13 in a straight line, avoiding long-distance wiring. When the distance between the gate pin area 12 and the source pin area 13 is just enough to make the positive and negative electrodes of the transient suppression diode 3 contact the gate pin area 12 and the source pin area 13, the positive and negative electrodes of the transient suppression diode 3 are directly connected to the gate pin area 12 and the source pin area 13.

[0032] The MOSFET device can be configured with only one MOSFET chip wafer, or two or more. The gate pin area, source pin area and drain pin area are configured with one or more correspondingly. When the MOSFET chip wafer is configured as one, the gate pin area is configured with one, and the source pin area and drain pin area are configured with multiple, which is a redundant structure. The number of pin terminals matches the number of pin areas, one-to-one matching.

[0033] The packaging layer of the MOSFET device is silicone gel or epoxy resin. After the lead frame 1, MOSFET chip wafer 2, transient suppression diode 3, and pin terminal 5 are arranged as required, a packaging layer is formed on the surface of the lead frame 1 by silicone gel or epoxy resin to seal one end of the MOSFET chip wafer 2, transient suppression diode 3, and pin terminal 5 to isolate dust, water vapor and other interferences, etc., to ensure the stability of the device.

[0034] The MOSFET device was tested for ESD, and the ESD protection capability data of the device is as follows:

[0035] During the product packaging stage, this MOSFET device is packaged by welding 1pcsTVS device or crystal between the lead frame pins of the gate and source, and then the product is molded and packaged, which improves the ESD protection performance of the product; at the same time, it also ensures that the product size does not change; and reduces the ESD protection capability of the device during the packaging process and system application.

[0036] The transient suppression diode in this MOSFET device can be configured as a unidirectional TVS tube or a bidirectional TVS protection diode. The transient suppression diode is a solid-state PN junction diode used to eliminate the effects of sudden or instantaneous overvoltage. TVS diodes can be divided into two types: unidirectional and bidirectional. The unidirectional TVS diode is used as a rectifier in the forward circuit and can withstand large peak currents. The TVS transient suppression diode is located between the gate and source of the MOSFET and can break down and conduct a large amount of current at the transient suppression diode voltage level without causing damage. Under normal voltage conditions, the TVS transient suppression diode behaves as an open circuit, but there is a small amount of leakage current; when the normal voltage exceeds a certain level, the TVS transient suppression diode junction avalanches and shunts the overvoltage out of the protected circuit. Once the overvoltage disappears, the transient suppression diode will automatically reset.

[0037] The size of the MOSFET device can be configured according to requirements, such as length*width of 5mm*6mm.

[0038] The present disclosure has been described by the above-mentioned relevant embodiments, but the above-mentioned embodiments are only examples for implementing the present disclosure. It must be pointed out that the disclosed embodiments do not limit the scope of the present disclosure. On the contrary, changes and modifications made without departing from the spirit and scope of the present disclosure are all within the scope of patent protection of the present disclosure.

Claims

1. A MOSFET device with ESD protection capability, characterized in that: The MOSFET device is provided with a transient suppression diode between the gate and source pins, which is used to directly introduce the pulse high voltage into the circuit ground electrically connected to the source when the gate has a high pulse voltage.

2. The MOSFET device with ESD protection capability according to claim 1, characterized in that: The TVS diode is placed between the lead frame pins connected to the gate and source inside the MOSFET wafer and then the MOSFET device is encapsulated.

3. The MOSFET device with ESD protection capability according to claim 1, characterized in that: The MOSFET device includes: A lead frame is divided into a chip area for assembling a MOSFET chip wafer and a pin area electrically connected to the internal electrodes of the MOSFET chip wafer, the pin area includes a gate pin area, a source pin area and a drain pin area, and the positive and negative electrodes of the transient suppression diode are electrically connected to the gate pin area and the source pin area respectively; The encapsulation layer is formed on the surface of the lead frame to seal the chip area and the pin area; The pin terminal has one end assembled on the pin area and electrically connected to the pin area, and the other end extends out of the device body mainly formed by the lead frame and the packaging layer for electrical connection with the external circuit.

4. The MOSFET device with ESD protection capability according to claim 3, characterized in that: The chip area is electrically connected to the drain inside the MOSFET chip wafer, and the chip area and the drain pin area are integrally formed; the gate pin area and the source pin area are spaced apart from the chip area, and the gate and drain inside the MOSFET chip wafer are electrically connected to the gate pin area and the source pin area respectively through metal bonding wires or copper sheets.

5. The MOSFET device with ESD protection capability according to claim 3, characterized in that: The gate pin region and the source pin region are located on the same side.

6. The MOSFET device with ESD protection capability according to claim 3, characterized in that: The gate lead region is configured as one, and the source lead region and the drain lead region are configured as a plurality.

7. The MOSFET device with ESD protection capability according to claim 6, characterized in that: The MOSFET chip wafer is configured as one.

8. The MOSFET device with ESD protection capability according to claim 3, characterized in that: The encapsulation layer is silicone gel or epoxy resin.

9. The MOSFET device with ESD protection capability according to claim 1, characterized in that: The TVS diode is a bidirectional TVS diode.

10. The MOSFET device with ESD protection capability according to any one of claims 1 to 9, wherein the size of the MOSFET device is 5 mm*6 mm.

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