Wireless microphone circuit of teaching broadcasting system

By designing a wireless microphone circuit in the teaching broadcast system, using the CX6821 genetic chip module and DSPPA wireless audio transmission communication protocol, the two-way interconnection of wireless microphones between multiple classrooms is achieved, and the problems of unidirectional transmission of existing microphones and infrared frequency occlusion are solved, improving audio quality and teaching efficiency.

CN222763977UActive Publication Date: 2025-04-15广州市迪士普音响科技有限公司
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Patent Information

Application Number
CN202421206127.4
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-05-30
Publication Date
2025-04-15
Estimated Expiration
2034-05-30

AI Technical Summary

Technical Problem

In the existing teaching broadcasting system, the microphone has problems such as one-way transmission, infrared frequency blockage, two-way audio transmission is not confidential and poor sound quality.

Method used

A wireless microphone circuit for teaching broadcasting system was designed, using the CX6821 genetic chip module and the DSPPA wireless audio transmission communication protocol, combined with the ARM network module, the two-way interconnection of wireless microphones between multiple classrooms is realized.

Benefits of technology

It realizes two-way interconnection of wireless microphones between multiple classrooms, with an audio delay of less than 10ms, expands the application scope of famous teachers' classrooms, optimizes audio quality, and improves the teaching quality of the classroom.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses a wireless microphone circuit of a teaching broadcasting system, the teaching broadcasting system comprises a plurality of wireless microphones and classroom cabinet equipment, the classroom cabinet equipment is provided with an ARM network module, a CX6821 genetic chip module and an RJ45 network port; the wireless microphone circuit comprises a main circuit, a booster circuit, an operational amplifier circuit, an audio power amplifier circuit and a control panel circuit. The wireless microphone and the CX6821 genetic chip module in the classroom cabinet equipment as well as the adopted DSPPA wireless audio unvarnished transmission communication protocol and ARM network module are matched with each other, so that the wireless microphones among a plurality of classrooms are in bidirectional interconnection and intercommunication without interference, the audio delay is less than 10ms, the application range of the class of famous teachers is greatly expanded, and the application range of the classroom is expanded. And meanwhile, the CX6821 genetic chip module also has the functions of a noise reduction door, automatic sound mixing and the like, so that the audio quality is optimized.
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Description

Technical Field

[0001] The utility model belongs to the technical field of wireless communication, and in particular relates to a wireless microphone circuit of a teaching broadcasting system. Background Art

[0002] Teaching broadcast systems are an indispensable part of modern educational environments. They allow efficient communication and interaction between teachers and students. Wireless microphones are important communication tools in teaching broadcast systems.

[0003] However, the existing microphones that can be connected to the teaching broadcasting system have the following shortcomings:

[0004] 1. Bluetooth microphone: Although the Bluetooth microphone also uses a 2.4GHz frequency, it can only transmit in one direction and cannot transmit two-way audio.

[0005] 2. Infrared frequency microphone: Infrared frequency microphone cannot communicate if the infrared is blocked;

[0006] 3. Karaoke: Karaoke uses both Bluetooth and FM functions to achieve two-way audio transmission, but FM cannot be kept confidential. Even if the frequency is right, other people's demodulators can also receive it, and the sound quality is poor. At the same time, it will also receive interference from signals of the same frequency. For example, if there are many classrooms nearby, there will be a serious lack of channels and mutual interference. Utility Model Content

[0007] In order to solve the limitation problem of traditional microphones in teaching broadcasting systems, the utility model provides a wireless microphone circuit of teaching broadcasting systems, and the technical solution is as follows:

[0008] A teaching broadcasting system comprises a plurality of wireless microphones and classroom cabinet equipment, wherein the classroom cabinet equipment is provided with an ARM network module, a CX6821 genetic chip module and an RJ45 network port; the wireless microphone communicates with the CX6821 genetic chip module through 2.4G wireless transparent transmission, the CX6821 genetic chip module adopts a DSPPA wireless audio transparent transmission communication protocol combined with an ARM network module to be connected with a plurality of classroom cabinet equipment, thereby completing the interconnection of wireless microphones between a plurality of classrooms; a plurality of wireless microphones and classroom cabinet equipment mutually input and output audio, and the audio delay is less than 10ms.

[0009] Preferably, a wireless microphone circuit of a teaching broadcasting system includes a main circuit, a boost circuit, an operational amplifier circuit, an audio power amplifier circuit and a control panel circuit; the main circuit includes a main chip U5, whose model is CX6821; the main chip U5 is connected to the antenna ANT1 through an antenna matching circuit composed of a capacitor C21 and a capacitor C29, a capacitor C25 and a capacitor C46; the internal circuit of the main chip U5 is provided with a plurality of bypass capacitors C44, a bypass capacitor C2, a bypass capacitor C6, a bypass capacitor C43 and a bypass capacitor C45, and one end of the plurality of bypass capacitors is connected to the main chip U 5 are connected in series, and the other end is grounded; the main chip U5 is provided with a first energy storage circuit and a second energy storage circuit, the first energy storage circuit is provided with a DC1.8V energy storage inductor L3 and a capacitor C5, and the second energy storage circuit is provided with a DC1.2V energy storage inductor L4 and a capacitor C38; the main chip U5 is respectively connected in parallel with the energy storage inductor L3 and the energy storage inductor L4, and then connected in series with the capacitor C5 and the capacitor C38, and then grounded; a clock crystal oscillator Y2 is arranged in parallel at one end of the main chip U5; the main circuit is respectively connected with the boost circuit, the operational amplifier circuit, the audio power amplifier circuit and the control panel circuit.

[0010] Preferably, the boost circuit includes a boost chip U9, a lithium battery BAT1 with an input of +3.7V, an input filter capacitor C58 and an input filter capacitor C59, a pull-up resistor R34, a boost energy storage oscillation inductor L1, a rectifier diode D1, a voltage divider feedback resistor R35 and a voltage divider feedback resistor R39, an output filter capacitor C56, an output filter capacitor C57 and an output filter capacitor C55; the input filter capacitor C58 and the input filter capacitor C59 are connected in parallel to the input end of the boost chip U9; the pull-up resistor R 34, connected to the enable terminal EN of the boost chip U9; the boost energy storage oscillation inductor L1 is connected to the boost control terminal of the boost chip U9; the rectifier diode D1 is connected in series with the boost energy storage oscillation inductor L1; the voltage divider feedback resistor R35 and the voltage divider feedback resistor R39 are connected in series to the feedback terminal of the boost chip U9; the output filter capacitor C56, the output filter capacitor C57 and the output filter capacitor C55 are respectively connected in parallel with the output terminal of the boost chip U9; the model of the boost chip U9 is SX1308.

[0011] Preferably, the operational amplifier circuit includes a single-channel operational amplifier U3, whose positive input end is provided with an input feedback resistor R10, an input feedback resistor R11 and an input feedback capacitor C11, an input feedback capacitor C15 and an input feedback capacitor C20; its reverse input end is connected to the collection microphone JP13 through a capacitor C16 and a resistor R12 arranged in series; the output end of the single-channel operational amplifier U3 is connected to the main chip U5 through a resistor R6 and a capacitor C7 arranged in series; the single-channel operational amplifier U3 is provided with a resistor R13 and a capacitor C18, a capacitor C17 and a capacitor C12 in parallel, and a resistor R5 is arranged in series; the single-channel operational amplifier U3 is also provided with a power supply voltage regulator tube U1, and the input and output ends of the power supply voltage regulator tube U1 are provided with filter capacitors C8 and filter capacitors C10.

[0012] Preferably, the audio power amplifier circuit includes a first, a second audio power amplifier U6 and a second audio power amplifier U8; a potentiometer BP1 is provided at the output end of the main chip U5, and a DC-isolating coupling capacitor C9 and a DC-isolating coupling capacitor C53 are respectively arranged in series at both ends of the output of the potentiometer BP1; the DC-isolating coupling capacitor C9 is connected to the first audio power amplifier U6 through a power amplifier input matching resistor R3 arranged in series, and the DC-isolating coupling capacitor C53 is connected to the second audio power amplifier U8 through a power amplifier input matching resistor R28 arranged in series.

[0013] Preferably, the audio power amplifier circuit is also provided with a first spare input channel and a second spare input channel, a first filter bypass capacitor C1 and a first filter bypass capacitor C3, a second filter bypass capacitor C49 and a second filter bypass capacitor C51, a first enabling resistor R4, a second enabling resistor R29, a chip internal circuit bypass capacitor C34 and a chip internal circuit bypass capacitor C54, a power amplifier speaker output socket SW1 and a power amplifier speaker output socket SW2; the first spare input channel includes capacitor C4 and resistor R1, which are connected in series to the input end of the first audio power amplifier U6; the second spare input channel includes capacitor C52 and resistor R27, which are connected in series to the input end of the second audio power amplifier U8.

[0014] Preferably, the first filter bypass capacitor C1 and the first filter bypass capacitor C3 are connected in parallel with the first audio power amplifier U6; the second filter bypass capacitor C49 and the second filter bypass capacitor C51 are connected in parallel with the second audio power amplifier U8; the first enable resistor R4 is connected to the first audio power amplifier U6; the second enable resistor R29 is connected to the second audio power amplifier U8; the chip internal circuit bypass capacitor C34 is connected in parallel with the first audio power amplifier U6, and the chip internal circuit bypass capacitor C54 is connected in parallel with the second audio power amplifier U8; the power amplifier speaker output socket SW1 is connected to the output end of the first audio power amplifier U6, and the power amplifier speaker output socket SW2 is connected to the output end of the second audio power amplifier U8.

[0015] Preferably, the control panel circuit includes a status indicator light connected in series with a resistor R36 and LED3, a power button SW3, a sound control + button SW4 and a sound control - button SW5; one end of the control panel circuit is connected to the main chip U5, and the other end is grounded.

[0016] Preferably, the ARM network module is connected to the RJ45 network port, and several classroom cabinet devices are interconnected through a local area network or the Internet.

[0017] Preferably, the CX6821 genetic chip module is provided with functions such as noise reduction gate and automatic mixing.

[0018] Compared with the prior art, the beneficial effects of the utility model are as follows: the CX6821 genetic chip module in the wireless microphone and the classroom cabinet equipment, as well as the adopted DSPPA wireless audio transparent communication protocol and the ARM network module cooperate with each other to realize the two-way interconnection and non-interference of wireless microphones between multiple classrooms, and the audio delay is less than 10ms, which greatly expands the application scope of the famous teacher's classroom and allows students to participate in the same classroom activities in different classrooms with low-latency audio transmission. At the same time, the CX6821 genetic chip module also has functions such as noise reduction gate and automatic mixing, which optimizes the audio quality and improves the teaching quality in the classroom. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is a flow chart of a teaching broadcasting system;

[0020] Figure 2 It is a schematic diagram of the main circuit in a wireless microphone circuit;

[0021] Figure 3 It is a schematic diagram of a voltage boost circuit in a wireless microphone circuit;

[0022] Figure 4 It is a schematic diagram of an op amp circuit in a wireless microphone circuit;

[0023] Figure 5 It is a schematic diagram of an audio power amplifier circuit in a wireless microphone circuit;

[0024] Figure 6 This is a schematic diagram of the control panel circuit in a wireless microphone circuit. DETAILED DESCRIPTION

[0025] The utility model is further described and illustrated below in conjunction with the accompanying drawings and embodiments.

[0026] See also Figure 1 , a teaching broadcasting system involved in this embodiment includes several wireless microphones and classroom cabinet equipment, wherein the classroom cabinet equipment is provided with an ARM network module, a CX6821 genetic chip module and an RJ45 network port;

[0027] The wireless microphone communicates with the CX6821 genetic chip module via 2.4G wireless transparent transmission. The CX6821 genetic chip module adopts DSPPA wireless audio transparent transmission communication protocol combined with ARM network module to connect to multiple classroom cabinet devices, thereby completing the interconnection of wireless microphones between multiple classrooms; several wireless microphones and classroom cabinet devices input and output audio with each other and the audio delay is less than 10ms.

[0028] The CX6821 genetic chip module not only processes the audio data of the wireless microphone, but also connects to the campus LAN or the Internet through the ARM network module, so that cabinet devices between different classrooms can communicate with each other and share audio streams, allowing multiple classrooms to participate in the same teaching activity at the same time without the need for students to be physically concentrated in the same classroom.

[0029] The CX6821 genetic chip module has a noise reduction gate function. In teaching scenarios, environmental noise may interfere with the clarity of speech. The noise reduction gate function of the CX6821 genetic chip module can automatically detect and filter out these unnecessary noises, ensuring that the sound transmitted to the classroom cabinet equipment through the wireless microphone is as clear as possible.

[0030] The CX6821 genetic chip module also has an automatic mixing function, which can automatically adjust the volume balance of each channel in the case of multi-channel input and optimize the sound quality of the total output signal. It is suitable for teaching interactive links that require quick response, such as group discussions, which require multiple students to use wireless microphones at the same time.

[0031] The ARM network module is connected to the RJ45 network port, and several classroom cabinet devices are interconnected through a local area network or the Internet.

[0032] See also Figures 2 to 6The wireless microphone circuit of a teaching broadcasting system involved in this embodiment includes a main circuit, a boost circuit, an operational amplifier circuit, an audio power amplifier circuit and a control panel circuit. The main circuit includes a main chip U5, whose model is CX6821; the main chip U5 is connected to the antenna ANT1 through an antenna matching circuit composed of capacitors C21, C29, C25 and C46 to ensure impedance matching between the antenna and the circuit and optimize the sending and receiving of wireless signals; the internal circuit of the main chip U5 is provided with a plurality of bypass capacitors C44, C2, C6, C43 and C45, and a plurality of bypass capacitors One end is connected in series with the main chip U5, and the other end is grounded; the main chip U5 is provided with a first energy storage circuit and a second energy storage circuit, the first energy storage circuit is provided with a DC1.8V energy storage inductor L3 and a capacitor C5, and the second energy storage circuit is provided with a DC1.2V energy storage inductor L4 and a capacitor C38; the main chip U5 is respectively connected in parallel with the energy storage inductor L3 and the energy storage inductor L4, and then respectively connected in series with the capacitor C5 and the capacitor C38 and then grounded; a clock crystal oscillator Y2 is arranged in parallel at one end of the main chip U5; the main circuit is respectively connected with the boost circuit, the operational amplifier circuit, the audio power amplifier circuit and the control panel circuit, and together constitute a complete system of the wireless microphone circuit.

[0033] The boost circuit includes a boost chip U9, a lithium battery BAT1 with an input of +3.7V as the initial power supply of the boost circuit, input filter capacitors C58 and C59, pull-up resistors R34, boost energy storage oscillation inductor L1, rectifier diode D1, voltage divider feedback resistors R35 and R39, output filter capacitors C56, output filter capacitors C57 and C55; the input filter capacitors C58 and C59 are connected in parallel to the input end of the boost chip U9; the pull-up resistor R34 is connected to the enable end EN of the boost chip U9; the boost energy storage oscillation inductor L1 is connected to the boost end EN of the boost chip U9 The rectifier diode D1 is connected in series with the boost energy storage oscillation inductor L1 for rectifying the boosted pulse voltage; the voltage-dividing feedback resistor R35 and the voltage-dividing feedback resistor R39 are connected in series to the feedback end of the boost chip U9 to prevent the output voltage from exceeding a predetermined range; the output filter capacitor C56, the output filter capacitor C57 and the output filter capacitor C55 are respectively connected in parallel with the output end of the boost chip U9 for smoothing and stabilizing the output voltage and removing voltage fluctuations that may be caused by load changes or chip switching actions; the boost chip U9 is SX1308, which is the core of the boost circuit and is used to increase the input voltage to the required voltage value.

[0034] The operational amplifier circuit includes a single-channel operational amplifier U3, whose positive input end is provided with input feedback resistor R10, input feedback resistor R11 and input feedback capacitor C11, input feedback capacitor C15 and input feedback capacitor C20, which form a complex feedback network for setting the gain of the amplifier and providing frequency response adjustment; its reverse input end is connected to the collection microphone JP13 through a capacitor C16 and a resistor R12 arranged in series; the output end of the single-channel operational amplifier U3 is connected to the main chip U5 through a resistor R6 and a capacitor C7 arranged in series, which ensures that the amplified signal can be effectively transmitted to The main chip is isolated from the DC component by capacitor C7 to protect the main chip from unexpected voltage; the single-channel operational amplifier U3 is provided with resistor R13 and capacitor C18, capacitor C17 and capacitor C12 in parallel, and resistor R5 is provided in series, which form a parallel feedback network, and work together to provide phase compensation and stability control to ensure that the single-channel operational amplifier U3 can maintain stable operation under different working conditions; the single-channel operational amplifier U3 is also provided with a power supply voltage regulator U1, and the input and output ends of the power supply voltage regulator U1 are provided with filter capacitors C8 and filter capacitors C10 to eliminate other noises.

[0035] The audio power amplifier circuit includes a first audio power amplifier U6 and a second audio power amplifier U8; a potentiometer BP1 is provided at the output end of the main chip U5, and a DC-isolating coupling capacitor C9 and a DC-isolating coupling capacitor C53 are respectively connected in series at both ends of the output of the potentiometer BP1 to isolate the DC component; the DC-isolating coupling capacitor C9 is connected to the first audio power amplifier U6 through a power amplifier input matching resistor R3 arranged in series, and the DC-isolating coupling capacitor C53 is connected to the second audio power amplifier U8 through a power amplifier input matching resistor R28 arranged in series, and resistors R3 and R28 are used to match the impedance between the audio signal source and the power amplifier.

[0036] The audio power amplifier circuit is also provided with a first spare input channel and a second spare input channel, a first filter bypass capacitor C1 and a first filter bypass capacitor C3, a second filter bypass capacitor C49 and a second filter bypass capacitor C51, a first enabling resistor R4, a second enabling resistor R29, a chip internal circuit bypass capacitor C34 and a chip internal circuit bypass capacitor C54, a power amplifier speaker output socket SW1 and a power amplifier speaker output socket SW2; the first spare input channel includes a capacitor C4 and a resistor R1, which are connected in series and connected to the input end of the first audio power amplifier U6; the second spare input channel includes a capacitor C52 and a resistor R27, which are connected in series and connected to the input end of the second audio power amplifier U8. These spare input channels can be used for the input of additional audio sources. When there is a problem with the main audio signal acquisition, such as an unexpected interruption or a decrease in signal quality, the spare input channel can provide an additional signal source to ensure that the audio output will not be interrupted due to problems with a single signal source, thereby improving the reliability and stability of the system.

[0037] The first filter bypass capacitor C1 and the first filter bypass capacitor C3 are connected in parallel with the first audio power amplifier U6, and the second filter bypass capacitor C49 and the second filter bypass capacitor C51 are connected in parallel with the second audio power amplifier U8 to filter out possible high-frequency noise and stabilize the working state of the audio power amplifier circuit; the first enabling resistor R4 is connected to the first audio power amplifier U6; the second enabling resistor R29 is connected to the second audio power amplifier U8; the chip internal circuit bypass capacitor C34 is connected in parallel with the first audio power amplifier U6, and the chip internal circuit bypass capacitor C54 is connected in parallel with the second audio power amplifier U8, which are used to provide local power supply bypass and optimize the performance of the audio power amplifier; the power amplifier speaker output socket SW1 is connected to the output end of the first audio power amplifier U6, and the power amplifier speaker output socket SW2 is connected to the output end of the second audio power amplifier U8, which are used to transmit the amplified audio signal to the external speaker.

[0038] The control panel circuit includes a status indicator light connected in series with a resistor R36 and LED3, a power button SW3, a sound control + button SW4, and a sound control - button SW5; one end of the control panel circuit is connected to the main chip U5, and the other end is grounded; the status indicator light connected in series with the resistor R36 and LED3 is used to indicate the current working status of the wireless microphone, such as: power on, power off, low power, etc., to provide users with visual feedback on the device status. The user turns on or off the power of the wireless microphone and increases or decreases the output volume of the wireless microphone by operating the power button SW3, the sound control + button SW4, and the sound control - button SW5.

[0039] The control panel circuit includes a status indicator light connected in series with a resistor R36 and an LED3, a power button SW3, a sound control + button SW4 and a sound control - button SW5; one end of the control panel circuit is connected to the main chip U5, and the other end is grounded.

[0040] The ARM network module is connected to the RJ45 network port, and several classroom cabinet devices are interconnected through a local area network or the Internet.

[0041] What is described above is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes within the technical scope disclosed by the present invention according to the technical scheme and the utility model concept of the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A wireless microphone circuit for a teaching broadcasting system, characterized in that: The invention comprises a main circuit, a boost circuit, an operational amplifier circuit, an audio power amplifier circuit and a control panel circuit, wherein the main circuit comprises a main chip U5, whose model is CX6821; the main chip U5 is connected to the antenna ANT1 through an antenna matching circuit composed of a capacitor C21 and a capacitor C29, a capacitor C25 and a capacitor C46; the internal circuit of the main chip U5 is provided with a plurality of bypass capacitors C44, a bypass capacitor C2, a bypass capacitor C6, a bypass capacitor C43 and a bypass capacitor C45, one end of the plurality of bypass capacitors is connected in series with the main chip U5, and the other end thereof is grounded The main chip U5 is provided with a first energy storage circuit and a second energy storage circuit. The first energy storage circuit is provided with a DC1.8V energy storage inductor L3 and a capacitor C5, and the second energy storage circuit is provided with a DC1.2V energy storage inductor L4 and a capacitor C38. The main chip U5 is respectively connected in parallel with the energy storage inductor L3 and the energy storage inductor L4, and then respectively connected in series with the capacitor C5 and the capacitor C38 and then grounded. One end of the main chip U5 is provided with a clock crystal oscillator Y2 in parallel. The main circuit is respectively connected with the boost circuit, the operational amplifier circuit, the audio power amplifier circuit and the control panel circuit.

2. The wireless microphone circuit of a teaching broadcasting system according to claim 1, characterized in that: The boost circuit includes a boost chip U9, a lithium battery BAT1 with an input of +3.7V, an input filter capacitor C58 and an input filter capacitor C59, a pull-up resistor R34, a boost energy storage oscillation inductor L1, a rectifier diode D1, a voltage divider feedback resistor R35 and a voltage divider feedback resistor R39, an output filter capacitor C56, an output filter capacitor C57 and an output filter capacitor C55; the input filter capacitor C58 and the input filter capacitor C59 are connected in parallel to the input end of the boost chip U9; the pull-up resistor R34 is connected to the input end of the boost chip U9; the pull-up resistor R35 is connected to the input end of the boost chip U9; the pull-up resistor R34 ... 4, connected to the enable terminal EN of the boost chip U9; the boost energy storage oscillation inductor L1 is connected to the boost control terminal of the boost chip U9; the rectifier diode D1 is connected in series with the boost energy storage oscillation inductor L1; the voltage divider feedback resistor R35 and the voltage divider feedback resistor R39 are connected in series to the feedback terminal of the boost chip U9; the output filter capacitor C56, the output filter capacitor C57 and the output filter capacitor C55 are respectively connected in parallel with the output terminal of the boost chip U9; the model of the boost chip U9 is SX1308.

3. The wireless microphone circuit of a teaching broadcasting system according to claim 1, characterized in that: The operational amplifier circuit includes a single-channel operational amplifier U3, whose positive input end is provided with an input feedback resistor R10, an input feedback resistor R11 and an input feedback capacitor C11, an input feedback capacitor C15 and an input feedback capacitor C20; its reverse input end is connected to the collection microphone JP13 through a capacitor C16 and a resistor R12 arranged in series; the output end of the single-channel operational amplifier U3 is connected to the main chip U5 through a resistor R6 and a capacitor C7 arranged in series; the single-channel operational amplifier U3 is provided with a resistor R13 and a capacitor C18, a capacitor C17 and a capacitor C12 in parallel, and a resistor R5 is arranged in series; the single-channel operational amplifier U3 is also provided with a power supply voltage regulator tube U1, and the input and output ends of the power supply voltage regulator tube U1 are provided with filter capacitors C8 and filter capacitors C10.

4. The wireless microphone circuit of a teaching broadcasting system according to claim 1, characterized in that: The audio power amplifier circuit includes a first audio power amplifier U6 and a second audio power amplifier U8; a potentiometer BP1 is provided at the output end of the main chip U5, and a DC-isolating coupling capacitor C9 and a DC-isolating coupling capacitor C53 are respectively connected in series at both ends of the output of the potentiometer BP1; the DC-isolating coupling capacitor C9 is connected to the first audio power amplifier U6 via a power amplifier input matching resistor R3 connected in series, and the DC-isolating coupling capacitor C53 is connected to the second audio power amplifier U8 via a power amplifier input matching resistor R28 connected in series.

5. The wireless microphone circuit of a teaching broadcasting system according to claim 4, characterized in that: The audio power amplifier circuit is also provided with a first spare input channel and a second spare input channel, a first filter bypass capacitor C1 and a first filter bypass capacitor C3, a second filter bypass capacitor C49 and a second filter bypass capacitor C51, a first enabling resistor R4, a second enabling resistor R29, a chip internal circuit bypass capacitor C34 and a chip internal circuit bypass capacitor C54, a power amplifier speaker output socket SW1 and a power amplifier speaker output socket SW2; the first spare input channel includes capacitor C4 and resistor R1, which are connected in series and connected to the input end of the first audio power amplifier U6; the second spare input channel includes capacitor C52 and resistor R27, which are connected in series and connected to the input end of the second audio power amplifier U8.

6. The wireless microphone circuit of a teaching broadcasting system according to claim 5, characterized in that: The first filter bypass capacitor C1 and the first filter bypass capacitor C3 are connected in parallel with the first audio power amplifier U6; The second filter bypass capacitor C49 and the second filter bypass capacitor C51 are connected in parallel with the second audio power amplifier U8; the first enabling resistor R4 is connected to the first audio power amplifier U6; the second enabling resistor R29 is connected to the second audio power amplifier U8; the chip internal circuit bypass capacitor C34 is connected in parallel with the first audio power amplifier U6, and the chip internal circuit bypass capacitor C54 is connected in parallel with the second audio power amplifier U8; the power amplifier speaker output socket SW1 is connected to the output end of the first audio power amplifier U6, and the power amplifier speaker output socket SW2 is connected to the output end of the second audio power amplifier U8.

7. The wireless microphone circuit of a teaching broadcasting system according to claim 1, characterized in that: The control panel circuit includes a status indicator light connected in series with a resistor R36 and an LED3, a power button SW3, a sound control + button SW4 and a sound control - button SW5; one end of the control panel circuit is connected to the main chip U5, and the other end is grounded.

8. The wireless microphone circuit of a teaching broadcasting system according to claim 6 or 7, characterized in that: The teaching broadcasting system includes several wireless microphones and classroom cabinet equipment. The classroom cabinet equipment is equipped with an ARM network module, a CX6821 genetic chip module and an RJ45 network port; the wireless microphone communicates with the CX6821 genetic chip module through 2.4G wireless transparent transmission, and the CX6821 genetic chip module adopts DSPPA wireless audio transparent transmission communication protocol combined with the ARM network module to connect with multiple classroom cabinet equipment, thereby completing the interconnection of wireless microphones between multiple classrooms; several wireless microphones and classroom cabinet equipment input and output audio with each other and the audio delay is less than 10ms.