Pixel circuit, chip, display panel and electronic equipment

Abstract

The utility model discloses a pixel circuit, a chip, a display panel and electronic equipment. The display process of the pixel circuit comprises a normal frame and at least one skip frame behind the normal frame, and the pixel circuit comprises a light emitting diode; the driving circuit comprises a driving transistor and is used for providing driving current for the light-emitting diode in a light-emitting stage of a normal frame and a light-emitting stage of a skip frame; the input circuit writes data voltage to the control end of the driving transistor in the non-light-emitting stage of the normal frame, the driving current is controlled by the data voltage, and in the non-light-emitting stage of the skip frame, the input circuit provides reference voltage to the first end of the driving transistor and provides first voltage to the second end of the driving transistor, and the first voltage is larger than the reference voltage. Through voltage clamping of the first end and the second end of the driving transistor in the non-light-emitting stage of frame skipping, threshold voltage offset caused by long-time same negative voltage offset of the driving transistor in the frame skipping stage is avoided, and the display effect is improved.

Description

Technical Field

[0001] This utility model relates to the field of display technology, and in particular to a pixel circuit, chip, display panel and electronic device. Background Technology

[0002] With the rapid development of display technology, AMOLED (Active Matrix Organic Light Emitting Diode) displays have been widely used in mobile devices such as smartphones and tablets, as well as large-size display devices such as televisions, due to their advantages such as high contrast, low power consumption, and high resolution. In AMOLED displays, thin-film transistors (TFTs) are key driving components in the pixel circuit, and their performance stability has a direct impact on the display effect.

[0003] The threshold voltage (Vth) of a TFT refers to the critical voltage at which a TFT transitions from the off state to the on state. It directly affects the switching characteristics and current driving capability of the TFT, thus influencing the response speed (i.e., refresh rate) and display effect of the display device. In existing technologies, compensation is performed on the threshold voltage Vth of the driving transistor to avoid uneven brightness and phenomena such as mura caused by differences in the distribution of threshold voltage Vth across TFTs on a large-area glass substrate.

[0004] However, in some cases, especially when in the skip frame drive mode, the Vth of the driving transistor may shift due to the long-term negative bias drive, causing the brightness of the display device to change during the skip frame display phase, which greatly affects the user experience.

[0005] Therefore, a new pixel circuit needs to be proposed to solve the above problems. Utility Model Content

[0006] In view of the above problems, the purpose of this utility model is to provide a pixel circuit, chip, display panel and electronic device that can improve the phenomenon of threshold voltage offset of driving transistor during frame skipping.

[0007] According to one aspect of the present invention, a pixel circuit is provided. The display process of the pixel circuit includes a normal frame and at least one skipped frame following the normal frame. The pixel circuit includes: a light-emitting diode (LED); a driving circuit including a driving transistor for providing a driving current to the LED during the light-emitting phase of the normal frame and the light-emitting phase of the skipped frame; and an input circuit for writing a data voltage to a control terminal of the driving transistor during the non-light-emitting phase of the normal frame, wherein the driving current is controlled by the data voltage, and for providing a reference voltage to a first terminal of the driving transistor and a first voltage to a second terminal of the driving transistor during the non-light-emitting phase of the skipped frame, wherein the first voltage is greater than the reference voltage.

[0008] Optionally, the input circuit includes: a digital-to-analog converter for obtaining the data voltage based on a data signal during the non-light-emitting phase of the normal frame, the data signal carrying image information; a voltage regulator for obtaining the reference voltage based on the data signal during the non-light-emitting phase of the skipped frame; and a first transistor, with a first terminal receiving the first voltage, a second terminal connected to the second terminal of the driving transistor, and a control terminal receiving a first scan signal, wherein the first scan signal is used to turn off the first transistor during the light-emitting phases of the normal frame and the skipped frame, and to turn on the first transistor during the non-light-emitting phase of the skipped frame.

[0009] Optionally, the driving circuit further includes: a second transistor, with its first terminal connected to the input circuit to receive the data voltage or the reference voltage, and its second terminal connected to the first terminal of the driving transistor; a control terminal receiving a second scan signal, the second scan signal being used to turn on the second transistor during the write and compensation sub-stages of the normal frame non-light-emitting stage and the non-light-emitting stage of the skipped frame; and a compensation module for compensating the threshold voltage of the driving transistor, the compensation module including: a capacitor connected between the supply voltage and the control terminal of the driving transistor; and a third transistor, with its first terminal connected to the second terminal of the driving transistor, the second terminal connected to the control terminal of the driving transistor, the control terminal receiving a third scan signal, the third scan signal being used to turn on the third transistor during the write and compensation sub-stages.

[0010] Optionally, the input circuit further includes: an output transistor, a first terminal receiving the data voltage or the reference voltage, a second terminal connected to the first terminal of the second transistor, and a control terminal receiving a selection scan signal. The selection scan signal is used to turn on the output transistor during the pre-write sub-stage of the normal frame non-light emission stage and the non-light emission stage of the skipped frame. The pre-write sub-stage is located before the write and compensation sub-stages.

[0011] Optionally, the driving circuit further includes: a reset module, configured to provide a second voltage to the control terminal of the driving transistor during a reset sub-stage in the non-light-emitting phase of the normal frame, and to provide a third voltage to the anode of the light-emitting diode during the reset sub-stage and the non-light-emitting phase of the skipped frame, wherein the reset sub-stage is located before the write and compensation sub-stages.

[0012] Optionally, the reset module includes: a fourth transistor, the first terminal of which receives the second voltage, and the second terminal of which is connected to the control terminal of the driving transistor, the control terminal receiving a fourth scan signal, the fourth scan signal being used to turn on the fourth transistor during the reset phase; and a fifth transistor, the first terminal of which receives the third voltage, the second terminal of which is connected to the anode of the light-emitting diode, the control terminal receiving a fifth scan signal, the fifth scan signal being used to turn on the fifth transistor during the reset phase and the non-light-emitting phase of the frame skipping, wherein the third transistor and the fourth transistor are oxide semiconductor transistors.

[0013] Optionally, the driving circuit further includes: a sixth transistor, the first terminal of which receives a supply voltage, the second terminal of which is connected to the first terminal of the driving transistor, and a control terminal of which receives a light emission control signal; and a seventh transistor, the first terminal of which is connected to the second terminal of the driving transistor, the second terminal of which is connected to the anode of the light-emitting diode, and a control terminal of which receives the light emission control signal, wherein the light emission control signal is used to turn on the sixth transistor and the seventh transistor during the light emission phase of the normal frame and the light emission phase of the skipped frame.

[0014] According to a second aspect of the present invention, a chip is provided, wherein the chip includes the pixel circuit described in any of the preceding claims.

[0015] According to a third aspect of the present invention, a display panel is provided, comprising the chip described above, wherein the display panel comprises an active matrix organic light-emitting diode display panel.

[0016] According to a fourth aspect of the present invention, an electronic device is provided, comprising a display panel as described above.

[0017] According to the pixel circuit, chip, display panel and electronic device provided by this utility model, the input circuit provides a reference voltage and a first voltage during the non-light-emitting phase of frame skipping to clamp the voltage of the first and second terminals of the driving transistor, so as to avoid the threshold voltage shift caused by the driving transistor being subjected to the same negative bias voltage for a long time during frame skipping, thereby improving the change in light emission brightness caused by the threshold voltage shift and improving the display effect. Attached Figure Description

[0018] The above and other objects, features and advantages of the present invention will become clearer from the following description of embodiments of the present invention with reference to the accompanying drawings, in which:

[0019] Figure 1 A schematic diagram of frame refresh driven by frame skipping is shown;

[0020] Figure 2 A schematic circuit diagram of the pixel circuit according to an embodiment of the present invention is shown;

[0021] Figure 3 This diagram shows the signal timing of the pixel circuit in a normal frame according to an embodiment of the present invention.

[0022] Figure 4A This diagram illustrates the operation of the pixel circuit in the reset stage according to an embodiment of the present invention.

[0023] Figure 4B This diagram illustrates the operation of the pixel circuit in the pre-writing sub-stage according to an embodiment of the present invention.

[0024] Figure 4C This diagram illustrates the operation of the pixel circuit in the writing and compensation sub-stages according to an embodiment of the present invention.

[0025] Figure 4D This diagram illustrates the operation of the pixel circuit in the normal frame emission stage according to an embodiment of the present invention.

[0026] Figure 5 This diagram shows the signal timing of the pixel circuit in a frame skipping scenario according to an embodiment of the present invention.

[0027] Figure 6A This diagram illustrates the operation of the pixel circuit during the frame skipping emission stage according to an embodiment of the present invention.

[0028] Figure 6B This diagram illustrates the operation of the pixel circuit in the non-light-emitting stage of a frame skipping embodiment of the present invention. Detailed Implementation

[0029] Various embodiments of the present invention will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements are indicated by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale.

[0030] Furthermore, certain terms are used in this specification and claims to refer to specific components. Those skilled in the art will understand that manufacturers may use different names to refer to the same component. This specification and claims do not distinguish components based on differences in name, but rather on differences in function.

[0031] It should be understood that, in the following description, "circuit" may include single or combined hardware circuits, programmable circuits, state machine circuits, and / or elements capable of storing instructions executed by the programmable circuit. When an element or circuit is said to be "connected" to another element or "connected" between two nodes, it may be directly coupled or connected to the other element, or there may be intermediate elements; the connection between elements may be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected" to another element, it means that there are no intermediate elements between them.

[0032] Furthermore, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0033] To help those skilled in the art better understand this utility model, the application scenarios of the embodiments of this utility model will be briefly introduced below.

[0034] To balance display quality and device performance, the display panel dynamically adjusts its refresh rate based on the content being displayed. For example, a high refresh rate is used when playing videos to improve the user experience; while the refresh rate is reduced when displaying static images or reading e-books to lower device power consumption.

[0035] Frame skipping is a commonly used display driving method to reduce refresh rate. When using frame skipping, the display process of the pixel circuit in the display panel includes active frames and skip frames located after at least one active frame, and both active frames and skip frames have light-emitting and non-light-emitting phases.

[0036] Figure 1 A schematic diagram of frame refresh driven by frame skipping is shown. (Reference) Figure 1 Taking a display panel with a supported refresh rate of F=60Hz as an example, that means 60 display frames are refreshed every second, and the time for each display frame is 1s / 60=16.67ms.

[0037] When the refresh rate is 60Hz, all 60 display frames are normal frames. During the non-light-emitting phase of each normal frame, a data voltage (Vdata) is written to the control terminal of the driving transistor in the pixel circuit; during the light-emitting phase of each normal frame, the pixel circuit controls the light-emitting diode to emit light according to the data voltage written to the control terminal of the driving transistor in that normal frame.

[0038] When using a frame-skipping scanning method, there are n skip frames after each normal frame (i.e., n skip frames between any two adjacent normal frames), where n ≥ 1 and is an integer. In a normal frame, data voltage is written normally and controls the light emission; during the non-light-emitting phase of a skip frame, data voltage is no longer written to the control terminal of the driving transistor in the pixel circuit; during the light-emitting phase of a skip frame, the pixel circuit controls the light-emitting diode to emit light based on the data voltage most recently written to the control terminal of the driving transistor. For example, for each skip frame between the first and second normal frames, during the light-emitting phase of that skip frame, the pixel circuit controls the light-emitting diode to emit light based on the data voltage written to the control terminal of the driving transistor in the first normal frame.

[0039] Taking a skip frame (n=1) between every two normal frames as an example, although the display panel still refreshes 60 times per second, data voltage is only written in the odd-numbered frames (i.e., normal frames) of 1 / 3 / 5 / 7…57 / 59, and not in the even-numbered frames (i.e., skip frames) of 2 / 4 / 6 / 8…58 / 60. Thus, the actual refresh rate of the display panel is reduced to F / (n+1) = 30Hz (taking F=60Hz as an example).

[0040] Since no data processing is required during frame skipping, power consumption is reduced. However, because no data voltage is written to the control terminal of the driving transistor during frame skipping, the driving transistor will be biased by the same negative bias voltage for a long time, causing Vth to shift. This, in turn, causes the brightness of the light-emitting diode to change during the frame skipping illumination phase, which greatly affects the display quality.

[0041] The pixel circuit provided by this invention is driven in a frame-skipping manner during at least a portion of its operation. That is, at least a portion of the display process of the pixel circuit provided by this invention includes a normal frame and at least one skipped frame following the normal frame. Specifically, the pixel circuit provided by this invention includes:

[0042] For AMOLED, the light-emitting diode is usually an organic light-emitting diode (OLED).

[0043] The driving circuit includes a driving transistor for providing driving current to the light-emitting diode during the light-emitting phase of a normal frame and the light-emitting phase of a skipped frame; and

[0044] The input circuit is used to write a data voltage to the control terminal of the driving transistor during the non-light-emitting phase of a normal frame, wherein the driving current is controlled by the data voltage, and to provide a reference voltage to the first terminal of the driving transistor and a first voltage to the second terminal of the driving transistor during the non-light-emitting phase of a skipped frame, wherein the first voltage is greater than the reference voltage.

[0045] According to the pixel circuit provided by this utility model, the input circuit provides a reference voltage and a first voltage during the non-light-emitting phase of frame skipping to clamp the voltage of the first and second terminals of the driving transistor. This prevents the threshold voltage of the driving transistor from shifting due to the long-term application of the same negative bias voltage during frame skipping, thereby improving the brightness change caused by the threshold voltage shift and enhancing the display effect.

[0046] Figure 2 A schematic circuit diagram of the pixel circuit according to an embodiment of the present invention is shown. The display process of the pixel circuit of the present invention includes a normal frame and at least one skipped frame after the normal frame.

[0047] It should be noted that, for each transistor in the pixel circuit of this embodiment, the conduction state of the transistor is controlled according to the control terminal voltage. In the conduction state, current flows from the first terminal to the second terminal of the transistor. For example, for an NMOS transistor, its first terminal is the drain, the second terminal is the source, and the control terminal is the gate. When the gate-source voltage Vgs is greater than the threshold voltage Vth, the NMOS transistor is turned on. Furthermore, in the pixel circuit of this embodiment, at least the driving transistor is a thin-film transistor formed using a thin-film process, and the source and drain can be interchanged according to the difference in potential between the first and second terminals.

[0048] refer to Figure 2 The pixel circuit 100 of this embodiment includes an input circuit 110, a driving circuit (including a driving transistor M8), and a light-emitting diode D1 (typically an organic light-emitting diode). An 8T1C circuit structure (i.e., 8 transistors and 1 capacitor) is used as an example structure for the driving circuit. However, it should be understood that the driving circuit in the pixel circuit of this invention can be any circuit structure in the prior art, such as a 7T1C, 2T1C, or 4T2C structure. Furthermore, for Figure 2 The driving circuit of the 8T1C shown includes the following non-light-emitting phases in normal frames: reset sub-phase, pre-write sub-phase, and write and compensation sub-phase.

[0049] Input circuit 110 is used to write a data voltage (Vdata) to the control terminal of driving transistor M8 during the non-light-emitting phase of a normal frame, and the driving current is controlled by the data voltage. Input circuit 110 is also used to provide a reference voltage Vref to the first terminal of driving transistor M8 and a first voltage Vint1 to the second terminal of driving transistor M8 during the non-light-emitting phase of a frame skip, where Vint1 is greater than Vref.

[0050] Specifically, refer to Figure 2 The input circuit 110 includes a digital-to-analog converter (DAC).

[0051] Analog Converter), regulator, first transistor M1, and output transistor M_Mux.

[0052] The digital-to-analog converter (DAC) is used to obtain the data voltage Vdata from the data signal Data during the non-light-emitting phase of a normal frame. The data signal Data carries image information.

[0053] The regulator is used to obtain a reference voltage Vref from the data signal Data during the non-light-emitting phase of frame skipping. In some embodiments, the regulator is a digital LDO (low dropout regulator) to convert the digital data signal Data into an analog reference voltage Vref.

[0054] The first terminal of the first transistor M1 receives a first voltage Vint1, and the second terminal is connected to the second terminal of the driving transistor M8. The control terminal receives a first scan signal S1. The first scan signal S1 is used to turn on the first transistor M1 during the non-light-emitting phase of frame skipping and to turn off the first transistor M1 during the light-emitting phases of normal frames and frame skipping.

[0055] The first terminal of the output transistor M_Mux receives the data voltage Vdata or the reference voltage Vref, and the control terminal receives the selection scan signal S_Mux. The selection scan signal S_Mux is used to turn on the output transistor M_Mux during the pre-write sub-stage and the non-light-emitting stage of frame skipping to transfer the data voltage Vdata or the reference voltage Vref to the second terminal of the output transistor M_Mux.

[0056] The driving circuit includes a second transistor M2, a compensation module 121, a reset module 122, a sixth transistor M6, a seventh transistor M7, and a driving transistor M8.

[0057] The driving transistor M8 is used to provide driving current to the light-emitting diode D1 during the light-emitting phase of the normal frame and the light-emitting phase of the skipped frame.

[0058] The first terminal of the second transistor M2 is connected to the input circuit 110 to receive the data voltage Vdata or the reference voltage Vref, and the second terminal is connected to the first terminal of the driving transistor. The control terminal receives the second scan signal S2. The second scan signal S2 is used to turn on the second transistor M2 during the writing and compensation sub-stages and the non-light-emitting stage of frame skipping.

[0059] Compensation module 121 is used to compensate the threshold voltage Vth of driving transistor M8. Specifically, compensation module 121 includes capacitor C1 and a third transistor M3. Capacitor C1 is connected between the supply voltage ELVDD and the control terminal of driving transistor M8. The first terminal of the third transistor M3 is connected to the second terminal of driving transistor M8, and the second terminal is connected to the control terminal of driving transistor M8, which receives a third scan signal S3. The third scan signal S3 is used to turn on the third transistor M3 during the write and compensation sub-stages.

[0060] The reset module 122 is used to provide a second voltage Vint2 to the control terminal of the driving transistor M8 during the reset phase and a third voltage Vint3 to the anode of the light-emitting diode D1 during the reset phase and the non-light-emitting phase of the frame skipping.

[0061] refer to Figure 2 The reset module 122 includes a fourth transistor M4 and a fifth transistor M5. The first terminal of the fourth transistor M4 receives a second voltage Vint2, and the second terminal is connected to the control terminal of the driving transistor M8, which receives a fourth scan signal S4. The fourth scan signal S4 is used to turn on the fourth transistor M4 during the reset phase. The first terminal of the fifth transistor M5 receives a third voltage Vint3, and the second terminal is connected to the anode of the light-emitting diode D1, while its control terminal receives the fifth scan signal S5. The fifth scan signal S5 is used to turn on the fifth transistor M5 during the reset phase. Furthermore, in some embodiments, the fifth scan signal S5 is also used to turn on the fifth transistor M5 during the non-light-emitting phase of frame skipping.

[0062] The first terminal of the sixth transistor M6 receives the supply voltage ELVDD, and the second terminal is connected to the first terminal of the driving transistor M8. The first terminal of the seventh transistor M7 is connected to the second terminal of the driving transistor M8, and the second terminal is connected to the anode of the light-emitting diode D1. The control terminals of the sixth transistor M6 and the seventh transistor M7 receive the light-emitting control signal EM. The light-emitting control signal EM is used to turn on the sixth transistor M6 and the seventh transistor M7 during the light-emitting phase of a normal frame and the light-emitting phase of a skipped frame.

[0063] Figure 3 This diagram shows the signal timing of the pixel circuit in a normal frame according to an embodiment of the present invention. Figure 4A This diagram illustrates the operation of the pixel circuit in the reset stage according to an embodiment of the present invention. Figure 4BThis diagram illustrates the operation of the pixel circuit in the pre-writing sub-stage according to an embodiment of the present invention. Figure 4C This diagram illustrates the operation of the pixel circuit in the writing and compensation sub-stages according to an embodiment of the present invention. Figure 4D This diagram illustrates the operation of the pixel circuit in the normal frame emission stage according to an embodiment of the present invention. The following is a related description... Figure 3 as well as Figures 4A to 4D The working process of the pixel circuit 100 of this utility model in a normal frame is further explained.

[0064] exist Figure 3 The example shown contains only one normal frame, and for ease of explanation, only one non-emitting phase and one emitting phase of the normal frame are described in detail. It should be understood that a normal frame may include multiple non-emitting phases and multiple emitting phases.

[0065] Furthermore, taking the third transistor M3, the fourth transistor M4, and the output transistor M_Mux as NMOS transistors, and the remaining transistors as PMOIS transistors as an example (the same frame skipping, which will not be explained below).

[0066] refer to Figure 3 In a normal frame, the first scan signal S1 remains high (VGH), keeping the first transistor M1 off. Further, the normal frame includes a non-light-emitting phase (sequentially including a reset sub-phase T1, a pre-write sub-phase T2, and a write and compensation sub-phase T3) and a light-emitting phase T4. In the non-light-emitting phase, the light-emitting control signal EM is high to turn off the sixth transistor M6 and the seventh transistor M7; in the light-emitting phase, the light-emitting control signal EM is low to turn on the sixth transistor M6 and the seventh transistor M7.

[0067] In the reset sub-stage T1, combined with Figure 4A The fourth scan signal S4 and the fifth scan signal S5 control the fourth transistor M4 and the fifth transistor M5 to conduct. The second voltage Vint2 is transmitted through the fourth transistor M4 to node N2 (i.e., the control terminal of the driving transistor M8) to reset capacitor C1, ensuring that the data voltage Vdata can be written normally to node N2 in subsequent stages. The third voltage Vint3 is transmitted through the fifth transistor M5 to node N3 to reset the anode of LED D1. At this time, the voltages of each node are shown in Table 1 below:

[0068] node Voltage N2 Vint2 N3 Vint3

[0069] Table 1

[0070] Resetting the N2 node voltage ensures that the gate-source voltage VGS of the driving transistor M8 in all pixel circuits is Vint2-ELVDD. This means that the driving transistor M8 in all pixel circuits is under the same bias voltage, which can improve short-term image retention caused by the hysteresis effect of thin-film transistors (TFTs).

[0071] Furthermore, in some embodiments, the digital-to-analog converter (DAC) only begins to operate after the reset sub-stage is completed. However, it should be understood that the present invention should not be limited thereto; for example, in some other embodiments, the DAC begins to operate when the pixel circuit is working in a normal frame.

[0072] In the pre-write sub-stage T2, combined with Figure 4B The scan signal S_Mux is selected to turn on the output transistor M_Mux, while the other transistors are turned off. The data voltage Vdata output by the digital-to-analog converter (DAC) is pre-written and stored in the parasitic capacitance of the data lines. The voltages at each node at this time are shown in Table 2 below:

[0073] node Voltage N2 Vint2 N5 Vdata

[0074] Table 2

[0075] In the write and compensation sub-stage T3, combined with Figure 4C The second scan signal S2 controls the second transistor M2 to turn on, and the third scan signal S3 controls the third transistor M3 to turn on. Simultaneously, the driving transistor M8 is turned on, and the remaining transistors are turned off. The data voltage Vdata charges node N2 through the second transistor M2, the driving transistor M8, and the third transistor M3. Until the node voltage N2 is charged to Vdata + Vth (Vth is the threshold voltage of the driving transistor M8), the driving transistor M8 turns off, stopping the charging of capacitor C1, thus completing the writing of the data voltage Vdata and the compensation of the threshold voltage of the driving transistor M8. At this point, the voltages of each node are shown in Table 3 below:

[0076] node Voltage N2 Vdata+Vth

[0077] Table 3

[0078] During the light-emitting stage T4, the sixth transistor M6, the seventh transistor M7, and the driving transistor M8 are turned on, providing driving current to D1 to complete the light emission. At this time, the voltages of each node are shown in Table 4 below:

[0079] node Voltage N1 ELVDD N2 Vdata+Vth

[0080] Table 4

[0081] Based on the formula for the saturation current of a MOSFET, we can obtain the following formula (1):

[0082] I∝ (Vgs-Vth) 2 (1)

[0083] Where I is the driving current, Vth is the threshold voltage of the driving transistor M8, and Vgs is the gate-source voltage of the driving transistor M8, i.e., the voltage difference between node N2 and the supply voltage ELVDD. Therefore, the following equation (2) can be obtained:

[0084] I∝ (Vdata+Vth-ELVDD-Vth) 2 (2)

[0085] Where I is the driving current and Vth is the threshold voltage of the driving transistor M8.

[0086] Furthermore, the current formula (3) for the saturation region of the driving transistor M6 can be obtained:

[0087] I=WC ox μ / 2L×[Vdata-ELVDD] 2 (3)

[0088] Where μ is the carrier mobility, W is the channel width of the driving transistor M8, L is the channel length of the driving transistor M8, and C... OX The capacitor at the control terminal of the transistor M8 is the capacitor per unit area. Vdata is the data voltage mentioned above, ELVDD is the supply voltage mentioned above, W and L are fixed during the design, and C... OX It depends on the thickness and material of the insulation layer at the control end.

[0089] Therefore, Vth is canceled out, and the driving current I of the LED is unrelated to Vth, thus eliminating the uneven brightness and Mura phenomenon caused by the inconsistency of Vth.

[0090] Furthermore, in some embodiments, oxide-metal-oxide-semiconductor field-effect transistors (Oxide-MOSFETs) can be selected for the third transistor M3 and the fourth transistor M4, thereby enabling the two transistors to have ultra-low leakage current, so that the N2 node voltage can be stably maintained, avoiding unstable light emission due to leakage current in the subsequent holding stage, and making it more conducive to meeting the application requirements of low refresh rates such as 1Hz or 0.1Hz.

[0091] Figure 5 This diagram shows the signal timing of the pixel circuit in a frame skipping scenario according to an embodiment of the present invention. Figure 6A This diagram illustrates the operation of the pixel circuit during the frame skipping emission stage according to an embodiment of the present invention. Figure 6B This diagram illustrates the operation of the pixel circuit in the non-light-emitting stage of a frame skipping embodiment of the present invention. The following is in conjunction with... Figure 5 , Figure 6A as well as Figure 6B The working process of the pixel circuit 100 of this utility model in frame skipping is further explained.

[0092] refer to Figure 5 During frame skipping, the regulator operates to provide the reference voltage Vref. Correspondingly, the select scan signal S_Mux remains low VGL, keeping the output transistor M_Mux on, thus ensuring the input circuit continues to provide the reference voltage Vref.

[0093] Furthermore, each frame skip includes at least one non-luminescent phase T5 and at least one luminescent phase. Figure 5 In the example, each frame skipping includes two non-luminous phases T5 and two luminous phases, where, in Figure 5 In the two skip frames shown, the light-emitting stages are T6a, T6b, T6a', and T6b', respectively, with T6b' not fully shown. During the non-light-emitting stage, the light-emitting control signal EM is high to turn off the sixth transistor M6 and the seventh transistor M7; during the light-emitting stage, the light-emitting control signal EM is low to turn on the sixth transistor M6 and the seventh transistor M7. Furthermore, during the skip frames, the third scan signal S3 remains low, and the fourth scan signal S4 remains high, keeping the third transistor M3 and the fourth transistor M4 off.

[0094] During frame skipping, the N2 node voltage is maintained at the voltage Vdata + Vth written in the most recent normal frame. In each emission stage, combined with... Figure 6A The driving transistors M8, M6, and M7 are turned on, providing the corresponding driving current to the light-emitting diode D1 according to the N2 node voltage.

[0095] Furthermore, since node N2 remains unchanged, during the light-emitting stage, the gate-source voltage Vgs of the driving transistor M8 is the voltage difference between node N2 and node N1, that is, Vgs is Vdata+Vth-ELVDD.

[0096] During the non-light-emitting phase T5, since the anode of the light-emitting diode D1 is at a floating voltage, in some embodiments, the fifth scan signal S5 controls the fifth transistor M6 to conduct, causing the third voltage Vint3 to be transmitted to node N3 through the fifth transistor to reset the anode of the light-emitting diode. This ensures that the black state display is normal during the non-light-emitting phase T5.

[0097] Furthermore, combined Figure 6B The first scan signal S1 controls the first transistor M1 to turn on, and the second scan signal S2 controls the second transistor M2 to turn on. The reference voltage Vref is transmitted to node N1 through the second transistor M2, and the first voltage Vint1 is transmitted to node N4 through the first transistor M1. At this time, the voltages of each node are shown in Table 5 below:

[0098] node Voltage N1 Vref N2 Vdata+Vth N3 Vint3 N4 Vint1 N5 Vref

[0099] Table 5

[0100] By adjusting Vref < Vint1, even if the voltage at node N1 is lower than the voltage at node N4, the source and drain of the driving transistor M8 are interchanged. At this time, the gate-source voltage Vgs of the driving transistor M8 is the voltage difference between nodes N2 and N4, i.e., Vdata + Vth - Vint1.

[0101] During the non-light-emitting phase of frame skipping, the first and second terminal voltages of the driving transistor M8 are clamped by Vref and Vint1, so that the source and drain of the driving transistor M8 are interchanged during the light-emitting and non-light-emitting phases of frame skipping. This avoids the Vth offset caused by the driving transistor M8 being subjected to the same bias voltage for a long time, thereby improving the change in light emission brightness caused by the Vth offset and enhancing the display effect.

[0102] Furthermore, in a preferred embodiment, the pulse frequencies of the first scan signal S1 and the second scan signal S2 during the non-light-emitting phase of frame skipping can be adjusted, for example, to ensure that the first transistor M1 and the second transistor M2 are turned off at least once (in...). Figure 5 Taking an example where both the first scan signal S1 and the second scan signal S2 are turned off once, the clamping effect on the first and second terminal voltages of the driving transistor M8 can be further improved by repeatedly turning on the first transistor M1 and the second transistor M2 during the non-light-emitting phase of frame skipping. Correspondingly, it should be understood that the on / off state of the fifth transistor M5 should be consistent with the on / off state of the first transistor M1 and the second transistor M2. That is, as... Figure 5 As shown, the first scan signal S1, the second scan signal S2, and the fifth scan signal S5 are kept consistent.

[0103] Furthermore, when using a frame-skipping driving method, as the refresh rate decreases, the number of skipped frames increases, making it more difficult to maintain the voltage of the N2 node, which may cause the human eye to perceive a gradual decrease in brightness. In some embodiments, the duration of each light emission stage in each skipped frame can be adjusted according to the change in light emission brightness, thereby maintaining the consistency of each frame at a low refresh rate.

[0104] Specifically, refer to Figure 5 Taking adjacent skip frames n and n+1 as examples, and exemplarily, the emission phase of skip frame n includes T6a and T6b; the emission phase of skip frame n+1 remains T6a' and T6b'.

[0105] In the first skip frame n, the durations of the two illumination stages can be set independently: T6a's duration is 'a', T6b's duration is 'b', T6a''s duration is 'a'', and T6b''s duration is 'b''. For the second skip frame n+1, the duration can be adjusted based on the duration of the corresponding first illumination stage. For example, the illumination duration of the first illumination stage T6a' in the second skip frame can be adjusted based on the illumination duration of the first illumination stage T6a in the first skip frame. In some embodiments, the display duration of a single display line on the display panel can be used as the adjustment unit, for example, a' = a ± x1 × hysnc. Similarly, b' = b ± x2 × hysnc. Here, x1 and x2 are positive integers, and hysnc is the display duration of a single display line.

[0106] Adjusting the duration of each light-emitting stage in frame skipping can maintain the consistency of each frame at low refresh rates, which helps improve the display effect.

[0107] In one embodiment of this utility model, a chip is also provided, such as a display driver chip including the above-described pixel circuit, which can also achieve any of the above-described beneficial effects, and will not be described in detail here.

[0108] In one embodiment of this utility model, a display panel is also provided, such as an AMOLED display panel. This display panel includes the aforementioned chip, and therefore also includes the pixel circuit provided by this utility model, and thus also has any of the effective effects of the aforementioned pixel circuit, which will not be elaborated further here.

[0109] Furthermore, this utility model also provides an electronic device, which can be a mobile electronic device such as a mobile phone or tablet computer, or a large display device such as a television. The electronic device includes the display panel as described above, which also includes the pixel circuit provided by this utility model, and thus can achieve any of the above-mentioned beneficial effects, which will not be elaborated here.

[0110] The embodiments of this utility model described above are examples of specific examples, and do not exhaustively describe all details, nor do they limit the utility model to specific embodiments. Obviously, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of this utility model, thereby enabling those skilled in the art to make good use of this utility model and its modifications. The scope of protection of this utility model should be determined by the scope defined in the claims of this utility model.

Claims

1. A pixel circuit, the display process of the pixel circuit including a normal frame and at least one skipped frame located after the normal frame, characterized in that, The pixel circuit includes: Light-emitting diode; A driving circuit, including a driving transistor, is configured to provide driving current to the light-emitting diode during the light-emitting phase of the normal frame and the light-emitting phase of the skipped frame; and An input circuit is configured to write a data voltage to the control terminal of the driving transistor during the non-light-emitting phase of the normal frame, wherein the driving current is controlled by the data voltage. For use in the non-light-emitting phase of the frame skipping, to provide a reference voltage to the first terminal of the driving transistor and to provide a first voltage to the second terminal of the driving transistor, the first voltage being greater than the reference voltage.

2. The pixel circuit according to claim 1, characterized in that, The input circuit includes: A digital-to-analog converter is used to obtain the data voltage based on a data signal during the non-light-emitting phase of the normal frame, the data signal carrying image information; A voltage regulator is used to obtain the reference voltage based on the data signal during the non-light-emitting phase of the frame skipping; and The first transistor has a first terminal that receives the first voltage, a second terminal that is connected to the second terminal of the driving transistor, and a control terminal that receives the first scan signal. The first scanning signal is used to turn off the first transistor during the light-emitting phase of the normal frame and the skipped frame, and to turn on the first transistor during the non-light-emitting phase of the skipped frame.

3. The pixel circuit according to claim 2, characterized in that, The driving circuit also includes: The second transistor has a first terminal connected to the input circuit to receive the data voltage or the reference voltage, and a second terminal connected to the first terminal of the driving transistor. Its control terminal receives a second scan signal, which is used to turn on the second transistor during the write and compensation sub-stages of the normal frame non-light-emitting phase and during the non-light-emitting phase of the skipped frame. A compensation module is used to compensate the threshold voltage of the driving transistor, the compensation module comprising: A capacitor is connected between the supply voltage and the control terminal of the driving transistor; and The third transistor has a first terminal connected to the second terminal of the driving transistor, and the second terminal connected to the control terminal of the driving transistor. The control terminal receives a third scan signal, which is used to turn on the third transistor during the write and compensation sub-stages.

4. The pixel circuit according to claim 3, characterized in that, The input circuit also includes: The output transistor has a first terminal that receives the data voltage or the reference voltage, a second terminal that is connected to the first terminal of the second transistor, and a control terminal that receives a selection scan signal. The selected scan signal is used to turn on the output transistor during the pre-write sub-stage of the normal frame non-light-emitting phase and during the non-light-emitting phase of the skipped frame, wherein the pre-write sub-stage is located before the write and compensation sub-stages.

5. The pixel circuit according to claim 4, characterized in that, The driving circuit also includes: A reset module is configured to provide a second voltage to the control terminal of the driving transistor during a reset sub-phase of the normal frame's non-light-emitting phase, and to provide a third voltage to the anode of the light-emitting diode during both the reset sub-phase and the non-light-emitting phase of the skipped frame. The reset sub-stage precedes the write and compensation sub-stages.

6. The pixel circuit according to claim 5, characterized in that, The reset module includes: A fourth transistor has a first terminal receiving the second voltage and a second terminal connected to the control terminal of the driving transistor. The control terminal receives a fourth scan signal, which is used to turn on the fourth transistor during the reset phase. The fifth transistor has a first terminal receiving the third voltage, a second terminal connected to the anode of the light-emitting diode, and a control terminal receiving a fifth scan signal. This fifth scan signal is used to turn on the fifth transistor during the reset phase and the non-light-emitting phase of the frame skipping. The third transistor and the fourth transistor are oxide semiconductor transistors.

7. The pixel circuit according to claim 1, characterized in that, The driving circuit also includes: The sixth transistor has a first terminal that receives the supply voltage, a second terminal that is connected to the first terminal of the driving transistor, and a control terminal that receives the light emission control signal; and The seventh transistor has its first terminal connected to the second terminal of the driving transistor, and its second terminal connected to the anode of the light-emitting diode. Its control terminal receives the light-emitting control signal. The light emission control signal is used to turn on the sixth transistor and the seventh transistor during the light emission phase of the normal frame and the light emission phase of the skipped frame.

8. A chip, characterized in that, Includes the pixel circuit as described in any one of claims 1-7.

9. A display panel, characterized in that, Including the chip as described in claim 8, the display panel includes an active-matrix organic light-emitting diode display panel.

10. An electronic device, characterized in that, Includes the display panel as described in claim 9.

Images