A robust high resolution beamforming device with narrow mainlobe and low sidelobe effect

By using the Jetson Xavier NX development board kit and CPU/GPU co-working architecture, sonar signal processing was optimized, solving the manifold error and signal instability problems of traditional beamforming devices in underwater applications. High-resolution beamforming with narrow main lobe and low sidelobe was achieved, improving the detection capability and computing performance of sonar.

CN224328235UActive Publication Date: 2026-06-05HARBIN ENG UNIV

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
HARBIN ENG UNIV
Filing Date
2025-04-15
Publication Date
2026-06-05

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Abstract

The utility model discloses a kind of narrow main lobe and low side lobe effect's robust high-resolution beamforming device, including host computer rack, the top of host computer rack is fixedly installed with host computer body, the side of host computer body is equipped with processing equipment, the top of mounting plate is fixedly installed with Jetson Xavier NX development board kit, a kind of narrow main lobe and low side lobe effect's robust high-resolution beamforming device of the utility model, by setting Jetson Xavier NX development board kit, to improve active acoustic imaging resolution capability, on the basis of establishing active detection space-time two-dimensional convolution model, joint azimuth and space two-dimensional deconvolution processing means, realize in angle and time two dimensions on the resolution capability and interference suppression capability of active detection sonar to target are improved;By setting host computer body and processing equipment, array detection software system platform based on CPU and GPU collaborative architecture is constructed, to meet the demand of high-performance computing of complex algorithm for high-resolution imaging sonar beamforming.
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Description

Technical Field

[0001] This utility model relates to the field of beamforming device technology, specifically to a robust high-resolution beamforming device with narrow main lobe and low side lobe effect. Background Technology

[0002] High-resolution beamforming technology is an important means to improve the target detection performance of sonar. Deconvolution beamforming is a new high-resolution algorithm. However, due to the randomness of the marine environment, the underwater acoustic channel is unstable in the frequency, time, and spatial domains, and the propagation environment is complex and variable. For near-field two-dimensional acoustic map measurements, the point spread function of the array is shift-variable, that is, the array output pointing to a certain angle is related to the distance between the scanning point and the sound source. Therefore, the above-mentioned algorithms based on Fourier transform and RL deconvolution algorithms cannot be applied. In addition, deconvolution is approximately shift-invariant in certain specific regions, so the results obtained have certain errors with the actual sound source distribution. Therefore, studying deconvolution measurement methods with shift-variable models can effectively improve and enhance the system model and algorithm performance. On the other hand, beamforming is the core part of signal processing in modern sonar systems and has an important impact on sonar performance. It is characterized by high data volume and large computational load, accounting for more than 2 / 3 of the total computational load of the system. The special nature of sonar not only requires signal processing to achieve a certain degree of accuracy, but also has strict requirements for real-time performance.

[0003] In the field of heterogeneous parallel computing, the parallel programming model for large-scale CPU+GPU heterogeneous high-performance computing systems is a hybrid model with superior performance. The efficiency of data parallelization and computation after combining the processing characteristics of different chips is significantly improved, which meets the needs of underwater arrays for real-time detection, processing and display of targets. At present, in the field of underwater array detection, there is little attention paid to heterogeneous parallel computing of high-resolution beamforming algorithms for imaging sonar by combining CPU and GPU to form a collaborative architecture.

[0004] However, traditional beamforming devices have the following drawbacks:

[0005] Traditional beamforming imaging sonar arrays suffer from large manifold errors and signal instability, resulting in traditional high-resolution array signal processing methods not performing well in practical underwater applications. Utility Model Content

[0006] The purpose of this invention is to provide a robust high-resolution beamforming device with narrow main lobe and low side lobe effect, in order to solve the problem mentioned in the background art that the traditional beamforming device imaging sonar array has large manifold error and signal instability, which leads to the unsatisfactory effect of traditional high-resolution array signal processing methods in actual underwater applications.

[0007] To achieve the above objectives, this utility model provides the following technical solution: a robust high-resolution beamforming device with narrow main lobe and low sidelobe effect, comprising a main frame, a main body fixedly mounted on the top of the main frame, a processing device on one side of the main body, a mounting plate on one side of the processing device, a Jetson Xavier NX development board kit fixedly mounted on the top of the mounting plate, a height bracket on one side of the mounting plate, a transmitter fixedly mounted on the top of the height bracket, a first access head fixedly mounted on one side of the processing device, a first output head fixedly mounted on the other side of the processing device, a second access head fixedly mounted on one side of the Jetson Xavier NX development board kit, and a second output head fixedly mounted on the other side of the Jetson Xavier NX development board kit.

[0008] Preferably, a first connector is fixedly installed on one side of the host body, a first connecting wire is fixedly connected to one side of the first connector, one end of the first connecting wire is fixedly connected to one end of the first input head, a second connecting wire is fixedly connected to one end of the first output head, one end of the second connecting wire is fixedly connected to one end of the second input head, the host body is connected to the processing device through the first connecting wire, and the processing device is connected to the Jetson Xavier NX development board kit through the second connecting wire.

[0009] Preferably, a second connector is fixedly installed on one side of the transmitter, and a third connecting wire is fixedly connected to one end of the second output head. One end of the third connecting wire is fixedly connected to one end of the second connector, and the Jetson Xavier NX development board kit is connected to the transmitter through the third connecting wire.

[0010] Preferably, the Jetson Xavier NX development board kit includes a motherboard, a deconvolution beamforming model building unit, a beamforming design unit, and a heterogeneous parallel computing design unit. The bottom ends of the deconvolution beamforming model building unit, the beamforming design unit, and the heterogeneous parallel computing design unit are all fixedly connected to the top end of the motherboard. The deconvolution beamforming model building unit analyzes the convolution and deconvolution problems in the time-domain system, performs spatiotemporal analogies, clarifies the deconvolution beamforming problem in array processing, classifies convolution models according to array directivity functions, derives beamforming convolution models for various commonly used array forms, and establishes corresponding array shift convolution theoretical models. The beamforming design unit analyzes existing deconvolution beamforming methods, implements the RL deconvolution algorithm through a pre-stored beamform (PSF) dictionary, improves the RL deconvolution algorithm, conducts performance analysis and comparative studies. The heterogeneous parallel computing design unit decomposes the algorithm software system, constructs an array detection software system based on a CPU and GPU collaborative architecture, improves the parallel programming logic, and integrates various software modules for system integration testing.

[0011] Preferably, the bottom of the motherboard is fixedly connected to the mounting plate, and the Jetson Xavier NX development board kit is mounted on the mounting plate via the motherboard.

[0012] Compared with the prior art, the beneficial effects of this utility model are:

[0013] 1. By setting up the Jetson Xavier NX development board kit, in order to improve the resolution capability of active acoustic imaging, based on the establishment of an active detection spatial-temporal two-dimensional convolution model, combined with azimuth and spatial two-dimensional deconvolution processing methods, the resolution capability and interference suppression capability of active detection sonar for targets are improved in both angular and temporal dimensions.

[0014] 2. By setting up the host computer and processing equipment, an array detection software system platform based on CPU and GPU collaborative architecture is constructed. The various software modules are integrated to form a complete array detection software system. The original CPU+GPU heterogeneous parallel computing system is optimized in terms of task division and data transmission to meet the high-performance computing requirements of complex algorithms for high-resolution imaging sonar beamforming. Attached Figure Description

[0015] Figure 1 This is a side view of the present invention;

[0016] Figure 2 This is a connection diagram of the Jetson Xavier NX development board kit and mounting board of this utility model;

[0017] Figure 3This is a schematic diagram of the architecture of the Jetson Xavier NX development board kit of this utility model.

[0018] In the diagram: 1. Main unit; 2. Main unit frame; 3. First connector; 4. First connecting wire; 5. First access head; 6. Processing device; 7. First output head; 8. Second connecting wire; 9. Second access head; 10. Jetson Xavier NX development board kit; 101. Deconvolution beam model building unit; 102. Beamforming design unit; 103. Heterogeneous parallel computing design unit; 104. Main board; 11. Mounting board; 12. Second output head; 13. Third connecting wire; 14. Second connector; 15. Transmitter; 16. Height frame. Detailed Implementation

[0019] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention.

[0020] Please see Figure 1-3 This invention provides a robust high-resolution beamforming device with narrow main lobe and low sidelobe effect, including a main frame 2, a main body 1 fixedly mounted on the top of the main frame 2, a processing device 6 on one side of the main body 1, a mounting plate 11 on one side of the processing device 6, a Jetson Xavier NX development board kit 10 fixedly mounted on the top of the mounting plate 11, a height bracket 16 on one side of the mounting plate 11, a transmitter 15 fixedly mounted on the top of the height bracket 16, a first access head 5 fixedly mounted on one side of the processing device 6, a first output head 7 fixedly mounted on the other side of the processing device 6, a second access head 9 fixedly mounted on one side of the Jetson Xavier NX development board kit 10, and a second output head 12 fixedly mounted on the other side of the Jetson Xavier NX development board kit 10.

[0021] A first connector 3 is fixedly installed on one side of the main body 1. A first connecting wire 4 is fixedly connected to one side of the first connector 3. One end of the first connecting wire 4 is fixedly connected to one end of the first input head 5. A second connecting wire 8 is fixedly connected to one end of the first output head 7. One end of the second connecting wire 8 is fixedly connected to one end of the second input head 9. The main body 1 is connected to the processing device 6 through the first connecting wire 4. The processing device 6 is connected to the Jetson Xavier NX development board kit 10 through the second connecting wire 8.

[0022] A second connector 14 is fixedly installed on one side of the transmitter 15. A third connecting wire 13 is fixedly connected to one end of the second output head 12. One end of the third connecting wire 13 is fixedly connected to one end of the second connector 14. The Jetson XavierNX development board kit 10 is connected to the transmitter 15 through the third connecting wire 13.

[0023] The Jetson Xavier NX development board kit 10 includes a mainboard 104, a deconvolution beamforming model building unit 101, a beamforming design unit 102, and a heterogeneous parallel computing design unit 103. The bottom ends of the deconvolution beamforming model building unit 101, the beamforming design unit 102, and the heterogeneous parallel computing design unit 103 are all fixedly connected to the top end of the mainboard 104. The deconvolution beamforming model building unit 101 analyzes the convolution and deconvolution problems in the time-domain system, performs spatiotemporal analogies, clarifies the deconvolution beamforming problem of array processing, and follows the array directivity function. The system classifies convolutional models, derives beamforming convolutional models for various commonly used array forms, establishes corresponding array shift convolutional theoretical models, analyzes existing deconvolutional beamforming methods in beamforming design unit 102, implements RL deconvolution algorithm through pre-stored beammap PSF dictionary, improves RL deconvolution algorithm, conducts performance analysis and comparative studies, and decomposes algorithm software system in heterogeneous parallel computing design unit 103, constructs array detection software system based on CPU and GPU collaborative architecture, improves parallel programming logic, and integrates various software modules for system integration testing.

[0024] The bottom of the motherboard 104 is fixedly connected to the mounting plate 11, and the Jetson Xavier NX development board kit 10 is mounted on the mounting plate 11 via the motherboard 104.

[0025] In this application, the following is used: theoretical modeling of a two-dimensional spatial displacement-varying convolution / deconvolution model and research on the deconvolution solution method of the two-dimensional displacement-varying model are conducted. In the azimuth dimension, the spatial spectrum output of conventional beamforming can be regarded as the convolution result of the array pattern function and the point target azimuth information. Deconvolution can obtain the target's azimuth information, thereby effectively improving the accuracy of target azimuth estimation. In the range dimension, the cross-correlation between the array received signal and the transmitted signal is the convolution of the transmitted signal's autocorrelation and the target reflection channel impulse response function. The target reflection signal can be obtained by applying a deconvolution algorithm in the time domain. The advantages and disadvantages of traditional conventional focused beamforming and high-resolution beamforming algorithms such as MVDR and STMV are analyzed. Then, based on the convolution model of underwater acoustic images, research on deconvolution acoustic image measurement is conducted: NNLS and DAMAS are studied successively. This paper presents a shift-invariant model deconvolution algorithm and improves upon the traditional RL deconvolution algorithm by extending the RL algorithm through a predefined dictionary to make it applicable to the solution of deconvolution beamforming. The system architecture is built using a hybrid CPU and GPU to implement the array signal processing algorithm. The CPU is responsible for system logic control and task allocation, while the GPU is responsible for parallel computing of large-scale data, achieving task-level parallelism. Multiple modules are parallelized using multi-threaded parallelism, asynchronous streaming, and hardware device concurrency. CUDA is used to achieve internal multi-threaded parallelism and optimize the data storage structure. The system achieves real-time processing at three levels: task-level parallelism, module-level parallelism, and algorithm-level parallelism. It can complete high-performance parallel computing in single-instruction multi-threaded mode and improve data access efficiency.

[0026] Specifically, by analyzing the convolution and deconvolution problems in time-domain systems and making spatiotemporal analogies, the deconvolution beamforming problem in array processing is clarified. Convolution models for beamforming of various commonly used array forms are derived, and convolution models are classified according to whether the array directivity function has shift-invariance characteristics in the spatial domain. Corresponding array shift-convolution theoretical models are established. Addressing the issue that existing deconvolution beamforming methods cannot be directly applied to arrays with shift-variable point spread functions, and considering the theoretical model mismatch between the pre-stored dictionary's original RL calculation formula, a proposed approach is to use a pre-stored beammap (also known as the array's point spread function). This paper implements the RL deconvolution algorithm for beamforming of spatially shift-modulated model arrays using a Function (PSF) dictionary, aiming to improve and enhance the RL deconvolution algorithm. Through performance analysis and comparative studies on the algorithm's deconvolution gain under conditions of main lobe width, main-side lobe ratio, detection capability of weak targets in the presence of strong interference, and array element position errors, this paper focuses on high-resolution beamforming algorithms for imaging sonar. It analyzes the computational power requirements of a multi-beam imaging sonar data processing system, divides the algorithm software system into signal forwarding, array signal processing, and display software for program implementation, constructs an overall execution scheme for the array detection software system based on a CPU and GPU collaborative architecture, and improves the parallel programming logic. The various software modules are integrated to form a complete array detection software system, and the system is tested with experimental data to verify the feasibility of real-time operation of the array detection software.

[0027] Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A robust high-resolution beamforming device with narrow main lobe and low sidelobe effect, comprising a main frame (2), characterized in that: The host frame (2) is fixedly mounted with a host body (1) at the top. A processing device (6) is provided on one side of the host body (1). A mounting plate (11) is provided on one side of the processing device (6). A Jetson Xavier NX development board kit (10) is fixedly mounted on the top of the mounting plate (11). A height bracket (16) is provided on one side of the mounting plate (11). A transmitter (15) is fixedly mounted on the top of the height bracket (16). A first access head (5) is fixedly mounted on one side of the processing device (6). A first output head (7) is fixedly mounted on the other side of the processing device (6). A second access head (9) is fixedly mounted on one side of the Jetson Xavier NX development board kit (10). A second output head (12) is fixedly mounted on the other side of the Jetson Xavier NX development board kit (10). The Jetson Xavier NX development board kit (10) includes a motherboard (104), a deconvolution beamforming model building unit (101), a beamforming design unit (102), and a heterogeneous parallel computing design unit (103). The bottom ends of the deconvolution beamforming model building unit (101), the beamforming design unit (102), and the heterogeneous parallel computing design unit (103) are all fixedly connected to the top end of the motherboard (104).

2. The robust high-resolution beamforming device with narrow main lobe and low sidelobe effect according to claim 1, characterized in that: A first connector (3) is fixedly installed on one side of the host body (1), a first connecting wire (4) is fixedly connected to one side of the first connector (3), one end of the first connecting wire (4) is fixedly connected to one end of the first access head (5), a second connecting wire (8) is fixedly connected to one end of the first output head (7), and one end of the second connecting wire (8) is fixedly connected to one end of the second access head (9).

3. The robust high-resolution beamforming device with narrow main lobe and low sidelobe effect according to claim 1, characterized in that: A second connector (14) is fixedly installed on one side of the transmitter (15), and a third connecting wire (13) is fixedly connected to one end of the second output head (12). One end of the third connecting wire (13) is fixedly connected to one end of the second connector (14).

4. The robust high-resolution beamforming device with narrow main lobe and low sidelobe effect according to claim 1, characterized in that: The bottom of the motherboard (104) is fixedly connected to the mounting plate (11).