High-speed coupling solutions with support for continuous-time, in-band return channel communication and proprietary features

Abstract

Network device (200), wherein the network device (200) is configured to: Receiving or transmitting a statement of support for a proprietary mode over an in-band communication channel for link training in a signal received from or transmitted to a remote link partner (VP), where the band-internal communication channel for link training is embedded between the Open Systems Interconnect (OSI) data link layer and at least one other, higher OSI layer.

Description

[0001] This application generally relates to high-speed coupling link solutions, including high-speed coupling link solutions for continuous-time return channel communication and proprietary features.

[0002] Link training is a technique used in serializer / deserializer high-speed communication (SerDes high-speed communication) and is part of the specifications for the Ethernet standard (for example, specification 802.3 of the Institute of Electrical and Electronics Engineers (IEEE)). Link training provides a protocol by which a device communicates with a remote link partner (VP) over a point-to-point link using in-band information to jointly optimize the bit error rate (BFR) over the link and / or reduce interference caused by the link on adjacent channels. Existing link training solutions perform link training only once, during the start-up or initialization of the link, because otherwise their operation would disrupt user data.This leads to existing link training solutions being limited in their application.

[0003] US 2009 / 0 154 467 A1 describes a method and a system for an asymmetric transition handshake in an energy-efficient Ethernet network.

[0004] US 2007 / 0032198A1 describes a central wireless microcomputer of a central wireless unit which identifies a content type of video and audio data to be transmitted and sets a transmission rate of the video and audio data to be transmitted according to a detected communication condition.

[0005] US 2015 / 0106668A1 describes a method for detecting fault bursts to assess the reliability of a communication link.

[0006] US 2004 / 0068593A1 describes an integrated circuit with a plurality of link-layer controllers that can be configured to operate independently in a first mode and cooperatively in a second mode.

[0007] US 2009 / 0097390A1 describes a method that includes: in an Ethernet connection comprising one or more connection partners that are communicatively coupled via one or more silent channels, relearning or refreshing circuits for the one or more connection partners and / or updating one or more parameters for the one or more silent channels.

[0008] In accordance with the present invention, a network device with the features of the independent claim is provided. Advantageous embodiments are specified in the dependent claims.

[0009] According to one embodiment, a network device is provided for performing serializer / deserializer communication with a remote liaison partner (VP) on a transmission line, the network device comprising the following: a receiver comprising a decoder configured to extract link-training data indicating support for a proprietary mode from an in-band link-training communication channel in a link-training signal received by the remote VP of a remote link on the transmission line, wherein the in-band link-training communication channel is embedded between one of the OSI Open Systems Interconnect layer and other higher OSI layers in the data traffic corresponding to the signal; and a transmitter configured to receive the link training data from the receiver and to adjust one or more parameters of the transmitter based on the proprietary mode, specifying that it is supported by the link training data.

[0010] The proprietary mode expediently consists of the following: a proprietary speed for communicating the data traffic corresponding to the OSI data link layer and other higher OSI layers in the signal, a proprietary synchronization marker for insertion between coded blocks of the OSI data link layer and other higher OSI layers in the signal, or a proprietary forward error correction scheme for encoding the data of the OSI data link layer and other higher OSI layers in the signal.

[0011] Conveniently, the proprietary synchronization mark includes a proprietary size, a proprietary position, or proprietary content.

[0012] Conveniently, the proprietary scheme for forward error correction includes a proprietary generator matrix or a proprietary polynomial.

[0013] Conveniently, the band-internal communication channel is trained for link training using management data from a PCS protocol (Physical Coding Sublayer, a sublayer of the physical layer for coding), which belongs to the sublayer for the OSI network protocol.

[0014] Conveniently, the management data consists of filler bits enclosed in synchronization markers, which are inserted into the signal between coded blocks of the OSI data link layer and other, higher OSI layers using the PCS protocol.

[0015] Advantageously, the band-internal communication channel for link training is trained using low-frequency signaling at a frequency lower than the high-frequency signaling used to transmit the data of the OSI data link layer and other, higher OSI layers in the signal.

[0016] According to one embodiment, a network device is provided for performing serializer / deserializer communication with a remote liaison partner (VP) over transmission lines, the network device comprising the following: a receiver configured to monitor a signal received from the remote VP on the transmission lines to determine support for a proprietary mode for communicating data traffic on the transmission lines corresponding to an OSI data link layer (Open Systems Interconnect) and other higher OSI layers; a transmitter configured to transmit in a signal transmitted to the remote VP an indication of support for a proprietary mode on an in-band communication channel for link training, wherein the in-band communication channel for link training is embedded between the traffic corresponding to the OSI data link layer and other higher OSI layers.

[0017] The proprietary mode is expediently a proprietary communication speed for communicating data traffic on the transmission lines that corresponds to the OSI data link layer and other higher OSI layers.

[0018] The proprietary communication speed is conveniently a communication speed not supported by a specification of the IEEE 802.3 standard.

[0019] It is expedient to determine support for the proprietary mode based on characteristics of the transmission lines.

[0020] Conveniently, the band-internal communication channel is trained for link training using management data from a PCS protocol (Physical Coding Sublayer, a sublayer of the physical layer for coding), which belongs to the sublayer for the OSI network protocol.

[0021] Conveniently, the management data consists of filler bits enclosed in synchronization markers, which are inserted into the signal transmitted to the remote VP between coded blocks of the OSI data link layer and other, higher OSI layers using the PCS protocol.

[0022] Advantageously, the band-internal communication channel for link training is trained using low-frequency signaling at a frequency lower than the high-frequency signaling used to transmit the data of the OSI data link layer and other higher OSI layers in the signal transmitted to the remote VP.

[0023] According to one embodiment, a network device is provided for performing serializer / deserializer communication with a remote liaison partner (VP) on a transmission line, the network device comprising the following: a receiver configured to extract link-training data indicating support for a proprietary mode from an in-band communication channel for link training in a signal received from the remote VP on the transmission line; and a transmitter configured to receive the link training data from the receiver and to adjust one or more parameters of the transmitter based on the proprietary mode, specifying that this is supported by the link training data, wherein the band-internal communication channel for link training between one of the OSI data link layer (Open Systems Interconnect) and other, higher OSI layers in the data traffic corresponding to the signal is included and is trained using the following: management data of a PCS protocol (Physical Coding Sublayer, sublayer of the physical layer for coding) belonging to the sublayer for the OSI network protocol, or low-frequency signaling with a frequency lower than the high-frequency signaling used to transmit the data of the OSI data link layer and other, higher OSI layers in the signal.

[0024] The proprietary mode expediently consists of the following: a proprietary speed for communicating the data traffic corresponding to the OSI data link layer and other higher OSI layers in the signal, a proprietary synchronization marker for insertion between coded blocks of the OSI data link layer and other higher OSI layers in the signal, or a proprietary forward error correction scheme for encoding the data of the OSI data link layer and other higher OSI layers in the signal. Conveniently, the proprietary synchronization mark includes a proprietary size, a proprietary position, or proprietary content. Conveniently, the proprietary scheme for forward error correction includes a proprietary generator matrix or a proprietary polynomial. Conveniently, the management data consists of filler bits enclosed in synchronization markers, which are inserted into the signal between coded blocks of the OSI data link layer and other, higher OSI layers using the PCS protocol. The network device used is preferably a switch. Brief description of the drawings / figures

[0025] The attached drawings, which are included in this document and form part of the application, illustrate the present disclosure and, together with the description, serve to explain the principles of the disclosure and to enable a person skilled in the art to carry out and use the disclosure. Fig. Figure 1 illustrates an exemplary network in which link training can be carried out according to the embodiments of the present disclosure. Fig. Figure 2 illustrates a block diagram of a network device with continuous and / or periodic link training capability according to embodiments of the present disclosure. Fig. Figure 3 illustrates an implementation of a transmitter configured to add, in addition to a higher-frequency signaling used for transmitting data at the OSI (Open Systems Interconnect) data link layer and at other higher layers, a low-frequency signaling that forms a communication channel for link training, according to an embodiment of the present disclosure. Fig. Figure 4 illustrates an implementation of a receiver configured to extract a low-frequency signaling signal, in accordance with an embodiment of the present disclosure, which, in addition to a higher-frequency signaling signal used to transmit the data of the OSI data link layer and other higher layers, forms a communication channel for link training. Fig. Figure 5 illustrates an implementation of a transmitter and receiver configured to form a communication channel for link training using frequency division multiplexing, according to embodiments of the present disclosure. Fig. Figure 6 illustrates an exemplary network device comprising a receiver and a transmitter, as well as a simplex clock generator, configured to perform link training according to embodiments of the present disclosure. Fig. Figure 7 illustrates another exemplary network device comprising a receiver and a transmitter as well as a simplex clock generator configured to perform link training according to embodiments of the present disclosure. Fig. Figure 8 illustrates an exemplary network device comprising a receiver and a transmitter, as well as a duplex clock generator, configured to perform link training according to embodiments of the present disclosure. Fig. Figure 9 illustrates a block diagram of an exemplary computer system according to embodiments of the present disclosure.

[0026] The present disclosure is described with reference to the accompanying drawings. The drawing in which an element appears for the first time is generally indicated in the corresponding reference numeral by the leftmost number(s). Detailed description

[0027] The following description presents numerous specific details to provide a thorough understanding of the disclosure. However, it is obvious to those skilled in the art that the disclosure, including structures, systems, and methods, can be implemented without these specific details. The description and presentation in this document are the general means used by experienced or competent professionals in this field to communicate the essence of their work to other professionals as effectively as possible. In other instances, generally known methods, procedures, components, and circuit arrangements have not been described in detail to avoid unnecessarily complicating the presentation of the invention.

[0028] References in the description to "an embodiment," "an exemplary embodiment," etc., indicate that the described embodiment may have a particular feature, structure, or characteristic, but not every embodiment necessarily has to have that particular feature, structure, or characteristic. Furthermore, such formulations do not necessarily refer to one and the same embodiment. Moreover, if a particular feature, structure, or characteristic is described in connection with an embodiment, it is defined as...They are proposed in such a way that it is within the knowledge of a person skilled in the field to influence such a feature, structure or characteristic in conjunction with further embodiments, regardless of whether this is expressly described or not.

[0029] It is obvious to experts in the relevant field(s) that various elements and features of the present disclosure, as described in the present document, can be implemented in hardware using analog and / or digital circuits, in software by executing instructions using one or more general-purpose or special-purpose processors, or as a combination of hardware and software.

[0030] Fig. Figure 1 is a higher-level diagram illustrating an exemplary network 100 in which link training can be performed according to embodiments of the present disclosure. The exemplary network 100 can include various network devices 102 and 104, such as one or more servers, switches, routers, or hubs, and a switching device 106 to enable communication between the one or more network devices 102 and 104 and possibly other network devices of the network 100 not shown.

[0031] Network devices 102 and 104 can be connected to each other or otherwise communicated via the switch device 106, such as an Ethernet switch. For example, network devices 102 and 104 can each be connected to a physical port of the switch device 106 by means of one or more network transmission lines 108 and 110, respectively. The network transmission line(s) 108 and 110 can be, for example, coaxial cable, twinaxial cable, twisted-pair cable, fiber optic cable, backplane traces, or generally any other suitable transmission line.

[0032] In one or more implementations, one or more of the network devices 102 and 104 can be designated as remote VPs (VPs) of the switch device 106. In one or more implementations, a remote VP of the switch device 106 can also include another switch device 112 coupled to the switch device 106 via the transmission line(s) 114. The type of transmission line(s) 114 can depend on the distance between the switch devices 106 and 112. For example, the transmission line(s) 114 can be provided using backplane conductors (for example, for short distances up to 1 m), twinaxial cables (for example, for distances up to 15 m), twisted pair cables (for example, for distances up to 100 m), multimode fibers (for example, for distances up to 5 km), and single-mode fibers (for example, for distances up to 40 km).

[0033] Switch devices 106 and 112 and / or one or more of network devices 102 and 104 can implement link training. As discussed above, link training is a technique used in serializer / deserializer high-speed communication (SerDes high-speed communication) and is part of the specifications for the Ethernet standard (for example, specification IEEE 802.3). Link training provides a protocol for a network device to communicate with a remote VP over a point-to-point link, conventionally using in-band information (that is, information carried on the same band as the OSI data link layer (Open Systems Interconnect) and other higher layers) to jointly optimize the bit error rate (BFR) of the link and / or reduce interference caused by the link on adjacent channels.In yet another example, link training can be performed using the sender / receiver pair to carry out a type of maintenance task to keep the connection running.

[0034] More specifically, link training can be performed on one or more implementations between a sender of a device in network 100 and a receiver of another device in network 100 (i.e., a sender / receiver pair) that are coupled via one or more transmission lines. Link training can be performed by the sender / receiver pair to fine-tune or adjust one or more settings of the sender, for example, to optimize the bit error rate (BFR) of a communication channel (i.e., a link) existing between the sender / receiver pair over the one or more transmission lines that couple the sender / receiver pair.Additionally or alternatively, link training can be performed using the transmitter / receiver pair to fine-tune or adjust one or more transmitter settings to reduce interference caused by the link on other, adjacent transmission lines or channels. In yet another example, link training using the transmitter / receiver pair can be used to perform a type of maintenance task to keep the link running.

[0035] Existing link training protocols generally perform link training only once, during the initial setup or initialization of the connection, which limits their application. After link training has been performed and data from the OSI data link layer and other higher layers has been transmitted over the link, no further link training is performed using these existing protocols due to their inherent functionality and the fact that it would interfere with user data. However, link parameters, such as the link temperature and the voltage levels of signals transmitted over the link by the transmitter / receiver pair, can change over time after link training has been performed.

[0036] Continuous or periodic link training can therefore be advantageous in some circumstances, especially for higher-speed serial communication links, such as those with or above 100 gigabits per second (Gbit / s). During continuous or periodic link training, link training data can be transmitted using in-band and / or out-of-band information mixed with data from the OSI data link layer or other higher layers (i.e., user data).

[0037] In one or more implementations, the switch device 112 can be placed close enough to a terminal or port of a switch device 106, and therefore the length of the coupling link can be reduced. To extend the range of the transmission line(s) 114, an intermediate device or component, such as a simplex or duplex clock generator, can be placed near the terminal or port of either one or both of the switch device 112 and the switch device 106 to extend the range of the transmission line(s) 114.In one or more implementations, a simplex clock generator can be a device and / or component that acts as a unidirectional repeater used to extend a link. A duplex clock generator can consist of two simplex clock generators operating together to form a bidirectional repeater used to extend a link in both directions of communication. In one or more implementations, only one direction of the link on a device may use a simplex clock generator, while the other direction of the link on the device may not. In one or more implementations, the physical layer may be known to the simplex clock generators; for example, the clock generator may operate at the physical layer, as specified by the IEEE 802 standard.3 specified bit transmission layers.

[0038] Fig. Figure 2 illustrates a block diagram of a network device 200 with continuous and / or periodic link training capability according to embodiments of the present disclosure. Examples of the network device 200 include a switch device, such as the switch device 106 in Fig. 1, or another network device, such as one of the network devices 102 or 104 in Fig. 1. In one or more implementations, the Network Device 200 is compatible with one or more specifications of the IEEE 802.3 standard and forms one side of an Ethernet connection.

[0039] As in Fig. As shown in Figure 2, the network device 200 comprises a receiver 202 and a transmitter 204. The receiver 202 includes a receiver front-end element 206, an matching parameter generator 208, and a decoder 210. The transmitter 204 includes a transmitter front-end element 212, an encoder 214, and a matching parameter receiver 216. The receiver 202 and the transmitter 204 together form a transceiver that performs SerDes high-speed communication with a remote VP (not shown) on the transmission line(s) 218 ​​and 220. The remote VP could be, for example, a switch, a router, a server, or another type of network device.

[0040] The network device 200 includes features that allow link training, as described above, to be performed with the remote VP on the transmission line(s) 218 ​​and 220. For example, when the transmitter 204 communicates with a receiver (not shown) of the remote VP on the transmission line(s) 220, the receiver of the remote VP can request the transmitter 204 to change one or more of its operating parameters (for example, its FFE equalizer tap weights and / or its pre-encoder settings). This request can be made, for example, to improve the BFR performance of the link established between the transmitter / receiver pair on the transmission line(s) 220.The receiver of the remote VP issues the request because the transmitter 204 may not be aware of the channel characteristics and / or variations in the link between the transmitter / receiver pair that change over time during operation, such as temperature and signal voltage levels. The request from the receiver of the remote VP can therefore be used to optimize the link quality in order to optimize BFR performance and other link performance metrics.

[0041] In some implementations, the receiver front-end element 206 can reconstruct a signal 222 received on the transmission line(s) 218 ​​from the transmitter (not shown) of the remote VP and provide the received signal 222 in the digital domain to the matching parameter generator 208 and the decoder 210. Before providing the received signal 222 in the digital domain to the matching parameter generator 208 and the decoder 210, the receiver front-end element 206 can perform filtering, amplification, shaping, and / or equalization of the signal in either the analog or the digital domain. The decoder 210 can decode the signal 220 received by the receiver front-end element 206 and extract data transmitted from the received signal 220 via a communication channel for link training, which is present together with the OSI data link layer and other, higher OSI layers corresponding data traffic.The data extracted from the communication channel for link training may include the request from the receiver of the remote VP to change one or more of the operating parameters (for example, the FFE equalizer tap weights and / or precoder settings) of the transmitter 204.

[0042] In contrast to state-of-the-art link training solutions, the communication channel for link training can enable continuous or periodic updates of the operating parameters of the transmitter 204 after the initialization of the connection established on the transmission line 218 between the transmitter / receiver pair.

[0043] The decoder 210 can transmit the extracted data (or adaptation parameters) from the communication channel for link training to the adaptation parameter receiver 216 of the transmitter 204. The adaptation parameter receiver 216 can then set or adjust one or more parameters of the encoder 214 and / or the transmitter front-end element 212 based on the extracted data received from the decoder 210. For example, the adaptation parameter receiver 216 can adjust tap weights of an FFE equalizer used by the encoder 214 to equalize data transmitted on the transmission line(s) 220 and / or weights of a precoder used to precode data transmitted on the transmission line(s) 220.In another example, where the transmission line(s) 220 comprise a differential pair of transmission lines, the matching parameter receiver 216 can adjust the delay in one or both lines of the differential pair based on the extracted data to compensate for any propagation delay difference at the receiver of the remote VP. Since the communication channel for link training persists after the initialization of the connection established between the sender / receiver pair on the transmission line(s) 218, in one embodiment a long FFE equalizer with, for example, ten or more taps can be used to improve performance, and / or a sparse FFE equalizer can be implemented for reflection cancellation.

[0044] In the opposite direction of communication, when receiver 202 communicates with the transmitter of the remote VP on the transmission line(s) 218, receiver 202 can request the transmitter of the remote VP to change one or more of its operating parameters (for example, its FFE equalizer tap weights, precoder settings, or differential pair delay parameters to compensate for the propagation delay difference). This request can be made, for example, to optimize the BFR performance of the connection established between the transmitter / receiver pair on the transmission line(s) 218. Receiver 202 makes the request because the transmitter of the remote VP may not be aware of the channel characteristics and / or variations in the connection between the transmitter / receiver pair that change over time during operation, such as temperature and signal voltage levels.The request from receiver 202 can therefore be used to improve the quality of the connection, to optimize the BFR performance and other metrics of the connection performance.

[0045] In some implementations, the matching parameter generator 208 monitors the quality of the received signal 222 using one or more known quality measurement techniques or algorithms and determines the changes to one or more parameters of the remote VP's transmitter to improve the performance of the link established on the transmission line(s) 218 ​​between the transmitter / receiver pair. The matching parameter generator 208 then sends the changes to the one or more parameters (or matching parameters) as part of the request to the encoder 214 for transmission to the remote VP. The encoder 214 can encode the request and transmit the encoded request over the link-training communication channel, which is present along with the OSI data link layer and other higher OSI layers.

[0046] In this implementation, the communication channel for link training is trained by "stealing" management data from a sublayer of the physical layer for encoding (PCS). The PCS is part of the sublayer for the OSI network protocol, for example, in the Fast Ethernet and Gigabit Ethernet standards. It sits above the physical layer (PHY) and performs data encoding / decoding (for example, 64b / 66b encoding / decoding), scrambling / unscrambling, inserting / removing synchronization markers, etc. The Decoder 210 can implement the functionality of the PCS for decoding, scrambling, and / or removing synchronization markers, while the Encoder 214 can implement the functionality of the PCS for encoding, scrambling, and inserting synchronization markers.

[0047] The PCS inserts or removes synchronization markers to, among other things, allow PCS-encoded data blocks (for example, 66b-encoded data blocks) to be synchronized after being received over one or more transmission lines. In many network specifications, such as the IEEE 802.3 standard, the synchronization markers include padding bits. These padding bits in the synchronization markers, which do not carry any information, can be reassigned (or "stolen") by the encoder of the remote VP transmitter and encoder 214 of transmitter 204 to train the communication channel for link training to carry the respective link training data. The remote VP receiver and decoder 210 of receiver 202 can then extract the padding bits to reconstruct the link training data.

[0048] For example, IEEE 802.3 Clause 134 RS-FEC includes a one-bit filler element in assigned synchronization markers that repeats every 1024 encoded data blocks or codewords that can be remapped to train the link-training communication channel for carrying link-training data bits. IEEE 802.3 Clause 92 RS-FEC includes a five-bit filler element in assigned synchronization markers that repeats every 4096 encoded data blocks or codewords that can be remapped to train the link-training communication channel for carrying link-training data bits. IEEE 802.Clause 119 includes a 65-bit padding element in assigned synchronization markers, which, in 200 Gbps Ethernet, is repeated every 8193 encoded data blocks or codewords that can be remapped to train the link training communication channel for carrying link training data bits. Finally, IEEE 802.3 Clause 119 includes a 113-bit padding element in assigned synchronization markers, which, in 400 Gbps Ethernet, is repeated every 4096 encoded data blocks or codewords that can be remapped to train the link training communication channel for carrying link training data bits.

[0049] In a further implementation, the communication channel for link training can be trained by adding low-frequency signaling to the comparatively higher-frequency signaling used to transmit data of the OSI data link layer and other higher layers on the transmission line(s) 218 ​​and 220. Fig. Figure 3 illustrates, for example, an implementation of transmitter 204 in Fig. 2, which is configured to add, in addition to the higher-frequency signaling used to transmit data at the OSI data link layer and at other high layers, a low-frequency signaling forming a communication channel for link training according to an embodiment of the present disclosure.

[0050] More precisely, the encoder comprises 214, as in Fig. Figure 3 shows a slow encoder 302 and, for example, an FFE equalizer / pre-encoder 304. The slow encoder 302 receives link training data, for example, from the matching parameter generator 208 of the receiver 202, as shown above. Fig. 2 described, and encodes the link training data for transmission on the transmission line(s) 220. The slow encoder 302 can encode the link training data at a bit or symbol rate much slower than the bit or symbol rate of the encoded data of the OSI data link layer and other higher layers processed by the FFE equalizer / precoder 304. For example, the slow encoder 302 can encode the link training data into bits or symbols that each comprise R bits or symbols of the encoded data of the OSI data link layer and other higher layers, where R is an integer. In one embodiment, R is greater than 1000. However, an upper limit for R can be specified based on any AC coupling performed with the encoded link training data at the receiver of the remote VP or in conjunction with the transmission line(s) 220.Furthermore, the slow encoder 302 can encode the link training data, for example, using Manchester coding or differential Manchester coding.

[0051] When an FFE equalizer / precoder 304 is used, it is configured to precode and / or equalize the encoded data of the OSI data link layer and higher layers. The actual hardware and / or software used to encode the data of the OSI data link layer and higher layers is not shown with the encoder 214 for clarity.

[0052] The data output, slowly encoded by the slow encoder 302, and the data output of the OSI data link layer and higher layers, equalized and / or precoded by the FFE equalizer / precoder 304, are combined at the summing node 306 and passed to the transmitter front-end element 212. The transmitter front-end element 212 comprises a digital-to-analog converter (DAW) 308, which converts the combined, encoded data from the digital domain to the analog domain. In another embodiment, the two signals are first converted to the analog domain and then combined. In one embodiment, part of the control range of the output signal of the DAW 308 is shown below left in Fig. Figure 3 shows the low-frequency signal reserved for carrying the link training data. The signal amplitude of this low-frequency signal can be kept low to avoid sacrificing too much of the DAW 308's dynamic range.

[0053] It should be noted that the link training data can be encoded using a forward error correction code before processing by the slow encoder 302. Encoding the link training data with a forward error correction code can help enable the use of a lower-amplitude signal with a lower signal-to-noise ratio output by the slow encoder 302. It should also be noted that the low-frequency signal carrying the link training data can be sent as a common-mode signal on the transmission line(s) 220 if the transmission line(s) 220 form a differential pair. More precisely, the data of the OSI data link layer and higher layers can be sent as a differential signal on the transmission line(s) 220, and the low-frequency signal carrying the link training data can be sent on the transmission line(s) 220 as a differential signal.The transmission line(s) 220 are sent as a common-mode signal to further prevent interference between the two signals.

[0054] Fig. Figure 4 illustrates an implementation of receiver 202 in Fig. 2, which is configured, according to an embodiment of the present disclosure, to extract the low-frequency signaling which, beyond the higher-frequency signaling used to transmit the data of the OSI data link layer and other higher OSI layers, forms a communication channel for link training. As in Fig. As shown in Figure 4, the decoder 210 comprises a low-pass filter (TPF) 402 and an amplitude filter 404. The TPF 402 is configured to low-pass filter the received signal 222. The output signal of the TPF 402 is a low-frequency signal that carries the link training data, as discussed above.

[0055] The Amplitude Filter 404 is configured to sample the low-frequency signal output by the TPF 402 at the rate at which the symbols of the link training data were encoded. The Amplitude Filter 404 is then configured to determine whether the sample is above or below a predefined threshold. For example, if the threshold used by the Amplitude Filter 404 to determine whether a sample of the low-frequency signal is a logic one or a logic zero, then any sample with a voltage below the zero-volt threshold will be determined by the Amplitude Filter 404 as a logic zero, and any sample with a voltage above the zero-volt threshold will be determined by the Amplitude Filter 404 as a logic one.The Amplitude Sieve 404 outputs a logical one or a logical zero for each received symbol, based on its determination. The output of the Amplitude Sieve 404 corresponds (ideally) to the original link-training data transmitted over the communication channel for link training. It should be noted that in other cases, where the link-training data is encoded using more than two amplitude levels (for example, PAM-4), the Amplitude Sieve 404 may include additional amplitude-filter levels besides the two mentioned above. It should also be noted that after the Amplitude Sieve 404 has output the link-training data, further forward error correction decoding can be performed on the link-training data to detect and, if possible, correct any errors in the data.

[0056] Up to this point in the description, all described communication channels for link training have been "coordinate-propagating" link training channels, where "coordinate-propagating" refers to the fact that the link training data is transmitted on the transmission line(s) in the same direction as the user data (that is, in the same direction as the data of the OSI data link layer and other higher layers). A "counter-propagating" link training communication channel can also be implemented and can be particularly valuable when closing a link training control loop in a system with a single transmission line or a set of transmission lines for communicating data between two devices in a single direction.

[0057] In particular, such a communication channel for link training can be trained using frequency-division multiplexing on one or more of the transmission line(s) 218 ​​and 220. For example, the receiver 202, as in the network device 500 of Fig. Figure 5 shows a Link Training Transmitter (LT-TX) 502 for transmitting a request from the Receiver 202 with the matching parameters for the remote VP transmitter generated by the matching parameter generator 208. The LT-TX 502 can transmit the request on the same transmission line(s) 218 ​​on which the Receiver 202 receives the signal 222 from the remote VP transmitter. More precisely, the LT-TX 502 can transmit the request in a different frequency band than the frequency band used by the remote VP transmitter to transmit the signal 222. A hybrid device 504 could also be used to prevent the transmission signal of the LT-TX 502 from interfering with the operation of the Receiver front-end element 206. The transmitter of the remote VP may further include a link training receiver (LT-RX) and a hybrid device to receive the request from receiver 202.

[0058] An example of such an LT-RX is shown with transmitter 204 as LT-RX 506. Transmitter 204 can implement a similar frequency-duplex scheme with the receiver of the remote VP. The LT-RX 506 can be coupled to the transmission line(s) 220 using a hybrid device 508 to prevent the transmission signal of the transmitter front-end element 212 from interfering with the operation of the LT-RX 506.

[0059] It should be noted again that the signal carrying the link training data can be sent as a common-mode signal on transmission line(s) 218 ​​or 220 if transmission line(s) 218 ​​or 220 form a differential pair. More precisely, the data of the OSI data link layer and higher layers can be sent as a differential signal on transmission line(s) 218 ​​and 220, and the signal carrying the link training data can be sent as a common-mode signal on transmission line(s) 218 ​​or 220 to further prevent interference between the two signals.It should also be noted that the "coordinate propagating" and "opposite propagating" communication channels can be used together for link training to form a training channel with a control loop used in a differential signal transmission scheme on a single transmission line or a set of transmission lines.

[0060] As discussed above, some implementations of network devices, such as those in Fig. As shown in Figure 1, a simplex or duplex clock generator can be used to extend the range of the transmission line(s) used by the network device to communicate with a remote VP. In one or more implementations, a simplex clock generator may be a unidirectional repeater used to extend one or more transmission lines, while a duplex clock generator may consist of two simplex clock generators operating together to form a bidirectional repeater used to extend one or more transmission lines in both directions of communication. In one or more implementations, only one direction of a connection at a device may use a simplex clock generator, but not the other direction of the connection at the device.In one or more implementations, the physical layer can be known to the simplex clock regenerators; for example, the clock regenerator can be operated on the physical layer, such as on one of the physical layers specified by the IEEE 802.3 standard.

[0061] Fig. Figure 6 illustrates an exemplary network device 600 with the receiver 202 and the transmitter 204, as above with regard to Fig. 2 discussed, as well as a simplex clock generator 602 configured to perform link training according to embodiments of the present disclosure. In one embodiment, the receiver 202 and the transmitter 204 are implemented on the chip, the hardware and software being configured to perform the main functionality of the network device 600 (for example, switching functionality, server functionality, etc.). In this embodiment, the simplex clock generator 602 is implemented on a separate chip, but nevertheless within the network device 600. For example, the simplex clock generator 602 can be implemented on the same circuit board as the chip implementing the receiver 202 and the transmitter 204. The two chips can be connected via copper traces on the circuit board or via another, in Fig. 6 of the type(s) of transmission line(s) not shown.

[0062] The simplex clock generator 602 is configured to clean up and eliminate signal degradation of a signal received on transmission line(s) 218 ​​from the transmitter of the remote VP (not shown) before the signal is sent to the receiver 202. As shown in Fig. As shown in Figure 6, the simplex clock regenerator 602 comprises a clock regenerator receiver (RX) 604 and a clock regenerator transmitter (TX) 606. The clock regenerator receiver 604 is configured to receive the signal from the transmitter of the remote VP on the transmission line(s) 218 ​​and at least partially eliminate the signal degradation. In some implementations, the clock regenerator RX 604 includes an adaptive, continuous, time-linear equalizer and / or a decision-feedback equalizer to clean up and eliminate the signal degradation of a signal received on the transmission line(s) 218 ​​from the transmitter of the remote VP before the signal is sent to the receiver 602. Although this is shown in Figure 6, the clock regenerator receiver 604 is configured to receive the signal from the transmitter of the remote VP on the transmission line(s) 218 ​​at least partially. Fig. Not shown in Figure 6, the clock regenerator RX 604, after cleaning the signal received on the transmission line(s) 218, can pass the signal to the clock regenerator TX 606 so that the latter can process the signal as described above. Fig. 2 described, transmits to receiver 202.

[0063] Additionally, the clock regenerator RX 604 can now, as described above, perform Link training with the remote VP transmitter because the receiver 202 is not in direct contact with the remote VP transmitter, as described in Fig. 2 was the case. In particular, the clock regenerator RX 604 can include a matching parameter generator similar to the matching parameter generator 208 and a decoder similar to the decoder 210. The clock regenerator RX 604 can then pass the matching parameters it has generated by analyzing the signal received from the transmitter of the remote VP using one or more known quality measurement techniques or algorithms, as well as the matching parameters received directly from the transmitter of the remote VP, to adjust the parameters of the transmitter 204 as described above. The clock regenerator RX 604 can receive the parameters from the transmitter of the remote VP in the same way as the receiver 202 via a communication link established using any of the above procedures or techniques (for example, "stealing" bits from the PCS protocol, slow signaling, etc.).The clock regenerator TX 606 and the receiver 202 function as pass-through devices, as in . Fig. Figure 6 shows how to pass these sets of adjustment parameters to transmitter 204.

[0064] With reference to Fig. Figure 7 illustrates another network device 700, which connects the receiver 202 and the transmitter 204, as above with regard to Fig. 2 discussed, and comprises a simplex clock generator 702 configured to perform link training according to embodiments of the present disclosure. In one embodiment, the receiver 202 and the transmitter 204 are implemented on the chip, the hardware and software being configured to perform the main functionality of the network device 700 (for example, switching functionality, server functionality, etc.). In this embodiment, the simplex clock generator 702 is implemented on a separate chip, but nevertheless within the network device 700. For example, the simplex clock generator 702 can be implemented on the same circuit board as the chip implementing the receiver 202 and the transmitter 204. The two chips can be connected via copper traces on the circuit board or via another, in Fig. 7 of the type(s) of transmission line(s) not shown may be coupled.

[0065] The simplex clock generator 702 is configured to clean up and eliminate the signal degradation of a signal received on the transmission line(s) 220 from the transmitter 204 before the signal is sent on the transmission line(s) 220 to the receiver of the remote VP (not shown).

[0066] As in Fig. As shown in Figure 7, the simplex clock regenerator 702 comprises a clock regenerator receiver (RX) 704 and a clock regenerator transmitter (TX) 606. The clock regenerator RX 704 is configured to receive a signal from the transmitter 204, which carries the data of the OSI data link layer and higher layers, and to at least partially eliminate signal degradation. In some implementations, the clock regenerator RX 704 includes an adaptive, continuous, time-linear equalizer and / or a decision-feedback equalizer to clean up and eliminate signal degradation of a signal received from the transmitter 704 before the signal is sent to the clock regenerator TX 706 for transmission to the receiver of the remote VP on the transmission line(s) 220.

[0067] Since transmitter 204 is not in direct contact with the receiver of the remote VP, as is the case in Fig. 2. If this was the case, the clock regenerator TX 706 can now perform remote VP Link training with the transmitter, as described above. Fig. 2 described. In particular, the clock regenerator TX 706 can supply one to the encoder 214 in Fig. Two similar encoders are included to encode arbitrary adaptation parameters for the sender of the remote VP over a communication link established using any of the above methods or techniques (for example, "stealing" bits from the PCS protocol, slow signaling, etc.). The adaptation parameters for the receiver of the remote VP are determined as above with regard to Fig. As described in section 2, the signal is generated by means of receiver 202. Transmitter 204 and clock regenerator RX 704 can be used, as described in section 2. Fig. Figure 7 shows how these act as pass-through devices to transmit this set of adjustment parameters to the clock regenerator TX 706.

[0068] With reference to Fig. 8 is now another network device 800 with the receiver 202 and the transmitter 204 made of Fig. Figure 2 and a duplex clock generator 802 are illustrated, which are configured to perform link training according to embodiments of this disclosure. The duplex clock generator 802 comprises the two simplex clock generators 804 and 806. The simplex clock generator 804 comprises a clock generator receiver (RX) 808 and a clock generator transmitter (TX) 810. The simplex clock generator 806 comprises a clock generator RX 812 and a clock generator TX 812. In one embodiment, the receiver 202 and the transmitter 204 are implemented on the chip, the hardware and software being configured to perform the main functionality of the network device 800 (for example, switching functionality, server functionality, etc.). In this embodiment, the duplex clock generator 802 is implemented on a separate chip, but still within the network device 800.For example, the duplex clock generator 802 can be implemented on the same circuit board as the chip implementing the receiver 202 and the transmitter 204. The two chips can be connected via copper traces on the circuit board or via another, in . Fig. 8 of the type(s) of transmission line(s) not shown may be coupled.

[0069] In one embodiment, the receiver 202 and the transmitter 204 can be, as above with regard to Fig. 2, using the Duplex Clock Generator 802 Link Training. More precisely, in such an embodiment, the Duplex Clock Generator 802 can be used, as described above with regard to Fig. 2 described, are further considered as VP of receiver 202 and sender 204. Receiver 202 and sender 204 can perform link training with the duplex clock generator 802 by sending and receiving link training data on a link training communication channel that shares traffic with the OSI data link layer and other higher OSI layers, with the data being communicated on the transmission line(s) 816 and 818. The link training communication channel can be trained using one or more of the techniques discussed above.For example, the communication channel for link training can be trained by “stealing” filler bits from the synchronization markers of the PCS protocol or by using low-frequency signaling in addition to the comparatively higher-frequency signaling used to carry data to the OSI data link layer and other higher OSI layers.

[0070] In one embodiment, the link training communication channel can be used to carry link training data between the duplex clock generator 802 and the receiver 202 and transmitter 204, as described above. In another embodiment, the link training communication channel can also be used to carry link training data for signaling proprietary modes supported by each of the duplex clock generator 802 and the receiver 202 and transmitter 204. Proprietary modes can include, for example, proprietary speeds for communicating data of the OSI data link layer and other higher OSI layers on the transmission line(s) 816 and 818, proprietary synchronization markers of the PCS protocol for communicating data of the OSI data link layer and other higher OSI layers on the transmission line(s) 816 and 818.the transmission line(s) 816 and 818 and proprietary forward error correction schemes that can be used to encode data of the OSI data link layer and other higher OSI layers for transmission on the transmission line(s) 816 and 818. The duplex clock generator 802 and the receiver 202 and transmitter 204 can subsequently agree on a common, supported proprietary mode and configure their respective hardware / software to operate using the proprietary mode. It should be noted that proprietary modes can be similarly agreed upon between other remote VPs, such as another network device in . Fig. 1, and communicates with the receiver 202 and transmitter 204 and can be used between the two devices.

[0071] Proprietary speeds may be speeds higher than the standard speeds at which the 802 duplex clock generator, receiver 202, and transmitter 204 are specified to support communication of data between the OSI data link layer and other higher OSI layers on the 816 and 818 transmission line(s). For example, the 802 duplex clock generator, receiver 202, and transmitter 204 may be specified to support 50 Gbit / s on a single lane, as specified in the IEEE 802.3 standard. Proprietary speeds may be speeds exceeding 50 Gbit / s.The link training communication channel can be used to carry link training data specifying proprietary speeds supported by each of the duplex clock generator 802 and the receiver 202 / transmitter 204 pair for communicating data of the OSI data link layer and other higher OSI layers on the transmission line(s) 816 and 818. The link training communication channel can also be used to carry link training data indicating whether the channel on the transmission line(s) 816 and 818 has characteristics capable of supporting such proprietary speeds within a desired or required BFR performance range.

[0072] The proprietary synchronization markers may include synchronization markers with different sizes, positions, and content than those specified in a standard specification, such as one of the specifications of the IEEE 802.3 standard. The proprietary forward error correction scheme may include the use of a proprietary generator matrix or polynomial for encoding data blocks.

[0073] It is obvious to experts in the relevant field(s) that various elements and features of the present disclosure, as described in the present document, can be implemented in hardware using analog and / or digital circuits, in software by executing instructions using one or more general-purpose or special-purpose processors, or as a combination of hardware and software.

[0074] The following description of a general-purpose computer system is provided for the sake of completeness. Exemplary embodiments of the present disclosure can be implemented in hardware or as a combination of software and hardware. Consequently, exemplary embodiments of the disclosure can be implemented in the environment of a computer system or another processing system. An example of such a computer system 900 is given in Fig. 9 shown. The in Fig. 2, Fig. 3, Fig. 4, Fig. 5, Fig. 6, Fig. 7 to Fig. The 8 blocks shown can be executed on one or more computer systems.

[0075] The computer system 900 comprises one or more processors, such as the processor 904. The processor 904 may be a digital signal processing unit for a specific or general purpose. The processor 904 is connected to a communication infrastructure 902 (for example, a bus or network). Various software implementations are described using this exemplary computer system. After reading this description, it will be obvious to those skilled in the relevant field(s) how the disclosure can be implemented using other computer systems and / or computer architectures.

[0076] The computer system 900 also includes a main memory 906, preferably random access memory (RAM), and may also include a secondary memory 908. The secondary memory 908 may, for example, include a hard disk drive 910 and / or a removable media drive 912, which is a floppy disk drive, a magnetic tape drive, an optical disk drive, or the like. The removable media drive 912 reads data from and / or writes data to a removable media unit 916 in a generally known manner. The removable media unit 916 is a floppy disk, a magnetic tape, an optical disk, or the like, from which the removable media drive 912 reads data and to which it writes data. As is generally known to those skilled in the art,The relevant area(s) are recognizable, and the removable data storage unit 916 comprises a storage medium usable by a computer on which computer software and / or data are stored.

[0077] In alternative implementations, the secondary memory 908 may have other, similar means to allow computer programs or other instructions to be loaded into the computer system 900. Such means may include, for example, a removable storage unit 918 and an interface 914. Examples of this may include a program cartridge and a cartridge interface (such as those found in devices for video games), a removable memory chip (such as an EPROM or PROM) and its socket, a USB flash drive with a corresponding USB connector, and other removable storage units 918 and interfaces 914 that allow software and data to be transferred from the removable storage unit 918 to the computer system 900.

[0078] The Computer System 900 may also have a Communication Interface 920. The Communication Interface 920 allows software and data to be transferred between the Computer System 900 and external devices. Examples of the Communication Interface 920 include a modem, a network interface (such as an Ethernet card), a communication port, a PCMCIA slot with a corresponding card, etc. Software and data transferred via the Communication Interface 920 are in the form of signals, which may be electronic, electromagnetic, optical, or other signals that can be received by the Communication Interface 920. These signals are provided to the Communication Interface 920 via a Communication Path 922.The 922 communication path carries signals and can be implemented using wire or cable, fiber optic cable, a telephone line, a mobile phone connection, an RF connection and other communication channels.

[0079] The terms “computer program medium” and “computer-readable medium,” as used in this document, are used to generally refer to a physical storage medium, such as the removable disks 916 and 918 or a hard disk installed in the hard disk drive 910. These computer program products are means of providing software to the Computer System 900.

[0080] Computer programs (also referred to as computer control logic) are stored in the main memory 906 and / or in the secondary memory 908. Computer programs can also be received via the communication interface 920. When executed, such computer programs enable the computer system 900 to implement the present disclosure as discussed in this document. In particular, when executed, the computer programs enable the processor 904 to implement the processes of the present disclosure, such as any of the methods described in this document. Accordingly, such computer programs constitute control units of the computer system 900.If the disclosure is implemented using software, the software can be stored in a computer program product and loaded into the computer system 900 using the removable disk drive 912, the interface 914 or the communication interface 920.

[0081] In another embodiment, features of the disclosure are primarily implemented in hardware, for example, using hardware components such as ASICs (Application-Specific Integrated Circuits) and gate arrays. The implementation of a hardware state machine to perform the functions described in this document is also obvious to those skilled in the field(s) concerned.

[0082] Examples of implementation were described above using function blocks, which illustrate the implementation of specified functions and their relationships to one another. For practical reasons, the limitations of these function blocks have been arbitrarily defined in this document. Alternative limitations can be defined as long as the specified functions and their relationships to one another are implemented appropriately.

Claims

[1] Network device (200), wherein the network device (200) is configured to: Receiving or transmitting a statement of support for a proprietary mode over an in-band communication channel for link training in a signal received from or transmitted to a remote link partner (VP), where the band-internal communication channel for link training is embedded between the Open Systems Interconnect (OSI) data link layer and at least one other, higher OSI layer. [2] Network device (200) according to claim 1, wherein the network device is configured to adjust one or more parameters based on the proprietary mode, wherein it is stated that this is supported. [3] Network device (200) according to any of the preceding claims, wherein the network device is configured to perform continuous link training. [4] Network device (200) according to claim 1 or 2, wherein the network device (200) is configured to perform periodic link training. [5] Network device (200) according to any of the preceding claims, wherein the network device is configured to perform serializer / deserializer communication with the remote liaison partner (VP). [6] Network device (200) according to any one of the preceding claims, comprising: a transmitter (204) configured to adjust one or more parameters of the transmitter (204). [7] Network device (200) according to claim 6, wherein the transmitter (204) is configured to adjust one or more parameters of the transmitter (204) based on the proprietary mode. [8] Network device (200) according to claim 6 or 7, wherein the transmitter (204) is configured to continuously update the parameter(s). [9] Network device (200) according to claim 6 or 7, wherein the transmitter (204) is configured to periodically update the parameter(s). [10] Network device (200) according to one of the preceding claims, wherein it is specified that the proprietary mode of received link training data is supported.

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