ELECTRONIC DEVICE, SOLID-BODY IMAGE ELEMENT AND SIGNAL PROCESSING DEVICE

Abstract

Even when remosaic processing is performed outside of a solid-state imaging device, a high-quality captured image can be produced. An electronic device comprises a solid-state imaging element and a signal processing device that performs remosaic processing on an output signal of the solid-state imaging element. The solid-state imaging element comprises a plurality of pixels arranged in a two-dimensional direction, a plurality of on-chip lenses, each provided for a corresponding group of pixels comprising two or more pixels, and a phase-difference-sensitivity-difference characteristic removal section that removes a radio-frequency component caused by a phase and sensitivity difference between two or more pixel signals of the same color output for each of the pixel groups.

Description

TECHNICAL AREA

[0001] The present disclosure relates to an electronic device, a solid-state imaging element and a signal processing device. BACKGROUND TECHNOLOGY

[0002] An image sensor with a multi-on-chip lens (OCL) structure has been proposed, in which color filters of the same color and an OCL are arranged over a multitude of pixels (see, for example, patent document 1).

[0003] By applying the multi-OCL structure, sensitivity can be improved by adding the multitude of pixels in the dark, and resolution can be improved by performing remosaic processing in the bright.

[0004] Meanwhile, in an image sensor that is built into an electronic device for mobile use, low power consumption and miniaturization are considered important, and there is a need to miniaturize the image sensor by performing, in a chip separate from the image sensor, part of the signal processing, such as remosaic processing, which is generally performed within the image sensor. QUOTE LIST PATENT DOCUMENT

[0005] Patent document 1: Japanese patent application with publication number 2022-114386 SUMMARY OF THE INVENTION PROBLEMS THAT THE INVENTION IS INTENDED TO SOLVE.

[0006] However, remosaic processing is an important function for an image sensor, and in particular, in an image sensor with a multi-OCL structure, it is necessary to perform remosaic processing suitable for a pixel field of a pixel group onto which the light from the on-chip lens falls, and even if the general-purpose remosaic processing is performed on the chip provided outside the image sensor, a high-quality captured image cannot be obtained.

[0007] Therefore, the present disclosure provides an electronic device, a solid-state imaging element, and a signal processing device capable of producing a high-quality captured image even when remosaic processing is performed outside of a solid-state imaging device. SOLUTIONS FOR THE PROBLEMS

[0008] To solve the above problem, an electronic device is provided according to the present disclosure, comprising: a solid-state imaging element; and a signal processing device that performs remosaic processing on an output signal of the solid-state imaging element, wherein the solid-state imaging element includes a large number of pixels arranged in a two-dimensional direction, a multitude of on-chip lenses, each provided for a corresponding group of pixels comprising two or more pixels, and a phase difference-sensitivity difference characteristic removal section that removes a high-frequency component caused by a phase difference and sensitivity difference between two or more pixel signals of the same color that are output for each of the pixel groups.

[0009] The phase difference sensitivity difference characteristic distance section can remove an artifact caused by providing the on-chip lens for each of the pixel groups.

[0010] The pixel group onto which light falls that has passed through one of the on-chip lenses can include two or more pixels of the same color, and The phase difference-sensitivity difference characteristic removal section can remove an artifact caused by a phase difference and a sensitivity difference between the two or more pixel signals output by the two or more pixels of the same color contained in the pixel group onto which light passes through the on-chip lens falls.

[0011] The solid-state imaging element can further comprise a first substrate comprising the plurality of pixels and the plurality of on-chip lenses, each provided for the corresponding pixel groups, and a second substrate stacked on top of the first substrate and comprising the phase difference-sensitivity difference characteristic-distance section.

[0012] The pixel group can comprise the two or more pixels of the same color that are arranged in a predetermined pixel field, and The second substrate can output a pixel signal of the predetermined pixel field, exhibiting a phase difference and sensitivity difference similar to those in a case where the on-chip lens is provided for each pixel after removing a high-frequency component caused by a phase difference and sensitivity difference.

[0013] The second substrate can include a first processing section that generates an intermediate signal based on the two or more pixel signals for each of the pixel groups output by the first substrate, and a second processing section that generates a pixel signal of the predetermined pixel field, from which a high-frequency component caused by a phase difference and a sensitivity difference has been removed based on the intermediate signal.

[0014] The first processing stage can include at least one of a color balance calculation section that calculates a gain to adjust the color balance of each pixel contained in a local area, based on the two or more pixel signals for each of the pixel groups, a direction determination section that determines a gradient of a pixel value at a position of a target pixel, or a flatness determination section that determines whether the pixel value of the target pixel is flat or not, based on the gradient of the pixel value determined by the direction determination section, and the first processing section can generate the intermediate signal, which includes an output signal from at least one of the color compensation calculation section, the direction determination section, or the flatness determination section.

[0015] The second processing stage can include a phase difference-sensitivity difference component extraction section that extracts a phase difference and sensitivity difference component of the two or more pixel signals for each of the pixel groups based on the intermediate signal generated by the first processing section, a low-frequency component extraction section that extracts a low-frequency component in a frequency band lower than the phase difference and sensitivity difference component, based on the intermediate signal generated by the first processing section, and a phase difference-sensitivity difference characteristic removal section that generates a pixel signal of the predetermined pixel field from which a high-frequency component caused by a phase difference and a sensitivity difference has been removed on the basis of the phase difference component, a sensitivity difference and the low-frequency component.

[0016] The first processing section or the second processing section may include a defect detection section that detects a defective pixel, and The phase difference-sensitivity difference characteristic removal section can generate a pixel signal of the predetermined pixel field, from which a high-frequency component, generated by a phase difference and a sensitivity difference, is removed based on the phase difference and sensitivity difference component, the low-frequency component and the defective pixel, which are detected by the defect detection section.

[0017] The signal processing device can output a pixel signal of a reference field that is defined in advance after performing the remosaic processing.

[0018] The reference field can be a Bayer field, and A field in the pixel group can be a different field than the Bayer field.

[0019] The signal processing device can be built into a third substrate, which is arranged separately from the first and second substrates in order to be stacked.

[0020] The signal processing device can perform remosaic processing, which is carried out in a case where the on-chip lens is provided for each pixel.

[0021] According to the present disclosure, a solid-state imaging element is provided which comprises: a first substrate comprising a plurality of pixels arranged in a two-dimensional direction and a plurality of on-chip lenses, each provided for a corresponding group of pixels comprising two or more of the pixels; and a second substrate stacked on top of the first substrate which, without performing remosaic processing, outputs a signal from which a high-frequency component has been removed, caused by a phase difference and a sensitivity difference contained in a multitude of pixel signals output by the first substrate.

[0022] The pixel group onto which light falls that has passed through one of the on-chip lenses can include two or more pixels of the same color, and The second substrate can remove an artifact caused by a phase difference and a sensitivity difference between the two or more pixel signals output by the two or more pixels of the same color contained in the pixel group onto which light passes through the on-chip lens falls.

[0023] The pixel group can comprise the two or more pixels of the same color that are arranged in a predetermined pixel field, and The second substrate can output a pixel signal of the predetermined pixel field, exhibiting a phase difference and sensitivity difference similar to those in a case where the on-chip lens is provided for each pixel after removing a high-frequency component caused by a phase difference and sensitivity difference.

[0024] The second substrate can include a first processing section that generates an intermediate signal based on the two or more pixel signals for each of the pixel groups output by the first substrate, and a second processing section that generates a pixel signal of the predetermined pixel field, from which a high-frequency component caused by a phase difference and a sensitivity difference has been removed based on the intermediate signal.

[0025] The first processing stage can include at least one of a color balance calculation section that calculates a gain to adjust the color balance of each pixel contained in a local area, based on the two or more pixel signals for each of the pixel groups, a direction determination section that determines a gradient of a pixel value at a position of a target pixel, or a flatness determination section that determines whether the pixel value of the target pixel is flat or not, based on the gradient of the pixel value determined by the direction determination section, the first processing section can generate the intermediate signal, which includes an output signal from at least one of the color compensation calculation section, the direction determination section, or the flatness determination section, and the second processing stage can include a phase difference-sensitivity difference component extraction section that extracts a phase difference and sensitivity difference component of the two or more pixel signals for each of the pixel groups based on the intermediate signal generated by the first processing section, a low-frequency component extraction section that extracts a low-frequency component in a frequency band lower than the phase difference and sensitivity difference component, based on the intermediate signal generated by the first processing section, and a phase difference-sensitivity difference characteristic removal section that generates a pixel signal of the predetermined pixel field from which a high-frequency component caused by a phase difference and a sensitivity difference has been removed based on the phase difference and sensitivity difference component and the low-frequency component.

[0026] According to the present disclosure, a signal processing device is provided which comprises: a receiving section that receives a pixel signal output by a solid-state imaging element and from which an artifact caused by providing an on-chip lens for each pixel group comprising two or more pixels has been removed; a remosaic processing section that performs remosaic processing based on a signal received by the receiver section; and an output section that outputs a signal indicating where the remosaic processing was performed.

[0027] The receiving section can receive the pixel signal of a predetermined pixel field, which has a phase difference and a sensitivity difference similar to those in a case where the on-chip lens is provided for each pixel, and The remosaic processing section can perform the remosaic processing that is carried out in a case where the on-chip lens is provided for each pixel. BRIEF DESCRIPTION OF THE DRAWINGS Fig. Figure 1 is a block diagram illustrating a schematic configuration of a solid-state imaging element according to the present disclosure. Fig. Figure 2 is a circuit diagram illustrating a circuit configuration of a pixel. Fig. 3A is a schematic perspective view of a solid-state imaging element with a two-layer structure. Fig. 3B is a schematic perspective view of a solid-state imaging element with a three-layer structure. Fig. Figure 4 is a cross-sectional view illustrating an example of a cross-sectional structure of the solid imaging element according to the present disclosure. Fig. Figure 5 is a more detailed cross-sectional view of a pixel sensor substrate. Fig. Figure 6 is a diagram illustrating an example of a pixel layout and arrangement of on-chip lenses according to the present disclosure. Fig. Figure 7A is a diagram illustrating a pixel layout and arrangement of the on-chip lenses according to a first modification. Fig. Figure 7B is a diagram illustrating a pixel layout and arrangement of the on-chip lenses according to a second modification. Fig. 7C is a diagram illustrating a pixel layout and arrangement of the on-chip lenses according to a third modification. Fig. 7D is a diagram illustrating a pixel layout and arrangement of the on-chip lenses according to a fourth modification. Fig. Figure 8A is a diagram that schematically illustrates a state in which pixel values ​​of a plurality of pixels 32 of the same color, receiving light entering through the same on-chip lens, vary. Fig. Figure 8B is a diagram illustrating an example of an image acquired by a solid-state imaging element with a multi-OCL configuration. Fig. Figure 9 is a block diagram illustrating a schematic configuration of an electronic device comprising a solid-state imaging element according to one embodiment. Fig. Figure 10 is a more detailed block diagram illustrating internal configurations of a first processing section, a second processing section, and a signal processing device. Fig. Figure 11 is a block diagram illustrating a schematic configuration of an electronic device comprising a solid-state imaging element according to a comparative example. Fig. Figure 12 is a block diagram illustrating an example of a schematic configuration of a vehicle control system. Fig. Figure 13 is an explanatory diagram illustrating an example of installation positions of an external vehicle information acquisition section and an imaging section. Mode for executing the invention

[0028] The following describes embodiments of an electronic device, a solid-state imaging element, and a signal processing device with reference to the drawings. Although the main components of the electronic device, the solid-state imaging element, and the signal processing device are primarily described below, the electronic device, the solid-state imaging element, and the signal processing device may have components and functions that are not illustrated or described. The following description is not intended to exclude components and functions that are not illustrated or described.

[0029] Fig. Figure 1 is a block diagram illustrating a schematic configuration of a solid-state imaging element 11 according to the present disclosure. As in Fig. As illustrated in Figure 1, the solid-state imaging element 11 according to the present disclosure comprises a pixel field section 1, a vertical drive circuit 2, a column signal processing circuit 3, a horizontal drive circuit 4, an output circuit 5 and a control circuit 6.

[0030] Pixel field section 1 comprises a plurality of pixels 32 arranged in a first direction X and a second direction Y. A detailed configuration of the pixels 32 is described later. In the present description, the first direction X can be referred to as a row direction or a horizontal direction, and the second direction Y can be referred to as a column direction or a vertical direction. Specific directions of the first direction X and the second direction Y are not limited as long as they intersect.

[0031] The pixel field section 1 comprises a plurality of row selection lines 9, arranged for each pixel group (pixel row) comprising two or more pixels 32 aligned in the first direction X, and a plurality of vertical signal lines VSL, arranged for each pixel group (pixel column) comprising two or more pixels 32 aligned in the second direction Y. The plurality of row selection lines 9 extends in the first direction X and is aligned in the second direction Y. The plurality of vertical signal lines VSL extends in the second direction Y and is aligned in the first direction X. Each plurality of pixels 32 outputs a pixel signal to the corresponding vertical signal line VSL, corresponding to the charge generated by photoelectric conversion.

[0032] The multitude of row selection lines 9 is connected to the vertical control circuit 2. The vertical control circuit 2 sequentially controls the multitude of row selection lines 9, for example, using a shift register. As a result, the pixel signals of the multitude of pixels 32 are output in parallel to the multitude of vertical signal lines VSL for each pixel row of the pixel field section 1.

[0033] The multitude of vertical signal lines VSL is connected to the column signal processing circuit 3. The column signal processing circuit 3 comprises a multitude of analog-to-digital (AD) converters 10, which perform analog-to-digital conversion (hereinafter referred to as AD conversion) of the multitude of pixel signals transmitted through the multitude of vertical signal lines VSL. Additionally, the column signal processing circuit 3 can perform correlated double-sampling (CDS) processing to detect a difference between a signal level of a reset level of each pixel 32 and a pixel signal level according to the charge generated by the photoelectric conversion.

[0034] The horizontal drive circuit 4 selects the plurality of A / D converters 10 in the column signal processing circuit 3 by sequentially outputting horizontal sampling pulses with different phases. As a result, digital pixel signals, which are converted to A / D by the plurality of A / D converters 10, are output sequentially and input into the output circuit 5.

[0035] Output circuit 5 performs various types of digital signal processing on the digital pixel signals and outputs the digital pixel signals. The specific content of the digital signal processing performed by output circuit 5 is arbitrary and includes, for example, adjusting a black level, applying column variation correction, or the like, and the CDS processing described above can be performed.

[0036] The control circuit 6 controls the operating times of the vertical drive circuit 2, the column signal processing circuit 3, and the horizontal drive circuit 4. Additionally, the control circuit 6 provides a reference signal, used for analog-to-digital conversion, to the column signal processing circuit 3. It should be noted that a circuit generating the reference signal can be provided separately from the control circuit 6.

[0037] Fig. Figure 2 is a circuit diagram illustrating a circuit configuration of pixel 32 (hereinafter referred to as pixel circuit 31).

[0038] As in Fig. As illustrated in Figure 2, the pixel circuit 31 according to the present disclosure comprises a photoelectric conversion element 33, a transfer transistor 34, a gain transistor 35, a selection transistor 36, a reset transistor 37 and a discharge transistor 38.

[0039] The photoelectric conversion element 33, for example, is a photodiode 51 and accumulates the charge corresponding to the amount of incident light. Based on a transfer signal TRG input to its gate, the transfer transistor 34 switches whether the charge accumulated in the photodiode 51 is to be transferred to the potential-free diffusion region (hereinafter referred to as FD). The amplification transistor 35 and the selection transistor 36 form a source-follower circuit. A gate of the amplification transistor 35 is connected to the FD, a drain of the amplification transistor 35 is connected to a power supply voltage node VDD, and a source of the amplification transistor 35 is connected to a drain of the selection transistor 36.The selection transistor 36, based on a selection signal SEL applied to its gate, switches whether a pixel signal corresponding to the voltage level of the FD should be output to the vertical signal line VSL. The reset transistor 37, based on a reset signal RST applied to its gate, switches whether the voltage level of the FD should be initialized to the reset level. The discharge transistor 38, based on an OFG signal applied to its gate, switches whether the charge (e.g., electrons) accumulated in the photodiode 51 should be discharged to the power supply voltage node VDD.

[0040] Fig. Figure 2 is an example of the pixel circuit 31, and various modifications can be made. For example, by adding another transfer transistor 34 and placing a memory between the two transfer transistors 34, the pixel circuit 31 can be configured to be compatible with a global shutter method.

[0041] The solid-state imaging element 11 according to the present disclosure can be formed on a substrate or can be formed by dividing it into a plurality of stacked substrates. Fig. Figure 3A is a schematic perspective view of the solid-state imaging element 11 with a two-layer structure and Fig. Figure 3B is a schematic perspective view of the solid imaging element 11 with a three-layer structure.

[0042] The solid-state imaging element 11 in Fig. 3A comprises a first substrate 21 and a second substrate 22, which are stacked. The pixel field section 1 is arranged on the first substrate 21. The pixel field section 1 comprises the plurality of pixels 32, which are aligned in the first direction X and the second direction Y, and each of the pixels 32 comprises the pixel circuit 31.

[0043] A logic circuit 24 is arranged on the second substrate 22. The logic circuit 24 comprises the vertical drive circuit 2, the column signal processing circuit 3, the horizontal drive circuit 4, the output circuit 5, the control circuit 6, and the like. Fig. 1. A plurality of first substrates 21 and a plurality of second substrates 22 are formed, for example, on a semiconductor wafer and then singulated and stacked by singulation. Therefore, the first substrate 21 can be referred to as a first chip and the second substrate 22 can be referred to as a second chip.

[0044] The solid-state imaging element 11 in Fig. 3B comprises the first substrate 21, the second substrate 22, and a third substrate 25, which are stacked. In the solid-state imaging element 11 in Fig. In 3B, the pixel field section 1 is subdivided and arranged into the first substrate 21 and the second substrate 22. Specifically, a first region 23a of the pixel circuit 31, comprising the photodiode in each pixel 32, is arranged on the first substrate 21. A second region 23b of the pixel circuit 31, comprising the plurality of pixel circuits 31, is arranged on the second substrate 22. The logic circuit 24 is arranged on the third substrate 25. The circuit and other components arranged on each substrate for stacking are arbitrary, and various modifications are conceivable. For example, a portion of the logic circuit 24 on the first substrate 21 can be arranged in Fig. 3A and the second substrate 22 in Fig. be arranged in 3B.

[0045] The first substrate 21 and the second substrate 22 in Fig. For example, substrates 3A are connected by a copper-to-copper connection (CCC), a via, a bump, or the like to carry out signal transmission. Similarly, the first substrate 21 and the second substrate 22, and the second substrate 22 and the third substrate 25 in Fig. 3B, for example, is connected by a copper-to-copper connection (CCC), a via, a bump, or the like to carry out signal transmission. (Cross-sectional structure of the solid-state imaging device 11 with a two-layer structure)

[0046] Fig. Figure 4 is a cross-sectional view illustrating an example of a cross-sectional structure of the solid imaging element 11 according to the present disclosure. Fig. Figure 4 illustrates an example where the solid-state imaging element 11, according to the present disclosure, has a two-layer structure, as shown in Fig. Figure 3A illustrates this. Below, between the first substrate 21 and the second substrate 22 to be stacked, the first substrate 21, which is arranged on one side facing the light-incident surface, can be referred to as a pixel sensor substrate 21, and the second substrate 22, which is arranged on the opposite side to the light-incident surface, can be referred to as a logic substrate 22.

[0047] The logic substrate 22 comprises a multilayer wiring layer 82 arranged on a top side (side of the pixel sensor substrate 21) of a semiconductor substrate 81, which, for example, comprises silicon (Si) (hereinafter referred to as silicon substrate 81). The logic circuit 24, which is located in Fig. 3A and Fig. 3B is illustrated, is formed in the multilayer wiring layer 82.

[0048] The multilayer wiring layer 82 comprises a plurality of wiring layers 83, including a top wiring layer 83a, which is closest to the pixel sensor substrate 21, an intermediate wiring layer 83b, a bottom wiring layer 83c, which is closest to the silicon substrate 81, and the like, and an intermediate insulating film 84 formed between the respective wiring layers 83.

[0049] The multitude of wiring layers 83 comprises, for example, copper (Cu), aluminum (Al), tungsten (W), or the like. The interlayer insulating film 84 comprises, for example, a silicon oxide film or a silicon nitride film. With respect to each of the multitude of wiring layers 83 and the interlayer insulating film 84, all layers may comprise the same material, or two or more materials may be used selectively, depending on the layers.

[0050] A silicon through-hole 85 is formed in the silicon substrate 81, penetrating the silicon substrate 81. A connecting conductor 87 is embedded in an inner wall of the silicon through-hole 85 via an insulating film 86 to form a silicon through-hole (TSV) 88. The insulating film 86 can, for example, comprise a SiO2 film, a SiN film, or the like.

[0051] In the silicon through-hole 88, which is located in Fig. As shown in Figure 4, the insulating film 86 and the connecting conductor 87 are formed along an inner wall surface, and the inside of the silicon through-hole 85 is hollow. Depending on the inner diameter, however, the inside of the silicon through-hole 85 can be completely embedded with the connecting conductor 87. In other words, the inside of the through-hole can be embedded with a conductor, or part of the through-hole can be hollow. This applies equally to a chip through-hole (TCV) 105 and the like, which will be described later.

[0052] The connecting conductor 87 of the silicon through-hole 88 is connected to a rewiring 90 formed on a lower surface of the silicon substrate 81. The rewiring 90 is connected to a solder ball 11e. The connecting conductor 87 and the rewiring 90 can comprise, for example, copper (Cu), tungsten (W), polysilicon, or the like.

[0053] A solder mask (solder resist) 91 is formed on the lower surface side of the silicon substrate 81 to cover the rewiring 90 and the insulating film 86 except for an area in which the solder ball 11e is formed.

[0054] On the other hand, the pixel sensor substrate 21 comprises a multilayer wiring layer 102, which is arranged on a bottom side (side of the logic substrate 22) of a semiconductor substrate 101, which, for example, comprises silicon (Si) (hereinafter silicon substrate 101). In the multilayer wiring layer 102 is the pixel circuit 31 of the first substrate 21, which is in Fig. 3A and Fig. 3B illustrates that it is trained.

[0055] The multilayer wiring layer 102 comprises a plurality of wiring layers 103, including a top wiring layer 103a, which is closest to the silicon substrate 101, an intermediate wiring layer 103b, a bottom wiring layer 103c, which is closest to the logic substrate 22, and the like, and an intermediate insulating film 104 formed between the respective wiring layers 103.

[0056] The material used for the multiple wiring layers 103 and the interlayer insulating film 104 can be the same type of material as that used for the wiring layers 83 and the interlayer insulating film 84 described above. Additionally, the multiple wiring layers 103 and the interlayer insulating film 104 can be formed by selectively using one, two, or more materials, similar to the wiring layers 83 and the interlayer insulating film 84 described above.

[0057] It should be noted that in the example of Fig. 4 the multilayer wiring layer 102 of the pixel sensor substrate 21 comprises three wiring layers 103 and the multilayer wiring layer 82 of the logic substrate 22 comprises four wiring layers 83, but the total number of wiring layers is not limited thereto and any number of wiring layers can be used to form the multilayer wiring layer.

[0058] In the silicon substrate 101, the photodiode 51, formed by a PN junction, is formed for each pixel 32. Additionally, although not illustrated, a transfer transistor and the like are also formed on the multilayer wiring layer 102 and the silicon substrate 101.

[0059] At a predetermined position of the silicon substrate 101, where color filters 11c and on-chip lenses 11d are not formed, a silicon via 109, which is connected to the wiring layer 103a of the pixel sensor substrate 21, and the chip via 105, which is connected to the wiring layer 83a of the logic substrate 22, are formed.

[0060] The chip via 105 and the silicon via 109 are connected by a connecting wire 106 formed on a top surface of the silicon substrate 101. Additionally, an insulating film 107 is formed between each of the silicon via 109 and the chip via 105 and the silicon substrate 101. Furthermore, the color filters 11c and the on-chip lenses 11d are formed on the top surface of the silicon substrate 101 via a planarizing film (insulating film) 108.

[0061] As described above, the solid-state imaging element 11, which is located in Fig. Figure 2 illustrates a stacked structure in which the side of the multilayer wiring layer 102 of the logic substrate 22 and the side of the multilayer wiring layer 82 of the pixel sensor substrate 21 are connected to each other. Fig. 4 is a connection surface between the side of the multilayer wiring layer 82 of the logic substrate 22 and the side of the multilayer wiring layer 102 of the pixel sensor substrate 21, indicated by a dashed line.

[0062] Additionally, in the solid-state imaging element 11, the wiring layer 103 of the pixel sensor substrate 21 and the wiring layer 83 of the logic substrate 22 are connected by two vias: the silicon via 109 and the chip via 105. Furthermore, the wiring layer 83 of the logic substrate 22 and the solder ball (back electrode) 11e are connected by the silicon via 88 and the rewiring 90. This allows the size of the solid-state imaging element 11 to be minimized. Moreover, by forming a voidless structure between the solid-state imaging element 11 and a glass substrate 12 and bonding the solid-state imaging element 11 and the glass substrate 12 with an adhesive 13, the height can also be reduced.

[0063] Therefore, according to the solid-state imaging element 11, which is in Fig. Figure 1 illustrates how a semiconductor device (semiconductor package) that has been further miniaturized can be implemented. (Detailed cross-sectional structure of the pixel sensor substrate)

[0064] Fig. Figure 5 is a more detailed cross-sectional view of the pixel sensor substrate. As shown in Fig. As illustrated in Figure 5, the pixel sensor substrate 21 of the present embodiment further comprises the silicon substrate 101, which includes the plurality of pixels 32, the multilayer wiring layer 102, which is arranged on a front surface side of the silicon substrate 101, and an insulating film (hereinafter referred to as the fixed charge film) 220, which includes a fixed charge, an insulating film 221, a light-shielding film 225, the planarization film 108, the color filters 11c and the on-chip lenses 11d, which are arranged in sequence on a rear surface side of the silicon substrate 101.

[0065] The silicon substrate 101 has a thickness of, for example, 1 µm or more and 6 µm or less. In a pixel region of the silicon substrate 101, the plurality of pixels 32, each comprising the photodiode 51 and a plurality of pixel transistors, are formed in a two-dimensional matrix. In addition, the adjacent photodiodes 51 are electrically isolated from each other by an interpixel insulation section 219.

[0066] Photodiode 51 comprises p-type regions 223 and 224, which are formed on the front and back surfaces of the silicon substrate 101, respectively, and an n-type region 222, which is formed between the p-type regions 223 and 224. A pn ​​junction is formed between the p-type regions 223 and 224 and the n-type region 222. In photodiode 51, a signal charge corresponding to the amount of incident light is generated and accumulated in the n-type region 222. Additionally, electrons causing a dark current generated at an interface of the silicon substrate 101 are absorbed by holes that are majority carriers of the p-type regions 223 and 224 formed on the front and back surfaces of the silicon substrate 101, thereby suppressing the dark current.Furthermore, each of the photodiodes 51 is electrically isolated by a p-type region 218 and the interpixel isolation section 219, which is formed in the p-type region 218.

[0067] As in Fig. As illustrated in Figure 5, the FD 55 comprises an (n+)-type region formed by ion implantation of n-type impurities at a high concentration into a p-well layer 229, which is formed on the front surface of the silicon substrate 101. Additionally, a transfer gate electrode 216, which is a gate electrode of the transfer transistor 34, is formed on the front surface of the silicon substrate 101 between the photodiode 51 and the FD 55 via the gate insulating film 217.

[0068] The interpixel isolation section 219 has a trench isolation structure. For example, the interpixel isolation section 219 comprises a trench 239 formed in the depth direction from the back face of the silicon substrate 101, the solid charge film 220 formed to cover an inner side face in the trench 239, and the insulating film 221 embedded in the trench 239 over the solid charge film 220. The interpixel isolation section 219 is formed by trenching into the p-type region 218 formed in the silicon substrate 101. For example, the interpixel isolation section 219 is formed in a lattice shape to surround the pixel 32. Additionally, in a case where a pixel transistor is formed between the two adjacent photodiodes 51, the interpixel isolation section 219 is arranged to overlap the FD 55 and a source / drain region of the pixel transistor in the top view.

[0069] Furthermore, the interpixel isolation section 219 is formed at a depth that reaches the p-well layer 29 in which the pixel transistor is formed, but at a depth that does not reach the FD 55 and the source / drain region. That is, the interpixel isolation section 219 is separated from the back surface (in Fig. 5 the upper surface) of the silicon substrate 101 to a middle position of the silicon substrate 101 in the thickness direction.

[0070] The trench 239, which forms the interpixel insulation section 219, opens towards the back face of the silicon substrate 101 and has a bottom surface in the silicon substrate 101. The trench 239 is formed at a depth that does not reach the front face of the silicon substrate 101. For example, if the silicon substrate 101 has a thickness of 1 µm or more and 6 µm or less, the trench 239 is formed at a depth of 0.25 µm or more and 5.0 µm or less from the back face of the silicon substrate 101.

[0071] It should be noted that, although a case in which the interpixel isolation section 219 is formed to have the depth that the p-tub layer 229 reaches, in Fig. As illustrated in Figure 5, the interpixel isolation section need not necessarily have a depth that reaches the p-tub layer 229. For example, the interpixel isolation section 219 may not reach the p-tub layer 229 and may be configured to remain within the p-type region 218. Even in a configuration where the interpixel isolation section 219 does not reach the p-tub layer 229, the isolation effect can still be achieved.

[0072] Additionally, the fixed charge film 220, which is formed in the trench 239, is formed on an inner circumferential surface and the bottom surface of the trench 239 and is formed on the entire back surface of the silicon substrate 101. It should be noted that in the following description, the inner circumferential surface and the bottom surface of the trench 239 are collectively referred to as an "inner wall surface". Preferably, the fixed charge film 220 is a material capable of improving pinning by being deposited on a substrate comprising silicon or the like to generate fixed charges, and a material film with a high refractive index or a film with a high dielectric constant exhibiting a negative charge can be used.

[0073] For example, an oxide or nitride containing at least one of the elements hafnium (Hf), aluminum (Al), zirconium (Zr), tantalum (Ta), or titanium (Ti) can be deposited as a specific material for the solid-charge film 220. Examples of methods for forming the solid-charge film 220 include a chemical vapor deposition (CVD) process, a sputtering process, an atomic layer deposition (ALD) process, and the like. By using the ALD process, the SiO₂ film, which reduces the interfacial state during film formation, can be simultaneously formed to a film thickness of approximately 1 nm.In addition, examples of materials other than those listed above for the fixed charge film include 220 oxides, nitrides, or the like, containing at least one of the elements lanthanum (La), praseodymium (Pr), cerium (Ce), neodymium (Nd), promethium (Pm), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), thulium (Tm), ytterbium (Yb), lutetium (Lu), and yttrium (Y). Furthermore, the fixed charge film described above can be formed using a hafnium oxynitride film or an aluminum oxynitride film.

[0074] Silicon (Si) or nitrogen (N) can be added to the material of the solid charge film 220 described above within a range that does not impair its insulating properties. The concentration is conveniently determined within this range. As described above, the addition of silicon (Si) or nitrogen (N) increases the heat resistance of the film and its ability to prevent ion implantation during the process.

[0075] In the present embodiment, since the solid charge film 220, which has a negative charge, is formed on the inner wall surface of the trench 239 and the back surface of the silicon substrate 101, an inversion layer is formed on a surface in contact with the solid charge film 220. As a result, since the silicon interface is pinned by the inversion layer, the generation of dark current is suppressed. Additionally, if the trench 239 is formed in the silicon substrate 101, physical damage can occur on the side wall and bottom surface of the trench 239, and pinning failure can occur in a circumferential region of the trench 239. With regard to this problem, pinning failure is prevented in the present embodiment by forming the solid charge film 220, which has a large amount of solid charges, on the side wall and bottom surface of the trench 239.

[0076] The insulating film 221 is embedded in the groove 239 in which the fixed-charge film 220 is formed and extends across the entire back surface of the silicon substrate 101. Preferably, the insulating film 221 is made of a material with a refractive index different from that of the fixed-charge film 220; for example, silicon oxide, silicon nitride, silicon oxynitride, resin, or the like may be used. Additionally, a material with the property of having no positive fixed charge or having a small positive fixed charge may be used for the insulating film 221.

[0077] Then, when the trench 239 is embedded in the insulating film 221, the photodiode 51, which forms each pixel 32, is separated across the insulating film 221. As a result, it is less likely that signal charges will leak into the neighboring pixel 32, and thus, in a case where signal charges exceeding a saturation charge amount (Qs) are generated, leakage of signal charges that have spilled over into the neighboring photodiode 51 can be reduced. Therefore, electronic color mixing can be suppressed.

[0078] Additionally, the two-layer structure of the solid charge film 220 and the insulating film 221, which are formed on the back surface (the incident surface of the silicon substrate 101), acts as an antireflection film due to a difference in refractive index. As a result, reflection of light incident on the back surface of the silicon substrate 101 is prevented.

[0079] The light-shielding film 225 is formed in a desired area on the insulating film 221, which is formed on the back surface of the silicon substrate 101, and is formed in a grid shape to open the photodiode 51 in the pixel area. That is, the light-shielding film 225 is formed at a position corresponding to the interpixel insulating section 219. The light-shielding film 225 is formed at a position that overlaps the interpixel insulating section 219 in the top view. Any material can be used as the material forming the light-shielding film 225, as long as it blocks light; for example, tungsten (W), aluminum (Al), or copper (Cu) can be used.

[0080] The planarization film 108 is formed over the entire surface of the insulating film 221, which encompasses the light-shielding film 225, thereby planarizing the surface on the back side of the silicon substrate 101. For example, an organic material such as a resin can be used as the material of the planarization film 108.

[0081] The color filters 11c are formed on an upper surface of the planarization film 108 and are configured for the respective pixels 32, which correspond, for example, to red (R), green (G), and blue (B). Light with a desired wavelength is transmitted through each of the color filters 11c, and the transmitted light falls onto the photodiode 51 in the silicon substrate 101.

[0082] The on-chip lenses 11d are formed on the upper surfaces of the color filters 11c. The incident light is condensed in the on-chip lenses 11d, and the condensed light efficiently passes through the color filter 11c onto each photodiode 51.

[0083] In the pixel sensor substrate 21 with the above configuration, light is emitted from the back surface (in Fig. 5 the upper surface) of the silicon substrate 101, and light transmitted through the on-chip lenses 11d and the color filters 11c is photoelectrically converted by the photodiode 51, thereby generating signal charges. The signal charge generated by the photodiode 51 is then used as the pixel signal via the vertical signal line VSL 41 (see, for example, Figure 5). Fig. 4), which is configured by part of the multilayer wiring layer 102, is output via the pixel transistor formed on the front surface side of the silicon substrate 101. (Pixel layout and OCL)

[0084] Fig. Figure 6 is a diagram illustrating an example of a pixel layout and arrangement of the on-chip lenses 11d according to the present disclosure. As in Fig. As illustrated in Figure 6, an on-chip lens 11d is arranged for each pixel group, comprising 2 × 2 pixels 32 of the same color, arranged adjacent in the first direction X and the second direction Y. The pixel groups adjacent in the first direction X and the second direction Y have different colors, and one red and one blue pixel group are provided with respect to two green pixel groups. In this way, each pixel group has a Bayer field.

[0085] As in Fig. As illustrated in detail in Figure 5, the intermediate pixel isolation section 219 is located in a boundary region of the pixels 32. By arranging the intermediate pixel isolation sections 219 in the boundary region of pixels 32 of the same color and the boundary region of pixels 32 of a different color, color mixing is suppressed. Additionally, by providing an on-chip lens 11d for each pixel group comprising the plurality of pixels 32 of the same color, sensitivity in dark conditions can be improved by adding pixel values ​​from the plurality of pixels 32 of the same color, and resolution in bright conditions can be improved by performing remosaic processing of changing the field of the plurality of pixels 32 for each color.

[0086] Fig. Figure 6 is merely an example of the pixel layout and the arrangement of the on-chip lenses 11d, and various modifications are conceivable. Representative modifications from the first to the fourth are described below in sequence.

[0087] Fig. Figure 7A is a diagram illustrating a pixel layout and arrangement of the on-chip lenses 11d according to a first modification. Fig. 7A is an on-chip lens 11d arranged for each pixel group comprising 2 × 1 pixels of the same color. Five green pixel groups are arranged side by side in the first direction X and the second direction Y, and each of four red pixel groups and four blue pixel groups is arranged side by side in the first direction X and the second direction Y. The planar shape of the on-chip lens 11d is elliptical.

[0088] Fig. Figure 7B is a diagram illustrating a pixel layout and arrangement of the on-chip lenses 11d according to a second modification. Fig. 7B is an on-chip lens 11d arranged for each pixel group comprising 3 × 3 pixels of the same color. The colors of pixel groups adjacent in the first direction X and the second direction Y are different, and the pixel groups are arranged in a ratio of two green pixel groups to one red and one blue pixel group.

[0089] Fig. Figure 7C is a diagram illustrating a pixel layout and arrangement of the on-chip lenses 11d according to a third modification. Fig. 7C is an on-chip lens 11d arranged for each pixel group, comprising 4 × 4 pixels of the same color. The colors of pixel groups adjacent in the first direction X and the second direction Y are different, and the pixel groups are arranged in a ratio of two green pixel groups and one each of red and blue pixel groups.

[0090] Fig. 7D is a diagram illustrating a pixel layout and arrangement of the on-chip lenses 11d according to a fourth modification. In Fig. 7D is an on-chip lens 11d arranged for each pixel group comprising 2 × 2 pixels of the same color. Additionally, in the fourth modification, two pixel groups of 2 × 2 pixels of the same color are arranged in each of the first direction X and the second direction Y. A multitude of pixel areas are arranged in the first direction X and the second direction Y in units of pixel areas comprising 2 × 2 pixel groups of the same color. Fig. 7D. The colors of pixel areas that are adjacent in the first direction X and the second direction Y are different, and the pixel areas are arranged in a ratio of two green pixel areas to one each of red and blue pixel areas.

[0091] In the solid-state imaging element 11 with the multi-OCL configuration, in which the on-chip lenses 11d are arranged for each pixel group comprising the plurality of pixels 32 of the same color, the pixel values ​​of the plurality of pixels 32 receiving light incident through an on-chip lens 11d are not necessarily the same, and a variation occurs. Fig. Figure 8A is a diagram that schematically illustrates a state in which the pixel values ​​of the plurality of pixels 32 of the same color, receiving light incident through the same on-chip lens 11d, vary. The pixel value of each pixel 32 varies for each pixel group, and the nature of the variation is not necessarily uniform.

[0092] Fig. Figure 8B is a diagram illustrating an example of an image acquired by the solid-state imaging element 11 with the multi-OCL configuration. As shown in Fig. Figure 8B illustrates how the pixel values ​​of the multitude of pixels 32, which receive light entering through an on-chip lens 11d, appear when the pixel values ​​of the multitude of pixels 32, which receive light entering through an on-chip lens 11d, as in Fig. Figure 8A illustrates that stripes not present in the original image appear in the captured image, resulting in a deterioration in image quality. Such image quality deterioration can be described as an artifact.

[0093] The solid-state imaging element 11 according to the present embodiment is characterized in that it takes measures such that an image quality degradation, which is typical for the multi-OCL configuration as described in Fig. 8B illustrates that it is unique, does not occur, and is particularly characterized by removing the artifact caused by providing the on-chip lens 11d for each pixel group.

[0094] Fig. Figure 9 is a block diagram illustrating a schematic configuration of an electronic device 41 comprising the solid-state imaging element 11 according to the embodiment. As shown in Fig. As illustrated in Figure 9, an electronic device 41 according to the embodiment comprises the solid-state imaging element 11 and a signal processing device 42. The solid-state imaging element 11, for example, has a two-layer structure and comprises the first substrate 21 and the second substrate 22, which are stacked. The pixel field section 1 is arranged on the first substrate 21, and the logic circuit 24 is arranged on the second substrate 22. The logic circuit 24 comprises a first processing section 43 and a second processing section 44. It should be noted that at least part of the first processing section 43 or the second processing section 44 may be arranged on the first substrate 21.

[0095] The first processing section 43 generates an intermediate signal based on two or more pixel signals for each pixel group. The first processing section 43 can be referred to as a preprocessing section, as it performs preprocessing for the second processing section 44. The second processing section 44 generates a pixel signal for a predetermined pixel field, from which a high-frequency component, caused by the phase difference and the sensitivity difference, is removed based on the intermediate signal.

[0096] After the high-frequency component caused by the phase difference and sensitivity difference is removed, the solid-state imaging element 11 outputs a pixel signal of a predetermined pixel field according to a case in which the on-chip lens 11d is provided for each pixel 32. In the case in which the on-chip lens 11d is provided for each pixel 32, and in the case in which the on-chip lens 11d is provided for each pixel group, the phase difference and sensitivity difference between the same colors of adjacent pixels 32 of the same color are different, and "according to the case in which the on-chip lens 11d is provided for each pixel 32" means that the phase difference and sensitivity difference are similar to those in the case in which the on-chip lens 11d is provided for each pixel 32.That is, the solid-state imaging element 11 according to the present embodiment outputs the pixel signal of the predetermined pixel field, which has the phase difference and the sensitivity difference similar to those in the case where the on-chip lens 11d is provided for each pixel 32. The predetermined pixel field indicates a field of each pixel 32 that forms the pixel group of the solid-state imaging element 11. For example, if the pixel group of the solid-state imaging element 11 is a field, as in . Fig. Figure 6 illustrates the output of a pixel signal from a pixel column comprising two green pixels 32 and one each of red and blue pixels 32.

[0097] The signal processing device 42 comprises a receiving section 58, a remosaic processing section 59 and an output section 60.

[0098] The receiving section 58 receives the pixel signal output by the solid-state imaging element 11, from which an artifact is removed. This artifact is caused by providing the on-chip lens 11d for each pixel group comprising two or more pixels 32. More precisely, the receiving section 58 receives the pixel signal of the predetermined pixel field, which has a phase difference and sensitivity difference similar to those in a case where the on-chip lens 11d is provided for each pixel 32.

[0099] The remosaic processing section 59 performs remosaic processing on the pixel signal output by the solid-state imaging element 11. The remosaic processing performed by the signal processing device 42 is a general-purpose remosaic processing operation, which is carried out in a case where the on-chip lens 11d is provided for each pixel 32. The signal processing device 42 is, for example, an application processor (hereinafter referred to as an AP).

[0100] Output section 60 outputs the signal that has undergone remosaic processing.

[0101] As described above, the configuration of the solid-state imaging element 11 can be simplified because, according to the embodiment, the remosaic processing is not performed within the solid-state imaging element 11. Additionally, according to the embodiment, the solid-state imaging element 11 performs processing to remove the artifact caused by providing the on-chip lens 11d for each pixel group and outputs a pixel signal equivalent to a case where the on-chip lens 11d is provided for each pixel 32. As a result, it is sufficient to perform the multi-purpose remosaic processing in the signal processing device 42, and the configuration of the signal processing device 42 can be simplified.This means that even if the signal processing device 42 performs the multi-purpose remosaic processing, the electronic device 41 according to the present embodiment can produce a high-quality captured image because the solid-state imaging element 11 performs the artifact removal processing.

[0102] Fig. Figure 10 is a more detailed block diagram illustrating the internal configurations of the first processing section 43, the second processing section 44, and the signal processing device 42. It should be noted that in Fig. 10 the receiving section 58 and the output section 60 in the signal processing device 42 are omitted.

[0103] The first processing section 43 includes at least one of a calculation section 50 for local color compensation (LCB), a direction determination section 52 or a flatness determination section 53. Fig. 9 and Fig. Figure 10 illustrates an example in which the LCB calculation section 50, the direction determination section 52 and the flatness determination section 53 are provided in the first processing section 43, but it is not always necessary to include all three of these.

[0104] The LCB calculation section 50 calculates a color balance for each pixel 32 contained in a local area, based on two or more pixel signals for each pixel group, and calculates and outputs an LCB gain for adjusting the color balance. The local area is a region of a specific size (for example, 5 × 5 pixels, 6 × 6 pixels, and the like) to obtain the gradient of the pixel value. More precisely, the LCB calculation section 50 performs a color balance adjustment (for example, a white balance adjustment) based on the pixel value of each color contained in the local area and calculates a red gain lcb_gain_r with respect to green and a blue gain lcb_gain_b with respect to green. The LCB calculation section 50 provides two or more pixel signals for each pixel group and the gains lcb_gain_r and lcb_gain_b to the direction determination section 52.In the present description, the gains lcb_gain_r and lcb_gain_b can be referred to as LCB gains.

[0105] The direction-determining section 52 determines the gradient of the pixel value at the position of a target pixel. More precisely, the direction-determining section 52 detects the gradient of the pixel value at the position of the target pixel for each direction based on two or more pixel signals for each pixel group and the LCB gain, and determines the direction in which the detected gradient is smallest. The direction-determining section 52 determines a gradient between pixels of the same color and a gradient between pixels of different colors.

[0106] The flatness determination section 53 determines whether the pixel value of the target pixel is flat or not, based on the gradient of the pixel value determined by the direction determination section 52.

[0107] The LCB gain calculated by the LCB calculation section 50, the signal indicating the determination result of the direction determination section 52, and the signal indicating the determination result of the flatness determination section 53 are collectively referred to as intermediate signals.

[0108] The second processing section 44 includes a defect detection section 54, a phase difference sensitivity difference component extraction section 55, a DC component extraction section 56 and a phase difference sensitivity difference characteristic removal section 57.

[0109] The defect detection section 54 detects a defective pixel 32. The defect detection section 54 can be provided in the first processing section 43 instead of being provided in the second processing section 44.

[0110] The phase difference-sensitivity difference component extraction section 55 extracts phase difference and sensitivity difference components from two or more pixel signals for each pixel group based on the intermediate signal output by the first processing section 43. The phase difference and sensitivity difference components extracted by the phase difference-sensitivity difference component extraction section 55 are high-frequency components.

[0111] The DC component extraction section 56 extracts a DC component based on the intermediate signal output by the first processing section 43. More precisely, the DC component is a low-frequency component that has passed through a low-pass filter. For the sake of simplicity, in this description, the low-frequency component is referred to as the DC component.

[0112] Based on the signal indicating the detection result of the defective pixel 32, the phase difference and sensitivity difference components extracted by the phase difference-sensitivity difference component extraction section 55, and the DC component extracted by the DC component extraction section 56, the phase difference-sensitivity difference characteristic removal section 57 generates a pixel signal of a predetermined pixel field from which a high-frequency component generated by the phase difference and the sensitivity difference is removed. The phase difference-sensitivity difference characteristic removal section 57 removes the high-frequency component generated by the phase difference and the sensitivity difference.More precisely, the phase difference-sensitivity difference characteristic distance section 57 generates the pixel signal of the predetermined pixel field, which has the phase difference and sensitivity difference similar to those in a case where the on-chip lens 11d is provided for each pixel 32.

[0113] As described above, the second processing section 44 removes the high-frequency component caused by the phase difference and sensitivity difference contained in the pixel signal of the predetermined pixel field output by the solid-state imaging element 11, which includes the on-chip lens 11d for each pixel group, and produces the pixel signal of the predetermined pixel field which has the phase difference and sensitivity difference similar to those in the case where the on-chip lens 11d is provided for each pixel 32.

[0114] The signal processing device 42 includes the remosaic processing section 59. The remosaic processing section 59 performs the multi-purpose remosaic processing, which is carried out in a case where the on-chip lens 11d is provided for each pixel 32. The remosaic processing section 59 includes, for example, a direction determination section 61, a flatness determination section 62, a high-frequency G-plane calculation section 63, a DC component extraction section 64, and a correlation interpolation processing section 65.

[0115] The direction determination section 61 determines the gradient of the pixel value at the position of a target pixel.

[0116] The flatness determination section 53 determines whether the pixel value of the target pixel is flat or not, based on the gradient of the pixel value determined by the direction determination section 61.

[0117] The high-frequency G-plane calculation section 63 performs interpolation processing over the entire image area based on the signal indicating the determination result of the direction determination section 61 and the signal indicating the determination result of the flatness determination section 62, generating a total surface G-pixel signal. This total surface G-pixel signal is a high-frequency component signal.

[0118] The DC component extraction section 64 extracts the DC component based on the signal indicating the determination result of the direction determination section 61 and the signal indicating the determination result of the flatness determination section 62. More precisely, the DC component is a low-frequency component that has passed through a low-pass filter.

[0119] The correlation interpolation processing section 65 generates a pixel signal of a reference field based on the total surface G-pixel signal calculated by the high-frequency G-plane calculation section 63 and the DC component extracted by the DC component extraction section 64. The reference field is, for example, a Bayer field.

[0120] Fig. Figure 11 is a block diagram illustrating a schematic configuration of an electronic device 41a comprising a solid-state imaging element 11a according to a comparative example. The electronic device 41a according to the comparative example comprises the solid-state imaging element 11 and the signal processing device 42 similar to Fig. 9.

[0121] As in Fig. As illustrated in Figure 10, the solid-state imaging element 11a, according to the comparative example, comprises the first processing section 43 and a second processing section 44a. The first processing section 43 in Fig. 11 carries out the processing similarly to the first processing section 43 in Fig. 9 through, whereas the second processing section 44a in Fig. 10 performs a processing operation that differs from that of the second processing section 44a in Fig. 9 distinguishes.

[0122] The second processing section 44a in Fig. 11 includes a remosaic processing section 59a in addition to the phase difference-sensitivity difference-characteristic-distance section 57. The remosaic processing section 59a, which is in the second processing section 44a in Fig. 11 is provided, is based on providing the on-chip lens 11d for each pixel group and performs the optimized remosaic processing for the pixel field that forms the pixel group.

[0123] Since the solid-state imaging element 11a performs the optimized remosaic processing according to the comparative example in a case where the on-chip lens 11d is provided for each pixel group, it is not necessary to perform the remosaic processing in the signal processing device 42 in the subsequent stage.

[0124] However, the internal configuration of the solid-state imaging element 11a according to the comparative example is more complicated than that of the solid-state imaging element 11 according to the present embodiment; the chip size increases and the power consumption also increases.

[0125] As described above, the solid-state imaging element 11, according to the embodiment, performs phase-difference sensitivity difference (SDD) removal processing to remove the artifact caused by providing the on-chip lens 11d for each pixel group, but does not perform remosaic processing. Additionally, the solid-state imaging element 11 outputs the pixel signal of the predetermined pixel field in a case where the on-chip lens 11d is provided for each pixel 32. Therefore, the signal processing device 42 in the subsequent stage of the solid-state imaging element 11 can generate a high-quality captured image by performing multi-purpose remosaic processing in a case where the on-chip lens 11d is provided for each pixel 32.

[0126] According to the present embodiment, since the configuration of the solid-state imaging element 11 can be simplified, miniaturization, low power consumption and low cost of the solid-state imaging element 11 can be implemented, and, for example, the solid-state imaging element 11 can be provided that is suitable for mobile applications. <Anwendungsbeispiel auf mobile Körper>

[0127] The technology according to the present disclosure (present technology) can be applied to various products. For example, the technology according to the present disclosure can be implemented as a device to be mounted on a mobile body of any kind, such as an automobile, an electric car, a hybrid electric car, a motorcycle, a bicycle, a personal mobility device, an aircraft, a drone, a ship, or a robot.

[0128] Fig. Figure 12 is a block diagram illustrating a schematic configuration example of a vehicle control system as an example of a system for controlling moving bodies to which the technology according to the present disclosure can be applied.

[0129] A vehicle control system 12000 comprises a multitude of electronic control units interconnected via a communication network 12001. In the Fig. In the 12 illustrated example, the vehicle control system 12000 comprises a powertrain control unit 12010, a body control unit 12020, an information detection unit from outside the vehicle 12030, an information detection unit from inside the vehicle 12040, and an integrated control unit 12050. Additionally, a microcomputer 12051, an audio / video output section 12052, and a vehicle-mounted network interface (I / F) 12053 are illustrated as a functional configuration of the integrated control unit 12050.

[0130] The 12010 drive system control unit controls the operation of devices related to the vehicle's drive system according to various types of programs. For example, the 12010 drive system control unit acts as a control device for a power generation device to produce the vehicle's motive power, such as an internal combustion engine, a drive motor, or the like; a power transmission mechanism to transfer the motive power to the wheels; a steering mechanism to adjust the vehicle's steering angle; a braking device to generate the vehicle's braking force; and the like.

[0131] The 12020 body control unit controls the operation of various types of devices provided to a vehicle body according to different programs. For example, the 12020 body control unit acts as a control device for a keyless entry system, a smart key system, power windows, or various types of lights, such as headlights, reversing lights, brake lights, turn signals, fog lights, and the like. In this case, radio waves transmitted by a mobile device as an alternative to a key, or signals from various types of switches, can be input into the 12020 body control unit.The body control unit 12020 receives these input radio waves or signals and controls a door locking device, the window lifting device, the lights or the like of the vehicle.

[0132] The external vehicle information detection unit 12030 captures information about the exterior of the vehicle, including the vehicle control system 12000. For example, the external vehicle information detection unit 12030 is connected to an imaging section 12031. The external vehicle information detection unit 12030 causes the imaging section 12031 to capture an image of the exterior of the vehicle and receives the captured image. Based on the received image, the external vehicle information detection unit 12030 can perform processing to detect an object, such as a person, a vehicle, an obstacle, a sign, a marking on a road surface, or the like, or processing to detect the distance to it.

[0133] Imaging section 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. Imaging section 12031 can output the electrical signal as an image or as information about a measured distance. Additionally, the light received by imaging section 12031 can be visible light or invisible light, such as infrared radiation.

[0134] The vehicle interior information detection unit 12040 captures information about the interior of the vehicle. For example, the vehicle interior information detection unit 12040 is connected to a driver condition detection section 12041, which captures the driver's condition. The driver condition detection section 12041 includes, for example, a camera that captures an image of the driver. Based on the captured information input from the driver condition detection section 12041, the vehicle interior information detection unit 12040 can calculate the driver's fatigue level, the driver's concentration level, or determine whether the driver is likely to doze off.

[0135] The microcomputer 12051 can calculate a control setpoint for the propulsion force generation device, the steering mechanism or the braking device based on information about the inside or outside of the vehicle, the information being obtained by the unit for detecting information from outside the vehicle 12030 or the unit for detecting information from inside the vehicle 12040, and issue a control command to the propulsion system control unit 12010.For example, the 12051 microcomputer can perform cooperative control intended to implement functions of an Advanced Driver Assistance System (ADAS), where the functions include collision avoidance or shock mitigation for the vehicle, following distance control, maintaining a vehicle speed, warning of an impending collision, warning of a vehicle leaving its lane, or the like.

[0136] Additionally, the microcomputer 12051 can perform cooperative control intended for automated driving, causing the vehicle to drive automatically without dependence on the operation of the driver or the like, by controlling the propulsion power generation device, steering mechanism, braking device or the like, based on information about the outside or inside of the vehicle, the information being obtained by the unit for detecting information from outside the vehicle 12030 or the unit for detecting information from inside the vehicle 12040.

[0137] Furthermore, the microcomputer 12051 can issue a control command to the body control unit 12030 based on information about the vehicle's exterior, the information being obtained by the external information detection unit 12030. For example, the microcomputer 12051 can perform cooperative control to prevent glare by controlling the headlight to switch from high beam to low beam, for example, according to the position of a vehicle ahead or an oncoming vehicle, which is detected by the external information detection unit 12030.

[0138] The audio / video output section 12052 transmits an output signal of at least one sound and one image to an output device capable of conveying information visually or audibly to an occupant of the vehicle or to the exterior of the vehicle. In the example of Fig. Figure 12 illustrates the output device as an audio loudspeaker 12061, a display section 12062, and an instrument panel 12063. The display section 12062 can, for example, include at least one onboard display and one head-up display.

[0139] Fig. Figure 13 is a diagram illustrating an example of the installation positions of the imaging section 12031.

[0140] In Fig. 13 imaging sections 12101, 12102, 12103, 12104 and 12105 are included as imaging section 12031.

[0141] Imaging sections 12101, 12102, 12103, 12104 and 12105 are, for example, located at positions on the front of the vehicle 12100, on the side mirrors, on the rear bumper and on the rear door, as well as at a position on the upper part of a windscreen inside the interior of the vehicle. Imaging section 12101, located at the front, and imaging section 12105, located at the top of the windshield inside the vehicle, primarily capture an image of the front of the vehicle 12100. Imaging sections 12102 and 12103, located at the side mirrors, primarily capture an image of the sides of the vehicle 12100. Imaging section 12104, located at the rear bumper or rear door, primarily captures an image of the rear of the vehicle 12100.The imaging section 12105, which is provided at the top of the windshield inside the vehicle's interior, is mainly used to detect a vehicle ahead, a pedestrian, an obstacle, a signal, a traffic sign, a lane, or the like.

[0142] It should be noted that Fig.Figure 13 illustrates an example of imaging areas of imaging sections 12101 to 12104. Imaging area 12111 represents the imaging area of ​​imaging section 12101, which is provided at the front. Imaging areas 12112 and 12113 represent the imaging areas of imaging sections 12102 and 12103, respectively, which are provided at the side mirrors. Imaging area 12114 represents the imaging area of ​​imaging section 12104, which is provided at the rear bumper or rear door. A bird's-eye view image of the vehicle 12100, as seen from above, is obtained, for example, by overlaying image data mapped by imaging sections 12101 to 12104.

[0143] At least one of the imaging sections 12101 to 12104 can have a function for obtaining distance information. For example, at least one of the imaging sections 12101 to 12104 can be a stereo camera formed from a plurality of imaging elements, or can be an imaging element that has pixels for phase difference detection.

[0144] For example, the microcomputer 12051 can determine a distance to each three-dimensional object within the imaging areas 12111 to 12114 and a change in distance over time (relative speed with respect to the vehicle 12100) based on the distance information obtained from the imaging sections 12101 to 12104, and thereby extract a next three-dimensional object as a preceding vehicle, which is present in particular on a path of the vehicle 12100 and which is traveling in essentially the same direction as the vehicle 12100 at a predetermined speed (for example, equal to or greater than 0 km / hour).Furthermore, the 12051 microcomputer can set a following distance to be maintained in advance of a vehicle ahead and perform automatic braking control (including subsequent stop control), automatic acceleration control (including subsequent start control), or similar functions. It is thus possible to implement cooperative control intended for automated driving, which allows the vehicle to drive autonomously without relying on driver input or similar actions.

[0145] For example, the microcomputer 12051 can classify three-dimensional object data about three-dimensional objects into three-dimensional object data of a two-wheeled vehicle, a standard vehicle, a large vehicle, a pedestrian, a telephone pole, and other three-dimensional objects based on the distance information obtained from the imaging sections 12101 to 12104, extract the classified three-dimensional object data, and use the extracted three-dimensional object data for automatic obstacle avoidance. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 as obstacles that the driver of the vehicle 12100 can visually detect and obstacles that are difficult for the driver of the vehicle 12100 to visually detect. Then, the microcomputer 12051 determines a collision risk, which indicates the likelihood of a collision with each obstacle.In a situation where the risk of collision is equal to or greater than a set value, and thus a collision is possible, the microcomputer 12051 issues a warning to the driver via the audio speaker 12061 or the display section 12062 and initiates forced deceleration or evasive steering via the drive system control unit 12010. The microcomputer 12051 can thus assist the driver in avoiding a collision.

[0146] At least one of the imaging sections 12101 to 12104 can be an infrared camera that detects infrared radiation. The microcomputer 12051 can, for example, detect a pedestrian by determining whether or not a pedestrian is present in the images displayed by imaging sections 12101 to 12104. Such pedestrian detection is performed, for example, by a method for extracting characteristic points from the images displayed by the infrared cameras of imaging sections 12101 to 12104 and a method for determining whether it is the pedestrian or not by performing pattern matching processing on a series of characteristic points that represent the object's contour.When the microcomputer 12051 determines that a pedestrian is present in the images displayed by imaging sections 12101 to 12104, and thus detects the pedestrian, the audio / video output section 12052 controls the display section 12062 to display a square outline for emphasis, superimposed on the detected pedestrian. The audio / video output section 12052 can also control the display section 12062 to display a symbol or similar element representing the pedestrian at a desired position.

[0147] An example of the vehicle control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to imaging section 12031 and the like, for example, under the configurations described above. By applying the technology according to the present disclosure to imaging section 12031, a high-quality captured image can be obtained.

[0148] It should be noted that the present technology can have the following configurations. (1) Electronic device comprising: a solid-state imaging element; and a signal processing device that performs remosaic processing on an output signal of the solid-state imaging element, wherein the solid-state imaging element includes a large number of pixels arranged in a two-dimensional direction, a multitude of on-chip lenses, each provided for a corresponding group of pixels comprising two or more pixels, and a phase difference-sensitivity difference characteristic removal section that removes a high-frequency component caused by a phase difference and sensitivity difference between two or more pixel signals of the same color that are output for each of the pixel groups. (2) Electronic device according to (1), wherein The phase difference sensitivity difference characteristic distance section removes an artifact caused by providing the on-chip lens for each of the pixel groups. (3) Electronic device according to (2), wherein the pixel group onto which light falls that has passed through one of the on-chip lenses, which includes two or more pixels of the same color, and The phase difference-sensitivity difference characteristic removal section removes an artifact caused by a phase difference and a sensitivity difference between the two or more pixel signals output by the two or more pixels of the same color contained in the pixel group onto which light passes through the on-chip lens falls. (4) Electronic device according to one of (1) to (3), wherein the solid-state imaging element further includes a first substrate comprising the multitude of pixels and the multitude of on-chip lenses, each provided for the corresponding pixel groups, and a second substrate stacked on top of the first substrate and comprising the phase difference-sensitivity difference characteristic-distance section. (5) Electronic device according to (4), wherein the pixel group comprising two or more pixels of the same color arranged in a predetermined pixel field, and the second substrate outputs a pixel signal of the predetermined pixel field, which has a phase difference and a sensitivity difference similar to those in a case where the on-chip lens is provided for each pixel after a high-frequency component caused by a phase difference and a sensitivity difference has been removed. (6) Electronic device according to (5), wherein the second substrate includes a first processing section that generates an intermediate signal based on the two or more pixel signals for each of the pixel groups output by the first substrate, and a second processing section that generates a pixel signal of the predetermined pixel field, from which a high-frequency component caused by a phase difference and a sensitivity difference has been removed based on the intermediate signal. (7) Electronic device according to (6), wherein the first processing stage comprises at least one of a color balance calculation section that calculates a gain to adjust the color balance of each pixel contained in a local area, based on the two or more pixel signals for each of the pixel groups, a direction determination section that determines a gradient of a pixel value at a position of a target pixel, or a flatness determination section that determines whether the pixel value of the target pixel is flat or not, based on the gradient of the pixel value determined by the direction determination section, and the first processing section generates the intermediate signal, which includes an output signal from at least one of the color compensation calculation section, the direction determination section, or the flatness determination section. (8) Electronic device according to (6) or (7), wherein the second processing stage includes a phase difference-sensitivity difference component extraction section that extracts a phase difference and sensitivity difference component of the two or more pixel signals for each of the pixel groups based on the intermediate signal generated by the first processing section, a low-frequency component extraction section that extracts a low-frequency component in a frequency band lower than the phase difference and sensitivity difference component, based on the intermediate signal generated by the first processing section, and a phase difference-sensitivity difference characteristic removal section that generates a pixel signal of the predetermined pixel field from which a high-frequency component caused by a phase difference and a sensitivity difference has been removed based on the phase difference and sensitivity difference component and the low-frequency component. (9) Electronic device according to (8), wherein the first processing section or the second processing section includes a defect detection section that detects a defective pixel, and The phase difference-sensitivity difference characteristic removal section generates a pixel signal of the predetermined pixel field, from which a high-frequency component, generated by a phase difference and a sensitivity difference, is removed based on the phase difference and sensitivity difference component, the low-frequency component and the defective pixel, which are detected by the defect detection section. (10) Electronic device according to one of (1) to (9), wherein The signal processing device outputs a pixel signal of a reference field that is defined in advance after performing the remosaic processing. (11) Electronic device according to (10), wherein the reference field is a Bayer field, and one field of the pixel group is a different field than the Bayer field. (12) Electronic device according to one of (4) to (9), wherein The signal processing device is built into a third substrate, which is arranged separately from the first and second substrates in order to be stacked. (13) Electronic device according to one of (1) to (12), wherein The signal processing device performs the remosaic processing, which is carried out in a case where the on-chip lens is provided for each pixel. (14) Solid-state imaging element comprising: a first substrate comprising a plurality of pixels arranged in a two-dimensional direction and a plurality of on-chip lenses, each provided for a corresponding group of pixels comprising two or more of the pixels; and a second substrate stacked on top of the first substrate which, without performing remosaic processing, outputs a signal from which a high-frequency component has been removed, caused by a phase difference and a sensitivity difference contained in a multitude of pixel signals output by the first substrate. (15) Solid-state imaging element according to (14), wherein the pixel group onto which light falls that has passed through one of the on-chip lenses, which includes two or more pixels of the same color, and The second substrate removes an artifact caused by a phase difference and a sensitivity difference between the two or more pixel signals output by the two or more pixels of the same color contained in the pixel group onto which light passes through the on-chip lens falls. (16) Solid-state imaging element according to (14) or (15), wherein the pixel group comprising two or more pixels of the same color arranged in a predetermined pixel field, and The second substrate outputs a pixel signal of the predetermined pixel field, which has a phase difference similar to that in a case where the on-chip lens is provided for each pixel after removing a high-frequency component caused by a phase difference and a sensitivity difference. (17) Solid-state imaging element according to (16), wherein the second substrate includes a first processing section that generates an intermediate signal based on the two or more pixel signals for each of the pixel groups output by the first substrate, and a second processing section that generates a pixel signal of the predetermined pixel field, from which a high-frequency component caused by a phase difference and a sensitivity difference has been removed based on the intermediate signal. (18) Solid-state imaging element according to (17), wherein the first processing stage comprises at least one of a color balance calculation section that calculates a gain to adjust the color balance of each pixel contained in a local area, based on the two or more pixel signals for each of the pixel groups, a direction determination section that determines a gradient of a pixel value at a position of a target pixel, or a flatness determination section that determines whether the pixel value of the target pixel is flat or not, based on the gradient of the pixel value determined by the direction determination section, the first processing section generates the intermediate signal, which includes an output signal from at least one of the color compensation calculation section, the direction determination section, or the flatness determination section, and the second processing stage includes a phase difference-sensitivity difference component extraction section that extracts a phase difference and sensitivity difference component of the two or more pixel signals for each of the pixel groups based on the intermediate signal generated by the first processing section, a low-frequency component extraction section that extracts a low-frequency component in a frequency band lower than the phase difference and sensitivity difference component, based on the intermediate signal generated by the first processing section, and a phase difference-sensitivity difference characteristic removal section that generates a pixel signal of the predetermined pixel field from which a high-frequency component caused by a phase difference and a sensitivity difference has been removed based on the phase difference and sensitivity difference component and the low-frequency component. (19) Signal processing device comprising: a receiving section that receives a pixel signal output by a solid-state imaging element and from which an artifact caused by providing an on-chip lens for each pixel group comprising two or more pixels has been removed; a remosaic processing section that performs remosaic processing based on a signal received by the receiver section; and an output section that outputs a signal indicating where the remosaic processing was performed. (20) Signal processing device according to (19), wherein the receiving section receives the pixel signal of a predetermined pixel field, which has a phase difference and a sensitivity difference similar to those in a case where the on-chip lens is provided for each pixel, and The remosaic processing section performs the remosaic processing, which is carried out in a case where the on-chip lens is provided for each pixel.

[0149] Aspects of the present disclosure are not limited to the individual embodiments described above, but include various modifications that can be conceived by those skilled in the art, and the effects of the present disclosure are not limited to the content described above. In other words, various additions, modifications, and partial deletions can be made without departing from the conceptual idea and spirit of the present disclosure, which are derived from the subject matter and equivalents defined in the claims. REFERENCE MARK LIST 1 pixel field section 2 vertical control circuits 3-column signal processing circuit 4 horizontal control circuits 5 Output circuit 6 Control circuit 9 line selection line 10 converters 11, 11a Solid-state imaging element 11c color filter 11d On-Chip Lens 11e Solder ball 12 glass substrate 13 Adhesive 21 First substrate (pixel sensor substrate) 22 Second substrate (logic substrate) 23a First area 23b Second area 24 logic circuits 25 Third substrate 29 Tub layer 31 pixel circuit 32 pixels 33 Photoelectric conversion element 34 Transfer transistor 35 Amplification transistor 36 Selection transistor 37 Reset transistor 38 discharge transistor 41 Electronic device 41a Electronic device 42 Signal processing device 43 First processing stage 44 Second processing stage 44a Second processing stage 50 LCB calculation section 51 Photodiode 52 Direction Determination Section 53 Flatness Determination Section 54 Defect detection section 55 Phase Difference Sensitivity Difference Component Extraction Section 56 DC component extraction section 57 Phase difference-sensitivity difference-characteristic-distance section 58 Reception section 59 Mosaic processing section 59a Mosaic processing section 60 Output section 61 Direction Determination Section 62 Flatness Determination Section 63 Level Calculation Section 64 Component Extraction Section 65 Correlation Interpolation Processing Section 81 Silicon substrate 82 multilayer wiring layer 83 Wiring layer 83a Wiring layer 83b Interconnect layer 83c bottom wiring layer 84 Interlayer insulating film 85 Silicon through-hole 86 insulating film 87 connecting conductors 88 Silicon vias 90 Rewiring 91 Solder mask (solder resist) 101 Silicon substrate 102 multilayer wiring layer 103 Wiring layer 103a Wiring layer 103a top wiring layer 103b Interconnect layer 103c bottom wiring layer 104 Interlayer insulating film 105 Chip through-hole 106 Connection wiring 107 Insulating film 108 Planarization film 109 Silicon vias 216 Transfer gate electrode 217 Gate insulating film 219 Interpixel isolation section 220 solid charge film 221 Insulating film 225 Light-blocking film 229 Tub layer 239 Trench QUOTES INCLUDED IN THE DESCRIPTION

[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature

[0000] JP 2022-114386

[0005]

Claims

Electronic device comprising: a solid-state imaging element; and a signal processing device performing remosaic processing on an output signal of the solid-state imaging element, wherein the solid-state imaging element comprises a plurality of pixels arranged in a two-dimensional direction, a plurality of on-chip lenses each provided for a corresponding number of pixel groups comprising two or more of the pixels, and a phase difference-sensitivity difference characteristic removal section that removes a high-frequency component caused by a phase difference and sensitivity difference between two or more pixel signals of the same color output for each of the pixel groups. Electronic device according to claim 1, wherein the phase difference sensitivity difference characteristic removal section removes an artifact caused by providing the on-chip lens for each of the pixel groups. Electronic device according to claim 2, wherein the pixel group onto which light passes through one of the on-chip lenses, comprising two or more pixels of the same color, is incident, and the phase difference-sensitivity difference characteristic removal section removes an artifact caused by a phase difference and a sensitivity difference between the two or more pixel signals output by the two or more pixels of the same color contained in the pixel group onto which light passes through the on-chip lens is incident. Electronic device according to claim 1, wherein the solid-state imaging element further comprises a first substrate comprising the plurality of pixels and the plurality of on-chip lenses, each provided for the corresponding pixel groups, and a second substrate stacked on the first substrate comprising the phase difference sensitivity difference characteristic distance section. Electronic device according to claim 4, wherein the pixel group comprises the two or more pixels of the same color arranged in a predetermined pixel field, and the second substrate outputs a pixel signal of the predetermined pixel field having a phase difference and a sensitivity difference similar to those in a case where the on-chip lens is provided for each pixel after a radio frequency component caused by a phase difference and a sensitivity difference has been removed. Electronic device according to claim 5, wherein the second substrate comprises a first processing section that generates an intermediate signal based on the two or more pixel signals for each of the pixel groups output by the first substrate, and a second processing section that generates a pixel signal of the predetermined pixel field from which a high-frequency component caused by a phase difference and a sensitivity difference has been removed based on the intermediate signal. Electronic device according to claim 6, wherein the first processing section comprises at least one of a color balance calculation section which calculates a gain for adjusting the color balance of each pixel contained in a local area on the basis of the two or more pixel signals for each of the pixel groups, a direction determination section which determines a gradient of a pixel value at a position of a target pixel, or a flatness determination section which determines whether the pixel value of the target pixel is flat or not, on the basis of the gradient of the pixel value determined by the direction determination section, and the first processing section generates the intermediate signal which comprises an output signal of at least one of the color balance calculation section, the direction determination section or the flatness determination section. Electronic device according to claim 6, wherein the second processing section comprises a phase difference-sensitivity difference component extraction section that extracts a phase difference and sensitivity difference component of the two or more pixel signals for each of the pixel groups based on the intermediate signal generated by the first processing section, a low-frequency component extraction section that extracts a low-frequency component in a frequency band lower than the phase difference and sensitivity difference component based on the intermediate signal generated by the first processing section, and a phase difference-sensitivity difference characteristic removal section that generates a pixel signal of the predetermined pixel field.from which the influence of a phase difference and a sensitivity difference was removed on a basis of the phase difference and sensitivity difference component and the low-frequency component. Electronic device according to claim 8, wherein the first processing section or the second processing section comprises a defect detection section that detects a defective pixel, and the phase difference-sensitivity difference characteristic removal section generates a pixel signal of the predetermined pixel field from which a high-frequency component, generated by a phase difference and a sensitivity difference, is removed on the basis of the phase difference and sensitivity difference component, the low-frequency component and the defective pixel, which are detected by the defect detection section. Electronic device according to claim 1, wherein the signal processing device outputs a pixel signal of a reference field that is defined in advance after performing the remosaic processing. Electronic device according to claim 10, wherein the reference field is a Bayer field, and a field of the pixel group is a field other than the Bayer field. Electronic device according to claim 4, wherein the signal processing device is incorporated into a third substrate which is arranged separately from the first substrate and the second substrate in order to be stacked. Electronic device according to claim 1, wherein the signal processing device performs the remosaic processing, which is carried out in a case where the on-chip lens is provided for each pixel. Solid-state imaging element comprising: a first substrate comprising a plurality of pixels arranged in a two-dimensional direction and a plurality of on-chip lenses, each provided for a corresponding group of pixels comprising two or more of the pixels; and a second substrate stacked on top of the first substrate which, without performing any remosaic processing, outputs a signal from which a high-frequency component has been removed, caused by a phase difference and a sensitivity difference contained in a plurality of pixel signals output from the first substrate. Solid-state imaging element according to claim 14, wherein the pixel group onto which light passes through one of the on-chip lenses is incident, comprising two or more pixels of the same color, and the second substrate removes an artifact caused by a phase difference and a sensitivity difference between the two or more pixel signals output by the two or more pixels of the same color contained in the pixel group onto which light passes through the on-chip lens is incident. Solid-state imaging element according to claim 14, wherein the pixel group comprises the two or more pixels of the same color arranged in a predetermined pixel field, and the second substrate outputs a pixel signal of the predetermined pixel field having a phase difference and sensitivity difference similar to those in a case where the on-chip lens is provided for each pixel after removing a radio frequency component caused by a phase difference and sensitivity difference. Solid-state imaging element according to claim 16, wherein the second substrate comprises a first processing section that generates an intermediate signal based on the two or more pixel signals for each of the pixel groups output by the first substrate, and a second processing section that generates a pixel signal of the predetermined pixel field from which a high-frequency component caused by a phase difference and a sensitivity difference has been removed based on the intermediate signal. Solid-state imaging element according to claim 17, wherein the first processing section comprises at least one of a color balance calculation section, which calculates a gain for adjusting the color balance of each pixel contained in a local area based on the two or more pixel signals for each of the pixel groups, a direction determination section, which determines a gradient of a pixel value at a position of a target pixel, or a flatness determination section, which determines whether the pixel value of the target pixel is flat or not based on the gradient of the pixel value determined by the direction determination section, the first processing section generates the intermediate signal comprising an output signal of at least one of the color balance calculation section, the direction determination section, or the flatness determination section.and the second processing section comprised a phase difference-sensitivity difference component extraction section, which extracts a phase difference and sensitivity difference component of the two or more pixel signals for each of the pixel groups on a basis of the intermediate signal generated by the first processing section; a low-frequency component extraction section, which extracts a low-frequency component in a frequency band lower than the phase difference and sensitivity difference component on a basis of the intermediate signal generated by the first processing section; and a phase difference-sensitivity difference characteristic removal section, which generates a pixel signal of the predetermined pixel field from which a high-frequency component caused by a phase difference and a sensitivity difference is extracted.was removed based on the phase difference and sensitivity difference components and the low-frequency component. A signal processing device comprising: a receiving section that receives a pixel signal output by a solid-state imaging element from which an artifact caused by providing an on-chip lens for each pixel group comprising two or more pixels has been removed; a remosaic processing section that performs remosaic processing based on a signal received by the receiving section; and an output section that outputs a signal on which the remosaic processing has been performed. Signal processing device according to claim 19, wherein the receiving section receives the pixel signal of a predetermined pixel field having a phase difference and sensitivity difference similar to those in a case where the on-chip lens is provided for each pixel, and the remosaic processing section performs the remosaic processing that is performed in a case where the on-chip lens is provided for each pixel.

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