Method for preparing a substrate comprising a thin layer of piezoelectric material transferred onto a support

Abstract

The invention relates to a method for preparing a substrate comprising a thin layer (3) of piezoelectric material transferred onto a support (5), the method being based on Smart Cut technology comprising an implantation step (S2) of a donor substrate (1) and an assembly step (S4). According to the invention, the preparation method includes, prior to the implantation step (S2), a plasma treatment step (Sp) comprising exposing the donor substrate (1) to a plasma of a neutral gas. Figure 2

Description

Title of the invention: Method for preparing a substrate comprising a thin layer of piezoelectric material transferred onto a support. FIELD OF THE INVENTION

[0001] The invention relates to a piezoelectric-on-insulator (POI) structure. Such a structure finds application particularly in the fields of microelectronics, microsystems, and photonics. It can notably be used to form radio frequency (RF) components or to construct such components, in particular filters or resonators based on elastic wave components, for example, surface elastic wave components. TECHNOLOGICAL BACKGROUND OF THE INVENTION

[0002] A POI structure is typically formed of a piezoelectric thin film deposited on a first face of a substrate. An intercalated dielectric layer is disposed between, and in contact with, the substrate and the thin film.

[0003] The thin film is made of a single-crystal piezoelectric material, such as lithium tantalate or lithium niobate. It typically has a thickness between 50 nm and 2000 nm. The substrate is usually silicon.

[0004] Document WO2020200986A1 proposes a method for manufacturing such a POI substrate.

[0005] When used to receive RF components, a POI substrate must exhibit satisfactory RF characteristics, as these characteristics partly determine the RF performance of the components. The RF characteristics of the substrate can be established by measuring the second harmonic distortion (HD2) in dB, as documented in the January 2015 publication "White paper - RF SOI Characterisation" published by SOITEC.

[0006] We therefore generally seek to form a substrate, when it is intended to receive RF components as may be the case of a POI substrate, so that it has the lowest possible HD2 measurement, well below -70dBm for example.

[0007] For this purpose, the support can be chosen to have a high electrical resistivity, greater than 1000 Ohms.cm. The support can also include, on its surface, a layer for trapping electrical charges. SUBJECT OF THE INVENTION

[0008] One object of the invention is to improve this prior art. More specifically, one object of the invention is to provide an improved method for preparing a POI substrate. This improved method makes it possible to provide a POI substrate exhibiting RF characteristics, as established by the HD2 second harmonic distortion measurement, superior to the RF characteristics of a POI substrate of a prior art process. BRIEF DESCRIPTION OF THE INVENTION

[0009] To achieve one of these objectives, the object of the invention proposes a method for preparing a substrate comprising a thin layer of piezoelectric material transferred onto a support. The method comprises: - an implantation step including the introduction of so-called "light" species into a first face of a donor substrate made of piezoelectric material to form a weakening plane and define the thin layer between the weakening plane and the first face of the donor substrate; - an assembly step comprising the assembly of the donor substrate to the support via a dielectric assembly layer; - fracturing the donor substrate at the level of the weakening plane to transfer the thin layer onto the support.

[0010] According to the invention, the preparation process includes, prior to the implantation step, a plasma treatment step comprising exposing the first face of the donor substrate to a plasma of a neutral gas.

[0011] Unexpectedly, such a process leads to the formation of a substrate exhibiting improved RF characteristics.

[0012] According to other advantageous and non-limiting features of the invention, taken alone or in any technically feasible combination: - the neutral gas is argon, helium or krypton; - the plasma treatment step is conducted for a duration of between 2 seconds and 1 minute during which the first face of the donor substrate is exposed to the neutral gas plasma; - the neutral gas plasma is formed between two electrodes of a chamber, at least a first power of a first radio frequency being applied to one of the electrodes; - the first radio frequency is greater than 10 MHz; - the plasma treatment step has an ionic spraying effect on the first face of the donor substrate; - the plasma treatment step is followed by a first deposition step, the first deposition step comprising the deposition of a first dielectric layer on the first face of the donor substrate, the first dielectric layer constituting at least part of the dielectric assembly layer; - the plasma treatment step and the deposition step are carried out "in-situ" in the same chamber; - the first dielectric layer has a thickness of less than 100nm, preferably less than 50nm; - The preparation process further includes a second deposition step, the second deposition step comprising the deposition of a second dielectric layer on the support, the second dielectric layer constituting at least part of the dielectric layer; - the second dielectric layer has a thickness greater than 100 nm, preferably greater than or equal to 500 nm; - the dielectric assembly layer comprises silicon oxide and / or silicon oxynitride; - the support has a surface layer that traps electrical charges; - the surface layer for trapping electrical charges is made of polycrystalline silicon. Brief description of the drawings

[0013] Other features and advantages of the invention will become apparent from the detailed description of the invention which follows with reference to the accompanying figures in which:

[0014] [Fig.1]

[0015] Fig. 1 represents a method for preparing a POI substrate in accordance with the prior art;

[0016] [Fig.2]

[0017] Figure [Fig.2] represents a method for preparing a POI substrate according to an implementation method. DETAILED DESCRIPTION OF THE INVENTION

[0018] For the sake of simplicity in the following description, the same references are used for identical elements or elements performing the same function in the prior art and the described embodiment of the invention.

[0019] With reference to [Fig. 1], a prior art method for preparing a substrate S, referred to hereafter as the "POI substrate," is first presented. This method, based on the Smart Cut™ technology well known to those skilled in the art, is described in particular in document WO2020200986, already cited in the introduction to this application. Therefore, the following paragraphs simply summarize the main elements of this method. The POI substrate obtained by this method comprises a thin layer of material piezoelectric effect transferred, via a dielectric assembly layer, onto a support.

[0020] In a known method for preparing a POI substrate according to Smart Cut™ technology, a first dielectric layer 4a is first formed during a first SI deposition step on and in contact with a first face of a donor substrate 1 made of piezoelectric material (for example, lithium tantalate or lithium niobate). The first dielectric layer is typically a layer of silicon dioxide or silicon oxynitride.

[0021] The donor substrate 1 can be a solid substrate, entirely made of piezoelectric material or a hybrid substrate comprising a relatively thick layer of piezoelectric material formed on a handled substrate.

[0022] The piezoelectric material of the donor substrate 1 can have any crystalline orientation suitable for the final application. Thus, it is common to choose an orientation between 30° and 60°RY, or between 40° and 50°RY, or even 138° LT in the case where it is desired to exploit the properties of the thin film to form a surface wave acoustic filter.

[0023] In a subsequent implantation step S2 of so-called "light" species, a thin layer 3 is defined in the donor substrate 1, and a buried embrittlement plane 2 is defined. This thin layer 3 extends through the depth of the donor substrate 1, from a first face of this substrate 1 to the buried embrittlement plane 2. This plane corresponds to the penetration depth of the light species, these species typically being helium and / or hydrogen. The light species are introduced during the implantation step S2, for example, by implanting these species in ionic form through the dielectric layer 4a and through the first face of the donor substrate 1.

[0024] Separately from the implantation step S2 and the first deposition step SI, a support 5 is prepared. In the example shown in [Fig. 1], the support 5 consists of a base substrate 5a and an electrical charge trapping layer 5b (more simply, the "trapping layer" in the remainder of this description). The trapping layer 5a forms a surface portion of the support 5. During a second deposition step S3, a second dielectric layer 4b is formed on, and in contact with, the trapping layer 5b.

[0025] In a subsequent assembly step S4 of the process in [Fig. 1], the donor substrate 1 is assembled to the support 5 via a dielectric assembly layer 4, this layer 4 being composed of the first dielectric layer 4a and the second dielectric layer 4b previously formed. The assembly step may consist of bonding, for example by hydrophilic or covalent molecular adhesion, of the donor substrate 1 and the support 5, this bonding leading to bring the first dielectric layer 4a and the second dielectric layer 4b into intimate contact. It may be possible to have provided for unillustrated steps of smoothing the exposed face of at least one of these dielectric layers 4a,4b, so that they each have a surface condition, in terms of roughness in particular, compatible with this particular method of assembly.

[0026] In a subsequent fracture step S5, a residual part 1' of the donor substrate 1 is detached to release the thin layer 3, this detachment and release being obtained by fracturing the donor substrate 1 at the level of the weakening plane 2. The fracture step can be carried out by applying thermal and / or mechanical forces, as is well known in Smart Cut technology.

[0027] Following this fracture step, a finishing step S6 can be applied, this step being for example that proposed by document WO2020200986 and comprising a heat treatment of the free face of the thin layer 3, revealed at the end of the fracture step S5, followed by a thinning of this thin layer 3.

[0028] The RF characteristics of the POI S substrate which has just been prepared were established by a second harmonic distortion measurement HD2 of this substrate. Practically the plurality of POI substrates which were subjected to these characterization measurements had a thin lithium tantalate layer 3 of 200 nm to 1500 nm thickness, a first dielectric layer of silicon oxide 4a of 30 nm, a second dielectric layer 4b of silicon oxide between 200 nm and 1500 nm, a trapping layer 5b of polycrystalline silicon disposed on a base substrate 5a exhibiting high resistivity characteristics.

[0029] To characterize the substrate, coplanar waveguides were formed by depositing aluminum lines on the free face of the thin film 3. Then, a signal with a frequency of 900 MHz and a power typically chosen at 15 dBm is applied to one end of the waveguides, and the second harmonic signal HD2 is measured at the other end. The lower the second harmonic signal, the higher the performance level of the structure.

[0030] The second harmonic signal HD2 measured on substrates obtained by the prior art process was between -96.2 dBm and -97.1 dBm for all evaluated POI S substrates.

[0031] Figure 2 represents a method for preparing a POI substrate according to an implementation method. This method incorporates all the steps of the prior art method just presented with reference to Figure 1.

[0032] In the process of [Fig.2] however, the first SI deposition step is preceded by a Sp plasma treatment step. This plasma treatment step includes exposing the first face of the donor substrate 1 to a plasma of a neutral gas, here argon.

[0033] In the tests that led to the invention, the argon plasma was established between two electrodes of a chamber, here a deposition chamber, in which the donor substrate 1 was placed between the two electrodes. One of the electrodes was activated at a first radio frequency of 380 kHz and a first power of 100 W and, simultaneously, at a second radio frequency of 13.55 MHz and a second power of 250 W. The plasma treatment of the Sp step was conducted for 10 seconds. However, these conditions do not constitute a limitation of the invention, and it is conceivable that the exposure of the first face of the donor substrate 1 to a plasma of a neutral gas could be carried out under other plasma preparation conditions.

[0034] In certain embodiments, it will be sought to determine these conditions so that the plasma has an ionic spraying effect ("sputtering" according to the Anglo-Saxon expression of the field) on the first face of the donor substrate 1.

[0035] Following the preparation steps including this Sp plasma treatment step, POI substrates with the same structural characteristics as those presented above were characterized.

[0036] The second harmonic signal HD2 measured on substrates obtained by the modified process, including this Sp plasma treatment step, was between -99.6 dBm and -100.5 dBm for all evaluated POI S substrates. These measurements represent a gain of more than -3 dBm compared to measurements made on POI substrates obtained with a process conforming to the prior art, which is significant.

[0037] It should be noted that, while it is common practice to perform a plasma treatment step (often with oxygen plasma) on the dielectric layers forming the faces of two substrates to be joined in order to promote this assembly, it is quite original to perform a plasma treatment on the first face of the substrate support, especially prior to the formation of a dielectric layer on this face. The effect of this plasma treatment step on the RF performance of the substrate is all the more surprising.

[0038] The invention therefore takes advantage of these results to propose an improved method for preparing a POI S substrate comprising a thin layer 3 of piezoelectric material transferred onto a support 5 via a dielectric assembly layer.

[0039] In addition to the implantation step S2, assembly step S4, and fracture step S5, the process according to the invention therefore includes, prior to the first deposition step SI, a plasma treatment step Sp comprising exposing the first face of the donor substrate 1 to a plasma of a neutral gas. Advantageously, this neutral gas comprises or is composed of argon. However, it may also be krypton or helium. The plasma treatment step Sp can be carried out for a duration of between 2 seconds and 1 minute.

[0040] Generally, during this treatment, a neutral gas plasma is formed between two electrodes in a chamber in which the donor substrate is positioned. At least one activation power at a first radio frequency is applied to one of the electrodes. Some equipment also provides for the application of a second activation power at a second radio frequency, different from the first radio frequency. The neutral gas plasma is thus formed between the two electrodes and introduced into the chamber, and the species contained in this plasma are projected onto the first face of the donor substrate 1. The chamber can be maintained at sub-atmospheric pressure.

[0041] The first radio frequency is advantageously above 1 MHz, preferably above 10 MHz, and usually chosen at 13.56 MHz. The first power is typically chosen to be equal to 250 W, more generally between 100 W and 500 W. The second radio frequency, when such a second radio frequency is applied, is advantageously below 1 MHz, preferably below 500 kHz, and the second power can be equal to 100 W, more generally between 25 W and the first power.

[0042] As previously mentioned, in certain cases the conditions of the plasma treatment step can be chosen so that it leads to an ionic spraying effect on the first face of the donor substrate 1.

[0043] When it is planned to form at least part of the dielectric assembly layer 4 on the donor substrate 1 during a first SI deposition step, the Sp activation step is carried out before this first SL deposition step. It may be advantageous, in certain cases, to combine the Sp activation step and the first SI deposition step, particularly when this first SI deposition step implements a PECVD technique (Plasma Enhanced Chemical Vapor Deposition). The Sp plasma treatment step and the S3 deposition step can then be carried out "in-situ" within the chamber of the deposition equipment.By "in-situ" we mean more precisely that the plasma activation of the first face of the donor substrate 1 and then the deposition of the first dielectric layer 4a, forming at least part of the dielectric assembly layer, are carried out one after the other in the chamber and without exposing the first face of the donor substrate 1 to the ambient atmosphere.

[0044] As stated in presenting the process illustrated in [Fig.1], a second deposition step S3 can be provided within the framework of the invention, this second step comprising the deposition of a second dielectric layer 4b on the support 1. The second dielectric layer 4b together with the first dielectric layer 4a constitutes the dielectric assembly layer 4 of the substrate POI S.

[0045] It is noted that the first deposition step SI can be omitted, and only the second deposition step S3 is then carried out. In such a case, the dielectric assembly layer 4 of the POI substrate S consists solely of the second dielectric layer.

[0046] In all cases, a process according to the invention provides for applying at least one of the first and second deposition steps SI, S3 so as to constitute a dielectric assembly layer 4 on one and / or the other of the faces to be assembled, before proceeding to the next assembly step S4.

[0047] The first dielectric layer 4a and the second dielectric layer 4b may comprise or be composed of silicon dioxide and / or silicon oxynitride. When the first dielectric layer 4a and the second dielectric layer 4b are present, the first dielectric layer 4a usually has a relatively thin thickness compared to the thickness of the second layer 4b. For example, the first layer 4a may have a thickness of less than 100 nm, preferably less than 50 nm. The second layer 4b, on the other hand, may have a thickness greater than 100 nm, preferably greater than or equal to 500 nm.

[0048] The invention is not, however, limited to a particular thickness of the dielectric bonding layer 4 or to its nature. Generally, this dielectric bonding layer 4 can implement one or more deposition steps. These deposition steps S1, S3 can implement any suitable technique, for example, LPCVD (Low Pressure Chemical Vapor Deposition) or PECVD, as already specified in an advantageous embodiment. A deposition step S1, S3 can be completed by annealing to improve the properties of the dielectric layer and / or by polishing to facilitate the subsequent bonding step S4.

[0049] The support 5 ensures the mechanical strength of the relatively thin layers which contribute to forming the POI S substrate and for this purpose has a thickness of several hundred microns.

[0050] Preferably, to contribute to the radio frequency performance of the photonic substrate 1, this support 5 has a high resistivity, greater than 750 ohms centimeters or 1000 ohms centimeters, and more preferably, greater than 2000 ohms centimeters. This limits the density of charges, holes or electrons, that are likely to move within it.

[0051] For reasons of availability and cost, the support 5 is preferably made of monocrystalline silicon. For example, and by way of illustration only, it may be a CZ silicon substrate with a low interstitial oxygen content of between 6 and 10 ppm, or an FZ silicon substrate which notably has a naturally very low interstitial oxygen content. It may also be a CZ silicon substrate with a high amount of interstitial oxygen (designated by the expression "High Oi") greater than 26 ppm.

[0052] As already briefly indicated and illustrated in [Fig. 2], the POI S substrate may comprise a support 5 formed of a surface layer for trapping electrical charges 5b disposed superficially on a base substrate 5a. The base substrate 5a may then be chosen to be silicon and resistive, similarly to what has just been presented for the support 5 in the preceding passage.

[0053] The trapping layer 5b can be of a very diverse nature. Generally, it is a non-single-crystal layer exhibiting structural defects such as dislocations, grain boundaries, amorphous zones, interstices, inclusions, pores, etc. These structural defects form traps for charges that may circulate in the material, for example, at incomplete or dangling chemical bonds. This prevents conduction in this layer 4, which consequently exhibits high resistivity.

[0054] The trapping layer 5b can have a thickness between 10 nm and 30 micrometers, preferably between 50 nm and 5 micrometers.

[0055] According to one possible approach, and for reasons of simplicity of implementation, the trapping layer 5b is formed of a polycrystalline silicon layer. This layer can be formed by deposition on one face of the base substrate 5a. In this case, and in order to preserve the polycrystalline quality of this layer during the heat treatments that the POI S substrate may undergo, an amorphous layer, of silicon dioxide for example, can advantageously be provided on the base substrate 5a before the deposition of the trapping layer 5b.

[0056] According to a particularly advantageous approach, the trapping layer 5b consists of a silicon-rich oxide deposited on the base substrate 5a. "Silicon-rich" is defined as an oxide having an atomic concentration of silicon between 50% and 99.9%. Oxygen and, optionally, nitrogen are present in this layer 5b in substoichiometric atomic concentrations. Preferably, this oxide has an atomic concentration of silicon between 70% and 90% and an atomic concentration of oxygen between 10% and 30%. It may contain nitrogen in an atomic concentration between 8% and 45%. Further details on the formation of the trapping layer 5b as a silicon-rich layer can be found in publications WO2024115410, WO2024115411, and WO2024115414.

[0057] Finally, it is noted that the POI S substrate is advantageously presented in the form of a circular plate, the diameter of which is standardized to allow for handling. by standard semiconductor industry equipment. This diameter is typically between 100 mm and 200 mm. However, the shape and dimensions of the POI S substrate are not a limitation, and these shapes and dimensions can be freely chosen.

[0058] The insertion of a Sp plasma treatment step of the first face of the donor substrate in a prior art POI substrate preparation process surprisingly makes it possible to significantly improve the RF properties of this substrate.

[0059] Of course the invention is not limited to the described embodiment and alternative embodiments can be made without departing from the scope of the invention as defined by the claims.

Claims

Demands

1. A method for preparing a substrate comprising a thin layer (3) of piezoelectric material transferred onto a support (5), the method comprising: - An implantation step (S2) comprising the introduction of so-called "light" species into a first face of a donor substrate (1) of piezoelectric material to form a weakening plane (2) and define the thin layer (3) between the weakening plane (2) and the first face of the donor substrate (1); - an assembly step (S4) comprising the assembly of the donor substrate (1) to the support (5) by means of a dielectric assembly layer (4), - the fracturing of the donor substrate (1) at the level of the weakening plane (2) to transfer the thin layer (3) onto the support (5);the preparation process being characterized in that it comprises, prior to the implantation step (S2), a plasma treatment step (Sp) comprising the exposure of the first face of the donor substrate (1) to a plasma of a neutral gas.;

2. A preparation method according to the preceding claim in which the inert gas is argon.

3. A preparation method according to claim 1 wherein the neutral gas is helium or krypton.

4. A preparation method according to any one of the preceding claims wherein the plasma treatment step (Sp) is conducted for a duration of between 2 seconds and 1 minute during which the first face of the donor substrate is exposed to the neutral gas plasma.

5. A preparation method according to any one of the preceding claims, wherein the neutral gas plasma is formed between two electrodes of a chamber, at least a first power of a first radio frequency being applied to one of the electrodes.

6. A preparation method according to the preceding claim in which the first radio frequency is greater than 10 MHz.

7. A preparation method according to any one of the preceding claims wherein the plasma treatment step (Sp) has an ionic spraying effect on the first face of the donor substrate (1).

8. A preparation method according to any one of the preceding claims wherein the plasma treatment step (Sp) is followed by a first deposition step (SI), the first deposition step comprising the deposition of a first dielectric layer (4a) on the first face of the donor substrate (1), the first dielectric layer (4a) constituting at least part of the dielectric assembly layer (4).

9. A preparation method according to the preceding claim in which the plasma treatment step (Sp) and the deposition step (SI) are carried out "in-situ" in the same chamber.

10. A preparation method according to any one of claims 8 and 9 wherein the first dielectric layer (4a) has a thickness of less than 100nm, preferably less than 50nm.

11. A preparation method according to any one of the preceding claims further comprising a second deposition step (S3), the second deposition step (S3) comprising the deposition of a second dielectric layer (4b) on the support (5), the second dielectric layer constituting at least a part of the dielectric layer (4).

12. A preparation method according to the preceding claim, wherein the second dielectric layer (4b) has a thickness greater than 100 nm, preferably greater than or equal to 500

13. llili. A preparation method according to any one of the preceding claims wherein the dielectric assembly layer (4) comprises silicon oxide and / or silicon oxynitride.

14. A preparation method according to any one of the preceding claims in which the support (5) has a surface layer for trapping electrical charges (5b).

15. A preparation method according to the preceding claim in which the surface layer for trapping electrical charges (5b) is made of polycrystalline silicon.

16. A preparation method according to claim 13 wherein the surface layer for trapping electrical charges (5b) comprises a silicon-rich oxide.

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