A method for exchanging keys to secure data transmission in a computer platform comprising interconnected processors.

Abstract

The invention relates to a method of exchanging keys to secure a data transmission in a computer platform (1), said computer platform (1) comprising a plurality of interconnected processors forming a transmission path, each processor in the transmission path being capable of performing encryption operations from an encryption key.The process includes a step (E3, E4, E5, E6, E7) of step-by-step transfer of the new decryption keys (NK'1, ..., NK'j, ..., NK'Q; NK'int 1, ..., NK'int i, ..., NK'int M) generated in the starting processor ( ) and in the intermediate processors ( , ), said transfer step being secured using the encryption / decryption key pairs from the initial step, said transfer step beginning with a diffusion of the Q new decryption keys (NK'1, ..., NK'j, ..., NK'Q) from the starting processor ( ) to the first Q intermediate processors ( ) in the transmission path. Figure for the abstract: Fig. 7.

Description

Title of the invention: Method for exchanging keys to secure data transmission in a computer platform comprising interconnected processors. Technical field

[0001] The present invention relates to a method of key exchange for securing data transmission in a computer platform comprising interconnected processors. Each processor in the computer platform is adapted to communicate with another processor to which it is directly connected.

[0002] By "computer platform" is meant a computer system characterized by a set of interconnected components, each integrating a processor. A component also integrates communication services enabling a component to transmit data with the components to which it is directly connected. A component also offers storage capabilities

[0003] By "processor" we mean a component having data processing capabilities. Technical background

[0004] It is known that computer platforms composed of hardware cards integrating interconnected processors, for example of the INTEL®, ARM® or other type.

[0005] Such processors offer security processing capabilities. These security processing capabilities are random number generation, data encryption capabilities using an encryption key, and data decryption capabilities using a decryption key.

[0006] The document “Intel SGX Explained.” IACR Cryptol. ePrint Arch. 1016 (2016):86 by Costan, Victor and Srinivas Devadas describes a computing platform comprising interconnected INTEL® processors with data encryption and decryption capabilities exploiting the SGX (Software Guard Extensions) mechanism. This mechanism uses a set of interconnected processors implementing a reliable environment. It is used for secure remote computing applications, secure web browsing, or Digital Rights Management (DRM).

[0007] The document “Separation and integration in MILS (the MILS constitution)” by Rushby (2008) describes a use of encryption capabilities within the framework of a MILS architecture (for “Multiple Independent Levels of Security”). In such an approach, critical security features are isolated in processors that are as small and simple as possible, with similarly simplified security rules.

[0008] Figure 1 illustrates a computer platform for secure data exchange, according to the prior art, presented as a network of processors or nodes connected step by step and forming a path. Each node has a capacity to receive data from a previous node in the path and a capacity to transmit data with the next node. Among the nodes in the path, Figure 1 shows a second main node n; and a jth main node nj, as well as a plurality of relay nodes, here three in number, arranged between the two main nodes n;, nj.

[0009] The main nodes (nodes represented with a vertical line) correspond to processors offering encryption and / or decryption key generation capabilities, as well as encoding and decoding algorithms using these keys.

[0010] Relay nodes are processors that do not have encryption or decryption capabilities. Relay nodes transmit data exactly as they receive it.

[0011] Figure 2 shows steps for generating and sharing an encryption key and a decryption key between neighboring primary nodes, according to the known "Three Pass Protocol".

[0012] In a first substep (step 1), the set of neighboring nodes with one-bond trust is defined for node nt, Trust(1, ni) EN, and nj E Trusted 1, ni) if and only if:

[0013] nj e Next _ keyjni)et

[0014] 3kü / y, krfyy such that kQy £ Keyc (ni, nj) and kdyy £ Keyd (ni, nj).

[0015] In a second substep (step 2), a first pair of encryption and decryption keys is created and a second pair of encryption and decryption keys is created.

[0016] In a third substep (step 3), the second encryption key is encrypted using the first encryption key to form a ciphertext. This ciphertext is transmitted to node nj.

[0017] In a fourth step (step 4), the node nj encrypts the ciphertext using a third encryption key and transmits it to the node ni.

[0018] The encryption algorithm and the decryption algorithm present in the nodes ni, nj are here commutative, that is to say that the data encoded by the first encryption key and then by the second encryption key, can be decoded by a second decryption key and then by a first decryption key.

[0019] As commutative encryption and decryption algorithms, one can cite the paper "An improved algorithm for computing logarithms overGF(p) and its cryptography significance (Corresp.)" in IEEE Transactions on Information Theory, vol. 24, no. 1, pp. 106-110, January 1978, doi: 10.1109 / TIT. 1978.1055817, by S. Pohlig and M. Helhnan, paper US4567600, the paper "The mathematical Gardner." Springer, Boston, MA. https: / / doi.org / 10.1007 / 978-l-4684-6686-7_5, by Shamir, A., Rivest, RL, Adleman, LM (1981) or a bit-by-bit encryption of a binary or exclusive operator.

[0020] Thus, upon receiving the encrypted set using the third encryption key, node ni decrypts this encrypted set using the first decryption key. It then transmits the second encrypted key using the third key to the other node nj. This other node nj then only needs to use the third decryption key to obtain the second encryption key.

[0021] Such a process allows for a secure exchange of encryption keys between two nodes. However, a man-in-the-middle attack remains possible. In such an attack, a malicious node would impersonate node nj. It would then exploit its own encryption / decryption keys to retrieve the second encryption key, following the same principle as explained above. It is important, when using this protocol, to protect against such an attack by performing these key exchanges in a secure environment that prevents intrusion by malicious nodes.

[0022] This protocol allows keys to be shared between contiguous components of a platform. Secure communication on a sequence of components initialized by key exchanges according to the "Three Pass Protocol" is vulnerable to an attack such as the compromise of one of the nodes, where sensitive data is decrypted and visible in plaintext on each of the nodes, then re-encrypted for transmission to the next node.

[0023] There is therefore a need to improve the exchange of encryption / decryption keys between different processors of a computer platform in order to strengthen the security in the transmission of data allowing the protection against compromise of one or more nodes of the sequence of components of transmission of secure data streams. Summary of the invention

[0024] An object of the invention relates to a key exchange method for securing data transmission in a computer platform, said computer platform comprising a plurality of interconnected processors forming a transmission path, each processor in the transmission path being capable of performing encryption operations from an encryption key, each a processor in the transmission path being capable of performing decryption operations from a decryption key, said encryption key and said decryption key belonging to an encryption / decryption key pair, said transmission path comprising a starting processor, an arriving processor, and M intermediate processors, arranged between the starting processor and the arriving processor, and in an initial step each intermediate processor comprising an encryption / decryption key pair, said encryption key being offset by a step equal to 1 relative to said decryption key in the transmission path. The method comprises:

[0025] - a step of generating new encryption / decryption key pairs, said generation step comprising:

[0026] - a generation of Q encryption / decryption key pairs in the starting processor, Q being less than or equal to M;

[0027] - a generation of a new intermediate pair of encryption keys / decryption in each intermediate processor;

[0028] - a step of transferring the new decryption keys step by step generated in the starting processor and in the intermediate processors, said transfer step being secured using the encryption / decryption key pairs from the initial step, said transfer step beginning with a diffusion of the Q new decryption keys from the starting processor to the first Q intermediate processors in the transmission path, said diffusion resulting in a displacement in the transmission path of the new intermediate decryption keys generated in the intermediate processors,the new intermediate encryption keys generated in the remaining intermediate processors such that each intermediate processor belonging to the MQ last processors includes a new encryption / decryption key pair in which said encryption key is shifted by a step equal to Q relative to said decryption key in the transmission path.

[0029] The invention thus proposes the principle of an original exchange of encryption / decryption keys between processors belonging to a predetermined transmission path. This transmission path comprises a starting processor, a destination processor, and a plurality of intermediate processors between the starting and destination processors.

[0030] The idea of ​​the invention is to start from a known prior art in which processors are adapted to exchange encrypted data according to a known encryption / decryption method. Thus, a processor encrypts data using an encryption key and transfers this encrypted set to the next processor which decrypts the whole thing using a decryption key associated with the encryption key.

[0031] Based on this operation, new encryption / decryption key pairs are generated in the starting processor and intermediate processors. More specifically, the decryption keys for these new key pairs present in the starting processor are propagated to intermediate processors. These decryption keys replace the new decryption keys generated in these intermediate processors, which are then transmitted to other intermediate processors. There is therefore a shift in the decryption keys along the transmission path. The introduction of new decryption keys by the starting processor modifies the overall key arrangement in the transmission path, preventing intermediate nodes transmitting an encrypted message from having the keys necessary to access the message in plaintext, thus limiting compromise attacks.

[0032] In one embodiment, the receiving processor is capable of receiving Q new intermediate decryption keys generated in the last MQ intermediate processors of the transmission path.

[0033] In one embodiment, the dissemination of the Q new decryption keys comprises, successively:

[0034] - a transmission via the starting node of the Q new decryption keys to a first intermediate processor;

[0035] - a transmission by the first intermediate processor of new Ql keys decryption keys chosen from the Q new decryption keys generated, to a second intermediate processor;

[0036] - a transmission by the second intermediate processor of Q-2 new keys of decryption chosen from among the Q-1 new decryption keys previously transmitted, to a third intermediate processor;

[0037] - as long as i is less than Q, a transmission via the ith intermediate processor of Qi new decryption keys chosen from among the Q-(i+l) new decryption keys previously transmitted, to an (i+l)th intermediate processor;

[0038] - when i is equal to Q, a transmission by the (Q1)th intermediate processor of a new decryption key chosen from the two new decryption keys previously transmitted, to the Qieme intermediate processor.

[0039] In one embodiment, at each transmission by the ith intermediate processor of Qi new decryption keys, the last Mi intermediate processors in the transmission path transmit to their neighboring processor a new decryption key, said new decryption key having been previously generated in an intermediate processor during the previous generation step.

[0040] Another object of the invention relates to a computer platform comprising a plurality of interconnected processors forming a transmission path, said transmission path having been formed from the steps of the key exchange process according to the invention.

[0041] In one embodiment, the interconnected processors are capable of performing encryption and / or decryption operations, said encryption and / or decryption operations being commutative.

[0042] Another object of the invention relates to a connected platform device comprising at least one data-emitting platform and at least one data-receiving platform according to the invention. Description of the figures

[0043] Fig. 1 illustrates a computer platform for the exchange of secure data, according to the prior art;

[0044] Fig.2 represents a known mechanism for exchanging encryption keys between two processors of the computer platform of Fig.1;

[0045] Figures 3 to 6 represent a method of exchanging keys to secure a data transmission according to a particular embodiment of the invention;

[0046] Figures 7 to 10 represent a method of exchanging keys to secure a data transmission according to a general embodiment of the invention.

[0047] Figures 3 to 6 illustrate a key exchange method according to a particular embodiment of the invention.

[0048] In this particular mode, the computing platform 1 comprises a starting processor ndep, a first intermediate processor, a second intermediate processor, and an arriving processor n'rr. For ease of understanding, the relay nodes, shown in Figures 1 and 2, positioned between the different processors, have not been depicted. As a reminder, these relay nodes do not perform any encryption and / or decryption operations on the data they receive.

[0049] In an initial first step Eb, a first transmission path is defined. This path includes the different processors as well as the encryption keys Ki K2K3 and the decryption keys K'i K^K's. This transmission path represents a Trust relationship between the different interconnected processors. The encryption / decryption keys were generated according to the known prior art protocol illustrated in Figure 2. This generation step thus makes it possible to determine a Nextfeyde NN relationship as follows: ke^n )and only if i^^Next^n^ keyc = Keyc(n^ n2)' keyd = Keyd^ etnimemonse keyc, and nz memorizes keyd.

[0050] In the example of [Fig.4]:

[0051] - the initial ndep processor includes a first encryption key Ki;

[0052] - the first intermediate processor includes a first key of decryption K\ associated with the first encryption key Ki as well as a second encryption key K2;

[0053] - the second intermediate processor includes a second key of decryption K'2 associated with the second encryption key K2 as well as a third encryption key K3;

[0054] The arrival processor n'rr includes a third decryption key K'3 associated with the third encryption key K3.

[0055] It should be noted that each intermediate processor nÿjf includes a pair of encryption / decryption keys: K2 / K' 1 and K3 / K'2.

[0056] The encryption key is thus shifted by a step equal to 1 relative to the decryption key in the key pair of the intermediate processors. That is to say- to say that for a particular intermediate processor, having an encryption key and a decryption key, the first upstream neighbor intermediate processor contains the encryption key associated with the decryption key of the particular processor and the first downstream neighbor intermediate processor contains the decryption key associated with the encryption key of the particular processor.

[0057] In a second step E2, new encryption / decryption key pairs are generated and / or received by a third-party entity.

[0058] Thus, the initial ndep processor comprises:

[0059] - a fourth encryption key K4 and a fourth decryption key K'4; and

[0060] - a fifth encryption key K5 and a fifth decryption key K'5.

[0061] The first intermediate processor n~fa includes a sixth encryption key K6 and a sixth decryption key K'6.

[0062] The second intermediate processor «2^ includes a seventh encryption key K7 and a seventh decryption key K'7.

[0063] It should be noted here that the starting processor ndep receives two new encryption / decryption key pairs. Alternatively, the number of encryption / decryption key pairs received by the starting processor is greater than two.

[0064] Steps E3 to E7 of figures 4 to 6 illustrate sub-steps of an overall step of transferring the new decryption keys generated in the transmission path.

[0065] Thus in the third substep E3, the starting processor ndep encrypts a new fourth decryption key K'4 using the first encryption key Kp. In the same way the starting processor nd'p encrypts a new fifth decryption key K'5 using the first encryption key Kb. The new encrypted fourth decryption key K'4 and the new encrypted fifth decryption key K'5 are transmitted to the first intermediate processor n^.

[0066] In this third substep E3, a new sixth decryption key K'6 is encrypted using the second encryption key K2 by the first intermediate processor and sent to the second intermediate processor n?Hr

[0067] Finally, in this third substep E3, a new seventh decryption key K'7 is encrypted using the third encryption key K3 by the second intermediate processor and sent to the arrival processor narr.

[0068] The transfer of decryption keys by the starting processor ndep leads in a cascade to the transfer of decryption keys by the intermediate processors ni »2 'hnf

[0069] In the fourth substep E4, the first intermediate processor uses the first decryption key K1 to obtain the new fourth decryption key K'4 and the new fifth decryption key K'5. Similarly, the second intermediate processor njnt uses the second decryption key K'2 to obtain the new sixth decryption key K'6. Finally, the arrival processor narr uses the new third decryption key K'3 to obtain the new seventh decryption key K'7.

[0070] It should be noted that in this fourth substep E4, the new sixth decryption key K'6 is substituted in the first intermediate processor by the new fourth decryption key K'4 and the new fifth decryption key K'5. Similarly, the new seventh decryption key K'7 is substituted in the second intermediate processor n^nt by the new sixth decryption key K'6. The new fourth decryption key K'4 and the new fifth decryption key K'5 are removed from the starting processor ndep. The new fourth encryption key K4 and the new fifth encryption key K5 are retained in the arrival processor narr. Similarly, the new sixth encryption key K6 is retained in the first intermediate processor and the new seventh encryption key K7 is retained in the second processor

[0071] In the fifth substep E5, the new fifth decryption key K'5 is encrypted using the second encryption key K2 in the first processor intermediate, the whole being transmitted to the second intermediate processor Similarly, the new sixth decryption key K'6 is encrypted using the third encryption key K3 in the second intermediate processor, the whole being transmitted to the arrival processor n»rr.

[0072] In the sixth substep E6, the new fifth decryption key K'5 is obtained in the second intermediate processor using a decryption with the second decryption key K'2. Similarly, the new sixth decryption key K'6 is obtained in the arrival processor n'rr using a decryption with the third decryption key K'3. In the first intermediate processor n^, the new fifth decryption key K'5 is deleted. In the second intermediate processor n?lf, the new sixth decryption key K'6 is replaced by the new fifth decryption key K'5.

[0073] In the seventh substep E7, the original encryption / decryption keys are removed from the transmission path. From then on, the starting processor ndep includes the new fourth encryption key K4 and the new fifth encryption key K5. The first intermediate processor includes the new fourth decryption key K'4 and the new sixth encryption key K6. The second intermediate processor includes the new fifth decryption key K'5 and the new seventh encryption key K7. The arriving processor narr includes the new sixth decryption key K'6 and the new seventh decryption key K'7.

[0074] A new encryption key is thus shifted by a step equal to 2 with respect to a new decryption key in the key pair of the intermediate processors nlnt> That is to say that for a particular intermediate processor, having a new encryption key and a new decryption key, the second upstream neighboring intermediate processor contains the encryption key associated with the new decryption key of the particular processor and the second downstream neighboring intermediate processor contains the decryption key associated with the encryption key of the particular processor.

[0075] The transmission path thus established makes it possible to secure the transmission of data, for example a message between the starting processor ndep and the receiving processor nmr. In the event that such a message arrives at the starting processor ndep, this message is encrypted using the new fifth encryption key K5, the whole being then encrypted by the new fourth encryption key K4ct sent to the first intermediate processor. The first intermediate processor 1^ applies the new fourth decryption key K'4 and then encrypts again With the new sixth encryption key K6, the message encrypted with the new fifth encryption key K5 and the new sixth encryption key K6 is transmitted to the second processor "2,^". Since the second processor is capable of applying commutative decryption algorithms, it is possible to decrypt using the new fifth decryption key K'5 and then encrypt with the new seventh encryption key K7. The entire package is then transmitted to the arrival processor n'rr, which can apply the new sixth decryption key K'6 and the new seventh decryption key K'7 to recover the message.

[0076] Figures 7 to 10 illustrate a method of exchanging keys according to a general embodiment of the invention.

[0077] In this general mode, the transmission path comprises a starting processor ndep, an arriving processor w, and M intermediate processors n, ..., nL, ..., lA, arranged between the starting processor ndep and the arriving processor narr. In an initial step E1, each intermediate processor ..., ll1, ..., comprises an encryption / decryption key pair. In each of these pairs, the encryption key is shifted by a step equal to 1 relative to the decryption key. Thus, the first intermediate processor comprises a second encryption key K2 and a first decryption key K'i. The ith intermediate processor comprises an ith encryption key Ki+i and an ith decryption key K'i. Finally, the mith intermediate processor n^a comprises an Mth encryption key KM and an mith decryption key K'M.

[0078] In the initial first step Eb, a first transmission path is defined. This path includes the different processors as well as the encryption keys Ki K2j ... Ki+i, ..., KM+i and the decryption keys K'i, K'i,... K'm,K'm+i. This transmission path represents a Trust relationship between the different interconnected processors. The encryption / decryption keys were generated according to the known prior art protocol illustrated in [Fig. 2].

[0079] In the example of [Fig.7]:

[0080] - the initial ndep processor includes a first encryption key Ki;

[0081] - the first intermediate processor includes a first key of decryption K\ associated with the first encryption key Ki as well as a second encryption key K2;

[0082] - the ith intermediate processor includes an ith decryption key K'i thus that an i+ith encryption key Ki+i;

[0083] The last intermediate processor includes a decryption key Mieme K'm and an encryption key M+lieme Km+i;

[0084] The arrival processor n«rr includes an M+lieth decryption key K'M+b

[0085] It will be noted that each intermediate processor nlint includes an encryption key / decryption key pair: Ki+i / K'i.

[0086] In each of these pairs, the encryption key is thus shifted by a step equal to 1 with respect to the decryption key. That is to say, for a particular intermediate processor, having an encryption key and a decryption key, the upstream neighboring intermediate processor contains the encryption key associated with the decryption key of the particular processor and the downstream neighboring intermediate processor contains the decryption key associated with the encryption key of the particular processor.

[0087] In a second step E2, new encryption / decryption key pairs are generated. More specifically, Q new encryption / decryption key pairs NKi / NK'i,..., NKj / NK'j, ..., NKq / NK'q are generated in the starting processor ndep, Q being less than M. In addition, a new intermediate encryption / decryption key pair NKinti / NK'intb, ..., NKinti / NK'inti,..., NKintM / NK'intM is generated in each intermediate processor ..., ni n^1

[0088] These new key pairs can be generated directly in the starting processor and each intermediate processor. Alternatively, these new key pairs are generated by a third-party entity and transmitted to the various processors.

[0089] Thus, the initial processor ildep includes a first new encryption key NKi and a first decryption key NK' b ...., a jth new encryption key NKj and a jth new decryption key, and finally a qth new encryption key NKj and a qth new decryption key.

[0090] The first intermediate processor includes a first new intermediate encryption key NKinti and a first new intermediate decryption key NK'intb

[0091] The ith intermediate processor includes a new intermediate encryption key NKinti and a new intermediate decryption key NK'inti.

[0092] The last intermediate processor includes a new intermediate encryption key M1 and a new intermediate decryption key M1 NK'intM.

[0093] Steps E3 to E7 of Figures 8 to 10 illustrate substeps of an overall step of transferring the new decryption keys generated in the transmission path.

[0094] Thus, in the third substep E3, the starting processor ndep encrypts the new first decryption key NK'i using the first encryption key Kb, the new jth decryption key NK'j using the first encryption key Ki, ... the new qth decryption key NK'Q using the first encryption key Kb

[0095] In this third substep E3, the new first intermediate decryption key NK'inti is encrypted using the second encryption key K2 by the first intermediate processor n}nt and sent to the next intermediate processor.

[0096] In this third substep E3, the new ith decryption key NK'intiest is encrypted using the i+ith encryption key Ki+i by the ith intermediate processor n\ta ct sent to the next processor.

[0097] In this third substep E3, the new Mieme decryption key NK'intM is encrypted using the M+lieme encryption key KM+i by the last intermediate processor and sent to the arrival processor nw.

[0098] The transfer of the new decryption keys by the starting processor ndep causes in cascade the transfer of the new intermediate decryption keys by the intermediate processors n'-^.

[0099] In other words, at each transmission by the ith intermediate processor n1^ of Qi new decryption keys, the last Mi intermediate processors in the transmission path transmit to their neighboring processor a new intermediate decryption key.

[0100] These new intermediate decryption keys transmitted are decrypted at step E4.

[0101] In substep E3, the process includes a transmission by the starting node ndep of the Q new decryption keys to the first intermediate processor n^.

[0102] In substep E5, the first intermediate processor transmits Ql new decryption keys chosen from among the Q new decryption keys generated, to the second intermediate processor. These new intermediate decryption keys are decrypted in step E6.

[0103] As long as i is less than Q, the process includes a transmission by the ith intermediate processor n11 of Qi new decryption keys chosen from among the Q-(i+1) new decryption keys previously transmitted, to an i+ith intermediate processor n^.

[0104] When i is equal to Q, the method comprises a transmission by the Qth intermediate processor to the Qth processor of a new decryption key chosen from among the two new decryption keys previously transmitted

[0105] Fig. 10 illustrates the state of the keys in the transmission path once the last transmission has been carried out.

[0106] It will be noted that the new intermediate encryption keys NKi,..., NKr .... NKq; NKint i, ..., NKint i5 ..., NKint M generated in the intermediate processors remain in said intermediate processors so that each intermediate processor belonging to the last MQ processors includes a new pair of intermediate encryption key / intermediate decryption key in which said intermediate encryption key is shifted by a step equal to Q with respect to said intermediate decryption key in the transmission path.

[0107] Thus, for example, for the last intermediate processor n^, the intermediate encryption key / intermediate decryption key pair is NKintM / NK'intM_Q.

[0108] It will also be noted that the arrival processor narr is capable of receiving the Q new intermediate decryption keys NK'intM>....NK'intM.Q generated in the last MQ intermediate processors of the transmission path.

[0109] The transmission path thus obtained by the sub-steps of figures 7 to 10 constitutes a computer platform.

[0110] It should be noted that in this platform the interconnected processors are capable of performing encryption and / or decryption operations, said encryption and / or decryption operations being commutative.

[0111] In a particular embodiment, a connected platform arrangement comprises at least one data-emitting platform and at least one data-receiving platform, said connected platforms each having a plurality of interconnected processors.

Claims

Demands

1. A method for exchanging keys to secure data transmission in a computer platform (1), said computer platform (1) comprising a plurality of interconnected processors forming a transmission path, each processor in the transmission path being capable of performing encryption operations from an encryption key, each processor in the transmission path being capable of performing decryption operations from a decryption key, said encryption key and said decryption key belonging to an encryption / decryption key pair, said transmission path comprising a starting processor (dep), a destination processor (w), and M intermediate processors (n, n, ..., arranged between the starting processor (^dep) and the receiving processor (w«rr), and in an initial step (E1) each intermediate processor includes an encryption / decryption key pair (K2 / K' i, ..., Ki+i / K ; ..., Km+i / K m), said encryption key (K2 , ..Ki+i, ..., Km+i) being offset by a step equal to 1 with respect to said decryption key (K' b ..., K';, ..., K'M) in the transmission path; said process comprising: - a step (E2) of generating new encryption / decryption key pairs, said generation step comprising: - a generation of Q encryption / decryption key pairs (NKi / NK'i,..., NK / NK'j, ..., NKQ / NK'Q) in the starting processor ^dep^ Q being less than or equal to M; - a generation of a new intermediate encryption / decryption key pair (NKint i / , NK'int b ..., NKint i / NK'int ;...., NKint M / NK'int M) in each intermediate processor ..., m / ) ■ 'hnf ' ' * ' 'hnv - a step of transferring (E3, E4, E5, E6, E7) from step to step the new decryption keys (NK'i...., NK'j. . NK'Q; NK'int b ..., NK'int i, ..., NK'int M) generated in the starting processor (ndep) and in the intermediate processors (nL ..., ti; ..., n%t), said step of transferring being secured using the key pairs. of the initial encryption / decryption key stage, said transfer stage beginning with a diffusion of the Q new decryption keys (NK'i ..., NK'j, ..., NK'q) from the starting processor (ndep) to the first Q intermediate processors ..., in the transmission path, said diffusion resulting in a movement in the transmission path of the new intermediate decryption keys (NK'i ..., NK'j, ..., NK'Q; NK'intb ..., NK'inti, ..., NK'intM) generated in the intermediate processors (wl., ..., ..., the new intermediate keys of encryption (NKb..., NK, NKQ ; NKint b ..., NKint b ..., NKint M) generated in the intermediate processors remaining in said intermediate processors such that each intermediate processor belonging to the MQ last processors includes a new encryption / decryption key pair in which said encryption key is shifted by a step equal to Q with respect to said decryption key in the transmission path.

2. A key exchange method according to claim 1, wherein the arrival processor (narr) is capable of receiving Q new intermediate decryption keys generated in the last MQ intermediate processors of the transmission path.

3. A key exchange method according to any one of claims 1 or 2, wherein the dissemination of the Q new decryption keys (NK'i,..., NK'j, ..., NK'q) comprises, successively: - a transmission by the starting node of the Q new decryption keys (NK'b..., NK'j, ..., NK'q) to a first intermediate processor njllt; - a transmission by the first intermediate processor of Ql new decryption keys chosen from among the Q new decryption keys generated, to a second intermediate processor; - a transmission by the second intermediate processor n^!t of Q-2 new decryption keys chosen from among the Q-1 new decryption keys previously transmitted, to a third intermediate processor; - as long as i is less than Q, a transmission via the ith intermediate processor n'int de Qi new chosen decryption keys among the Q-(i+1) new decryption keys previously transmitted, to an (i+l)th intermediate processor n1^, - when i is equal to Q, a transmission by the (Ql)th intermediate processor of a new decryption key chosen from among the two new decryption keys previously transmitted, to the Qth intermediate processor.

4. A key exchange method according to claim 3 wherein, at each transmission by the ith intermediate processor n!int of Qi new decryption keys, the Mi last intermediate processors in the transmission path transmit to their neighbor processor a new decryption key, said new decryption key having been previously generated in an intermediate processor during the previous generation step.

5. Computer platform comprising a plurality of interconnected processors forming a transmission path, said transmission path having been formed from the steps of the key exchange method according to any one of claims 1 to 4.

6. Computer platform according to claim 5 wherein the interconnected processors are capable of performing encryption and / or decryption operations, said encryption and / or decryption operations being commutative.

7. Method of transmitting secure data from a computer platform according to any one of claims 5 or 6.

8. Connected platform device comprising at least one data-emitting platform and at least one data-receiving platform, said connected platforms each having a plurality of interconnected processors according to any one of claims 5 or 6.

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