Chip frequency modulation method and apparatus of computing device, hash board, computing device and storage medium

Abstract

The application provides a chip frequency adjusting method and device of a computing device, a computing power board, the computing device and a storage medium. The computing device is provided with at least one operation chip, and the operation chip is provided with a plurality of cores. The chip frequency adjusting method comprises the following steps: a plurality of working frequencies are set for the operation chip of the computing device, and the plurality of cores in the operation chip work at each working frequency; the computing performance index of each core at the current working frequency is analyzed; and according to the computing performance index of the core, the current working frequency of the core is adjusted upward or downward, that is, the frequency of the core with high computing performance is adjusted upward, and the frequency of the core with low computing performance is adjusted downward. Therefore, the application can automatically adjust the frequency corresponding to each core according to the actual computing performance of each core in the operation chip of the computing device, so that the computing performance of the core is maximized, and the computing performance of the operation chip and the overall operation device is improved.

Description

[0001] This application is a divisional application. The original application was filed on June 6, 2018; the original application number was 201810576556.3; and the original invention was entitled: Chip Frequency Modulation Method, Apparatus, Computing Board, Computing Device, and Storage Medium for Computing Devices. Technical Field

[0002] This invention relates to the field of chip frequency modulation technology for computing devices, and more particularly to a chip frequency modulation method, apparatus, computing board, computing device, and storage medium for computing devices. Background Technology

[0003] Computing devices used for massive data processing typically integrate a large number of computing chips. Due to limitations in chip manufacturing processes, the performance, computing power, and frequency of different chips vary. Furthermore, a single computing chip usually consists of multiple independent cores, and variations in process variations and voltage drops at different locations within the chip also result in different actual performance characteristics for each core. Therefore, dynamically adjusting the actual required frequency of the computing chips and setting adaptive schemes for each core to address these performance differences is a pressing issue. Currently, computing devices provide a uniform frequency for each computing chip and its cores, which fails to leverage the computational advantages of higher-performing cores, while weaker cores negatively impact the overall computing performance of the device.

[0004] Furthermore, Chinese patent application CN201611169618.6 discloses an adjustment circuit that is connected to each series-connected power supply chip to adjust the voltage, temperature, or frequency of each chip. When adjusting the frequency of each series-connected power supply chip, the adjustment unit checks the operating status of each power supply unit within the chip at a preset cycle. If any power supply unit is not operating normally, its operating frequency is increased or decreased within a preset frequency range by a preset frequency step. The operating status of the power supply unit is determined based on the status register indicating the voltage, temperature, and operating frequency; or by the feedback data from the power supply unit to the data sent to it.

[0005] In one embodiment disclosed in Chinese patent application CN201611169618.6, when the adjustment circuit adjusts the frequency of each series-connected power supply chip, the frequency adjustment circuit specifically uses a detector to detect whether the working state of each power supply unit in the series-connected power supply chip is normal according to a preset cycle. If the working state of any power supply unit is abnormal, a regulator can be used to increase or decrease the working frequency of the abnormal power supply unit within a preset frequency range according to a preset frequency step size. It can be seen that CN201611169618.6 discloses that the regulator can adjust the chip frequency, but it only adjusts the chip's working frequency based on the working state of the power supply unit, such as whether it is transmitting and receiving data normally, voltage status, temperature status, and frequency status. The frequency adjustment mechanism lacks accuracy and cannot fully utilize the chip's computing performance.

[0006] In conclusion, the existing technology obviously has inconveniences and defects in practical use, so it is necessary to improve it. Summary of the Invention

[0007] To address the aforementioned shortcomings, the present invention aims to provide a chip frequency tuning method, apparatus, computing board, computing device, and storage medium for a computing device. This method can automatically adjust the frequency of each core according to its actual computing performance, thereby maximizing the computing performance of the cores and improving the computing performance of the computing chip and the overall computing device.

[0008] This invention provides a chip frequency modulation method for a computing device, wherein the computing device is provided with at least one computing chip, and the computing chip is provided with multiple cores, characterized by comprising the following steps:

[0009] Multiple operating frequency points are set for the computing chip of the computing device, and the multiple cores in the computing chip operate at each of the operating frequency points respectively;

[0010] Analyze the computational performance metrics of each core at the current operating frequency;

[0011] Based on the kernel's computing performance metrics, the kernel's current operating frequency can be adjusted upwards or downwards.

[0012] In the above-mentioned chip frequency modulation method, the operating frequency points include at least one high-frequency operating frequency point, at least one intermediate operating frequency point, and at least one low-frequency operating frequency point. The highest frequency among the high-frequency operating frequency points is the highest operating frequency point, and the lowest frequency among the low-frequency operating frequency points is the lowest operating frequency point.

[0013] The above-described chip frequency tuning method, wherein adjusting the current operating frequency of the core based on the core's computational performance metrics includes:

[0014] Based on the computational performance metrics of the kernel, the number of kernels operating at the intermediate operating frequency is greater than the number of kernels operating at the low operating frequency and / or the number of kernels operating at the high operating frequency.

[0015] In the above-described chip frequency modulation method, multiple cores are distributed evenly, unevenly, or randomly at the operating frequency point according to predetermined rules.

[0016] The above-described chip frequency tuning method, wherein adjusting the current operating frequency of the core based on the core's computational performance metrics includes:

[0017] The current distribution status of the frequency-modulated kernel at each of the operating frequency points is statistically analyzed.

[0018] Based on the current distribution state of the kernel and a predetermined frequency adjustment mechanism, the frequency of the operating frequency is adjusted and set. The frequency adjustment mechanism is the correspondence between the kernel distribution state and the frequency adjustment.

[0019] The above-described chip frequency modulation method, wherein adjusting the frequency of the operating frequency point according to the current distribution state of the core and a predetermined frequency adjustment mechanism includes:

[0020] Based on the current distribution state of the kernel and a predetermined frequency adjustment mechanism, at least a portion of the current distribution state is moved in its coordinate system.

[0021] The above-described chip frequency modulation method, wherein adjusting the frequency of the operating frequency point according to the current distribution state of the core and a predetermined frequency adjustment mechanism includes:

[0022] Based on the current distribution state of the kernel and the predetermined frequency adjustment mechanism, the distribution map of the current distribution state is shifted to the left or right in its coordinate system.

[0023] The above-described chip frequency tuning method, wherein the step of adjusting the frequency of the operating frequency point according to the current distribution state of the core and the frequency adjustment mechanism further includes:

[0024] If more than a predetermined second ratio of the cores operates at at least one of the high-frequency operating points, the at least one operating frequency point is modified to at least one optimized high-frequency operating point, the frequency of the optimized high-frequency operating point being higher than the frequency of the highest operating frequency point; and / or

[0025] If more than a predetermined third ratio of the cores operates at at least one of the low-frequency operating points, the at least one operating point is modified to at least one optimized low-frequency operating point, the frequency of which is lower than the frequency of the lowest operating point.

[0026] The above-described chip frequency modulation method, wherein the step of modifying at least one of the operating frequencies to at least one optimized high-frequency operating frequency if more than the second ratio of the cores operates at at least one of the high-frequency operating frequencies further includes:

[0027] If the kernel operates at the highest operating frequency point exceeding the second ratio, modify one of the operating frequencies point to an optimized high-frequency operating frequency point; and / or

[0028] The step of modifying at least one of the operating frequencies to at least one optimized low-frequency operating frequency if the kernel operates at at least one of the predetermined third ratios further includes:

[0029] If more than the third ratio of the kernels are operating at the lowest operating frequency, then one of the operating frequencies is modified to an optimized low-frequency operating frequency.

[0030] The above-described chip frequency modulation method, wherein the step of adjusting the frequency of the operating frequency point according to the current distribution state and the frequency adjustment mechanism further includes:

[0031] If the number of cores operating at at least one of the aforementioned high-frequency operating points is the largest, then at least one of the aforementioned operating frequencies is modified to at least one optimized high-frequency operating frequency, wherein the frequency of the optimized high-frequency operating frequency is higher than the frequency of the highest operating frequency; and / or

[0032] If the number of cores operating at at least one of the low-frequency operating points is the largest, then at least one of the operating points is modified to at least one optimized low-frequency operating point, the frequency of which is lower than the frequency of the lowest operating point.

[0033] The above-described chip frequency modulation method, wherein, if the number of cores operating at at least one of the high-frequency operating points is the largest, the step of modifying at least one of the operating frequencies to at least one of the optimized high-frequency operating points further includes:

[0034] If the number of cores operating at the highest operating frequency is the largest, then one of the operating frequencies is modified to become one of the optimized high-frequency operating frequencies; and / or

[0035] If the number of cores operating at at least one of the low-frequency operating points is the largest, the step of modifying at least one of the operating frequencies to at least one of the optimized low-frequency operating points further includes:

[0036] If the number of kernels operating at the lowest operating frequency is the largest, then one of the operating frequencies is modified to become an optimized low-frequency operating frequency.

[0037] The above-described chip frequency modulation method, wherein the step of adjusting the frequency of the operating frequency point according to the current distribution state and the frequency adjustment mechanism further includes:

[0038] If the kernel operates at at least one of the intermediate operating frequencies exceeding the predetermined fourth ratio, stop adjusting the frequency setting of the operating frequency; or

[0039] If the number of cores operating at at least one of the intermediate operating frequencies is the highest, stop adjusting the frequency setting of the operating frequency.

[0040] The aforementioned chip frequency tuning method, wherein the step of analyzing the computational performance indicators of each core at the current operating frequency further includes:

[0041] Within a predetermined adjustment period, analyze whether the kernel's calculation results reach a predetermined calculation accuracy.

[0042] The aforementioned chip frequency tuning method, wherein the step of analyzing the computational performance indicators of each core at the current operating frequency further includes:

[0043] Within a predetermined adjustment period, analyze whether the computational performance indicators of the kernel have reached a predetermined first indicator threshold, a second indicator threshold, and / or a third indicator threshold.

[0044] The step of adjusting the current operating frequency of the kernel based on the kernel's computing performance metrics further includes:

[0045] If the computing performance index of the kernel reaches the first index threshold, the current operating frequency of the kernel will be increased.

[0046] If the kernel's computational performance metric does not reach the second metric threshold, the kernel's current operating frequency will be lowered; and / or

[0047] If the computing performance index of the kernel reaches the third index threshold, the current operating frequency of the kernel will be reduced.

[0048] The aforementioned chip frequency modulation method further includes the following steps:

[0049] If the core operating at at least one predetermined optimized operating frequency exceeds a predetermined first ratio, frequency tuning of the core is stopped; or

[0050] If the number of kernels operating at at least one of the optimized operating frequencies is the largest, then frequency tuning of the kernels is stopped.

[0051] The aforementioned chip frequency tuning method, wherein the step of analyzing the computational performance indicators of each core at the current operating frequency further includes:

[0052] Within a predetermined adjustment period, analyze whether the computational accuracy of the kernel reaches a predetermined first accuracy threshold and / or a predetermined second accuracy threshold.

[0053] The step of adjusting the current operating frequency of the kernel based on the kernel's computing performance metrics further includes:

[0054] If the computational accuracy of the kernel reaches the first accuracy threshold, the current operating frequency of the kernel is increased; and / or

[0055] If the calculation accuracy of the kernel does not reach the second accuracy threshold, the current operating frequency of the kernel will be lowered.

[0056] The above-described chip frequency tuning method, wherein the step of analyzing whether the computational accuracy of the core reaches the first accuracy threshold and / or the second accuracy threshold within a predetermined adjustment period further includes:

[0057] During the adjustment period, the correctness of the random numbers submitted by the kernel is analyzed.

[0058] The number of correct random numbers and the number of incorrect random numbers submitted by the kernel during the adjustment period are counted.

[0059] Based on the number of correct random numbers and the number of incorrect random numbers, the kernel calculates the random number calculation accuracy rate within the adjustment period, and determines whether the random number calculation accuracy rate reaches a predetermined first accuracy threshold and / or a second accuracy threshold.

[0060] The step of adjusting the current operating frequency of the kernel based on the kernel's computing performance metrics further includes:

[0061] If the accuracy of the random number calculation of the kernel reaches the first accuracy threshold, the current operating frequency of the kernel is adjusted to the previous operating frequency.

[0062] If the accuracy of the random number calculation of the kernel does not reach the second accuracy threshold, the current operating frequency of the kernel will be lowered to the next operating frequency.

[0063] The above-described chip frequency tuning method, wherein the step of analyzing whether the computational accuracy of the core reaches a predetermined accuracy threshold within a predetermined adjustment period further includes:

[0064] According to the preset real-time adjustment instructions, the calculation accuracy of the kernel within the adjustment period is analyzed in real time to see whether it reaches the first accuracy threshold and the second accuracy threshold.

[0065] According to a preset timed adjustment instruction, within the adjustment time period set by the timed adjustment instruction, it is analyzed whether the calculation accuracy of the kernel within the adjustment period reaches the first accuracy threshold and the second accuracy threshold; or

[0066] Based on the received real-time adjustment instructions, analyze whether the calculation accuracy of the kernel within the adjustment period reaches the first accuracy threshold and the second accuracy threshold;

[0067] The step of adjusting the current operating frequency of the kernel based on the kernel's computing performance metrics further includes:

[0068] If the calculation accuracy of the kernel within the adjustment period reaches the first accuracy threshold, the current operating frequency of the kernel is adjusted up to the previous operating frequency in real time; if the calculation accuracy of the kernel within the adjustment period does not reach the second accuracy threshold, the current operating frequency of the kernel is adjusted down to the next operating frequency in real time.

[0069] During the adjustment period, if the kernel's computational accuracy reaches the first accuracy threshold within the adjustment period, the kernel's current operating frequency is increased to the previous operating frequency; if the kernel's computational accuracy does not reach the second accuracy threshold within the adjustment period, the kernel's current operating frequency is decreased to the next operating frequency; or

[0070] According to the received real-time adjustment instruction, if the calculation accuracy of the kernel within the adjustment period reaches the first accuracy threshold, the current operating frequency of the kernel is increased to the previous operating frequency; if the calculation accuracy of the kernel within the adjustment period does not reach the second accuracy threshold, the current operating frequency of the kernel is decreased to the next operating frequency; according to the received stop adjustment instruction, the adjustment of the current operating frequency of the kernel is stopped.

[0071] The aforementioned chip frequency modulation method includes the following steps:

[0072] The frequency setting step involves setting multiple operating frequency points for the computing chip of the computing device.

[0073] The computational performance analysis steps analyze whether each calculation of the kernel at the current operating frequency is correct. For each correct calculation by the kernel, a predetermined correct calculation weight value is increased by one, and for each incorrect calculation by the kernel, a predetermined incorrect calculation weight value is decreased by one.

[0074] In the frequency adjustment step, if the current value of the kernel reaches a predetermined correct calculation threshold, the current operating frequency of the kernel is increased; or, if the current value of the kernel reaches a predetermined incorrect calculation threshold, the current operating frequency of the kernel is decreased.

[0075] The aforementioned chip frequency modulation method further includes a reference node value, and the computational performance analysis step further includes:

[0076] The correctly calculated weight value is increased once to the reference node value, and the incorrectly calculated weight value is decreased once to the reference node value.

[0077] The aforementioned chip frequency modulation method further includes:

[0078] Determine whether the current reference node value of the kernel has reached the correct calculation threshold or the incorrect calculation threshold;

[0079] The frequency adjustment step further includes:

[0080] If the current reference node value of the kernel reaches the calculated correct threshold, the current operating frequency of the kernel will be increased.

[0081] If the current reference node value of the kernel reaches the calculation error threshold, the current operating frequency of the kernel will be lowered.

[0082] The aforementioned chip frequency modulation method further includes:

[0083] By adjusting the reference node value, the correct calculation weight value, the incorrect calculation weight value, the correct calculation threshold, and / or the incorrect calculation threshold of the kernel, the adjustment cycle of the kernel or the resident error rate that the kernel expects to tolerate is controlled.

[0084] The aforementioned chip frequency modulation method further includes:

[0085] The kernel's expected tolerance for resident error rate is controlled by adjusting the ratio of the correctly calculated weight value to the incorrectly calculated weight value.

[0086] The aforementioned chip frequency modulation method further includes:

[0087] The adjustment period is controlled by adjusting the absolute values ​​of the correctly calculated weight value and the incorrectly calculated weight value.

[0088] The aforementioned chip frequency modulation method further includes:

[0089] The adjustment period is controlled by adjusting the absolute values ​​of the correct calculation threshold and the incorrect calculation threshold.

[0090] In the above-mentioned chip frequency modulation method, the formula for calculating the dwell error rate is: Dwell error rate = calculated correct weight value / (calculated correct weight value + calculated incorrect weight value).

[0091] The above-described chip frequency modulation method, wherein the step of analyzing whether each calculation of the core is correct further includes:

[0092] Analyze whether the random numbers submitted by the kernel each time are correct;

[0093] The step of adding the correct calculation weight value to the reference node value once for each correct calculation by the kernel at least once, and adding the incorrect calculation weight value to the reference node value once for each incorrect calculation by the kernel at least once, further includes:

[0094] For each correct random number submitted by the kernel, the calculated correct weight value is increased by one to the reference node value; for each incorrect random number submitted by the kernel, the calculated incorrect weight value is decreased by one to the reference node value.

[0095] The above-described chip frequency tuning method, wherein the step of analyzing whether the random number submitted by the kernel each time is correct further includes:

[0096] After the kernel submits a random number, the kernel calculates a first result from the random number using a predetermined algorithm, and the first result contains a first feature;

[0097] The verification unit of the computing chip calculates a second result from the random number using the same algorithm, and the second result contains a second feature;

[0098] If the first feature is the same as the second feature, the verification unit determines that the random number is a correct random number; otherwise, it determines that the random number is an incorrect random number.

[0099] The above-described chip frequency tuning method further includes, in the step of determining whether the current reference node value of the core reaches the calculated correct threshold or the calculated incorrect threshold:

[0100] According to the preset real-time adjustment instructions, it is determined in real time whether the current reference node value of the kernel has reached the calculated correct threshold or the calculated incorrect threshold;

[0101] According to a preset timed adjustment instruction, within the adjustment time period set by the timed adjustment instruction, it is determined whether the current reference node value of the kernel has reached the correct calculation threshold or the incorrect calculation threshold; or

[0102] Based on the received real-time adjustment instructions, analyze whether the current reference node of the kernel has reached the correct calculation threshold or the incorrect calculation threshold;

[0103] The step of adjusting the current operating frequency of the kernel based on the kernel's computational performance metrics further includes:

[0104] If the current reference node value of the kernel reaches the calculation correct threshold, the current operating frequency of the kernel is adjusted up to the previous operating frequency in real time; if the current reference node value of the kernel reaches the calculation error threshold, the current operating frequency of the kernel is adjusted down to the next operating frequency in real time.

[0105] During the adjustment period, if the current reference node value of the kernel reaches the correct calculation threshold, the current operating frequency of the kernel is increased to the previous operating frequency; if the current reference node value of the kernel reaches the incorrect calculation threshold, the current operating frequency of the kernel is decreased to the next operating frequency; or

[0106] According to the received real-time adjustment instruction, if the current reference node value of the kernel reaches the calculation correctness threshold, the current operating frequency of the kernel is increased to the previous operating frequency; if the current reference node value of the kernel reaches the calculation error threshold, the current operating frequency of the kernel is decreased to the next operating frequency; according to the received stop adjustment instruction, the adjustment of the current operating frequency of the kernel is stopped.

[0107] In the above-described chip frequency tuning method, the multiple cores in the computing chip operate at their respective operating frequencies, and the number of the multiple operating frequencies and the frequency differences between them are adjustable.

[0108] The above-described chip frequency tuning method, wherein the step of setting multiple operating frequency points for the computing chip of the computing device and operating the multiple cores in the computing chip at each of the operating frequency points further includes:

[0109] Multiple operating frequencies are set for the computing chip through multiple phase-locked loop circuits, and the operating frequencies are in a one-to-one correspondence with the phase-locked loop circuits.

[0110] The step of adjusting the current operating frequency of the kernel based on the kernel's computing performance metrics further includes:

[0111] Based on the computational performance metrics of the kernel, the current operating frequency of the kernel is adjusted up or down via the phase-locked loop circuit.

[0112] In the above-described chip frequency modulation method, the phase-locked loop circuit is located inside or outside the computing chip.

[0113] In the above-described chip frequency modulation method, the frequency difference between adjacent operating frequency points is 1~10%.

[0114] The present invention also provides a chip frequency modulation device for a computing device, based on the chip frequency modulation method described in any one of the above claims, wherein the computing device is provided with at least one arithmetic chip, and the arithmetic chip is provided with multiple cores, characterized in that the chip frequency modulation device comprises:

[0115] The frequency setting module is used to set multiple operating frequency points for the computing chip of the computing device, and to make the multiple cores in the computing chip work at each of the operating frequency points respectively.

[0116] The computational performance analysis module is used to analyze the computational performance metrics of each core at the current operating frequency.

[0117] The frequency adjustment module is used to adjust the current operating frequency of the kernel upwards or downwards according to the kernel's computing performance indicators.

[0118] In the aforementioned chip frequency modulation device, the operating frequency points include at least one high-frequency operating frequency point, at least one intermediate operating frequency point, and at least one low-frequency operating frequency point. The highest frequency among the high-frequency operating frequency points is the highest operating frequency point, and the lowest frequency among the low-frequency operating frequency points is the lowest operating frequency point.

[0119] In the aforementioned chip frequency modulation device, the number of cores operating at the intermediate operating frequency is greater than the number of cores operating at the low-frequency operating frequency and / or the number of cores operating at the high-frequency operating frequency, based on the computational performance index of the cores.

[0120] In the aforementioned chip frequency modulation device, multiple cores are distributed evenly, unevenly, or randomly at the operating frequency point according to predetermined rules.

[0121] The aforementioned chip frequency modulation device further includes:

[0122] The frequency point statistics module is used to count the current distribution status of the kernel at each of the operating frequencies after frequency modulation;

[0123] The frequency adjustment module is used to adjust the frequency of the operating frequency point according to the current distribution state of the kernel and a predetermined frequency adjustment mechanism, wherein the frequency adjustment mechanism is the correspondence between the kernel distribution state and the frequency adjustment.

[0124] In the aforementioned chip frequency modulation device, adjusting the frequency of the operating frequency point according to the current distribution state of the core and a predetermined frequency adjustment mechanism includes:

[0125] Based on the current distribution state of the kernel and a predetermined frequency adjustment mechanism, at least a portion of the current distribution state is moved in its coordinate system.

[0126] In the aforementioned chip frequency modulation device, adjusting the frequency of the operating frequency point according to the current distribution state of the core and a predetermined frequency adjustment mechanism includes:

[0127] Based on the current distribution state of the kernel and the predetermined frequency adjustment mechanism, the distribution map of the current distribution state is shifted to the left or right in its coordinate system.

[0128] The aforementioned chip frequency modulation device, wherein the frequency adjustment module further includes:

[0129] A first frequency adjustment submodule is configured to, if the kernel operates at at least one of the high-frequency operating points exceeding a predetermined second ratio, modify at least one of the operating frequencies to at least one optimized high-frequency operating point, wherein the frequency of the optimized high-frequency operating point is higher than the frequency of the highest operating frequency; and / or

[0130] The second frequency adjustment submodule is used to modify at least one of the operating frequencies to at least one optimized low-frequency operating frequency if the kernel operates at at least one of the low-frequency operating frequencies for more than a predetermined third ratio. The frequency of the optimized low-frequency operating frequency is lower than the frequency of the lowest operating frequency.

[0131] The aforementioned chip frequency modulation device, wherein the frequency adjustment module further includes:

[0132] The third frequency adjustment submodule is configured to, if the number of cores operating at at least one of the aforementioned high-frequency operating points is the largest, modify at least one of the operating frequencies to at least one optimized high-frequency operating point, wherein the frequency of the optimized high-frequency operating point is higher than the frequency of the highest operating frequency; and / or

[0133] The fourth frequency adjustment submodule is used to modify at least one of the operating frequencies to at least one optimized low-frequency operating frequency if the number of the cores operating at at least one of the low-frequency operating frequencies is the largest. The frequency of the optimized low-frequency operating frequency is lower than the frequency of the lowest operating frequency.

[0134] In the aforementioned chip frequency tuning device, the computational performance analysis module is further used to analyze whether the computational results of the kernel reach a predetermined computational accuracy rate within a predetermined adjustment period.

[0135] In the aforementioned chip frequency tuning device, the computing performance analysis module is used to analyze whether the computing performance index of the core reaches a predetermined first index threshold, a second index threshold, and / or a third index threshold within a predetermined adjustment period.

[0136] The frequency adjustment module is used to increase the current operating frequency of the kernel if the computing performance index of the kernel reaches the first index value.

[0137] The frequency adjustment module is used to lower the current operating frequency of the kernel if the kernel's computing performance index does not reach the second index threshold; and / or

[0138] The frequency adjustment module is used to lower the current operating frequency of the kernel if the kernel's computing performance index reaches the third index threshold.

[0139] In the aforementioned chip frequency tuning device, the computing performance analysis module is used to analyze whether the computing accuracy of the core reaches a predetermined first accuracy threshold and / or a second accuracy threshold within a predetermined adjustment period.

[0140] The frequency adjustment module is used to increase the current operating frequency of the kernel if the calculation accuracy of the kernel reaches the first accuracy threshold; and / or to decrease the current operating frequency of the kernel if the calculation accuracy of the kernel does not reach the second accuracy threshold.

[0141] In the aforementioned chip frequency tuning device, the computing performance analysis module is further used to analyze whether each calculation of the kernel at the current operating frequency is correct. For each correct calculation by the kernel, a predetermined correct calculation weight value is increased by one, and for each incorrect calculation by the kernel, a predetermined incorrect calculation weight value is decreased by one.

[0142] The frequency adjustment module is used to increase the current operating frequency of the kernel if the current value of the kernel reaches a predetermined calculation correctness threshold; or, if the current value of the kernel reaches a predetermined calculation error threshold, to decrease the current operating frequency of the kernel.

[0143] The present invention also provides a computing board including any of the above-described chip frequency modulation devices.

[0144] The present invention also provides a computing device including any of the above-described chip frequency modulation devices.

[0145] The present invention also provides a storage medium for storing a computer program for a chip frequency modulation method for any of the above-described computing devices.

[0146] This invention automatically adjusts the frequency of the cores in a computing chip. First, multiple suitable operating frequencies are set, and the multiple cores in the computing chip operate at different frequencies. Then, based on the computing performance indicators of each core at its current operating frequency, the operating frequency of the core is adjusted upwards or downwards; that is, the frequency of cores with high computing performance is increased, and the frequency of cores with low computing performance is decreased. In this way, this invention can automatically adjust the frequency of each core according to its actual computing performance, thereby maximizing the computing performance of the cores and improving the computing performance of the computing chip and the overall computing device. Attached Figure Description

[0147] Figure 1 This is a schematic diagram of the chip frequency modulation device of the computing device of the present invention;

[0148] Figure 2 This is a schematic diagram of the chip frequency modulation device of the computing device in the first embodiment of the present invention;

[0149] Figure 3 This is a schematic diagram of the chip frequency modulation device of the computing device in the second embodiment of the present invention;

[0150] Figure 4 This is a schematic diagram of the chip frequency modulation device of the computing device in the third embodiment of the present invention;

[0151] Figure 5 This is an example diagram of parameter settings in the third embodiment of the present invention;

[0152] Figure 6 This is a schematic diagram of the chip frequency modulation device of the computing device in the fourth embodiment of the present invention;

[0153] Figure 7This is a distribution diagram of the kernel operating at various operating frequencies in the fourth embodiment of the present invention;

[0154] Figure 8 This is a flowchart of the chip frequency modulation method for the computing device of the present invention;

[0155] Figure 9 This is a flowchart of the chip frequency modulation method for a computing device in the first embodiment of the present invention;

[0156] Figure 10 This is a flowchart of the chip frequency modulation method for a computing device in the second embodiment of the present invention;

[0157] Figure 11 This is a flowchart of the preferred chip frequency modulation method for the computing device in the second embodiment of the present invention;

[0158] Figure 12 This is a flowchart of the chip frequency modulation method for a computing device in the third embodiment of the present invention;

[0159] Figure 13 This is a flowchart of the preferred chip frequency modulation method for the computing device in the third embodiment of the present invention;

[0160] Figure 14 This is a flowchart of the chip frequency modulation method for a computing device in the fourth embodiment of the present invention;

[0161] Figure 15 This is one of the flowcharts of the preferred chip frequency modulation method for a computing device in the fourth embodiment of the present invention;

[0162] Figure 16 This is the second flowchart of the preferred chip frequency modulation method for the computing device in the fourth embodiment of the present invention;

[0163] Figure 17 This is a schematic diagram of the structure of the computing device of the present invention.

[0164] Figure label:

[0165] 100-Chip frequency modulation device for computing equipment

[0166] 10-Frequency Setting Module

[0167] 20-Computational Performance Analysis Module

[0168] 21-First Analysis Submodule

[0169] 211-First Calculation Unit 212-First Verification Unit

[0170] 22-Statistics Submodule 23-First Judgment Submodule

[0171] 24-Setup Submodule 25-Second Analysis Submodule

[0172] 251-Second Calculation Unit 252-Second Verification Unit

[0173] 26-Counting Submodule 27-Second Judgment Submodule

[0174] 30-Frequency Adjustment Module

[0175] 31-Frequency Adjustment Submodule 32-Stop Frequency Adjustment Submodule

[0176] 50-Frequency Point Statistics Module 60-Frequency Point Adjustment Module

[0177] 61-First frequency adjustment submodule 62-Second frequency adjustment submodule

[0178] 63-Third frequency adjustment submodule 64-Fourth frequency adjustment submodule

[0179] 65 - First Stop Adjustment Submodule 66 - Second Stop Adjustment Submodule

[0180] 70-Phase-Locked Loop Circuit 80-Core Detailed Implementation

[0181] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0182] It should be noted that references to "an embodiment," "embodiment," "example embodiment," etc., in this specification refer to the described embodiment including specific features, structures, or characteristics, but not every embodiment must include these specific features, structures, or characteristics. Furthermore, such expressions do not refer to the same embodiment. Moreover, when describing specific features, structures, or characteristics in conjunction with embodiments, whether or not explicitly described, it is indicated that incorporating such features, structures, or characteristics into other embodiments is within the knowledge of those skilled in the art.

[0183] Furthermore, certain terms are used in the specification and subsequent claims to refer to specific components or parts. Those skilled in the art will understand that manufacturers may use different names or terms to refer to the same component or part. This specification and subsequent claims do not distinguish components or parts by differences in name, but rather by differences in function. The terms "comprising" and "including" used throughout the specification and subsequent claims are open-ended and should be interpreted as "including but not limited to." Additionally, the term "connection" here includes any direct and indirect electrical connection means. Indirect electrical connection means include connections made through other means.

[0184] Figure 1 This is a schematic diagram of the chip frequency modulation device of the computing device of the present invention. The computing device is preferably used for massive computing. The computing device is provided with at least one computing chip, and the computing chip is provided with multiple cores 80. The computing device preferably includes a control board and a computing board connected to the control board. The computing board is provided with at least one computing chip, and the computing chip is provided with multiple cores 80. Of course, the computing device may also include a heat sink, a connection board, a power module, etc.

[0185] It should be noted that the chip frequency adjustment technology of this invention actually involves two levels of frequency adjustment mechanisms: a frequency adjustment mechanism for the computing chip and a frequency adjustment mechanism at the core level. The frequency adjustment mechanism for the computing chip refers to setting several suitable operating frequencies for each computing chip and allowing each core 80 of the computing chip to operate at each of these operating frequencies, thereby fully utilizing the performance of each core 80. The frequency adjustment mechanism at the core level refers to adjusting the core 80 to a suitable operating frequency based on its actual computing performance, increasing the frequency of cores 80 with high computing performance and decreasing the frequency of cores 80 with low computing performance, thereby fully utilizing the computing performance of each core 80.

[0186] The chip frequency modulation device 100 includes at least a frequency setting module 10, a performance analysis module 20, and a frequency adjustment module 30, wherein:

[0187] The frequency setting module 10 is used to set multiple working frequency points for the computing chip of the computing device. Each working frequency point has a different frequency, and the multiple cores 80 in the computing chip work at each working frequency point respectively.

[0188] According to the frequency adjustment mechanism of the computing chip, several different frequency points are set for each computing chip, and each core 80 of the computing chip operates at each of these operating frequencies. For example, six operating frequencies are set: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz. The number of operating frequencies and the frequency differences between them can be set according to actual needs; the more operating frequencies, the more fully the computing performance of each core 80 can be utilized. When the frequency adjustment switch is activated (before the core 80 is frequency-adjusted), the cores 80 can be evenly, unevenly, or randomly distributed across the operating frequencies according to predetermined rules. Preferably, the frequency setting module 10 can, as shown in the example... Figure 2 The multiple phase-locked loop (PPL) circuits 70 shown provide multiple operating frequencies for the computing chip. Of course, the frequency setting module 10 can also set multiple operating frequencies for the computing chip through other hardware or software.

[0189] The computational performance analysis module 20 is used to analyze the computational performance metrics of each core 80 at the current operating frequency. These computational performance metrics represent the actual computational performance of the core 80 at the current operating frequency, including but not limited to computational accuracy, number of correct calculations, and computational speed. If the computational performance metrics of the core 80 are high, it indicates that the computational performance of the core 80 may have room for improvement; if the computational performance metrics of the core 80 are low, it indicates that the computational performance of the core 80 may be insufficient to operate at the frequency corresponding to the current operating frequency.

[0190] The frequency adjustment module 30 is used to adjust the current operating frequency of the core 80 upwards or downwards based on its computational performance indicators at the current operating frequency. Specifically, according to the kernel-level frequency adjustment mechanism, the core 80 is adjusted to a suitable operating frequency based on its actual computational performance, increasing the frequency of cores with high computational performance and decreasing the frequency of cores with low computational performance, thereby fully utilizing the computational performance of each core 80. Preferably, the frequency of the core 80 is adjusted periodically. If the computational accuracy of the core 80 reaches a first accuracy threshold within the frequency adjustment period, it indicates that the core 80 has not yet reached its optimal computational performance, and therefore the current operating frequency of the core 80 is increased to the next higher operating frequency. If the computational accuracy of the core 80 does not reach a second accuracy threshold within the frequency adjustment period, it indicates that the computational performance of the core 80 is insufficient to operate at the current operating frequency, and therefore the current operating frequency of the core 80 is decreased to the next lower operating frequency.

[0191] The chip frequency tuning device 100 of this invention can be located inside or outside the computing chip. This invention evaluates the performance of each core 80 in the computing chip based on its actual computing performance, adjusts the corresponding frequency of the core 80, fully utilizes the computing advantages of the higher-performing core 80, and avoids the impact of the lower-performing core 80 on the computing chip's performance, thereby maximizing the computing performance of each core 80 and improving the computing speed and accuracy of the computing chip and the overall computing device. Furthermore, the core 80 of the computing chip of this invention does not jump between different frequencies, and its operating frequency is relatively stable.

[0192] Figure 2 This is a schematic diagram of the chip frequency modulation device of a computing device in the first embodiment of the present invention. The computing device is preferably used for massive computing. The computing device preferably includes a control board and a computing board connected to the control board. At least one computing chip is disposed on the computing board, and the computing chip has multiple cores 80. Of course, the computing device may also include a heat sink, a connection board, a power module, etc. The chip frequency modulation device 100 includes at least a frequency setting module 10, a computing performance analysis module 20, and a frequency adjustment module 30, wherein:

[0193] The frequency setting module 10 is used to set multiple operating frequencies for the computing chip through multiple phase-locked loop (PLL) circuits 70, so that the multiple cores 80 in the computing chip operate at each operating frequency. Each operating frequency has a different frequency, and there is a one-to-one correspondence between the operating frequencies and the PLL circuits 70. Preferably, the PLL circuits 70 are located inside or outside the computing chip. The number of operating frequencies and the frequency differences between them can be set according to actual needs. More operating frequencies allow for better utilization of the computing performance of each core 80. For example, six operating frequencies can be set: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz. Therefore, this invention can use more PLL circuits 70 to set more operating frequencies, thus maximizing the computing performance of each core 80.

[0194] It is worth noting that the frequency difference between operating frequencies in this invention needs to be controlled within a reasonable range. When the core 80 increases its operating frequency by one frequency point, its operating frequency will increase by one frequency difference value, which can improve its computing performance due to the increased computational speed. At the same time, increasing the core's operating frequency may result in a decrease in computational accuracy, thus sacrificing some computing performance. Therefore, the frequency setting module 10 should reasonably control the frequency difference between adjacent operating frequencies so that when the core 80 adjusts from its current operating frequency to the previous operating frequency, the benefit to the core 80's computing performance should outweigh the loss. Preferably, the frequency difference between adjacent operating frequencies is 1% to 10%.

[0195] The computational performance analysis module 20 is used to analyze the computational performance indicators of each core 80 at the current operating frequency. These performance indicators represent the actual computational performance of the core 80 at the current operating frequency, including but not limited to computational accuracy, number of correct calculations, and computational speed. If the computational performance indicator of the core 80 is high, it indicates that the computational performance of the core 80 may have room for improvement; if the computational performance indicator of the core 80 is low, it indicates that the computational performance of the core 80 may be insufficient to operate at the frequency corresponding to the current operating frequency. Preferably, the computational performance analysis module 20 is used to analyze whether the computational performance indicators of the core 80 reach a predetermined first indicator threshold, a second indicator threshold, and / or a third indicator threshold within a predetermined adjustment period, wherein the first indicator threshold and the second indicator threshold may be the same or different.

[0196] The frequency adjustment module 30 is used to adjust the current operating frequency of the core 80 by means of a phase-locked loop circuit 70, based on the computing performance indicators of the core 80. Alternatively, the frequency adjustment module 30 can also adjust the current operating frequency of the core 80 using other hardware or software. Preferably, the frequency adjustment module 30 adjusts the current operating frequency of the core 80 to the previous operating frequency if the computing performance indicators of the core 80 reach a first threshold; and / or, the frequency adjustment module 30 adjusts the current operating frequency of the core 80 to the next operating frequency if the computing performance indicators of the core 80 do not reach a second threshold; and / or the frequency adjustment module 30 adjusts the current operating frequency of the core 80 to the next operating frequency if the computing performance indicators of the core 80 reach a third threshold.

[0197] For example, taking the above example of "setting 6 operating frequencies: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz," and using the current operating frequency of kernel 80 as 600MHz, the computational performance indicator is the computational accuracy of kernel 80 within the adjustment period. Both the first and second indicator thresholds are 90%. If the computational accuracy of kernel 80 reaches 90% within the adjustment period, it indicates that the computational performance of kernel 80 is good, and the current operating frequency of kernel 80 (600MHz) is increased to the previous operating frequency (650MHz). If the computational accuracy of kernel 80 within the adjustment period does not reach 90%, it indicates that the computational performance of kernel 80 is weak, and the current operating frequency of kernel 80 (600MHz) is decreased to the next operating frequency (550MHz). Those skilled in the art will understand that the previous operating frequency is not limited to the previous adjacent operating frequency; more than one previous adjacent operating frequency can be set as the previous operating frequency. Similarly, the next operating frequency is not limited to the next adjacent operating frequency; more than one next adjacent operating frequency can be set as the next operating frequency. That is, the current operating frequency of core 80 is increased from 600MHz to the previous operating frequency of 700MHz; the current operating frequency of core 80 is decreased from 600MHz to the next operating frequency of 500MHz. And so on. The interval between the previous and next operating frequencies is not limited here. Preferably, the frequency difference between the current operating frequency and the previous operating frequency is 1~10%, and the frequency difference between the current operating frequency and the next operating frequency is 1~10%, so that when core 80 is increased from the current operating frequency to the previous or next operating frequency, the benefit to the computing performance of core 80 should outweigh the loss.

[0198] For example, the computational performance metric is the computational accuracy of kernel 80 within the adjustment period, with a first threshold of 90% and a second threshold of 80%. If the computational accuracy of kernel 80 reaches 90% within the adjustment period, it indicates that the computational performance of kernel 80 is good, and the current operating frequency of kernel 80 (600MHz) is increased to the previous operating frequency (650MHz). If the computational accuracy of kernel 80 within the adjustment period does not reach 80%, it indicates that the computational performance of kernel 80 is weak, and the current operating frequency of kernel 80 (600MHz) is decreased to the next operating frequency (550MHz).

[0199] For example, the computing performance indicators are the number of correct calculations and the number of incorrect calculations by kernel 80 within the adjustment period, with a first indicator threshold of 100 and a second indicator threshold of 10. If kernel 80 achieves 100 correct calculations within the adjustment period, it indicates that the computing performance of kernel 80 is good, and the current operating frequency of kernel 80 (600MHz) is increased to the previous operating frequency (650MHz). If kernel 80 achieves 10 incorrect calculations within the adjustment period, it indicates that the computing performance of kernel 80 is weak, and the current operating frequency of kernel 80 (600MHz) is decreased to the next operating frequency (550MHz).

[0200] Preferably, the frequency adjustment module 30 further includes a frequency adjustment submodule 31 and a stop frequency adjustment submodule 32, wherein:

[0201] The frequency adjustment submodule 31 is used to adjust the current operating frequency of the core 80 upwards or downwards based on the computing performance indicators of the core 80. Preferably, the frequency adjustment submodule 31 adjusts the current operating frequency of the core 80 upwards or downwards through the phase-locked loop circuit 70 based on the computing performance indicators of the core 80. Of course, the frequency adjustment submodule 31 can also adjust the current operating frequency of the core 80 upwards or downwards through other hardware or software.

[0202] The stop frequency adjustment submodule 32 is used to stop frequency adjustment of the core 80 if the number of cores 80 operating at at least one predetermined optimized operating frequency exceeds a predetermined first ratio; or to stop frequency adjustment of the core 80 if the number of cores 80 operating at at least one of the optimized operating frequencies is the largest.

[0203] For example, one or more optimized operating frequencies can be preset from several operating frequencies. If the operating frequency of most cores 80 has reached the optimized operating frequency, it indicates that the operating frequency of each core 80 in the computing chip is already in an optimized state, which can fully utilize the computing performance of each core 80, and no further frequency adjustment is needed. Therefore, the adjustment of the core 80 operating frequency is stopped. For example, if six operating frequencies are set: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz, and two optimized operating frequencies of 600MHz and 650MHz are selected as optimized operating frequencies, if more than 80% of the cores 80 are operating at operating frequencies of 600MHz and 650MHz, then frequency adjustment of the cores 80 is stopped.

[0204] Figure 3This is a schematic diagram of the chip frequency modulation device of a computing device in the second embodiment of the present invention. The computing device is preferably used for massive computation. The computing device preferably includes a control board and a computing board connected to the control board. At least one computing chip is disposed on the computing board, and the computing chip has multiple cores 80. Of course, the computing device may also include a heat sink, a connection board, a power module, etc. The chip frequency modulation device 100 includes at least a frequency setting module 10, a computing performance analysis module 20, and a frequency adjustment module 30, wherein:

[0205] The frequency setting module 10 is used to set multiple operating frequencies for the computing chip of the computing device, each operating frequency having a different frequency, and to operate the multiple cores 80 in the computing chip at each operating frequency. That is, according to the frequency adjustment mechanism at the computing chip level, several different frequency points are set for each computing chip, and each core 80 of the computing chip operates at each of the respective operating frequencies. For example, six operating frequencies can be set: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz. The number of operating frequencies and the frequency differences between them can be set according to actual needs; the more operating frequencies, the more fully the computing performance of each core 80 can be utilized. When the frequency adjustment switch is activated (before the cores 80 are frequency-adjusted), the cores 80 can be evenly distributed, unevenly distributed, or randomly distributed across the operating frequencies according to a predetermined rule. Preferably, the frequency setting module 10 uses a method such as... Figure 2 The multiple phase-locked loop (PLL) circuits 70 shown provide multiple operating frequencies for the computing chip, allowing the multiple cores 80 within the chip to operate at their respective frequencies. There is a one-to-one correspondence between the operating frequencies and the PLL circuits 70. This invention allows for the use of more PLL circuits 70 to set more operating frequencies, thus maximizing the computational performance of each core 80. Of course, the frequency setting module 10 can also set multiple operating frequencies for the computing chip through other hardware or software.

[0206] It is worth noting that the frequency difference between operating frequencies in this invention needs to be controlled within a reasonable range. When the core 80 increases its operating frequency by one frequency point, its operating frequency will increase by one frequency difference value, which can improve its computing performance due to the increased computational speed. At the same time, increasing the core's operating frequency may result in a decrease in computational accuracy, thus sacrificing some computing performance. Therefore, the frequency setting module 10 should reasonably control the frequency difference between adjacent operating frequencies so that when the core 80 adjusts from its current operating frequency to the previous operating frequency, the benefit to the core 80's computing performance should outweigh the loss. Preferably, the frequency difference between adjacent operating frequencies is 1% to 10%.

[0207] The computational performance analysis module 20 is used to analyze, within a predetermined adjustment period, whether the computational accuracy of the kernel 80 reaches a predetermined first accuracy threshold and / or a predetermined second accuracy threshold, wherein the first accuracy threshold and the second accuracy threshold may be the same or different. If the computational accuracy of the kernel 80 reaches the predetermined first accuracy threshold, it indicates that the computational performance of the kernel 80 may have room for improvement; if the computational accuracy of the kernel 80 does not reach the predetermined second accuracy threshold, it indicates that the computational performance of the kernel 80 may be insufficient to operate at the frequency corresponding to the current operating frequency.

[0208] The frequency adjustment module 30 is configured to: if the computational accuracy of core 80 reaches a first accuracy threshold, indicating that core 80 has not yet reached its optimal computational performance, adjust the current operating frequency of core 80 to the previous operating frequency; and / or if the computational accuracy of core 80 does not reach a second accuracy threshold, indicating that the computational performance of core 80 is insufficient to operate at the current operating frequency, adjust the current operating frequency of core 80 to the next operating frequency. The frequency adjustment module 30 can, as shown in the example... Figure 2 The phase-locked loop circuit 70 shown or the software adjusts the frequency of the core 80. That is, according to the frequency adjustment mechanism at the core level, the core 80 is adjusted to a suitable operating frequency point based on its actual computing performance. The frequency of the core 80 with high computing performance is increased, and the frequency of the core 80 with low computing performance is decreased, so as to give full play to the computing performance of each core 80.

[0209] For example, both the first and second accuracy thresholds are 90%. When core 80 operates at 600MHz, if the calculation accuracy of core 80 exceeds 90% within a predetermined adjustment period (indicating that core 80 has not yet reached its optimal calculation performance), then the current operating frequency of core 80, 600MHz, is increased to the previous operating frequency, i.e., its operating frequency is raised to 650MHz; if the calculation accuracy of core 80 is less than 90% (indicating that the calculation performance of core 80 is insufficient to operate at the current operating frequency of 600MHz), then the current operating frequency of core 80 is decreased to the next operating frequency, i.e., its operating frequency is lowered to 550MHz. Those skilled in the art will understand that the previous operating frequency is not limited to the previous adjacent operating frequency, and more than one previous adjacent operating frequency can be set as the previous operating frequency; similarly, the next operating frequency is not limited to the next adjacent operating frequency, and more than one next adjacent operating frequency can be set as the next operating frequency. That is, the current operating frequency of core 80 is increased from 600MHz to the previous operating frequency of 700MHz; the current operating frequency of core 80 is decreased from 600MHz to the next operating frequency of 500MHz. This process continues, without specifying the interval between the previous and next operating frequencies. Preferably, the frequency difference between the current and previous operating frequencies is 1-10%, and the frequency difference between the current and next operating frequencies is also 1-10%, so that when core 80 is increased from its current operating frequency to the previous or next operating frequency, the benefit to its computing performance should outweigh the loss.

[0210] For example, the first accuracy threshold is 90%, and the second accuracy threshold is 80%. When core 80 is operating at 600MHz, if the calculation accuracy of core 80 exceeds 90% within a predetermined adjustment period (indicating that core 80 has not yet reached its optimal calculation performance), then the current operating frequency of core 80 is increased to the previous operating frequency, that is, its operating frequency is increased to 650MHz; if the calculation accuracy of core 80 is less than 80% (indicating that the calculation performance of core 80 is insufficient to operate at the current operating frequency of 600MHz), then the current operating frequency of core 80 is decreased to the next operating frequency, that is, its operating frequency is decreased to 550MHz.

[0211] Preferably, the calculation accuracy rate can be the calculation accuracy rate of the Nonces (Number once, random numbers) submitted by kernel 80 within the adjustment period. That is, the proportion of correct Nonces among all Nonces submitted by kernel 80 within a predetermined time. The block header in the blockchain includes the Nonce (4 bytes). The Nonce is a random value, and the operation is essentially to guess the value of the Nonce so that the hash of the block header can be less than the target value Target, thus enabling it to be written into the blockchain. Specifically, this attribute is iterated from 0 to 2^32 to calculate the hash value of the block header. If the obtained hash result meets the condition, the calculation is successful.

[0212] Preferably, Figure 3 The computational performance analysis module 20 further includes:

[0213] The first analysis submodule 21 is used to analyze whether the Nonce submitted by kernel 80 is correct within a predetermined adjustment period.

[0214] The statistics submodule 22 is used to count the number of correct nonces and incorrect nonces submitted by kernel 80 during the adjustment period.

[0215] The first judgment submodule 23 is used to calculate the Nonce calculation accuracy of kernel 80 within the adjustment period based on the number of correct Nonces and the number of incorrect Nonces, and to determine whether the Nonce calculation accuracy reaches the predetermined first accuracy threshold and / or second accuracy threshold.

[0216] The frequency adjustment module 30 is used to adjust the current operating frequency of the kernel 80 to the previous operating frequency if the Nonce calculation accuracy of the kernel 80 reaches the first accuracy threshold; and / or to adjust the current operating frequency of the kernel 80 to the next operating frequency if the Nonce calculation accuracy of the kernel 80 does not reach the second accuracy threshold.

[0217] Even better, the first analysis submodule 21 further includes:

[0218] The first calculation unit 211 is used to calculate a first result from each Nonce submitted by the kernel 80 during the adjustment period using a predetermined algorithm. The first result contains a first feature. The first calculation unit 211 is preferably located in the kernel 80. Each Nonce submitted by the kernel 80 contains the Nonce's identification information (ID), thereby enabling the statistical analysis of the calculation results of each kernel 80.

[0219] The first verification unit 212 is used to calculate a second result from the Nonce submitted by the kernel 80 using the same algorithm. The second result contains a second feature. If the first feature is the same as the second feature, the Nonce is determined to be a correct Nonce; otherwise, the Nonce is determined to be an incorrect Nonce. The first verification unit 212 is preferably located in the computing chip.

[0220] For example, after kernel 80 calculates a Nonce and submits it, it embeds the Nonce into the block header to calculate a first hash result. The first 20 bits of the first hash result are 0 (first characteristic). The first verification unit 212 also embeds the Nonce into the block header to calculate a second hash result. If the first 20 bits of the second hash result are also 0 (second characteristic), then the Nonce is considered to be a correct submission.

[0221] It should be noted that, in order to increase the probability that a single kernel 80 can calculate a nonce value that satisfies the requirement for writing to the blockchain, a much easier method than the aforementioned "target value Target" (Target_Lite) can be used to determine the hash. Each kernel 80 can submit nonces more frequently. The first verification unit 212 verifies the nonces submitted by kernel 80. If the hash calculated using the nonce submitted by kernel 80 also passes the Target_Lite determination, then kernel 80's submission is considered correct; otherwise, it is considered an incorrect submission. This invention is not limited to using a nonce that can be written to the final blockchain. The nonces exchanged between the first verification unit 212 and kernel 80 satisfy a lower threshold, have a high submission density, and are conducive to frequency adjustment.

[0222] Preferably, the computational performance analysis module 20 is used to analyze in real time whether the computational accuracy of the kernel 80 within the adjustment period reaches a first accuracy threshold and / or a second accuracy threshold, according to a preset real-time adjustment instruction, wherein the first accuracy threshold and the second accuracy threshold are the same or different.

[0223] The frequency adjustment module 30 is used to adjust the current operating frequency of the kernel 80 to the previous operating frequency in real time if the calculation accuracy of the kernel 80 reaches the first accuracy threshold within the adjustment period. If the calculation accuracy of the kernel 80 does not reach the second accuracy threshold within the adjustment period, the current operating frequency of the kernel 80 is adjusted to the next operating frequency in real time, so that the operating frequency of the kernel 80 is dynamically adjusted in real time.

[0224] Preferably, the computing performance analysis module 20 is used to analyze, according to a preset timed adjustment instruction, whether the computing accuracy of the kernel 80 within the adjustment period set by the timed adjustment instruction reaches a first accuracy threshold and / or a second accuracy threshold, wherein the first accuracy threshold and the second accuracy threshold are the same or different.

[0225] The frequency adjustment module 30 is used to adjust the current operating frequency of kernel 80 to the previous operating frequency if the calculation accuracy of kernel 80 reaches a first accuracy threshold within the adjustment period; and to adjust the current operating frequency of kernel 80 to the next operating frequency if the calculation accuracy of kernel 80 does not reach a second accuracy threshold within the adjustment period, thus allowing the operating frequency of kernel 80 to be adjusted periodically. For example, it can be set to calculate the calculation accuracy of kernel 80 only on Saturdays (24 hours) each week and adjust the frequency based on the calculation accuracy.

[0226] Preferably, the computational performance analysis module 20 is used to analyze, based on the received real-time adjustment instructions, whether the computational accuracy of the kernel 80 within the adjustment period reaches a first accuracy threshold and / or a second accuracy threshold, wherein the first accuracy threshold and the second accuracy threshold are the same or different.

[0227] The frequency adjustment module 30 is used to adjust the current operating frequency of the kernel 80 to the previous operating frequency if the calculation accuracy of the kernel 80 within the adjustment period reaches a first accuracy threshold, and if the calculation accuracy of the kernel 80 within the adjustment period does not reach a second accuracy threshold, adjust the current operating frequency of the kernel 80 to the next operating frequency. Upon receiving a stop adjustment command, the adjustment of the current operating frequency of the kernel 80 is stopped.

[0228] For example, a user can send an instant adjustment command to the computing device at any time as needed. The computing device will immediately begin analyzing the computational accuracy of kernel 80 based on this command. If, within an adjustment period (e.g., 10 minutes), the computational accuracy of kernel 80 exceeds a first accuracy threshold (e.g., higher than 99%), the operating frequency of kernel 80 will be adjusted upwards. If, within an adjustment period (e.g., 10 minutes), the computational accuracy of kernel 80 is lower than a second accuracy threshold (e.g., lower than 99%), the operating frequency of kernel 80 will be adjusted downwards. Furthermore, a user can send a stop adjustment command to the computing device at any time as needed. Upon receiving this stop adjustment command, the computing device will immediately cease adjusting the frequency of kernel 80.

[0229] Figure 4This is a schematic diagram of the chip frequency modulation device of a computing device in the third embodiment of the present invention. The computing device is preferably used for massive computing. The computing device preferably includes a control board and a computing board connected to the control board. At least one computing chip is disposed on the computing board, and the computing chip has multiple cores 80. Of course, the computing device may also include a heat sink, a connection board, a power module, etc. The chip frequency modulation device 100 includes a frequency setting module 10, a computing performance analysis module 20, and a frequency adjustment module 30, wherein:

[0230] The frequency setting module 10 is used to set multiple operating frequencies for the computing chip of the computing device, each operating frequency having a different frequency, and to operate the multiple cores 80 in the computing chip at each operating frequency. That is, according to the frequency adjustment mechanism of the computing chip, several different frequency points are set for each computing chip, and each core 80 of the computing chip operates at each of the respective operating frequencies. For example, six operating frequencies can be set: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz. The number of operating frequencies and the frequency differences between them can be set according to actual needs; the more operating frequencies, the more fully the computing performance of each core 80 can be utilized. When the frequency adjustment switch is activated (before the cores 80 are frequency-adjusted), the cores 80 can be evenly distributed, unevenly distributed, or randomly distributed across the operating frequencies according to a predetermined rule. Preferably, the frequency setting module 10 can, as shown in the example... Figure 2 The multiple phase-locked loop circuits 70 shown provide multiple operating frequencies for the computing chip. Of course, the frequency setting module 10 can also set multiple operating frequencies for the computing chip through other hardware or software.

[0231] It is worth noting that the frequency difference between operating frequencies in this invention needs to be controlled within a reasonable range. When the core 80 increases its operating frequency by one frequency point, its operating frequency will increase by one frequency difference value, which can improve its computing performance due to the increased computational speed. At the same time, increasing the core's operating frequency may result in a decrease in computational accuracy, thus sacrificing some computing performance. Therefore, the frequency setting module 10 should reasonably control the frequency difference between adjacent operating frequencies so that when the core 80 adjusts from its current operating frequency to the previous operating frequency, the benefit to the core 80's computing performance should outweigh the loss. Preferably, the frequency difference between adjacent operating frequencies is 1% to 10%.

[0232] The computing performance analysis module 20 is used to analyze the computing performance metrics of each core 80 at the current operating frequency. The computing performance analysis module 20 further includes:

[0233] Submodule 24 is used to pre-set the reference node value, correctly calculated weight value, incorrectly calculated weight value, correctly calculated threshold, and incorrectly calculated threshold of kernel 80. The correctly calculated weight value and the incorrectly calculated weight value can be the same or different; the correctly calculated threshold and the incorrectly calculated threshold can also be the same or different. The reference node value, correctly calculated weight value, incorrectly calculated weight value, correctly calculated threshold, and incorrectly calculated threshold are all adjustable parameters and can be optimized according to actual needs such as frequency adjustment speed.

[0234] The second analysis submodule 25 is used to analyze whether each calculation of kernel 80 is correct. Kernel 80 can perform various calculations, and this module can analyze whether one or more calculations of kernel 80 are correct. Preferably, it analyzes whether the Nonce calculated by kernel 80 is correct.

[0235] The counting submodule 26 is configured to increment the correct calculation weight value of the reference node value by one for each correct calculation by kernel 80 at least once, and decrement the incorrect calculation weight value of the reference node value by one for each incorrect calculation by kernel 80 at least once. Preferably, the correct calculation weight value is incremented by one for each correct calculation by kernel 80. Alternatively, it can be configured to increment the correct calculation weight value of the reference node value by one for each N correct calculations (where N is a natural number greater than 1), and decrement the incorrect calculation weight value of the reference node value by one for each incorrect calculation by kernel 80. Again, this can be configured to decrement the incorrect calculation weight value of the reference node value by one for each N incorrect calculations (where N is a natural number greater than 1).

[0236] The second judgment submodule 27 is used to determine whether the current reference node value of kernel 80 has reached the correct calculation threshold or the incorrect calculation threshold. If the current reference node value reaches the correct calculation threshold, it means that the computing performance of kernel 80 is high and there may be room for improvement; if the current reference node value reaches the incorrect calculation threshold, it means that the computing performance of kernel 80 is weak and may not be sufficient to work at the frequency corresponding to the current operating frequency.

[0237] The frequency adjustment module 30 is configured to: if the current reference node value of the kernel 80 reaches the correct calculation threshold, indicating that the kernel 80 has not yet reached its optimal computing performance, adjust the current operating frequency of the kernel 80 to the previous operating frequency; and if the current reference node value of the kernel 80 reaches the incorrect calculation threshold, indicating that the computing performance of the kernel 80 is insufficient to operate at the current operating frequency, adjust the current operating frequency of the kernel 80 to the next operating frequency. The frequency adjustment module 30 can, as shown in the example... Figure 2The phase-locked loop circuit 70 or software shown adjusts the frequency of core 80. That is, according to the core-level frequency adjustment mechanism, core 80 is adjusted to a suitable operating frequency based on its actual computing performance. The frequency of core 80 with high computing performance is increased, and the frequency of core 80 with low computing performance is decreased, thereby fully utilizing the computing performance of each core 80. Those skilled in the art will understand that the previous operating frequency is not limited to the previous adjacent operating frequency; more than one previous adjacent operating frequency can be set as the previous operating frequency. Similarly, the next operating frequency is not limited to the next adjacent operating frequency; more than one next adjacent operating frequency can be set as the next operating frequency. That is, the current operating frequency of core 80, 600MHz, is increased to the previous operating frequency of 700MHz; the current operating frequency of core 80, 600MHz, is decreased to the next operating frequency of 500MHz. And so on. The interval between the previous and next operating frequencies is not limited here. Preferably, the frequency difference between the current operating frequency and the previous operating frequency is 1~10%, and the frequency difference between the current operating frequency and the next operating frequency is 1~10%, so that when the kernel 80 is adjusted from the current operating frequency to the previous or next operating frequency, the benefit to the computing performance of the kernel 80 should outweigh the loss.

[0238] For example, such as Figure 5 As shown, 400000 is set as the reference node value, the weight value for correct calculation is set to 180, the weight value for incorrect calculation is set to 9000, and both the correct calculation threshold and the incorrect calculation threshold are set to 100000.

[0239] For each correct calculation by kernel 80, 180 is added to the reference node value (for correct calculation weight); for each incorrect calculation by kernel 80, 9000 is decremented from the reference node value (for incorrect calculation weight); based on the reference node value, for each increase or decrease of 100000 (for correct calculation threshold and incorrect calculation threshold), the frequency is advanced to the next higher frequency point or downgraded to the next lower frequency point.

[0240] The current mechanism is similar to a tug-of-war between correct and incorrect results, where correct and incorrect results can have different weights. A reference node value is set. Each correct result increases the correct weight value, and each incorrect result decreases the incorrect weight value. If the reward or penalty exceeds a corresponding threshold, the frequency is adjusted upwards or downwards. The system can be understood as having a marker, with the reference node value being the marker's initial value. For each correct submission, the marker increases by 180, and for each incorrect submission, it decreases by 9000. After N correct submissions (N is a natural number greater than or equal to 1) and M incorrect submissions (M is a natural number greater than or equal to 1), the marker should be at the position 400000 + N * 180 – M * 9000. If the marker exceeds a certain threshold, the corresponding frequency is adjusted (increased or decreased). Then, each time the frequency is adjusted to a new frequency point, this value is initialized, that is, the current reference node value is reset to the initial reference node value.

[0241] Preferably, the setting submodule 24 is used to set and adjust the reference node value, calculate the correct weight value, calculate the incorrect weight value, calculate the correct threshold and / or calculate the incorrect threshold of the kernel 80 according to actual needs. The calculated correct weight value and the calculated incorrect weight value may be the same or different, and the calculated correct threshold and the calculated incorrect threshold may be the same or different.

[0242] Preferably, submodule 24 is configured to control the resident error rate S that the kernel 80 expects to tolerate by controlling the ratio of correctly calculated weight values ​​to incorrectly calculated weight values. The formula for calculating the resident error rate S is: Resident error rate S = Correctly calculated weight value / (Correctly calculated weight value + Incorrectly calculated weight value).

[0243] Preferably, submodule 24 is configured to control the adjustment period by controlling the absolute values ​​of correctly calculated weight values ​​and incorrectly calculated weight values.

[0244] Preferably, submodule 24 is configured to control the adjustment period by controlling the absolute values ​​of the calculated correct threshold and the calculated incorrect threshold.

[0245] Preferably, the correct calculation can be the kernel 80 correctly calculating the Nonce.

[0246] The second analysis submodule 25 is used to analyze whether the Nonce submitted by kernel 80 each time is correct.

[0247] The counting submodule 26 is configured to increment the reference node value by one calculated correct weight value for each correct nonce submitted by kernel 80; and decrement the reference node value by one calculated incorrect weight value for each incorrect nonce submitted by kernel 80. Preferably, the correct weight value is incremented for each correct nonce submitted by kernel 80. Alternatively, it can be configured to increment the correct weight value for each N (N is a natural number greater than 1) correct nonce submitted by kernel 80, and decrement the incorrect weight value for each incorrect nonce submitted by kernel 80. Again, it can be configured to decrement the incorrect weight value for each N (N is a natural number greater than 1) incorrect nonce submitted by kernel 80.

[0248] Even better, the second analysis submodule 25 further includes:

[0249] The second computing unit 251 is used to calculate a first result from a Nonce after the kernel 80 submits a Nonce, and the first result contains a first feature.

[0250] The second verification unit 252 is used to calculate a second result from the Nonce using the same algorithm. The second result contains a second feature. If the first feature is the same as the second feature, the Nonce is determined to be a correct Nonce; otherwise, the Nonce is determined to be an incorrect Nonce.

[0251] For example, after kernel 80 calculates a Nonce and commits it, it embeds the Nonce into the block header to calculate a first hash result. The first 20 bits of the first hash result are 0 (first characteristic). The second verification unit 252 also embeds the Nonce into the block header to calculate a second hash result. If the first 20 bits of the second hash result are also 0 (second characteristic), then the Nonce is considered a correct commit.

[0252] It should be noted that, in order to increase the probability that a single kernel 80 can calculate a nonce value that satisfies the requirement for writing to the blockchain, a much easier method than the aforementioned "target value Target" (Target_Lite) can be used to determine the hash. Each kernel 80 can submit nonces more frequently. The first verification unit 212 verifies the nonces submitted by kernel 80. If the hash calculated using the nonce submitted by kernel 80 also passes the Target_Lite determination, then kernel 80's submission is considered correct; otherwise, it is considered an incorrect submission. This invention is not limited to using a nonce that can be written to the final blockchain. The nonces exchanged between the first verification unit 212 and kernel 80 satisfy a lower threshold, have a high submission density, and are conducive to frequency adjustment.

[0253] In a specific application embodiment of the present invention: six phase-locked loop circuits 70 are used, with six operating frequencies set: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz. Figure 5 As shown, 400000 is set as the reference node value, the weight value for correct calculation is set to 180, the weight value for incorrect calculation is set to 9000, and both the correct calculation threshold and the incorrect calculation threshold are set to 100000.

[0254] The number of cores distributed at each corresponding frequency based on the four computing boards is as follows:

[0255] Computing board 0: [294 26 96 224 1023 1665]

[0256] Computing board 1: [274 47 111 212 963 1721]

[0257] Computing board 2: [350 25 153 369 1381 1050]

[0258] Computing board 3: [488 33 184 367 1342 950]

[0259] First, let's further explain the mechanism using data. Based on the formula S = Correctly calculated weight value / (Correctly calculated weight value + Incorrectly calculated weight value), and using the given data, we can deduce that the resident error rate S of kernel 80 (which can be understood as the frequency at which it can reside for a long time) is 180 / (180 + 9000) = 1.96%. At this point, kernel 80 will operate at a certain frequency for an extended period (because the expected step size is 0), and the operating frequency will not be increased or decreased. It can be inferred that if the calculation error rate of kernel 80 is greater than 1.96% (resident error rate S), its operating frequency will be increased; if the calculation error rate of kernel 80 is less than 1.96% (resident error rate S), its operating frequency will be decreased.

[0260] Based on the set difficulty level (which is related to the benchmark and affects the accuracy of kernel 80 calculations; the higher the difficulty level, the lower the accuracy, and vice versa), the approximate adjustment period when errors increase can be calculated. Assuming the error rate is e, the expected step size for each Nonce is: (1-e)*180-e*9000=180-9180e. Taking e=0.5% as an example, the expected step size is 134.1; taking e=1% as an example, the expected step size is 88.2; taking e=2% as an example, the expected step size is -3.6.

[0261] Based on a 650MHz clock speed, the expected rate of a single nonce submission per kernel 80 is 1.3 per second (i.e., 1.3 nonces submitted per second). Explaining this with an error probability of 0.5%, it means that after 746 nonce submissions, an upward adjustment can be expected; with an error probability of 1.0%, 1134 submissions are needed, with an expected upward adjustment; if the error probability is 2.0%, 27778 submissions are needed, with an expected downward adjustment, and so on.

[0262] Preferably, the computational performance analysis module 20 is used to determine in real time whether the current reference node of the kernel 80 has reached the correct computation threshold or the incorrect computation threshold according to the preset real-time adjustment instructions, wherein the correct computation threshold and the incorrect computation threshold are the same or different.

[0263] The frequency adjustment module 30 is used to adjust the current operating frequency of the kernel 80 to the previous operating frequency in real time if the current reference node value of the kernel 80 reaches the calculated correct threshold; and to adjust the current operating frequency of the kernel 80 to the next operating frequency in real time if the current reference node value of the kernel 80 reaches the calculated incorrect threshold, so that the operating frequency of the kernel 80 is dynamically adjusted in real time.

[0264] Preferably, the computing performance analysis module 20 is used to determine whether the current reference node of the kernel 80 has reached the correct calculation threshold or the incorrect calculation threshold within the adjustment time period set by the preset time adjustment instruction, wherein the correct calculation threshold and the incorrect calculation threshold are the same or different.

[0265] The frequency adjustment module 30 is used to adjust the current operating frequency of kernel 80 to the previous operating frequency if the current reference node value of kernel 80 reaches the correct calculation threshold during the adjustment period; and to adjust the current operating frequency of kernel 80 to the next operating frequency if the current reference node value of kernel 80 reaches the incorrect calculation threshold during the adjustment period, thus allowing the operating frequency of kernel 80 to be adjusted periodically. For example, it can be set to count the number of correct nonces generated by kernel 80 only during the 24 hours of Saturday each week, and adjust the frequency based on the calculation accuracy.

[0266] Preferably, the computational performance analysis module 20 is used to analyze whether the current reference node of the kernel 80 has reached the correct computation threshold or the incorrect computation threshold according to the received real-time adjustment instructions, wherein the correct computation threshold and the incorrect computation threshold are the same or different.

[0267] The frequency adjustment module 30 is used to adjust the current operating frequency of the kernel 80 to the previous operating frequency if the current reference node value of the kernel 80 reaches the correctly calculated threshold, and to adjust the current operating frequency of the kernel 80 to the next operating frequency if the current reference node value of the kernel 80 reaches the incorrectly calculated threshold. It is also used to stop adjusting the current operating frequency of the kernel 80 according to the received stop adjustment command.

[0268] For example, users can send real-time adjustment commands to the computing device at any time as needed. Users can set the weight A to be increased on the reference node for each correct Nonce calculated by kernel 80, and the weight B to be decreased on the reference node for each incorrect Nonce calculated by kernel 80. When the current increase reaches the threshold C for the number of correct calculations, kernel 80 is promoted to the next frequency. When the current decrease reaches the threshold D for the number of incorrect calculations, kernel 80 is demoted to the next frequency. Furthermore, users can send a stop adjustment command to the computing device at any time as needed. Upon receiving this stop adjustment command, the computing device immediately stops frequency adjustment of kernel 80.

[0269] Figure 6 This is a schematic diagram of the chip frequency modulation device of a computing device in the fourth embodiment of the present invention. The computing device is preferably used for massive computing. The computing device preferably includes a control board and a computing board connected to the control board. At least one computing chip is disposed on the computing board, and the computing chip has multiple cores 80. Of course, the computing device may also include a heat sink, a connection board, a power module, etc. The chip frequency modulation device 100 includes a frequency setting module 10, a computing performance analysis module 20, a frequency adjustment module 30, a frequency statistics module 50, and a frequency adjustment module 60, wherein:

[0270] The frequency setting module 10 is used to set multiple operating frequencies for the computing chip of the computing device, so that the multiple cores 80 in the computing chip operate at each operating frequency. That is, according to the frequency adjustment mechanism at the computing chip level, several different frequency points are set for each computing chip, and the cores 80 of the computing chip operate at each operating frequency. For example, six operating frequencies can be set: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz. The number of operating frequencies and the frequency differences between them can be set according to actual needs; the more operating frequencies, the more fully the computing performance of each core 80 can be utilized. When the frequency adjustment switch is activated (before the cores 80 are frequency-adjusted), the cores 80 can be evenly distributed, unevenly distributed, or randomly distributed among the operating frequencies according to predetermined rules. The frequency setting module 10 can, as shown in the example... Figure 2The multiple phase-locked loop (PPL) circuits 70 shown provide multiple operating frequencies for the computing chip. Of course, the frequency setting module 10 can also set multiple operating frequencies for the computing chip through other hardware or software.

[0271] It is worth noting that the frequency difference between operating frequencies in this invention needs to be controlled within a reasonable range. When the core 80 increases its operating frequency by one frequency point, its operating frequency will increase by one frequency difference value, which can improve its computing performance due to the increased computational speed. At the same time, increasing the core's operating frequency may result in a decrease in computational accuracy, thus sacrificing some computing performance. Therefore, the frequency setting module 10 should reasonably control the frequency difference between adjacent operating frequencies so that when the core 80 adjusts from its current operating frequency to the previous operating frequency, the benefit to the core 80's computing performance should outweigh the loss. Preferably, the frequency difference between adjacent operating frequencies is 1% to 10%.

[0272] The computational performance analysis module 20 is used to analyze the computational performance metrics of each core 80 at the current operating frequency. These computational performance metrics represent the actual computational performance of the core 80 at the current operating frequency, including but not limited to computational accuracy, number of correct calculations, and computational speed. If the computational performance metrics of the core 80 are high, it indicates that the computational performance of the core 80 may have room for improvement; if the computational performance metrics of the core 80 are low, it indicates that the computational performance of the core 80 may be insufficient to operate at the frequency corresponding to the current operating frequency.

[0273] The frequency adjustment module 30 is used to adjust the current operating frequency of the core 80 upwards or downwards based on the computing performance indicators of the core 80. That is, according to the kernel-level frequency adjustment mechanism, the core 80 is adjusted to a suitable operating frequency based on its actual computing performance, increasing the frequency of cores with high computing performance and decreasing the frequency of cores with low computing performance, thereby fully utilizing the computing performance of each core 80. The frequency adjustment module 30 can achieve this through methods such as... Figure 2The phase-locked loop circuit 70 or software shown adjusts the frequency of the core 80. Preferably, if the calculation accuracy of the core 80 reaches a first accuracy threshold within the adjustment period, it indicates that the core 80 has not yet reached its optimal calculation performance, and therefore the current operating frequency of the core 80 is increased to the previous operating frequency. If the calculation accuracy of the core 80 does not reach a second accuracy threshold within the adjustment period, it indicates that the calculation performance of the core 80 is insufficient to operate at the current operating frequency, and therefore the current operating frequency of the core 80 is decreased to the next operating frequency. Those skilled in the art will understand that the previous operating frequency is not limited to the previous adjacent operating frequency; more than one previous adjacent operating frequency can be set as the previous operating frequency. Similarly, the next operating frequency is not limited to the next adjacent operating frequency; more than one next adjacent operating frequency can be set as the next operating frequency. That is, the current operating frequency of the core 80, 600MHz, is increased to the previous operating frequency, 700MHz; and the current operating frequency of the core 80, 600MHz, is decreased to the next operating frequency, 500MHz. Similarly, no limit is placed on the interval between the previous and next operating frequencies. Preferably, the frequency difference between the current and previous operating frequencies is 1-10%, and the frequency difference between the current and next operating frequencies is 1-10%, so that when the core 80 adjusts from the current operating frequency to the previous or next operating frequency, the benefit to the core 80's computing performance should outweigh the loss.

[0274] The frequency point statistics module 50 is used to count the current distribution of the frequency-tuned cores 80 at each operating frequency. After the operating frequency of the cores 80 is automatically adjusted according to their computing performance, they will be distributed across various operating frequencies. The frequency point statistics module 50 counts the number of frequency-tuned cores 80 at each operating frequency to determine the current distribution status. Preferably, the operating frequencies can be divided into at least one high-frequency operating frequency, at least one intermediate operating frequency, and at least one low-frequency operating frequency. The highest frequency among the high-frequency operating frequencies is the highest operating frequency, and the lowest frequency among the low-frequency operating frequencies is the lowest operating frequency. For example, if there are 1000 cores 80, and six operating frequencies are set: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz, the number of cores distributed across these six operating frequencies would be 100, 200, 100, 100, 200, and 300, respectively. Among them, 500MHz and 550MHz are low-frequency operating points, 600MHz and 650MHz are intermediate operating points, 700MHz and 750MHz are high-frequency operating points, 500MHz is the lowest operating frequency, and 750MHz is the highest operating frequency.

[0275] The frequency adjustment module 60 is used to adjust the frequency of the set operating frequency point according to the current distribution state of the kernel 80 and a predetermined frequency adjustment mechanism. The frequency adjustment mechanism is a correspondence between the kernel distribution state and the frequency adjustment. The kernel distribution state refers to the distribution state of the kernel 80 at various operating frequencies. Adjusting the frequency of the set operating frequency point means directly adjusting the frequency of the operating frequency point. Preferably, the frequency adjustment module 60 uses a method such as... Figure 2 The phase-locked loop circuit 70 shown adjusts the operating frequency. Those skilled in the art will understand that the adjustment method of the frequency adjustment module 50 is not limited to this. Ideally, the present invention aims to have more than a predetermined ratio (e.g., 50%) or a maximum number of cores 80 fall to the intermediate operating frequency, thus allowing for greater upward adjustment of the core 80's frequency.

[0276] For example, if more than a predetermined percentage (e.g., 30%) of cores 80 are operating at their highest operating frequency (750MHz), it may result in the cores 80 not achieving their maximum computing performance (as it could be higher). In such cases, one operating frequency (600MHz) needs to be changed to at least one optimized high-frequency operating frequency (800MHz), and all cores 80 originally operating at the 600MHz frequency will be moved to operate at the highest operating frequency (750MHz). The frequency of the optimized high-frequency operating frequency is higher than that of the highest operating frequency to fully utilize the computing performance of each core 80.

[0277] In a specific embodiment of the present invention, the frequency adjustment module 60 further includes a first frequency adjustment submodule 61 and / or a second frequency adjustment submodule 62, wherein:

[0278] The first frequency adjustment submodule 61 is configured to modify at least one operating frequency to at least one optimized high-frequency operating frequency if, for example, the core 80 operates at at least one high-frequency operating frequency exceeding a predetermined second ratio, which may result in the core 80 not achieving its maximum computing performance (as it could be higher). The optimized high-frequency operating frequency has a frequency higher than the highest operating frequency. The modified operating frequency can be a low-frequency operating frequency, a mid-frequency operating frequency, and / or a high-frequency operating frequency.

[0279] For example, if six operating frequencies are set: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz, and more than 30% (second ratio) of the core 80 operates at two high-frequency operating frequencies (700MHz and 750MHz), then the two low-frequency operating frequencies (500MHz and 550MHz) can be modified to two optimized high-frequency operating frequencies (800MHz and 850MHz), or one low-frequency operating frequency (500MHz) and one mid-frequency operating frequency (600MHz) can be modified to two optimized high-frequency operating frequencies (800MHz and 850MHz).

[0280] Preferably, the first frequency adjustment submodule 61 is used to modify an operating frequency to an optimized high-frequency operating frequency if, for example, the core 80 is operating at its highest operating frequency (which may result in the core 80 not achieving its maximum computing performance, as it could be higher). The frequency of the optimized high-frequency operating frequency is higher than that of the highest operating frequency. The modified operating frequency can be a low-frequency operating frequency, a mid-frequency operating frequency, and / or a high-frequency operating frequency.

[0281] For example, if more than 30% (the second ratio) of the core 80 is operating at the highest operating frequency (750MHz), then a low-frequency operating frequency (500MHz) will be modified to an optimized high-frequency operating frequency (800MHz), or a mid-frequency operating frequency (600MHz) will be modified to an optimized high-frequency operating frequency (800MHz); or the highest operating frequency (750MHz) will be modified to an optimized high-frequency operating frequency (800MHz).

[0282] The second frequency adjustment submodule 62 is used to modify at least one operating frequency point if, for example, a core 80 operating at at least one low frequency point exceeds a predetermined third ratio, indicating that the computing power of the core 80 is too poor to operate at that low frequency point. Therefore, it modifies the at least one operating frequency point to at least one optimized low frequency point. The frequency of the optimized low frequency point is lower than the frequency of the lowest operating frequency point, to prevent the poorly performing core 80 from affecting the overall computing performance of the computing chip. The modified operating frequency point can be a low frequency point, a mid-frequency point, and / or a high frequency point.

[0283] For example, if you set six operating frequencies: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz, and more than 30% (third ratio) of the core 80 operates at two low-frequency operating frequencies (500MHz and 550MHz), then you can modify the two low-frequency operating frequencies (500MHz and 550MHz) to two optimized low-frequency operating frequencies (400MHz and 450MHz), or modify one low-frequency operating frequency (500MHz) and one mid-frequency operating frequency (600MHz) to two optimized low-frequency operating frequencies (400MHz and 450MHz).

[0284] Preferably, the second frequency adjustment submodule 62 is used to modify a working frequency to an optimized low-frequency working frequency if more than a third ratio of the core 80 is operating at the lowest working frequency, indicating that the computing power of the core 80 is too poor to operate at the lowest working frequency. The optimized low-frequency working frequency is lower than the frequency of the lowest working frequency. The modified working frequency can be a low-frequency working frequency, a mid-frequency working frequency, and / or a high-frequency working frequency.

[0285] For example, if more than 30% (third ratio) of the core 80 is operating at the lowest operating frequency (500MHz), then a low-frequency operating frequency (500MHz) will be modified to an optimized low-frequency operating frequency (450MHz), or a mid-frequency operating frequency (600MHz) will be modified to an optimized low-frequency operating frequency (450MHz); or the highest operating frequency (750MHz) will be modified to an optimized low-frequency operating frequency (450MHz).

[0286] In a specific application embodiment of the present invention: six phase-locked loop circuits 70 are used, and six operating frequencies are set: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz.

[0287] The number of cores distributed at each corresponding frequency based on the four computing boards is as follows:

[0288] Computing board 0: [294 26 96 224 1023 1665]

[0289] Computing board 1: [274 47 111 212 963 1721]

[0290] Computing board 2: [350 25 153 369 1381 1050]

[0291] Computing board 3: [488 33 184 367 1342 950]

[0292] Taking the four computing boards 0-3 mentioned above as examples, such as Figure 7 As shown, the data roughly follows a normal distribution. The lowest operating frequency (500MHz) is the lowest frequency at which a single core 80 operates, and it cannot be adjusted downwards (if the error rate is too high, this lowest frequency can be considered for shutdown). The accumulation of cores 80 at the highest operating frequency (750MHz) exceeding a predetermined ratio (e.g., 50%) means that maximum efficiency is not being achieved (as it could be higher), and the entire computing chip has room for further improvement. Ideally, the maximum number or percentage of cores 80 exceeding the predetermined ratio (e.g., 50%) should fall on one or more intermediate operating frequencies, such as the third operating frequency (600MHz). To fully utilize the computing performance of cores 80, the focus should be on the high-capacity long tail rather than the low-frequency long tail.

[0293] Taking computing boards 0-1 as an example, it can be seen that if the 600MHz frequency point is removed, and an overall left shift is used, approximately 100 cores at frequency 80 would fall to the 550MHz frequency point. The current frequency setting is clearly in the low-frequency range on the left, which is not conducive to fully utilizing the computing performance of cores 80. Therefore, an overall right shift is more suitable, i.e., using an overall offset method, through methods such as... Figure 2 The phase-locked loop circuit 70 shown here sets the 550MHz frequency point to the right to above 800MHz, which is expected to increase the frequency of hundreds of cores 80 to above 800MHz, thereby bringing about an improvement in overall computing performance.

[0294] In another specific embodiment of the present invention, the frequency adjustment module 60 further includes a third frequency adjustment submodule 63 and / or a fourth frequency adjustment submodule 64, wherein:

[0295] The third frequency adjustment submodule 63 is used to modify at least one operating frequency to at least one optimized high-frequency operating frequency if the number of cores 80 operating at at least one high-frequency operating frequency is the largest, which may cause the cores 80 to not achieve their maximum computing performance (because it may be higher). The frequency of the optimized high-frequency operating frequency is higher than the frequency of the highest operating frequency. The modified operating frequency can be a low-frequency operating frequency, a mid-frequency operating frequency, and / or a high-frequency operating frequency.

[0296] For example, if you set six operating frequencies: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz, and a maximum of 80 cores operate at two high-frequency frequencies (700MHz and 750MHz), then you can modify the two low-frequency frequencies (500MHz and 550MHz) to two optimized high-frequency frequencies (800MHz and 850MHz), or modify one low-frequency frequency (500MHz) and one mid-frequency frequency (600MHz) to two optimized high-frequency frequencies (800MHz and 850MHz).

[0297] Preferably, the third frequency adjustment submodule 63 is used to modify an operating frequency to an optimized high-frequency operating frequency if the number of cores 80 operating at the highest operating frequency is the largest, which may cause the cores 80 to not achieve their maximum computing performance (as it may be higher). The optimized high-frequency operating frequency is higher than the highest operating frequency. The modified operating frequency can be a low-frequency operating frequency, a mid-frequency operating frequency, and / or a high-frequency operating frequency.

[0298] For example, if the most numerous core 80 is operating at the highest operating frequency (750MHz), then a low-frequency operating frequency (500MHz) can be modified to optimize the high-frequency operating frequency (800MHz), or a mid-frequency operating frequency (600MHz) can be modified to optimize the high-frequency operating frequency (800MHz); or the highest operating frequency (750MHz) can be modified to optimize the high-frequency operating frequency (800MHz).

[0299] The fourth frequency adjustment submodule 64 is used to modify at least one operating frequency point to at least one optimized low-frequency operating frequency point if the number of cores 80 operating at at least one low-frequency operating frequency point is the largest, indicating that the computing power of the cores 80 is too poor to operate at the low-frequency operating frequency point. The optimized low-frequency operating frequency point has a frequency lower than the lowest operating frequency point to prevent the poorly performing cores 80 from affecting the overall computing performance of the computing chip. The modified operating frequency point can be a low-frequency operating frequency point, a mid-frequency operating frequency point, and / or a high-frequency operating frequency point.

[0300] For example, if you set six operating frequencies: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz, and the most numerous core 80 operates at two low-frequency operating frequencies (500MHz and 550MHz), then you can modify the two low-frequency operating frequencies (500MHz and 550MHz) to two optimized low-frequency operating frequencies (400MHz and 450MHz), or modify one low-frequency operating frequency (500MHz) and one mid-frequency operating frequency (600MHz) to two optimized low-frequency operating frequencies (400MHz and 450MHz).

[0301] Preferably, the fourth frequency adjustment submodule 64 is used to modify a core 80 to an optimized low-frequency operating frequency if the number of cores 80 operating at the lowest operating frequency is the largest, indicating that the computing power of the cores 80 is too poor to operate at the lowest operating frequency. The optimized low-frequency operating frequency is lower than the frequency of the lowest operating frequency. The modified operating frequency can be a low-frequency operating frequency, a mid-frequency operating frequency, and / or a high-frequency operating frequency.

[0302] For example, if the most numerous core 80 is operating at the lowest operating frequency (500MHz), then a low-frequency operating frequency (500MHz) can be modified to an optimized low-frequency operating frequency (450MHz), or a mid-frequency operating frequency (600MHz) can be modified to an optimized low-frequency operating frequency (450MHz); or the highest operating frequency (750MHz) can be modified to an optimized low-frequency operating frequency (450MHz).

[0303] In a specific application embodiment of the present invention: six phase-locked loop circuits 70 are used, and six operating frequencies are set: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz.

[0304] The number of cores distributed at each corresponding frequency based on the four computing boards is as follows:

[0305] Computing board 0: [294 26 96 224 1023 1665]

[0306] Computing board 1: [274 47 111 212 963 1721]

[0307] Computing board 2: [350 25 153 369 1381 1050]

[0308] Computing board 3: [488 33 184 367 1342 950]

[0309] Taking the four computing boards 0-3 mentioned above as examples, such as Figure 7As shown, the data roughly follows a normal distribution. The lowest operating frequency (500MHz) is the lowest frequency at which a single core 80 operates, and it cannot be adjusted downwards (if the error rate is too high, this lowest frequency can be considered for shutdown). The highest operating frequency (750MHz) has the largest number of cores 80, meaning it is not operating at its maximum efficiency (as it could be even higher), and the entire computing chip has room for further improvement. Ideally, more than a predetermined percentage (e.g., 50%) or the largest number of cores 80 should fall at one or more intermediate operating frequencies, such as the third operating frequency (600MHz). To fully utilize the computing performance of cores 80, the long tail of high-capacity cores should be considered, rather than the long tail of low-frequency cores.

[0310] Taking computing boards 0-1 as an example, it can be seen that if the 600MHz frequency point is removed, approximately 100 cores at frequency point 80 fall onto the 550MHz frequency point. The current frequency setting is clearly in the low-frequency range on the left, making an overall rightward shift more suitable. That is, adopting an overall offset method, through methods such as... Figure 2 The phase-locked loop circuit 70 shown sets the 550MHz frequency point to the right and above 800MHz, which is expected to increase the frequency of hundreds of cores 80 to above 800MHz, thereby bringing about an overall performance improvement.

[0311] In another specific embodiment of the present invention, the frequency adjustment module 60 further includes a first stop adjustment submodule 65 or a second stop adjustment submodule 66, wherein:

[0312] The first stop adjustment submodule 65 is used to stop adjusting the frequency setting of the core 80 if the core 80 operates at at least one intermediate operating frequency point exceeding a predetermined fourth ratio. Ideally, the core 80 should fall at one or more intermediate operating frequency points, such as the third operating frequency point (600MHz), to fully utilize the core 80's performance; therefore, no further frequency adjustment of the core 80 is necessary in this case.

[0313] The second stop adjustment submodule 66 is used to stop adjusting the frequency setting of the operating frequency if the number of cores 80 operating at at least one intermediate operating frequency is the largest. Because the ideal situation is that the largest number of cores 80 fall on one or more intermediate operating frequencies, such as the third operating frequency (600MHz), which can fully utilize the operating performance of the cores 80, so there is no need to adjust the frequency of the cores 80 at this time.

[0314] The present invention also provides a computing board including the chip frequency modulation device 100 as described above.

[0315] The present invention also provides a computing device including the chip frequency modulation device 100.

[0316] Figure 8 This is a flowchart of the chip frequency modulation method for the computing device of the present invention, which can be implemented by the chip frequency modulation device 100 of the computing device. The computing device includes at least one computing chip, and the computing chip is provided with multiple cores. The computing device is preferably used for massive computing. It should be noted that the chip frequency modulation technology of the present invention actually involves two levels of frequency adjustment mechanisms: a frequency adjustment mechanism at the computing chip level and a frequency adjustment mechanism at the core level. The frequency adjustment mechanism at the computing chip level refers to setting several suitable operating frequencies for each computing chip and allowing each core 80 of the computing chip to work at each operating frequency, so as to give full play to the working performance of each core 80. The frequency adjustment mechanism at the core level refers to adjusting the core 80 to a suitable operating frequency based on the actual computing performance of the core 80, increasing the frequency of the core 80 with high computing performance and decreasing the frequency of the core 80 with low computing performance, thereby giving full play to the computing performance of each core 80. The method includes the following steps:

[0317] Step S801: Set multiple operating frequencies for the computing chip of the computing device, and make the multiple cores 80 in the computing chip work at each operating frequency.

[0318] This step, based on the frequency adjustment mechanism of the computing chips, sets several different frequency points for each computing chip and allows each core 80 of the computing chip to operate at each of these operating frequencies. For example, six operating frequencies can be set: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz. The number of operating frequencies and the frequency differences between them can be set according to actual needs; more operating frequencies allow for better utilization of the computing performance of each core 80. When the frequency adjustment switch is activated (before the core 80 has been frequency-adjusted), the cores 80 can be evenly, unevenly, or randomly distributed across the operating frequencies according to predetermined rules. Preferably, this step can be achieved through methods such as... Figure 2 The multiple phase-locked loop circuits 70 shown provide multiple operating frequencies for the computing chip. Of course, multiple operating frequencies can also be set for the computing chip through other hardware or software.

[0319] Step S802: Analyze the computational performance metrics of each core 80 at the current operating frequency.

[0320] The computational performance metrics represent the actual computational performance of kernel 80 at the current operating frequency, including but not limited to computational accuracy, number of correct calculations, and computational speed. If the computational performance metrics of kernel 80 are high, it indicates that the computational performance of kernel 80 may have room for improvement; if the computational performance metrics of kernel 80 are low, it indicates that the computational performance of kernel 80 may be insufficient to operate at the frequency corresponding to the current operating frequency.

[0321] Step S803: Adjust the current operating frequency of kernel 80 upwards or downwards based on the computing performance indicators of kernel 80.

[0322] This step, based on the kernel frequency adjustment mechanism, adjusts the kernel 80 to a suitable operating frequency point according to its actual computing performance. The frequency of high-performance kernels is increased, while the frequency of low-performance kernels is decreased, thus fully utilizing the computing performance of each kernel 80. Preferably, if the computational accuracy of a kernel 80 reaches a first accuracy threshold within the adjustment period, it indicates that the kernel 80 has not yet reached its optimal computing performance; therefore, the current operating frequency of the kernel 80 is increased to the previous operating frequency point. If the computational accuracy of a kernel 80 does not reach a second accuracy threshold within the adjustment period, it indicates that the computing performance of the kernel 80 is insufficient to operate at the current operating frequency point; therefore, the current operating frequency of the kernel 80 is decreased to the next operating frequency point.

[0323] This invention evaluates the performance of each core 80 in the computing chip based on their actual computational performance, adjusts the corresponding frequency of each core 80, fully utilizes the computational advantages of the higher-performing core 80, and avoids the impact of the lower-performing core 80 on the computing chip's overall performance. This maximizes the computational performance of each core 80, thereby improving the computing speed and accuracy of the computing chip and the overall computing device. Furthermore, the core 80 of the computing chip in this invention does not fluctuate in frequency, maintaining a relatively stable operating frequency.

[0324] Figure 9 This is a flowchart of a chip frequency modulation method for a computing device in the first embodiment of the present invention, which can be achieved through, as follows: Figure 2 The computing device shown is implemented using a chip frequency modulation device 100. The computing device includes at least one arithmetic chip, which has multiple cores. The computing device is preferably used for massive computations. The method includes the following steps:

[0325] Step S901: Multiple operating frequencies are set for the computing chip through multiple phase-locked loop circuits 70, and there is a one-to-one correspondence between the operating frequencies and the phase-locked loop circuits 70.

[0326] Preferably, such as Figure 2 The phase-locked loop circuit 70 shown is located inside or outside the computing chip. In this invention, the number of operating frequencies and the frequency differences between them can be set according to actual needs; more operating frequencies allow for full utilization of the computing performance of each core 80. For example, six operating frequencies can be set: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz. Therefore, this invention can use more phase-locked loop circuits 70 to set more operating frequencies, thereby maximizing the computing performance of each core 80.

[0327] It is worth noting that the frequency difference between operating frequencies in this invention needs to be controlled within a reasonable range. When the core 80 increases its operating frequency by one frequency point, its operating frequency will increase by one frequency difference value, which can improve its computing performance due to the increased computational speed. At the same time, increasing the core's operating frequency may result in a decrease in computational accuracy, thus sacrificing some computing performance. Therefore, the frequency setting module 10 should reasonably control the frequency difference between adjacent operating frequencies so that when the core 80 adjusts from its current operating frequency to the previous operating frequency, the benefit to the core 80's computing performance should outweigh the loss. Preferably, the frequency difference between adjacent operating frequencies is 1% to 10%.

[0328] Step S902: Analyze the computational performance metrics of each core 80 at the current operating frequency.

[0329] The computational performance metrics represent the actual computational performance of kernel 80 at the current operating frequency, including but not limited to computational accuracy, number of correct calculations, and computational speed. If the computational performance metrics of kernel 80 are high, it indicates that the computational performance of kernel 80 may have room for improvement; if the computational performance metrics of kernel 80 are low, it indicates that the computational performance of kernel 80 may be insufficient to operate at the frequency corresponding to the current operating frequency.

[0330] Preferably, this step involves analyzing whether the computational performance indicators of kernel 80 reach predetermined first, second, and / or third indicator thresholds within a predetermined adjustment period, wherein the first and second indicator thresholds are the same or different.

[0331] Step S903, based on the computational performance metrics of kernel 80, through, as follows Figure 2 The phase-locked loop circuit 70 shown adjusts the current operating frequency of the core 80 upwards or downwards. Of course, this step can also be achieved using other hardware or software to adjust the current operating frequency of the core 80 upwards or downwards.

[0332] This step preferably further includes:

[0333] (1) If the computing performance index of kernel 80 reaches the first index threshold, the current operating frequency of kernel 80 is increased to the previous operating frequency.

[0334] (2) If the computing performance index of kernel 80 does not reach the second index threshold, the current operating frequency of kernel 80 will be lowered to the next operating frequency; and / or

[0335] (3) If the computing performance index of kernel 80 reaches the third index threshold, the current operating frequency of kernel 80 will be lowered to the next operating frequency.

[0336] For example, taking the above example of "setting 6 operating frequencies: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz," and using the current operating frequency of kernel 80 as 600MHz, the computational performance indicator is the computational accuracy of kernel 80 within the adjustment period. Both the first and second indicator thresholds are 90%. If the computational accuracy of kernel 80 reaches 90% within the adjustment period, it indicates that the computational performance of kernel 80 is good, and the current operating frequency of kernel 80 (600MHz) is increased to the previous operating frequency (650MHz). If the computational accuracy of kernel 80 within the adjustment period does not reach 90%, it indicates that the computational performance of kernel 80 is weak, and the current operating frequency of kernel 80 (600MHz) is decreased to the next operating frequency (550MHz). Those skilled in the art will understand that the previous operating frequency is not limited to the previous adjacent operating frequency; more than one previous adjacent operating frequency can be set as the previous operating frequency. Similarly, the next operating frequency is not limited to the next adjacent operating frequency; more than one next adjacent operating frequency can be set as the next operating frequency. Preferably, the frequency difference between the current operating frequency and the previous operating frequency, and the frequency difference between the current operating frequency and the next operating frequency, are 1-10%, such that when the core 80 is adjusted from the current operating frequency to the previous or next operating frequency, the benefit to the computing performance of the core 80 should outweigh the loss. That is, the current operating frequency of the core 80 is adjusted from 600MHz to the previous operating frequency of 700MHz; the current operating frequency of the core 80 is adjusted from 600MHz to the next operating frequency of 500MHz. And so on. The interval between the previous and next operating frequencies is not limited here.

[0337] For example, the computational performance metric is the computational accuracy of kernel 80 within the adjustment period, with a first threshold of 90% and a second threshold of 80%. If the computational accuracy of kernel 80 reaches 90% within the adjustment period, it indicates that the computational performance of kernel 80 is good, and the current operating frequency of kernel 80 (600MHz) is increased to the previous operating frequency (650MHz). If the computational accuracy of kernel 80 within the adjustment period does not reach 80%, it indicates that the computational performance of kernel 80 is weak, and the current operating frequency of kernel 80 (600MHz) is decreased to the next operating frequency (550MHz).

[0338] For example, the computing performance indicators are the number of correct calculations and the number of incorrect calculations by kernel 80 within the adjustment period, with a first indicator threshold of 100 and a second indicator threshold of 10. If kernel 80 achieves 100 correct calculations within the adjustment period, it indicates that the computing performance of kernel 80 is good, and the current operating frequency of kernel 80 (600MHz) is increased to the previous operating frequency (650MHz). If kernel 80 achieves 10 incorrect calculations within the adjustment period, it indicates that the computing performance of kernel 80 is weak, and the current operating frequency of kernel 80 (600MHz) is decreased to the next operating frequency (550MHz).

[0339] Step S904: If the number of cores 80 operating at at least one predetermined optimized operating frequency exceeds a predetermined first ratio, stop adjusting the frequency of cores 80; or if the number of cores 80 operating at at least one optimized operating frequency is the largest, stop adjusting the frequency of cores 80.

[0340] For example, one or more optimized operating frequencies can be preset from several operating frequencies. If the operating frequency of most cores 80 has reached the optimized operating frequency, it indicates that the operating frequency of each core 80 in the computing chip is already in an optimized state, which can fully utilize the computing performance of each core 80, and no further frequency adjustment is needed. Therefore, the adjustment of the core 80 operating frequency is stopped. For example, if six operating frequencies are set: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz, and two optimized operating frequencies of 600MHz and 650MHz are selected as optimized operating frequencies, if more than 50% of the cores 80 are operating at operating frequencies of 600MHz and 650MHz, then frequency adjustment of the cores 80 is stopped.

[0341] Figure 10 This is a flowchart of a chip frequency modulation method for a computing device according to a second embodiment of the present invention, which can be achieved through, as follows: Figure 3 The computing device shown is implemented using a chip frequency modulation device 100. The computing device includes at least one arithmetic chip, which has multiple cores. The computing device is preferably used for massive computations. The method includes the following steps:

[0342] Step S1001: Set multiple operating frequencies for the computing chip of the computing device, and make the multiple cores 80 in the computing chip work at each operating frequency.

[0343] This step, based on the frequency adjustment mechanism at the computing chip level, sets several different frequency points for each computing chip and allows each core 80 of the computing chip to operate at each of these operating frequencies. For example, six operating frequencies can be set: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz. The number of operating frequencies and the frequency differences between them can be set according to actual needs; the more operating frequencies, the more fully the computing performance of each core 80 can be utilized. When the frequency adjustment switch is activated (before the core 80 has been frequency-adjusted), the cores 80 can be evenly, unevenly, or randomly distributed across the operating frequencies according to predetermined rules.

[0344] The preferred method in this step is as follows: Figure 2 The multiple phase-locked loop (PLL) circuits 70 shown provide multiple operating frequencies for the computing chip, allowing the multiple cores 80 within the chip to operate at their respective frequencies. There is a one-to-one correspondence between the operating frequencies and the PLL circuits 70. This invention allows for the use of more PLL circuits 70 to set more operating frequencies, thus maximizing the computational performance of each core 80. Alternatively, multiple operating frequencies can be set for the computing chip using other hardware or software.

[0345] It is worth noting that the frequency difference between operating frequencies in this invention needs to be controlled within a reasonable range. When the core 80 increases its operating frequency by one frequency point, its operating frequency will increase by one frequency difference value, which can improve computational performance due to the increased computational speed. At the same time, increasing the core's operating frequency may result in a decrease in computational accuracy, thus sacrificing some computational performance. Therefore, the frequency difference between adjacent operating frequencies should be reasonably controlled so that when the core 80 adjusts from its current operating frequency to the previous one, the benefit to its computational performance should outweigh the loss. Preferably, the frequency difference between adjacent operating frequencies is 1% to 10%.

[0346] Step S1002: Within a predetermined adjustment period, analyze whether the computational accuracy of kernel 80 reaches a predetermined first accuracy threshold and / or a predetermined second accuracy threshold. The first accuracy threshold and the second accuracy threshold may be the same or different. If the computational accuracy of kernel 80 reaches the predetermined first accuracy threshold, it indicates that the computational performance of kernel 80 may have room for improvement; if the computational accuracy of kernel 80 does not reach the predetermined second accuracy threshold, it indicates that the computational performance of kernel 80 may be insufficient to operate at the frequency corresponding to the current operating frequency.

[0347] Preferably, step S1002 further includes:

[0348] (1) Based on the preset real-time adjustment instructions, analyze in real time whether the calculation accuracy of kernel 80 within the adjustment period reaches the first accuracy threshold and / or the second accuracy threshold;

[0349] (2) According to the preset timed adjustment instruction, within the adjustment time period set by the timed adjustment instruction, analyze whether the calculation accuracy of kernel 80 within the adjustment period reaches the first accuracy threshold and / or the second accuracy threshold; or

[0350] (3) Based on the received real-time adjustment instructions, analyze whether the calculation accuracy of kernel 80 within the adjustment period reaches the first accuracy threshold and / or the second accuracy threshold.

[0351] Step S1003: If the calculation accuracy of kernel 80 reaches the first accuracy threshold, it indicates that kernel 80 has not yet reached the best calculation performance, and the current working frequency of kernel 80 is adjusted up to the previous working frequency.

[0352] Preferably, this step further includes:

[0353] (1) If the calculation accuracy of kernel 80 reaches the first accuracy threshold within the adjustment period, the current working frequency of kernel 80 is adjusted up to the previous working frequency in real time.

[0354] (2) During the adjustment period, if the calculation accuracy of kernel 80 reaches the first accuracy threshold within the adjustment cycle, the current operating frequency of kernel 80 will be increased to the previous operating frequency; or

[0355] (3) According to the received real-time adjustment instruction, if the calculation accuracy of kernel 80 reaches the first accuracy threshold within the adjustment period, the current operating frequency of kernel 80 is adjusted up to the previous operating frequency. And according to the received stop adjustment instruction, the adjustment of the current operating frequency of kernel 80 is stopped.

[0356] For example, a user can send an instant adjustment command to the computing device at any time as needed. The computing device will immediately begin analyzing the computational accuracy of kernel 80 based on this command. If, within an adjustment period (e.g., 10 minutes), the computational accuracy of kernel 80 exceeds a first accuracy threshold (e.g., higher than 99%), the operating frequency of kernel 80 will be adjusted upwards. If, within an adjustment period (e.g., 10 minutes), the computational accuracy of kernel 80 is lower than a second accuracy threshold (e.g., lower than 99%), the operating frequency of kernel 80 will be adjusted downwards. Furthermore, a user can send a stop adjustment command to the computing device at any time as needed. Upon receiving this stop adjustment command, the computing device will immediately cease adjusting the frequency of kernel 80.

[0357] Step S1004: If the computational accuracy of kernel 80 does not reach the second accuracy threshold, it indicates that the computational performance of kernel 80 is insufficient to work at the current operating frequency. The current operating frequency of kernel 80 is then lowered to the next operating frequency.

[0358] Preferably, this step further includes:

[0359] (1) If the calculation accuracy of kernel 80 within the adjustment period does not reach the second accuracy threshold, the current working frequency of kernel 80 will be adjusted down to the next working frequency in real time;

[0360] (2) During the adjustment period, if the calculation accuracy of kernel 80 does not reach the second accuracy threshold within the adjustment cycle, the current operating frequency of kernel 80 will be lowered to the next operating frequency; or

[0361] (3) If the calculation accuracy of kernel 80 within the adjustment period does not reach the second accuracy threshold, the current operating frequency of kernel 80 is lowered to the next operating frequency. And according to the received stop adjustment instruction, the adjustment of the current operating frequency of kernel 80 is stopped.

[0362] This invention can be achieved through, for example Figure 2 The phase-locked loop circuit 70 shown or the software adjusts the frequency of the core 80. That is, according to the frequency adjustment mechanism at the core level, the core 80 is adjusted to a suitable operating frequency point based on its actual computing performance. The frequency of the core 80 with high computing performance is increased, and the frequency of the core 80 with low computing performance is decreased, so as to give full play to the computing performance of each core 80.

[0363] For example, both the first and second accuracy thresholds are 90%. When core 80 operates at 600MHz, if the calculation accuracy of core 80 exceeds 90% within a predetermined adjustment period (indicating that core 80 has not yet reached its optimal calculation performance), then the current operating frequency of core 80, 600MHz, is increased to the previous operating frequency, i.e., its operating frequency is raised to 650MHz; if the calculation accuracy of core 80 is less than 90% (indicating that the calculation performance of core 80 is insufficient to operate at the current operating frequency of 600MHz), then the current operating frequency of core 80 is decreased to the next operating frequency, i.e., its operating frequency is lowered to 550MHz. Those skilled in the art will understand that the previous operating frequency is not limited to the previous adjacent operating frequency, and more than one previous adjacent operating frequency can be set as the previous operating frequency; similarly, the next operating frequency is not limited to the next adjacent operating frequency, and more than one next adjacent operating frequency can be set as the next operating frequency. Preferably, the frequency difference between the current operating frequency and the previous operating frequency is 1-10%, and the frequency difference between the current operating frequency and the next operating frequency is 1-10%, so that when the core 80 is adjusted from the current operating frequency to the previous or next operating frequency, the benefit to the computing performance of the core 80 should outweigh the loss. That is, the current operating frequency of the core 80 is adjusted from 600MHz to the previous operating frequency of 700MHz; the current operating frequency of the core 80 is adjusted from 600MHz to the next operating frequency of 500MHz. And so on, without limiting the interval between the previous and next operating frequencies.

[0364] For example, the first accuracy threshold is 90%, and the second accuracy threshold is 80%. When core 80 is operating at 600MHz, if the calculation accuracy of core 80 exceeds 90% within a predetermined adjustment period (indicating that core 80 has not yet reached its optimal calculation performance), then the current operating frequency of core 80 is increased to the previous operating frequency, that is, its operating frequency is increased to 650MHz; if the calculation accuracy of core 80 is less than 80% (indicating that the calculation performance of core 80 is insufficient to operate at the current operating frequency of 600MHz), then the current operating frequency of core 80 is decreased to the next operating frequency, that is, its operating frequency is decreased to 550MHz.

[0365] Figure 11 This is a flowchart of a preferred chip frequency modulation method for a computing device in the second embodiment of the present invention, which can be achieved through methods such as... Figure 3The computing device shown is implemented using a chip frequency tuning device 100. The computing device includes at least one computing chip, which has multiple cores. The computing device is preferably used for massive computations. Preferably, the computation accuracy rate can be the computation accuracy rate of the Nonces submitted by the kernel 80 within the adjustment period. That is, the ratio of correct Nonces among all Nonces submitted by the kernel 80 within a predetermined time. The block header includes the Nonce (4 bytes). The Nonce is a random value. The computation essentially guesses the value of the Nonce so that the hash of the block header is less than the target value, thus enabling it to be written into the blockchain. Specifically, this attribute is iterated from 0 to 2^32 to calculate the hash value of the block header. If the obtained hash result meets the conditions, the calculation is successful. The method includes the following steps:

[0366] Step S1101: Set multiple operating frequencies for the computing chip of the computing device, and make the multiple cores 80 in the computing chip work at each operating frequency.

[0367] Step S1102: During the adjustment period, analyze whether the Nonce submitted by kernel 80 is correct.

[0368] This step preferably includes:

[0369] (1) During the adjustment period, after each Nonce is submitted by kernel 80, kernel 80 calculates the first result of the Nonce using a predetermined algorithm. The first result contains the first feature. Each Nonce submitted by kernel 80 contains the identification information (ID) of the Nonce, thereby enabling the statistical analysis of the calculation results of each kernel 80.

[0370] (2) The verification unit of the computing chip calculates the second result of the Nonce using the same algorithm, and the second result contains the second feature.

[0371] (3) If the first feature is the same as the second feature, the verification unit determines that the Nonce is a correct Nonce; otherwise, it determines that the Nonce is an incorrect Nonce.

[0372] For example, after kernel 80 calculates a Nonce and submits it, it embeds the Nonce into the block header to calculate a first hash result. The first 20 bits of the first hash result are 0 (first characteristic). The first verification unit 212 also embeds the Nonce into the block header to calculate a second hash result. If the first 20 bits of the second hash result are also 0 (second characteristic), then the Nonce is considered to be a correct submission.

[0373] Step S1103: Count the number of correct nonces and the number of incorrect nonces submitted by kernel 80 during the adjustment period.

[0374] Step S1104: Calculate the Nonce calculation accuracy of kernel 80 within the adjustment period based on the number of correct Nonces and the number of incorrect Nonces.

[0375] Step S1105: Determine whether the Nonce calculation accuracy reaches the predetermined first accuracy threshold and / or second accuracy threshold. If the Nonce calculation accuracy of kernel 80 reaches the first accuracy threshold, proceed to step S1106. If the Nonce calculation accuracy of kernel 80 does not reach the second accuracy threshold, proceed to step S1107.

[0376] Step S1106: If the Nonce calculation accuracy of kernel 80 reaches the first accuracy threshold, the current operating frequency of kernel 80 is increased to the previous operating frequency.

[0377] Step S1107: If the Nonce calculation accuracy of kernel 80 does not reach the second accuracy threshold, the current operating frequency of kernel 80 is lowered to the next operating frequency.

[0378] Figure 12 This is a flowchart of a chip frequency modulation method for a computing device according to the third embodiment of the present invention, which can be achieved through, as follows: Figure 4 The computing device shown is implemented using a chip frequency modulation device 100. The computing device includes at least one arithmetic chip, which has multiple cores. The computing device is preferably used for massive computations. The method includes the following steps:

[0379] Step S1201: Set multiple operating frequencies for the computing chip of the computing device, and make the multiple cores 80 in the computing chip work at each operating frequency.

[0380] This step, based on the frequency adjustment mechanism at the computing chip level, sets several different frequency points for each computing chip and allows each core 80 of the computing chip to operate at each of these operating frequencies. For example, six operating frequencies can be set: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz. The number of operating frequencies and the frequency differences between them can be set according to actual needs; more operating frequencies allow for better utilization of the computing performance of each core 80. When the frequency adjustment switch is activated (before the core 80 has been frequency-adjusted), the cores 80 can be evenly, unevenly, or randomly distributed across the operating frequencies according to predetermined rules. Preferably, this can be achieved through mechanisms such as... Figure 2 The multiple phase-locked loop circuits 70 shown provide multiple operating frequencies for the computing chip. Of course, multiple operating frequencies can also be set for the computing chip through other hardware or software.

[0381] It is worth noting that the frequency difference between operating frequencies in this invention needs to be controlled within a reasonable range. When the core 80 increases its operating frequency by one frequency point, its operating frequency will increase by one frequency difference value, which can improve its computing performance due to the increased computational speed. At the same time, increasing the core's operating frequency may result in a decrease in computational accuracy, thus sacrificing some computing performance. Therefore, the frequency setting module 10 should reasonably control the frequency difference between adjacent operating frequencies so that when the core 80 adjusts from its current operating frequency to the previous operating frequency, the benefit to the core 80's computing performance should outweigh the loss. Preferably, the frequency difference between adjacent operating frequencies is 1% to 10%.

[0382] Step S1202: Pre-set the reference node value of kernel 80, calculate the correct weight value, calculate the incorrect weight value, calculate the correct threshold, and calculate the incorrect threshold.

[0383] Preferably, the correctly calculated weight value and the incorrectly calculated weight value can be the same or different; the correctly calculated threshold and the incorrectly calculated threshold can be the same or different. The reference node value, the correctly calculated weight value, the incorrectly calculated weight value, the correctly calculated threshold, and the incorrectly calculated threshold are all adjustable parameters, which can be optimized according to actual needs such as frequency adjustment speed.

[0384] Preferably, the reference node value, the correctly calculated weight value, the incorrectly calculated weight value, the correctly calculated threshold and / or the incorrectly calculated threshold of kernel 80 are set and adjusted according to actual needs. The correctly calculated weight value and the incorrectly calculated weight value may be the same or different, and the correctly calculated threshold and the incorrectly calculated threshold may be the same or different.

[0385] The kernel's expected tolerance for residency error rate is controlled by adjusting the ratio of correctly calculated weight values ​​to incorrectly calculated weight values. The residency error rate is calculated as follows: Residency Error Rate = Correctly Calculated Weight Value / (Correctly Calculated Weight Value + Incorrectly Calculated Weight Value).

[0386] The adjustment cycle is controlled by adjusting the absolute values ​​of correctly calculated weight values ​​and incorrectly calculated weight values.

[0387] The adjustment cycle is controlled by adjusting the absolute values ​​of the correct and incorrect thresholds.

[0388] Step S1203: Analyze whether each calculation of kernel 80 is correct.

[0389] Kernel 80 can perform various calculations, and we can analyze whether each calculation by kernel 80 is correct. Preferably, we analyze whether the Nonce calculated by kernel 80 is correct.

[0390] In step S1204, for each correct calculation by kernel 80, a correct calculation weight value is added to the reference node value; and for each incorrect calculation by kernel 80, an incorrect calculation weight value is deducted from the reference node value. Preferably, for each correct calculation by kernel 80, a correct calculation weight value is added to the reference node value. Alternatively, it can be set to add a correct calculation weight value to the reference node value for every N correct calculations (where N is a natural number greater than 1), and deduct a incorrect calculation weight value from the reference node value for every N incorrect calculations (where N is a natural number greater than 1).

[0391] Step S1205: Determine whether the current reference node value of kernel 80 has reached the correct calculation threshold or the incorrect calculation threshold. If the current reference node value of kernel 80 has reached the correct calculation threshold, proceed to step S1206; if the current reference node value of kernel 80 has reached the incorrect calculation threshold, proceed to step S1207.

[0392] This step preferably includes:

[0393] (1) Based on the preset real-time adjustment instructions, determine in real time whether the current reference node of kernel 80 has reached the correct calculation threshold or the incorrect calculation threshold; or

[0394] (2) Based on the preset timed adjustment instruction, within the adjustment time period set by the timed adjustment instruction, determine whether the current reference node of kernel 80 has reached the correct calculation threshold or the incorrect calculation threshold; or

[0395] (3) Based on the received real-time adjustment instructions, analyze whether the current reference node of kernel 80 has reached the correct calculation threshold or the incorrect calculation threshold.

[0396] Step S1206: If the current reference node value of kernel 80 reaches the correct calculation threshold, it indicates that kernel 80 has not yet reached the optimal computing performance, and the current operating frequency of kernel 80 is adjusted up to the previous operating frequency.

[0397] This step preferably includes:

[0398] (1) If the current reference node value of kernel 80 reaches the correctly calculated threshold, the current operating frequency of kernel 80 is adjusted up to the previous operating frequency in real time; or

[0399] (2) During the adjustment period, if the current reference node value of kernel 80 reaches the correctly calculated threshold, the current operating frequency of kernel 80 is adjusted up to the previous operating frequency; or

[0400] (3) According to the received real-time adjustment instruction, if the current reference node value of kernel 80 reaches the calculated correct threshold, the current operating frequency of kernel 80 is adjusted up to the previous operating frequency. And according to the received stop adjustment instruction, the adjustment of the current operating frequency of kernel 80 is stopped.

[0401] Step S1207: If the current reference node value of kernel 80 reaches the calculation error threshold, it indicates that the computing performance of kernel 80 is insufficient to work at the current operating frequency, and the current operating frequency of kernel 80 is downgraded to the next operating frequency.

[0402] This step preferably includes:

[0403] (1) If the current reference node value of kernel 80 reaches the calculation error threshold, the current operating frequency of kernel 80 is adjusted down to the next operating frequency in real time; or

[0404] (2) During the adjustment period, if the current reference node value of kernel 80 reaches the calculation error threshold, the current operating frequency of kernel 80 will be lowered to the next operating frequency; or

[0405] (3) If the current reference node value of kernel 80 reaches the calculation error threshold, the current operating frequency of kernel 80 is lowered to the next operating frequency. And according to the received stop adjustment instruction, the adjustment of the current operating frequency of kernel 80 is stopped.

[0406] For example, users can send real-time adjustment commands to the computing device at any time as needed. Users can set the weight A to be increased on the reference node for each correct Nonce calculated by kernel 80, and the weight B to be decreased on the reference node for each incorrect Nonce calculated by kernel 80. When the current increase reaches the threshold C for the number of correct calculations, kernel 80 is promoted to the next frequency. When the current decrease reaches the threshold D for the number of incorrect calculations, kernel 80 is demoted to the next frequency. Furthermore, users can send a stop adjustment command to the computing device at any time as needed. Upon receiving this stop adjustment command, the computing device immediately stops frequency adjustment of kernel 80.

[0407] Those skilled in the art will understand that the previous operating frequency is not limited to the previous adjacent operating frequency; more than one previous adjacent operating frequency can be set as the previous operating frequency. Similarly, the next operating frequency is not limited to the next adjacent operating frequency; more than one next adjacent operating frequency can be set as the next operating frequency. Preferably, the frequency difference between the current operating frequency and the previous operating frequency, and the frequency difference between the current operating frequency and the next operating frequency, are 1-10%, such that when the core 80 is adjusted from the current operating frequency to the previous or next operating frequency, the benefit to the computing performance of the core 80 should outweigh the loss. That is, the current operating frequency of the core 80 is adjusted from 600MHz to the previous operating frequency of 700MHz; the current operating frequency of the core 80 is adjusted from 600MHz to the next operating frequency of 500MHz. And so on. The interval between the previous and next operating frequencies is not limited here.

[0408] This step can preferably be achieved through, for example... Figure 2 The phase-locked loop circuit 70 shown or the software adjusts the frequency of the core 80. That is, according to the frequency adjustment mechanism at the core level, the core 80 is adjusted to a suitable operating frequency point based on its actual computing performance. The frequency of the core 80 with high computing performance is increased, and the frequency of the core 80 with low computing performance is decreased, so as to give full play to the computing performance of each core 80.

[0409] For example, such as Figure 5 As shown, 400000 is set as the reference node value, the weight value for correct calculation is set to 180, the weight value for incorrect calculation is set to 9000, and both the correct calculation threshold and the incorrect calculation threshold are set to 100000.

[0410] For each correct calculation by kernel 80, add 180 to the reference node value (for correct calculation weight); for each incorrect calculation by kernel 80, reduce the reference node value by 9000 (for incorrect calculation weight); based on the reference node value, for each increase or decrease of 100000 (for correct calculation threshold and incorrect calculation threshold), advance to the next frequency point or decrease to the next frequency point.

[0411] The current mechanism is similar to a tug-of-war between correct and incorrect results, where correct and incorrect results can have different weights. A reference node value is set. Each correct result increases the correct weight value, and each incorrect result decreases the incorrect weight value. If the reward or penalty exceeds a corresponding threshold, the frequency is adjusted upwards or downwards. The system can be understood as having a marker, with the reference node value being the marker's initial value. For each correct submission, the marker increases by 180, and for each incorrect submission, it decreases by 9000. After N correct submissions (N is a natural number greater than or equal to 1) and M incorrect submissions (M is a natural number greater than or equal to 1), the marker should be at the position 400000 + N * 180 – M * 9000. If the marker exceeds a certain threshold, the corresponding frequency is adjusted (increased or decreased). Then, each time the frequency is adjusted to a new frequency point, this value is initialized, that is, the current reference node value is reset to the initial reference node value.

[0412] Figure 13 This is a flowchart of a preferred chip frequency modulation method for a computing device in the third embodiment of the present invention, which can be achieved through, as follows: Figure 4 The computing device shown is implemented using a chip frequency modulation device 100. The computing device includes at least one arithmetic chip, which has multiple cores. The computing device is preferably used for massive computations. The method includes the following steps:

[0413] Step S1301: Set multiple operating frequencies for the computing chip of the computing device, and make the multiple cores 80 in the computing chip work at each operating frequency.

[0414] Step S1302: Pre-set the reference node value of kernel 80, calculate the correct weight value, calculate the incorrect weight value, calculate the correct threshold, and calculate the incorrect threshold.

[0415] Step S1303: Analyze whether the Nonce submitted by kernel 80 each time is correct.

[0416] Preferably, this step further includes:

[0417] (1) After kernel 80 submits a Nonce, kernel 80 calculates the first result of the Nonce using a predetermined algorithm. The first result contains the first feature.

[0418] (2) The verification unit of the computing chip calculates the second result of the Nonce using the same algorithm, and the second result contains the second feature.

[0419] (3) If the first feature is the same as the second feature, the verification unit determines that the Nonce is a correct Nonce; otherwise, it determines that the Nonce is an incorrect Nonce.

[0420] For example, after kernel 80 calculates a Nonce and commits it, it embeds the Nonce into the block header to calculate a first hash result. The first 20 bits of the first hash result are 0 (first characteristic). The second verification unit 252 also embeds the Nonce into the block header to calculate a second hash result. If the first 20 bits of the second hash result are also 0 (second characteristic), then the Nonce is considered a correct commit.

[0421] In step S1304, for each correct Nonce submitted by kernel 80, a correct weight value is added to the reference node value; for each incorrect Nonce submitted by kernel 80, an incorrect weight value is decremented from the reference node value. Preferably, for each correct Nonce submitted by kernel 80, a correct weight value is added to the reference node value. Alternatively, it can be set to add a correct weight value to the reference node value for every N (N is a natural number greater than 1) correct Nonces submitted by kernel 80, and decrement an incorrect weight value from the reference node value for every N (N is a natural number greater than 1) incorrect Nonces submitted by kernel 80. Alternatively, it can be set to decrement an incorrect weight value from the reference node value for every N (N is a natural number greater than 1) incorrect Nonces submitted by kernel 80.

[0422] Step S1305: Determine whether the current reference node value of kernel 80 has reached the correct calculation threshold or the incorrect calculation threshold. If the current reference node value of kernel 80 has reached the correct calculation threshold, proceed to step S1206; if the current reference node value of kernel 80 has reached the incorrect calculation threshold, proceed to step S1207.

[0423] Step S1306: If the current reference node value of kernel 80 reaches the correctly calculated threshold, the current operating frequency of kernel 80 is adjusted up to the previous operating frequency.

[0424] Step S1307: If the current reference node value of kernel 80 reaches the calculation error threshold, the current operating frequency of kernel 80 is lowered to the next operating frequency.

[0425] In a specific application embodiment of the present invention: six phase-locked loop circuits 70 are used, with six operating frequencies set: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz. Figure 5 As shown, 400000 is set as the reference node value, the correct calculation weight value is set to 180, the incorrect calculation weight value is set to 9000, and both the correct calculation threshold and the incorrect calculation threshold are set to 100000.

[0426] The number of cores distributed at each corresponding frequency based on the four computing boards is as follows:

[0427] Computing board 0: [294 26 96 224 1023 1665]

[0428] Computing board 1: [274 47 111 212 963 1721]

[0429] Computing board 2: [350 25 153 369 1381 1050]

[0430] Computing board 3: [488 33 184 367 1342 950]

[0431] First, let's further explain the mechanism using data. Based on the formula S = Correctly calculated weight value / (Correctly calculated weight value + Incorrectly calculated weight value), and using the given data, we can deduce that the resident error rate S of kernel 80 (which can be understood as the frequency at which it can reside for a long time) is 180 / (180 + 9000) = 1.96%. At this point, kernel 80 will operate at a certain frequency for an extended period (because the expected step size is 0), and the operating frequency will not be increased or decreased. It can be inferred that if the calculation error rate of kernel 80 is greater than 1.96% (resident error rate S), its operating frequency will be increased; if the calculation error rate of kernel 80 is less than 1.96% (resident error rate S), its operating frequency will be decreased.

[0432] Based on the set difficulty level (which is related to the benchmark and affects the accuracy of kernel 80 calculations; the higher the difficulty level, the lower the accuracy, and vice versa), the approximate adjustment period when errors increase can be calculated. Assuming the error rate is e, the expected step size for each Nonce is: (1-e)*180-e*9000=180-9180e. Taking e=0.5% as an example, the expected step size is 134.1; taking e=1% as an example, the expected step size is 88.2; taking e=2% as an example, the expected step size is -3.6.

[0433] Based on a 650MHz clock speed, the expected rate of a single nonce submission per kernel 80 is 1.3 per second (i.e., 1.3 nonces submitted per second). Explaining this with an error probability of 0.5%, it means that after 746 nonce submissions, an upward adjustment can be expected; with an error probability of 1.0%, 1134 submissions are needed, with an expected upward adjustment; if the error probability is 2.0%, 27778 submissions are needed, with an expected downward adjustment, and so on.

[0434] Figure 14This is a flowchart of a chip frequency modulation method for a computing device according to a fourth embodiment of the present invention. It can be implemented by the chip frequency modulation device 100 of the computing device. The computing device includes at least one arithmetic chip, and the arithmetic chip has multiple cores. The computing device is preferably used for massive computation. The method includes the following steps:

[0435] Step S1401: Set multiple operating frequencies for the computing chip of the computing device, and make the multiple cores 80 in the computing chip work at each operating frequency.

[0436] This step, based on the frequency adjustment mechanism at the computing chip level, sets several different frequency points for each computing chip and makes the core 80 of the computing chip operate at each of these operating frequencies. For example, six operating frequencies can be set: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz. The number of operating frequencies and the frequency differences between them can be set according to actual needs; the more operating frequencies, the more fully the computing performance of each core 80 can be utilized. When the frequency adjustment switch is activated (before the core 80 is frequency-adjusted), the core 80 can be evenly, unevenly, or randomly distributed among the operating frequencies according to predetermined rules. This step can be achieved through multiple... Figure 2 The phase-locked loop circuit 70 shown provides multiple operating frequencies for the computing chip. Of course, this step can also be performed by other hardware or software to provide multiple operating frequencies for the computing chip.

[0437] It is worth noting that the frequency difference between operating frequencies in this invention needs to be controlled within a reasonable range. When the core 80 increases its operating frequency by one frequency point, its operating frequency will increase by one frequency difference value, which can improve its computing performance due to the increased computational speed. At the same time, increasing the core's operating frequency may result in a decrease in computational accuracy, thus sacrificing some computing performance. Therefore, the frequency setting module 10 should reasonably control the frequency difference between adjacent operating frequencies so that when the core 80 adjusts from its current operating frequency to the previous operating frequency, the benefit to the core 80's computing performance should outweigh the loss. Preferably, the frequency difference between adjacent operating frequencies is 1% to 10%.

[0438] Step S1402: Analyze the computational performance metrics of each core 80 at the current operating frequency.

[0439] The computational performance metrics represent the actual computational performance of kernel 80 at the current operating frequency, including but not limited to computational accuracy, number of correct calculations, and computational speed. If the computational performance metrics of kernel 80 are high, it indicates that the computational performance of kernel 80 may have room for improvement; if the computational performance metrics of kernel 80 are low, it indicates that the computational performance of kernel 80 may be insufficient to operate at the frequency corresponding to the current operating frequency.

[0440] Step S1403: Adjust the current operating frequency of kernel 80 upwards or downwards according to the computing performance indicators of kernel 80.

[0441] This step, based on the kernel-level frequency adjustment mechanism, will adjust the operating frequency of kernel 80 according to its actual computing performance. It will increase the frequency of high-performance kernel 80 cores and decrease the frequency of low-performance kernel 80 cores, thereby fully utilizing the computing performance of each kernel 80. This step can be achieved through methods such as... Figure 2 The phase-locked loop circuit 70 or software shown adjusts the frequency of the core 80. Preferably, if the calculation accuracy of the core 80 reaches a first accuracy threshold within the adjustment period, it indicates that the core 80 has not yet reached its optimal calculation performance, and therefore the current operating frequency of the core 80 is increased to the previous operating frequency; if the calculation accuracy of the core 80 does not reach a second accuracy threshold within the adjustment period, it indicates that the calculation performance of the core 80 is insufficient to operate at the current operating frequency, and therefore the current operating frequency of the core 80 is decreased to the next operating frequency.

[0442] Those skilled in the art will understand that the previous operating frequency is not limited to the previous adjacent operating frequency; more than one previous adjacent operating frequency can be set as the previous operating frequency. Similarly, the next operating frequency is not limited to the next adjacent operating frequency; more than one next adjacent operating frequency can be set as the next operating frequency. Preferably, the frequency difference between the current operating frequency and the previous operating frequency, and the frequency difference between the current operating frequency and the next operating frequency, are 1-10%, such that when the core 80 is adjusted from the current operating frequency to the previous or next operating frequency, the benefit to the computing performance of the core 80 should outweigh the loss. That is, the current operating frequency of the core 80 is adjusted from 600MHz to the previous operating frequency of 700MHz; the current operating frequency of the core 80 is adjusted from 600MHz to the next operating frequency of 500MHz. And so on. The interval between the previous and next operating frequencies is not limited here.

[0443] Step S1404: Statistically analyze the current distribution status of the frequency-modulated core 80 at each operating frequency point.

[0444] After the operating frequency of the core 80 is automatically adjusted according to its computing performance, it will be distributed across various operating frequencies. The current distribution state can be determined by counting the number of cores 80 at each operating frequency after the frequency adjustment. Preferably, the operating frequencies can be divided into at least one high-frequency operating frequency, at least one intermediate-frequency operating frequency, and at least one low-frequency operating frequency. The highest frequency among the high-frequency operating frequencies is the highest operating frequency, and the lowest frequency among the low-frequency operating frequencies is the lowest operating frequency. For example, if there are 1000 cores 80, and six operating frequencies are set: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz, the number of cores distributed across these six operating frequencies would be 100, 200, 100, 100, 200, and 300 respectively. Among them, 500MHz and 550MHz are low-frequency operating points, 600MHz and 650MHz are intermediate operating points, 700MHz and 750MHz are high-frequency operating points, 500MHz is the lowest operating frequency, and 750MHz is the highest operating frequency.

[0445] Step S1405: Adjust the frequency of the set working frequency according to the current distribution status and the predetermined frequency adjustment mechanism. The frequency adjustment mechanism is the correspondence between the kernel 80 distribution status and the frequency adjustment.

[0446] The frequency adjustment mechanism is a correspondence between the kernel distribution state and the frequency adjustment. The kernel distribution state refers to the distribution of the kernel 80 at various operating frequencies. Adjusting the operating frequency means directly adjusting the frequency of the operating point. Preferably, this is achieved through methods such as... Figure 2 The phase-locked loop circuit 70 shown adjusts the frequency of the set operating frequency. Ideally, the present invention aims to have more than a predetermined ratio (e.g., 50%) or a maximum number of cores 80 fall to the middle operating frequency, thus allowing for a greater range of frequency adjustment for the cores 80.

[0447] For example, if more than a predetermined percentage (e.g., 30%) of cores 80 are operating at their highest operating frequency (750MHz), it may result in the cores 80 not achieving their maximum computing performance (as it could be higher). In such cases, one operating frequency (600MHz) needs to be changed to at least one optimized high-frequency operating frequency (800MHz), and all cores 80 originally operating at the 600MHz frequency will be moved to operate at the highest operating frequency (750MHz). The frequency of the optimized high-frequency operating frequency is higher than that of the highest operating frequency to fully utilize the computing performance of each core 80.

[0448] Preferably, step S1405 may further include:

[0449] If more than a predetermined fourth ratio of cores 80 operate at at least one intermediate operating frequency, stop adjusting the frequency setting; or, if the number of cores 80 operating at at least one intermediate operating frequency is the largest, stop adjusting the frequency setting. Ideally, the cores 80 exceeding the predetermined fourth ratio (e.g., 50%) or the largest number of cores 80 fall on one or more intermediate operating frequencies, such as the third operating frequency (600MHz), so in this case, no further frequency adjustment of cores 80 is required.

[0450] Figure 15 This is one of the flowcharts of a preferred chip frequency modulation method for a computing device in the fourth embodiment of the present invention. It can be implemented by the chip frequency modulation device 100 of the computing device. The computing device includes at least one arithmetic chip, and the arithmetic chip has multiple cores. The computing device is preferably used for massive computation. The method includes the following steps:

[0451] Step S1501: Set multiple operating frequencies for the computing chip of the computing device, and make the multiple cores 80 in the computing chip work at each operating frequency.

[0452] Step S1502: Analyze the computational performance metrics of each core 80 at the current operating frequency.

[0453] Step S1503: Adjust the current operating frequency of kernel 80 upward or downward according to the computing performance indicators of kernel 80.

[0454] Step S1504: Statistically analyze the current distribution of the frequency-modulated core 80 at each operating frequency point. The operating frequency points include at least one high-frequency operating frequency point, at least one intermediate operating frequency point, and at least one low-frequency operating frequency point. Among the high-frequency operating frequency points, the highest frequency is the highest operating frequency point, and among the low-frequency operating frequency points, the lowest frequency is the lowest operating frequency point.

[0455] In step S1505, if more than a predetermined second ratio of cores 80 are operating at at least one high-frequency operating point, it may cause the cores 80 to not achieve their maximum computing performance (as it may be higher). Therefore, at least one operating frequency is modified to at least one optimized high-frequency operating point, where the frequency of the optimized high-frequency operating point is higher than the frequency of the highest operating frequency. The modified operating frequency can be a low-frequency operating point, a mid-frequency operating point, and / or a high-frequency operating point.

[0456] For example, if six operating frequencies are set: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz, and more than 30% (second ratio) of the core 80 operates at two high-frequency operating frequencies (700MHz and 750MHz), then the two low-frequency operating frequencies (500MHz and 550MHz) can be modified to two optimized high-frequency operating frequencies (800MHz and 850MHz), or one low-frequency operating frequency (500MHz) and one mid-frequency operating frequency (600MHz) can be modified to two optimized high-frequency operating frequencies (800MHz and 850MHz).

[0457] Preferably, in this step, if more than the second ratio of core 80 is operating at the highest operating frequency, one operating frequency is modified to an optimized high-frequency operating frequency, the frequency of which is higher than the highest operating frequency. The modified operating frequency can be a low-frequency, mid-frequency, and / or high-frequency operating frequency.

[0458] For example, if more than 30% (the second ratio) of the core 80 is operating at the highest operating frequency (750MHz), then a low-frequency operating frequency (500MHz) will be modified to an optimized high-frequency operating frequency (800MHz), or a mid-frequency operating frequency (600MHz) will be modified to an optimized high-frequency operating frequency (800MHz); or the highest operating frequency (750MHz) will be modified to an optimized high-frequency operating frequency (800MHz).

[0459] Step S1506: If more than a predetermined third ratio of cores 80 operate at at least one low-frequency operating point, it indicates that the computing power of cores 80 is too poor to operate at the low-frequency operating point. Therefore, at least one operating frequency point is modified to at least one optimized low-frequency operating point, the frequency of which is lower than the frequency of the lowest operating frequency point. It is worth noting that this step can be omitted, i.e., at least one operating frequency point is not modified to at least one optimized low-frequency operating point.

[0460] The modified operating frequency can be a low-frequency operating frequency, a mid-frequency operating frequency, and / or a high-frequency operating frequency. For example, if six operating frequencies are set: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz, and more than 30% (third ratio) of the core 80 operates at two low-frequency operating frequencies (500MHz and 550MHz), then the two low-frequency operating frequencies (500MHz and 550MHz) will be modified to two optimized low-frequency operating frequencies (400MHz and 450MHz), or one low-frequency operating frequency (500MHz) and one mid-frequency operating frequency (600MHz) will be modified to two optimized low-frequency operating frequencies (400MHz and 450MHz).

[0461] Preferably, in this step, if more than 30% (the third ratio) of the core 80 is operating at the lowest operating frequency, one operating frequency is modified to an optimized low-frequency operating frequency. The modified operating frequency can be a low-frequency operating frequency, a mid-frequency operating frequency, and / or a high-frequency operating frequency. For example, if more than 30% (the third ratio) of the core 80 is operating at the lowest operating frequency (500MHz), then a low-frequency operating frequency (500MHz) is modified to an optimized low-frequency operating frequency (450MHz), or a mid-frequency operating frequency (600MHz) is modified to an optimized low-frequency operating frequency (450MHz); or the highest operating frequency (750MHz) is modified to an optimized low-frequency operating frequency (450MHz).

[0462] Preferably, step S1506 is followed by the following:

[0463] If core 80 operates at at least one intermediate operating frequency point exceeding the predetermined fourth ratio, stop adjusting the operating frequency setting. Ideally, core 80 exceeding the predetermined fourth ratio (e.g., 50%) should fall on one or more intermediate operating frequencies, such as the third operating frequency (600MHz), which fully utilizes the core 80's performance; therefore, no further frequency adjustment of core 80 is necessary. Or...

[0464] If the number of cores 80 operating at at least one intermediate operating frequency is the largest, stop adjusting the operating frequency. Ideally, the largest number of cores 80 should be operating at one or more intermediate operating frequencies, such as the third operating frequency (600MHz), which fully utilizes the performance of the cores 80. Therefore, no further frequency adjustment of the cores 80 is necessary at this point.

[0465] In a specific application embodiment of the present invention: six phase-locked loop circuits 70 are used, and six operating frequencies are set: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz.

[0466] The number of cores distributed at each corresponding frequency based on the four computing boards is as follows:

[0467] Computing board 0: [294 26 96 224 1023 1665]

[0468] Computing board 1: [274 47 111 212 963 1721]

[0469] Computing board 2: [350 25 153 369 1381 1050]

[0470] Computing board 3: [488 33 184 367 1342 950]

[0471] Taking the four computing boards 0-3 mentioned above as examples, such as Figure 7 As shown, the data roughly follows a normal distribution. The lowest operating frequency (500MHz) is the lowest frequency at which a single core 80 operates, and it cannot be adjusted downwards (if the error rate is too high, this lowest frequency can be considered for shutdown). The accumulation of cores 80 at the highest operating frequency (750MHz) exceeding a predetermined ratio (e.g., 50%) means that maximum efficiency is not being achieved (as it could be higher), and the entire computing chip has room for further improvement. Ideally, the maximum number or percentage of cores 80 exceeding the predetermined ratio (e.g., 50%) should fall on one or more intermediate operating frequencies, such as the third operating frequency (600MHz). To fully utilize the computing performance of cores 80, the focus should be on the high-capacity long tail rather than the low-frequency long tail.

[0472] Taking computing boards 0-1 as an example, it can be seen that if the 600MHz frequency point is removed, and an overall left shift is adopted, approximately 100 cores at frequency 80 would fall to the 550MHz frequency point. The current frequency setting is clearly in the low-frequency range on the left, which is not conducive to fully utilizing the computing performance of cores 80. Therefore, an overall right shift is more suitable, that is, using an overall offset method, and setting the 550MHz frequency point to the right to above 800MHz through the phase-locked loop circuit 70. This is expected to increase the frequency of hundreds of cores 80 to above 800MHz, thereby improving the overall computing performance.

[0473] Figure 16 This is the second flowchart of a preferred chip frequency modulation method for a computing device in the fourth embodiment of the present invention. It can be implemented by the chip frequency modulation device 100 of the computing device. The computing device includes at least one arithmetic chip, and the arithmetic chip has multiple cores. The computing device is preferably used for massive computation. The method includes the following steps:

[0474] Step S1601: Set multiple operating frequencies for the computing chip of the computing device, and make the multiple cores 80 in the computing chip work at each operating frequency.

[0475] Step S1602: Analyze the computational performance metrics of each core 80 at the current operating frequency.

[0476] Step S1603: Adjust the current operating frequency of kernel 80 upward or downward according to the computing performance indicators of kernel 80.

[0477] Step S1604: Statistically analyze the current distribution of the frequency-modulated core 80 at each operating frequency point. The operating frequency points include at least one high-frequency operating frequency point, at least one intermediate operating frequency point, and at least one low-frequency operating frequency point. Among the high-frequency operating frequency points, the highest frequency is the highest operating frequency point, and among the low-frequency operating frequency points, the lowest frequency is the lowest operating frequency point.

[0478] In step S1605, if the number of cores 80 operating at at least one high-frequency point is the largest, it may cause the cores 80 to not achieve their maximum computing performance (because it may be higher). Therefore, at least one operating frequency point is modified to at least one optimized high-frequency operating frequency point, where the frequency of the optimized high-frequency operating frequency point is higher than the frequency of the highest operating frequency point. The modified operating frequency point can be a low-frequency operating frequency point, a mid-frequency operating frequency point, and / or a high-frequency operating frequency point.

[0479] For example, if you set six operating frequencies: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz, and a maximum of 80 cores operate at two high-frequency frequencies (700MHz and 750MHz), then you can modify the two low-frequency frequencies (500MHz and 550MHz) to two optimized high-frequency frequencies (800MHz and 850MHz), or modify one low-frequency frequency (500MHz) and one mid-frequency frequency (600MHz) to two optimized high-frequency frequencies (800MHz and 850MHz).

[0480] Preferably, if the number of cores 80 operating at the highest operating frequency is the largest, then one operating frequency is modified to an optimized high-frequency operating frequency. The modified operating frequency can be a low-frequency operating frequency, a mid-frequency operating frequency, and / or a high-frequency operating frequency.

[0481] For example, if the most numerous core 80 is operating at the highest operating frequency (750MHz), then a low-frequency operating frequency (500MHz) can be modified to optimize the high-frequency operating frequency (800MHz), or a mid-frequency operating frequency (600MHz) can be modified to optimize the high-frequency operating frequency (800MHz); or the highest operating frequency (750MHz) can be modified to optimize the high-frequency operating frequency (800MHz).

[0482] Step S1606: If the number of cores 80 operating at at least one low frequency is the largest, it indicates that the computing power of the cores 80 is too poor to operate at the low frequency. Therefore, at least one operating frequency is modified to at least one optimized low frequency, with the frequency of the optimized low frequency being lower than the frequency of the lowest operating frequency, to avoid the poor computing power of the cores 80 affecting the overall computing performance of the computing chip. This step can be omitted, i.e., at least one operating frequency is not modified to at least one optimized low frequency.

[0483] The modified operating frequency can be a low-frequency operating frequency, a medium-frequency operating frequency, and / or a high-frequency operating frequency.

[0484] For example, if you set six operating frequencies: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz, and the most numerous core 80 operates at two low-frequency operating frequencies (500MHz and 550MHz), then you can modify the two low-frequency operating frequencies (500MHz and 550MHz) to two optimized low-frequency operating frequencies (400MHz and 450MHz), or modify one low-frequency operating frequency (500MHz) and one mid-frequency operating frequency (600MHz) to two optimized low-frequency operating frequencies (400MHz and 450MHz).

[0485] Preferably, if the number of cores 80 operating at the lowest operating frequency is the largest, then one operating frequency is modified to an optimized low-frequency operating frequency. The modified operating frequency can be a low-frequency operating frequency, a mid-frequency operating frequency, and / or a high-frequency operating frequency. For example, if the largest number of cores 80 operate at the lowest operating frequency (500MHz), then one low-frequency operating frequency (500MHz) is modified to an optimized low-frequency operating frequency (450MHz), or one mid-frequency operating frequency (600MHz) is modified to an optimized low-frequency operating frequency (450MHz); or the highest operating frequency (750MHz) is modified to an optimized low-frequency operating frequency (450MHz).

[0486] Preferably, step S1606 is followed by the following:

[0487] If core 80 operates at at least one intermediate operating frequency point exceeding the predetermined fourth ratio, stop adjusting the frequency setting; or

[0488] If the number of cores 80 operating at at least one intermediate operating frequency is the largest, stop adjusting the frequency setting of the operating frequency.

[0489] In a specific application embodiment of the present invention: six phase-locked loop circuits 70 are used, and six operating frequencies are set: 500MHz, 550MHz, 600MHz, 650MHz, 700MHz, and 750MHz.

[0490] The number of cores distributed at each corresponding frequency based on the four computing boards is as follows:

[0491] Computing board 0: [294 26 96 224 1023 1665]

[0492] Computing board 1: [274 47 111 212 963 1721]

[0493] Computing board 2: [350 25 153 369 1381 1050]

[0494] Computing board 3: [488 33 184 367 1342 950]

[0495] Taking the four computing boards 0-3 mentioned above as examples, such as Figure 7 As shown, the data roughly follows a normal distribution. The lowest operating frequency (500MHz) is the lowest frequency at which a single core 80 operates, and it cannot be adjusted downwards (if the error rate is too high, this lowest frequency can be considered for shutdown). The highest operating frequency (750MHz) has the largest number of cores 80, meaning it is not operating at its maximum efficiency (as it could be even higher), and the entire computing chip has room for further improvement. Ideally, more than a predetermined percentage (e.g., 50%) or the largest number of cores 80 should fall at one or more intermediate operating frequencies, such as the third operating frequency (600MHz). To fully utilize the computing performance of cores 80, the long tail of high-capacity cores should be considered, rather than the long tail of low-frequency cores.

[0496] Taking computing boards 0-1 as an example, it can be seen that if the 600MHz frequency point is removed, about 100 cores with a frequency of 80 will fall to the 550MHz frequency point. The current frequency setting is obviously in the low frequency range on the left, which is more suitable for overall right shift. That is, by adopting the overall offset method, the 550MHz frequency point can be set to the right or above 800MHz frequency point through the phase-locked loop circuit 70. This is expected to increase the frequency of hundreds of cores with a frequency of 80 to above 800MHz, thereby bringing about an overall performance improvement.

[0497] The present invention also provides a storage medium for storing, for example, Figures 8-16 A computer program for a chip frequency modulation method of any of the computing devices described herein. For example, computer program instructions, when executed by a computer, can invoke or provide the methods and / or technical solutions according to this application through the operation of the computer. The program instructions for invoking the methods of this application may be stored in a fixed or removable storage medium, and / or transmitted via data streams in broadcast or other signal carrying media, and / or stored in the memory of a computing device operating according to the program instructions. Here, one embodiment according to this application includes a... Figure 17 The computing device shown preferably includes a control board and at least one computing board connected to the control board. The control board is equipped with a processor, and the computing board is equipped with a plurality of computing chips for computation, each computing chip having a plurality of cores. The device includes a storage medium for storing computer program instructions and a processor for executing the program instructions. When the computer program instructions are executed by the processor, the computing device is triggered to execute the methods and / or technical solutions based on the foregoing embodiments.

[0498] It should be noted that this application can be implemented in software and / or a combination of software and hardware, for example, using an application-specific integrated circuit (ASIC), a general-purpose computer, or any other similar hardware device. In one embodiment, the software program of this application can be executed by a processor to implement the steps or functions described above. Similarly, the software program of this application (including related data structures) can be stored in a computer-readable recording medium, such as RAM memory, magnetic or optical drives, floppy disks, and similar devices. Furthermore, some steps or functions of this application can be implemented in hardware, for example, as circuitry that works with a processor to perform the various steps or functions.

[0499] The method according to the invention can be implemented on a computer as a computer-implemented method, or in dedicated hardware, or a combination of both. Executable code or portions thereof for the method according to the invention can be stored on a computer program product. Examples of computer program products include memory devices, optical storage devices, integrated circuits, servers, online software, etc. Preferably, the computer program product includes non-transitory program code components stored on a computer-readable medium so as to execute the method according to the invention when the program product is executed on a computer.

[0500] In a preferred embodiment, the computer program includes computer program code components adapted to perform all the steps of the method according to the invention when the computer program is run on a computer. Preferably, the computer program is embodied on a computer-readable medium.

[0501] In summary, this invention automatically adjusts the frequency of the cores in a computing chip. First, multiple suitable operating frequencies are set, and the multiple cores in the computing chip operate at different frequencies. Then, based on the computing performance indicators of each core at its current operating frequency, the current operating frequency of the core is adjusted upwards or downwards—that is, the frequency of cores with high computing performance is increased, and the frequency of cores with low computing performance is decreased. Therefore, this invention can automatically adjust the frequency of each core according to its actual computing performance, thereby maximizing the computing performance of the cores and improving the computing performance of the computing chip and the overall computing device.

[0502] Of course, the present invention may have other various embodiments. Without departing from the spirit and essence of the present invention, those skilled in the art can make various corresponding changes and modifications according to the present invention, but these corresponding changes and modifications should all fall within the protection scope of the appended claims.

Claims

1. A chip frequency modulation method for a computing device, wherein the computing device is provided with at least one arithmetic chip, and the arithmetic chip is provided with multiple cores, characterized in that, The steps include: The computing device sets multiple operating frequency points for the computing chip, and the multiple cores in the computing chip work at each of the operating frequency points respectively, and the multiple cores are evenly distributed, unevenly distributed or randomly distributed on the operating frequency points according to a predetermined rule; Analyze the computational performance metrics of each core at the current operating frequency; Based on the kernel's computational performance metrics, adjusting the kernel's current operating frequency by increasing or decreasing it includes: The current distribution of the frequency-modulated kernel at each operating frequency point is statistically analyzed. Based on the current distribution state of the kernel and the predetermined frequency adjustment mechanism, the frequency of the working frequency is adjusted and set, wherein the frequency adjustment mechanism is the correspondence between the kernel distribution state and the frequency adjustment. Wherein, if more than a predetermined second ratio of the cores operates at at least one high-frequency operating point, the at least one operating frequency point is modified to at least one optimized high-frequency operating point, the frequency of the optimized high-frequency operating point being higher than the frequency of the highest operating frequency point; and / or If the kernel operates at at least one low-frequency operating point for more than a predetermined third ratio, the at least one operating frequency point is modified to at least one optimized low-frequency operating point, the frequency of the optimized low-frequency operating point being lower than the frequency of the lowest operating frequency point.

2. The chip frequency modulation method according to claim 1, characterized in that, The operating frequency points include at least one high-frequency operating frequency point, at least one intermediate operating frequency point, and at least one low-frequency operating frequency point, wherein the highest frequency among the high-frequency operating frequency points is the highest operating frequency point, and the lowest frequency among the low-frequency operating frequency points is the lowest operating frequency point.

3. The chip frequency modulation method according to claim 2, characterized in that, The step of adjusting the current operating frequency of the kernel based on the kernel's computational performance metrics includes: Based on the computational performance metrics of the kernel, the number of kernels operating at the intermediate operating frequency is greater than the number of kernels operating at the low operating frequency and / or the number of kernels operating at the high operating frequency.

4. The chip frequency modulation method according to claim 1, characterized in that, The step of adjusting the frequency of the operating frequency point according to the current distribution state of the kernel and the predetermined frequency point adjustment mechanism further includes: Based on the current distribution state of the kernel and a predetermined frequency adjustment mechanism, at least a portion of the current distribution state is moved in its coordinate system.

5. The chip frequency modulation method according to claim 4, characterized in that, The step of adjusting the frequency of the operating frequency point according to the current distribution state of the kernel and the predetermined frequency point adjustment mechanism further includes: Based on the current distribution state of the kernel and the predetermined frequency adjustment mechanism, the distribution map of the current distribution state is shifted to the left or right in its coordinate system.

6. The chip frequency modulation method according to claim 1, characterized in that, The step of modifying at least one of the operating frequencies to at least one optimized high-frequency operating frequency if the kernel operates at more than the second ratio further includes: If the kernel operates at the highest operating frequency point exceeding the second ratio, modify one of the operating frequencies point to an optimized high-frequency operating frequency point; and / or The step of modifying at least one of the operating frequencies to at least one optimized low-frequency operating frequency if the kernel operates at at least one of the predetermined third ratios further includes: If more than the third ratio of the kernels are operating at the lowest operating frequency, then one of the operating frequencies is modified to an optimized low-frequency operating frequency.

7. The chip frequency modulation method according to claim 1, characterized in that, The step of adjusting the frequency of the operating frequency point according to the current distribution state and the frequency point adjustment mechanism further includes: If the number of cores operating at at least one of the aforementioned high-frequency operating points is the largest, then at least one of the aforementioned operating frequencies is modified to at least one optimized high-frequency operating frequency, wherein the frequency of the optimized high-frequency operating frequency is higher than the frequency of the highest operating frequency; and / or If the number of cores operating at at least one of the low-frequency operating points is the largest, then at least one of the operating points is modified to at least one optimized low-frequency operating point, the frequency of which is lower than the frequency of the lowest operating point.

8. The chip frequency modulation method according to claim 7, characterized in that, If the number of cores operating at at least one of the high-frequency operating points is the largest, the step of modifying at least one of the operating frequencies to at least one of the optimized high-frequency operating points further includes: If the number of cores operating at the highest operating frequency is the largest, then one of the operating frequencies is modified to become one of the optimized high-frequency operating frequencies; and / or If the number of cores operating at at least one of the low-frequency operating points is the largest, the step of modifying at least one of the operating frequencies to at least one of the optimized low-frequency operating points further includes: If the number of kernels operating at the lowest operating frequency is the largest, then one of the operating frequencies is modified to become an optimized low-frequency operating frequency.

9. The chip frequency modulation method according to claim 2, characterized in that, The step of adjusting the frequency of the operating frequency point according to the current distribution state and the frequency point adjustment mechanism further includes: If the kernel operates at at least one of the intermediate operating frequencies exceeding the predetermined fourth ratio, stop adjusting the frequency setting of the operating frequency; or If the number of cores operating at at least one of the intermediate operating frequencies is the highest, stop adjusting the frequency setting of the operating frequency.

10. The chip frequency modulation method according to claim 1, characterized in that, The step of analyzing the computational performance metrics of each of the cores at the current operating frequency also includes: Within a predetermined adjustment period, analyze whether the computational performance indicators of the kernel have reached a predetermined first indicator threshold, a second indicator threshold, and / or a third indicator threshold. The step of adjusting the current operating frequency of the kernel based on the kernel's computing performance metrics further includes: If the computing performance index of the kernel reaches the first index threshold, the current operating frequency of the kernel will be increased. If the kernel's computational performance metric does not reach the second metric threshold, the kernel's current operating frequency will be lowered; and / or If the computing performance index of the kernel reaches the third index threshold, the current operating frequency of the kernel will be reduced.

11. The chip frequency modulation method according to claim 10, characterized in that, The steps also include: If the core operating at at least one predetermined optimized operating frequency exceeds a predetermined first ratio, frequency tuning of the core is stopped; or If the number of kernels operating at at least one of the optimized operating frequencies is the largest, then frequency tuning of the kernels is stopped.

12. The chip frequency modulation method according to claim 10, characterized in that, The step of analyzing the computational performance metrics of each of the cores at the current operating frequency also includes: Within a predetermined adjustment period, analyze whether the computational accuracy of the kernel reaches a predetermined first accuracy threshold and / or a predetermined second accuracy threshold; The step of adjusting the current operating frequency of the kernel based on the kernel's computing performance metrics further includes: If the computational accuracy of the kernel reaches the first accuracy threshold, the current operating frequency of the kernel is increased; and / or If the calculation accuracy of the kernel does not reach the second accuracy threshold, the current operating frequency of the kernel will be lowered.

13. The chip frequency modulation method according to claim 12, characterized in that, The step of analyzing whether the computational accuracy of the kernel reaches the first accuracy threshold and / or the second accuracy threshold within a predetermined adjustment period further includes: During the adjustment period, the correctness of the random numbers submitted by the kernel is analyzed. The number of correct random numbers and the number of incorrect random numbers submitted by the kernel during the adjustment period are counted. Based on the number of correct random numbers and the number of incorrect random numbers, the kernel calculates the random number calculation accuracy rate within the adjustment period, and determines whether the random number calculation accuracy rate reaches a predetermined first accuracy threshold and / or a second accuracy threshold. The step of adjusting the current operating frequency of the kernel based on the kernel's computing performance metrics further includes: If the accuracy of the random number calculation of the kernel reaches the first accuracy threshold, the current operating frequency of the kernel is adjusted to the previous operating frequency. If the accuracy of the random number calculation of the kernel does not reach the second accuracy threshold, the current operating frequency of the kernel will be lowered to the next operating frequency.

14. The chip frequency modulation method according to claim 12, characterized in that, The step of analyzing whether the computational accuracy of the kernel reaches the predetermined accuracy threshold within the predetermined adjustment period further includes: According to the preset real-time adjustment instructions, the calculation accuracy of the kernel within the adjustment period is analyzed in real time to see whether it reaches the first accuracy threshold and the second accuracy threshold. According to a preset timed adjustment instruction, within the adjustment time period set by the timed adjustment instruction, it is analyzed whether the calculation accuracy of the kernel within the adjustment period reaches the first accuracy threshold and the second accuracy threshold; or Based on the received real-time adjustment instructions, analyze whether the calculation accuracy of the kernel within the adjustment period reaches the first accuracy threshold and the second accuracy threshold; The step of adjusting the current operating frequency of the kernel based on the kernel's computing performance metrics further includes: If the calculation accuracy of the kernel within the adjustment period reaches the first accuracy threshold, the current operating frequency of the kernel is adjusted up to the previous operating frequency in real time; if the calculation accuracy of the kernel within the adjustment period does not reach the second accuracy threshold, the current operating frequency of the kernel is adjusted down to the next operating frequency in real time. During the adjustment period, if the kernel's computational accuracy reaches the first accuracy threshold within the adjustment period, the kernel's current operating frequency is increased to the previous operating frequency; if the kernel's computational accuracy does not reach the second accuracy threshold within the adjustment period, the kernel's current operating frequency is decreased to the next operating frequency; or According to the received real-time adjustment instruction, if the calculation accuracy of the kernel within the adjustment period reaches the first accuracy threshold, the current operating frequency of the kernel is increased to the previous operating frequency; if the calculation accuracy of the kernel within the adjustment period does not reach the second accuracy threshold, the current operating frequency of the kernel is decreased to the next operating frequency; according to the received stop adjustment instruction, the adjustment of the current operating frequency of the kernel is stopped.

15. The chip frequency modulation method according to claim 1, characterized in that, The steps include: The frequency setting step involves setting multiple operating frequency points for the computing chip of the computing device. The computational performance analysis steps analyze whether each calculation of the kernel at the current operating frequency is correct. For each correct calculation by the kernel, a predetermined correct calculation weight value is increased by one, and for each incorrect calculation by the kernel, a predetermined incorrect calculation weight value is decreased by one. In the frequency adjustment step, if the current value of the kernel reaches a predetermined calculated correct threshold, the current operating frequency of the kernel is increased. Alternatively, if the current value of the kernel reaches a predetermined calculation error threshold, the current operating frequency of the kernel will be lowered.

16. The chip frequency modulation method according to claim 15, characterized in that, It also includes reference node values, and the computational performance analysis step further includes: The correctly calculated weight value is increased once to the reference node value, and the incorrectly calculated weight value is decreased once to the reference node value.

17. The chip frequency modulation method according to claim 16, characterized in that, The method further includes: Determine whether the current reference node value of the kernel has reached the correct calculation threshold or the incorrect calculation threshold; The frequency adjustment step further includes: If the current reference node value of the kernel reaches the calculated correct threshold, the current operating frequency of the kernel will be increased. If the current reference node value of the kernel reaches the calculation error threshold, the current operating frequency of the kernel will be lowered.

18. The chip frequency modulation method according to claim 17, characterized in that, The method further includes: The kernel's expected tolerance for resident error rate is controlled by adjusting the ratio of the correctly calculated weight value to the incorrectly calculated weight value.

19. The chip frequency modulation method according to claim 17, characterized in that, The method further includes: The adjustment period is controlled by adjusting the absolute values ​​of the correctly calculated weight value and the incorrectly calculated weight value.

20. The chip frequency modulation method according to claim 19, characterized in that, The method further includes: The adjustment period is controlled by adjusting the absolute values ​​of the correct calculation threshold and the incorrect calculation threshold.

21. The chip frequency modulation method according to claim 18, characterized in that, The formula for calculating the dwell error rate is: Dwell Error Rate = Correct Calculation Weight Value / (Correct Calculation Weight Value + Incorrect Calculation Weight Value).

22. The chip frequency modulation method according to claim 17, characterized in that, The step of analyzing whether the kernel's calculations at the current operating frequency are correct also includes: Analyze whether the random numbers submitted by the kernel each time are correct; The step of adding the correct calculation weight value to the reference node value once for each correct calculation by the kernel at least once, and adding the incorrect calculation weight value to the reference node value once for each incorrect calculation by the kernel at least once, further includes: For each correct random number submitted by the kernel, the calculated correct weight value is increased by one to the reference node value; for each incorrect random number submitted by the kernel, the calculated incorrect weight value is decreased by one to the reference node value.

23. The chip frequency modulation method according to claim 13 or 22, characterized in that, The step of analyzing whether the random number submitted by the kernel each time is correct also includes: After the kernel submits a random number, the kernel calculates a first result from the random number using a predetermined algorithm, and the first result contains a first feature; The verification unit of the computing chip calculates a second result from the random number using the same algorithm, and the second result contains a second feature; If the first feature is the same as the second feature, the verification unit determines that the random number is a correct random number; otherwise, it determines that the random number is an incorrect random number.

24. The chip frequency modulation method according to claim 17, characterized in that, The step of determining whether the current reference node value of the kernel reaches the correct calculation threshold or the incorrect calculation threshold further includes: According to the preset real-time adjustment instructions, it is determined in real time whether the current reference node value of the kernel has reached the calculated correct threshold or the calculated incorrect threshold; According to a preset timed adjustment instruction, within the adjustment time period set by the timed adjustment instruction, it is determined whether the current reference node value of the kernel has reached the correct calculation threshold or the incorrect calculation threshold; or Based on the received real-time adjustment instructions, analyze whether the current reference node of the kernel has reached the correct calculation threshold or the incorrect calculation threshold; The step of adjusting the current operating frequency of the kernel based on the kernel's computational performance metrics further includes: If the current reference node value of the kernel reaches the calculation correct threshold, the current operating frequency of the kernel is adjusted up to the previous operating frequency in real time; if the current reference node value of the kernel reaches the calculation error threshold, the current operating frequency of the kernel is adjusted down to the next operating frequency in real time. During the adjustment period, if the current reference node value of the kernel reaches the correct calculation threshold, the current operating frequency of the kernel is increased to the previous operating frequency; if the current reference node value of the kernel reaches the incorrect calculation threshold, the current operating frequency of the kernel is decreased to the next operating frequency; or According to the received real-time adjustment instruction, if the current reference node value of the kernel reaches the calculation correctness threshold, the current operating frequency of the kernel is increased to the previous operating frequency; if the current reference node value of the kernel reaches the calculation error threshold, the current operating frequency of the kernel is decreased to the next operating frequency; according to the received stop adjustment instruction, the adjustment of the current operating frequency of the kernel is stopped.

25. The chip frequency modulation method according to claim 1, characterized in that, The multiple cores in the computing chip operate at their respective operating frequencies, and the number of operating frequencies and the frequency differences between the multiple operating frequencies are adjustable.

26. The chip frequency modulation method according to claim 1, characterized in that, The step of setting multiple operating frequency points for the computing chip of the computing device and having multiple cores in the computing chip operate at each of the operating frequency points further includes: Multiple operating frequencies are set for the computing chip through multiple phase-locked loop circuits, and the operating frequencies are in a one-to-one correspondence with the phase-locked loop circuits. The step of adjusting the current operating frequency of the kernel based on the kernel's computing performance metrics further includes: Based on the computational performance metrics of the kernel, the current operating frequency of the kernel is adjusted up or down via the phase-locked loop circuit.

27. The chip frequency modulation method according to claim 26, characterized in that, The phase-locked loop circuit is located inside or outside the computing chip.

28. The chip frequency modulation method according to claim 1, characterized in that, The frequency difference between adjacent operating frequency points is 1~10%.

29. A chip frequency modulation device for a computing device, based on the chip frequency modulation method according to any one of claims 1 to 28, wherein the computing device is provided with at least one arithmetic chip, and the arithmetic chip is provided with multiple cores, characterized in that, The chip frequency modulation device includes: The frequency setting module is used to set multiple working frequency points for the computing chip of the computing device, and to make multiple cores in the computing chip work at each of the working frequency points respectively, and the multiple cores are evenly distributed, unevenly distributed or randomly distributed on the working frequency points according to a predetermined rule. The computational performance analysis module is used to analyze the computational performance metrics of each core at the current operating frequency. A frequency adjustment module, used to adjust the current operating frequency of the kernel upwards or downwards according to the kernel's computing performance metrics, includes: The frequency point statistics module is used to count the current distribution status of the kernel at each of the operating frequencies after frequency modulation; The frequency adjustment module is used to adjust the frequency of the operating frequency point according to the current distribution state of the kernel and a predetermined frequency adjustment mechanism, wherein the frequency adjustment mechanism is the correspondence between the kernel distribution state and the frequency adjustment. The frequency adjustment module further includes: A first frequency adjustment submodule is configured to, if the kernel operates at at least one of the high-frequency operating points exceeding a predetermined second ratio, modify at least one of the operating frequencies to at least one optimized high-frequency operating point, wherein the frequency of the optimized high-frequency operating point is higher than the frequency of the highest operating frequency; and / or The second frequency adjustment submodule is used to modify at least one of the operating frequencies to at least one optimized low-frequency operating frequency if the kernel operates at at least one of the low-frequency operating frequencies exceeding a predetermined third ratio. The frequency of the optimized low-frequency operating frequency is lower than the frequency of the lowest operating frequency.

30. The chip frequency modulation device according to claim 29, characterized in that, The operating frequency points include at least one high-frequency operating frequency point, at least one intermediate operating frequency point, and at least one low-frequency operating frequency point. The highest frequency among the high-frequency operating frequency points is the highest operating frequency point, and the lowest frequency among the low-frequency operating frequency points is the lowest operating frequency point.

31. The chip frequency modulation device according to claim 30, characterized in that, Based on the computational performance metrics of the kernel, the number of kernels operating at the intermediate operating frequency is greater than the number of kernels operating at the low operating frequency and / or the number of kernels operating at the high operating frequency.

32. The chip frequency modulation device according to claim 29, characterized in that, Multiple kernels are distributed evenly, unevenly, or randomly at the operating frequency points according to predetermined rules.

33. The chip frequency modulation device according to claim 32, characterized in that, The step of adjusting the frequency of the operating frequency point according to the current distribution state of the kernel and the predetermined frequency point adjustment mechanism includes: Based on the current distribution state of the kernel and a predetermined frequency adjustment mechanism, at least a portion of the current distribution state is moved in its coordinate system.

34. The chip frequency modulation device according to claim 33, characterized in that, The step of adjusting the frequency of the operating frequency point according to the current distribution state of the kernel and the predetermined frequency point adjustment mechanism includes: Based on the current distribution state of the kernel and the predetermined frequency adjustment mechanism, the distribution map of the current distribution state is shifted to the left or right in its coordinate system.

35. The chip frequency modulation device according to claim 29, characterized in that, The frequency adjustment module also includes: The third frequency adjustment submodule is configured to, if the number of cores operating at at least one of the aforementioned high-frequency operating points is the largest, modify at least one of the operating frequencies to at least one optimized high-frequency operating point, wherein the frequency of the optimized high-frequency operating point is higher than the frequency of the highest operating frequency; and / or The fourth frequency adjustment submodule is used to modify at least one of the operating frequencies to at least one optimized low-frequency operating frequency if the number of the cores operating at at least one of the low-frequency operating frequencies is the largest. The frequency of the optimized low-frequency operating frequency is lower than the frequency of the lowest operating frequency.

36. The chip frequency modulation device according to claim 29, characterized in that, The computing performance analysis module is used to analyze whether the computing performance indicators of the kernel have reached a predetermined first indicator threshold, a second indicator threshold, and / or a third indicator threshold within a predetermined adjustment period. The frequency adjustment module is used to increase the current operating frequency of the kernel if the computing performance index of the kernel reaches the first index threshold. The frequency adjustment module is used to lower the current operating frequency of the kernel if the computing performance index of the kernel does not reach the second index threshold. and / or The frequency adjustment module is used to lower the current operating frequency of the kernel if the kernel's computing performance index reaches the third index threshold.

37. The chip frequency modulation device according to claim 29, characterized in that, The computational performance analysis module is used to analyze whether the computational accuracy of the kernel reaches a predetermined first accuracy threshold and / or a predetermined second accuracy threshold within a predetermined adjustment period. The frequency adjustment module is used to increase the current operating frequency of the kernel if the calculation accuracy of the kernel reaches the first accuracy threshold; and / or to decrease the current operating frequency of the kernel if the calculation accuracy of the kernel does not reach the second accuracy threshold.

38. The chip frequency modulation device according to claim 29, characterized in that, The computational performance analysis module is also used to analyze whether the kernel's calculations at the current operating frequency are correct. For each correct calculation by the kernel, a predetermined correct calculation weight value is added, and for each incorrect calculation by the kernel, a predetermined incorrect calculation weight value is reduced. The frequency adjustment module is used to increase the current operating frequency of the kernel if the current value of the kernel reaches a predetermined calculated correct threshold. Alternatively, if the current value of the kernel reaches a predetermined calculation error threshold, the current operating frequency of the kernel will be lowered.

39. A computing board comprising the chip frequency modulation device according to any one of claims 29 to 38.

40. A computing device comprising the chip frequency modulation device according to any one of claims 29 to 38.

41. A storage medium for storing a computer program for executing a chip frequency modulation method of any one of the computing devices of claims 1 to 28.

Images