Game machine

Abstract

To provide a game machine capable of increasing a player's interest in a game.SOLUTION: Movable means is made movable at a first position and a second position different from the first position by being electrically driven, the movable means is moved on the basis of operation means that can be operated by a player by second driving means for electrically driving the movable body that can be contacted with the movable means, and it is possible for the moving body and the movable means whose movement is started by driving first driving means are contacted with each other at a first contact position and a second contact position different from the first contact position. The movable means is formed with an inclined surface capable of being contacted with the moving body, and the contact surface that is contacted with the moving body of the movable means is formed with the inclined surface. As a result, the amount of movement of the movable means can be changed depending on the contact position, thereby increasing interest in the performance using the movable means.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a gaming machine such as a pachinko machine. [Background technology]

[0002] Conventionally, gaming machines such as pachinko machines have been proposed to have movable means that can be moved when the driving means is driven, and to movable the movable means as a form of production. [Prior Art Documents] [Patent Document]

[0003] [Patent Document 1] Japanese Unexamined Patent Publication No. 2014-132937 Summary of the invention [Problems to be solved by the invention]

[0004] However, there was a need for further improvement in the interest.

[0005] The present invention has been made to solve the above-mentioned problems and the like, and an object of the present invention is to provide a gaming machine that can improve the interest of players in playing. Means for solving the problem

[0006] To achieve this object, the gaming machine according to claim 1 has a first driving means that is electrically driven, a movable movable means that can be moved to a first position when the first driving means is driven, a second driving means that is different from the first position, an electrically driven driving means that allows the movable body that can abut the movable means, and an operation means that the player can operate, and a driving control means that allows the second driving means that can be driven based on the operation of the operation means, and the movable means that is formed in the movable means that can abut the movable body, and the movable unit is configured such that when the predetermined position of the movable body and the inclined surface abut the inclined surface, the movable unit is configured so that the amount of movable the movable unit from the first position is varied depending on the position of the inclined surface that the movable unit is brought into contact with.

[0007] The gaming machine according to claim 2 is the gaming machine according to claim 1, in which the movable means can be movable while the movable body is in contact with the inclined surface.

[0008] The gaming machine according to claim 3 has the gaming machine according to claim 1 or 2, which is capable of suggesting a suggestion mode for indicating that the movable means is movable, and by operating the operating means based on the suggestion mode, the movable means and the movable body are easily brought into contact with each other. [Effects of the invention]

[0009] According to the gaming machine according to claim 1, there is provided a first driving means that is electrically driven, a movable movable means that can be moved to a first position when the first driving means is driven, a second driving means that is electrically driven so that a movable body that can abut the movable means, and a driving control means that can be operated by the player, allowing the second driving means that can be driven based on the operation of the operating means, and the movable means that can drive the second driving means based on the operation of the operating means, and the movable means that is formed with an inclined surface that can abut the movable body, and the gaming machine is configured such that when the predetermined position of the movable body and the inclined surface abut the inclined surface, the amount of movable the movable means that has been moved from the first position is variable depending on the position of the inclined surface that the movable body abuts.

[0010] Therefore, the fun of the game can be improved.

[0011] According to the gaming machine according to claim 2, in addition to the effects produced by the gaming machine according to claim 1, the following effects are achieved. That is, the movable means is made movable while the movable body is in contact with the inclined surface.

[0012] Therefore, since the movable means is movable while abutting the inclined surface, the period before the abutting state is released can be varied depending on the position of the inclined surface that is in contact with it, and the period when the movable means is restricted by the movable body can be varied, thereby improving the enjoyment of the game.

[0013] According to the gaming machine according to claim 3, in addition to the effects produced by the gaming machine according to claim 1 or 2, the following effects are obtained. That is, it includes a suggestion means that can suggest an indication manner for indicating that the movable means is movable, and by operating the operating means based on the suggestion mode, the movable means and the movable body are easily brought into contact with each other.

[0014] Therefore, by operating the operating means according to the suggested mode, the movable means and the mobile body can easily contact each other, which has the effect of making the player expect that the suggested mode is suggested, and the fun of the game can be improved. [Brief description of the drawing]

[0015] [Figure 1] 1 is a front view of a pachinko machine in the first control example. [Figure 2] 1 is a front view of a pachinko machine game board. [Figure 3] 1 is a rear view of a pachinko machine in the first control example. [Figure 4] 1 is a front view of the gaming board of the pachinko machine in the first control example. [Figure 5] 10A is a schematic diagram showing a structure of a variable winning unit provided in the area under the front view of the game board of a pachinko machine in the first control example, and (b) is a schematic diagram showing a flow path of a ball that has been won in the variable winning unit in the first control example. [Figure 6] 10A is a diagram schematically showing area division settings and effective line settings of the display screen in the first control example, and (b) is a diagram illustrating an example of an actual display screen in the first control example. [Figure 7] 10A is a diagram showing an example of a display mode when the reach is established in the normal state displayed on the third pattern display device in the first control example, and (b) shows an example of a display mode during which normal pattern changes are executed in the normal state displayed on the third pattern display device in the first control example. [Figure 8] 10A is a diagram showing an example of a display mode in which a game of a popular game (a game of a game of long open) is performed during the normal state displayed on the third pattern display device in the first control example, and (b) shows an example of a display mode in which a chance zone is set during the normal state displayed on the third pattern display device in the first control example. [Figure 9] 10.

[0021] FIG. 10 (a) is a diagram showing an example of a display mode in which the third pattern is temporarily stopped during the special change effect displayed on the third pattern display device in the first control example, and (b) is a diagram showing an example of a display mode in which the third pattern is restarted in the special change effect executed when the special change effect displayed on the third pattern display device in the first control example is acquired while the special change effect displayed on the third pattern display device is acquired. [Figure 10] 10 is a diagram showing an example of a display mode when the third pattern is restarted in a special variation effect executed when the special chart 2 pending ball displayed on the third pattern display device in the first control example is not acquired. [Figure 11] 1. (a) is a diagram showing an example of the display mode for the first half period of the ending period of a regular jackpot game displayed on the third pattern display device in the first control example, and (b) is a diagram showing an example of the display mode for the first half period of the ending period of a special jackpot game displayed on the third pattern display device in the first control example, and (c) is a diagram showing an example of the display mode for the second half period of the ending period of a regular jackpot game displayed on the third pattern display device in the first control example, and (d) is a diagram showing an example of the display mode for the second half period of the ending period of a special jackpot game displayed on the third pattern display device in the first control example. [Figure 12] 6A and 6B are diagrams showing an example of a display mode of a game state suggestion performance executed during the chance mode displayed on the third pattern display device in the first control example. [Figure 13] 10.sub.1 (a) is a diagram showing an example of a display mode in which the chance mode is set as the performance mode displayed on the third pattern display device in the first control example, and the normal state is set internally, and the display mode is displayed during a period other than the high-speed fluctuation period (during the normal fluctuation period), and (b) is a diagram showing an example of a display mode in which the chance mode is set as the performance mode displayed on the third pattern display device in the first control example, and the normal state is set internally, and the frame button is operated during a period other than the high-speed fluctuation period (during the normal fluctuation period). [Figure 14] 10A and 10B are diagrams showing an example of the display modes of operational performance during the high-speed fluctuation period among the chance modes displayed on the third pattern display device in the first control example, and (b) shows an example of the display modes when a frame button is operated during the high-speed fluctuation period among the chance modes displayed on the third pattern display device in the first control example. [Figure 15]10. (a) is a diagram showing an example of a display mode in which the first special pattern change is performed during the "Super Chance Mode" displayed on the third pattern display device in the first control example, and (b) is a diagram showing an example of a display mode in which the second special pattern change is performed during the "Super Chance Mode" displayed on the third pattern display device in the first control example. [Figure 16] 10 is a timing chart showing the flow of the performance when a fluctuation pattern in which a non-reach variation effect is set as a variation effect for the third pattern in the first control example, and (b) shows the flow of the performance when a fluctuation pattern in which a reach variation effect is set as a variation effect for the third pattern in the first control example. [Figure 17] (a) is a timing chart showing the flow of the performance during the ending period for a normal jackpot in the first control example, (b) is a timing chart showing the flow of the performance during the ending period for a special jackpot in the first control example, and (c) is a timing chart showing the flow of the performance during the ending period for a special jackpot in the first control example, and (c) is a timing chart showing the flow of the performance when the ball does not flow down the specific area (V gate) during the special jackpot game in the first control example. [Figure 18] (a) and (b) are timing charts showing the flow of the performance mode set after the jackpot game is completed in the first control example. [Figure 19] 6A and 6B are timing charts showing the flow of the operational performance in the chance mode in the first control example. [Figure 20] 14 is a diagram showing a game flow of a pachinko machine in the first control example. [Figure 21] 1 is a block diagram showing the electrical configuration of a pachinko machine in the first control example. [Figure 22] 1 is a diagram schematically showing the structure of various counters in the first control example. [Figure 23] 10 is a block diagram showing the configuration of the ROM of the main control device in the first control example, and (b) shows the configuration of the RAM of the main control device in the first control example. [Figure 24] 1A and 1B are diagrams schematically showing the specified contents of the first random number table set in the ROM of the main control device in the first control example, and (b) schematically shows the specified contents of the second random number table set in the ROM of the main control device in the first control example. [Figure 25] 1. (a) is a block diagram showing the configuration of the jackpot type selection table set in the ROM of the main control device in the first control example, and (b) is a diagram schematically showing the specified contents of the special chart 1 jackpot table set in the ROM of the main control device in the first control example, and (c) is a diagram schematically showing the specified contents of the special chart 2 jackpot table set in the ROM of the main control device in the first control example. [Figure 26] 10 is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the main control device in the first control example, and (b) is a diagram schematically showing the specified contents of the normal table set in the ROM of the main control device in the first control example. [Figure 27] 14 is a diagram schematically showing the specified contents of the special-mode and time-saving table set in the ROM of the main control device in the first control example. [Figure 28] 10 is a block diagram showing the configuration of the ROM of the audio lamp control device in the first control example, and (b) shows the configuration of the RAM of the audio lamp control device in the first control example. [Figure 29] 10 is a diagram schematically showing the specified contents of the normal special diagram 2 performance selection table set in the ROM of the audio lamp control device in the first control example. [Figure 30] 14 is a diagram schematically showing the specified contents of the special-speed performance selection table set in the ROM of the audio lamp control device in the first control example. [Figure 31] 10A is a diagram schematically showing the specified contents of the continuous preview execution selection table set in the ROM of the audio lamp control device in the first control example, and (b) is a diagram schematically showing the specified contents of the V notification execution selection table set in the ROM of the audio lamp control device in the first control example. [Figure 32] 10 is a block diagram showing the configuration of a button operation performance selection table set in the ROM of the audio lamp control device in the first control example, and (b) is a diagram schematically showing the specified contents of the time-saving state selection table set in the ROM of the audio lamp control device in the first control example. [Figure 33] 14 is a diagram schematically showing the specified contents of the special mode state selection table set in the ROM of the audio lamp control device in the first control example. [Figure 34] 1 is a block diagram showing the electrical configuration of a display control device in the first control example. [Figure 35] 6A to 6C are explanatory diagrams for explaining images at the time of power-on in the first control example. [Figure 36] 10A is an explanatory diagram for explaining the back surface A in the first control example, and 10B is an explanatory diagram for explaining the back surfaces B to D in the first control example. [Figure 37] 1 is a diagram schematically showing an example of a display data table in the first control example. [Figure 38] 1 is a diagram schematically showing an example of a transfer data table in the first control example. [Figure 39] 14 is a diagram schematically showing an example of a drawing list in the first control example. [Figure 40] 10 is a flow chart showing timer interrupt processing executed by the MPU in the main control device in the first control example. [Figure 41] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the first control example. [Figure 42] 10 is a flow chart showing a special pattern jackpot determination process executed by the MPU within the main control device in the first control example. [Figure 43] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the first control example. [Figure 44] 10 is a flow chart showing update processing executed by the MPU in the main control device in the first control example. [Figure 45] 10 is a flow chart showing a start-up winning process executed by an MPU within the main control device in the first control example. [Figure 46] 10 is a flow chart showing a preliminary process executed by an MPU within the main control device in the first control example. [Figure 47] 10 is a flow chart showing normal pattern variation processing executed by the MPU within the main control device in the first control example. [Figure 48] 10 is a flow chart showing a process of passing through a through gate executed by an MPU within the main control device in the first control example. [Figure 49] 10 is a flow chart showing NMI interrupt processing executed by the MPU in the main control device in the first control example. [Figure 50] 10 is a flow chart showing the startup process executed by the MPU in the main control device in the first control example. [Figure 51] 10 is a flow chart showing main processing executed by the MPU within the main control device in the first control example. [Figure 52] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the first control example. [Figure 53] 10 is a flow chart showing a jackpot operation setting process executed by an MPU within the main control device in the first control example. [Figure 54] 10 is a flow chart showing the jackpot termination process executed by the MPU in the main control device in the first control example. [Figure 55] 10 is a flow chart showing the winning process executed by the MPU in the main control device in the first control example. [Figure 56] 10 is a flow chart showing abnormality processing executed by the MPU in the main control device in the first control example. [Figure 57] 10 is a flow chart showing the startup process executed by the MPU in the audio lamp control device in the first control example. [Figure 58] 10 is a flow chart showing the main processing executed by the MPU in the audio lamp control device in the first control example. [Figure 59] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the first control example. [Figure 60] 10 is a flow chart showing a state command reception process executed by the MPU in the audio lamp control device in the first control example. [Figure 61] 10 is a flow chart showing winning command processing executed by the MPU in the audio lamp control device in the first control example. [Figure 62] 10 is a flow chart showing a special chart winning information command process executed by the MPU in the audio lamp control device in the first control example. [Figure 63] 10 is a flow chart showing general-scale diagram-related processes executed by the MPU in the audio lamp control device in the first control example. [Figure 64] 10 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the first control example. [Figure 65] 10 is a flow chart showing ending processes executed by the MPU in the audio lamp control device in the first control example. [Figure 66] 10 is a flow chart showing variation display setting processing executed by the MPU in the audio lamp control device in the first control example. [Figure 67] 10 is a flow chart showing a special diagram 1 performance mode setting process executed by the MPU in the audio lamp control device in the first control example. [Figure 68] 10 is a flow chart showing a special diagram 2 performance mode setting process executed by the MPU in the audio lamp control device in the first control example. [Figure 69] 10 is a flow chart showing the performance setting process in chance mode executed by the MPU in the audio lamp control device in the first control example. [Figure 70] 10 is a flow chart showing frame button input monitoring and performance processing executed by the MPU in the audio lamp control device in the first control example. [Figure 71] 10 is a flow chart showing the main processing executed by the MPU in the display control device in the first control example. [Figure 72] 10 is a flow chart showing a boot process executed by an MPU in the display control device in the first control example. [Figure 73] 10 is a flow chart showing the command interruption process executed by the MPU in the display control device in the first control example, and (b) shows the V interruption process executed by the MPU in the display control device in the first control example. [Figure 74] 10 is a flow chart showing command determination processing executed by the MPU in the display control device in the first control example. [Figure 75] 10 is a flow chart showing the variation pattern command processing executed by the MPU in the display control device in the first control example, and (b) shows the suspension type command processing executed by the MPU in the display control device in the first control example. [Figure 76] 10 is a flow chart showing the opening command processing executed by the MPU in the display control device in the first control example, and (b) shows the round number command processing executed by the MPU in the display control device in the first control example. [Figure 77] 10 is a flow chart showing ending command processing executed by the MPU in the display control device in the first control example. [Figure 78] 10 is a flow chart showing the fluctuation stop command processing executed by the MPU in the display control device in the first control example, and (b) shows the notification command processing executed by the MPU in the display control device in the first control example. [Figure 79] 10 is a flow chart showing the back image change command processing executed by the MPU in the display control device in the first control example, and (b) shows the error command processing executed by the MPU in the display control device in the first control example. [Figure 80] 10 is a flow chart showing display setting processing executed by the MPU in the display device in the first control example. [Figure 81] 10 is a flow chart showing warning image setting processing executed by the MPU in the display control device in the first control example. [Figure 82] 10 is a flow chart showing a pointer update process executed by the MPU in the display control device in the first control example. [Figure 83] 10 is a flow chart showing the transfer setting process executed by the MPU in the display control device in the first control example, and (b) shows the resident image transfer setting process executed by the MPU in the display control device in the first control example. [Figure 84] 10 is a flow chart showing normal image transfer setting processing executed by the MPU in the display control device in the first control example. [Figure 85] 10 is a flow chart showing drawing processes executed by the MPU in the display control device in the first control example. [Figure 86] 1 is a front view of the gaming board of the pachinko machine in the second control example. [Figure 87] 10A and 10B are diagrams showing an example of a display screen displayed during a jackpot game executed based on winning a jackpot in a special pattern lottery in the second control example, and (b) shows an example of a display screen displayed on the ending screen of a jackpot game in the second control example. [Figure 88] 10A and 10B are diagrams showing an example of a display screen displayed during the chance time in the second control example, and (b) shows an example of a display screen displayed during the chance time in the second control example. [Figure 89] 10A is a diagram showing an example of a display screen displayed when the pull-back zone in the second control example is started, and (b) shows an example of a display screen displayed when a time-saving winning is achieved during the pull-back zone in the second control example. [Figure 90] 10A and 10B are diagrams showing an example of a display screen during extended time, which is executed when the long time reduction in the second control example is set, and (b) shows an example of a display screen when the number of executions of special pattern variations executed during the long time reduction in the second control example reaches 9,900. [Figure 91] 10 is a diagram showing an example of a presentation screen for preparation time executed during the time-saving state in the second control example, after the end of the chance time. [Figure 92] 10A and 10B are diagrams showing the relationship between the background type displayed in the pull-back zone in the second control example and the contents shown by each background; FIG. 10B are diagrams showing the relationship between the type of suggested mode in the pull-back mode in the second control example and the contents shown by each of the suggested mode. [Figure 93] 14 is a diagram showing a game flow in the second control example. [Figure 94] 1 is a block diagram showing the electrical configuration of a pachinko machine in the second control example. [Figure 95] 1 is a diagram schematically showing the structure of various counters in the second control example. [Figure 96] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the second control example, and FIG. 10 is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the second control example. [Figure 97] 1A and 1B are diagrams that schematically show the specified contents of the first random number table set in the ROM of the main control device in the second control example, and (b) are diagrams that schematically show the specified contents of the second random number table set in the ROM of the main control device in the second control example, and (c) are diagrams that schematically show the specified contents of the time-saving random number table set in the ROM of the main control device in the second control example. [Figure 98] 1. (a) is a block diagram showing the configuration of the jackpot type selection table set in the ROM of the main control device in the second control example, (b) is a diagram schematically showing the specified contents of the special chart 1 jackpot table in the second control example, and (c) is a diagram schematically showing the specified contents of the special chart 2 jackpot table in the second control example. [Figure 99] 10A (a) is a diagram schematically showing the specified contents of the variation pattern selection table set in the ROM of the main control device in the second control example, and (b) is a diagram schematically showing the specified contents of the normal and second special change table in the second control example. [Figure 100] 1A and 1B are diagrams schematically showing the specified contents of the table for special mode and time-saving in the second control example, and (b) are diagrams schematically showing the specified contents of the table for selecting time-saving in the ROM of the main control device in the second control example. [Figure 101] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the second control example, and FIG. 10 is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the second control example. [Figure 102] 1 is a block diagram showing the configuration of a pull-back mode selection table set in the ROM of the audio lamp control device in the second control example. [Figure 103] 1 is a block diagram showing the structure of a suggestion mode selection table set in the ROM of the audio lamp control device in the second control example. [Figure 104] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the second control example. [Figure 105] 10 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the second control example. [Figure 106] 10 is a flow chart showing a time-saving lottery process executed by an MPU within the main control device in the second control example. [Figure 107] 10 is a flow chart showing a special pattern variation pattern selection process executed by the MPU within the main control device in the second control example. [Figure 108] 10 is a flow chart showing update processing executed by the MPU in the main control device in the second control example. [Figure 109] 10 is a flow chart showing time-saving setting processing executed by the MPU in the main control device in the second control example. [Figure 110] 10 is a flow chart showing the start-up winning process executed by the MPU in the main control device in the second control example. [Figure 111] 10 is a flow chart showing a preliminary process executed by an MPU within the main control device in the second control example. [Figure 112] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the second control example. [Figure 113] 10 is a flow chart showing the jackpot termination process executed by the MPU in the main control device in the second control example. [Figure 114] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the second control example. [Figure 115] 10 is a flow chart showing a state command reception process executed by the MPU in the audio lamp control device in the second control example. [Figure 116] 10 is a flow chart showing normal state performance setting processing executed by the MPU in the audio lamp control device in the second control example. [Figure 117] 10 is a flow chart showing a pull-back mode setting process executed by the MPU in the audio lamp control device in the second control example. [Figure 118] 10 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the second control example. [Figure 119] 10 is a flow chart showing a second special mode state performance setting process executed by the MPU in the audio lamp control device in the second control example. [Figure 120] 10 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the second control example. [Figure 121] 10 is a flow chart showing a special diagram 2 performance mode setting process executed by the MPU in the audio lamp control device in the second control example. [Figure 122] 10 is a flow chart showing the performance setting process during chance time executed by the MPU in the audio lamp control device in the second control example. [Figure 123] 10 is a diagram showing an example of a variation display screen when the lottery result of the Special Drawing 1 lottery is won or a time-saving win in the normal state of the first modification of the second control example, and (b) shows an example of a display screen when the lottery result of the First Special Drawing (Special Drawing 1 lottery) is won in the normal state (low probability state of special design, low probability state of ordinary design) in the first modification of the second control example. [Figure 124] 10A and 10B are diagrams showing an example of a display screen in a time-saving state when the variation time of Special Figure 1 is set to 30 seconds in the normal state in the first modification of the second control example, and (b) shows an example of a display screen in the case where the time-saving state in the first modification of the second control example is finished. [Figure 125] 10 is a diagram showing an example of a display screen when a time-saving winning is made while being held for Special Figure 2 in the first modification of the second control example. [Figure 126] 1A and 1B are diagrams schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the first modification of the second control example, and (b) is diagrams schematically showing the specified contents of the time-saving type selection table set in the ROM of the main control device in the first modification of the second control example. [Figure 127] 10 is a flow chart showing a time-saving lottery process executed by an MPU within the main control device in the first modification of the second control example. [Figure 128] 10 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the first modification of the second control example. [Figure 129] 10 is a flow chart showing a special diagram 1 performance mode setting process executed by the MPU in the audio lamp control device in the first modification of the second control example. [Figure 130] 10 is a diagram showing an example of a display screen during the chance time acquisition performance that is executed when a jackpot is awarded to a special drawing 1 lottery in a normal state in a second modification of the second control example, and (b) shows an example of a display screen during the chance time acquisition performance that is executed when a time acquisition performance that is awarded to a special drawing 1 lottery in a normal state in a second modification of the second control example. [Figure 131] 10 is a diagram showing an example of a fluctuation pattern when a jackpot is won and a time-saving winning pattern in the second modified example of the second control example. [Figure 132] 10A (a) is a diagram schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the second modification of the second control example, and (b) is a diagram schematically showing the specified contents of the jackpot table in the second modification of the second control example. [Figure 133] 14 is a diagram schematically showing the specified contents of the time-saving type selection table set in the ROM of the main control device in the second modification of the second control example. [Figure 134] 10 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the second modified example of the second control example. [Figure 135] 10A is a diagram showing an example of a display screen when time-saving A is set in the third control example, and (b) shows an example of a display screen when time-saving B is set in the third control example. [Figure 136] 10A is a diagram showing an example of a display screen in which a time-saving winning is made during the time-saving state in the third control example and the number of remaining time-saving remaining times increases; FIG. 10B is a diagram showing an example of a display screen in which a time-saving winning is made during the time-saving state in the third control example and the number of remaining time-saving remaining times decreases. [Figure 137] 14 is a diagram showing a game flow in the third control example. [Figure 138] 10A and 10B are diagrams schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the third control example, and (b) schematically shows the specified contents of the time-saving type selection table set in the ROM of the main control device in the third control example. [Figure 139] 10 is a diagram schematically showing the specified contents of the jackpot table set in the ROM of the main control device in the third control example. [Figure 140] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the third control example. [Figure 141] 10 is a flow chart showing a time-saving lottery process executed by an MPU within the main control device in the third control example. [Figure 142] 10 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the third control example. [Figure 143] 10 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the third control example. [Figure 144] 10 is a flow chart showing mode-specific performance setting processing executed by the MPU in the audio lamp control device in the third control example. [Figure 145] 10 is a flow chart showing time-saving B-time performance setting processing executed by the MPU in the audio lamp control device in the third control example. [Figure 146] 1 is a front view of the gaming board of the pachinko machine in the fourth control example. [Figure 147] 1 is a partial enlarged view of the game board of the pachinko machine in the fourth control example. [Figure 148] 1 is a front perspective view of the V winning device in the fourth control example. [Figure 149] 1 is an exploded front perspective view of the V winning device in the fourth control example. [Figure 150] 1 is an operational view of the V winning device in the fourth control example seen from the rear side. [Figure 151] 10 is a schematic view of the V-winning door of the V-winning device in the fourth control example, as seen in plan viewed in the state in which the opening / closing door is closed, and (b) is a schematic view of the V-winning device in the fourth control example, as seen in plan viewed in the state in which the V-winning device in the fourth control example, as seen in plan viewed in the state in which the V-winning device in the fourth control example, as shown in plan view. [Figure 152] 10A is a diagram showing an example of a display screen in which a time-saving lottery result suggestion performance is performed during the change in Special Figure 1 in the fourth control example, and (b) shows an example of a display screen in which a time-saving lottery result suggestion is performed during the change in Special Figure 1 in the fourth control example. [Figure 153] 10A and 10B show an example of a display screen in which time-saving non-winning is suggested during the change in Special Figure 1 in the fourth control example, and (b) shows an example of a jackpot winning notification screen in which a duplicate win is received in the fourth control example. [Figure 154] (a) is a timing chart showing an example of a notification pattern when a time-saving lottery or jackpot lottery is double-windled in the fourth control example, and (b) is a timing chart showing an example of a notification pattern when a time-saving lottery or jackpot is not win in the fourth control example, and (c) is a timing chart showing an example of a notification pattern when a time-saving lottery or jackpot is not win in the fourth control example. [Figure 155] 14 is a diagram schematically showing the structure of various counters in the fourth control example. [Figure 156] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the fourth control example, and FIG. 10 is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the fourth control example. [Figure 157]1. (a) is a block diagram showing the structure of the first random number table set in the ROM of the main control device in the fourth control example, (b) is a diagram schematically showing the specified contents of the first special symbol random number table in the fourth control example, and (c) is a diagram schematically showing the specified contents of the second special symbol random number table in the fourth control example. [Figure 158] 1. (a) is a block diagram showing the configuration of the jackpot type selection table set in the ROM of the main control device in the fourth control example, (b) is a diagram schematically showing the specified contents of the special chart 1 jackpot type selection table in the fourth control example, (c) is a diagram schematically showing the specified contents of the special chart 2 jackpot type selection table in the fourth control example, and (d) is a diagram schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the fourth control example. [Figure 159] 14 is a diagram schematically showing the specified contents of a small hit type selection table set in the ROM of the main control device in the fourth control example. [Figure 160] 10A is a diagram schematically showing the specified contents of the variation pattern table set in the ROM of the main control device in the fourth control example, and (b) is a diagram schematically showing the specified contents of the normal variation pattern table in the fourth control example. [Figure 161] 14 is a diagram schematically showing the specified contents of the time-saving fluctuation pattern table in the fourth control example. [Figure 162] 10A and 10B are diagrams that schematically show the specified contents of the time-saving random number table set in the ROM of the main control device in the fourth control example, and (b) are diagrams that schematically show the specified contents of the time-saving type selection table set in the ROM of the main control device in the fourth control example. [Figure 163] 1 is a block diagram showing the configuration of a ROM within the voice lamp control device of a pachinko machine in the fourth control example, and (b) is a block diagram showing the configuration of a RAM within the voice lamp control device of a pachinko machine in the fourth control example. [Figure 164] 10 is a diagram schematically showing the specified contents of a lottery result notification mode selection table set in the ROM of the audio lamp control device of a pachinko machine in the fourth control example. [Figure 165] 14 is a diagram showing a game flow in the fourth control example. [Figure 166] 10 is a flow chart showing timer interrupt processing executed by the MPU in the main control device in the fourth control example. [Figure 167] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the fourth control example. [Figure 168] 10 is a flow chart showing a time-saving lottery process executed by an MPU within the main control device in the fourth control example. [Figure 169] 10 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the fourth control example. [Figure 170] 10 is a flow chart showing a special pattern variation pattern selection process executed by the MPU within the main control device in the fourth control example. [Figure 171] 10 is a flow chart showing update processing executed by the MPU in the main control device in the fourth control example. [Figure 172] 10 is a flow chart showing a small hit start setting process executed by the MPU in the main control device in the fourth control example. [Figure 173] 10 is a flow chart showing a time-saving update process for small hits executed by the MPU in the main control device in the fourth control example. [Figure 174] 10 is a flow chart showing V inlet passing processing executed by the MPU in the main control device in the fourth control example. [Figure 175] 10 is a flow chart showing V-passing processing executed by the MPU within the main control device in the fourth control example. [Figure 176] 10 is a flow chart showing the startup process executed by the MPU in the main control device in the fourth control example. [Figure 177] 10 is a flow chart showing main processing executed by the MPU within the main control device in the fourth control example. [Figure 178] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the fourth control example. [Figure 179] 10 is a flow chart showing small hit control processing executed by the MPU in the main control device in the fourth control example. [Figure 180] 10 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the fourth control example. [Figure 181] 10 is a diagram showing a modified configuration of a game board 13 included in the pachinko machine 10. FIG. [Figure 182] 1 is a front view schematically showing the game board of a pachinko machine in the fifth control example. [Figure 183] 6A to 6B are diagrams schematically showing the internal structure of the distribution unit 1064 of the pachinko machine in the fifth control example. [Figure 184] 10 is a diagram showing an example of a performance screen in which a special chart 2 is consecutively held due to an overflow prize in a disadvantageous time-saving state displayed on the third pattern display device in the fifth control example, and (b) shows an example of a performance screen during a game of a game that is displayed on the third pattern display device in the fifth control example. [Figure 185] 10A is a diagram showing an example of a performance screen in which the disadvantageous time-saving state displayed on the third pattern display device in the fifth control example is exemplified, and (b) shows an example of a performance screen in the ending of a normal jackpot game displayed on the third pattern display device in the fifth control example. [Figure 186] 10A is a schematic diagram showing a part of the contents of the ROM of the main control device in the fifth control example, and (b) is a schematic diagram showing a part of the contents of the RAM of the main control device in the fifth control example. [Figure 187] 10A (a) is a schematic diagram showing a jackpot type selection table in the fifth control example, and (b) is a schematic diagram showing a time-saving random number table in the fifth control example. [Figure 188] 10A (a) is a schematic diagram showing the contents of the special-speed and time-saving table in the fifth control example, and (b) is a schematic diagram showing the contents of the time-saving type selection table in the fifth control example. [Figure 189] 10.

[0021] FIG. 1 (a) is a schematic diagram showing part of the contents of the ROM of the voice lamp control device in the fifth control example, and FIG. 10 (b) is a schematic diagram showing part of the contents of the RAM of the voice lamp control device in the fifth control example. [Figure 190] 14 is a schematic diagram schematically showing the contents of a pre-reading pending mode selection table in the fifth control example. [Figure 191] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the fifth control example. [Figure 192] 10 is a flow chart showing a variation execution judgment process executed by an MPU within the main control device in the fifth control example. [Figure 193] 10 is a flow chart showing a time-saving lottery process executed by an MPU within the main control device in the fifth control example. [Figure 194] 10 is a flow chart showing update processing executed by the MPU in the main control device in the fifth control example. [Figure 195] 10 is a flow chart showing time-saving setting processing executed by the MPU within the main control device in the fifth control example. [Figure 196] 10 is a flow chart showing the start-up winning process executed by the MPU in the main control device in the fifth control example. [Figure 197] 10 is a flow chart showing a pre-reading process executed by an MPU within the main control device in the fifth control example. [Figure 198] 10 is a flow chart showing the main processing executed by the MPU in the audio lamp control device in the fifth control example. [Figure 199] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the fifth control example. [Figure 200] 10 is a flow chart showing a state command reception process executed by the MPU in the audio lamp control device in the fifth control example. [Figure 201] 10 is a flow chart showing a normal state performance setting process executed by the MPU in the audio lamp control device in the fifth control example. [Figure 202] 10 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the fifth control example. [Figure 203] 10 is a flow chart showing winning command processing executed by the MPU in the audio lamp control device in the fifth control example. [Figure 204] 10 is a flow chart showing a special chart winning information command process executed by the MPU in the audio lamp control device in the fifth control example. [Figure 205] 10 is a flow chart showing ending processes executed by the MPU in the audio lamp control device in the fifth control example. [Figure 206] 10 is a flow chart showing a liquid crystal performance execution management process executed by the MPU in the audio lamp control device in the fifth control example. [Figure 207]10 is a flow chart showing the pre-winning detection process executed by the MPU in the audio lamp control device in the fifth control example. [Figure 208] 1 is a front view schematically showing the game board of a pachinko machine in the sixth control example. [Figure 209] 10A and 10B are enlarged views showing the right side area of ​​the game board of the pachinko machine in the sixth control example. [Figure 210] 10A and 10B are enlarged views showing the right side area of ​​the game board of the pachinko machine in the sixth control example. [Figure 211] 10A and 10B are enlarged views showing the right side area of ​​the game board of the pachinko machine in the sixth control example. [Figure 212] 10 is a timing chart showing the flow of a game where the open pattern A of a popular map is set in the sixth control example. [Figure 213] 10 is a timing chart showing the flow of games to win a general map when the open pattern B of a general map is set in the sixth control example. [Figure 214] 10 is a schematic diagram schematically showing a game flow showing the transition contents of the game state in the sixth control example. [Figure 215] 10A is a diagram showing an example of a performance screen when a time-saving pattern is won in the normal state displayed on the third pattern display device in the sixth control example, and (b) shows an example of a performance screen in heaven mode displayed on the third pattern display device in the sixth control example. [Figure 216] 10A (a) is a diagram showing an example of a performance screen in the space mode displayed on the third pattern display device in the sixth control example, and (b) is a diagram showing an example of a performance screen in the challenge mode displayed on the third pattern display device in the sixth control example. [Figure 217] 10A is a schematic diagram showing part of the contents of the ROM of the main control device in the sixth control example, and (b) is a schematic diagram showing the contents of the first random number table in the sixth control example. [Figure 218] 10A (a) is a schematic diagram showing the contents of the jackpot type selection table in the sixth control example, and (b) is a schematic diagram showing the contents of the time-saving random number table in the sixth control example. [Figure 219] 1 is a schematic diagram schematically showing the contents of a general-diagram type selection table in the sixth control example. [Figure 220] 1 is a schematic diagram schematically showing part of the contents of the RAM of the main control device in the sixth control example. [Figure 221] 10A is a schematic diagram showing part of the contents of the ROM of the voice lamp control device in the sixth control example, and (b) is a schematic diagram showing the contents of the expectation degree selection table in the sixth control example. [Figure 222] 1 is a schematic diagram schematically showing part of the contents of the RAM of the audio lamp control device in the sixth control example. [Figure 223] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the sixth control example. [Figure 224] 10 is a flow chart showing status command processing executed by the MPU in the audio lamp control device in the sixth control example. [Figure 225] 10 is a flow chart showing game status update processing executed by the MPU in the audio lamp control device in the sixth control example. [Figure 226] 10 is a flow chart showing time-saving processing executed by the MPU in the audio lamp control device in the sixth control example. [Figure 227] 10 is a flow chart showing non-electrical status management processing executed by the MPU in the audio lamp control device in the sixth control example. [Figure 228] 1 is a front view schematically showing the gaming board of a pachinko machine in the seventh control example. [Figure 229] 1 is an enlarged view showing the V-winning device of a pachinko machine in the seventh control example. [Figure 230] 1 is an enlarged view showing the V-winning device of a pachinko machine in the seventh control example. [Figure 231] 1 is an enlarged view showing the V-winning device of a pachinko machine in the seventh control example. [Figure 232] 1 is an enlarged view showing the V-winning device of a pachinko machine in the seventh control example. [Figure 233] 10. 10 is a diagram showing an example of a time-saving performance screen after a special chart 1 jackpot during normal operation, displayed on the third pattern display device in the seventh control example, and (b) shows an example of a performance screen during a special chart 2 jackpot game displayed on the third pattern display device in the seventh control example. [Figure 234] 10A (a) is a diagram showing an example of the final fluctuation screen in the super chance mode displayed on the third pattern display device in the seventh control example, and (b) is a diagram showing an example of the performance screen in the case where special chart 2 holds up to MAX during the super chance mode displayed on the third pattern display device in the seventh control example. [Figure 235] 10A is a diagram showing an example of a treasure chest opening performance screen in the super chance mode displayed on the third pattern display device in the seventh control example, and (b) shows an example of a final change screen in the super chance mode displayed on the third pattern display device in the seventh control example. [Figure 236] 10 is a schematic diagram schematically showing a game flow showing the transition contents of the game state in the seventh control example. [Figure 237] 10A is a schematic diagram showing a part of the contents of the ROM of the main control device in the seventh control example, and (b) is a schematic diagram showing a part of the contents of the RAM of the main control device in the seventh control example. [Figure 238] 1. (a) is a schematic diagram schematically showing the contents of the first hit random number table in the seventh control example, and (b) is a schematic diagram schematically showing the contents of the special pattern 1 random number table, which is part of the first hit random number table in the seventh control example, and (c) is a schematic diagram schematically showing the contents of the special pattern 2 random number table, which is part of the first hit random number table in the seventh control example. [Figure 239] 14 is a schematic diagram schematically showing the contents of a small hit type selection table in the seventh control example. [Figure 240] 14 is a schematic diagram schematically showing the contents of a time-saving grant table in the seventh control example. [Figure 241] 10.

[0021] FIG. 1 (a) is a schematic diagram showing part of the contents of the ROM of the voice lamp control device in the seventh control example, and FIG. 10 (b) is a schematic diagram showing part of the contents of the RAM of the voice lamp control device in the seventh control example. [Figure 242] 10A (a) is a schematic diagram schematically showing the contents of the final variation effect selection table in the seventh control example, and (b) is a schematic diagram schematically showing the contents of the announcement target selection table in the seventh control example. [Figure 243] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the seventh control example. [Figure 244] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the seventh control example. [Figure 245] 10 is a flow chart showing update processing executed by the MPU in the main control device in the seventh control example. [Figure 246] 10 is a flow chart showing the number of hold balls command processing executed by the MPU in the audio lamp control device in the seventh control example. [Figure 247] 10 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the seventh control example. [Figure 248] 1 is a front view schematically showing the game board of a pachinko machine in the eighth control example. [Figure 249] 10A (a) is a diagram showing an example of a demo screen displayed on the third pattern display device in the eighth control example, and (b) is a diagram showing an example of a screen during normal right-playing play displayed on the third pattern display device in the eighth control example. [Figure 250] 10A (a) is a schematic diagram showing a part of the contents of the ROM of the main control device in the eighth control example, and (b) is a schematic diagram showing a part of the contents of the RAM of the main control device in the eighth control example. [Figure 251] 10A (a) is a schematic diagram showing the contents of the special pattern 2 random number table in the eighth control example, and (b) is a schematic diagram showing the contents of the small hit type selection table in the eighth control example. [Figure 252] 10A (a) is a schematic diagram showing the contents of the time-saving random number table in the eighth control example, and (b) is a schematic diagram showing the contents of the time-saving type selection table in the eighth control example. [Figure 253] 1 is a schematic diagram schematically showing part of the contents of the RAM of the audio lamp control device in the eighth control example. [Figure 254] 10 is a flow chart showing a time-saving lottery process executed by an MPU within the main control device in the eighth control example. [Figure 255] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the eighth control example. [Figure 256] 10 is a flow chart showing the jackpot termination process executed by the MPU in the main control device in the eighth control example. [Figure 257] 10 is a flow chart showing a time-saving limit update process executed by an MPU within the main control device in the eighth control example. [Figure 258] 1 is a front view schematically showing the game board of a pachinko machine in the ninth control example. [Figure 259] 1 is a schematic diagram schematically showing part of the contents of the ROM of the main control device in the ninth control example; FIG. [Figure 260] 1 is a schematic diagram schematically showing part of the contents of the RAM of the main control device in the ninth control example. [Figure 261] 1. (a) is a schematic diagram showing a first random number table in the ninth control example, (b) is a schematic diagram showing a second random number table in the ninth control example, (c) is a schematic diagram showing a time-saving random number table in the ninth control example, and (d) is a schematic diagram showing a small random number table in the ninth control example. [Figure 262] 10. (a) is a schematic diagram showing the contents of the jackpot type selection table in the ninth control example, and (b) is a schematic diagram showing the contents of the special diagram 1 jackpot table, which is part of the jackpot type selection table in the ninth control example. [Figure 263] 10 is a schematic diagram schematically showing the contents of a special diagram 2 jackpot table, which is part of a jackpot type selection table in the ninth control example. [Figure 264] 10 is a schematic diagram schematically showing the contents of a small hit type selection table in the ninth control example. [Figure 265] 1 is a schematic diagram schematically showing the contents of the variation pattern table in the ninth control example. [Figure 266] 14 is a schematic diagram schematically showing the contents of a normal state fluctuation pattern table, which is part of the fluctuation pattern table in the ninth control example. [Figure 267] 14 is a schematic diagram schematically showing the contents of a time-saving state fluctuation pattern table, which is part of the fluctuation pattern table in the ninth control example. [Figure 268] 1 is a schematic diagram schematically showing the contents of a time-saving winning variation state variation table, which is part of the variation pattern table in the ninth control example. [Figure 269] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the ninth control example. [Figure 270] 10 is a flow chart showing the first special pattern change start process executed by the MPU in the main control device in the ninth control example. [Figure 271] 10 is a flow chart showing the first special pattern determination process executed by the MPU within the main control device in the ninth control example. [Figure 272] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the ninth control example. [Figure 273] 10 is a flow chart showing a special diagram 1 time-saving lottery process executed by an MPU within the main control device in the ninth control example. [Figure 274] 10 is a flow chart showing game state update processing executed by the MPU in the main control device in the ninth control example. [Figure 275] 10 is a flow chart showing a process during execution of first special pattern change executed by the MPU in the main control device in the ninth control example. [Figure 276] 10 is a flow chart showing a first special pattern change stop process executed by the MPU within the main control device in the ninth control example. [Figure 277] 10 is a flow chart showing the forced stopping process for Special Figure 1 executed by the MPU in the main control device in the ninth control example. [Figure 278] 10 is a flow chart showing time-saving setting processing executed by the MPU in the main control device in the ninth control example. [Figure 279] 10 is a flow chart showing a second special pattern change start process executed by the MPU in the main control device in the ninth control example. [Figure 280] 10 is a flow chart showing a second special pattern determination process executed by the MPU within the main control device in the ninth control example. [Figure 281] 10 is a flow chart showing a special diagram 2 time-saving lottery process executed by an MPU within the main control device in the ninth control example. [Figure 282] 10 is a flow chart showing a small win lottery process executed by an MPU within the main control device in the ninth control example. [Figure 283] 10 is a flow chart showing a second special pattern variation pattern selection process executed by the MPU within the main control device in the ninth control example. [Figure 284] 10 is a flow chart showing a process during execution of second special pattern change executed by the MPU in the main control device in the ninth control example. [Figure 285] 10 is a flow chart showing a second special pattern change stop process executed by the MPU within the main control device in the ninth control example. [Figure 286] 10 is a flow chart showing the forced stopping process for Special Diagram 2 executed by the MPU in the main control device in the ninth control example. [Figure 287] 10 is a flow chart showing a special diagram 2 small hit stop process executed by the MPU in the main control device in the ninth control example. [Figure 288] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the ninth control example. [Figure 289] 10 is a flow chart showing the jackpot termination process executed by the MPU in the main control device in the ninth control example. [Figure 290] 10 is a flow chart showing a time-saving limit update process executed by an MPU within the main control device in the ninth control example. [Figure 291] 6A and 6B are diagrams showing an example of a ceiling-reaching indication display screen displayed on the third pattern display device in the tenth control example. [Figure 292] 10 (a) is a diagram showing an example of a ceiling-reaching change-indication screen displayed on the third pattern display device in the 10th control example, and (b) is a diagram showing an example of a ceiling-reaching display screen displayed on the third pattern display device in the 10th control example. [Figure 293] 10 is a diagram showing an example of a ceiling-mounted display screen displayed on the third pattern display device in the tenth control example. [Figure 294] 10 is a transition diagram showing the flow of transition of each game state in the tenth control example. [Figure 295] 10. FIG. 10 (a) is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the 10th control example, and FIG. 10th control example is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the 10th control example. [Figure 296] 10. FIG. 10 (a) is a diagram schematically showing the specified contents of the first random number table set in the ROM of the main control device in the 10th control example, FIG. 10th control example, FIG. 10th control example, FIG. 10th control example, and FIG. 10th control example, FIG. 10th control example, FIG. 10th control example, and FIG. 10th control example, FIG. 10th control example, FIG. 10th control example, FIG. 10th control example, FIG. 10th control example, FIG. [Figure 297] 10 is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the tenth control example. [Figure 298] 10. FIG. 10 (a) is a block diagram showing the structure of the time-saving type selection table set in the ROM of the main control device in the 10th control example, FIG. 10th control example, FIG. 10th control example, FIG. 10th control example, and FIG. 10th control example, FIG. 10th control example, FIG. 10th control example, is a diagram showing the specified content of the ceiling table. [Figure 299] 10. FIG. 10 (a) is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 10th control example, and FIG. 10th control example is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 10th control example. [Figure 300] 10 is a diagram schematically showing the specified contents of the ceiling-reaching suggestion performance selection table set in the ROM of the audio lamp control device of a pachinko machine in the tenth control example. [Figure 301] 10 is a diagram schematically showing the specified contents of the ceiling-reaching performance selection table set in the ROM of the audio lamp control device of a pachinko machine in the tenth control example. [Figure 302] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the tenth control example. [Figure 303] 10 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the tenth control example. [Figure 304] 10 is a flow chart showing ceiling determination processing executed by the MPU within the main control device in the tenth control example. [Figure 305] 10 is a flow chart showing a time-saving lottery process executed by an MPU within the main control device in the tenth control example. [Figure 306] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the tenth control example. [Figure 307] 10 is a flow chart showing time-saving setting processing executed by the MPU in the main control device in the tenth control example. [Figure 308] 10 is a flow chart showing normal pattern variation processing executed by the MPU within the main control device in the tenth control example. [Figure 309] 10 is a flow chart showing the startup process executed by the MPU in the main control device in the tenth control example. [Figure 310] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the tenth control example. [Figure 311] 10 is a flow chart showing a state command reception process executed by the MPU in the audio lamp control device in the tenth control example. [Figure 312] 10 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the tenth control example. [Figure 313] 10 is a flow chart showing variation display setting processing executed by the MPU in the audio lamp control device in the tenth control example. [Figure 314] 10 is a flow chart showing performance mode setting processing executed by the MPU in the audio lamp control device in the tenth control example. [Figure 315] 10 is a flow chart showing a normal mode performance setting process executed by the MPU in the audio lamp control device in the tenth control example. [Figure 316] 10 (a) is a diagram showing an example of a game state suggestion performance screen displayed on the third pattern display device in the first modification of the 10th control example, and (b) is a diagram showing an example of a display screen after it is notified that the first time-saving state has been set in the game state suggestion performance in the first modification of the 10th control example. [Figure 317] 10 (a) is a diagram schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the first modification of the 10th control example, and (b) is a diagram schematically showing the specified contents of the time-saving winning table in the first modification of the 10th control example. [Figure 318] 10.

[0044] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the first modification of the tenth control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the first modification of the tenth control example. [Figure 319] 10 is a diagram schematically showing the specified contents of the game state suggestion performance selection table set in the ROM of the audio lamp control device of a pachinko machine in the first modification of the tenth control example. [Figure 320] 10 is a flow chart showing a time-saving lottery process executed by an MPU within the main control device in the first modification of the tenth control example. [Figure 321] 10 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the first modification of the tenth control example. [Figure 322] 10 is a flow chart showing a normal mode performance setting process executed by the MPU in the audio lamp control device in the first modification of the tenth control example. [Figure 323] 11 (a) is a diagram showing an example of a screen when the ceiling activation mode is entered, displayed on the third pattern display device in the 11th control example, and (b) is a diagram showing an example of a screen in the ceiling activation mode displayed on the third pattern display device in the 11th control example. [Figure 324] 11 (a) is a diagram showing an example of a screen when entering the super ceiling mode, displayed on the third pattern display device in the 11th control example, and (b) is a diagram showing an example of a screen when entering the time-saving in the ceiling mode, displayed on the third pattern display device in the 11th control example. [Figure 325] 11. FIG. 11. is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the 11th control example, and FIG. 11th control example is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the 11th control example. [Figure 326] 11. FIG. 10A is a diagram schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the 11th control example, and FIG. 10B is a diagram schematically showing the specified contents of the ceiling table in the 11th control example. [Figure 327] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 11th control example. [Figure 328] 11 is a flow chart showing ceiling determination processing executed by the MPU within the main control device in the 11th control example. [Figure 329] 11 is a flow chart showing time-saving setting processing executed by the MPU within the main control device in the 11th control example. [Figure 330] 11 is a flow chart showing a state command reception process executed by the MPU in the audio lamp control device in the 11th control example. [Figure 331] 11 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the 11th control example. [Figure 332] 11 is a flow chart showing a normal mode performance setting process executed by the MPU in the audio lamp control device in the 11th control example. [Figure 333] 11 (a) is a diagram showing an example of a thrilling zone entry screen displayed on the third pattern display device in the first modification of the 11th control example, and (b) is a diagram showing an example of a notification screen indicating that the time-saving entry is displayed on the third pattern display device in the first modification of the 11th control example, which shows that the time-saving entry is displayed on the third pattern display device in the first modification of the 11th control example. [Figure 334] 1 is a block diagram showing the configuration of a ROM within the main control device of a pachinko machine in the first modification of the 11th control example. [Figure 335] 14 is a diagram schematically showing the specified contents of the time-saving winning table in the first modification of the 11th control example. [Figure 336] 11 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the first modification of the 11th control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the first modification of the 11th control example. [Figure 337] 10 is a diagram schematically showing the specified contents of the thrilling zone performance selection table set in the ROM of the audio lamp control device of a pachinko machine in the first modification of the 11th control example. [Figure 338] 10 is a flow chart showing a time-saving lottery process executed by an MPU within the main control device in the first modification of the 11th control example. [Figure 339] 10 is a flow chart showing ceiling determination processing executed by the MPU within the main control device in the first modification of the 11th control example. [Figure 340] 10 is a flow chart showing time-saving setting processing executed by the MPU in the main control device in the first modification of the 11th control example. [Figure 341] 10 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the first modification of the 11th control example. [Figure 342] 10 is a flow chart showing a normal mode performance setting process executed by the MPU in the audio lamp control device in the first modification of the 11th control example. [Figure 343] 1 is a front view schematically showing the game board of a pachinko machine in the 12th control example. [Figure 344] 12 (a) is a diagram showing an example of a performance screen during the second special mode state displayed on the third design display device in the 12th control example, and (b) is a diagram showing an example of a performance screen during the second special mode state displayed on the third design display device in the 12th control example, when the second special mode state is finished. [Figure 345] 12 (a) is a diagram showing an example of a performance screen during the change in special chart 2 in the normal state displayed on the third pattern display device in the 12th control example, and (b) is a diagram showing an example of a change in special chart 2 in the second special state displayed on the third pattern display device in the 12th control example. [Figure 346] 12. FIG. 12 is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the 12th control example, and FIG. 12 is a diagram schematically showing the specified contents of the second random number table set in the ROM of the main control device in the 12th control example, and FIG. 12 is a diagram schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the 12th control example. [Figure 347] 12. (a) is a block diagram showing the configuration of the jackpot type selection table set in the ROM of the main control device in the 12th control example, (b) is a diagram schematically showing the specified contents of the special chart 1 jackpot table in the 12th control example, and (c) is a diagram schematically showing the specified contents of the special chart 2 jackpot table in the 12th control example. [Figure 348] 12 is a diagram schematically showing the specified contents of the time-saving type selection table set in the ROM of the main control device in the 12th control example. [Figure 349] 12 (a) is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 12th control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 12th control example. [Figure 350] 12 is a diagram schematically showing the specified contents of a keep zone presentation selection table set in the ROM of the audio lamp control device of a pachinko machine in the 12th control example. [Figure 351] 12 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 12th control example. [Figure 352] 12 is a flow chart showing a time-saving lottery process executed by an MPU within the main control device in the 12th control example. [Figure 353] 12 is a flow chart showing a second special mode state performance setting process executed by the MPU in the audio lamp control device in the 12th control example. [Figure 354]12 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the 12th control example. [Figure 355] 12 is a flow chart showing a special diagram 2 performance mode setting process executed by the MPU in the audio lamp control device in the 12th control example. [Figure 356] 16A is a diagram illustrating the exterior of the island equipment in a state in which a plurality of pachinko machines connected to the data display device in the 16th embodiment are installed side by side in a hall, and (b) is a diagram showing an example of displaying various data displayed on the data display unit of the data display device in the 16th embodiment. [Figure 357] 13 (a) is a diagram showing the visual appearance of the data display device while the jackpot game state is in the 13th control example, and (b) is a diagram showing an example of the visual appearance of the data display device when the 13th control example moves to the time-saving state of the normal pattern after the jackpot is completed. [Figure 358] 13 is a diagram showing a visual viewing mode of the data display device during the third time-saving state, which is set based on the arrival of the number of ceiling draws in the 13th control example. [Figure 359] 13 (a) is a diagram showing an example of a stimulating effect of the data display device linked performance displayed on the third pattern display device in the 13th control example, and (b) is a diagram showing an example of a performance mode of the data display device linked performance displayed on the third pattern display device in the 13th control example. [Figure 360] 13 (a) is a diagram showing an example of the performance mode when a small or special jackpot is won in the 13th control example, and (b) is a diagram showing an example of the variation display mode that is executed during the number of ceiling draws in the 13th control example. [Figure 361] 13 (a) is a diagram showing an example of the performance mode of the time-saving activation inciting performance in the normal state displayed on the third pattern display device in the 13th control example, and (b) is a diagram showing an example of the performance mode of the time-saving activation inciting performance in the 13th control example, which is displayed on the third pattern display device in the 13th control example. [Figure 362] 13 (a) is a diagram showing a list of hold-change modes in the 13th control example, and (b) is a diagram showing conditions in which hold-change effects in the 13th control example are suppressed. [Figure 363] 13 is a diagram showing a method for transitioning between the game states in the 13th control example. [Figure 364] 13 is a block diagram showing the electrical configuration of a pachinko machine in the 13th control example. [Figure 365] 13 is a block diagram showing the electrical configuration of a data display device and a hall computer electrically connected to the pachinko machine via an external output terminal board in the 13th control example. [Figure 366] 13 is a diagram showing the types of external output signals output from the external output terminal board in the 13th control example. [Figure 367] 13 is a diagram showing an example of a signal output mode of the external output terminal board during normal play in the 13th control example. [Figure 368] 13 is a diagram showing an example of a signal output mode when power is turned on in the 13th control example. [Figure 369] 13 (a) is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the 13th control example, and (b) is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the 13th control example. [Figure 370] 13 (a) is a diagram schematically showing the specified contents of the first random number table set in the ROM of the main control device in the 13th control example, and (b) is a block diagram showing the configuration of the variation pattern selection table set in the ROM of the main control device in the 13th control example, and (c) is a diagram schematically showing the specified contents of the normal table in the 13th control example. [Figure 371] 13 (a) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 13th control example, and (b) is a diagram schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the 13th control example. [Figure 372] 13 (a) is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 13th control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 13th control example. [Figure 373] 13 is a diagram schematically showing the specified contents of a hold mode selection table set in the ROM of the audio lamp control device of a pachinko machine in the 13th control example. [Figure 374] 13 is a diagram schematically showing the specified contents of the time-saving suggestion performance selection table set in the ROM of the audio lamp control device of a pachinko machine in the 13th control example. [Figure 375] 12 is a flow chart showing timer interrupt processing executed by the MPU in the main control device in the 13th control example. [Figure 376] 12 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 13th control example. [Figure 377] 12 is a flow chart showing update processing executed by the MPU within the main control device in the 13th control example. [Figure 378] 12 is a flow chart showing ceiling determination processing executed by the MPU within the main control device in the 13th control example. [Figure 379] 12 is a flow chart showing time-saving setting processing executed by the MPU in the main control device in the 13th control example. [Figure 380] 13 is a flow chart showing the outer end output setting process executed by the MPU in the main control device in the 13th control example, and (b) is a flow chart showing the error signal processing executed by the MPU in the main control device in the 13th control example. [Figure 381] 14 is a flow chart showing out-sphere detection signal processing executed by the MPU in the main control device in the 13th control example. [Figure 382] 12 is a flow chart showing start port signal processing executed by the MPU in the main control device in the 13th control example. [Figure 383] 12 is a flow chart showing the release signal processing executed by the MPU in the main control device in the 13th control example. [Figure 384] 12 is a flow chart showing the startup process executed by the MPU in the main control device in the 13th control example. [Figure 385] 14 is a flow chart showing the start-up signal output process executed by the MPU in the main control device in the 13th control example. [Figure 386] 12 is a flow chart showing the main processing executed by the MPU in the audio lamp control device in the 13th control example. [Figure 387] 12 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the 13th control example. [Figure 388] 12 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the 13th control example. [Figure 389] 14 is a flow chart showing a state command reception process executed by the MPU in the audio lamp control device in the 13th control example. [Figure 390] 14 is a flow chart showing winning command processing executed by the MPU in the audio lamp control device in the 13th control example. [Figure 391] 14 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the 13th control example. [Figure 392] 12 is a flow chart showing small hit-related processes executed by the MPU in the audio lamp control device in the 13th control example. [Figure 393] 12 is a flow chart showing general-scale diagram-related processes executed by the MPU in the audio lamp control device in the 13th control example. [Figure 394] 14 is a flow chart showing a normal mode performance setting process executed by the MPU in the audio lamp control device in the 13th control example. [Figure 395] 12 is a flow chart showing the main processing executed by the MPU in the data display device in the 13th control example. [Figure 396] 14 is a flow chart showing display device signal reception processing executed by the MPU in the data display device in the 13th control example. [Figure 397] 14 is a flow chart showing the main processing executed by the MPU of the Hall computer in the 13th control example. [Figure 398] 14 is a flow chart showing signal reception processing executed by the MPU of the Hall computer in the 13th control example. [Figure 399] 14 is a flow chart showing a power recovery comparison process executed by the MPU of the Hall computer in the 13th control example. [Figure 400] 14 is a front view schematically showing the game board of a pachinko machine in the 14th control example. [Figure 401] 14th control example shows an example of the performance mode during the time-saving state B, which is set when the number of ceiling draws is reached in the 14th control example, and (b) shows an example of the performance mode when the time-saving state B is changed to the time-saving state A in the 14th control example. [Figure 402] 14 is a diagram showing an example of a performance mode when a jackpot is won during the time-saving state B in the 14th control example. [Figure 403] 14 is a diagram showing a method for transitioning between the game states in the 14th control example. [Figure 404] 14 is a block diagram showing the configuration of a ROM within the main control device of a pachinko machine in the 14th control example. [Figure 405] 14 is a block diagram showing the configuration of RAM in the main control device of a pachinko machine in the 14th control example. [Figure 406] 14 (a) is a block diagram showing the configuration of the jackpot type selection table set in the ROM of the main control device in the 14th control example, (b) is a diagram schematically showing the specified contents of the special chart 1 jackpot table in the 14th control example, and (c) is a diagram schematically showing the specified contents of the special chart 2 jackpot table in the 14th control example. [Figure 407] 14 (a) is a diagram schematically showing the specified contents of the second random number table set in the ROM of the main control device in the 14th control example, and (b) is a block diagram showing the configuration of the variation pattern table set in the ROM of the main control device in the 14th control example, and (c) is a diagram schematically showing the specified contents of the first time-saving table in the 14th control example. [Figure 408] 14 (a) is a diagram schematically showing the specified contents of the small hit random number table set in the ROM of the main control device in the 14th control example, and (b) is a diagram schematically showing the specified contents of the small hit type selection table set in the ROM of the main control device in the 14th control example, and (c) is a diagram schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the 14th control example. [Figure 409] 14 (a) is a diagram schematically showing the specified contents of the time-saving type selection table set in the ROM of the main control device in the 14th control example, and (b) is a diagram schematically showing the specified contents of the variation pattern scenario table set in the ROM of the main control device in the 14th control example. [Figure 410] 14 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 14th control example. [Figure 411] 14 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 14th control example. [Figure 412] 10 is a flow chart showing the first special pattern change start process executed by the MPU within the main control device in the 14th control example. [Figure 413] 14 is a flow chart showing the first special pattern determination process executed by the MPU within the main control device in the 14th control example. [Figure 414] 14 is a flow chart showing a small win lottery process executed by an MPU within the main control device in the 14th control example. [Figure 415] 10 is a flow chart showing a first special pattern variation pattern selection process executed by the MPU within the main control device in the 14th control example. [Figure 416] 14 is a flow chart showing ceiling determination processing executed by the MPU within the main control device in the 14th control example. [Figure 417] 14 is a flow chart showing a first special pattern change stop process executed by the MPU within the main control device in the 14th control example. [Figure 418] 14 is a flow chart showing a special diagram 1 miss-off stop process executed by an MPU within the main control device in the 14th control example. [Figure 419] 11 is a flow chart showing a second special pattern change start process executed by the MPU within the main control device in the 14th control example. [Figure 420] 11 is a flow chart showing a second special pattern determination process executed by the MPU within the main control device in the 14th control example. [Figure 421] 14 is a flow chart showing a special diagram 2 time-saving lottery process executed by an MPU within the main control device in the 14th control example. [Figure 422] 11 is a flow chart showing a second special pattern variation pattern selection process executed by the MPU within the main control device in the 14th control example. [Figure 423] 11 is a flow chart showing a second special pattern change stop process executed by the MPU in the main control device in the 14th control example. [Figure 424] 14 is a flow chart showing time-saving setting processing executed by the MPU within the main control device in the 14th control example. [Figure 425] 14 is a flow chart showing a special diagram 2 missing stop processing executed by an MPU within the main control device in the 14th control example. [Figure 426] 14 is a flow chart showing time-saving state performance setting processing executed by the MPU in the audio lamp control device in the 14th control example. [Figure 427] 14 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the 14th control example. [Figure 428] 1 is a front view schematically showing the game board of a pachinko machine in the 15th control example. [Figure 429] 14 is a partial enlarged view of the gaming board of a pachinko machine in the 15th control example. [Figure 430] 1 is a front perspective view of the V winning device in the 15th control example. [Figure 431] 1 is an exploded front perspective view of the V winning device in the 15th control example. [Figure 432] 14 is an operational view of the V winning device in the 15th control example seen from the rear side. [Figure 433] 15 (a) is a schematic view of the V-window of the V-window of the V-window of the V-window of the V-window of the 15th control example in plan viewed in a state in which the open / closed door is closed, and (b) is a schematic view of the V-window of the V-window of the V-window of the 15th control example in plan viewed in plan viewed in FIG. [Figure 434] 15 (a) is a diagram showing an example of a V icon acquisition performance screen executed during the ending period of a jackpot game displayed on the third pattern display device in the 15th control example, and (b) is a diagram showing an example of a battle performance screen in the case where the V hold is consumed due to the fourth variation of the special chart after the jackpot game displayed on the third pattern display device in the 15th control example. [Figure 435] 15 (a) is a diagram showing an example of a performance screen when a V icon is activated during a battle performance displayed on the third pattern display device in the 15th control example, and (b) is a diagram showing an example of a performance screen for a battle performance when a V hold exists within the hold displayed on the third pattern display device in the 15th control example. [Figure 436] 14 is a diagram schematically showing the structure of various counters in the 15th control example. [Figure 437] 15 (a) is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the 15th control example, and (b) is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the 15th control example. [Figure 438] 15. (a) is a block diagram showing the structure of the first random number table set in the ROM of the main control device in the 15th control example, and (b) is a diagram schematically showing the specified contents of the special pattern 1 random number table in the 15th control example, and (c) is a diagram schematically showing the specified contents of the special pattern 2 random number table in the 15th control example. [Figure 439] 15. (a) is a block diagram showing the configuration of the jackpot type selection table set in the ROM of the main control device in the 15th control example, (b) is a diagram schematically showing the specified contents of the special chart 1 jackpot type selection table in the 15th control example, (c) is a diagram schematically showing the specified contents of the special chart 2 jackpot type selection table in the 15th control example, and (d) is a diagram schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the 15th control example. [Figure 440] 14 is a diagram schematically showing the specified contents of a small hit type selection table set in the ROM of the main control device in the 15th control example. [Figure 441] 15 (a) is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the main control device in the 15th control example, and (b) is a diagram schematically showing the specified contents of the normal variation pattern table in the 15th control example. [Figure 442] 14 is a diagram schematically showing the specified contents of the time-saving fluctuation pattern table in the 15th control example. [Figure 443] 15 (a) is a diagram schematically showing the specified contents of the time-saving random number table set in the ROM of the main control device in the 15th control example, and (b) is a diagram schematically showing the specified contents of the time-saving type selection table set in the ROM of the main control device in the 15th control example. [Figure 444] 15 (a) is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 15th control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 15th control example. [Figure 445] 15 (a) is a block diagram showing the configuration of the performance mode selection table set in the ROM of the audio lamp control device of the pachinko machine in the 15th control example, and (b) is a diagram schematically showing the specified contents of the time-saving performance mode setting A table in the 15th control example, and (c) is a diagram schematically showing the specified contents of the time-saving performance mode setting B table in the 15th control example. [Figure 446] 14 is a diagram schematically showing the specified contents of a V icon acquisition performance setting table set in the ROM of the audio lamp control device of a pachinko machine in the 15th control example. [Figure 447] 14 is a diagram showing a game flow in the 15th control example. [Figure 448] 10 is a flow chart showing update processing executed by the MPU in the main control device in the 15th control example. [Figure 449] 10 is a flow chart showing a time-saving update process for small hits executed by the MPU in the main control device in the 15th control example. [Figure 450] 10 is a flow chart showing the start-up winning process executed by the MPU in the main control device in the 15th control example. [Figure 451] 10 is a flow chart showing a preliminary process executed by an MPU within the main control device in the 15th control example. [Figure 452] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the 15th control example. [Figure 453] 10 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the 15th control example. [Figure 454] 10 is a flow chart showing a V icon acquisition performance setting process executed by the MPU in the audio lamp control device in the 15th control example. [Figure 455] 10 is a flow chart showing ending processes executed by the MPU in the audio lamp control device in the 15th control example. [Figure 456] 10 is a flow chart showing variation display setting processing executed by the MPU in the audio lamp control device in the 15th control example. [Figure 457] 10 is a flow chart showing the performance mode selection process executed by the MPU in the audio lamp control device in the 15th control example. [Figure 458] 10 is a flow chart showing time-saving performance mode setting processing executed by the MPU in the audio lamp control device in the 15th control example. [Figure 459] 15 (a) is a diagram showing an example of a V icon acquisition performance screen displayed on the third pattern display device in the first modification of the 15th control example, and (b) is a diagram showing an example of a performance screen when a V icon is activated during the special change of the small win A winning pattern displayed on the third pattern display device in the first modification of the 15th control example. [Figure 460] 15 (a) is a diagram showing an example of a performance screen when the V icon is activated during the special chart change of the small win B winning displayed on the third pattern display device in the first modification of the 15th control example, and (b) is a diagram showing an example of a V icon activation cancellation performance screen when a new V hold is acquired during the special chart change of the small win B winning that is displayed on the third pattern display device in the first modification of the 15th control example. [Figure 461] 15 (a) is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the first modification of the 15th control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the first modification of the 15th control example. [Figure 462] 14 is a diagram schematically showing the specified contents of a V icon display mode setting table set in the ROM of the audio lamp control device of a pachinko machine in the first modification of the 15th control example. [Figure 463] 10 is a flow chart showing a V icon acquisition performance setting process executed by the MPU in the audio lamp control device in the first modification of the 15th control example. [Figure 464] 10 is a flow chart showing ending processes executed by the MPU in the audio lamp control device in the first modification of the 15th control example. [Figure 465] 10 is a flow chart showing time-saving performance mode setting processing executed by the MPU in the audio lamp control device in the first modification of the 15th control example. [Figure 466] 14 is a front view of a pachinko machine in which the upper body is disposed at a protruding position in a modified example of the 13th control example. [Figure 467] 13 (a) is a diagram showing an example of a performance mode in which a data display device-linked jackpot notification performance is performed in a modified example of the 13th control example, and a jackpot start is started when the upper role is placed at a protruding position, and (b) is a diagram showing an example of a performance mode in which a data display device-linked jackpot notification performance is performed in a modified example of the 13th control example, and a jackpot notification performance is actually at the time when a jackpot notification performance is performed in an actual timing. [Figure 468] 12 (a) is a diagram showing an example of a performance screen in the second special mode state displayed on the third design display device in the first modification of the 12th control example, and (b) is a diagram showing an example of a performance screen in the second special mode state displayed on the third design display device in the 12th control example, when the second special mode state is finished. [Figure 469] 10 is a flow chart showing a state transition fluctuation discard process executed by an MPU within the main control device in the first modification of the 12th control example. [Figure 470] 10 is a flow chart showing a second special-mode state performance setting process executed by the MPU in the audio lamp control device in the first modification of the 12th control example. [Figure 471] 16 (a) and (b) are diagrams showing an example of a variable display mode executed by the third pattern display device when the lottery results correspond to the winning of the time-saving pattern in the normal operation of the 16th control example. [Figure 472] 16th control example shows an example of an additional effect executed on the third pattern display device during the chance time in the 16th control example, and (b) shows an example of an end standby effect executed when the remaining number of chance times in the 16th control example is less than 10. [Figure 473] 16 is a diagram showing an example of the opportunity time ending effect displayed on the third pattern display device in the 16th control example. [Figure 474] 16 is a diagram showing the progress of the performance mode when a special pattern lottery was selected with a time-saving pattern of 50 times in a lottery for a special pattern that was executed 25 times before the number of times of ceiling lottery was reached in the 16th control example. [Figure 475] 16 (a) and (b) are diagrams showing an example of a variation display mode for showing the lottery results of the special pattern executed the first time after the ceiling lottery number reached in the 16th control example. [Figure 476] 6A and 6B are diagrams showing an example of a ceiling-climaxing effect displayed on the third pattern display device in the 16th control example. [Figure 477] 16 is a diagram showing an example of a ceiling-stimulating performance that is executed after at least one time is completed based on the reach of the ceiling lottery number in the 16th control example. [Figure 478] 16 (a) is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the 16th control example, and (b) is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the 16th control example. [Figure 479] 14 is a diagram schematically showing the specified contents of the first random number table set in the ROM of the main control device in the 16th control example. [Figure 480] 16 is a block diagram showing the configuration of the variation pattern selection table set in the ROM of the main control device in the 16th control example, (b) is a diagram schematically showing the specified contents of the ceiling-stimulating table in the 16th control example, and (c) is a diagram schematically showing the specified contents of the ceiling-reaching table in the 16th control example. [Figure 481] 16 (a) is a diagram schematically showing the specified contents of the time-saving type selection table set in the ROM of the main control device in the 16th control example, and (b) is a diagram schematically showing the specified contents of the variation pattern scenario table set in the ROM of the main control device in the 16th control example. [Figure 482] 16th control example (a) is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 16th control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 16th control example. [Figure 483] 11 is a flow chart showing ceiling determination processing executed by the MPU within the main control device in the 16th control example. [Figure 484] 11 is a flow chart showing the startup process executed by the MPU in the main control device in the 16th control example. [Figure 485] 11 is a flow chart showing a setting value control process executed by an MPU within the main control device in the 16th control example. [Figure 486] 11 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the 16th control example. [Figure 487] 11 is a flow chart showing a normal mode performance setting process executed by the MPU in the audio lamp control device in the 16th control example. [Figure 488] 11 is a flow chart showing variation pattern setting processing executed by the MPU in the audio lamp control device in the 16th control example. [Figure 489] 11 is a flow chart showing ceiling-related performance setting processing executed by the MPU in the audio lamp control device in the 16th control example. [Figure 490] 17 (a) and (b) are diagrams showing an example of a variation display mode in which the special chart lottery result executed the first time after turning on the power involving the RAM clear operation in the 17th control example is a small win. [Figure 491] 10 is a block diagram showing the configuration of a ROM within the main control device of a pachinko machine in the 17th control example. [Figure 492] 14 is a block diagram showing the configuration of RAM within the main control device of a pachinko machine in the 17th control example. [Figure 493]17 (a) is a block diagram showing the structure of a variation pattern scenario table set in the ROM of the main control device in the 17th control example, and (b) is a diagram schematically showing the specified contents of the winning table in the 17th control example. [Figure 494] 17 (a) is a diagram schematically showing the contents of the table for reaching the ceiling in the 17th control example, and (b) is a diagram schematically showing the contents of the table for reaching the ceiling in the 17th control example. [Figure 495] 14 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 17th control example. [Figure 496] 10 is a flow chart showing the first special pattern variation pattern selection process executed by the MPU within the main control device in the seventeenth control example. [Figure 497] 10 is a flow chart showing ceiling determination processing executed by the MPU within the main control device in the 17th control example. [Figure 498] 10 is a flow chart showing a special diagram 1 miss-off stop process executed by an MPU within the main control device in the 17th control example. [Figure 499] 10 is a flow chart showing the startup process executed by the MPU in the main control device in the 17th control example. [Figure 500] 10 is a flow chart showing the jackpot termination process executed by the MPU in the main control device in the 17th control example. [Figure 501] 11 is a flow chart showing a normal state performance setting process executed by the MPU in the audio lamp control device in the seventeenth control example. [Figure 502] 10 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the 17th control example. [Figure 503] 18th control example shows an example of the performance mode performed by the third pattern display device between the end of the chance time in the 18th control example, from the time when the chance time has ended and all of the hold balls of the second special pattern that have been held at the end of the chance time have been completed, and (b) shows an example of the performance mode performed by the third pattern display device between the time when the number of special pattern lottery times has been completed in the 18th control example, from the time when the chance time has been completed, within 20 times. [Figure 504] 18 is a diagram showing an example of a performance mode when the number of ceiling lottery numbers is reached during the special mode in the 18th control example. [Figure 505] 11 is a diagram showing the progression of the performance mode after the chance time has ended in the 18th control example. [Figure 506] 18th control example (a) is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the 18th control example, and (b) is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the 18th control example. [Figure 507] 18 is a block diagram showing the configuration of the variation pattern selection table set in the ROM of the main control device in the 18th control example, (b) is a diagram schematically showing the specified contents of the time-saving end notification table in the 18th control example, and (c) is a diagram schematically showing the specified contents of the time-saving end table in the 18th control example. [Figure 508] 18 is a block diagram showing the configuration of a variation pattern scenario table set in the ROM of the main control device in the 18th control example, (b) is a diagram schematically showing the specified contents of the after-off table in the 18th control example, and (c) is a diagram schematically showing the specified contents of the after-off table in the 18th control example. [Figure 509] 14 is a diagram schematically showing the specified contents of the time-saving table in the 18th control example. [Figure 510] 11 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 18th control example. [Figure 511] 11 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the 18th control example. [Figure 512] 11 is a flow chart showing update processing executed by the MPU in the main control device in the 18th control example. [Figure 513] 11 is a flow chart showing ceiling determination processing executed by the MPU within the main control device in the 18th control example. [Figure 514] 11 is a flow chart showing the startup process executed by the MPU in the main control device in the 18th control example. [Figure 515] 11 is a flow chart showing performance mode setting processing executed by the MPU in the audio lamp control device in the 18th control example. [Figure 516] 11 is a flow chart showing ceiling-related performance setting processing executed by the MPU in the audio lamp control device in the 18th control example. [Figure 517] 1 is a front view of a pachinko machine in the 19th control example. [Figure 518] 11 is a front view of the gaming board of the pachinko machine in the 19th control example. [Figure 519] 1 is a rear view of a pachinko machine in the 19th control example. [Figure 520] 10 is a front view of the performance button of the pachinko machine in the 19th control example, and (b) is a front view of the selection button of the pachinko machine 10 in the 19th control example. [Figure 521] 19th control example (a) is a schematic diagram showing a case in which the decorative movable object of the pachinko machine in the 19th control example is in the movable state, and (b) is a schematic diagram showing a case in which the decorative movable object of the pachinko machine in the 19th control example is in the movable state. [Figure 522] 1 is an exploded front perspective view of the V winning device in the 19th control example. [Figure 523] 11 is an operational view of the V-winning device in the 19th control example seen from the rear side. [Figure 524] 19th control example (a) shows an example of a display screen during special chart fluctuation in a state in which the role displayed on the third pattern display device in the 19th control example is stored, and (b) shows an example of a display screen 1 in the case where the role displayed on the third pattern display device in the 19th control example is movable and the holding color is changed. [Figure 525] 19th control example (a) shows an example of a display screen 2 in which the role displayed on the third pattern display device in the 19th control example is movable and the holding color is changed, and (b) shows an example of a display screen 3 in which the role displayed on the third pattern display device in the 19th control example is movable and the holding color is changed. [Figure 526] 19th control example (a) shows an example of a display screen when a character is stored after the hold color displayed on the third pattern display device in the 19th control example is variable, and (b) shows an example of a display screen 1 in the case where the character displayed on the third pattern display device in the 19th control example is movable, and part of the hold color is moved to the next hold. [Figure 527] 19th control example (a) shows an example of a display screen 2 in which the role displayed on the third pattern display device in the 19th control example is movable, and part of the holding color is moved to the next hold, and (b) shows an example of a display screen when the role is stored after the hold color displayed on the third pattern display device in the 19th control example has been changed. [Figure 528] 19th control example (a) shows an example of a display screen in which the role displayed on the third pattern display device in the 19th control example is movable and the hold pattern changes independently, and (b) shows an example of a display screen in which the role is stored after the hold color displayed on the third pattern display device in the 19th control example has changed independently. [Figure 529] 19 (a) is a diagram schematically showing the relationship between the color of the hold pattern in the 19th control example and the expected degree of winning a jackpot, and (b) is a diagram schematically showing the variable color pattern of the hold pattern in the 19th control example. [Figure 530] 19th control example (a) shows an example of a demo screen displayed on the third pattern display device in the 19th control example, and (b) shows an example of a light amount adjustment screen (with a character) displayed on the third pattern display device in the 19th control example. [Figure 531] 19th control example (a) shows an example of the adjustment end screen when the decision button displayed on the third pattern display device in the 19th control example is operated, and (b) shows an example of the display screen when special chart fluctuations start during adjustment of the light amount displayed on the third pattern display device in the 19th control example. [Figure 532] 11 is a diagram showing an example of a light amount adjustment screen in the prohibition of the roles displayed on the third pattern display device in the 19th control example. [Figure 533] 19th control example (a) shows an example of a display screen when the shutter close reach is started displayed on the third pattern display device in the 19th control example, and (b) shows an example of a display screen when the shutter close reach is continued displayed on the third pattern display device in the 19th control example. [Figure 534] 19th control example (a) shows an example of a display screen in the fifth stage of shutter closing reach displayed on the third pattern display device in the 19th control example, and (b) shows an example of a display screen in the sixth stage of shutter closing reach displayed on the third pattern display device in the 19th control example. [Figure 535] 19th control example (a) shows an example of a display screen in which a capsule is acquired in the third stage of shutter closing reach displayed on the third pattern display device in the 19th control example, and (b) shows an example of a display screen in which a capsule is opened in the fifth stage of shutter closing reach displayed on the third pattern display device in the 19th control example. [Figure 536]19th control example (a) shows an example of a display screen when a branching effect is performed during the reach performance displayed on the third pattern display device in the 19th control example, and (b) shows an example of a display screen when a button operation is performed during the branching effect displayed on the third pattern display device in the 19th control example. [Figure 537] 11 is a diagram showing an example of a display screen at the end of a special movie when a button is not operated during the branching performance displayed on the third pattern display device in the 19th control example. [Figure 538] 19 is a timing chart that schematically illustrates the relationship between the performance time of the special movie in the 19th control example and the fluctuation time of the special chart, ie (a) is a timing chart in the case where a button is not operated during the branching performance in the 19th control example, and (b) is a timing chart in the case where a button is operated during the branching performance in the 19th control example. [Figure 539] 1 is a block diagram showing the electrical configuration of a pachinko machine in the 19th control example. [Figure 540] 14 is a diagram schematically showing the structure of various counters in the 19th control example. [Figure 541] 19th control example (a) is a block diagram showing the configuration of the ROM of the main control device in the 19th control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 19th control example. [Figure 542] 10 is a diagram schematically showing the specified contents of the first random number table set in the ROM of the main control device in the 19th control example. [Figure 543] 19 (a) is a diagram schematically showing the specified contents of the first per-account type selection table set in the ROM of the main control device in the 19th control example, and (b) is a diagram schematically showing the specified contents of the second per-account random number table in the 19th control example. [Figure 544] 19. (a) is a block diagram showing the configuration of the variation pattern selection table set in the ROM of the main control device in the 19th control example, (b) is a diagram schematically showing the specified contents of the jackpot variation pattern table in the 19th control example, (c) is a diagram schematically showing the specified contents of the deviation (normal) variation pattern table in the 19th control example, and (d) is a diagram schematically showing the specified contents of the deviation (special mode, time-saving) variation pattern table in the 19th control example. [Figure 545] 19th control example (a) is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 19th control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 19th control example. [Figure 546] 19. FIG. 10A is a diagram schematically showing the specified contents of the hold-change effect lottery table set in the ROM of the audio lamp control device of the pachinko machine in the 19th control example, and FIG. 10B is a diagram schematically showing the specified contents of the hold-color selection table set in the ROM of the audio lamp control device of the pachinko machine in the 19th control example. [Figure 547] 10 is a diagram schematically showing the specified contents of a pending change scenario selection table set in the ROM of the audio lamp control device of a pachinko machine in the 19th control example. [Figure 548] 10 is a diagram schematically showing the specified contents of the shutter closure reach selection table set in the ROM of the audio lamp control device of a pachinko machine in the 19th control example. [Figure 549] 10 is a diagram schematically showing the specified contents of the operation scenario table set in the ROM of the audio lamp control device of a pachinko machine in the 19th control example. [Figure 550] 11 is a flow chart showing timer interrupt processing executed by the MPU in the main control device in the 19th control example. [Figure 551] 11 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 19th control example. [Figure 552] 11 is a flow chart showing a special pattern jackpot determination process executed by the MPU within the main control device in the 19th control example. [Figure 553] 11 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the 19th control example. [Figure 554] 11 is a flow chart showing update processing executed by the MPU within the main control device in the 19th control example. [Figure 555] 11 is a flow chart showing the start-up winning process executed by the MPU in the main control device in the 19th control example. [Figure 556] 11 is a flow chart showing a preliminary process executed by an MPU within the main control device in the 19th control example. [Figure 557] 11 is a flow chart showing normal pattern variation processing executed by the MPU within the main control device in the 19th control example. [Figure 558] 11 is a flow chart showing a process of passing through gates executed by the MPU within the main control device in the 19th control example. [Figure 559] 11 is a flow chart showing NMI interrupt processing executed by the MPU in the main control device in the 19th control example. [Figure 560] 11 is a flow chart showing the startup process executed by the MPU in the main control device in the 19th control example. [Figure 561] 11 is a flow chart showing the main processing executed by the MPU within the main control device in the 19th control example. [Figure 562] 11 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the 19th control example. [Figure 563] 11 is a flow chart showing a jackpot operation setting process executed by an MPU within the main control device in the 19th control example. [Figure 564] 11 is a flow chart showing the jackpot termination process executed by the MPU in the main control device in the 19th control example. [Figure 565] 11 is a flow chart showing notification processing executed by the MPU within the main control device in the 19th control example. [Figure 566] 11 is a flow chart showing the winning process executed by the MPU in the main control device in the 19th control example. [Figure 567] 11 is a flow chart showing processes as long as they are executed by the MPU within the main control device in the 19th control example. [Figure 568] 11 is a flow chart showing the startup process executed by the MPU in the main control device in the 19th control example. [Figure 569] 11 is a flow chart showing the main processing executed by the MPU in the audio lamp control device in the 19th control example. [Figure 570] 11 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the 19th control example. [Figure 571] 11 is a flow chart showing a state command reception process executed by the MPU in the audio lamp control device in the 19th control example. [Figure 572] 11 is a flow chart showing winning command processing executed by the MPU in the audio lamp control device in the 19th control example. [Figure 573] 11 is a flow chart showing a special chart winning information command process executed by the MPU in the audio lamp control device in the 19th control example. [Figure 574] 11 is a flow chart showing a hold performance setting process executed by the MPU in the audio lamp control device in the 19th control example. [Figure 575] 11 is a flow chart showing a composite hold change effect setting process executed by the MPU in the audio lamp control device in the 19th control example. [Figure 576] 11 is a flow chart showing a stop command process executed by the MPU in the audio lamp control device in the 19th control example. [Figure 577] 11 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the 19th control example. [Figure 578] 11 is a flow chart showing ending processes executed by the MPU in the audio lamp control device in the 19th control example. [Figure 579] 11 is a flow chart showing variation display setting processing executed by the MPU in the audio lamp control device in the 19th control example. [Figure 580] 11 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 19th control example. [Figure 581] 11 is a flow chart showing a normal state performance mode determination process executed by the MPU in the audio lamp control device in the 19th control example. [Figure 582] 11 is a flow chart showing a hold-out effect execution process executed by the MPU in the audio lamp control device in the 19th control example. [Figure 583] 11 is a flow chart showing frame button input monitoring and performance processing executed by the MPU in the audio lamp control device in the 19th control example. [Figure 584] 11 is a flow chart showing decision button operation processing executed by the MPU in the audio lamp control device in the 19th control example. [Figure 585] 11 is a flow chart showing the performance button operation process executed by the MPU in the audio lamp control device in the 19th control example. [Figure 586]11 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the 19th control example. [Figure 587] 19th control example (a) shows an example of a display screen when a change operation to a chance-up mode is performed during the second half of the variable performance period in a state in which the normal mode displayed on the third pattern display device in the 20th control example is set, and (b) shows an example of a display screen when a change operation to a chance-up mode is changed during the first half of the variable performance period in which the normal mode displayed on the third pattern display device in the 19th control example is set. [Figure 588] 19th control example (a) shows an example of a display screen in which a mode is selected during a change in the displacement displayed on the third pattern display device in the 20th control example, and (b) shows an example of a display screen in which a mode is selected during a change in the jackpot displayed on the third pattern display device in the 19th control example. [Figure 589] 19 (a) is a diagram schematically showing the configuration of the performance mode selection area during the outage fluctuation in the 20th control example, and (b) is a diagram schematically showing the configuration of the performance mode selection area during the jackpot fluctuation in the 19th control example. [Figure 590] 11 is a diagram showing an example of a performance in which a decision button is operated to switch to the chance-up mode during the second half of the period of the change in jackpot changes displayed on the third pattern display device in the 20th control example. [Figure 591] 10A (a) is a diagram showing an example of a display screen when the role is moved during special chart changes displayed on the third pattern display device in the 20th control example, and (b) is a diagram showing an example of a display screen 1 when the role displayed on the third pattern display device in the 20th control example is completely closed. [Figure 592] 10 is a diagram showing an example of a display screen 2 when the role displayed on the third pattern display device in the 20th control example is completely closed. [Figure 593] 10 is a timing chart showing a flow for setting a variable performance during special chart fluctuations when a performance custom selection operation is not performed during special chart fluctuations in the 20th control example. [Figure 594] 11 is a timing chart showing the relationship between the flow of setting the variable performance during special chart fluctuations and the performance custom selection operation when a performance custom selection operation is performed during special chart fluctuations in the 20th control example and the performance mode is changed during special chart fluctuations. [Figure 595] 11 is a timing chart showing the relationship between the flow of setting the variable performance during special chart fluctuations and the changeover during special chart fluctuations in the 20th control example and the performance custom selection operation is related to the flow of setting the variable performance during special chart fluctuations when the special chart fluctuations are performed during special chart fluctuations in the 20th control example. [Figure 596] 1 is a block diagram showing the configuration of a ROM within the audio lamp control device of a pachinko machine in the 20th control example. [Figure 597] 10 is a diagram schematically showing the specified contents of the performance custom information table set in the ROM of the audio lamp control device of a pachinko machine in the 20th control example. [Figure 598] 10 is a diagram schematically showing the specified contents of the second half preview performance selection table set in the ROM of the audio lamp control device of a pachinko machine in the 20th control example. [Figure 599] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 20th control example. [Figure 600] 11 is a flow chart showing a hold-off effect execution process executed by the MPU in the audio lamp control device in the 20th control example. [Figure 601] 11 is a flow chart showing a pending change effect setting process executed by the MPU in the audio lamp control device in the 20th control example. [Figure 602] 10 is a flow chart showing frame button input monitoring and performance processing executed by the MPU in the audio lamp control device in the 20th control example. [Figure 603] 10 is a flow chart showing the performance custom selection process executed by the MPU in the audio lamp control device in the 20th control example. [Figure 604] 10 is a flow chart showing decision button operation processing executed by the MPU in the audio lamp control device in the 20th control example. [Figure 605] 10 is a flow chart showing a performance custom execution process executed by the MPU in the audio lamp control device in the 20th control example. [Figure 606] 11 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the 20th control example. [Figure 607] 10 is a flow chart showing a variational effect update process executed by the MPU in the audio lamp control device in the 20th control example. [Figure 608] 1 is a rear view of a pachinko machine in the 21st control example. [Figure 609] 10A to 10B are schematic diagrams showing a procedure for changing the settings in the 21st control example, and (e) to (g) are schematic diagrams showing a procedure for confirming the settings in the 21st control example. [Figure 610] 10A is a diagram showing an example of a performance in which a character corresponding to the previous stopping pattern is conversation when the change of a special chart executed in the 21st control example begins, and (b) shows an example of a setting suggestion performance in which the next change is started after the design is stopped due to a special combination (7 reach missed) executed in the 21st control example. [Figure 611] 10A is a diagram showing an example of a display screen in which a character corresponding to a stopping pattern speaks during the demo performance executed in the 21st control example, and (b) shows an example of a display screen in which a character speaks during the voice fixation in the demo performance executed in the 21st control example. [Figure 612] 10.sub.10 (a) is a diagram showing an example of a pre-release color change signal display screen displayed on the third pattern display device in the 21st control example, (b) is a diagram showing an example of a pre-release color change signal display screen (when special chart is stopped) displayed on the third pattern display device in the 21st control example, (c) is a diagram showing an example of a chance display screen 1 (jump) displayed on the third pattern display device in the 21st control example, and (d) is a diagram showing an example of a chance display screen 2 (high-speed) displayed on the third pattern display device in the 21st control example. [Figure 613] 1 is a block diagram showing the electrical configuration of a pachinko machine in the 21st control example. [Figure 614] 1 is a block diagram showing the configuration of a sound output device of a pachinko machine in the 21st control example. [Figure 615] 10 is a diagram schematically showing the specified contents of a special symbolic jackpot random number table set in the ROM of the main control device of a pachinko machine in the 21st control example. [Figure 616] 1 is a block diagram showing the configuration of RAM in the main control device of a pachinko machine in the 21st control example. [Figure 617] 1 is a block diagram showing the configuration of a ROM within the audio lamp control device of a pachinko machine in the 21st control example. [Figure 618] 1 is a diagram schematically showing the specified contents of a voice command selection table set in the ROM of the voice lamp control device of a pachinko machine in the 21st control example. [Figure 619] 10 is a diagram schematically showing the specified contents of a pending action selection table set in the ROM of the audio lamp control device of a pachinko machine in the 21st control example. [Figure 620] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 21st control example. [Figure 621] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the audio output device of the pachinko machine in the 21st control example, and (b) is a block diagram showing the configuration of the RAM within the audio output device of the pachinko machine in the 21st control example. [Figure 622] 10 is a flow chart showing the startup process executed by the MPU in the main control device in the 21st control example. [Figure 623] 10 is a flow chart showing a setting value control process executed by an MPU within the main control device in the 21st control example. [Figure 624] 10 is a flow chart showing the startup process executed by the MPU in the audio lamp control device in the 21st control example. [Figure 625] 10 is a flow chart showing a standby process executed by the MPU in the audio lamp control device in the 21st control example. [Figure 626] 10 is a flow chart showing command determination processing executed by the MPU within the main control device in the 21st control example. [Figure 627] 10 is a flow chart showing a state command reception process executed by the MPU within the main control device in the 21st control example. [Figure 628] 10 is a flow chart showing a stop symbol type setting process executed by the MPU within the main control device in the 21st control example. [Figure 629] 10 is a flow chart showing a stop command process executed by the MPU within the main control device in the 21st control example. [Figure 630] 10 is a flow chart showing a hold-out effect execution process executed by the MPU within the main control device in the 21st control example. [Figure 631] 10 is a flow chart showing a pending action determination process executed by the MPU within the main control device in the 21st control example. [Figure 632]10 is a flow chart showing the main processing executed by the MPU in the audio output device in the 21st control example. [Figure 633] 10 is a flow chart showing command determination processing executed by the MPU in the audio output device in the 21st control example. [Figure 634] 10 is a flow chart showing audio setting processing executed by the MPU in the audio output device in the 21st control example. [Figure 635] 10A (a) is a diagram showing an example of a display screen displayed on the third pattern display device in the 22nd control example when the pattern stock reach begins, and (b) is a diagram showing an example of a display screen displayed on the third pattern display device in the 22nd control example when the pattern stock is completed, and is shown. [Figure 636] 10A (a) is a diagram showing an example of a display screen in which the stock pattern displayed on the third pattern display device in the 22nd control example disappears from the screen, and (b) is a diagram showing an example of a display screen in which the reach pattern is switched with the stock pattern displayed on the third pattern display device in the 22nd control example. [Figure 637] 12. FIG. 12 is a diagram schematically showing the configuration of the liquid crystal display of the third pattern display device in the 22nd control example, FIG. 12 is a diagram showing an example of a display screen displayed on the spare layer of the third pattern display device in the 22nd control example, FIG. 12 is a diagram showing an example of a display screen displayed on the main layer of the third pattern display device in the 22nd control example, and FIG. 12 is a diagram showing an example of a display screen displayed on the secondary layer of the third pattern display device in the 22nd control example. [Figure 638] 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10. 10 [Figure 639] 1 is a block diagram showing the configuration of a ROM within the audio lamp control device of a pachinko machine in the 22nd control example. [Figure 640] 10 is a diagram schematically showing the specified contents of the pattern stock reach selection table set in the ROM of the audio lamp control device of a pachinko machine in the 22nd control example. [Figure 641] 1 is a block diagram showing the electrical configuration within the display control device of a pachinko machine in the 22nd control example. [Figure 642] 14 is a diagram schematically showing an example of a drawing list in the 22nd control example. [Figure 643] 10 is a flow chart showing a normal state performance mode determination process executed by the MPU in the audio lamp control device in the 22nd control example. [Figure 644] 10 is a flow chart showing command determination processing executed by the MPU in the display control device in the 22nd control example. [Figure 645] 10 is a flow chart showing processing command processing executed by the MPU in the display control device in the 22nd control example. [Figure 646] 10 is a flow chart showing a drawing process executed by the MPU in the display control device in the 22nd control example. [Figure 647] 10A (a) is a diagram showing an example of a display screen displayed on the third pattern display device in the 22nd control example when the pattern stock reach begins, and (b) is a diagram showing an example of a display screen displayed on the third pattern display device in the 22nd control example when the pattern stock is completed, and is shown. [Figure 648] 10A (a) is a diagram showing an example of a display screen in which the stock pattern displayed on the third pattern display device in the 22nd control example moves, and (b) is a diagram showing an example of a display screen in which a new reach line is formed from the stock pattern displayed on the third pattern display device in the 22nd control example. [Figure 649] 19th control example (a) shows a game machine in a movable state of the great sword role in a modified example of the 19th control example, and (b) shows an example of a display screen when special chart changes start during adjustment of the amount of light displayed on the third pattern display device in the 19th control example. [Figure 650] 10A and 10B are diagrams showing an example of a display screen when the shutter closed reach is displayed on the third display device in a modified example of the 19th control example, and (b) shows an example of a display screen when the shutter closed reach is developed when the shutter closed reach is displayed on the third pattern display device in a modified example of the 19th control example. [Figure 651] 10A is a diagram showing an example of a display screen when the shutter closed reach is displayed on the third display device in a modification of the 19th control example, and (b) shows an example of a display screen when the shutter displayed on the third pattern display device in a modification of the 19th control example is fully opened. [Figure 652] 10A (a) is a diagram showing an example of a battle performance start screen displayed on the third pattern display device in the 23rd control example, and (b) is a diagram showing an example of a battle performance preemptive attack screen displayed on the third pattern display device in the 23rd control example. [Figure 653] 10A (a) is a diagram showing an example of a battle performance button pressing instruction screen displayed on the third pattern display device in the 23rd control example, and (b) is a diagram showing an example of a battle performance button pressing instruction screen displayed on the third pattern display device in the 23rd control example. [Figure 654] 11 is a diagram showing an example of a screen in which a long press of the battle performance button is displayed on the third pattern display device in the 23rd control example. [Figure 655] 6A and 6B are diagrams showing an example of the flow of reducing the gauge when the button is repeatedly pressed, displayed on the third pattern display device in the 23rd control example. [Figure 656] 6A to 6D are diagrams showing an example of the flow of reducing the gauge when long pressing the button, displayed on the third pattern display device, in the 23rd control example. [Figure 657] 10A (a) is a diagram showing an example of a display screen displayed on the third pattern display device in the 23rd control example at the start of a defeating performance, and (b) is a diagram showing an example of a first start screen displayed on the third pattern display device in the 23rd control example. [Figure 658] 10A (a) is a diagram showing an example of the first attack screen displayed on the third pattern display device in the 23rd control example, and (b) is a diagram showing an example of the second start screen displayed on the third pattern display device in the 23rd control example. [Figure 659] 10A (a) is a diagram showing an example of the second attack screen displayed on the third pattern display device in the 23rd control example, and (b) is a diagram showing an example of the third start screen displayed on the third pattern display device in the 23rd control example. [Figure 660] 10 is a diagram showing an example of the third attack screen displayed on the third pattern display device in the 23rd control example. [Figure 661] 10 is a diagram showing an example of a chance-up effect screen during normal fluctuations displayed on the third pattern display device in the 23rd control example. [Figure 662] 10 is a diagram showing the number of special pattern changes in the 23rd control example and the contents of the opportunity-up effect that is executed. [Figure 663] 1 is a block diagram showing the configuration of a ROM within the audio lamp control device of a pachinko machine in the 23rd control example. [Figure 664] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 23rd control example. [Figure 665] 14 is a diagram schematically showing the prescribed contents of a long-press performance scenario table set in the ROM of the audio lamp control device of a pachinko machine in the 23rd control example. [Figure 666] 10. (a) is a diagram schematically showing the specified contents of the final HP selection table when the discrepancy is set in the ROM of the voice lamp control device of the pachinko machine in the 23rd control example, and (b) is a diagram schematically showing the specified contents of the entry lottery table set in the ROM of the voice lamp control device of the pachinko machine in the 23rd control example. [Figure 667] 14 is a diagram schematically showing the rules of the cancellation lottery table set in the ROM of the audio lamp control device of a pachinko machine in the 23rd control example. [Figure 668] 14 is a diagram schematically showing the specified contents of the additional reduction value selection table set in the ROM of the audio lamp control device of a pachinko machine in the 23rd control example. [Figure 669] 10A (a) is a diagram schematically showing the rules of the chance preview lottery table set in the ROM of the voice lamp control device of the pachinko machine in the 23rd control example, and (b) is a diagram schematically showing the rules of the chance mode selection table set in the ROM of the voice lamp control device of the pachinko machine in the 23rd control example. [Figure 670] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 23rd control example. [Figure 671] 10 is a flow chart showing a time-saving state performance mode determination process executed by the MPU in the audio lamp control device in the 23rd control example. [Figure 672] 10 is a flow chart showing a process for determining the special-mode state performance mode executed by the MPU in the audio lamp control device in the 23rd control example. [Figure 673] 10 is a flow chart showing a normal state performance mode determination process executed by the MPU in the audio lamp control device in the 23rd control example. [Figure 674]10 is a flow chart showing a defeat reach performance determination process executed by the MPU within the audio lamp control device in the 23rd control example. [Figure 675] 10 is a flow chart showing a chance-up performance determination process executed by the MPU in the audio lamp control device in the 23rd control example. [Figure 676] 10 is a flow chart showing the performance button operation process executed by the MPU in the audio lamp control device in the 23rd control example. [Figure 677] 10 is a flow chart showing a long-press performance setting process executed by the MPU in the audio lamp control device in the 23rd example of control. [Figure 678] 10 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the 23rd control example. [Figure 679] 10 is a flow chart showing long-pressing and pressing processes executed by the MPU in the audio lamp control device in the 23rd example of control. [Figure 680] 1 is a front view schematically showing the game board of a pachinko machine in the 24th control example. [Figure 681] 6A and 6B are diagrams showing an example of the opening performance of a jackpot displayed on the third pattern display device in the 24th control example. [Figure 682] 10A (a) is a diagram showing an example of the opening performance of a jackpot displayed on the third pattern display device in the 24th control example, and (b) is a diagram showing an example of the display mode displayed on the third pattern display device during the time-saving state in the 24th control example. [Figure 683] 6A and 6B are diagrams showing an example of the display mode of the third pattern display device when an additional time remaining time is performed during the time-saving state in the 24th control example. [Figure 684] 6A and 6B are diagrams showing an example of the display mode of the third pattern display device when the continuity rate increase effect is performed during the time-saving state in the 24th control example. [Figure 685] 6A and 6B are diagrams showing an example of the display mode of the third pattern display device when the final judgement performance is performed after the time-saving state in the 24th control example is completed. [Figure 686] 10 is a diagram showing changes over time in the performance mode after winning the jackpot in the 24th control example. [Figure 687] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the 24th control example, and (b) is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the 24th control example. [Figure 688] 1. (a) is a diagram schematically showing the specified contents of the first random number table set in the ROM of the main control device in the 24th control example, (b) is a diagram schematically showing the specified contents of the second random number table set in the ROM of the main control device in the 24th control example, (c) is a diagram schematically showing the specified contents of the small random number table set in the ROM of the main control device in the 24th control example, and (d) is a diagram schematically showing the specified contents of the direct hit table in the 24th control example. [Figure 689] 14 is a diagram schematically showing the specified contents of the V-ac-accepted table in the 24th control example. [Figure 690] 10 is a block diagram showing the structure of a variation pattern table set in the ROM of the main control device in the 24th control example, and (b) is a diagram schematically showing the specified contents of the S rank table in the 24th control example. [Figure 691] 10A (a) is a diagram schematically showing the specified contents of the A-rank table in the 24th control example, and (b) is a diagram schematically showing the specified contents of the table in the 24th control example when one change occurs after the time-saving ends. [Figure 692] 10A is a diagram schematically showing the specified contents of the normal state fluctuation pattern scenario table set in the ROM of the main control device in the 24th control example, and (b) is a diagram schematically showing the lash performance for each rank. [Figure 693] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 24th control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 24th control example. [Figure 694] 10.

[0011] FIG. 1 (a) is a diagram schematically showing the specified content of the rank-up performance table set in the ROM of the voice lamp control device of the pachinko machine in the 24th control example, and FIG. 1 (b) is a diagram schematically showing the specified content of the rank-up determination table set in the ROM of the voice lamp control device of the pachinko machine in the 24th control example. [Figure 695] 10 is a flow chart showing the first special pattern change start process executed by the MPU in the main control device in the 24th control example. [Figure 696] 10 is a flow chart showing the first special pattern determination process executed by the MPU within the main control device in the 24th control example. [Figure 697] 10 is a flow chart showing the first special pattern variation pattern selection process executed by the MPU within the main control device in the 24th control example. [Figure 698] 10 is a flow chart showing a special diagram 1 game state update process executed by the MPU in the main control device in the 24th control example. [Figure 699] 10 is a flow chart showing a first special pattern change stop process executed by the MPU within the main control device in the 24th control example. [Figure 700] 10 is a flow chart showing a second special pattern change start process executed by the MPU in the main control device in the 24th control example. [Figure 701] 10 is a flow chart showing a second special pattern determination process executed by the MPU within the main control device in the 24th control example. [Figure 702] 10 is a flow chart showing a small win lottery process executed by an MPU within the main control device in the 24th control example. [Figure 703] 10 is a flow chart showing a second special pattern variation pattern selection process executed by the MPU within the main control device in the 24th control example. [Figure 704] 10 is a flow chart showing a special diagram 2 game state update process executed by the MPU in the main control device in the 24th control example. [Figure 705] 10 is a flow chart showing a second special pattern change stop process executed by the MPU within the main control device in the 24th control example. [Figure 706] 10 is a flow chart showing a special diagram 2 missing stop processing executed by the MPU in the main control device in the 24th control example. [Figure 707] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the 24th control example. [Figure 708] 10 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the 24th control example. [Figure 709] 10 is a flow chart showing the final judgement performance process executed by the MPU in the audio lamp control device in the 24th control example. [Figure 710] 10 is a flow chart showing time-saving performance setting processing executed by the MPU in the audio lamp control device in the 24th control example. [Figure 711] 10 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the 24th control example. [Figure 712] 10 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the 24th control example. [Figure 713] 10 is a flow chart showing the special diagram 2 performance mode setting process executed by the MPU in the audio lamp control device in the 24th control example. [Figure 714] 1 is a front view schematically showing the game board of a pachinko machine in the 25th control example. [Figure 715] 10A and 10B are diagrams showing an example of a display mode displayed on the third pattern display device during the special mode state in the 25th control example, and (b) shows an example of a display mode of a display mode in the case where a special diagram 1 jackpot change begins during the special mode state in the 25th control example. [Figure 716] 10. (a) is a diagram showing an example of a display mode displayed on the third pattern display device when the change time of the special chart 1 jackpot changes occurs during the special change state in the 25th control example, and (b) is a diagram showing an example of a display mode displayed on the third pattern display device when the change time of the special chart 1 jackpot changes occurs during the special change state in the 25th control example, and when the change time of the special chart 2 small pattern display device has elapsed before the change time of the special chart 1 jackpot changes has elapsed before the change time of the special chart 1 jackpot changes has elapsed. [Figure 717] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the 25th control example, and FIG. 10 is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the 25th control example. [Figure 718] 1. (a) is a diagram schematically showing the specified contents of the first random number table set in the ROM of the main control device in the 25th control example, and (b) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 25th control example, and (c) is a diagram schematically showing the specified contents of the small random number table set in the ROM of the main control device in the 25th control example. [Figure 719]10 is a block diagram showing the configuration of a variation pattern table set in the ROM of the main control device in the 25th control example, and (b) is a diagram schematically showing the specified contents of the special-speed and time-saving table in the 25th control example. [Figure 720] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 25th control example. [Figure 721] 10 is a flow chart showing the first special pattern change start process executed by the MPU in the main control device in the 25th control example. [Figure 722] 10 is a flow chart showing the first special pattern determination process executed by the MPU within the main control device in the 25th control example. [Figure 723] 10 is a flow chart showing the first special pattern variation pattern selection process executed by the MPU within the main control device in the 25th example of control. [Figure 724] 10 is a flow chart showing the change start update process executed by the MPU in the main control device in the 25th control example. [Figure 725] 10A and 10B are diagrams showing the timing of subtracting the number of times of time reduction in the 25th control example. [Figure 726] 10 is a flow chart showing the first special pattern change stop processing executed by the MPU in the main control device in the 25th example of control. [Figure 727] 10 is a flow chart showing the update process when the fluctuation is stopped, executed by the MPU in the main control device in the 25th control example. [Figure 728] 10 is a flow chart showing a second special pattern change start process executed by the MPU in the main control device in the 25th control example. [Figure 729] 10 is a flow chart showing a second special pattern determination process executed by the MPU within the main control device in the 25th control example. [Figure 730] 10 is a flow chart showing a second special pattern change stop process executed by the MPU in the main control device in the 25th control example. [Figure 731] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the 25th control example. [Figure 732] 10 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the 25th control example. [Figure 733] 10 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the 25th control example. [Figure 734] 10 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the 25th control example. [Figure 735] 10A and 10B are diagrams showing an example of a display mode displayed on the third pattern display device in the 26th control example when the special change in the special change 2 or small hit change or special fail change is set in the zone of the special change in the 26th control example, and (b) shows an example of a display mode of the third pattern display device in the case where the special change in the 26th control example when the special change in the small hit change or special fail change is performed and a pinch effect is performed. [Figure 736] 10 is a diagram showing an example of the display mode of the third pattern display device at the end of the pinch effect executed based on the execution of the special diagram 2 small hit fluctuation during the zone of increasing the special change ratio in the 26th control example. [Figure 737] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the 26th control example, and FIG. 10 is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the 26th control example. [Figure 738] 10 is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 26th control example. [Figure 739] 10.

[0011] FIG. 1 (a) is a block diagram showing the configuration of a variation pattern table set in the ROM of the main control device in the 26th control example, FIG. 1 (b) is a diagram showing the specified contents of the zone table in the 26th control example, and FIG. 1 (c) is a diagram showing the specified contents of the special-speed and time-saving table in the 26th control example. [Figure 740] 14 is a diagram schematically showing the specified contents of a variation pattern scenario table set in the ROM of the main control device in the 26th control example. [Figure 741] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 26th control example. [Figure 742] 10 is a flow chart showing the first special pattern variation pattern selection process executed by the MPU within the main control device in the 26th control example. [Figure 743] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the 26th control example. [Figure 744] 10 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the 26th control example. [Figure 745] 10 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the 26th control example. [Figure 746] 10 is a flow chart showing the special diagram 2 performance mode setting process executed by the MPU in the audio lamp control device in the 26th control example. [Figure 747] 10A and 10B are diagrams showing an example of a display mode displayed on the third pattern display device during the special state in the 27th control example, and (b) shows an example of a display mode displayed on the third pattern display device during the time-saving state in the 27th control example. [Figure 748] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the main control device of the pachinko machine in the 27th control example, and FIG. 10 is a block diagram showing the configuration of the RAM within the main control device of the pachinko machine in the 27th control example. [Figure 749] 10 is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 27th control example. [Figure 750] 10.

[0011] FIG. 1 (a) is a block diagram showing the configuration of a variation pattern table set in the ROM of the main control device in the 27th control example, FIG. 1 (b) is a diagram schematically showing the specified contents of the time-saving table in the 27th control example, and FIG. 1 (c) is a diagram schematically showing the specified contents of the special-change table in the 27th control example. [Figure 751] 10 is a flow chart showing the first special pattern variation pattern selection process executed by the MPU within the main control device in the 27th control example. [Figure 752] 10 is a flow chart showing the change-initial update process executed by the MPU within the main control device in the 27th control example. [Figure 753] 10 is a flow chart showing the update process when the fluctuation is stopped, executed by the MPU in the main control device in the 27th control example. [Figure 754] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the 27th control example. [Figure 755] 10 is a flow chart showing a state command reception process executed by the MPU in the audio lamp control device in the 27th control example. [Figure 756] 10.

[0021] FIG. 1 (a) is a diagram showing an example of the display mode of the third pattern display device in a time-saving state set based on the occurrence of a time-saving pattern winning during the normal state in the first modification of the 24th control example, and FIG. 1 (b) is a diagram showing an example of the display mode of the third pattern display device in a time-saving state reset based on the occurrence of a time-saving pattern winning during the time-saving state in a time-saving state in a first modification of the 24th control example. [Figure 757] 10A and 10B are diagrams showing an example of the display mode of the third pattern display device when a time-saving pattern winning occurs during the time-saving state in the second modification of the 24th control example. [Figure 758] 10A and 10B are diagrams showing an example of the display mode of the third pattern display device in the second modification of the 24th control example, when a rank notification effect is performed during a time-saving state that is reset based on the fact that a time-saving pattern winning has occurred during a time-saving state. [Figure 759] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the second modification of the 24th control example. [Figure 760] 10 is a flow chart showing a special diagram 2 performance mode setting process executed by the MPU in the audio lamp control device in the second modification of the 24th control example. [Figure 761] 10 is a flow chart showing a secret performance setting process executed by the MPU in the audio lamp control device in the second modification of the 24th control example. [Figure 762] 10 is a flow chart showing a non-confidential performance setting process executed by the MPU in the audio lamp control device in the second modification of the 24th control example. [Figure 763] 10A (a) is a diagram showing an example of a battle performance start screen displayed on the third pattern display device in the first performance modification of the 23rd control example, and (b) is a diagram showing an example of a battle performance preemptive attack screen displayed on the third pattern display device in the first performance modification of the 23rd control example. [Figure 764] 10A and 10B are diagrams showing an example of display of long buttons in the first performance modification of the 23rd control example. [Figure 765] 10 is a flow chart showing a time-saving state performance mode determination process executed by the MPU in the audio lamp control device in the first performance modification of the 23rd control example. [Figure 766] 10A (a) is a diagram showing an example of an additional performance start screen displayed on the third design display device in the second performance modification of the 23rd control example, and (b) is a diagram showing an example of an additional performance starting screen displayed on the third design display device in the second performance modification of the 23rd control example. [Figure 767] 10. 10 is a diagram showing an example of a pseudo-MAX jackpot performance start screen displayed on the third pattern display device in the second performance modification of the 23rd control example, and (b) shows an example of a pseudo-MAX jackpot performance during the performance modification of the 23rd control example, and a diagram showing an example of a pseudo-MAX jackpot performance during the performance modification of the 23rd control example. [Figure 768] 10A (a) is a diagram showing an example of a pseudo-hold continuous performance start screen displayed on the third pattern display device in the second performance modification of the 23rd control example, and (b) is a diagram showing an example of a pseudo-hold continuous performance during performance modification of the 23rd control example, and a diagram showing an example of a pseudo-hold continuous performance during performance modification of the 23rd control example. [Figure 769] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the second performance modification of the 23rd control example. [Figure 770] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the second performance modification of the 23rd control example. [Figure 771] 10 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the second performance modification of the 23rd control example. [Figure 772] 10A (a) is a diagram showing an example of a performance screen in a special state displayed on the third pattern display device in the 28th control example, and (b) is a diagram showing an example of a Jackpot performance screen in a special state displayed on the third pattern display device in the 28th control example. [Figure 773] 10 is a block diagram showing the structure of a variation pattern table for special modes that is included in the ROM in the main control device of a pachinko machine in the 28th control example. [Figure 774] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 28th control example. [Figure 775] 10 is a flow chart showing a process for determining the special state performance mode executed by the MPU in the audio lamp control device in the 28th control example. [Figure 776] 1 is a front view of the pachinko machine of the 29th control example. [Figure 777] 1 is a front view of the gaming board of the pachinko machine of the 29th control example. [Figure 778] 1 is a partial enlarged view of the gaming board of the pachinko machine of the 29th control example. [Figure 779] 1 is a front perspective view of the V-winning device of the 29th control example. [Figure 780] 1 is an exploded front perspective view of the V winning device of the 29th control example. [Figure 781] 1 is an operational view of the V-winning device of the 29th control example seen from the rear side. [Figure 782] 10A is a schematic view of the V-window of the V-window of the V-window of the V-window of the V-window of the 29th control example in plan viewed in a state in which the opening / closing door is closed, and (b) is a schematic view of the V-window of the V-window of the V-window of the V-window of the 29th control example in plan viewed in plan view. [Figure 783] 10A is a front view of the performance button of the pachinko machine in the 29th control example, and (b) is a front view of the selection button of the pachinko machine in the 29th control example. [Figure 784] 1 is a rear view of the gaming board of the pachinko machine in the 29th control example. [Figure 785] 10A is a diagram schematically showing the area division setting and the effective line setting of the display screen in the 29th control example, and (b) is a diagram illustrating the actual display screen in the 29th control example. [Figure 786] 10A (a) is a diagram showing an example of a jackpot performance screen displayed on the third pattern display device in the 29th control example after winning the jackpot after winning the normal state, and (b) is a diagram showing an example of an enemy performance screen displayed on the third pattern display device in the 29th control example. [Figure 787] 10A (a) is a diagram showing an example of the screen during the interval after the second round, displayed on the third pattern display device in the 29th control example, and (b) is a diagram showing an example of the screen during the successful screen during the six rounds (final round) displayed on the third pattern display device in the 29th control example. [Figure 788] 788(a) is a diagram showing an example of the third round performance screen displayed on the third pattern display device in the 29th control example, and (b) is a diagram showing an example of the display screen displayed on the third pattern display device in the 29th control example, when a button is pressed in FIG. 788(a) displayed on the third pattern display device in the 29th control example. [Figure 789] 788(a) is a diagram showing an example of a display screen in which a button is not pressed in FIG. 788(a) displayed on the third pattern display device in the 29th control example, and (b) is a diagram showing an example of a successful revival performance screen in the six rounds (final round) displayed on the third pattern display device in the 29th control example. [Figure 790] 10A (a) is a diagram showing an example of a display screen in the time-saving state (in a rush) displayed on the third pattern display device in the 29th control example, and (b) is a diagram showing an example of a hit screen in the time-saving state (in a rush) displayed on the third pattern display device in the 29th control example. [Figure 791] 10A (a) is a diagram showing an example of a small-hit game screen in a time-saving state (during rush) displayed on the third pattern display device in the 29th control example, and (b) is a diagram showing an example of a display screen in the case where V displayed on the third pattern display device in the 29th control example is aimed and V is won during the first performance period. [Figure 792] 10 is a diagram showing an example of a display screen after the first performance period has passed since FIG. 791(b) displayed on the third pattern display device in the 29th control example. [Figure 793] 10A is a diagram showing an example of a display screen for the final change (off) of the time-saving state (distance) displayed on the third pattern display device in the 29th control example, and (b) shows an example of a pull-back performance screen after the time-saving state is completed, displayed on the third pattern display device in the 29th control example. [Figure 794] 10A (a) is a diagram showing an example of a pull-back performance end screen displayed on the third pattern display device in the 29th control example, and (b) is a diagram showing an example of a lash result display screen displayed on the third pattern display device in the 29th control example. [Figure 795] 10. (a) is a diagram showing an example of the NEXT performance screen (2nd round of rush jackpots) displayed on the third pattern display device in the 29th control example, and (b) is a diagram showing an example of the NEXT performance result screen (without hold consecutive or no round promotion) displayed on the third pattern display device in the 29th control example. [Figure 796] 10A (a) is a diagram showing an example of a NEXT performance result screen (with round promotion) displayed on the third pattern display device in the 29th control example, and (b) is a diagram showing an example of a NEXT performance result screen (with hold consecutive) displayed on the third pattern display device in the 29th control example. [Figure 797] 10A (a) is a diagram showing an example of a small win game screen in a hold-continued state displayed on the third pattern display device in the 29th control example, and (b) is a diagram showing an example of a NEXT performance screen in a hold-continued state displayed on the third pattern display device in the 29th control example, and a diagram showing an example of a NEXT performance screen in a hold-continued state displayed on the third pattern display device in the 29th control example. [Figure 798] 10 is a diagram showing an example of a display screen when the number of display rounds exceeds MAX (9 rounds) in the continuous hold sequence displayed on the third pattern display device in the 29th control example. [Figure 799] 10A (a) is a diagram showing an example of a display screen in the standby state displayed on the third pattern display device in the 29th control example, and (b) is a diagram showing an example of a display mode selection screen displayed on the third pattern display device in the 29th control example. [Figure 800] 10A (a) is a diagram showing an example of a stage transition performance screen during special chart changes displayed on the third pattern display device in the 29th control example, and (b) is a diagram showing an example of a stage fixed operation screen during special chart changes displayed on the third pattern display device in the 29th control example. [Figure 801] 10 is a diagram showing the game flow of a pachinko machine in the 29th control example. [Figure 802] 1 is a block diagram showing the electrical configuration of a pachinko machine in the 29th control example. [Figure 803] 14 is a diagram schematically showing the structure of various counters in the 29th control example. [Figure 804] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM of the main control device in the 29th control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 29th control example. [Figure 805] 1. (a) is a block diagram showing the structure of the first random number table set in the ROM of the main control device in the 29th control example, and (b) is a diagram schematically showing the specified contents of the special symbol 1 random number table set in the ROM of the main control device in the 29th control example, and (c) is a diagram schematically showing the specified contents of the special symbol 2 random number table set in the ROM of the main control device in the 29th control example. [Figure 806] 10.

[0011] FIG. 10 is a block diagram showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 29th control example, and FIG. 10 is a diagram showing the specified contents of the time-saving grant table set in the ROM of the main control device in the 29th control example. [Figure 807]10 is a diagram schematically showing the specified contents of a small hit type selection table set in the ROM of the main control device in the 29th control example. [Figure 808] 10.

[0011] FIG. 10 (a) is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the main control device in the 29th control example, and FIG. 10 (b) is a diagram schematically showing the specified contents of the normal variation pattern table set in the ROM of the main control device in the 29th control example. [Figure 809] 10.

[0011] FIG. 1 (a) is a diagram schematically showing the specified contents of the time-saving fluctuation pattern table set in the ROM of the main control device in the 29th control example, FIG. 1 (b) is a diagram schematically showing the specified contents of the special time-saving fluctuation pattern table set in the ROM of the main control device in the 29th control example, and FIG. 1 (c) is a diagram schematically showing the specified contents of the time-saving final time-saving fluctuation pattern table set in the ROM of the main control device in the 29th control example. [Figure 810] 14 is a diagram schematically showing the specified contents of a variation pattern scenario table set in the ROM of the main control device in the 29th control example. [Figure 811] 10.

[0021] FIG. 1 (a) is a block diagram showing the configuration of the ROM of the voice lamp control device in the 29th control example, and FIG. 10 (b) is a block diagram showing the configuration of the RAM of the voice lamp control device in the 29th control example. [Figure 812] 10A is a diagram schematically showing the specified contents of the defeat number selection table set in the ROM of the voice lamp control device in the 29th control example, and (b) is a diagram schematically showing the specified contents of the defeat performance mode selection table set in the ROM of the voice lamp control device in the 29th control example. [Figure 813] 10 is a diagram schematically showing the specified contents of the additional reduction value selection table set in the ROM of the audio lamp control device in the 29th control example. [Figure 814] 10A (a) is a diagram schematically showing the specified contents of the performance stage data table set in the ROM of the audio lamp control device in the 29th control example, and (b) is a diagram schematically showing the specified contents of the game environment data table set in the ROM of the audio lamp control device in the 29th control example. [Figure 815] 11 is a flow chart showing timer interrupt processing executed by the MPU in the main control device in the 29th control example. [Figure 816] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 29th control example. [Figure 817] 10 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the 29th control example. [Figure 818] 11 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the 29th control example. [Figure 819] 10 is a flow chart showing a small hit start setting process executed by the MPU in the main control device in the 29th control example. [Figure 820] 10 is a flow chart showing time-saving update processing executed by the MPU in the main control device in the 29th control example. [Figure 821] 10 is a flow chart showing a small-ticket time-saving update process executed by an MPU within the main control device in the 29th control example. [Figure 822] 10 is a flow chart showing the start-up winning process executed by the MPU in the main control device in the 29th control example. [Figure 823] 10 is a flow chart showing a preliminary process executed by an MPU within the main control device in the 29th control example. [Figure 824] 10 is a flow chart showing normal pattern variation processing executed by the MPU within the main control device in the 29th control example. [Figure 825] 11 is a flow chart showing a process of passing through gates executed by the MPU within the main control device in the 29th control example. [Figure 826] 11 is a flow chart showing V inlet passing processing executed by the MPU within the main control device in the 29th control example. [Figure 827] 10 is a flow chart showing V-passing processing executed by the MPU within the main control device in the 29th control example. [Figure 828] 10 is a flow chart showing NMI processing executed by the MPU in the main control device in the 29th control example. [Figure 829] 10 is a flow chart showing the startup process executed by the MPU in the main control device in the 29th control example. [Figure 830] 10 is a flow chart showing the main processing executed by the MPU within the main control device in the 29th control example. [Figure 831] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the 29th control example. [Figure 832] 10 is a flow chart showing small hit control processing executed by the MPU in the main control device in the 29th control example. [Figure 833] 10 is a flow chart showing the startup process executed by the MPU in the audio lamp control device in the 29th control example. [Figure 834] 10 is a flow chart showing the main processing executed by the MPU in the audio lamp control device in the 29th control example. [Figure 835] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the 29th control example. [Figure 836] 11 is a flow chart showing pending information-related processing executed by the MPU in the audio lamp control device in the 29th control example. [Figure 837] 10 is a flow chart showing status command processing executed by the MPU in the audio lamp control device in the 29th control example. [Figure 838] 10 is a flow chart showing hit-related processes executed by the MPU in the audio lamp control device in the 29th control example. [Figure 839] 10 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the 29th control example. [Figure 840] 11 is a flow chart showing an in-round performance process executed by an MPU within the audio lamp control device in the 29th control example. [Figure 841] 10 is a flow chart showing initial jackpot related processing executed by the MPU in the audio lamp control device in the 29th control example. [Figure 842] 10 is a flow chart showing a process for determining the defeat performance mode executed by the MPU in the audio lamp control device in the 29th control example. [Figure 843] 10 is a flow chart showing the initial jackpot round performance process executed by the MPU in the audio lamp control device in the 29th control example. [Figure 844] 10 is a flow chart showing the initial interval performance process executed by the MPU in the audio lamp control device in the 29th control example. [Figure 845] 10 is a flow chart showing small hit-related processes executed by the MPU in the audio lamp control device in the 29th control example. [Figure 846] 10 is a flow chart showing variation display setting processing executed by the MPU in the audio lamp control device in the 29th control example. [Figure 847] 11 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 29th control example. [Figure 848] 10 is a flow chart showing time-saving performance setting processing executed by the MPU in the audio lamp control device in the 29th control example. [Figure 849] 11 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the 29th control example. [Figure 850] 11 is a flow chart showing the update process during small-hit games executed by the MPU in the audio lamp control device in the 29th control example. [Figure 851] 10 is a flow chart showing frame button input monitoring and performance processing executed by the MPU in the audio lamp control device in the 29th control example. [Figure 852] 11 is a flow chart showing fixed mode setting processing executed by the MPU in the audio lamp control device in the 29th control example. [Figure 853] 11 is a flow chart showing the performance button operation process executed by the MPU in the audio lamp control device in the 29th control example. [Figure 854] 10. (a) is a diagram showing an example of a small win game screen (in the case of special 2 hold 0) of the hold players displayed on the third pattern display device in the 30th control example, and (b) is a diagram showing an example of a small win game screen (in the case of special 2 hold acquisition) of the hold players displayed on the third pattern display device in the 30th control example. [Figure 855] 10 is a flow chart showing time-saving update processing executed by the MPU in the main control device in the 30th control example. [Figure 856] 10 is a flow chart showing small hit control processing executed by the MPU in the main control device in the 30th control example. [Figure 857] 10 is a flow chart showing a small-ticket time-saving update process executed by an MPU within the main control device in the 30th example of control. [Figure 858]10 is a flow chart showing pending information-related processing executed by the MPU in the audio lamp control device in the 30th control example. [Figure 859] 10 is a flow chart showing a small-hit-half-hold-acquisition process executed by the MPU in the audio lamp control device in the 30th control example. [Figure 860] 10 is a flow chart showing small hit-related processes executed by the MPU in the audio lamp control device in the 30th control example. [Figure 861] 10 is a flow chart showing a small-stop guide mode setting process executed by the MPU in the audio lamp control device in the 30th control example. [Figure 862] 10. (a) is a diagram showing an example of a display screen in which a third special chart hold is obtained during the change in special chart 1 displayed on the third pattern display device in the 31st control example, and (b) is a diagram showing an example of a display screen in which only the third special chart hold pattern displayed on the third pattern display device in the 31st control example, the actions are shifted. [Figure 863] 10A (a) is a diagram showing an example of a special diagram 1 stop display screen displayed on the third pattern display device in the 31st control example, and (b) is a diagram showing an example of a special diagram 1st order change start screen displayed on the third pattern display device in the 31st control example. [Figure 864] 10.

[0021] FIG. 10A is a diagram showing an example of a hold change action display screen displayed on the third pattern display device in the 31st control example, and (b) is a diagram showing an example of a hold change display screen displayed on the third pattern display device in the 31st control example, and (c) is a diagram showing an example of a hold shift display screen displayed on the third pattern display device in the 31st control example. [Figure 865] 10A (a) is a diagram showing an example of a display screen before stage change when synchronizing the hold pattern action displayed on the third pattern display device in the 31st control example, and (b) is a diagram showing an example of a display screen after stage change when synchronizing the hold pattern action displayed on the third pattern display device in the 31st control example. [Figure 866] 11. FIG. 10A is a diagram showing an example of a display screen before stage change during asynchronous pending pattern action displayed on the third pattern display device in the 31st control example, and (b) shows an example of a display screen during stage change during asynchronous pending pattern action displayed on the third pattern display device in the 31st control example, and (c) shows an example of a display screen after stage change during asynchronous pending pattern action displayed on the third pattern display device in the 31st control example. [Figure 867] 1 is a block diagram showing the configuration of a ROM of the audio lamp control device in the 31st control example. [Figure 868] 14 is a diagram schematically showing the specified contents of a pending action data table set in the ROM of the main control device in the 31st control example. [Figure 869] 1 is a block diagram showing the configuration of the RAM of the audio lamp control device in the 31st control example. [Figure 870] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the 31st control example. [Figure 871] 10 is a flow chart showing winning command processing executed by the MPU in the audio lamp control device in the 31st control example. [Figure 872] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 31st control example. [Figure 873] 10 is a flow chart showing a hold mode determination process executed by the MPU in the audio lamp control device in the 31st control example. [Figure 874] 10 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the 31st control example. [Figure 875] 10 is a flow chart showing a hold-effect update process executed by the MPU in the audio lamp control device in the 31st control example. [Figure 876] 10 is a flow chart showing a fluctuating stage transition process executed by the MPU in the audio lamp control device in the 31st control example. [Figure 877] 10 is a flow chart showing a special mode determination process executed by the MPU in the audio lamp control device in the 31st control example. [Figure 878] 1 is a front view of the gaming board of the pachinko machine in the 32nd control example. [Figure 879] 1 is a partial enlarged view of the gaming board of the pachinko machine in the 32nd control example. [Figure 880] 1 is a front perspective view of the V winning device in the 32nd control example. [Figure 881] 1 is an exploded front perspective view of the V winning device in the 32nd control example. [Figure 882] 1 is an operational view of the V winning device in the 32nd control example seen from the rear side. [Figure 883] 10 is a schematic view of the V-window of the V-window of the V-window of the V-window of the V-window of the 32nd control example in plan viewed in a state in which the opening / closing door is closed, and (b) is a schematic view of the V-window of the V-window of the V-window of the 32nd control example in plan viewed in plan view. [Figure 884] 10A is a schematic diagram showing the state in which the decorative movable object in the 32nd control example is in the storage position, and (b) is a schematic diagram showing the state in which the decorative movable object in the 32nd control example is at a lower limit. [Figure 885] (a) is a schematic diagram showing the right-centered piece of the decorative movable vehicle in the 32nd control example, and (b) is a schematic diagram showing the right-centered piece of the decorative movable vehicle in the 32nd control example, and the left-centered piece of the decorative movable vehicle in the 32nd control example. [Figure 886] 1 is an exploded front perspective view of the decorative movable vehicle in the 32nd control example. [Figure 887] 1 is an exploded rear perspective view of the decorative movable vehicle in the 32nd control example. [Figure 888] 1 is an exploded front perspective view of the bar function in the 32nd control example. [Figure 889] 1 is an exploded rear perspective view of the bar function in the 32nd control example. [Figure 890] 1 is an exploded front perspective view of a rotor body in the 32nd control example. [Figure 891] 1 is an exploded rear perspective view of the rotor body in the 32nd control example. [Figure 892] 10A and 10B are diagrams showing the structure of the third pattern row in the 32nd control example, and (b) to (e) are diagrams schematically showing the stopping patterns of the rotary body parts in the 32nd control example. [Figure 893] 10A (a) is a diagram showing an example of a display screen when the special drawing is temporarily stopped displayed on the third pattern display device in the 32nd control example, and (b) is a diagram showing an example of a display screen when the relief chance presentation is started, displayed on the third pattern display device in the 32nd control example. [Figure 894] 10A (a) is a diagram showing an example of a case in which the relief opportunity presentation displayed on the third pattern display device in the 32nd control example is successful, and (b) is a diagram showing an example of a case in which the relief opportunity presentation displayed on the third pattern display device in the 32nd control example is failed. [Figure 895] 1 is a block diagram showing the electrical configuration of a pachinko machine in the 32nd control example. [Figure 896] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM of the audio lamp control device in the 32nd control example, and (b) is a block diagram showing the configuration of the RAM of the audio lamp control device in the 32nd control example. [Figure 897] 10.

[0011] FIG. 10 is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the audio lamp control device in the 32nd control example, and FIG. 10 is a diagram schematically showing the specified contents of the normal variation pattern selection table set in the ROM of the audio lamp control device in the 32nd control example. [Figure 898] 12. FIG. 12A is a diagram schematically showing the specified contents of the time-saving fluctuation pattern selection table set in the ROM of the voice lamp control device in the 32nd control example, and FIG. 12B is a diagram schematically showing the specified contents of the special time-saving fluctuation pattern selection table set in the ROM of the voice lamp control device in the 32nd control example, and FIG. 12B is a diagram schematically showing the specified contents of the time-saving final time-saving fluctuation pattern selection table set in the ROM of the voice lamp control device in the 32nd control example. [Figure 899] 14 is a diagram schematically showing the specified contents of the operation scenario selection table set in the ROM of the audio lamp control device in the 32nd control example. [Figure 900] 10A is a diagram showing the specified contents of operation scenario A (bar function up and down drive) set in the ROM of the audio lamp control device in the 32nd control example, and (b) is a diagram showing the specified contents of operation scenario A (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 32nd control example. [Figure 901] 10A (a) is a diagram showing the specified contents of operation scenario B (bar function up and down drive) set in the ROM of the audio lamp control device in the 32nd control example, and (b) is a diagram showing the specified contents of operation scenario B (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 32nd control example. [Figure 902] 10A and 10B are diagrams showing the specified contents of operation scenario C (bar function up and down drive) set in the ROM of the audio lamp control device in the 32nd control example, and (b) schematically illustrates the specified contents of operation scenario C (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 32nd control example. [Figure 903]10A and 10B are diagrams showing the specified contents of operation scenario D (bar function up and down drive) set in the ROM of the audio lamp control device in the 32nd control example, and (b) schematically illustrates the specified contents of operation scenario D (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 32nd control example. [Figure 904] 10A is a diagram showing the specified contents of operation scenario E (bar function up and down drive) set in the ROM of the audio lamp control device in the 32nd control example, and (b) is a diagram showing the specified contents of operation scenario E (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 32nd control example. [Figure 905] 10A and 10B are diagrams showing the specified contents of operation scenario F (bar function up and down drive) set in the ROM of the audio lamp control device in the 32nd control example, and (b) schematically illustrates the specified contents of operation scenario F (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 32nd control example. [Figure 906] 10A and 10B are diagrams showing the specified contents of operation scenario G (bar function up and down drive) set in the ROM of the audio lamp control device in the 32nd control example, and (b) schematically illustrates the specified contents of operation scenario G (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 32nd control example. [Figure 907] 10A is a diagram showing the specified contents of operation scenario H (bar function up and down drive) set in the ROM of the audio lamp control device in the 32nd control example, and (b) is a diagram showing the specified contents of operation scenario H (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 32nd control example. [Figure 908] 10 is a flow chart showing the main processing executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 909] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 910] 10 is a flow chart showing a design determination command process executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 911] 10 is a flow chart showing variation display setting processing executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 912] 10 is a flow chart showing performance mode setting processing executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 913] 10 is a flow chart showing a me-liquid crystal performance execution management process executed by an MPU within the audio lamp control device in the 32nd control example. [Figure 914] 10 is a flow chart showing the relief opportunity presentation start process executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 915] 10 is a flow chart showing a process during execution of a special scenario executed by an MPU in the audio lamp control device in the 32nd control example. [Figure 916] 10 is a flow chart showing a process in which a relief opportunity presentation is being executed by the MPU in the audio lamp control device in the 32nd control example. [Figure 917] 10A and 10B are diagrams showing an example of a display screen at the start of relief opportunity presentation displayed on the third pattern display device in the first modification of the 32nd control example, and (b) shows an example of a display screen at the successful successful relief opportunity presentation displayed on the third pattern display device in the first modification of the 32nd control example. [Figure 918] 第33制御例におけるパチンコ機の遊技盤の正面図である。 [Figure 919] 1 is a front view of the decorative movable vehicle operating unit in the 33rd control example. [Figure 920] 10A (a) is a schematic diagram of the operating unit of the logo character in the 33rd control example, and (b) is a schematic diagram of the operating unit of the A logo character in the 33rd control example. [Figure 921] 1 is a schematic diagram of an operating unit of a shutter function in the 33rd control example. [Figure 922] 10 is a diagram showing a state in which the logo function in the 33rd control example is at a lower limit. [Figure 923] 10 is a diagram showing a right-centered one-piece drop in the logo function in the 33rd control example. [Figure 924] 10 is a diagram showing the right-centered piece drop and left-handed piece drop of the logo character in the 33rd control example. [Figure 925] 10 is a diagram showing a state in which the atomic object is at an elevation limit in the 33rd control example. [Figure 926] 10 is a diagram showing the closed state of the shutter function in the 33rd control example. [Figure 927] 10 is a diagram showing a case in which all the decorative movable elements in the 33rd control example are in a movable state. [Figure 928] 1 is an exploded front perspective view of the logo function in the 33rd control example. [Figure 929] 1 is an exploded rear perspective view of the logo function in the 33rd control example. [Figure 930] 1 is an exploded front perspective view of the bar function in the 33rd control example. [Figure 931] 1 is an exploded rear perspective view of the bar function in the 33rd control example. [Figure 932] 1 is an exploded front perspective view of a rotor body in the 33rd control example. [Figure 933] 1 is an exploded rear perspective view of the rotor body in the 33rd control example. [Figure 934] 1 is an exploded front perspective view of the operating unit of the atomic object in the 33rd control example. [Figure 935] 1 is an exploded rear perspective view of the operating unit of the atomic object in the 33rd control example. [Figure 936] 1 is an exploded front perspective view of the rising role in the 33rd control example. [Figure 937] 1 is an exploded rear perspective view of the rising body in the 33rd control example. [Figure 938] 1 is an exploded front perspective view of the operating unit of the shutter function in the 33rd control example. [Figure 939] 1 is an exploded front perspective view of the shutter function in the 33rd control example. [Figure 940] 1 is an exploded rear perspective view of the shutter function in the 33rd control example. [Figure 941] 10.sub.3 (a) is a diagram showing an example of a display screen after 3 seconds has elapsed since the start of the composite performance of the normal pattern displayed on the third pattern display device in the 33rd control example, and (b) is a diagram showing an example of a display screen after 5 seconds has elapsed since the start of the composite performance of the normal pattern displayed on the third pattern display device in the 33rd control example. [Figure 942] 10. (a) is a diagram showing an example of a display screen after 7 seconds has passed since the start of the composite performance of the normal pattern displayed on the third pattern display device in the 33rd control example, and (b) is a diagram showing an example of a display screen after 3 seconds has passed since the start of the performance when the composite performance is started during the reach performance displayed on the third pattern display device in the 33rd control example. [Figure 943] 10.sub.1 (a) is a diagram showing an example of a display screen after 5 seconds has passed since the start of the compound performance of the alternative pattern 1 displayed on the third pattern display device in the 33rd control example, and (b) is a diagram showing an example of a display screen after 7 seconds has passed since the start of the compound performance of the alternative pattern 1 displayed on the third pattern display device in the 33rd control example. [Figure 944] 10.sub.3 (a) is a diagram showing an example of a display screen after 3 seconds has elapsed since the start of the compound performance of the alternative pattern 2 displayed on the third pattern display device in the 33rd control example, and (b) is a diagram showing an example of a display screen after 5 seconds has elapsed since the start of the compound performance of the alternative pattern 2 displayed on the third pattern display device in the 33rd control example. [Figure 945] 10 is a diagram showing an example of a display screen after 7 seconds have passed since the start of the composite performance of the alternative pattern 2 displayed on the third pattern display device in the 33rd control example. [Figure 946] 10 is a timing chart for when a complex performance is performed during the pre-reach performance period in the 33rd control example. [Figure 947] 10 is a timing chart when a compound performance of alternative pattern 1 is performed during the reach performance period in the 33rd control example. [Figure 948] 10 is a timing chart when a compound performance of alternative pattern 2 is performed during the reach performance period in the 33rd control example. [Figure 949] 1 is a block diagram showing the electrical configuration of a pachinko machine in the 33rd control example. [Figure 950] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM of the main control device in the 33rd control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 33rd control example. [Figure 951] 10A is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the audio lamp control device in the 33rd control example, and (b) is a diagram schematically showing the specified contents of the normal variation pattern selection table set in the ROM of the audio lamp control device in the 33rd control example. [Figure 952]10.

[0011] FIG. 1A is a diagram schematically showing the specified contents of the time-saving fluctuation pattern selection table set in the ROM of the voice lamp control device in the 33rd control example, FIG. 1A is a diagram schematically showing the specified contents of the special time-saving fluctuation pattern selection table set in the ROM of the voice lamp control device in the 33rd control example, and FIG. 1B is a diagram schematically showing the specified contents of the time-saving final time-saving fluctuation pattern selection table set in the ROM of the voice lamp control device in the 33rd control example. [Figure 953] 10A and 10B are diagrams showing the specified contents of the combined performance operation scenario table (bar function up and down drive) set in the ROM of the audio lamp control device in the 33rd control example, and (b) schematically illustrates the specified contents of the combined performance operation scenario table (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 33rd control example. [Figure 954] 10A (a) is a diagram showing the specified contents of the composite performance operation scenario table (a-bearing up and down drive) set in the ROM of the audio lamp control device in the 33rd control example, and (b) is a diagram showing the specified contents of the composite performance operation scenario table (a-bearing left and right drive) set in the ROM of the audio lamp control device in the 33rd control example. [Figure 955] 10A and 10B are diagrams showing the specified contents of the first alternative operation scenario table (bar function up and down drive) set in the ROM of the audio lamp control device in the 33rd control example, and (b) schematically illustrates the specified contents of the first alternative operation scenario table (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 33rd control example. [Figure 956] 10A (a) is a diagram showing the specified contents of the first alternative performance operation scenario table (a-bearing up and down drive) set in the ROM of the audio lamp control device in the 33rd control example, and (b) is a diagram showing the specified contents of the first alternative operation scenario table (a-bearing left and right drive) set in the ROM of the audio lamp control device in the 33rd control example. [Figure 957] 10A and 10B are diagrams showing the specified contents of the second alternative operation scenario table (bar function up and down drive) set in the ROM of the audio lamp control device in the 33rd control example, and (b) schematically illustrates the specified contents of the second alternative operation scenario table (rotary body function left and right drive, rotation drive) set in the ROM of the audio lamp control device in the 33rd control example. [Figure 958] 10A (a) is a diagram showing the specified contents of the second alternative performance operation scenario table (a-bearing up and down drive) set in the ROM of the audio lamp control device in the 33rd control example, and (b) is a diagram showing the specified contents of the second alternative operation scenario table (a-bearing left and right drive) set in the ROM of the audio lamp control device in the 33rd control example. [Figure 959] 10 is a flow chart showing the main processing executed by the MPU in the audio lamp control device in the 33rd control example. [Figure 960] 10 is a flow chart showing variation display setting processing executed by the MPU in the audio lamp control device in the 33rd control example. [Figure 961] 10 is a flow chart showing performance mode setting processing executed by the MPU in the audio lamp control device in the 33rd control example. [Figure 962] 10 is a flow chart showing a me-liquid crystal performance execution management process executed by an MPU within the audio lamp control device in the 33rd control example. [Figure 963] 10 is a flow chart showing a composite performance start process executed by the MPU in the audio lamp control device in the 33rd control example. [Figure 964] 10 is a flow chart showing first operation processing executed by the MPU in the audio lamp control device in the 33rd control example. [Figure 965] 10 is a flow chart showing second operation processing executed by the MPU in the audio lamp control device in the 33rd control example. [Figure 966] 10 is a flow chart showing the movable role processing executed by the MPU in the audio lamp control device in the 33rd example of control. [Figure 967] 10A (a) is a diagram showing an example of a combined performance of a geisha performance and a character role executed by the third design display device in the first modification of the 33rd control example, and (b) is a diagram showing an example of a display screen during the geisha performance displayed on the third design display device in the first modification of the 33rd control example. [Figure 968] 10A (a) is a diagram showing a case in which the character role in the first modification of the 33rd control example is movable, and (b) is a diagram showing a case in which the character role in the first modification of the 33rd control example is movable. [Figure 969] 10A and 10B are diagrams showing an example of a composite performance in which the character role is placed on the front side of the key role displayed on the third pattern display device in the first modification of the 33rd control example, and (b) shows an example of a composite performance in which the character role is placed on the back side of the key role displayed on the third pattern display device in the first modification of the 33rd control example. [Figure 970] 1 is a block diagram showing the configuration of a ROM of the main control device in the 34th control example. [Figure 971] 1 is a block diagram showing the configuration of the RAM of the main control device in the 34th control example. [Figure 972] 10.sub.10 is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the main control device in the 34th control example, and (b) is a diagram schematically showing the specified contents of the normal variation pattern 1 table set in the ROM of the main control device in the 34th control example. [Figure 973] 10A (a) is a diagram schematically showing the specified contents of the normal variation pattern 2 table set in the ROM of the main control device in the 34th control example, and (b) is a diagram schematically showing the specified contents of the normal variation pattern 3 table set in the ROM of the main control device in the 34th control example. [Figure 974] 10A (a) is a diagram schematically showing the specified contents of the time-saving variation pattern 1 table set in the ROM of the main control device in the 34th control example, and (b) is a diagram schematically showing the specified contents of the time-saving variation pattern 2 table set in the ROM of the main control device in the 34th control example. [Figure 975] 14 is a diagram schematically showing the specified contents of the time-saving variation pattern 3 table set in the ROM of the main control device in the 34th control example. [Figure 976] 1. (a) is a block diagram showing the configuration of a state transition table set in the ROM of the main control device in the 34th control example, (b) is a diagram schematically showing the specified contents of the state transition 1 table set in the ROM of the main control device in the 34th control example, (c) is a diagram schematically showing the specified contents of the state transition 2 table set in the ROM of the main control device in the 34th control example, and (d) is a diagram schematically showing the specified contents of the state transition 3 table set in the ROM of the main control device in the 34th control example. [Figure 977] 10.

[0011] FIG. 1 (a) is a diagram schematically showing the specified contents of the state transition 4 table set in the ROM of the main control device in the 34th control example, and (b) is a diagram schematically showing the specified contents of the state transition 5 table set in the ROM of the main control device in the 34th control example, and (c) is a diagram schematically showing the specified contents of the state transition 6 table set in the ROM of the main control device in the 34th control example. [Figure 978] 10 is a diagram schematically showing the specified contents of the jackpot transition setting table set in the ROM of the main control device in the 34th control example. [Figure 979] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 34th control example. [Figure 980] 10 is a flow chart showing a special pattern variation pattern selection process executed by the MPU within the main control device in the 34th control example. [Figure 981] 10 is a flow chart showing the number of variation subtraction process executed by the MPU in the main control device in the 34th control example. [Figure 982] 10.

[0011] FIG. 10 is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the main control device in the 35th control example, and FIG. 10 is a diagram schematically showing the specified contents of the normal main fluctuation pattern table set in the ROM of the main control device in the 35th control example. [Figure 983] 10A (a) is a diagram schematically showing the specified contents of the time-saving main fluctuation pattern table set in the ROM of the main control device in the 35th control example, and (b) is a diagram schematically showing the specified contents of the normal-saving main fluctuation pattern table set in the ROM of the main control device in the 35th control example. [Figure 984] 1 is a block diagram showing the configuration of the RAM of the main control device in the 35th control example. [Figure 985] 10 is a block diagram showing the configuration of a variation time counter set in the RAM of the main control device in the 35th control example. [Figure 986] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 35th control example. [Figure 987] 10 is a flow chart showing a special pattern variation pattern selection process executed by the MPU within the main control device in the 35th control example. [Figure 988] 10 is a flow chart showing a variation time update process executed by the MPU in the main control device in the 35th control example. [Figure 989]10A (a) is a diagram showing an example of a display screen during the third pattern change displayed on the third pattern display device in the 36th control example, and (b) is a diagram showing an example of a display screen at the start of a delayed performance displayed on the third pattern display device in the 36th control example. [Figure 990] 10A (a) is a diagram showing an example of a display screen for the expansion performance displayed on the third pattern display device in the 36th control example, and (b) is a diagram showing an example of a display screen for the horizontal rotation performance displayed on the third pattern display device in the 36th control example. [Figure 991] 1 is a block diagram showing the configuration of a ROM of the audio lamp control device in the 36th control example. [Figure 992] 14 is a diagram schematically showing the specified contents of the chance mode selection table set in the ROM of the audio lamp control device in the 36th control example. [Figure 993] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 36th control example. [Figure 994] 10 is a flow chart showing normal performance setting processing executed by the MPU in the audio lamp control device in the 36th control example. [Figure 995] 10 is a flow chart showing variation pattern command processing executed by the MPU in the audio lamp control device in the 36th control example. [Figure 996] 14 is an explanatory diagram showing the structure of a box pattern displayed on the third pattern display device in the 36th control example. [Figure 997] 10A (a) is a diagram showing the correspondence between box patterns and numerical patterns in the 36th control example, and (b) is a diagram showing the numerical pattern sequence display pattern in the 36th control example. [Figure 998] 6A to 6B are diagrams showing examples of pattern data set in the numerical pattern sequence in the 36th control example. [Figure 999] 10A and 10B are diagrams showing an example of a display screen displayed on the third pattern display device in the 36th control example when the missed pattern is stopped, and (b) shows an example of a display screen showing a horizontal rotation effect displayed on the third pattern display device in the 36th control example. [Figure 1000] 10 is a diagram showing an example of the ending screen of a jackpot game displayed on the third pattern display device in the 36th control example. [Figure 1001] 1 is a front view of the gaming board of the pachinko machine of the 37th control example. [Figure 1002] 10A and 10B are diagrams showing an example of the performance mode when a time-saving pattern winning occurs in the normal state of the 37th control example, and (b) shows an example of the performance mode for the chance-time standby performance that is executed during the period from when the second time-saving pattern in the 37th control example is shifted to when the hold ball of the first special pattern is extracted. [Figure 1003] 10 is a diagram showing an example of the performance mode when 10 times of time savings are notified in the chance time standby performance of the 37th control example, and (b) shows an example of the performance mode when a hold ball with the first special pattern is selected as a big jackpot during the execution period of the chance time standby performance of the 37th control example. [Figure 1004] 10. 10 is a diagram showing an example of the performance mode of the variable display performance when winning a normal map B during the chance time in the 37th control example, and (b) shows an example of the performance mode of the first suggestive display performance that is executed during the normal map win game when winning a normal map B during the chance time in the 37th control example. [Figure 1005] 6A and 6B are diagrams showing an example of the performance mode of the variable display performance corresponding to the second special pattern in the 37th control example. [Figure 1006] 10A is a diagram showing an example of the performance mode of the second suggestion performance performed during the small-shot game of the second special pattern in the 37th control example, and (b) shows an example of the performance mode set during the lash state in the 37th control example. [Figure 1007] 6A and 6B are diagrams showing an example of the performance mode when the through gate passes during the lash state in the 37th control example. [Figure 1008] 10 is a diagram showing the progression of performance modes before and after chance times in the 37th control example. [Figure 1009] 6A and 6B are diagrams showing the correspondence relationship between the state of the special pattern during the chance time in the 37th control example and the state of the ordinary pattern. [Figure 1010] 10 is a diagram showing a method for transitioning between the game states in the 37th control example. [Figure 1011] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM of the main control device in the 37th control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 37th control example. [Figure 1012] 1. (a) is a diagram schematically showing the specified contents of the special pattern 1 random number table in the 37th control example, (b) is a diagram schematically showing the specified contents of the special pattern 2 random number table in the 37th control example, and (c) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 37th control example. [Figure 1013] 1. (a) is a diagram schematically showing the specified contents of the second random number table set in the ROM of the main control device in the 37th control example, and (b) is a block diagram showing the configuration of the variation pattern selection table set in the ROM of the main control device in the 37th control example, and (c) is a diagram schematically showing the specified contents of the normal table in the 37th control example. [Figure 1014] 10A (a) is a diagram schematically showing the specified contents of the time-saving table in the 37th control example, and (b) is a diagram schematically showing the specified contents of the time-saving table in the 37th control example. [Figure 1015] 1. (a) is a diagram schematically showing the specified contents of the small-jack type selection table set in the ROM of the main control device in the 37th control example, (b) is a diagram schematically showing the specified contents of the time-saving type selection table set in the ROM of the main control device in the 37th control example, and (c) is a diagram schematically showing the specified contents of the ordinary-jack type selection table set in the ROM of the main control device in the 37th control example. [Figure 1016] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 37th control example, and FIG. 10 is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 37th control example. [Figure 1017] 10 is a diagram schematically showing the specified contents of the standby performance selection table set in the ROM of the audio lamp control device of the pachinko machine in the 37th control example. [Figure 1018] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 37th control example. [Figure 1019] 10 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the 37th control example. [Figure 1020] 10 is a flow chart showing the missed processing executed by the MPU in the main control device in the 37th example of control. [Figure 1021] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the 37th control example. [Figure 1022] 10 is a flow chart showing the miss-time type determination process executed by the MPU within the main control device in the 37th control example. [Figure 1023] 10 is a flow chart showing time-saving update processing executed by the MPU in the main control device in the 37th example of control. [Figure 1024] 10 is a flow chart showing normal pattern variation processing executed by the MPU within the main control device in the 37th control example. [Figure 1025] 10 is a flow chart showing the normal-picture-on-line processing executed by the MPU in the main control device in the 37th control example, and (b) shows the third termination condition determination processing executed by the MPU in the main control device in the 37th control example. [Figure 1026] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the 37th control example. [Figure 1027] 10 is a flow chart showing status command processing executed by the MPU in the audio lamp control device in the 37th control example. [Figure 1028] 10 is a flow chart showing a standby performance setting process executed by the MPU in the audio lamp control device in the 37th control example. [Figure 1029] 10 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the 37th control example. [Figure 1030] 10 is a flow chart showing small hit-related processes executed by the MPU in the audio lamp control device in the 37th control example. [Figure 1031] 10 is a flow chart showing a command processing per-unit diagram executed by an MPU within the audio lamp control device in the 37th control example. [Figure 1032] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 37th control example. [Figure 1033] 10 is a flow chart showing the performance setting process during chance time executed by the MPU in the audio lamp control device in the 37th example of control. [Figure 1034] 10 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the 37th control example. [Figure 1035] 1 is a front view of the gaming board of the pachinko machine of the 38th control example. [Figure 1036] 10A is a diagram showing an example of the performance mode in which the 38th control example moves to the time-saving state A after the first hit, and (b) shows an example of the performance mode in which the first change display of the second special pattern is started in the time-saving state A. [Figure 1037] 10 is a diagram showing an example of the performance mode in which, after the first hit in the 38th control example, the set number of hold balls for the second special symbol is accumulated and the time-saving end condition is satisfied, and (b) shows an example of the performance mode in which the second special symbol is displayed in the first time after the time-saving state B is set in the 38th control example. [Figure 1038] 10A is a diagram showing an example of the performance mode when the MAX bonus is won in the 38th control example, and (b) shows an example of the performance mode for the simulated interval performance that is executed during the time-saving state C in the 38th control example. [Figure 1039] 10 is a diagram showing the correspondence between the trends in the performance mode after the first hit in the 38th control example and the state of the second special pattern. [Figure 1040] 10 is a diagram showing the progression of the performance mode from the time when the time-saving limit count is reached and the normal mode B is moved in the 38th control example. [Figure 1041] 10 is a diagram showing a method for transitioning between each game state in the 38th control example. [Figure 1042] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM of the main control device in the 38th control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 38th control example. [Figure 1043] 1. (a) is a diagram schematically showing the specified contents of the special pattern 1 random number table in the 38th control example, (b) is a diagram schematically showing the specified contents of the special pattern 2 random number table in the 38th control example, and (c) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 38th control example. [Figure 1044] 18A is a diagram schematically showing the specified contents of the second random number table set in the ROM of the main control device in the 38th control example, and (b) is a block diagram showing the configuration of the variation pattern selection table set in the ROM of the main control device in the 38th control example, and (c) is a diagram schematically showing the specified contents of the normal table in the 38th control example. [Figure 1045] 10A (a) is a diagram schematically showing the specified contents of the time-saving table in the 38th control example, and (b) is a diagram schematically showing the specified contents of the MAX bonus table in the 38th control example. [Figure 1046] 10A is a diagram schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the 38th control example, and (b) is a diagram schematically showing the specified contents of the small-hat type selection table set in the ROM of the main control device in the 38th control example. [Figure 1047] 10.

[0044] FIG. 10 is a block diagram showing the configuration of a ROM within the voice lamp control device of a pachinko machine in the 38th control example, and (b) is a diagram schematically showing the specified contents of the attack icon selection table set in the ROM of a voice lamp control device of a pachinko machine in the 38th control example. [Figure 1048] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 38th control example. [Figure 1049] 10 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the 38th control example. [Figure 1050] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the 38th control example. [Figure 1051] 10 is a flow chart showing time-saving update processing executed by the MPU in the main control device in the 38th example of control. [Figure 1052] 10 is a flow chart showing a small-ticket time-saving update process executed by an MPU within the main control device in the 38th example of control. [Figure 1053] 10 is a flow chart showing the start-up winning process executed by the MPU in the main control device in the 38th example of control. [Figure 1054] 10 is a flow chart showing a processing for determining the number of pending balls executed by the MPU in the main control device in the 38th example of control. [Figure 1055] 10 is a flow chart showing normal pattern variation processing executed by the MPU within the main control device in the 38th example of control. [Figure 1056] 10 is a flow chart showing V-passing processing executed by the MPU within the main control device in the 38th control example. [Figure 1057] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the 38th example of control. [Figure 1058] 10 is a flow chart showing the jackpot end processing executed by the MPU in the main control device in the 38th example of control. [Figure 1059] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the 38th control example. [Figure 1060] 10 is a flow chart showing winning information command processing executed by the MPU in the audio lamp control device in the 38th control example. [Figure 1061] 10 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the 38th control example. [Figure 1062] 10 is a flow chart showing ending command processing executed by the MPU in the audio lamp control device in the 38th control example. [Figure 1063] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 38th control example. [Figure 1064] 10 is a diagram showing a method for transitioning between game states in the first modification of the 38th control example. [Figure 1065] 1 is a block diagram showing the configuration of the RAM of the main control device in the first modification of the 38th control example. [Figure 1066] 10A (a) is a diagram schematically showing the specified contents of the special pattern 2 random number table in the first modification of the 38th control example, and (b) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the first modification of the 38th control example. [Figure 1067] 10A and 10B are diagrams schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the first modification of the 38th control example. [Figure 1068] 10A and 10B are diagrams showing an example of the performance mode in which the second modification of the 38th control example is shifted to the time-saving state A after the first hit. [Figure 1069] 10A and 10B show an example of the performance mode when the time-saving mode or pull-back mode is switched in the second modification of the 38th control example, and (b) shows an example of the performance mode when the hit-variation performance is performed in the time-saving state C, just before the time-saving limit count is reached after the time-saving mode is switched to the MAX bonus mode in the second modification of the 38th control example. [Figure 1070] 10 is a diagram showing correspondence between displaying a change in a normal pattern, a game of a normal pattern, and a change in a special pattern in a second modification of the 38th control example during a time-saving state. [Figure 1071] 10 is a diagram showing a method for transitioning between game states in the second modification of the 38th control example. [Figure 1072] 10A (a) is a diagram schematically showing the specified contents of the special pattern 2 random number table in the second modification of the 38th control example, and (b) is a diagram schematically showing the specified contents of the second random number table set in the ROM of the main control device in the second modification of the 38th control example. [Figure 1073] 14 is a diagram schematically showing the specified contents of the normal table in the second modification of the 38th control example. [Figure 1074] 10A (a) is a diagram schematically showing the specified contents of the time-saving table in the second modification of the 38th control example, and (b) is a diagram schematically showing the specified contents of the MAX bonus table in the second modification of the 38th control example. [Figure 1075] 14 is a diagram schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the second modification of the 38th control example. [Figure 1076] 10 is a flow chart showing special pattern variation processing executed by the MPU in the main control device in the second modification of the 38th control example. [Figure 1077] 10 is a flow chart showing special pattern determination processing executed by the MPU in the main control device in the second modification of the 38th control example. [Figure 1078] 10 is a flow chart showing the missed processing executed by the MPU in the main control device in the second modification of the 38th control example. [Figure 1079] 10 is a flow chart showing a special pattern variation pattern selection process executed by the MPU within the main control device in the second modification of the 38th control example. [Figure 1080] 10 is a flow chart showing the miss-time type determination process executed by the MPU within the main control device in the second modification of the 38th control example. [Figure 1081]10 is a flow chart showing normal pattern variation processing executed by the MPU in the main control device in the second modification of the 38th control example. [Figure 1082] 10 is a flow chart showing a variational performance setting process executed by the MPU in the audio lamp control device in the second modification of the 38th control example. [Figure 1083] 10 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the second modification of the 38th control example. [Figure 1084] 10A and 10B are diagrams showing an example of the performance mode of the remaining stock performance performed in a jackpot game other than the first hit in the 39th example of control. [Figure 1085] 10A (a) is a diagram showing an example of the performance mode at the time when the lash is started in the 39th control example, and (b) is a diagram showing an example of the performance mode at the time when a reach occurs during the lash in the 39th control example. [Figure 1086] 10A (a) is a diagram showing an example of the performance mode in which a non-V small win is won during the lash in the 39th control example, and (b) is a diagram showing an example of the performance mode in which a non-V small win occurs during the lash in the 39th control example, when the remaining portions corresponding to all non-V small wins become zero. [Figure 1087] 6A and 6B are diagrams showing an example of the performance mode of the remaining recovery performance that is executed when the remaining increase condition is satisfied during the lashing in the 39th control example. [Figure 1088] 10A is a diagram showing an example of the performance mode during which the reserved special chart 2 after the rush is completed in the 39th control example, and (b) shows an example of the performance mode when a hold of the hold has been acquired after the start of the final time-saving fluctuation in the 39th control example is started. [Figure 1089] 10 is a diagram showing an example of a performance mode during the invincible mode in the 39th control example. [Figure 1090] 10 is a diagram showing a method for transitioning between the game states in the 39th control example. [Figure 1091] 10.

[0021] FIG. 10 (a) is a block diagram showing the configuration of the ROM of the main control device in the 39th control example, and FIG. 10 (b) is a block diagram showing the configuration of the RAM of the main control device in the 39th control example. [Figure 1092] 10. (a) is a diagram schematically showing the specified contents of the special pattern 2 random number table in the 39th control example, and (b) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 39th control example. [Figure 1093] 10 is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the main control device in the 39th control example, and (b) is a diagram schematically showing the specified contents of the normal table in the 39th control example. [Figure 1094] 10A (a) is a diagram schematically showing the specified contents of the time-saving table in the 39th control example, and (b) is a diagram schematically showing the specified contents of the time-saving final fluctuation table in the 39th control example. [Figure 1095] 14 is a diagram schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the 39th control example. [Figure 1096] 10 is a diagram schematically showing the specified contents of the small hit type selection table set in the ROM of the main control device in the 39th control example. [Figure 1097] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 39th control example. [Figure 1098] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the 39th control example. [Figure 1099] 10 is a flow chart showing time-saving update processing executed by the MPU in the main control device in the 39th control example. [Figure 1100] 10 is a flow chart showing ceiling determination processing executed by the MPU within the main control device in the 39th control example. [Figure 1101] 10 is a flow chart showing a small-ticket time-saving update process executed by an MPU within the main control device in the 39th example of control. [Figure 1102] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 39th control example. [Figure 1103] 10 is a flow chart showing time-saving performance setting processing executed by the MPU in the audio lamp control device in the 39th control example. [Figure 1104] 10 is a flow chart showing non-V small hit processing executed by the MPU in the audio lamp control device in the 39th example of control. [Figure 1105] 1 is a front view of the gaming board of the pachinko machine of the 40th control example. [Figure 1106] 10A and 10B are diagrams showing an example of a performance screen in the advantageous mode displayed on the third pattern display device in the 40th control example, and (b) shows an example of a performance screen in the disadvantage mode displayed on the third pattern display device in the 40th control example. [Figure 1107] 10 is a diagram showing an example of a performance screen when a time-saving A (10 times of minor time-saving) is selected during the normal mode displayed on the third pattern display device in the 40th control example, and (b) shows an example of a performance screen when a time-saving A (10 times of minor time-saving) is selected during the advantageous mode (30 times of remaining time-saving) is displayed on the third pattern display device in the 40th control example. [Figure 1108] 10 is a diagram showing an example of a performance screen when a time-saving B (time-saving) is selected during the normal mode displayed on the third pattern display device in the 40th control example, and (b) shows an example of a performance screen when a time-saving B (time-saving) is selected during the advantageous mode displayed on the third pattern display device in the 40th control example. [Figure 1109] 6A and 6B are diagrams showing an example of the performance during the remaining reserved period after the time-saving pattern is stopped, displayed on the third pattern display device in the 40th control example. [Figure 1110] 10A (a) is a diagram showing an example of a time-saving performance screen displayed on the third pattern display device in the 40th control example, and (b) is a diagram showing an example of a time-saving performance screen displayed on the third pattern display device in the 40th control example, when a small win is won while the time-saving performance screen is displayed on the third pattern display device in the 40th control example. [Figure 1111] 10A and 10B are diagrams showing an example of a performance screen during ceiling reaching fluctuations in the normal mode displayed on the third pattern display device in the 40th control example, and (b) shows an example of a performance screen during ceiling reaching fluctuations in the advantageous mode displayed on the third pattern display device in the 40th control example. [Figure 1112] 10 is a diagram showing a method for transitioning between each game state in the 40th control example. [Figure 1113] 10.

[0031] FIG. 10 is a block diagram showing the configuration of the ROM of the main control device in the 40th control example, and (b) is a block diagram showing the configuration of the RAM of the main control device in the 40th control example. [Figure 1114] 10. (a) is a diagram schematically showing the specified contents of the special pattern 1 random number table in the 40th control example, (b) is a diagram schematically showing the specified contents of the special pattern 2 random number table in the 40th control example, and (c) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 40th control example. [Figure 1115] 10 is a block diagram showing the configuration of a variation pattern selection table set in the ROM of the main control device in the 40th control example, and (b) is a diagram schematically showing the specified contents of the normal table in the 40th control example. [Figure 1116] 14 is a diagram schematically showing the specified contents of the time-saving table in the 40th control example. [Figure 1117] 10 is a diagram schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the 40th control example. [Figure 1118] 10A and 10B are diagrams that schematically show the specified contents of the small-stop type selection table set in the ROM of the main control device in the 40th control example, and (b) are diagrams that schematically show the specified contents of the time-saving type selection table set in the ROM of the main control device in the 40th control example. [Figure 1119] 10.

[0044] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 40th control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 40th control example. [Figure 1120] 10 is a diagram schematically showing the specified contents of the background mode selection table set in the ROM of the audio lamp control device of a pachinko machine in the 40th control example. [Figure 1121] 10 is a diagram schematically showing the specified contents of the performance pattern selection table set in the ROM of the audio lamp control device of a pachinko machine in the 40th control example. [Figure 1122] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 40th control example. [Figure 1123] 10 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the 40th control example. [Figure 1124] 10 is a flow chart showing the missed processing executed by the MPU in the main control device in the 40th control example. [Figure 1125] 10 is a flow chart showing a special pattern variation pattern selection process executed by an MPU within the main control device in the 40th control example. [Figure 1126] 10 is a flow chart showing the miss-time type determination process executed by the MPU within the main control device in the 40th control example. [Figure 1127] 10 is a flow chart showing time-saving update processing executed by the MPU in the main control device in the 40th control example. [Figure 1128] 10 is a flow chart showing ceiling update processing executed by the MPU in the main control device in the 40th control example. [Figure 1129] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the forty-fourth control example. [Figure 1130] 10 is a flow chart showing status command processing executed by the MPU in the audio lamp control device in the forty-th control example. [Figure 1131] 10 is a flow chart showing a standby performance setting process executed by the MPU in the audio lamp control device in the forty-fourth control example. [Figure 1132] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the forty-third control example. [Figure 1133] 10 is a flow chart showing the time-saving pattern winning performance setting process executed by the MPU in the audio lamp control device in the 40th control example. [Figure 1134] 10 is a flow chart showing the time-saving pattern determination process for performance executed by the MPU in the audio lamp control device in the forty-fourth control example. [Figure 1135] 10 is a flow chart showing the performance update process executed by the MPU in the audio lamp control device in the forty-third control example. [Figure 1136] 1 is a front view of the gaming board of the pachinko machine of the 41st control example. [Figure 1137] 11. FIG. 10A is a diagram showing an example of a time-saving, per-time fluctuation screen displayed on the third pattern display device in the 41st control example, and (b) shows an example of a time-saving, per-time fluctuation screen displayed on the third pattern display device in the 41st control example, and FIG. 10B is a diagram showing an example of a time-saving, per-time fluctuation screen displayed on the third pattern display device in the 41st control example. [Figure 1138] 10A (a) is a diagram showing an example of a performance screen during pseudo-left-handed play displayed on the third pattern display device in the 41st control example (in progression against special diagram 2), and (b) is a diagram showing an example of a performance screen indicating that the time-saving state has ended during pseudo-left-handed play displayed on the third pattern display device in the 41st control example. [Figure 1139] 1 is a block diagram showing the configuration of a ROM of the main control device in the 41st control example. [Figure 1140] 1 is a block diagram showing the configuration of the RAM of the main control device in the 41st control example. [Figure 1141] 14 is a block diagram showing the structure of a variation pattern selection table set in the ROM of the main control device in the 41st control example. [Figure 1142] 14 is a diagram schematically showing the specified contents of the normal state fluctuation pattern table in the 41st control example. [Figure 1143] 14 is a diagram schematically showing the specified contents of the time-saving state fluctuation pattern table in the 41st control example. [Figure 1144] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 41st control example. [Figure 1145] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 41st control example. [Figure 1146] 10 is a flow chart showing the first special pattern change start process executed by the MPU within the main control device in the 41st control example. [Figure 1147] 10 is a flow chart showing the first special pattern determination process executed by the MPU within the main control device in the 41st control example. [Figure 1148] 10 is a flow chart showing the first special pattern variation pattern selection process executed by the MPU within the main control device in the 41st control example. [Figure 1149] 10 is a flow chart showing a special diagram 1 time-saving lottery process executed by the MPU in the main control device in the 41st control example. [Figure 1150] 10 is a flow chart showing game state update processing executed by the MPU in the main control device in the 41st control example. [Figure 1151] 10 is a flow chart showing a process in progressing when first special pattern change is executed by the MPU in the main control device in the 41st control example. [Figure 1152] 10 is a flow chart showing a first special pattern change stop process executed by the MPU within the main control device in the 41st control example. [Figure 1153] 10 is a flow chart showing the forced stopping process for Special Diagram 1 executed by the MPU in the main control device in the 41st control example. [Figure 1154] 10 is a flow chart showing time-saving setting processing executed by the MPU in the main control device in the 41st control example. [Figure 1155] 10 is a flow chart showing a second special pattern change start process executed by the MPU in the main control device in the 41st control example. [Figure 1156] 10 is a flow chart showing a second special pattern determination process executed by the MPU within the main control device in the 41st control example. [Figure 1157] 10 is a flow chart showing a small win lottery process executed by an MPU within the main control device in the 41st control example. [Figure 1158] 10 is a flow chart showing a second special pattern variation pattern selection process executed by the MPU within the main control device in the 41st control example. [Figure 1159] 10 is a flow chart showing a process during execution of second special pattern change executed by the MPU in the main control device in the 41st control example. [Figure 1160] 10 is a flow chart showing a second special pattern change stop process executed by the MPU within the main control device in the 41st control example. [Figure 1161] 10 is a flow chart showing the forced stopping process for Special Diagram 2 executed by the MPU in the main control device in the 41st control example. [Figure 1162] 10 is a flow chart showing a special diagram 2 small hit stop process executed by the MPU in the main control device in the 41st control example. [Figure 1163] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the 41st control example. [Figure 1164] 10 is a flow chart showing the jackpot termination process executed by the MPU in the main control device in the 41st control example. [Figure 1165] 10 is a flow chart showing a time-saving limit update process executed by an MPU within the main control device in the 41st control example. [Figure 1166] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 41st control example. [Figure 1167] 10 is a flow chart showing a special diagram 2 variational performance setting process executed by the MPU in the audio lamp control device in the 41st control example. [Figure 1168] 10 is a flow chart showing a special diagram 1 variational performance setting process executed by the MPU in the audio lamp control device in the 41st control example. [Figure 1169] 10. (a) is a diagram showing an example of a performance screen when a time-saving A1 (once-time-saving) is won during the normal mode displayed on the third pattern display device in the 42nd control example, and (b) is a diagram showing an example of a performance screen (when a time-saving A2 is won) in the high accuracy mode displayed on the third pattern display device in the 42nd control example. [Figure 1170] 10. 10 is a diagram showing an example of a performance screen when the time-saving group A is won in the high accuracy mode displayed on the third pattern display device in the 42nd control example, and (b) shows an example of a performance screen (internal second time-saving remaining 20 times) displayed on the high accuracy mode displayed on the third pattern display device in the 42nd control example. [Figure 1171] 10 is a diagram showing an example of a high accuracy mode transition screen displayed on the third pattern display device in the 42nd control example when the screen is out of normal mode. [Figure 1172] 10A and 10B are diagrams showing the flow of games and performance in the 42nd control example. [Figure 1173] 10.

[0021] FIG. 10 is a block diagram showing the configuration of the ROM within the voice lamp control device of the pachinko machine in the 42nd control example, and (b) is a block diagram showing the configuration of the RAM within the voice lamp control device of the pachinko machine in the 42nd control example. [Figure 1174] 10 is a diagram schematically showing the specified contents of the second performance pattern selection table set in the ROM of the audio lamp control device of the pachinko machine in the 42nd control example. [Figure 1175] 10 is a diagram schematically showing the specified contents of the ceiling information selection table set in the ROM of the audio lamp control device of the pachinko machine in the 42nd control example. [Figure 1176] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the 42nd control example. [Figure 1177] 10 is a flow chart showing a determination command process executed by the MPU in the audio lamp control device in the 42nd control example. [Figure 1178] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 42nd control example. [Figure 1179] 10 is a flow chart showing a second performance pattern setting process executed by the MPU in the audio lamp control device in the 42nd control example. [Figure 1180]10 is a flow chart showing ceiling information notification setting processing executed by the MPU in the audio lamp control device in the 42nd control example. [Figure 1181] 1 is a front view of the gaming board of the pachinko machine of the 43rd control example. [Figure 1182] 10A (a) is a diagram showing an example of a performance screen in the chance zone displayed on the third pattern display device in the 43rd control example, and (b) is a diagram showing an example of a performance screen in the case where a left-handed player passes through the chance zone displayed on the third pattern display device in the 43rd control example. [Figure 1183] 10.

[0044] FIG. 10 is a block diagram showing the configuration of the ROM within the audio lamp control device of the pachinko machine in the 43rd control example, and (b) is a diagram schematically showing the specified contents of the remaining time-saving number of notification selection table set in the ROM of the audio lamp control device of the pachinko machine in the 43rd control example. [Figure 1184] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 43rd control example. [Figure 1185] 10 is a flow chart showing command determination processing executed by the MPU in the audio lamp control device in the 43rd control example. [Figure 1186] 10 is a flow chart showing pending information-related processing executed by the MPU in the audio lamp control device in the 43rd example of control. [Figure 1187] 10 is a flow chart showing a determination command process executed by the MPU in the audio lamp control device in the 43rd control example. [Figure 1188] 10 is a flow chart showing a through-pass processing executed by the MPU in the audio lamp control device in the 43rd control example. [Figure 1189] 10 is a flow chart showing a special diagram 2 variational performance setting process executed by the MPU in the audio lamp control device in the 43rd control example. [Figure 1190] 10 is a flow chart showing a non-time-saving limit-time performance setting process executed by the MPU in the audio lamp control device in the 43rd example of control. [Figure 1191] 10 is a flow chart showing a special diagram 1 variational performance setting process executed by the MPU in the audio lamp control device in the 43rd control example. [Figure 1192] 10 is a diagram schematically showing the specified contents of the background mode selection table set in the ROM of the audio lamp control device of a pachinko machine in the first modification of the 40th control example. [Figure 1193] 10 is a flow chart showing the time-saving pattern winning performance setting process executed by the MPU in the audio lamp control device in the first modification of the 40th control example. [Figure 1194] 10 is a flow chart showing the time-saving pattern winning performance setting process executed by the MPU in the audio lamp control device in the second modification of the 40th control example. [Figure 1195] 10 is a flow chart showing the ceiling mode determination process executed by the MPU in the audio lamp control device in the second modification of the 40th control example. [Figure 1196] 10.sub.1 (a) is a diagram showing an example of the start screen for the final countdown performance displayed on the third pattern display device in the 44th control example, and (b) is a diagram showing an example of the display screen (normal state, time-saving pattern B winning) when a time-saving pattern is won during the final countdown performance displayed on the third pattern display device in the 44th control example. [Figure 1197] 10A (a) is a diagram showing an example of a small win winning screen during the final countdown performance displayed on the third pattern display device in the 44th control example, and (b) is a diagram showing an example of a final countdown performance end screen (18 remaining time savings) displayed on the third pattern display device in the 44th control example. [Figure 1198] 10. 10 is a diagram showing an example of the additional performance start screen displayed on the third pattern display device in the 44th control example, and (b) shows an example of the display screen (first time-saving state, time-saving pattern A winning) when a time-saving pattern is won during the final countdown performance displayed on the third pattern display device in the 44th control example. [Figure 1199] 10A and 10B are diagrams showing the flow of the game state and the flow of the performance performed in the 44th control example. [Figure 1200] 10 is a diagram showing the transition contents of each game state in the 44th control example. [Figure 1201] 1. (a) is a diagram schematically showing the specified contents of the special pattern 1 random number table in the 44th control example, (b) is a diagram schematically showing the specified contents of the special pattern 2 random number table in the 44th control example, and (c) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 44th control example. [Figure 1202] 14 is a diagram schematically showing the specified contents of the normal table in the 44th control example. [Figure 1203] 10A is a diagram schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the 44th control example, and (b) is a diagram schematically showing the specified contents of the small-hat type selection table set in the ROM of the main control device in the 44th control example. [Figure 1204] 14 is a diagram schematically showing the specified contents of the time-saving type selection table set in the ROM of the main control device in the 44th control example. [Figure 1205] 1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 44th control example. [Figure 1206] 10 is a flow chart showing status command processing executed by the MPU in the audio lamp control device in the 44th control example. [Figure 1207] 10 is a flow chart showing a second time-saving state transition process executed by the MPU in the audio lamp control device in the 44th control example. [Figure 1208] 10 is a flow chart showing a variable performance setting process executed by the MPU in the audio lamp control device in the 44th control example. [Figure 1209] 10 is a flow chart showing the time-saving pattern winning performance setting process executed by the MPU in the audio lamp control device in the 44th control example. [Figure 1210] 10 is a flow chart showing a second time-saving state performance setting process executed by the MPU in the audio lamp control device in the 44th control example. [Figure 1211] 10 is a flow chart showing normal state performance setting processing executed by the MPU in the audio lamp control device in the 44th control example. [Figure 1212] 10A (a) is a diagram showing an example of a display screen for the long battle performance displayed on the third pattern display device in the first modification of the 44th control example, and (b) is a diagram showing an example of a display screen for the combination battle performance displayed on the third pattern display device in the first modification of the 44th control example. [Figure 1213] 10 is a diagram showing an example of a display screen for the background change effect displayed on the third pattern display device in the first modification of the 44th control example. [Figure 1214] 14 is a diagram schematically showing the specified contents of the normal table in the first modification of the 44th control example. [Figure 1215] 10 is a flow chart showing a second time-saving state performance setting process executed by the MPU in the audio lamp control device in the first modification of the 44th control example. [Figure 1216] 10 is a flow chart showing special background setting processing executed by the MPU in the audio lamp control device in the first modification of the 44th control example. [Figure 1217] 10 is a flow chart showing normal state performance setting processing executed by the MPU in the audio lamp control device in the first modification of the 44th control example. [Figure 1218] 10A is a diagram showing an example of a display screen for the super reach performance in the additional example, and (b) is a diagram showing an example of a display screen for the time-saving suggestion performance in the additional example. [Figure 1219] 11 is a diagram showing an example of a display screen when switching the performance mode displayed on the third pattern display device in the additional example. [Figure 1220] 10A and 10B are diagrams showing performance patterns in the additional example. [Figure 1221] 1 is a front view of the gaming board of the pachinko machine of the 45th control example. [Figure 1222] 10A is a diagram showing an example of the performance mode when the special mode state A is set in the 45th control example, and (b) shows an example of the pinch effect that is executed when a reach occurs in the special mode state A in the 45th control example. [Figure 1223] 10A is a diagram showing an example of the performance mode when a jackpot is won in the special mode state A in the 45th control example, and (b) shows an example of the performance mode during the opening period of the challenge bonus in the 45th control example. [Figure 1224] 10A is a diagram showing an example of the performance mode when an opening performance that announces a normal jackpot is executed as the opening performance of the challenge bonus in the 45th control example, and (b) shows an example of the performance mode when a promotion chance performance is executed in the special mode state A in the 45th control example. [Figure 1225] 10A is a diagram showing an example of the performance mode when the promotion chance performance is executed in the special mode state A in the 45th control example, and (b) shows an example of the performance mode when the promotion chance performance that notifies a failure is executed in the special mode state A in the 45th control example. [Figure 1226]10A is a diagram showing an example of the performance mode when a promotion chance performance is executed to notify success of the promotion in the special mode state A of the 45th control example, and (b) is a diagram showing an example of the performance mode when the promotion chance performance mode is set to the invincible mode in the 45th control example. [Figure 1227] 10. (a) is a diagram showing an example of a performance mode in which the change display of the first special pattern and the change display of the second special pattern are performed in duplicate in the invincible mode in the 45th control example, and the change display of the first special pattern is a normal jackpot change; (b) is a diagram showing an example of a performance mode in which the normal jackpot change of the first special pattern is performed while the fluctuation of the second special pattern is stopped in the invincible mode in the 45th control example. [Figure 1228] 10. (a) is a diagram showing an example of the performance mode in which a normal jackpot change of the first special pattern is executed while the fluctuation of the second special pattern is stopped in the invincible mode in the 45th control example, and (b) is a diagram showing an example of the performance mode in the blackout performance that is executed when the execution of the jackpot game for the second special pattern is confirmed in the invincible mode in the 45th control example. [Figure 1229] 10 is a diagram showing an example of a performance mode when the 45th control example is set to the premium lash mode. [Figure 1230] 10 is a diagram showing a method for transitioning between states in the 45th control example. [Figure 1231] 1 is a block diagram showing the configuration of a ROM of the main control device in the 45th control example. [Figure 1232] 1 is a block diagram showing the configuration of the RAM of the main control device in the 45th control example. [Figure 1233] 10.sub.a (a) is a diagram schematically showing the specified contents of the first random number table set in the ROM of the main control device in the 45th control example, and (b) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 45th control example. [Figure 1234] 10.

[0011] FIG. 1 (a) is a diagram schematically showing the specified contents of the second random number table set in the ROM of the main control device in the 45th control example, and (b) is a block diagram showing the configuration of the variation pattern table set in the ROM of the main control device in the 45th control example, and (c) is a diagram schematically showing the specified contents of the normal table in the 45th control example. [Figure 1235] 10 is a diagram schematically showing the specified contents of the time-saving and special-mode A table in the 45th control example. [Figure 1236] 14 is a diagram schematically showing the specified contents of the table for special mode B in the 45th control example. [Figure 1237] 10A (a) is a diagram schematically showing the specified contents of the table for special mode C in the 45th control example, and (b) is a diagram schematically showing the specified contents of the table for promotional performance in the 45th control example. [Figure 1238] 10A (a) is a diagram schematically showing the specified contents of the small hit random number table set in the ROM of the main control device in the 45th control example, and (b) is a diagram schematically showing the specified contents of the variation pattern scenario table set in the ROM of the main control device in the 45th control example. [Figure 1239] 10 is a flow chart showing special pattern variation processing executed by the MPU within the main control device in the 45th control example. [Figure 1240] 10 is a flow chart showing the first special pattern change start process executed by the MPU within the main control device in the 45th control example. [Figure 1241] 10 is a flow chart showing the first special pattern determination process executed by the MPU within the main control device in the 45th control example. [Figure 1242] 10 is a flow chart showing the first special pattern variation pattern selection process executed by the MPU within the main control device in the 45th control example. [Figure 1243] 10 is a flow chart showing a special diagram 1 game state update process executed by the MPU in the main control device in the 45th control example. [Figure 1244] 10 is a flow chart showing the first special pattern change stop processing executed by the MPU in the main control device in the 45th control example. [Figure 1245] 10 is a flow chart showing a special diagram 1 miss-off stop processing executed by the MPU in the main control device in the 45th control example. [Figure 1246] 10 is a flow chart showing a second special pattern change start process executed by the MPU in the main control device in the 45th control example. [Figure 1247] 10 is a flow chart showing a second special pattern determination process executed by the MPU within the main control device in the 45th control example. [Figure 1248] 10 is a flow chart showing a second special pattern variation pattern selection process executed by the MPU within the main control device in the 45th control example. [Figure 1249] 10 is a flow chart showing a special diagram 2 game state update process executed by the MPU in the main control device in the 45th control example. [Figure 1250] 10 is a flow chart showing a second special pattern change stop process executed by the MPU in the main control device in the 45th control example. [Figure 1251] 10 is a flow chart showing a special diagram 2 missing stop processing executed by the MPU in the main control device in the 45th control example. [Figure 1252] 10 is a flow chart showing jackpot control processing executed by the MPU in the main control device in the 45th control example. [Figure 1253] 10 is a flow chart showing a jackpot operation setting process executed by an MPU within the main control device in the 45th control example. [Figure 1254] 10 is a flow chart showing the jackpot termination process executed by the MPU in the main control device in the 45th control example. [Figure 1255] 10 is a flow chart showing the winning process executed by the MPU in the main control device in the 45th control example. [Figure 1256] 10 is a flow chart showing abnormality processing executed by the MPU in the main control device in the 45th control example. [Figure 1257] 10 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the 45th control example. [Figure 1258] 10 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the 45th control example. [Figure 1259] 10 is a flow chart showing the performance setting process during invincible mode executed by the MPU in the audio lamp control device in the 45th example, and (b) shows the performance setting process during premium rush execution by the MPU in the audio lamp control device in the 45th example. [Figure 1260] 10 is a flow chart showing the performance mode setting process executed by the MPU in the audio lamp control device in the 45th control example. [Figure 1261] 10A (a) is a diagram schematically showing the specified contents of the variation pattern table set in the ROM of the main control device in the first modification of the 45th control example, and (b) is a diagram schematically showing the specified contents of the special variation B1 table in the first modification of the 45th control example. [Figure 1262] 10 is a diagram schematically showing the specified contents of a variation pattern scenario table set in the ROM of the main control device in the first modification of the 45th control example. [Figure 1263] 10. 10 is a diagram showing an example of the ending performance of the MAX bonus mode that is executed during the ending period of the jackpot winning for the fourth time in the MAX bonus mode in the 46th control example, and (b) shows an example of the performance mode when the MAX round breakthrough performance is performed in the ending performance of the MAX bonus mode in the 46th control example. [Figure 1264] 6A and 6B are diagrams showing an example of the performance mode of the continuation judgment performance that is executed during the ending period of the jackpot winning in the MAX bonus mode after the MAX round breakthrough performance is performed in the 46th control example. [Figure 1265] 10A is a diagram showing an example of the performance mode in which the 46th control example moves to the time-saving state A after the first hit, and (b) shows an example of the performance mode in which the first change display of the second special pattern is started in the time-saving state A of the 46th control example. [Figure 1266] 10A is a diagram showing an example of the performance mode when the lottery result of the first second special pattern is wrong and A is eliminated in the time-saving state A in the 46th control example, and (b) shows an example of the performance mode when the lottery result of the first second special pattern is eliminated in the time-saving state B in the 46th control example, and A is displayed. [Figure 1267] 10.sub.a (a) is a block diagram showing the configuration of the ROM of the main control device in the 46th control example, and (b) is a diagram schematically showing the specified contents of the jackpot type selection table set in the ROM of the main control device in the 46th control example. [Figure 1268] 16A and 16B are diagrams schematically showing the specified contents of the time-saving grant table set in the ROM of the main control device in the 46th control example, and (b) are diagrams schematically showing the specified contents of the small-stop type selection table set in the ROM of the main control device in the 46th control example, and (c) are diagrams schematically showing the specified contents of the off-type selection table set in the ROM of the main control device in the 46th control example. [Figure 1269]1 is a block diagram showing the configuration of RAM in the audio lamp control device of a pachinko machine in the 46th control example. [Figure 1270] 10 is a flow chart showing a special pattern determination process executed by the MPU within the main control device in the 46th control example. [Figure 1271] 10 is a flow chart showing the missed processing executed by the MPU in the main control device in the 46th control example. [Figure 1272] 10 is a flow chart showing time-saving update processing executed by the MPU in the main control device in the 46th control example. [Figure 1273] 10 is a flow chart showing a small-ticket time-saving update process executed by an MPU within the main control device in the 46th control example. [Figure 1274] 10 is a flow chart showing winning information command processing executed by the MPU in the audio lamp control device in the 46th control example. [Figure 1275] 10 is a flow chart showing an attack icon selection process executed by the MPU in the audio lamp control device in the 46th control example. [Figure 1276] 10 is a flow chart showing jackpot related processes executed by the MPU in the audio lamp control device in the 46th control example. [Figure 1277] 10 is a flow chart showing opening command processing executed by the MPU in the audio lamp control device in the 46th control example. [Figure 1278] 10 is a flow chart showing ending command processing executed by the MPU in the audio lamp control device in the 46th control example. [Figure 1279] 10 is a flow chart showing a MAX bonus termination process executed by the MPU in the audio lamp control device in the 46th control example. [Figure 1280] 6A and 6B are diagrams showing an example of the performance mode when a race performance is performed in the special mode state A in the second modification of the 45th control example. [Figure 1281] 10.

[0044] FIG. 10A is a diagram showing an example of a performance mode in which a race performance that notifies you of a jackpot with the first special pattern is executed in the special mode state A in the second modification of the 45th control example, and (a) is a diagram showing an example of a performance mode in which a race performance that notifies you of a jackpot with the second special pattern is executed in the special mode state A in the second modification of the 45th control example. [Figure 1282] 1 is a front view of a pachinko machine according to the tenth embodiment. [Figure 1283] 1 is a front view of a pachinko machine game board. [Figure 1284] 1 is a rear view of a pachinko machine. [Figure 1285] 1 is a block diagram showing the electrical configuration of a pachinko machine. [Figure 1286] 1 is an exploded front perspective view of the game board and the movement unit. FIG. [Figure 1287] 1 is an exploded rear perspective view of the game board and the movement unit. FIG. [Figure 1288] 1 is a front view of the operating unit. FIG. [Figure 1289] 1 is a front view of the operating unit. FIG. [Figure 1290] 1 is a front view of the operating unit. FIG. [Figure 1291] 1 is a front view of the operating unit. FIG. [Figure 1292] 1 is a front view of the operating unit. FIG. [Figure 1293] 1 is a front view of the operating unit. FIG. [Figure 1294] 1 is a front perspective view of the first operating unit. FIG. [Figure 1295] 1 is a rear perspective view of the first operating unit. FIG. [Figure 1296] 1 is an exploded front perspective view of the first operating unit. FIG. [Figure 1297] 1 is an exploded rear perspective view of the first operating unit. FIG. [Figure 1298] 1 is an exploded front perspective view of the rotating operating unit. FIG. [Figure 1299] 1 is an exploded rear perspective view of the rotating operating unit. FIG. [Figure 1300] 6A and 6B are rear views of the rotating operating unit. [Figure 1301] 6A and 6B are rear views of the rotating operating unit. [Figure 1302] 1 is a front view of the first operating unit. FIG. [Figure 1303] 1 is a front view of the first operating unit. FIG. [Figure 1304] 1 is a front view of the first operating unit. FIG. [Figure 1305] 1 is a rear view of the first operating unit. FIG. [Figure 1306] 1 is a rear view of the first operating unit. FIG. [Figure 1307] 1 is a rear view of the first operating unit. FIG. [Figure 1308] 1 is a front perspective view of the second operating unit. FIG. [Figure 1309] 1 is a rear perspective view of the second operating unit. FIG. [Figure 1310] 1 is an exploded front perspective view of the second operating unit. FIG. [Figure 1311] 1 is an exploded rear perspective view of the second operating unit. FIG. [Figure 1312] 1 is an exploded front perspective view of the rotating operating unit. FIG. [Figure 1313] 1 is an exploded rear perspective view of the rotating operating unit. FIG. [Figure 1314] 6A and 6B are rear views of the rotating operating unit. [Figure 1315] 6A and 6B are rear views of the rotating operating unit. [Figure 1316] 1 is a front perspective view of the third operating unit. FIG. [Figure 1317] 1 is a rear perspective view of the third operating unit. FIG. [Figure 1318] 1 is an exploded front perspective view of the third operating unit. FIG. [Figure 1319] 1 is an exploded rear perspective view of the third operating unit. FIG. [Figure 1320] 1 is an exploded front perspective view of the opening and closing operation unit; FIG. [Figure 1321] 1 is an exploded rear perspective view of the opening and closing operation unit; FIG. [Figure 1322] 1 is a rear view of the opening / closing operation unit of the third operation unit; FIG. [Figure 1323] 1 is a rear view of the opening / closing operation unit of the third operation unit; FIG. [Figure 1324] 1 is an exploded front perspective view of the light guide plate unit. [Figure 1325] 1 is an exploded rear perspective view of the light guide plate unit. FIG. [Figure 1326] 1 is an exploded front perspective view of the auxiliary light guide plate unit. [Figure 1327] 1 is an exploded rear perspective view of the auxiliary light guide plate unit. [Figure 1328] 1 is a rear view of the auxiliary light guide plate unit. [Figure 1329] 1328 (a) is a cross-sectional view of the auxiliary light guide plate unit along the MCDXVIa-MCDXVIa of FIG. 1328, and (b) is a cross-sectional view of the auxiliary light guide plate unit along the MCDXVIb-MCDXVIb of FIG. 1328. [Figure 1330] 6A to 6F are schematic front views of the auxiliary light guide plate unit. [Figure 1331] 1 is an exploded front perspective view of the game board. [Figure 1332] 1 is a perspective view of an exploded rear view of the game board. [Figure 1333] 1 is an exploded front...

Claims

[Claim 1] a movable means that is movable within a movable range that includes at least a first position and a second position different from the first position; A gaming machine having a determination means capable of executing a predetermined determination, The gaming machine includes: When the result of the judgment by the judgment means is a specific judgment result, it is possible to provide an advantage to the player compared to a case where the result is other than the specific judgment result, a first control is executable, which is capable of executing a process for moving the movable means to the first position a plurality of times based on the lapse of a specific period of time after the movable means is moved from the first position to the second position, a specific condition can be satisfied based on a first condition being satisfied a specific number of times during the specific period after the movable means is moved from the first position to the second position a predetermined number of times according to a result of the determination by the first control, A gaming machine characterized in that, when the specific condition is met, it is possible to execute a second control different from the first control during a period after executing a process for moving the movable means to the first position.