Imaging apparatus, control method, and program

Abstract

To output image data and meta data corresponding to the image data without causing image deterioration.SOLUTION: An imaging apparatus has: first creation means that creates a RAW image; second creation means that creates meta data corresponding to the RAW image; arrangement means that arranges the meta data created by the second creation means together with the RAW image created by the first creation means in an image area in a YCC 4:2:2 video format; and output means that outputs the RAW image and the meta data arranged by the arrangement means in the image area in the YCC 4:2:2 video format.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to an imaging device, a control method, and a program.

Background Art

[0002] Patent Document 1 describes a method of embedding metadata (watermark information) in one or more chrominance portions of video data and distributing the video data including the embedded metadata.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, in Patent Document 1, there is a problem that image degradation occurs in order to embed metadata in one or more chrominance portions of video data. Further, since the degree of image degradation increases when the amount of metadata to be embedded is large, there is a limit to the amount of metadata to be embedded. Therefore, an object of the present invention is to be able to output image data and metadata corresponding to the image data without causing image degradation.

Means for Solving the Problems

[0005] To solve the above problems, the imaging device includes a first generation means for generating a RAW image, a second generation means for generating metadata corresponding to the RAW image, a placement means for placing the RAW image generated by the first generation means and the metadata generated by the second generation means together in an image area in a YCC4:2:2 video format, and an output means for outputting the RAW image and the metadata placed in the image area in the YCC4:2:2 video format by the placement means. [Effects of the Invention]

[0006] According to the present invention, image data and metadata corresponding to the image data can be output without causing image degradation. [Brief explanation of the drawing]

[0007] [Figure 1] This is a block diagram illustrating the components of the imaging device 100 in Embodiment 1. [Figure 2] This is a flowchart illustrating the processing of the imaging device 100 in Embodiment 1. [Figure 3] This is a diagram to explain RAW data. [Figure 4] This is a diagram to explain the details of the RAW data. [Figure 5] This is a diagram illustrating the memory area for HDMI output. [Figure 6] This diagram illustrates the state in which RAW data is stored in the memory area for HDMI output. [Figure 7] This diagram illustrates the state in which RAW data is stored in the memory area for HDMI output. [Figure 8] This is a block diagram illustrating the components of the receiver 800 in Embodiment 1. [Figure 9] This is a flowchart illustrating the processing of the receiver 800 in Embodiment 1. [Modes for carrying out the invention]

[0008] Embodiments of the present invention will be described below with reference to the drawings. However, the present invention is not limited to the following embodiments.

[0009] [Embodiment 1] Figure 1 is a block diagram illustrating the components of the imaging device 100 in Embodiment 1. The lens unit 101 is an optical system composed of a fixed lens group for light collection, a variable magnification lens group, an aperture, and a corrective lens group. The corrective lens group has both the function of correcting the image formation position that has shifted due to the movement of the variable magnification lens group and the function of adjusting the focus. The lens unit 101 forms an image of the subject on the image formation plane of the image sensor 102, which will be described later. The lens unit 101 is detachable from the imaging device 100.

[0010] The image sensor 102 is an imaging element such as a CCD image sensor or a CMOS image sensor, which converts light into electric charge to generate an imaging signal. The imaging signal generated by the image sensor 102 is output to, for example, the image processing unit 103. Alternatively, a so-called dual-pixel type image sensor may be used, in which all pixels on the imaging surface are each composed of a pair of light-receiving elements, and a pair of optical images formed by microlenses at each pixel can be photoelectrically converted by the pair of light-receiving elements.

[0011] The image processing unit 103 converts the imaging signal output from the image sensor 102 into RAW data (RAW image). Further, the image processing unit 103 performs RAW development processing such as interpolation processing and image quality adjustment processing on the converted RAW data to generate image data in the YCC4:2:2 format corresponding to the RAW data. In other words, the RAW data in this embodiment is the image data before the image data in the YCC4:2:2 format is converted. The RAW data (RAW image) and the image data in the YCC4:2:2 format obtained by the image processing unit 103 are stored in the RAM 111. Here, the RAW data is an example of the first image data, and the image data in the YCC4:2:2 format is an example of the second image data.

[0012] The display resizing unit 104 performs resizing processing on the image data stored in the RAM 111 to generate resized image data. The display resizing unit 104 stores the generated resized image data in the RAM 111.

[0013] The recording resizing unit 105 performs resizing processing on the image data stored in the RAM 111 to create recording image data. The recording resizing unit 105 stores the generated recording image data in the RAM 111.

[0014] The on-screen display (OSD) generation unit 106 generates OSD data related to the on-screen display (OSD). The OSD generation unit 106 stores the generated OSD data in the RAM 111. The OSD data includes OSD data such as various setting menus, titles, and time. The OSD data stored in the RAM 111 is combined with the display image data stored in the RAM 111 and is displayed on the display unit 107 or output to the outside from the external output unit 115.

[0015] The display unit 107 is a display member for displaying display image data and OSD. The display unit 107 is, for example, a liquid crystal panel.

[0016] The CPU (central processing unit) 108 controls the entire imaging device 100.

[0017] The operation switch group 109 is an operation member for the user to input operations. The operation switch group 109 also includes a switch for selecting any one of a camera mode for performing camera shooting, a playback mode for playback, and a power-off mode for turning off the power.

[0018] The ROM (read only memory) 110 is, for example, a flash ROM, and stores programs executed by the CPU 108 and the like. Also, a partial area of the ROM 110 is used to hold the state of the system and the like for backup purposes.

[0019] The RAM (random Access memory) 111 is a volatile memory used as a work area by the CPU 108, the image processing unit 103, the compression / decompression unit 114, and the like.

[0020] The memory card controller 112 records the moving image data generated by the compression / decompression unit 114 and output to the RAM 111 on the memory card 113 according to a format compatible with a computer such as the FAT file system. The memory card 113 is a removable recording medium for the imaging device 100 and can also be attached to a computer or the like other than the imaging device 100.

[0021] The compression / decompression unit 114 encodes the image data stored in the RAM 111 (for example, MPEG compression) to generate moving image data and outputs it to the RAM 111.

[0022] The external output unit 115 outputs image data and the like that output by the image processing unit 103 to the RAM 111 to the outside. The external output unit 115 is an interface compliant with, for example, the HDMI (registered trademark) standard or the SDI standard. The external output unit 115 can output image data in signals of standards such as 4K60P and 2K60P. The bus 116 is a bus that exchanges data between the various parts of the imaging device 100.

[0023] Next, referring to Figure 2, the process by which the imaging device 100 in Embodiment 1 outputs RAW data and corresponding metadata using a video signal compliant with the HDMI standard will be described. Figure 2 is a flowchart illustrating the process of the imaging device 100 in Embodiment 1. Each process in the flowchart of Figure 2 is controlled by the CPU 108 of the imaging device 100 executing a program stored in the ROM 110.

[0024] In step S201, the CPU 108 determines whether a menu operation has been performed using the operation switch group 109. This menu operation is an operation to set the operation of the imaging device 100, such as setting the resolution of the video signal to be captured by the image sensor 102 or setting the bitrate to be encoded by the compression / decompression unit 114. This menu operation also allows for settings such as the HDMI RAW mode, which will be described later. If it is determined that a menu operation has been performed (YES in step S201), the CPU 108 stores the information set by the menu operation in the RAM 111 and proceeds to step S202. If it is determined that no menu operation has been performed (NO in step S201), the CPU 108 proceeds to step S203.

[0025] In step S202, the CPU 108 performs a mode setting process and controls each component within the imaging device 100 to transition to the mode set in step S201.

[0026] In step S203, the CPU 108 refers to the information stored in RAM 111 and determines whether or not an HDMI connection is established. An HDMI connection is a state in which the HDMI connection process described later has been completed, and this state information is stored in RAM 111 by the processing in step S205. If it is determined that an HDMI connection is established (YES in step S203), the CPU 108 proceeds to step S206. If it is determined that an HDMI connection is not established (NO in step S203), the CPU 108 proceeds to step S204.

[0027] In step S204, the CPU 108 controls the external output unit 115 to determine whether the hot-plug detection signal (HPD) according to the HDMI standard is detected and whether the TMDS signal line according to the HDMI standard is pulled up. If the hot-plug detection signal is detected and the TMDS signal line is pulled up (YES in step S204), the CPU 108 determines that there is an HDMI connection and proceeds to step S205. Otherwise (NO in step S204), the CPU 108 determines that there is no HDMI connection and terminates the process shown in Figure 2.

[0028] In step S205, the CPU 108 performs HDMI connection processing. During HDMI connection processing, the CPU 108 controls the external output unit 115 to obtain the EDID of the sink device connected to the external output unit 115 via HDMI. The EDID is information about the sink device connected via the external output unit 115 and consists of data on the video format supported by the sink device and vendor-specific data. The CPU 108 stores the obtained EDID in the RAM 111.

[0029] In step S206, the CPU 108 determines whether the imaging device 100 is in camera mode. Camera mode is a mode in which various signal processing is performed on the video data collected by the lens unit 101 and captured by the image sensor 102, and the data is recorded on the memory card 113, displayed on the display unit 107, or output to the external output unit 115. In addition to camera mode, the imaging device 100 also has a playback mode in which the video data recorded on the memory card 113 is displayed on the display unit 107 or output to the external output unit 115. If the CPU 108 determines that the imaging device 100 is in camera mode (YES in step S206), it proceeds to step S207. If the CPU 108 determines that the imaging device 100 is not in camera mode (NO in step S206), it terminates the process shown in Figure 2.

[0030] In step S207, the CPU 108 refers to the mode information stored in the RAM 111 and controls the image sensor 102, etc., according to the mode information to capture RAW data (RAW image) related to the subject image. The captured RAW data is stored in the RAM 111.

[0031] In step S208, the CPU 108 refers to the mode information stored in the RAM 111 to determine whether the imaging device 100 is in HDMI RAW mode. HDMI RAW mode is a mode in which the imaging device 100 outputs the RAW data captured in step S207 and gamma-processed in step S209 to an external sink via the external output unit 115. If it is determined that the device is in HDMI RAW mode (YES in step S208), the CPU 108 proceeds to step S209. If it is determined that the device is not in HDMI RAW mode (NO in step S208), the CPU 108 proceeds to step S211.

[0032] In step S209, the CPU 108 controls the image processing unit 103 to perform gamma processing on the RAW data captured in step S207.

[0033] In step S210, the CPU 108 controls the image processing unit 103 to write the RAW data that underwent gamma processing in step S208 to the memory area for HDMI output in RAM 111.

[0034] Here, we will explain the RAW data written to the RAM 111 using Figures 3 and 4. In Figure 3(a), 300 represents the entirety of the RAW data written to the RAM 111 in step S210. The RAW data consists of data from the Effective Pixel Area 301 and data from the Additional Pixel Area 302. As shown in Figure 3(a), the Additional Pixel Area 302 is an area where several pixels are added to the top, bottom, left, and right of the Effective Pixel Area 301, and the pixels in this area are used when developing the top, bottom, left, and right edges of the Effective Pixel Area 301. Due to this configuration, the data written in step S210 is the sum of the Effective Pixel Area and the Additional Pixel Area, as shown in Figure 3(b). For example, in the case of 4K RAW data, the 4096x2160 pixels of the Effective Pixel Area are added to the 12 pixels of the left and right Additional Pixel Areas and the 8 pixels of the top and bottom Additional Pixel Areas, for a total of 4120x2176 pixels of data written to the RAM 111.

[0035] Figure 4 is a diagram illustrating the details of the RAW data written to RAM 111 in step S210. In Figure 4, as shown at 400, the RAW data consists of a Bayer array of R / Gr / Gb / B. 4K RAW data is composed of 2060 of these Bayer arrays arranged horizontally (4120 pixels as pixel data) as shown at 401, and 1088 of them arranged vertically (2176 pixels as pixel data) as shown at 402. The data size is 4120 (horizontal) x 2176 (vertical) x 12 (bit depth) ÷ 8 (bits to bytes) = 13,447,680 bytes.

[0036] Returning to Figure 2, in step S211, the CPU 108 controls the image processing unit 103 to perform RAW data correction processing on the RAW data captured in step S207. This RAW data correction processing includes pre-development lens correction processing (peripheral illumination correction processing, chromatic aberration correction, etc.) and white balance processing. The data used for pre-development lens correction processing is stored in the ROM 110 in advance for each type of lens, and the CPU 108 determines the parameters for pre-development lens correction processing based on this stored data and the type of lens unit 101 mounted on the imaging device 100.

[0037] In step S212, the CPU 108 controls the image processing unit 103 to perform development processing on the image data that has undergone correction processing in step S211. This development processing includes processes such as Debayer, gamma processing, and chromatic aberration correction. For chromatic aberration correction, the CPU 108 determines the correction processing parameters based on data previously stored in the ROM 110 and the type of lens unit 101 attached to the imaging device 100. After development processing, the RAW data becomes data in YCC4:2:2 format. The YCC4:2:2 format image data after development processing is stored in the RAM 111.

[0038] In step S213, the CPU 108 controls the image processing unit 103 to perform development data correction processing, such as distortion correction, on the YCC4:2:2 format data generated in step S212 and stored in RAM 111. For this distortion correction, the CPU 108 also determines the distortion correction parameters based on data previously held in ROM 110 and the type of lens unit 101 attached to the imaging device 100. The development-corrected data (in YCC4:2:2 format) corrected in step S213 is stored in RAM 111.

[0039] In step S214, the CPU 108 refers to the mode information stored in RAM 111 to determine whether the imaging device 100 is in HDMI RAW mode. If it is determined to be in HDMI RAW mode (YES in step S214), the CPU 108 proceeds to step S215. If it is determined not to be in HDMI RAW mode (NO in step S214), the CPU 108 proceeds to step S216.

[0040] In step S215, the CPU 108 writes metadata corresponding to the RAW data to the area after the RAW data written to RAM 111 in step S210. The metadata includes, for example, data used for correction processing of the corresponding RAW data.

[0041] Now, with reference to Figures 5 to 7, the memory area for HDMI output generated in steps S210 and S215 will be described.

[0042] Figure 5 illustrates the memory area for HDMI output when outputting 12-bit video data in YCC4:2:2 format with 4096x2160 pixels via a video signal compliant with the HDMI standard. As shown in Figure 5, this memory area 501 has an image area of ​​4096 pixels horizontally as shown in 502 and 2160 pixels vertically as shown in 503. In Figure 5, as shown in 501, the image data is composed of 2-pixel units (one Cb and one Cr data for every two Y data), and the size of each data is 12 bits for each of the Y, Cb, and Cr data. The data size of one line (horizontally) in this HDMI output memory area is 4096 (horizontally) x 2 (because there are 4 data (2 Y, 1 Cb, and 1 Cr) in 2 pixels) x 12 (bit depth) ÷ 8 (bits to bytes) = 12288 bytes. Furthermore, the total data size for the memory area used for HDMI output is 4096 (width) x 2160 (height) x 2 (4 data points per 2 pixels) x 12 (bit depth) ÷ 8 (bits to bytes) = 26,542,080 bytes.

[0043] Figure 6 illustrates the state in which RAW data is stored in the memory area for HDMI output as described in Figure 5, and the corresponding metadata is stored in step S215. The size of the RAW data is 4120 (width) x 2176 (height) x 12 (bit depth) ÷ 8 (bits to bytes) = 13,447,680 bytes, as explained in Figure 4.

[0044] In Figure 6, as shown in 601, Bayer data (the first column contains R and Gr data, and the second column contains Gr and B data) is placed without gaps in the image area where the Cb, Y, Cr, and Y data columns are located in the memory area for HDMI output. The size of the RAW data is 13,447,680 bytes, and the data size of one line in the memory area for HDMI output is 12,288 bytes. Therefore, as shown in 602 in Figure 6, 1095 lines (13,447,680 ÷ 12,288 = 1094.375) in the memory area for HDMI output can store RAW data with a bit depth of 12 bits at 4120x2176 pixels. The area after the RAW data (lines 1096 to 2160 in the memory area for HDMI output) becomes an empty area, so as shown in 603, metadata corresponding to the RAW data placed up to line 1095 is placed in this image area. For example, metadata is data used for correction processing of the corresponding RAW image and includes the gamma data of the RAW data (gamma in step S209). Also, for example, metadata includes parameters used in the development and correction processing of the imaging device 100 (parameters for RAW data correction processing in step S211, parameters for development processing in step S212, and parameters for development data correction processing in step S213).

[0045] Figure 6 illustrates the case where the RAW data written in step S210 fits into the memory area for HDMI output. In contrast, Figure 7 illustrates the case where the RAW data written in step S210 does not fit into the memory area for HDMI output.

[0046] In Figure 7, 701 is RAW data with 8224x4336 pixels and a bit depth of 10 bits. Internally, as explained with reference to Figure 4, it is composed of a Bayer array of R, Gr, Gb, and B. The data size of this RAW data is 8224 (width) x 4336 (height) x 10 (bit depth) ÷ 8 (bits to bytes) = 44,574,080 bytes. Therefore, this RAW data will not fit into the memory area (26,542,080 bytes) corresponding to 4096x2160 pixels with a bit depth of 12 bits. For this reason, the RAW data is divided into two parts vertically and stored in the memory area for HDMI output for two frames. For example, in Figure 7, as shown in 702, the RAW data up to 2176 lines is placed in the first frame, and as shown in 703, the RAW data of the remaining lines is placed in the second frame.

[0047] In Figure 7, 704 is the memory area for HDMI output (first frame) where the RAW data is placed. The data size of the upper half (2176 lines) of RAW data with 8224x4336 pixels and a bit depth of 10 bits is 8224 (width) x 2176 (height) x 10 (bit depth) ÷ 8 (bits to bytes) = 22,369,280 bytes. Therefore, as shown in 705, the upper half of the RAW data can be stored in 1821 lines (22,369,280 ÷ 12,288 = 1820.41) in the memory area (image area) corresponding to 4096x2160 pixels and a bit depth of 12 bits. Thus, as shown in 706, the metadata explained in Figure 6 is written from line 1822 onwards in the memory area for HDMI output (first frame).

[0048] 707 is the memory area for HDMI output (second frame) where the RAW data is placed. The data size of the lower half (2160 lines) of RAW data with 8224x4336 pixels and a bit depth of 10 bits is 8224 (width) x 2160 (height) x 10 (bit depth) ÷ 8 (bits to bytes) = 22,204,800 bytes. Therefore, as shown in 708, the lower half of the RAW data can be stored in 1808 lines (22,204,800 ÷ 12288 = 1807.031) in the memory area corresponding to 4096x2160 pixels and a bit depth of 12 bits. Thus, as shown in 709, the metadata explained in Figure 6 is written from line 1809 onwards in the memory area for HDMI output (second frame). In this way, when the RAW data does not fit in the memory area for HDMI output, the RAW data is split into upper and lower parts and placed in the memory area for HDMI output.

[0049] Returning to Figure 2, in step S216, the CPU 108 controls the display resizing unit 105 to resize the developed and corrected data generated in step S213 and write it to the memory area for HDMI output in RAM 111. Here, the data written to RAM 111 is in YCC4:2:2 format, as explained with reference to Figure 5.

[0050] In step S217, the CPU 108 controls the display resizing unit 104 to resize the developed and corrected data generated in step S213 and write it to the memory area for display output in RAM 111. Here, the data written to RAM 111 is in YCC4:2:2 format, as explained with reference to Figure 5.

[0051] In step S218, the CPU 108 outputs the display output data that was written to the display output memory area in RAM 111 in step S217 to the display unit 107. Since the display unit 107 supports the display of image signals in YCC4:2:2 format, the image captured in step S207 is displayed.

[0052] In step S219, the CPU 108 controls the external output unit 115 to output the HDMI output data written to the HDMI output memory area in RAM 111 to an external device or the like as a video signal compliant with the HDMI standard. Here, if the imaging device 100 is in HDMI RAW mode, the RAW data is written to the HDMI output memory area in step S210, and the metadata corresponding to that RAW data is written in step S215. Therefore, if the imaging device 100 is in HDMI RAW mode, a signal is output in which the RAW data and metadata are mapped (or stored) to the image area in the YCC4:2:2 format (12-bit) video format. Here, the YCC4:2:2 format (12-bit) video format is a video format specified in the HDMI standard. Note that the video format may also be referred to as the transmission format or output format. If the imaging device 100 is not in HDMI RAW mode, the resized, developed and corrected data is written to the HDMI output memory area in step S216. Therefore, if the imaging device 100 is not in HDMI RAW mode, a video signal in YCC4:2:2 format will be output.

[0053] Subsequently, the CPU 108 repeatedly executes the processes from step S201 onward until it determines in step S204 that there is no HDMI connection, or in step S206 that it is not in camera mode.

[0054] Next, we will describe a receiver that receives and displays a video signal compliant with the HDMI standard output from the imaging device 100. Figure 8 is a block diagram illustrating the components of the receiver 800 in Embodiment 1.

[0055] The receiver 801 receives signals compliant with the HDMI standard. The video signal received by the receiver 801 becomes the input to the receiver 800. The image data received by the receiver 801 is stored in the RAM 808.

[0056] The image processing unit 802 performs various image processing operations on the image data received by the receiving unit 801. The image processing unit 802 stores the processed image data in the RAM 808.

[0057] The display resizing unit 803 resizes the image data stored in the RAM 808 to generate display image data in order to output video signals to the display unit 804 and the external output unit 809. The display resizing unit 803 stores the generated display image data in the RAM 808.

[0058] The display unit 804 is a display component for displaying display image data stored in the RAM 111. The display unit 804 is, for example, a liquid crystal panel.

[0059] The CPU 805 controls the entire receiver 800.

[0060] The group of operation switches 806 are operating components for user input.

[0061] ROM807 is, for example, a flash ROM, and stores programs executed by the CPU805. Additionally, a portion of ROM807 is used for backup purposes, such as maintaining the system state.

[0062] RAM808 is volatile memory used as work by the CPU805 and the image processing unit802, etc.

[0063] The external output unit 809 outputs display image data and the like that output by the image processing unit 803 to the RAM 808. The external output unit 809 is an interface compliant with, for example, the HDMI standard or the SDI standard. The external output unit 809 can output display image data in signals of standards such as 4K60P and 2K60P. The bus 810 is a bus that exchanges data between the various parts of the receiver 800.

[0064] Next, referring to Figure 9, the process by which the receiver 800 in Embodiment 1 receives image data via a video signal compliant with the HDMI standard, and processes the development and display of the image data will be described. Figure 9 is a flowchart illustrating the process of the receiver 800 in Embodiment 1. Each process in the flowchart of Figure 9 is controlled by the CPU 805 of the receiver 800 executing a program stored in the ROM 807.

[0065] In step S901, the CPU 805 controls the receiver 801 to receive a signal compliant with the HDMI standard. The received signal is then stored in the RAM 808. The image data received in step S901 may be YCC image data or the aforementioned RAW data (RAW image). From here on, we will explain the case where RAW data is received.

[0066] In step S902, the CPU 805 controls the image processing unit 802 to perform inverse gamma processing on the RAW data held in RAM 808. The gamma information applied to the RAW data may be metadata information corresponding to the RAW data as described above. Alternatively, it may be information notified from the source device in the form of a VSIF (Vendor-Specific InfoFrame) or the like, which indicates additional information related to the video signal.

[0067] In step S903, the CPU 805 determines whether the corresponding metadata has been attached to the RAW data held in RAM 808. If it determines that the corresponding metadata has been attached (YES in step S903), the CPU 805 proceeds to step S904. If it determines that the corresponding metadata has not been attached (NO in step S903), the CPU 805 proceeds to step S909.

[0068] In step S904, the CPU 805 controls the image processing unit 802 to perform pre-development lens correction processing (peripheral illumination correction, chromatic aberration correction, etc.) on the RAW data held in RAM 808. The data used for this correction processing is stored in metadata attached to the RAW data.

[0069] In step S905, the CPU 805 controls the image processing unit 802 to perform white balance processing on the RAW data that has undergone correction processing in step S904.

[0070] In step S906, the CPU 805 controls the image processing unit 802 to perform development processing on the data corrected in step S905. This development processing is performed using a debayer or similar method. Through this development processing, the RAW data is converted into YCC4:2:2 format data.

[0071] In step S907, the CPU 805 controls the image processing unit 802 to perform post-development lens correction processing on the data that underwent development processing in step S906. This post-development lens correction processing includes processes such as color fringing correction and distortion correction. The data used for this correction processing is stored in metadata attached to the RAW data.

[0072] In step S908, the CPU 805 controls the image processing unit 802 to perform display image processing such as gamma correction and LUT. The CPU 805 stores the data after display image processing as developed data in the RAM 808.

[0073] In step S909, the CPU 805 controls the image processing unit 802 to perform white balance processing on the RAW data stored in the RAM 808.

[0074] In step S910, the CPU 805 controls the image processing unit 802 to perform development processing on the data corrected in step S909. This development processing is performed using a debayer or similar method. Through this development processing, the RAW data is converted into YCC4:2:2 format data.

[0075] In step S911, the CPU 805 controls the image processing unit 802 to perform display image processing such as gamma correction and LUT. The CPU 805 stores the data after display image processing as developed data in the RAM 808. Note that the developed data stored here has not undergone the processing described in step S904 and step S907, and therefore has not undergone any correction processing such as distortion correction.

[0076] In step S912, the CPU 805 controls the display resizing unit 803 to resize the developed data stored in RAM 808 and write it back to RAM 808 as data for HDMI output.

[0077] In step S913, the CPU 805 controls the display resize unit 803 to resize the developed data stored in RAM 808 and write it to the memory area for display output in RAM 111.

[0078] In step S914, the CPU 805 outputs the display output data generated in step S913 and written to the display output memory area in RAM 111 to the display unit 804, and terminates processing. The data output here is, as described above, image data to which lens correction processing such as distortion correction has been applied using metadata if metadata has been added to the RAW data received in step S901. On the other hand, if metadata has not been added to the RAW data received in step S901, the data is image data to which lens correction processing has not been applied.

[0079] As described above, according to Embodiment 1, the imaging device 100 maps RAW data (RAW image) along with metadata corresponding to the RAW data to the image area in the YCC4:2:2 format (12-bit) video format. The imaging device 100 then outputs the image data and metadata mapped to the image area in the YCC4:2:2 format (12-bit) video format as a video signal compliant with the HDMI standard. In this way, image data and metadata corresponding to the image data can be output to the outside in large quantities without causing image degradation.

[0080] [Embodiment 2] The various functions, processes, or methods described in Embodiment 1 can also be realized by a personal computer, microcomputer, CPU (Central Processing Unit), or microprocessor executing a program. Hereinafter in Embodiment 2, a personal computer, microcomputer, CPU (Central Processing Unit), or microprocessor will be referred to as "Computer X". In Embodiment 2, a program for controlling Computer X, which realizes the various functions, processes, or methods described in Embodiment 1, will be referred to as "Program Y".

[0081] The various functions, processes, or methods described in Embodiment 1 are realized by computer X executing program Y. In this case, program Y is supplied to computer X via a computer-readable storage medium. The computer-readable storage medium in Embodiment 2 includes at least one of a hard disk drive, magnetic storage device, optical storage device, magneto-optical storage device, memory card, volatile memory, non-volatile memory, etc. The computer-readable storage medium in Embodiment 2 is a non-transitory storage medium. [Explanation of Symbols]

[0082] 100 Imaging device

Claims

1. A first generating means for generating a RAW image; a second generating means for generating metadata corresponding to the RAW image; an arrangement means for arranging the metadata generated by the second generation means together with the RAW image generated by the first generation means in an image area in a transmission format of YCC 4:2:2 format; an output unit that outputs the RAW image and the metadata arranged by the arrangement unit in an image area in the YCC 4:2:2 transmission format;

2. 2. The imaging device according to claim 1, wherein the arrangement means arranges the metadata in a vacant area in an image area in the YCC 4:2:2 transmission format in which the RAW image is not arranged.

3. 3. The image capturing apparatus according to claim 1, wherein the arrangement unit arranges the metadata in an area after the RAW image is arranged.

4. The imaging device according to any one of claims 1 to 3, characterized in that the output means outputs the RAW image and the metadata arranged in an image area in the YCC 4:2:2 transmission format as a video signal conforming to the HDMI standard.

5. 5. The image capturing apparatus according to claim 1, wherein the metadata includes data used in a correction process for the raw image.

6. The imaging device described in any one of claims 1 to 5, characterized in that when the data size of the RAW image generated by the first generation means is larger than the size of an image area in the YCC 4:2:2 transmission format, the placement means divides the data of the RAW image into multiple pieces and places the metadata together with the divided RAW images in multiple image areas in the YCC 4:2:2 transmission format.

7. The imaging device described in claim 6, characterized in that the placement means divides the data of the RAW image into two parts, above and below, when the data size of the RAW image generated by the first generation means is larger than the size of the image area in the transmission format of the YCC 4:2:2 format.

8. The imaging device according to any one of claims 1 to 7, characterized in that the output means outputs the RAW image and the metadata in a first mode, and outputs developed data obtained by developing the RAW image in a second mode.

9. generating a RAW image; generating metadata corresponding to the raw image; placing the generated metadata together with the generated raw image in an image area in a transmission format of YCC 4:2:2 format; and outputting the raw image and the metadata arranged in an image area in the YCC 4:2:2 transmission format.

10. The imaging device computer generating a RAW image; generating metadata corresponding to the raw image; placing the generated metadata together with the generated raw image in an image area in a transmission format of YCC 4:2:2 format; and outputting the RAW image and the metadata arranged in an image area in the YCC 4:2:2 transmission format.

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