Game machine

Abstract

To provide a game machine capable of efficiently performing image processing without increasing the data amount of image data.SOLUTION: As an image for one frame to be displayed on a liquid crystal display device, when common performance image data is synthesized, multiplication processing is executed in which a white background image of the common performance image data is transmitted or hidden with respect to the liquid crystal display device. On the other hand, when a background image PH20 and a decorative symbol image P20 are synthesized as an image for one frame to be displayed on the liquid crystal display device, the multiplication processing is not executed.SELECTED DRAWING: Figure 7

Description

[Technical field]

[0001] The present invention relates to gaming machines such as pachinko machines, arrange ball machines, mahjong ball gaming machines, slots, and enclosed pachinko machines (controlled gaming machines) that circulate enclosed gaming balls internally, and more specifically, to gaming machines that can efficiently process images without increasing the amount of image data. [Background technology]

[0002] As a conventional gaming machine such as a pachinko machine, for example, a gaming machine as described in Patent Document 1 is known. This gaming machine performs image processing to make the data of a performance image transparent using an alpha channel. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2014-230586 A Summary of the Invention [Problem to be solved by the invention]

[0004] However, the above gaming machines have the problem that the amount of image data increases because they use the alpha channel to process images to make certain parts of the image transparent.Furthermore, when the amount of performance content increases, it is necessary to use the predetermined ROM capacity efficiently, but the above gaming machines have the problem that they do not provide sufficient measures for the image data used in the performance.

[0005] In view of the above problems, the present invention has an object to provide a gaming machine capable of efficiently performing image processing without increasing the amount of image data. [Means for solving the problem]

[0006] The above object of the present invention can be achieved by the following means. Note that the parentheses indicate reference symbols of the embodiments described below, but the present invention is not limited thereto.

[0007] According to the gaming machine of the present invention, a display means (for example, a liquid crystal display device 41 shown in FIG. 2 ) and An image processing means (e.g., a VDP803 shown in FIG. 3) capable of performing image processing on an image to be displayed on the display means; A first performance image having an α channel (for example, a decorative pattern image P20 shown in FIG. 7 ); A second performance image that does not have an alpha channel (for example, the common performance image data CH1 shown in FIG. 5(b)), The image processing means includes: When synthesizing the second performance image as an image for one frame to be displayed on the display means, a predetermined image processing (e.g., multiplication processing) is performed to make at least a part of the second performance image (e.g., a white background image CH1b) transparent or invisible to the display means; A feature of this invention is that when a background image (e.g., background image PH20 shown in FIG. 7(a)) as an image for one frame to be displayed on the display means is combined with the first performance image, the specified image processing (e.g., multiplication processing) is not executed. According to the gaming machine of the invention of claim 2, in the gaming machine of claim 1, a third effect image not having an alpha channel (for example, the first effect image data KH10 shown in FIG. 5(a-1) and the second effect image data KH11 shown in FIG. 5(a-2)) is further provided, The background color (e.g., white) of the second performance image (for example, the common performance image data CH1 shown in FIG. 5(b)) is different from the background color (e.g., black) of the third performance image, The image processing means (for example, the VDP803 shown in FIG. 3) When synthesizing the third performance image as one frame of an image to be displayed on the display means (e.g., liquid crystal display device 41 shown in FIG. 2), image processing (e.g., addition processing) different from the specified image processing is performed. Effect of the Invention

[0008] According to the present invention, image processing can be efficiently performed without increasing the amount of image data. [Brief description of the drawings]

[0009] [Figure 1] 1 is an oblique view showing the appearance of an amusement machine according to one embodiment of the present invention; [Diagram 2] FIG. 2 is a front view of the game board according to the embodiment. [Diagram 3] 2 is a block diagram showing a control device of the gaming machine according to the embodiment. FIG. [Figure 4] (a) shows an example of a screen when a preview effect is executed in which an image of a blue flame is displayed against a background image, and (b) shows an example of a single piece of image data consisting of an image of a blue flame and a black background image. [Diagram 5] (a-1) shows an example of first performance image data consisting of a blue flame image and a black background image, (a-2) shows an example of second performance image data consisting of a green flame image and a black background image, and (b) is a figure showing an example of common performance image data consisting of a black flame image and a white background image. [Figure 6] 5(a) to (c-1) and (d) show the process in which only a blue flame image is displayed superimposed on a background image, and (a) to (c-2) show the process in which only a green flame image is displayed superimposed on a background image. [Figure 7] (a) to (c-1) show the process of displaying only the reach image superimposed on the background image, (a) to (c-2) show the process of displaying only the chance image superimposed on the background image, and (a) to (c-3) show the process of displaying only the super hot image superimposed on the background image. [Figure 8](a) shows that red, green, and blue lighting data is placed on layers 1 to 3 for lamps, (b) shows that red editing data is placed on layer 4 for lamps, green editing data is placed on layer 5 for lamps, and blue editing data is placed on layer 6 for lamps, and (c) is an explanatory diagram showing the lighting state of the decorative lamps on the game board. [Figure 9] (a) is an explanatory diagram showing the state in which the decorative lamps on the game board change from a lit yellow state to an off state at the time of SP reach A, (b) is a diagram showing the state in which the decorative lamps on the game board change from a lit green state to an off state at the time of SP reach B, and (c) is a diagram showing the state in which the decorative lamps on the game board change from a lit red state to an off state at the time of SP reach C. [Figure 10] (a) shows a state in which, at the time of SP reach A, yellow lighting data is placed on layer 1 for lamps and white fade-out data is placed on layer 2 for lamps, and the decorative lamps on the game board transition from a yellow lighting state to an off state; (b) shows a state in which, at the time of SP reach B, green lighting data is placed on layer 1 for lamps and white fade-out data is placed on layer 2 for lamps, and the decorative lamps on the game board transition from a green lighting state to an off state; and (c) shows a state in which, at the time of SP reach C, red lighting data is placed on layer 1 for lamps and white fade-out data is placed on layer 2 for lamps, and the decorative lamps on the game board transition from a red lighting state to an off state. [Figure 11] FIG. 4 is a flowchart illustrating a main process of a main control according to the embodiment. [Figure 12] 12 is a flowchart illustrating the continuation of the main process of the main control shown in FIG. 11. [Figure 13] 12 is a flowchart illustrating the setting switching process shown in FIG. 11. [Figure 14] FIG. 11 is a flowchart illustrating a power supply abnormality check process. [Figure 15]FIG. 11 is a flowchart illustrating a timer interrupt process of main control according to the embodiment. [Figure 16] 16 is a flowchart for explaining the normal symbol processing shown in FIG. 15. [Figure 17] FIG. 16 is a flowchart illustrating the special symbol processing shown in FIG. 15. [Figure 18] 18 is a flowchart illustrating the start port check process 1(2) shown in FIG. 17. [Figure 19] A flowchart explaining the special pattern change start processing shown in Figure 17. [Figure 20] FIG. 20 is a flowchart illustrating the hit determination process shown in FIG. 19. [Figure 21] A flowchart explaining the processing during the special pattern change shown in Figure 19. [Figure 22] FIG. 20 is a flowchart illustrating the process during the special symbol confirmation time shown in FIG. 19. [Figure 23] (a) shows a normal pattern hit determination table used when executing a lottery to determine whether a normal pattern is a hit or a loss, (b) shows a special pattern big hit determination table used when executing a lottery to determine whether a special pattern is a hit or a loss, (c) shows a special pattern small hit determination table used when executing a lottery to determine whether a special pattern is a hit or a loss, and (d) shows a special electric support pattern hit determination table used when executing a lottery to determine whether a special pattern is a hit or a loss. [Figure 24] FIG. 11 is a flowchart showing main processing of sub-control according to the embodiment. [Diagram 25] FIG. 25 is a flowchart showing the data analysis process shown in FIG. 24. [Figure 26] FIG. 11 is a flowchart showing a command reception process of sub-control according to the embodiment. [Figure 27] FIG. 11 is a flowchart showing a timer interrupt process of the sub-control according to the embodiment. [Figure 28]13A shows a flowchart for explaining an initial command list for moving images, FIG. 13B shows a flowchart for explaining a normal command list for moving images, and FIG. 13C shows a flowchart for explaining a command list for still images. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] Hereinafter, an embodiment of a gaming machine according to the present invention will be described in detail with reference to the drawings, taking a pachinko gaming machine as an example. In the following description, when directions such as up, down, left and right are indicated, they refer to up, down, left and right as viewed from the front of the figure.

[0011] <Explanation of the external appearance of the pachinko machine> First, the external configuration of a pachinko gaming machine according to this embodiment will be described with reference to Figs. 1 and 2.

[0012] <Explanation of the external appearance of the front of the pachinko machine>

[0013] As shown in Fig. 1, a pachinko game machine 1 has a rectangular front frame 3 attached to the front of a wooden outer frame 2 so as to be able to open and close, and a game board 4 mounted in a game board storage frame (not shown) attached to the back of the front frame 3. The game board 4 is mounted with a game area 40 shown in Fig. 2 facing the front, and as shown in Fig. 1, a glass door frame 5 supporting transparent glass is provided in front of the game area 40. The game area 40 is an area surrounded by a ball guide rail 6 (see Fig. 2) arranged on the surface of the game board 4.

[0014] On the other hand, as shown in FIG. 1, the pachinko game machine 1 has a front operation panel 7 disposed under the glass door frame 5, an upper tray unit 8 is provided on the front operation panel 7, and an upper tray 9 for storing the discharged game balls is integrally formed on the upper tray unit 8. The front operation panel 7 is also provided with a ball loan button 11 and a prepaid card discharge button 12 (card return button 12). The upper tray surface of the upper tray 9 is provided with a push button type performance button device 13 that can change the performance effect by pressing it when a built-in lamp (not shown) is lit. The upper tray 9 is also provided with a ball removal button 14 for removing the game balls stored in the upper tray 9 downward, and further provided with a setting button 15 consisting of a roughly cross key. This setting button 15 can be operated by the player and consists of a circular decision key 15a located in the center, a triangular up key 15b located above the decision key 15a in the figure, a triangular left key 15c located to the left of the decision key 15a in the figure, a triangular right key 15d located to the right of the decision key 15a in the figure, and a triangular down key 15e located below the decision key 15a in the figure.

[0015] 1, a launch handle 16 for operating the launch unit is provided on the right end side of the front operation panel 7, and speakers 17 for emitting background music and sound effects are provided on both upper side surfaces of the front frame 3 and near the launch handle 16. In addition, decorative lamps such as full-color LED lamps that create dramatic effects with decorative lighting are provided around the periphery of the front frame 3.

[0016] <Explanation of the appearance of the game board> On the other hand, as shown in FIG. 2, a liquid crystal display device 41 such as an LCD (Liquid Crystal Display) is disposed in the approximate center of the game area 40 of the game board 4. The liquid crystal display device 41 divides the display area into three areas, left, center, and right, and can independently display numbers, characters, letters (character conversations, lyrics subtitles, etc.) or patterns (special patterns and normal patterns). Around the liquid crystal display device 41, a top decoration 42a, a left decoration 42b, and a right decoration 42c for decoration are provided, and a movable role device 43 is disposed on the back side of the top decoration 42a, the left decoration 42b, and the right decoration 42c. In addition, decorative lamps such as full-color LED lamps that produce a dramatic effect by light decoration are disposed on the top decoration 42a, the left decoration 42b, and the right decoration 42c.

[0017] As shown in Fig. 2, the movable accessory device 43 is composed of an upper movable accessory 43a, a left movable accessory 43b, a right movable accessory 43c, an upper left movable accessory 43d, which perform a predetermined performance operation as the game progresses, and a motor (not shown) such as a two-phase stepping motor that drives the upper, left, right, and upper left movable accessories 43a to 43d. In addition, decorative lamps such as full-color LED lamps that create a performance effect by light decoration are arranged on these upper, left, right, and upper left movable accessories 43a to 43d.

[0018] On the other hand, the special symbol 1 start hole 44 is arranged directly below the liquid crystal display device 41, and a special symbol 1 start hole switch 44a (see FIG. 3) for detecting winning balls is provided inside the special symbol 1 start hole switch 44a. The number of effective winning balls detected by the special symbol 1 start hole switch 44a (see FIG. 3), that is, the number of first start reserved balls, is displayed on the liquid crystal display device 41 as a predetermined number (for example, 4). When a game ball enters the special symbol 1 start hole 44 and is detected by the special symbol 1 start hole switch 44a (see FIG. 3), the number of first start reserved balls is increased by 1 (+1), and when the variable display of special symbols such as numbers, characters, or symbols (decorative symbols) begins, the number is decreased by 1 (-1). Decorative lamps such as full-color LED lamps that produce a performance effect by light decoration are arranged around the special symbol 1 start hole 44.

[0019] On the other hand, as shown in Fig. 2, a special symbol 2 start device 45 is disposed on the lower right side of the liquid crystal display device 41. This special symbol 2 start device 45 is composed of a special symbol 2 start port 45a, an opening / closing section 45b that can be changed between an "open state" in which the special symbol 2 start port 45a is in an open state where a game ball can enter, and a "closed state" in which the special symbol 2 start port 45a is in a closed state where a game ball cannot enter, a ball entry guide section 45c that can be changed between a "guiding state" that guides the game ball toward the special symbol 2 start port 45a and a "non-guiding state" that does not guide the game ball, and a special symbol 2 start port switch 45a1 (see Fig. 3) that detects the game ball that has entered the special symbol 2 start port 45a.

[0020] The special symbol 2 start hole 45a is opened almost horizontally toward the right side in the front left-right direction shown in FIG. 2, and a special symbol 2 start hole switch 45a1 (see FIG. 3) for detecting winning balls is provided inside the special symbol 2 start hole 45a. The number of valid winning balls detected by the special symbol 2 start hole switch 45a1 (see FIG. 3), that is, the number of second start reserved balls, is displayed on the liquid crystal display device 41 as a predetermined number (for example, 4). Note that, when a game ball enters the special symbol 2 start hole 45a and is detected by the special symbol 2 start hole switch 45a1 (see FIG. 3), the number of second start reserved balls is increased by 1 (+1), and when the variable display of special symbols such as numbers, characters, or patterns (decorative patterns) starts, the number of second start reserved balls is decreased by 1 (-1).

[0021] The opening and closing section 45b is provided with an opening and closing member (not shown) that can move left and right relative to the special symbol 2 starting hole 45a, and a normal electric role solenoid 45b2 (see FIG. 3) that drives and controls the opening and closing member (not shown). When the opening and closing section 45b is in a closed state, the opening and closing member (not shown) protrudes into the special symbol 2 starting hole 45a to prevent game balls from entering the special symbol 2 starting hole 45a, and when in an open state, it retreats to allow game balls to enter the special symbol 2 starting hole 45a.

[0022] The ball entry guide section 45c is provided with a guide member (not shown) that is inclined downward from the right side to the left side as shown in Fig. 2 (inclined downward toward the special symbol 2 starting hole 45a side). This guide member (not shown) is driven and controlled by the normal electric role solenoid 45b2 (see Fig. 3).

[0023] In the guide state, the ball entry guide section 45c has a guide member (not shown) that slides to the front side of the play area 40 (the glass door frame 5 side shown in FIG. 1) and protrudes, guiding the game ball placed on the upper side to the special symbol 2 start port 45a, and in the non-guide state, the guide member (not shown) slides backward (to the rear side of the play area 40) and retreats. As a result, even if a game ball is placed on the guide member (not shown) when the guide member (not shown) is in the guide state, if the guide member (not shown) changes to the non-guide state before the game ball enters the special symbol 2 start port 45a and slides backward, the game ball will flow downstream without entering the special symbol 2 start port 45a. The guide member (not shown) and the opening and closing member (not shown) are designed to operate in conjunction with each other.

[0024] In the following, the special symbol 2 starter 45 as described above may be referred to as a normal electric device. In addition, the special symbol 2 starter 45 is equipped with a decorative lamp such as a full-color LED lamp that produces a dramatic effect by light decoration.

[0025] On the other hand, as shown in Fig. 2, a winning device 46 is arranged on the right side of the special symbol 1 starting hole 44. When the winning device 46 wins the lottery for the special symbol described later, that is, during a winning game state, the opening and closing door 46a is driven and controlled by a special electric role solenoid 46b (see Fig. 3) so that the large winning hole (not shown) closed by the opening and closing door 46a is opened, and the game ball can enter the large winning hole (not shown). The game ball that enters the large winning hole (not shown) is detected as a winning ball by a large winning hole switch 46c (see Fig. 3) provided inside the large winning hole (not shown).

[0026] On the other hand, when the special symbol is not selected, that is, when the game is not in a winning state, the opening and closing door 46a is driven and controlled by the special electric role solenoid 46b (see FIG. 3) to close the big prize opening (not shown). This makes it impossible for the game ball to enter the big prize opening (not shown). In the following, the device combining the opening and closing door 46a and the special electric role solenoid 46b may be referred to as the special electric role. In addition, the winning device 46 is provided with decorative lamps such as full-color LED lamps that create a dramatic effect by using light decoration.

[0027] Incidentally, a distribution device 47, which is a conventionally known structure, is provided in the winning device 46. As shown in Fig. 2, this distribution device 47 has a V area 47a and an outlet 47b, and when a game ball enters a large winning port (not shown), the game ball is distributed to either the V area 47a or the outlet 47b. The distribution device 47 does not distribute the game ball that entered the large winning port (not shown) to the V area 47a, but to the outlet 47b, unless a predetermined game state is reached.

[0028] On the other hand, as shown in Fig. 2, a normal symbol start port 48 consisting of a gate is arranged in the upper right part of the liquid crystal display device 41, and a normal symbol start port switch 48a (see Fig. 3) for detecting the passage of the game ball is provided inside the normal symbol start port. In addition, a normal prize port 49 is arranged on the right side of the winning device 46 and on the left side of the special symbol 1 start port 44. This general prize port 49 is composed of an upper right general prize port 49a arranged on the right side of the winning device 46, an upper left general prize port 49b arranged on the left side of the special symbol 1 start port 44, a middle left general prize port 49c, and a lower left general prize port 49d. The upper right general winning opening 49a is provided with an upper right general winning opening switch 49a1 (see FIG. 3) for detecting the passage of the game ball, the upper left general winning opening 49b is provided with an upper left general winning opening switch 49b1 (see FIG. 3) for detecting the passage of the game ball, the middle left general winning opening 49c is provided with a middle left general winning opening switch 49c1 (see FIG. 3) for detecting the passage of the game ball, and the lower left general winning opening 49d is provided with a lower left general winning opening switch 49d1 (see FIG. 3) for detecting the passage of the game ball. The general winning opening 49 is provided with a decorative lamp such as a full-color LED lamp that produces a performance effect by light decoration.

[0029] On the other hand, just below the special symbol 1 starting hole 44, an outlet 50 is arranged into which game balls (out balls) that flow down to the lowest part of the game area 40 without winning are entered. The game balls that enter the outlet 50 are detected as non-winning balls by an outlet switch 50a (see FIG. 3) provided inside, and the winning balls described above also flow down to the lowest part of the game area 4 through the back side of the game board 4, so they are detected by the outlet switch 50a (see FIG. 3). Therefore, the outlet switch 50a (see FIG. 3) detects the total number of outs discharged, that is, the same number of game balls as the game balls launched into the game area 40 by the launch handle 16. In addition, when counting the game balls launched into the game area 40 by the launch handle 16, a switch may be provided at the point where the ball guide rail 6 enters the game area 40 to count the balls.

[0030] On the other hand, three seven-segment displays are arranged in the lower right periphery of the play area 40 of the game board 4, two of which are special symbol display devices 51, and the other seven-segment display device 53a displays special symbol 1, special symbol 2, the number of balls reserved for the start of normal symbols, and the game status (for example, advantageous game status, etc.). As shown in Fig. 2, this special symbol display device 51 is composed of a special symbol 1 display device 51a and a special symbol 2 display device 51b, and a normal symbol display device 52 consisting of one LED is provided to the left of the special symbol 1 display device 51a, and further, a round lamp 53b that notifies the number of rounds of the jackpot game and a right hit notification lamp 53c that notifies the right hit are provided.

[0031] In addition, an identification lamp device 51A that displays identification information corresponding to special pattern 1 and special pattern 2 is provided on the upper end side of the left decoration 43b.

[0032] This identification lamp device 51A has first and second identification lamps 51Aa and 51Ab for informing the player that the special symbol 1 and special symbol 2 are changing, or that the special symbol 1 and special symbol 2 are winning or losing. The first identification lamp 51Aa corresponds to the special symbol 1, and the second identification lamp 51Ab corresponds to the special symbol 2. When the special symbol 1 is changing, the first identification lamp 51Aa flashes, when the special symbol 1 is a winning symbol, the first identification lamp 51Aa is turned on, and when the special symbol 1 is a losing symbol, the first identification lamp 51Aa is turned off. Furthermore, when the special symbol 2 is changing, the second identification lamp 51Ab flashes, when the special symbol 2 is a winning symbol, the second identification lamp 51Ab is turned on, and when the special symbol 2 is a losing symbol, the second identification lamp 51Ab is turned off.

[0033] Although not shown, a plurality of game pegs are arranged in the game area 40 of the game board 4, and a windmill 54 is also arranged as a member for changing the falling direction of game balls.

[0034] <Control device description> Next, the control device that performs electronic control according to the progress of the game and is provided in the pachinko game machine 1 having the above-mentioned external configuration will be described with reference to Fig. 3. As shown in Fig. 3, this control device is mainly composed of a main control board 60 that controls the overall game operation, a payout / launch control board 70 that pays out game balls based on control commands from the main control board 60, and a sub-control board 80 that controls images, lights, and sounds.

[0035] <Explanation about the main control board> The main control board 60 is mainly equipped with a one-chip microcomputer 600 consisting of a main control CPU 600a, a main control ROM 600b storing a game program describing a series of game control procedures, and a main control RAM 600c functioning as a working area, buffer memory, etc., a measurement / setting display device 610 consisting of 7 segments that displays (performance display) information related to the ratio of the number of winning balls when the probability of winning is low (when the probability of winning is in a normal low probability state) and also displays the setting contents of the probability of generating a game state advantageous to the player, a RAM clear switch 620, and a setting key switch 630.

[0036] A payout / launch control board 70 that controls the payout motor M to pay out game balls is connected to the main control board 60 configured in this manner. In addition, there are connected a special pattern 1 start port switch 44a which detects winning at the special pattern 1 start port 44, a special pattern 2 start port switch 45a1 which detects winning at the special pattern 2 start port 45a, a normal pattern start port switch 48a which detects passage through the normal pattern start port 48, an upper right general prize port switch 49a1, an upper left general prize port switch 49b1, a middle left general prize port switch 49c1, and a lower left general prize port switch 49d1 which detect winning at the general prize ports 49 (upper right general prize port 49a, upper left general prize port 49b, middle left general prize port 49c, and lower left general prize port 49d), a large prize port switch 46c which detects winning at a large prize port (not shown) which is opened or closed by the opening and closing door 46a, and an outlet switch 50a which can detect the same number of game balls as the game balls launched into the game area 40 by the launch handle 16. Furthermore, a normal electric role solenoid 45b2 that drives and controls the opening and closing member (not shown) and the guide member (not shown), a special electric role solenoid 46b that controls the operation of the opening and closing door 46a, a distribution device 47, a special symbol 1 display device 51a, a special symbol 2 display device 51b, a normal symbol display device 52, a 7-segment display device 53a, a round lamp 53b, and a right-hit notification lamp 53c are connected. Furthermore, a cheating detection board 55 that detects cheating by the player is connected.

[0037] When the main control board 60 thus configured receives a signal from the special symbol 1 start port switch 44a, the special symbol 2 start port switch 45a1, or the normal symbol start port switch 47a at the main control CPU 600a, it performs a lottery, determines the variation pattern of the special symbol and the display contents of the stop symbol or normal symbol according to the winning / losing information that is the lottery result, and transmits the determined information to the special symbol 1 display device 51a, the special symbol 2 display device 51b, or the normal symbol display device 52. As a result, the lottery result is displayed on the special symbol 1 display device 51a, the special symbol 2 display device 51b, or the normal symbol display device 52. Furthermore, the main control board 60, i.e., the main control CPU 600a, generates a performance control command DI_CMD including the determined information and transmits it to the sub-control board 80. In addition, when the main control board 60, i.e., the main control CPU 600a, receives signals from the special pattern 1 start port switch 44a, the special pattern 2 start port switch 45a, the upper right general prize port switch 49a1, the upper left general prize port switch 49b1, the middle left general prize port switch 49c1, the lower left general prize port switch 49d1, and the large prize port switch 46c, it determines how many game balls to pay out to the player and sends a payout control command PAY_CMD containing that determined information to the payout / launch control board 70, which then pays out the game balls to the player.

[0038] In addition, if the result of the lottery is that a normal pattern is selected, the normal electric device solenoid 45b2 is controlled to keep the opening / closing member (not shown) in the open state and the guide member (not shown) in the guiding state for a predetermined time, and if the lottery is that of a special pattern, the special electric device solenoid 46b is controlled to open the large prize opening (not shown).

[0039] In a type 1 / type 2 mixed gaming machine, when a small win game state is reached, the opening and closing door 46a is controlled to repeatedly open and close the large prize opening (not shown), and when a gaming ball enters the large prize opening (not shown), the distribution device 47 is controlled so that the gaming ball is distributed to the V area 47a.

[0040] On the other hand, the main control board 60, i.e., the main control CPU 600a, measures the number of prize balls every time it receives a signal from the special symbol 1 start port switch 44a, the special symbol 2 start port switch 45a1, the upper right general prize port switch 49a1, the upper left general prize port switch 49b1, the middle left general prize port switch 49c1, the lower left general prize port switch 49d1, and the large prize port switch 46c, and measures the total number of game balls discharged every time it receives a signal from the outlet switch 50a. Then, the main control board 60, i.e., the main control CPU 600a, outputs contents (performance display) related to the ratio of how many prize balls were played at the time of low probability, etc., based on the measured number of prize balls and the total number of game balls discharged, to the measurement / setting display device 610. As a result, contents (performance display) related to the ratio of how many prize balls were played at the time of low probability, etc., are displayed on the measurement / setting display device 610.

[0041] Furthermore, the measurement / setting display device 610 can display the setting contents of the probability of generating a game state advantageous to the player in six steps, for example, from "1" to "6". Therefore, when changing such setting contents, when a dedicated key is inserted into the setting key switch 630 and turned ON, the setting contents of the probability of generating a game state advantageous to the player can be changed in six steps, for example, from "1" to "6" by the RAM clear switch 620 (for example, the setting "6" has the highest probability of generating a game state advantageous to the player, and the setting "1" has the lowest probability of generating a game state advantageous to the player). The setting change contents are then displayed on the measurement / setting display device 610, and when the setting change contents are confirmed, the dot on the lower right side of the 7-segment is lit to indicate that the setting contents have been confirmed.

[0042] On the other hand, when the RAM clear switch 620 is pressed except when a dedicated key is inserted into the setting key switch 630 and turned ON, the entire memory area of ​​the main control RAM 600c is not cleared, but only a portion of the memory area is cleared.

[0043] On the other hand, when the main control board 60, i.e., the main control CPU 600a, receives a fraudulent behavior detection signal that detects a player's fraudulent behavior using a magnetic sensor, radio wave sensor, or vibration sensor mounted on the fraud detection board 55, it generates a fraudulent error command (presentation control command DI_CMD) and sends it to the sub-control board 80.

[0044] <Explanation about the Dispatch / Fire Control Board> The payout / launch control board 70 receives the payout control command PAY_CMD from the main control board 60 (main control CPU 600a) and generates a payout motor signal based on the received payout control command PAY_CMD. The payout motor signal thus generated controls the payout motor M to pay out game balls to the player. Furthermore, the payout / launch control board 70 performs processing to start or stop the operation of firing game balls in response to the player's operation based on a prize ball counting signal indicating the payout operation of game balls and a status signal related to an abnormality in the payout operation.

[0045] On the other hand, a touch sensor is provided on the periphery of the launch handle 16 shown in Fig. 1, and when the player's hand touches the touch sensor of the launch handle 16, the touch sensor outputs a detection signal to the payout / launch control board 70 as shown in Fig. 3. In response to this, the payout / launch control board 70 transmits the detection signal to the main control board 60 (main control CPU 600a). The main control board 60 (main control CPU 600a) then transmits the detection signal to the sub-control board 80 as a performance control command DI_CMD. This makes it possible to transmit information as to whether or not the player has touched the handle 16 to play to the sub-control board 80.

[0046] Incidentally, the payout / launch control board 70 also performs the process of lending balls to the player. That is, when the ball lending button 11 shown in Figs. 1 and 3 is pressed, a ball lending signal is sent to a CR unit (not shown) arranged adjacent to the pachinko game machine 1. In response to this, the CR unit sends a ball lending request signal to the payout / launch control board 70. Then, in response to this signal, the payout / launch control board 70 pays out game balls to the player, and when the payout is completed, it sends a ball lending completion signal to the CR unit. Thus, in this way, the payout / launch control board 70 performs the process of lending balls to the player.

[0047] <Explanation about the sub-control board> The sub-control board 80 receives performance control commands DI_CMD from the main control board 60 (main control CPU 600a) and controls the execution of various performances, and is equipped with a sub one-chip microcomputer 800 consisting of a sub-control CPU 800a that controls the display images displayed on the liquid crystal display device 41, a sub-control ROM 800b in which control programs describing performance control procedures are stored, and a sub-control RAM 800c that functions as a working area, buffer memory, etc.

[0048] Furthermore, the sub-control board 80 is equipped with a sound LSI 801 that generates desired background music and sound effects, a sound RAM 802 that functions as a working area or buffer memory, a VDP 803 that generates image data to be displayed on the liquid crystal display device 41 based on instructions from the sub one-chip microcomputer 800, a DDR2 SDRAM 804 that is composed of a working area for expanding compressed video data and a frame buffer area for temporarily storing image data to be displayed on the liquid crystal display device 41, and a game ROM 805 in which compressed still image data and compressed video data, CG data, and sound data such as background music and sound effects are stored in advance. Note that the still image is a so-called sprite image, which indicates a single image such as text data such as characters, a background image, or a special pattern. Note that the moving image means a collection of multiple still images (multiple frames) that change continuously, and smooth movement is reproduced by drawing multiple still images continuously on the liquid crystal display device 41.

[0049] The sub-control board 80 thus constructed is equipped with decorative lamps such as full-color LED lamps that produce lamp effects, and is connected to a decorative lamp board 90 equipped with an LED driver that controls these decorative lamps, and is further connected to a push-button type effect button device 13 that can be pressed by the player to change the effect when the built-in lamp (not shown) is lit, and a speaker 17 that emits background music, sound effects, etc. Furthermore, the sub-control board 80 is connected to a movable role device 43 that performs a predetermined effect operation as the game progresses, an identification lamp device 51A that notifies the player that the special symbols 1 and 2 are changing, or that the special symbols 1 and 2 have won or lost, a setting button 15 that allows various settings to be made, and a liquid crystal display device 41.

[0050] Thus, the sub-control board 80 thus configured receives, in the sub-control CPU 800a, a presentation control command DI_CMD including basic information required for the special symbol variation pattern based on the lottery result, the current game state, the number of balls reserved for starting, the decorative symbols to be stopped based on the lottery result, etc., transmitted from the main control board 60 (main control CPU 600a). Then, the sub-control CPU 800a determines, by lottery, a presentation pattern corresponding to the received presentation control command DI_CMD from among a large number of presentation patterns previously stored in the sub-control ROM 800b, and temporarily stores a control signal instructing the execution of the determined presentation pattern in the sub-control RAM 800c.

[0051] The sub-control CPU 800a transmits a sound-related control signal, among the control signals instructing the execution of the presentation pattern stored in the sub-control RAM 800c, to the sound LSI 801. In response to this, the sound LSI 801 reads out sound data corresponding to the control signal from the game ROM 805 or sound RAM 802, and outputs it to the speaker 17. As a result, the speaker 17 produces background music and sound effects corresponding to the presentation pattern determined above.

[0052] Furthermore, the sub-control CPU 800a transmits a light-related control signal among the control signals instructing execution of the performance pattern stored in the sub-control RAM 800c to the decorative lamp board 90. As a result, the decorative lamp board 90 controls the turning on and off of decorative lamps such as full-color LED lamps that produce lamp performance effects, and thus a lamp performance corresponding to the determined performance pattern is executed.

[0053] The sub-control CPU800a then transmits to the VDP803 a command list relating to images among the control signals for instructing execution of the performance pattern stored in the sub-control RAM800c. As a result, the VDP803 generates image data to display an image based on the command list, and transmits the generated image data to the liquid crystal display device 41, thereby causing an image corresponding to the determined performance pattern to be displayed on the liquid crystal display device 41. Note that the image data displayed on the liquid crystal display device 41 is updated every frame, but the VDP803 transmits a VSYNC (vertical synchronization signal) shown in FIG. 3 as an interrupt signal to the sub-control CPU800a so that the sub one-chip microcomputer 800 (sub-control CPU800a) can know that the display operation of this one frame has ended. This allows the sub-control CPU800a to know that one frame's worth of image data has been displayed on the liquid crystal display device 41. Note that this VSYNC interrupt signal is generated, for example, every 33 ms.

[0054] Furthermore, the sub-control CPU 800a transmits, among the control signals instructing the execution of the performance pattern stored in the sub-control RAM 800c, a control signal relating to the movable role device to the movable role device 43. As a result, the movable role device 43 moves in accordance with the determined performance pattern.

[0055] <Power supply board explanation> Incidentally, power is supplied to each of the boards described above from a power supply board 130 shown in Fig. 3. This power supply board 130 is configured to include a voltage generation unit 1300, a voltage monitoring unit 1310, and a system reset generation unit 1320. This voltage generation unit 1300 receives an AC voltage of 24V, which is an external power source supplied from a transformer (not shown) installed in the game center, and generates multiple types of DC voltages, and the generated DC voltages are supplied to each board (not shown).

[0056] Furthermore, the voltage monitoring unit 1310 monitors the AC24V voltage, and when it detects a voltage abnormality due to the voltage being cut off or a power outage occurring, it outputs a voltage abnormality signal ALARM to the main control board 60. The voltage abnormality signal ALARM outputs an "L" level signal when a voltage abnormality occurs, and outputs an "H" level signal when the voltage is normal.

[0057] On the other hand, the system reset generation unit 1320 generates a system reset signal RST when the power is turned on, and the generated system reset signal RST is output to each board.

[0058] <Explanation regarding image data> Here, image data will be described.

[0059] Generally, a method is known in which the image data has alpha channel data, thereby specifying the transparency of all or a part of the image data.

[0060] For example, when a preview performance is executed in which a blue flame image (see image P1) is displayed against a background image PH1 as shown in Fig. 4(a), a single piece of image data KH1 consisting of a blue flame image KH1a and a black background image KH1b as shown in Fig. 4(b) is superimposed on the background image PH1 as shown in Fig. 4(a). To explain in more detail, since the black background image KH1b of this single piece of image data KH1 is not desired to be displayed on the liquid crystal display device 41 (see Fig. 2), in order to make this black background image KH1b transparent, if the black background image KH1b is made transparent using the α channel and superimposed on the background image PH1 as shown in Fig. 4(a), only the blue flame image (see image P1) is displayed against the background image PH1 as shown in Fig. 4(a) on the liquid crystal display device 41 (see Fig. 2).

[0061] However, when the alpha channel is used, a total of 32 bits of data is required for one dot, consisting of 8 bits x 3 for "RGB" plus 8 bits for the "alpha channel." In this regard, if the preview performance includes variations such as green and red flame images in addition to the blue flame image shown in Figure 4(a) (see image P1), the amount of data increases if each image data has an alpha channel. Therefore, eliminating the alpha channel reduces the capacity.

[0062] However, since the preview performance is often superimposed on other performance images and displayed on the liquid crystal display device 41 (see FIG. 2), the α channel must be used to make unnecessary parts transparent. Therefore, the α channel cannot be eliminated, and there is a problem that the amount of data of the image data increases.

[0063] Therefore, in this embodiment, it is possible to perform image processing similar to that when the α channel is used, even without using the α channel. This point will be described in detail below.

[0064] First, in the preview performance, performance image data (for example, performance image data as shown in Fig. 5(a-1) and (a-2)) corresponding to a plurality of performances with different reliability of whether or not a profitable state advantageous to the player is generated is prepared. To be more specific, the first performance image data KH10 shown in Fig. 5(a-1) is a single image data consisting of a blue flame image KH10a and a black background image KH10b, and the second performance image data KH11 shown in Fig. 5(a-2) is a single image data consisting of a green flame image KH11a and a black background image KH11b. The second performance image data KH11 shown in Fig. 5(a-2) has a higher reliability of whether or not a profitable state advantageous to the player is generated than the first performance image data KH10 shown in Fig. 5(a-1).

[0065] Meanwhile, common effect image data (for example, common effect image data as shown in FIG. 5(b)) is prepared in addition to the above effect image data (for example, effect image data KH10, KH11 as shown in FIG. 5(a-1) and (a-2)). To be more specific, the common effect image data CH1 shown in FIG. 5(b) is a single image data consisting of a black flame image CH1a and a white background image CH1b. The effect image data (for example, effect image data KH10, KH11 as shown in FIG. 5(a-1) and (a-2)) and the common effect image data (for example, common effect image data CH1 as shown in FIG. 5(b)) are pre-stored in the game ROM 805 shown in FIG. 3.

[0066] Incidentally, the performance image data described above (for example, performance image data KH10, KH11 as shown in Figs. 5(a-1) and (a-2)) and the common performance image data (for example, common performance image data CH1 as shown in Fig. 5(b)) do not have the alpha channel described above. Therefore, in order to make unnecessary parts of the performance image data transparent, the following image processing is performed in the same way as when the alpha channel is used.

[0067] That is, the VDP 803 (see FIG. 3) draws the background image PH10 shown in FIG. 6(a) stored in advance in the gaming ROM 805 (see FIG. 3), and when drawing the common effect image data CH1 stored in advance in the gaming ROM 805 (see FIG. 3) over the part PH10a of the drawn background image PH10, sets the drawing mode to "multiplication" and synthesizes it. Note that the white background image CH1b of the common effect image data CH1 shown in FIG. 6(a) is a color that is ignored for the overlapping image (the part PH10a of the background image PH10 shown in FIG. 6(a)) in "multiplication". That is, white is expressed as RGB data, RGB=(255,255,255). Since 255 is the maximum value of 8 bits, white is (1,1,1) in terms of ratio. Therefore, even if a portion PH10a of the background image PH10 shown in FIG. 6(a) is multiplied by 1, the color of the portion PH10a of the background image PH10 does not change.

[0068] Thus, by doing this, as shown in Fig. 6(b), the white background image CH1b of the common performance image data CH1 shown in Fig. 6(a) becomes transparent or invisible with respect to the background image PH10, so that only the black flame image CH1a is displayed as if it were overlapping the background image PH10. Note that the overlapping portion of the background image PH10 becomes dark.

[0069] Next, the VDP 803 (see FIG. 3) sets the drawing mode to "addition" to superimpose and draw the first performance image data KH10 stored in advance in the game ROM 805 (see FIG. 3) on a portion PH10b of the background image PH10 shown in FIG. 6(c-1) in which a black flame image CH1a is superimposed on the background image PH10 shown in FIG. 6(c-1). Note that the black background image KH10b of the first performance image data KH10 shown in FIG. 6(c-1) is a color that is ignored for the overlapping image (the portion PH10b of the background image PH10 shown in FIG. 6(c-1)) in "addition". That is, black is expressed as RGB data, RGB=(0,0,0). Therefore, even if 0 is added to the portion PH10b of the background image PH10 shown in FIG. 6(c-1), the color of the portion PH10b of the background image PH10 does not change.

[0070] Thus, by doing this, the black background image KH10b of the first performance image data KH10 shown in Figure 6 (c-1) becomes transparent or hidden against the background image PH10, so that only the blue flame image KH10a is displayed on the liquid crystal display device 41 as if it were superimposed on the background image PH10, as shown in Figure 6 (d).

[0071] On the other hand, the same processing as above can be performed on the second performance image data KH11 (see FIG. 5(a-2)), which is one of the variations of the preview performance. That is, when the VDP 803 (see FIG. 3) draws the second performance image data KH11 stored in advance in the game ROM 805 (see FIG. 3) on a part PH10b of the background image PH10 shown in FIG. 6(c-2) in which the black flame image CH1a is superimposed, the VDP 803 (see FIG. 3) sets the drawing mode to "addition" and synthesizes the image. As a result, the black background image KH11b of the second performance image data KH11 shown in FIG. 6(c-2) becomes transparent or invisible with respect to the background image PH10, so that only the green flame image KH11a is displayed as if it is superimposed on the background image PH10 shown in FIG. 6(d) as shown in FIG. 6(c-2).

[0072] Thus, by performing the above-mentioned processing, image processing can be performed in the same way as when an alpha channel is used, even without an alpha channel. Therefore, the problem of increasing the amount of data of image data can also be solved. That is, if the above-described performance image data (for example, performance image data KH10, KH11 as shown in Figs. 5(a-1) and (a-2)) has an alpha channel and has a data amount of, for example, 1 MB, without an alpha channel, the data amount will be 0.7 MB. If there are five variations of this performance image data, blue, yellow, green, red, and rainbow, with an alpha channel, the data amount will be 1 MB x 5 = 5 MB, and without an alpha channel, the data amount will be 0.7 MB x 5 = 3.5 MB. And, if the common performance image data CH1 shown in Fig. 5(b) has a data amount of 0.5 MB, without an alpha channel, the total data amount will be 3.5 MB + 0.5 MB = 4.0 MB. Therefore, the data capacity can be reduced by 1 MB from the data amount with an alpha channel. Therefore, the problem of increasing the amount of image data can be solved.

[0073] By the way, when performing the above processing, it is possible to achieve the state shown in Figure 6(d) by using only "addition" processing without performing "multiplication" processing.

[0074] However, since the "addition" process has the property of making the overlaying color brighter, if only the "addition" process is performed, the overlaying portion may become too bright with respect to the background image PH10, resulting in so-called blown-out highlights. Therefore, in this embodiment, since the "multiplication" process has the property of making the overlaying color darker, in order to prevent the overlaying portion from becoming too bright, the common effect image data CH1 is first overlayed on the background image PH10 by a multiplication process, and then the effect image data is overlayed by an addition process to darken and then brighten the image. This prevents the overlaying portion from becoming too bright with respect to the background image PH10, resulting in so-called blown-out highlights.

[0075] Therefore, by carrying out the above-mentioned processing, image processing can be carried out efficiently without increasing the amount of image data.

[0076] Here, in addition to the above-mentioned "multiplication" and "addition" processes, "hard light" and "overlay" processes can also be used. "Hard light" processes produce different results depending on the brightness of the overlaid colors, so that overlaying bright colors produces a brighter result, and overlaying dark colors produces a darker result. "Overlay" processes, after synthesis, make bright areas brighter and dark areas darker. In other words, such "hard light" and "overlay" processes use gray as a reference to make bright areas brighter and dark areas darker, so "hard light" and "overlay" processes are performed according to the desired effect. A detailed explanation is given below using specific examples.

[0077] The VDP 803 (see FIG. 3) draws a background image PH20 shown in FIG. 7(a) which is pre-stored in the game ROM 805 (see FIG. 3), and then draws and composites a decorative pattern image P20 onto a portion PH20a of the drawn background image PH20.

[0078] By the way, the decorative pattern image P20 has an α channel. This is because decorative pattern images are frequently used, and if the above-described "addition" process and "multiplication" process are always performed, the processing load increases and the processing speed decreases. To prevent this, the decorative pattern image P20 has an α channel.

[0079] Here, when synthesizing such a decorative pattern image P20, as shown in Fig. 7(a), the left decorative pattern image P20a and the right decorative pattern image P20c are in a state of stopping at "7", so the VDP803 (see Fig. 3) synthesizes the decorative pattern image data of the "7" pattern on the part PH20a of the background image PH20 shown in Fig. 7(a) after making the unnecessary parts of the left decorative pattern image P20a and the right decorative pattern image P20c (for example, the background part of the decorative pattern image) transparent based on the transparency data set in the α channel. On the other hand, since the middle decorative pattern image P20b is in a state where multiple patterns are fluctuating, the VDP803 (see Fig. 3) draws and synthesizes on the part PH20a of the background image PH20 shown in Fig. 7(a) after making the unnecessary parts of the middle decorative pattern image P20b (for example, the background part of the decorative pattern image) transparent based on the transparency data set in the α channel for each of the multiple patterns. This results in a background image PH20 with the decorative pattern image P20 superimposed thereon, as shown in Figs. 7(b-1) to (b-3).

[0080] Next, the VDP 803 (see FIG. 3) sets the drawing mode to "hard light" or "overlay" to synthesize the first performance material image data EG1, in which the character image EG1b "reach" is arranged in the center of the gray background image EG1a shown in FIG. 7(b-1) stored in advance in the game ROM 805 (see FIG. 3), on a part PH20b of the background image PH20 shown in FIG. 7(b-1). As a result, the gray background image EG1a of the first performance material image data EG1 shown in FIG. 7(b-1) becomes transparent or invisible with respect to the background image PH20 shown in FIG. 7(b-1), so that only the character image EG1b "reach" is displayed on the liquid crystal display device 41 as if it were overlapped on the background image PH20, as shown in FIG. 7(c-1). The gray of this background image EG1a is composed of RGB values ​​of (127, 127, 127) or (128, 128, 128).

[0081] On the other hand, in the second performance material image data EG2 in which the character image EG2b "Chance" is arranged in the center of the gray background image EG2a shown in Fig. 7(b-2), when the second performance material image data EG2 is drawn over a part PH20b of the background image PH20 shown in Fig. 7(b-2), the drawing mode is set to "hard light" or "overlay" for synthesis. As a result, the gray background image EG2a of the second performance material image data EG2 shown in Fig. 7(b-2) becomes transparent or invisible with respect to the background image PH20 shown in Fig. 7(b-2), so that only the character image EG2b "Chance" is displayed on the liquid crystal display device 41 as if it were overlaid on the background image PH20 as shown in Fig. 7(c-2). The gray of this background image EG2a is composed of RGB values ​​of (127, 127, 127) or (128, 128, 128).

[0082] On the other hand, in the third performance material image data EG3 in which the character image EG3b "Super Hot" is arranged in the center of the gray background image EG3a shown in Fig. 7(b-3), when the third performance material image data EG3 is drawn over a part PH20b of the background image PH20 shown in Fig. 7(b-3), the drawing mode is set to "hard light" or "overlay" for synthesis. As a result, the gray background image EG3a of the third performance material image data EG3 shown in Fig. 7(b-3) becomes transparent or invisible with respect to the background image PH20 shown in Fig. 7(b-3), so that only the character image EG3b "Super Hot" is displayed on the liquid crystal display device 41 as if it were overlaid on the background image PH20 as shown in Fig. 7(c-3). The gray of this background image EG3a is composed of RGB values ​​of (127, 127, 127) or (128, 128, 128).

[0083] Thus, in addition to the above-mentioned "multiplication" and "addition" processes, "hard write" and "overlay" processes can also be used.

[0084] Therefore, even in this case, image processing can be performed efficiently without increasing the amount of image data.

[0085] When using "hard light" processing or "overlay" processing, there is no need for common performance image data CH1; it is sufficient to prepare a single performance image (in this embodiment, the first performance material image data EG1 to the third performance material image data EG3 are exemplified) for the hard light processing or overlay processing.

[0086] Incidentally, "hard light" processing and "overlay" processing are used when you want to adjust brightness or darkness rather than "multiplication" processing and "addition" processing, and it depends on the designer's level of perfection and preference. Therefore, it is of course possible to mix and use the "hard light" processing and "overlay" processing explained with reference to Figure 7 and the "multiplication" processing and "addition" processing explained with reference to Figure 6 depending on the presentation.

[0087] <Explanation about lamp data> Next, the lamp data will be described.

[0088] In general, the volume of lamp data is increasing due to the diversification of effects. However, in conventional gaming machines, measures have not been taken to configure lamp data so as to prevent the volume of lamp data from increasing, and there has been a problem that measures to prevent the increase in the labor required to create lamp data are insufficient. For example, when a decorative lamp is lit up in a rainbow of colors, such as "red" ⇒ "yellow" ⇒ "green" ⇒ "light blue" ⇒ "blue" ⇒ "purple," in the past, one piece of lamp data was created to change the intermediate stages of the color change to rainbow colors using gradation, etc. Therefore, not only was it time-consuming to create lamp data, increasing the labor required, but the amount of data also became large because it was created using one piece of data.

[0089] In this embodiment, in order to solve the above problems, lamp data is arranged for each layer, just like image drawing processing, and color calculation processing such as "addition," "subtraction," and "multiplication" is possible, so that single color data of red, green, and blue (R.G.B) is prepared for each of the multiple lamp layers, and calculation processing is performed. This point will be explained in detail below.

[0090] First, at the timing T1 shown in Fig. 8, the sub-control CPU 800a arranges the single-color red lighting data stored in advance in the sub-control ROM 800b shown in Fig. 3 in layer 1 for lamps as shown in Fig. 8(a), arranges the single-color green lighting data stored in advance in the sub-control ROM 800b shown in Fig. 3 in layer 2 for lamps as shown in Fig. 8(a), and arranges the single-color blue lighting data stored in advance in the sub-control ROM 800b shown in Fig. 3 in layer 3 for lamps as shown in Fig. 8(a). Then, at the timing T1 shown in Fig. 8, the sub-control CPU 800a arranges the green subtraction lamp data stored in advance in the sub-control ROM 800b shown in Fig. 3 in layer 5 for lamps as shown in Fig. 8(b), and arranges the blue subtraction lamp data stored in advance in the sub-control ROM 800b shown in Fig. 3 in layer 6 for lamps as shown in Fig. 8(b).

[0091] Thus, when the sub-control CPU 800a lights up the decorative lamp on the game board 4 in red between timing T1 and timing T2 as shown in FIG. 8(c), it adds up all the data arranged in layers 1 to 3 for lamps shown in FIG. 8(a) and uses this as a reference to subtract green and blue, using the green subtraction lamp data arranged in layer 5 for lamps and the blue subtraction lamp data arranged in layer 6 for lamps shown in FIG. 8(b). Specifically, it calculates as follows: Layer 1 for lamps: (255,0,0) + Layer 2 for lamps: (0,255,0) + Layer 3 for lamps: (0,0,255) - Layer 5 for lamps: (0,255,0) - Layer 6 for lamps: (0,0,255) = (255,0,0). As a result, the decorative lamp on the game board 4 lights up in red.

[0092] Next, as shown in FIG. 8, between timing T2 and timing T3, when the decorative lamps on the game board 4 are to be turned on by changing from red to yellow as shown in FIG. 8(c), in order to add green to the red, change it to orange, and then to yellow, the sub-control CPU 800a places the green fade-in lamp data pre-stored in the sub-control ROM 800b shown in FIG. 3 in the lamp layer 5 as shown in FIG. 8(b) at timing T2 shown in FIG. 8.

[0093] Thus, when the decorative lamps on the game board 4 are turned on by changing from red to yellow between timings T2 and T3 as shown in FIG. 8(c), the sub-control CPU 800a adds up all the data arranged in the lamp layers 1 to 3 shown in FIG. 8(a) and uses this as a reference, and uses the green fade-in lamp data arranged in the lamp layer 5 and the blue subtraction lamp data arranged in the lamp layer 6 shown in FIG. 8(b). Specifically, the sub-control CPU 800a performs the calculation {lamp layer 1: (255, 0, 0) + lamp layer 2: (0, 255, 0) + lamp layer 3: (0, 0, 255)} × lamp layer 5: (255 / 255, 25 / 255, 255 / 255) - lamp layer 6: (0, 0, 255) = (255, 25, 0). As a result, the decorative lamps on the game board 4 are turned on by changing from red to yellow. In the calculation example of this embodiment, only a calculation example of multiplying 25 / 255 by 10% green is shown, but the value is gradually changed and multiplied, such as 30 / 255, 35 / 255, 40 / 255, . . . 255 / 255, so that the amount of green added to the red gradually increases. Therefore, in this way, the amount of green added to the red can be gradually increased, and the decorative lamp on the game board 4 can be changed from red to orange to yellow. In addition, in this embodiment, an example in which the sub-control CPU 800a performs multiplication is shown, but the invention is not limited to this. The sub-control CPU 800a may only issue a command to multiply green (for example, 10%), and the multiplication process may be performed by an LED driver mounted on the decorative lamp board 90.

[0094] Next, when the sub-control CPU 800a turns on the decorative lamps on the game board 4 in yellow between timing T3 and timing T4 as shown in FIG. 8(c), the sub-control CPU 800a places nothing on layer 5 for lamps at timing T3 as shown in FIG. 8(b).

[0095] Thus, when the decorative lamp on the game board 4 is turned on in yellow between timing T3 and timing T4 as shown in FIG. 8(c), the sub-control CPU 800a adds up all the data arranged in the lamp layers 1 to 3 shown in FIG. 8(a) and uses this as a reference to subtract blue, and uses the blue subtraction lamp data arranged in the lamp layer 6 shown in FIG. 8(b). Specifically, the following calculation is performed: Lamp layer 1: (255,0,0) + Lamp layer 2: (0,255,0) + Lamp layer 3: (0,0,255) - Lamp layer 6: (0,0,255) = (255,255,0). As a result, the decorative lamp on the game board 4 is turned on in yellow.

[0096] Next, as shown in FIG. 8(c), when the decorative lamps on the game board 4 are turned on by changing the color from yellow to green between timing T4 and timing T5, the sub-control CPU 800a changes from yellow to red, passes through yellow-green, and then turns green. Therefore, at timing T4 shown in FIG. 8, the sub-control CPU 800a places the red fade-out lamp data that is pre-stored in the sub-control ROM 800b shown in FIG. 3 in layer 4 for lamps, as shown in FIG. 8(b).

[0097] Thus, when the decorative lamps on the game board 4 are turned on by changing from yellow to green between timings T4 and T5 as shown in FIG. 8(c), the sub-control CPU 800a adds up all the data arranged in the lamp layers 1 to 3 shown in FIG. 8(a) and uses this as a reference, and uses the red fade-out lamp data arranged in the lamp layer 4 and the blue subtraction lamp data arranged in the lamp layer 6 shown in FIG. 8(b). Specifically, the sub-control CPU 800a performs the calculation {lamp layer 1: (255, 0, 0) + lamp layer 2: (0, 255, 0) + lamp layer 3: (0, 0, 255)} × lamp layer 4: (235 / 255, 255 / 255, 255 / 255) - lamp layer 6: (0, 0, 255) = (235, 255, 0). As a result, the decorative lamps on the game board 4 are turned on by changing from yellow to green. In the calculation example of this embodiment, only a calculation example of multiplying 235 / 255 by 90% red is shown, but the value is gradually changed and multiplied, such as 215 / 255, 195 / 255, 175 / 255, . . . 0 / 255, so that the red gradually decreases from yellow. Therefore, in this way, the red can be gradually decreased from yellow, and the decorative lamp on the game board 4 can be changed from yellow to yellow-green to green. In addition, in this embodiment, an example in which the sub-control CPU 800a multiplies is shown, but the invention is not limited to this. The sub-control CPU 800a may only issue a command to multiply red (for example, 90%), and the multiplication process may be performed by an LED driver mounted on the decorative lamp board 90.

[0098] Next, when the sub-control CPU 800a turns on the decorative lamp on the game board 4 in green after timing T5 as shown in FIG. 8(c), the sub-control CPU 800a places the red subtraction lamp data pre-stored in the sub-control ROM 800b as shown in FIG. 3 in layer 4 for lamps as shown in FIG. 8(b) at timing T5 as shown in FIG. 8.

[0099] Thus, when the decorative lamp on the game board 4 is turned on in green after timing T5 as shown in FIG. 8(c), the sub-control CPU 800a adds up all the data arranged in the lamp layers 1 to 3 shown in FIG. 8(a) and uses this as a reference to subtract red and blue, and uses the red subtraction lamp data arranged in the lamp layer 4 and the blue subtraction lamp data arranged in the lamp layer 6 shown in FIG. 8(b). Specifically, the following calculation is performed: Lamp layer 1: (255,0,0) + Lamp layer 2: (0,255,0) + Lamp layer 3: (0,0,255) - Lamp layer 4: (255,0,255) - Lamp layer 6: (0,0,255) = (0,255,0). As a result, the decorative lamp on the game board 4 is turned on in green.

[0100] Therefore, by doing as described above, lighting data is placed in layers 1 to 3 for lamps, and further editing data for each lighting data is placed in layers 4 to 6 for lamps, and then color changes of decorative lamps can be realized by controlling "addition", "subtraction" and "multiplication". Therefore, according to this embodiment, it is not necessary to create one lamp data set, which is not only time-consuming but also increases the amount of data, as in the past. Therefore, according to this embodiment, the volume of lamp data does not increase, and the man-hours required for creating lamp data can be reduced.

[0101] The fade-in / fade-out examples given above can be used for all of the red fade-in / fade-out, green fade-in / fade-out, and blue fade-in / fade-out, and can therefore be applied to a variety of different scenes.

[0102] In addition, the fade-in / fade-out times mentioned above can be adjusted in the production scenario.

[0103] Incidentally, the above-described processing contents can also be applied to the fading out of the decorative lamps when the SP reach occurs.

[0104] That is, as shown in Fig. 9(a), at the time of SP Reach A, the decorative lamp on the game board 4 lights up in yellow from timing T10 to timing T11, and if the lottery result is a miss, it gradually fades out from yellow to off after timing T12. Also, as shown in Fig. 9(b), at the time of SP Reach B, the decorative lamp on the game board 4 lights up in green from timing T10 to timing T11, and if the lottery result is a miss, it gradually fades out from green to off after timing T12. Furthermore, as shown in Fig. 9(c), at the time of SP Reach C, the decorative lamp on the game board 4 lights up in red from timing T10 to timing T11, and if the lottery result is a miss, it gradually fades out from red to off after timing T11.

[0105] Incidentally, in the past, for these three types of SP reaches, decorative lamps were lit in colors that matched the content of each SP reach, and lamp data was created in which each color faded out (the brightness decreased). This not only took time and effort to create the lamp data, increasing the number of steps required, but also created lamp data in which each color faded out (the brightness decreased), resulting in a large amount of data.

[0106] In this embodiment, therefore, in order to solve the above problems, the following processing is carried out.

[0107] At the time of SP Reach A shown in Fig. 10(a), when the decorative lamp on the game board 4 is to be lit in yellow between timing T20 and timing T21 as shown in Fig. 10(a), the sub-control CPU 800a reads out the red lighting data and the green lighting data pre-stored in the sub-control ROM 800b shown in Fig. 3 at timing T20, adds them together ((255,0,0)+(0,255,0)=(255,255,0)), and places them in the lamp layer 1. As a result, the decorative lamp on the game board 4 is lit in yellow.

[0108] Next, if the lottery result is a loss, the sub-control CPU 800a fades out the decorative lamps on the game board 4 from yellow to off after timing T21 as shown in Fig. 10(a), so the sub-control CPU 800a places white fade-out data pre-stored in the sub-control ROM 800b shown in Fig. 3 in layer 2 for lamps at timing T21. Note that this white fade-out data is data that changes from (R, G, B) = (255, 255, 255) to (0, 0, 0).

[0109] Thus, the sub-control CPU 800a uses the yellow lighting data arranged in the lamp layer 1 and the white fade-out data arranged in the lamp layer 2 shown in Fig. 10(a) to fade out the decorative lamps on the game board 4 from yellow to off. Specifically, the sub-control CPU 800a performs the calculation {(255,0,0)+(0,255,0)} x (235 / 255,235 / 255,235 / 255) = (235,235,0). As a result, the decorative lamps on the game board 4 change from yellow to off. Needless to say, the white fade-out data is data that changes from (R, G, B) = (255, 255, 255) to (0, 0, 0), so the value is gradually changed and multiplied, such as (235 / 255, 235 / 255, 235 / 255), (215 / 255, 215 / 255, 215 / 255), (195 / 255, 195 / 255, 195 / 255), ... (0 / 255, 0 / 255, 0 / 255). In the present embodiment, an example in which the sub-control CPU 800a performs multiplication is shown, but the present invention is not limited to this. The sub-control CPU 800a may only issue a command to multiply white (for example, 90%), and the LED driver mounted on the decorative lamp board 90 may perform the multiplication process.

[0110] On the other hand, when SP Reach B shown in Fig. 10(b) is reached, in order to light the decorative lamp on the game board 4 in green from timing T30 to timing T31 as shown in Fig. 10(b), the sub-control CPU 800a places the green lighting data stored in advance in the sub-control ROM 800b shown in Fig. 3 in the lamp layer 1 at timing T30. This causes the decorative lamp on the game board 4 to light in green.

[0111] Next, if the lottery result is a loss, the sub-control CPU 800a causes the decorative lamps on the game board 4 to fade out from green to off after timing T31 as shown in Fig. 10(b), so the sub-control CPU 800a places the white fade-out data stored in advance in the sub-control ROM 800b shown in Fig. 3 in layer 2 for lamps at timing T31. Note that this white fade-out data is the same as the white fade-out data shown in Fig. 10(a).

[0112] Thus, the sub-control CPU 800a uses the green lighting data arranged in the lamp layer 1 and the white fade-out data arranged in the lamp layer 2 shown in Fig. 10(b) to fade out the decorative lamps on the game board 4 from green to off. Specifically, the sub-control CPU 800a performs the calculation (0, 255, 0) x (235 / 255, 235 / 255, 235 / 255) = (0, 235, 0). As a result, the decorative lamps on the game board 4 change from green to off. Needless to say, the white fade-out data is data that changes from (R, G, B) = (255, 255, 255) to (0, 0, 0), so the value is gradually changed and multiplied, such as (235 / 255, 235 / 255, 235 / 255), (215 / 255, 215 / 255, 215 / 255), (195 / 255, 195 / 255, 195 / 255), ... (0 / 255, 0 / 255, 0 / 255). In the present embodiment, an example in which the sub-control CPU 800a performs multiplication is shown, but the present invention is not limited to this. The sub-control CPU 800a may only issue a command to multiply white (for example, 90%), and the LED driver mounted on the decorative lamp board 90 may perform the multiplication process.

[0113] On the other hand, when the decorative lamp on the game board 4 is lit in red during the period from timing T40 to timing T41 as shown in Fig. 10(b) at the time of SP Reach C shown in Fig. 10(c), the sub-control CPU 800a places the red lighting data stored in advance in the sub-control ROM 800b shown in Fig. 3 in the lamp layer 1 at the time of timing T40. As a result, the decorative lamp on the game board 4 is lit in red.

[0114] Next, if the lottery result is a loss, the sub-control CPU 800a fades out the decorative lamps on the game board 4 from red to off after timing T41 as shown in Fig. 10(b), so the sub-control CPU 800a places the white fade-out data stored in advance in the sub-control ROM 800b shown in Fig. 3 in layer 2 for lamps at timing T41. Note that this white fade-out data is the same as the white fade-out data shown in Fig. 10(a).

[0115] Thus, the sub-control CPU 800a uses the red lighting data arranged in the lamp layer 1 and the white fade-out data arranged in the lamp layer 2 shown in Fig. 10(c) to fade out the decorative lamps on the game board 4 from red to off. Specifically, the sub-control CPU 800a performs the calculation (255,0,0) x (235 / 255,235 / 255,235 / 255) = (235,0,0). As a result, the decorative lamps on the game board 4 change from red lighting to off. Needless to say, the white fade-out data is data that changes from (R, G, B) = (255, 255, 255) to (0, 0, 0), so the value is gradually changed and multiplied, such as (235 / 255, 235 / 255, 235 / 255), (215 / 255, 215 / 255, 215 / 255), (195 / 255, 195 / 255, 195 / 255), ... (0 / 255, 0 / 255, 0 / 255). In the present embodiment, an example in which the sub-control CPU 800a performs multiplication is shown, but the present invention is not limited to this. The sub-control CPU 800a may only issue a command to multiply white (for example, 90%), and the LED driver mounted on the decorative lamp board 90 may perform the multiplication process.

[0116] Therefore, by doing as described above, one common white fade-out data is prepared for all of SP reaches A to C, and the color of the decorative lamp for each of SP reaches A to C can be faded out simply by multiplying the common white fade-out data by the lighting data of each decorative lamp during SP reaches. Therefore, according to this embodiment, it is not necessary to create lamp data in which the decorative lamp is lit in a color that matches the content of each SP reach and each color fades out (the brightness decreases), as in the past, so the volume of lamp data does not increase and the man-hours required for creating the lamp data can be reduced.

[0117] In this embodiment, the white fade-out data that fades out to turn off has been used as an example, but even in cases where the brightness is faded out to 10% without turning off the light, the white fade-out data as shown above may be used.

[0118] By the way, in order to make it easier to understand, the lamp data (lighting data) explained with reference to Figures 8 and 10 was explained using simplified lamp data (lighting data), but the actual lamp data (lighting data) is as follows.

[0119] That is, if the actual lamp data (lighting data) is expressed as 4 bytes = 32 bits (0x00000000), then 24 bits will be the data for one full-color LED (8 bits x 3), so 12 bytes will be the lamp data (lighting data) for four full-color LEDs. In this case, the data will be arranged in the order of R1, G1, B1, ... for the full-color LEDs from the top.

[0120] That is, the lamp data (lighting data) is as follows: 0x00000000 0x00000000 0x00000000 In this case, The first "0x00000000" becomes "0x00 (← R1 data) 00 (← G1 data) 00 (← B1 data) 00 (← R2 data)". The intermediate value "0x00000000" becomes "0x00 (← G2 data) 00 (← B2 data) 00 (← R3 data) 00 (← G3 data)". The last "0x00000000" becomes "0x00 (← B3 data) 00 (← R4 data) 00 (← G4 data) 00 (← B4 data)".

[0121] Taking the above into consideration, the red, green, and blue single color lighting data is as follows:

[0122] Red lighting data: 0xFF0000FF 0x0000FF00 0x00FF0000 Green light data: 0x00FF0000 0xFF0000FF 0x0000FF00 Blue light data: 0x0000FF00 0x00FF0000 0xFF0000FF

[0123] Thus, when performing the red, green, and blue subtractions described above, the red, green, and blue lighting data are all added together and the above lighting data is used as is; when performing red subtraction, the red lighting data is used, when performing green subtraction, the green lighting data is used, and when performing blue subtraction, the blue lighting data is used.

[0124] However, the present invention is not limited to this, and data may be used that masks the color to be subtracted and leaves the other colors as they are.

[0125] Red subtraction data: 0x00FFFF00 0xFFFF00FF 0xFF00FFFF Green subtraction data: 0xFF00FFFF 0x00FFFF00 0xFFFF00FF Blue subtraction data: 0xFFFF00FF 0xFF00FFFF 0x00FFFF00

[0126] In other words, when subtracting red, the red lighting data, green lighting data, and blue lighting data are all added together, and then the logical product is taken with the red subtraction data, so that red becomes 0x00 and the other colors remain unchanged.

[0127] Also, when subtracting green, if you add up the red lighting data, green lighting data, and blue lighting data, and then take the logical product with the green subtraction data, green will become 0x00, and the other colors will not change.

[0128] Furthermore, when subtracting blue, the red lighting data, green lighting data, and blue lighting data are all added together, and then the logical product is taken with the blue subtraction data. This results in blue becoming 0x00, and the other colors remaining unchanged.

[0129] Thus, even in this manner, red subtraction, green subtraction, and blue subtraction can be performed.

[0130] On the other hand, the fade-in / fade-out of red, green, and blue can be processed as follows. That is, the fade-in of red, green, and blue is performed by multiplying the data obtained by adding together the red, green, and blue lighting data, since the "FF" part of the red, green, and blue lighting data changes from 00 to 10 to 20 to 30 to... to FF. The fade-out of red, green, and blue is performed by multiplying the data obtained by adding together the red, green, and blue lighting data, since the "FF" part of the red, green, and blue lighting data changes from FF to EF to DF to CF to... to 00. The fade-out of red, green, and blue is performed by multiplying the data obtained by adding together the red, green, and blue lighting data. Note that "FF" (="255") is the brightness state of 100%, and the lower the value, the lower the brightness.

[0131] Therefore, the lamp data described above is processed in this manner.

[0132] <Main control: Program description> Here, the processing method of the various contents described above will be explained in detail below. First, the program stored in the main control ROM 600b (see FIG. 3) processed by the main control board 60 will be outlined with reference to FIGS. 24 to 35, and will be explained in detail.

[0133] <Main control: Explanation of main processing> First, when the power is turned on to the pachinko game machine 1, a power-on signal is sent to indicate that the DC voltage generated by the voltage generating unit 1300 of the power supply board 130 (see FIG. 3) has been applied to each control board, and upon receiving this signal, the main control CPU 600a (see FIG. 3) reads out a program stored in the main control ROM 600b (see FIG. 3) and performs the main control main processing shown in FIG. 11. At this time, the main control CPU 600a first sets itself to an interrupt-prohibited state (step S1).

[0134] Next, the main control CPU 600a performs a stack pointer setting process for setting the value of a stack pointer inside the main control CPU 600a to correspond to the final address of the normal stack area (step S2).

[0135] Next, the main control CPU 600a clears the WDT (not shown) (step S3), and clears the output port that outputs the launch control signal (step S4).

[0136] Next, the main control CPU 600a sets a startup waiting time for the sub-control board 80 (step S5), decrements (-1) the set waiting time (step S6), and clears the WDT (not shown) (step S7).

[0137] Next, the main control CPU 600a checks whether the set waiting time has become "0" (step S8), and if it is not "0" (step S8:≠0), it returns to processing of step S7, and if it is "0" (step S8:=0), it proceeds to processing of step S9.

[0138] Next, the main control CPU 600a acquires twice the voltage abnormality signal ALARM (see FIG. 3) output from the power supply board 130 (voltage monitoring unit 1310) (see FIG. 3), checks whether the levels of the voltage abnormality signal ALARM acquired twice match, stores the signal in an internal register of the main control CPU 600a (not shown), and checks the level of the voltage abnormality signal ALARM (step S9). If the level of the voltage abnormality signal ALARM is the "L" level (step S10: YES), the process returns to step S9, and if the level of the voltage abnormality signal ALARM is the "H" level (step S10: NO), the process proceeds to step S11. That is, the main control CPU 600a repeats the same process until the voltage abnormality signal ALARM changes to a normal level (i.e., the "H" level) (steps S9 to S10). In this way, by acquiring the voltage abnormality signal ALARM twice, an accurate signal can be read.

[0139] Next, the main control CPU 600a permits data writing to the main control RAM 600c (step S11) and initializes the work area of ​​the main control RAM 600c (step S12). Specifically, the power supply abnormality confirmation counter is set to 00H, and the system operation status is set to 01H.

[0140] Next, the main control CPU 600a transmits to the sub-control board 80 a processing command (performance control command DI_CMD) for displaying a standby screen on the liquid crystal display device 41 (step S13).

[0141] Next, the main control CPU 600a clears the WDT (not shown) (step S14) and checks whether a signal indicating that the power has been turned on (power-on signal) has been received from the dispensing control board 70 (step S15). If the power-on signal has not been received (step S15: OFF), the process returns to step S14, and if the power-on signal has been received (step S15: ON), the process proceeds to step S16.

[0142] Next, the main control CPU 600a acquires the level data of the RAM clear switch 620 and the setting key switch 630, and saves them in the working area of ​​the normal RAM area of ​​the main control RAM 600c (step S16).

[0143] Next, the main control CPU 600a acquires a door open signal indicating whether the glass door frame 5 shown in Fig. 1 is open or not, the signal of the RAM clear switch 620 that has been evacuated to the working area of ​​the main control RAM 600c, and the signal of the setting key switch 630 (step S17), and checks whether all of them are ON or not (step S18). If all of them are ON (step S18: YES), the main control CPU 600a performs a setting switching process (step S19).

[0144] <Main control: Main processing: Explanation of setting switching processing> Here, this setting switching process will be specifically described with reference to FIG.

[0145] First, the main control CPU 600a transmits a setting switching start command (performance control command DI_CMD) indicating that a setting change is being performed to the sub-control board 80 (step S50).

[0146] Next, the main control CPU 600a clears the backup flag (step S51). The backup flag is data indicating whether or not backup processing has been executed when a voltage drop due to a power outage or the like is detected in the power supply abnormality check processing shown in Fig. 14. The backup flag is cleared in order to detect in step S21 shown in Fig. 12 described later a case in which power is interrupted for some reason during the setting switching processing and the main control RAM 600c is not backed up normally.

[0147] Next, the main control CPU 600a sets the system operation status to 02H (step S52), obtains the set value of the probability of generating a special game state advantageous to the player stored in the main control RAM 600c (see FIG. 3), and sets it in the W register (step S53). Specifically, if the set value is, for example, "1" to "6", the set values ​​"1" to "6" are set in the W register in the program so as to correspond to the values ​​"00H" to "05H".

[0148] Next, the main control CPU 600a compares the value set in the W register with the maximum value set for the probability of generating a special game state advantageous to the player (for example, "05H" corresponding to "6") (step S54). If the value set in the W register is greater than the maximum value set for the probability of generating a game state advantageous to the player (for example, "05H" corresponding to "6") (step S55: YES), the main control CPU 600a determines that the value is an abnormal value and sets 00H to the W register (step S56).

[0149] On the other hand, if the value set in the W register is smaller than the maximum probability of generating a game state advantageous to the player (for example, "05H" corresponding to "6") (step S55: NO), it is determined to be a normal value and the process proceeds to step S57.

[0150] Next, the main control CPU 600a sets a security signal to be output to a hall computer used for game island management in the game arcade to ON, and outputs the security signal to the hall computer (step S57).

[0151] Next, the main control CPU 600a sets 00H to the LED common port (step S58).

[0152] Next, the main control CPU 600a outputs the value set in the W register to the LED data port (step S59).

[0153] Next, the main control CPU 600a sets the LED common port that displays the set value to ON (step S60).

[0154] Next, the main control CPU 600a sets a predetermined value in a register in the main control CPU 600a so that a wait of 4 ms is applied, and performs a process of counting down (step S61). This process is a process for checking changes in the level data of the RAM clear switch 620 (see FIG. 3) and the setting key switch 630 (see FIG. 3) by waiting at least 4 ms from the previous acquisition of the switch level, thereby checking that the change in the level data is not due to an irregularity such as noise. Furthermore, by waiting 4 ms when checking changes in the voltage abnormality signal in the subsequent power abnormality check process and counting the power abnormality check counter, this process is also a process for checking that the "L" level of the voltage abnormality signal is not due to an irregularity such as noise.

[0155] Next, the main control CPU 600a performs a power supply abnormality check process (step S62). This power supply abnormality check process will be specifically described with reference to FIG.

[0156] <Main control: Main processing: Explanation of power supply abnormality check processing> As shown in Fig. 14, the main control CPU 600a twice acquires the voltage abnormality signal ALARM (see Fig. 3) output from the power supply board 130 (voltage monitoring unit 1310) (see Fig. 3) (step S80), and checks whether the levels of the voltage abnormality signal ALARM acquired twice match (step S81). If they match (step S81: YES), the main control CPU 600a checks the level of the voltage abnormality signal ALARM (step S82), and if they do not match (step S81: NO), the process returns to step S80.

[0157] Next, if the level of the voltage abnormality signal ALARM is at the "H" level (step S82: OFF), the main control CPU 600a clears the power abnormality confirmation counter (step S83) and ends the power abnormality check process.

[0158] On the other hand, if the level of the voltage abnormality signal ALARM is at the "L" level (step S82: ON), the main control CPU 600a increments (+1) the power supply abnormality confirmation counter (step S84) and checks the value of the power supply abnormality confirmation counter (step S85). If the value of the power supply abnormality confirmation counter is not 2 or more (step S85: NO), the power supply abnormality check process ends.

[0159] On the other hand, if the value of the power supply abnormality confirmation counter is 2 or greater (step S85: YES), the main control CPU 600a sends a power cut-off command (performance control command DI_CMD) to the sub-control board 80 indicating that the power supply has been cut off (step S86).

[0160] Next, the main control CPU 600a checks the value of the system operation status (step S87). If the value of the system operation status is 02H, it is determined that the setting change process is in progress (step S87: YES), and the backup flag is not set to ON, and the process proceeds to step S89. In this way, a case where power is interrupted for some reason during the setting change process and the main control RAM 600c is not backed up normally can be detected in step S21 shown in FIG. 12, which will be described later.

[0161] On the other hand, if the value of the system operation status is not 02H, it is determined that the setting change process is not in progress (step S87: NO), and the backup flag is set to ON (step S88).

[0162] Next, the main control CPU 600a disables writing data to the main control RAM 600c (step S89), clears the output data of all output ports (step S90), and disables timer interrupts (step S91) to repeat an infinite loop process and wait for the voltage to drop.

[0163] <Main control: Main processing: Explanation of setting switching processing> Thus, when the power supply abnormality check process (step S62) is completed through the above-mentioned processes, the main control CPU 600a creates switch edge data for the RAM clear switch 620 signal and switch edge data for the setting key switch 630 signal from the previous and current level data of the RAM clear switch 620 and the level data of the setting key switch 630 (step S63).The main control CPU 600a stores the created edge data in the main control RAM 600c.

[0164] Next, the main control CPU 600a checks the edge data stored in the main control RAM 600c, and if the setting key switch 630 is ON (step S64: NO), proceeds to processing of step S65, and if the setting key switch 630 is OFF (step S64: YES), proceeds to processing of step S67.

[0165] Next, if the RAM clear switch 620 is ON (step S65: NO), the main control CPU 600a increments (+1) the value of the W register (step S66), and returns to the process of step S54.

[0166] On the other hand, if the RAM clear switch 620 is OFF (step S65: NO), the process returns to step S57.

[0167] Thus, the above process is repeated until the setting key switch 630 is turned OFF, and when the setting key switch 630 is turned OFF, the main control CPU 600a overwrites the value of the W register with the setting value of the probability of generating a gaming state advantageous to the player (for example, the setting value "00H" to "05H" corresponding to "1" to "6") stored in the main control RAM 600c (see Figure 3) and stores it (step S67).

[0168] Next, the main control CPU 600a outputs a setting confirmation display to the LED data port (step S68).

[0169] Next, the main control CPU 600a transmits a setting switching end command (performance control command DI_CMD) reflecting the setting value to the sub-control board 80 (step S69).

[0170] <Main control: Explanation of main processing> Thus, after the above-described processing and the setting switching processing (step S19) shown in FIG. 11 are completed, the main control CPU 600a proceeds to processing of step S26 shown in FIG.

[0171] On the other hand, the main control CPU 600a checks whether the signal of the RAM clear switch 620 and the signal of the setting key switch 630 are all ON (step S18), and if they are not all ON (step S18: NO), the main control CPU 600a performs processing of step S20 shown in Figure 12.

[0172] That is, the main control CPU 600a acquires a set value (e.g., a set value from "00H" to "05H" corresponding to "1" to "6") of the probability of generating a game state advantageous to the player stored in the main control RAM 600c (see FIG. 3), and checks whether it is equal to or less than the maximum set value (e.g., "05H" corresponding to "6") (step S20). If it is equal to or less than the maximum set value (step S20: YES), it checks whether the backup flag is set to ON (step S21).

[0173] <Main control: Main processing: Explanation of RAM error processing> If the value is not below the set maximum value (step S20: NO) or the backup flag is not set ON (step S21: NO), the main control CPU 600a sends a RAM error command (performance control command DI_CMD) to the sub-control board 80 indicating that there is a RAM error (step S22).

[0174] Next, the main control CPU 600a outputs an error display to the LED data port (step S23).

[0175] Next, the main control CPU 600a performs a power supply abnormality check process (step S24), and returns to the process of step S23 to repeat the process. Note that this power supply abnormality check process is the same process as the power supply abnormality check process shown in FIG.

[0176] <Main control: Explanation of main processing> On the other hand, if the backup flag is set to ON (step S21: YES), the signal of the RAM clear switch 620 is confirmed (step S25).

[0177] <Main control: Main processing: Explanation of RAM clear processing> When the signal of the RAM clear switch 620 is ON (step S25: YES), or when the setting switching process (step S19) shown in FIG. 11 is performed, the main control CPU 600a does not clear the measurement RAM area and measurement stack area of ​​the main control RAM 600c, but clears the normal RAM area and normal stack area of ​​the main control RAM 600c (step S26).

[0178] Next, the main control CPU 600a sets the RAM clear notification timer to 30 seconds (30s) (step S27), and sets the timer that outputs a security signal to the hall computer used to manage the amusement center's game island to 30 seconds (30s) (step S28).

[0179] Next, the main control CPU 600a sets initial values ​​in part of the main control RAM 600c (step S29), and proceeds to the process of step S41.

[0180] <Main control: Explanation of main processing> On the other hand, if the signal of the RAM clear switch 620 is OFF (step S25: NO), the main control CPU 600a acquires a door open signal indicating whether the glass door frame 5 shown in Fig. 1 is open or not, and a signal of the setting key switch 630 (step S30), and checks whether all are ON or not (step S31). If all are not ON (step S31: NO), the process proceeds to step S40.

[0181] <Main control: Main processing: Explanation of setting confirmation processing> On the other hand, if all are ON (step S31: YES), the main control CPU 600a transmits a setting value command (performance control command DI_CMD) reflecting the setting value to the sub-control board 80 (step S32).

[0182] Next, the main control CPU 600a sets a timer for outputting a security signal to be output to a hall computer used for game island management in the game arcade to 30 seconds (30s) (step S33).

[0183] Next, the main control CPU 600a sets the security signal to ON, which is output to the hall computer used to manage the game island of the amusement arcade, and outputs the security signal to the hall computer for the 30 seconds (30s) set by the timer (step S34).

[0184] Next, the main control CPU 600a outputs the setting value to the LED data port (step S35).

[0185] Next, the main control CPU 600a sets a predetermined value in a register in the main control CPU 600a so that a wait of 4 ms is applied, and performs a countdown process (step S36).

[0186] Next, the main control CPU 600a performs a power supply abnormality check process (step S37). Note that this power supply abnormality check process is the same process as the power supply abnormality check process shown in FIG.

[0187] Next, the main control CPU 600a creates switch edge data of the setting key switch 630 signal from the previous and current level data of the setting key switch 630 (step S38). The main control CPU 600a stores the created edge data in the main control RAM 600c.

[0188] Next, the main control CPU 600a checks the edge data stored in the main control RAM 600c (step S39), and if the setting key switch 630 is ON (step S39: NO), the process returns to step S34.

[0189] <Main control: Explanation of main processing> On the other hand, if the setting key switch 630 is OFF (step S39: YES), initial values ​​of the backup flag, error detection timer, etc. are set in a part of the main control RAM 600c (step S40).

[0190] Next, the main control CPU 600a transmits to the sub-control board 80 a command (performance control command DI_CMD) indicating whether power is to be restored by clearing the RAM or by a backup (step S41).

[0191] Next, the main control CPU 600a performs a game status notification information update process for updating the game status notification information (step S42).

[0192] Next, the main control CPU 600a sets the internal function register (step S43). Specifically, the launch control signal is set to ON and sent to the dispensing control board 70. As a result, the dispensing control board 70 controls the launch control board 71 to start operating. The main control CPU 600a also sets the CTC, which has functions such as creating a pulse output at a constant period and measuring time, provided inside the main control CPU 600a. That is, the main control CPU 600a sets the time constant register of the CTC so that a timer interrupt is periodically generated every 4 ms.

[0193] Thus, the above processing constitutes the initial processing in the main control processing.

[0194] Next, the main control CPU 600a performs a process of a winning ball number management process 1 that calculates performance such as the total number of game balls shot into the game area 40, including the number of winning balls and the number of non-winning balls, with interrupts to itself set to a prohibited state (step S44) (step S45). Then, the main control CPU 600a performs an update process of various random number counters (step S46), and then returns to an interrupt permitted state (step S47), returns to step S44, and performs a loop process that repeats the processes of steps S44 to S47. This loop process and the interrupt process described later constitute regular processes.

[0195] <Main control: Explanation of timer interrupt processing> Next, with reference to FIG. 15, a timer interrupt program that interrupts the above-mentioned main processing and is started every 4 ms will be described.

[0196] When this timer interrupt occurs, a save process is executed to save the contents of the registers in the main control CPU 600a to the stack area of ​​the main control RAM 600c (step S100), and then a voltage abnormality check process is executed (step S101). This voltage abnormality check process is the same process as the power supply abnormality check process shown in FIG.

[0197] Next, the main control CPU 600a inputs ON / OFF signals of various switches including the special pattern 1 start port switch 44a (see Figure 3), the special pattern 2 start port switch 45a1 (see Figure 3), the normal pattern start port switch 48a (see Figure 3), the upper right general prize port switch 49a1 (see Figure 3), the upper left general prize port switch 49b1 (see Figure 3), the middle left general prize port switch 49c1 (see Figure 3), the lower left general prize port switch 49d1 (see Figure 3), the outlet switch 50a (see Figure 3), and the large prize port switch 46c (see Figure 3), and the ON / OFF signal levels and their start-up states are stored in the working area of ​​the main control RAM 600c (step S102).

[0198] Next, the main control CPU 600a performs timer subtraction processing of various timers (normal symbol fluctuation timer, normal symbol accessory timer, etc.) that manage the time of each game operation (step S103).

[0199] Next, the main control CPU 600a performs a random number management process (step S104). Specifically, the process updates the random numbers for the normal symbols, special symbols, and the like used in the winning / losing lottery.

[0200] Next, the main control CPU 600a performs an error management process (step S105). The error management process is to determine whether or not an abnormality has occurred inside the device, such as a stop in supplying game balls, a jam in the game balls, or a disconnection in the special symbol 1 start port switch 44a (see FIG. 3), the special symbol 2 start port switch 45a1 (see FIG. 3), the normal symbol start port switch 48a (see FIG. 3), the upper right general winning port switch 49a1 (see FIG. 3), the upper left general winning port switch 49b1 (see FIG. 3), the middle left general winning port switch 49c1 (see FIG. 3), the lower left general winning port switch 49d1 (see FIG. 3), the out port switch 50a (see FIG. 3), or the large winning port switch 46c (see FIG. 3). When any error occurs, a command (performance control command DI_CMD) corresponding to the error is transmitted to the sub-control board 80.

[0201] Next, the main control CPU 600a executes a prize ball management process (step S106). This prize ball management process outputs a payout control command PAY_CMD for causing the payout / launch control board 70 (see FIG. 3) to perform a payout operation.

[0202] Next, the main control CPU 600a executes normal symbol processing (step S107). This normal symbol processing executes a lottery for the normal symbol, and determines the normal symbol variation pattern and the normal symbol stop display state based on the lottery result. The details of this processing will be described later.

[0203] Next, the main control CPU 600a executes normal electric role management processing (step S108). This normal electric role management processing generates a signal related to the control of the normal electric role solenoid 45b2 (see FIG. 3) required for the normal electric role release game to occur based on the lottery result of the normal symbol processing (step S107). Note that when the winning-prone flag indicating whether the game state is a time-saving game state or not is turned ON in the special symbol processing (step S109) described later, the normal electric role release game will occur in the next timer interrupt processing.

[0204] Next, the main control CPU 600a executes special symbol processing (step S109). In this special symbol processing, a lottery is executed to determine whether the special symbol will win or lose, and the variation pattern of the special symbol and the stop display mode of the special symbol are determined based on the result of the lottery. In addition, the winning ease flag and the normal symbol probability change flag, which indicate whether the game state is a time-saving game state or not, are also processed. Note that the winning ease flag is ON when the special symbol wins or loses is executed in the next timer interrupt processing. The details of this processing will be described later.

[0205] Next, the main control CPU 600a executes a special electric role management process (step S110). In this special electric role management process, when the big win lottery result is a "big win" or "small win", a setting process necessary for executing and controlling a winning game corresponding to the win is performed. At this time, a signal related to the control of the special electric role solenoid 46b (see FIG. 3) is also generated. In addition, when the big win lottery result is a "big win" or "small win", a command related thereto (performance control command DI_CMD) is transmitted to the sub-control board 80.

[0206] Next, the main control CPU 600a performs a right-hit notification information management process (step S111). In this right-hit notification information management process, a process is performed to present a "launch position guidance effect (right-hit notification effect)" that gives a right-hit instruction notification in a situation where right-hitting is advantageous, such as when an opening / closing member (not shown) is opened a predetermined number of times for a predetermined time, or when the opening / closing door 46a is opened and a large prize opening (not shown) is opened.

[0207] Next, the main control CPU600a executes an LED management process (step S112). In this LED management process, an easy-to-win game state LED signal is output. That is, if the easy-to-win flag is turned ON in the above-mentioned special pattern process in the same timer interrupt, the easy-to-win game state LED signal is output from the output port of the main control CPU600a to the 7-segment display device 53a shown in FIG. 2. As a result, the LED of the 7-segment display device 53a shown in FIG. 2 is turned on. On the other hand, if the easy-to-win flag is turned OFF, an easy-to-win game state LED signal is output from the output port of the main control CPU600a. As a result, the LED of the 7-segment display device 53a shown in FIG. 2 is turned off.

[0208] Next, the main control CPU 600a executes an external terminal management process (step S113). In this external terminal management process, predetermined game information such as the number of times a win occurs during a winning game, the number of times a special symbol changes, winning ball detection information into a winning hole, information during a time-saving game state, and security information is output to a hall computer used for managing the game island of the game parlor.

[0209] Next, the main control CPU 600a performs solenoid management processing (step S114). At this time, the main control CPU 600a checks the signal related to the control of the normal electric role solenoid 45b2 (see FIG. 3) generated in the normal electric role management processing (step S108), and checks the signal related to the control of the special electric role solenoid 46b (see FIG. 3) generated in the special electric role management processing (step S110). Then, based on this signal, the operation / stop of the normal electric role solenoid 45b2 or the special electric role solenoid 46b is controlled, and the opening / closing member (not shown) of the electric chute (normal electric role) is opened, and the time during which the guide member (not shown) is in the guide state is extended / not extended, or the opening / closing door 46a (see FIG. 2) is operated so that the large prize opening (not shown) is opened or closed.

[0210] Next, the main control CPU 600a performs processing outside the use area (step S115). In this processing, the performance display value calculated in the winning ball number management processing 1 in step S45 shown in FIG. 12 is displayed on the measurement / setting display device 610 (see FIG. 3).

[0211] Next, the main control CPU 600a clears the WDT (not shown) (step S116), returns to the interrupt enabled state (step S117), restores the contents of the registers saved in the stack area of ​​the main control RAM 600c, and ends the timer interrupt (step S118). This causes the process to return from the interrupt processing routine to the main process (see FIG. 15).

[0212] <Main control: Explanation of normal pattern processing> Next, the normal symbol processing will be described in detail with reference to FIG.

[0213] As shown in FIG. 16, in the normal symbol processing, first, it is confirmed whether the passage of the game ball is detected in the normal symbol start port 48 (see FIG. 2) consisting of a gate, that is, the signal level of the normal symbol start port switch 48a (see FIG. 3) of the normal symbol start port 48 is confirmed (step S150). Then, when the passage of the game ball is detected (step S150: YES), the main control CPU 600a checks the main control RAM 600c in which the number of start reserved balls of the normal symbol is stored in order to determine whether the number of start reserved balls of the normal symbol is, for example, 4 or more (step S151). At that time, if the number of start reserved balls of the normal symbol is less than 4 (step S151: ≠ MAX), the number of start reserved balls of the normal symbol is increased by 1 (step S152). Thereafter, the main control CPU 600a stores the random number value for determining whether the normal pattern is a hit, which is used in the lottery to determine whether the normal pattern is a hit or not, in the main control RAM 600c in which the number of balls reserved for the start of the normal pattern is stored (step S153), and then proceeds to processing of step S154.

[0214] On the other hand, if the passage of a game ball is not detected in step S150 (step S150: NO), or if it is determined in step S151 that the number of initial reserved balls for normal symbols is 4 or more (step S151: = MAX), the processing of steps S152 to S153 is not performed, and the processing proceeds to step S154.

[0215] When the main control CPU 600a proceeds to the process of step S154, it checks whether the normal symbol win operation flag is set to ON, that is, whether the normal symbol win operation flag is set to 5AH (step S154). If the normal symbol win operation flag is set to 5AH (step S154: ON), it determines that the normal symbol is winning, and updates the display data of the normal symbol (step S163), and then ends the normal symbol processing.

[0216] On the other hand, if the normal symbol winning operation flag is not set to 5AH (step S154: OFF), the processing state indicating the behavior of the normal symbol, that is, the value of the normal symbol operation status flag is confirmed (step S155). Then, if the normal symbol operation status flag is 00H, the main control CPU 600a judges that the normal symbol is in a state before the start of the fluctuation, proceeds to step S156, and confirms whether the number of balls reserved for the start of the normal symbol is 0 (step S156).

[0217] The main control CPU 600a checks the main control RAM 600c in which the number of reserved balls for starting normal symbols is stored, and if it determines that the number is 0 (step S156:=0), it updates the display data for the normal symbols (step S163) and ends the normal symbol processing. On the other hand, if it determines that the number is not 0 (step S156:≠0), it subtracts 1 from the number of reserved balls for starting normal symbols (step S157).

[0218] After that, the main control CPU 600a performs a hit determination of the random number value corresponding to the number of balls reserved for the start of the normal pattern stored in the main control RAM 600c using the normal pattern hit determination table NPP_TBL shown in Fig. 23(a). That is, if the normal pattern probability variable flag indicating the game state is OFF, the main control CPU 600a determines whether the random number value is equal to or greater than the lower limit value (249 in the figure) and equal to or less than the upper limit value (250 in the figure) of the normal pattern hit determination table NPP_TBL (normal state) shown in Fig. 23(a), and if it is equal to or greater than the lower limit value and equal to or less than the upper limit value, sets the normal pattern hit determination flag to 5AH and turns it ON. Otherwise, the normal pattern hit determination flag is turned OFF.

[0219] On the other hand, if the normal symbol probability flag indicating the game state is ON, it is judged whether the random number is equal to or greater than the lower limit (4 in the figure) and equal to or less than the upper limit (250 in the figure) of the normal symbol winning judgment table NPP_TBL (probability state) shown in Fig. 23(a), and if it is equal to or greater than the lower limit and equal to or less than the upper limit, the normal symbol winning judgment flag is set to 5AH and turned ON. Otherwise, the process of setting the normal symbol winning judgment flag to OFF is performed (step S158).

[0220] Thus, the main control CPU 600a determines the stop symbols (normal stop symbols) based on the lottery results determined in the random number lottery process (step S159).

[0221] Next, the main control CPU 600a checks whether the normal pattern time-saving flag, which shortens the normal pattern fluctuation time, is set to ON, and if it is set to ON, it sets the normal pattern fluctuation timer to a corresponding fluctuation time, and if it is set to OFF, it performs a process of setting the normal pattern fluctuation timer to the normal fluctuation time (step S160).

[0222] Next, the main control CPU 600a shifts the memory area of ​​the main control RAM 600c in which the random number value used for the lottery for determining whether or not a normal symbol will win, which corresponds to the number of balls reserved for starting the normal symbol, is stored (step S161). In other words, assuming that a maximum of four normal pattern start reserved balls can be reserved, the random number value used in the lottery for the normal pattern corresponding to four normal pattern start reserved balls is shifted to the main control RAM 600c in which the random number value used in the lottery for the normal pattern corresponding to three normal pattern start reserved balls is stored, the random number value used in the lottery for the normal pattern corresponding to three normal pattern start reserved balls is shifted to the main control RAM 600c in which the random number value used in the lottery for the normal pattern corresponding to two normal pattern start reserved balls is stored, and the random number value used in the lottery for the normal pattern corresponding to two normal pattern start reserved balls is shifted to the main control RAM 600c in which the random number value used in the lottery for the normal pattern corresponding to one normal pattern start reserved ball is stored.

[0223] After this processing, the main control CPU 600a sets the normal pattern operation status flag used in step S155 above to 01H, and performs processing to set the main control RAM 600c in which the random number value used to select the winning or losing lottery for the normal pattern corresponding to the initial reserved ball count of 4 for the normal pattern to be stored to 00H (step S162).

[0224] After completing the process of step S162, the main control CPU 600a updates the display data of the normal symbols (step S163), and ends the normal symbol process.

[0225] On the other hand, in the above step S155, if the processing state indicating the behavior of the normal symbol, that is, the value of the normal symbol operation status flag is 01H, the main control CPU 600a judges that the normal symbol is changing, proceeds to step S164, and checks whether the normal symbol change timer is 0 or not (step S164). If the normal symbol change timer is not 0 (step S164: ≠ 0), the display data of the normal symbol is updated (step S163), and the normal symbol processing is terminated. Then, if the normal symbol change timer is 0 (step S164: = 0), the main control CPU 600a sets the normal symbol operation status flag used in the above step S155 to 02H, and sets the normal symbol change timer to, for example, about 600 ms in order to maintain the result of the lottery for the normal symbol for a certain period of time (step S165).

[0226] After completing the process of step S165, the main control CPU 600a updates the display data of the normal symbol (step S163) and ends the normal symbol process.

[0227] On the other hand, in the above step S155, if the processing state indicating the behavior of the normal symbol, that is, the value of the normal symbol operation status flag is 02H, the main control CPU 600a judges that the normal symbol is in the confirmation time (the normal symbol fluctuation has ended and is stopped), proceeds to step S166, and checks whether the normal symbol fluctuation timer is 0 or not (step S166). If the normal symbol fluctuation timer is not 0 (step S166: ≠ 0), the display data of the normal symbol is updated (step S163), and the normal symbol processing is completed. Then, if the normal symbol fluctuation timer is 0 (step S166: = 0), the main control CPU 600a sets the normal symbol operation status flag used in the above step S155 to 00H (step S167), and checks whether the normal symbol winning judgment flag is set to ON (5AH is set) (step S168).

[0228] As a result, if the normal symbol winning judgment flag is set to OFF (5AH is not set) (step S168: OFF), the main control CPU 600a updates the display data of the normal symbol (step S163) and ends the normal symbol processing. If the normal symbol winning judgment flag is set to ON (5AH is set) (step S168: ON), the main control CPU 600a sets the normal symbol winning operation flag used in step S154 to ON (5AH is set) (step S169), and then ends the normal symbol processing.

[0229] <Main control: Explanation of special pattern processing> Next, the special symbol process will be described in detail with reference to FIGS.

[0230] As shown in Figure 17, the special pattern processing first checks whether or not a game ball (winning ball) has been detected at the special pattern 1 start hole switch 44a (see Figure 3) of the special pattern 1 start hole 44 (see Figure 2) (step S200), and then checks whether or not a game ball (winning ball) has been detected at the special pattern 2 start hole switch 45a1 (see Figure 3) of the special pattern 2 start hole 45a (see Figure 2) (step S201).

[0231] <Main control: Special pattern processing: Explanation of starting port check processing> This process will be described in detail with reference to Fig. 18. The main control CPU 600a checks whether the game ball has entered (won) the special symbol 1 start hole 44 or the special symbol 2 start hole 45a, that is, checks the level of the special symbol 1 start hole switch 44a of the special symbol 1 start hole 44 or the special symbol 2 start hole switch 45a1 of the special symbol 2 start hole 45a (step S250). If the game ball has not entered (won) (step S250: NO), the special symbol process is terminated.

[0232] On the other hand, if the game ball is detected to have entered the game (winning) (step S250: YES), the main control CPU 600a checks whether the number of start reserved balls that triggers the variation of the special symbol is a predetermined number stored in the main control RAM 600c (step S251). If the number of start reserved balls is less than 4 (step S251: ≠ MAX), the number of start reserved balls is incremented by 1 (+1) (step S252).

[0233] Next, the main control CPU 600a stores the random number value used when the special symbol stops, the random number value for the variable pattern, and the random number value for determining a jackpot in the main control RAM 600c in which the start pending ball number that triggers the variation of the special symbol is stored (step 253).

[0234] Next, the main control CPU 600a checks the current game state (whether the special symbol jackpot determination flag is set to ON, etc.) and determines whether or not the pre-reading is prohibited (step S254). If the pre-reading is not prohibited (step S254: NO), the main control CPU 600a obtains the random number value for jackpot determination used in the lottery for determining whether or not the special symbol has been won, which was stored in the main control RAM 600c in the above step S253 (step S255), and further obtains a random number determination table for winning the starting hole (not shown) (step S256).

[0235] Next, the main control CPU 600a performs a lottery using the random number value for determining a big win obtained in step S255 and the random number determination table (not shown) at the time of winning the start port obtained in step S256, and performs a lottery for a special symbol according to the lottery result. Furthermore, the type of big win (rank-up bonus win, normal big win, etc.) is determined using the random number value for the special symbol stored in the main control RAM 600c in step S253, a variation pattern is determined using the random number value for the variation pattern, and a corresponding special symbol start port winning command is generated (step S257). At this time, not only the big win lottery but also a small win lottery is performed, and the type of small win is determined using the random number value for the special symbol described above, or a random number value different from the random number value for the special symbol, a variation pattern is determined using the random number value for the variation pattern, and a corresponding special symbol start port winning command is generated.

[0236] Next, the main control CPU 600a generates a start pending addition command of the lower byte according to the generated special symbol start hole winning command (step S258).

[0237] On the other hand, the main control CPU 600a completes the processing of step S258, or if the first start reserved ball count or the second start reserved ball count of special pattern 1 or 2 in step S251 is 4 or more (step S251:=MAX), or if pre-reading is prohibited (step S254:YES), it generates a start reserved addition command in the upper byte according to the increased number of start reserved balls (step S259).

[0238] Next, the main control CPU 600a combines the lower byte start pending addition command generated in step S258 above with the upper byte start pending addition command generated in step S259 above, and performs processing to send the combined command as a start pending addition command (performance control command DI_CMD) to the sub-control board 80 (step S260).

[0239] <Main control: Explanation of special pattern processing> Thus, when the processing of step S200 and step S201 shown in Fig. 17 is completed, the main control CPU 600a checks whether the special symbol small win activation flag is set to ON, that is, whether the special symbol small win activation flag is set to 5AH (step S202). If the special symbol small win activation flag is set to 5AH (step S202: ON), it is determined that the special symbol is in a small win, and after updating the display data of the special symbol (step S208), the special symbol processing is completed.

[0240] On the other hand, if the special symbol small win activation flag is not set to 5AH (step S202: OFF), it is confirmed whether the special symbol big win activation flag is set to ON, that is, whether the special symbol big win activation flag is set to 5AH (step S203). If the special symbol big win activation flag is set to 5AH (step S203: ON), it is determined that the special symbol is in a big win, and after updating the display data of the special symbol (step S208), the special symbol processing is terminated.

[0241] On the other hand, if the special symbol big win activation flag is not set to 5AH (step S203: OFF), the processing state indicating the behavior of the special symbol, that is, the value of the special symbol operation status flag is confirmed (step S204). More specifically, if the value of the special symbol operation status flag is 00H or 01H, the main control CPU 600a determines that the special symbol is waiting for change (indicating that the special symbol has not changed and is waiting for the next change), and performs special symbol change start processing (step S205).

[0242] <Main control: Special pattern processing: Explanation of special pattern variation start processing> This process will be explained in detail with reference to Fig. 19. The main control CPU 600a checks whether the start reserved ball count, which is the trigger for the special symbol to change, is 0 or not (step S300). That is, the main control CPU 600a checks whether it is stored in the main control RAM 600c, and if it determines that the start reserved ball count is 0 (step S300: = 0), it checks whether the value of the special symbol operation status flag is 00H or not (step S301). If the value of the special symbol operation status flag is 00H (step S301: YES), the special symbol change start process is terminated.

[0243] On the other hand, if the value of the special symbol operation status flag is not 00H (step S301: NO), the main control CPU 600a transmits a customer waiting demo command as a performance control command DI_CMD to the sub-control board 80 (see FIG. 3) (step S302).

[0244] Next, the main control CPU 600a sets the special symbol operation status flag to 00H (step S303), and ends the special symbol variation start process.

[0245] On the other hand, if the main control CPU 600a determines that the number of start-pending balls is not 0 (step S300: ≠ 0), it subtracts 1 (-1) from the start-pending ball number (step S304) and sends a start-pending subtraction command as a performance control command DI_CMD to the sub-control board 80 (sub-control CPU 800a) (step S305).

[0246] Next, the main control CPU600a checks the value of the special symbol time-saving counter described later, and transmits a time-saving number command as a performance control command DI_CMD to the sub-control board 80 (sub-control CPU800a) (step S306). In response to this, the sub-control CPU800a transmits to the VDP803 a command list related to an image (video) for not displaying the current time-saving number on the liquid crystal display device 41 or displaying a fixed number such as 100 times on the liquid crystal display device 41 until the number of time-saving times becomes equal to or less than a predetermined number. As a result, the VDP803 generates image (video) data so as to display an image based on the command list, and transmits the generated image (video) data to the liquid crystal display device 41, so that the current time-saving number is not displayed on the liquid crystal display device 41, or a fixed number such as 100 times is displayed. Then, when the number of time-saving times becomes equal to or less than a predetermined number, the sub-control CPU800a transmits to the VDP803 a command list related to an image (video) for displaying the received time-saving number information on the liquid crystal display device 41. As a result, VDP803 generates image (video) data to display an image based on the command list, and transmits the generated image (video) data to liquid crystal display device 41, thereby causing the current number of time-saving times to be displayed on liquid crystal display device 41.

[0247] Next, the main control CPU 600a shifts the memory area in the main control RAM 600c in which the random number values ​​used when the special pattern stops, the random number values ​​for the variable pattern, and the random number values ​​for determining a jackpot (see step S253 in Figure 18) are stored (step S307), and sets 0 to the area in the main control RAM 600c in which the random number values ​​used to determine whether the special pattern corresponding to start hold 4 is a winning combination are stored (step S308).

[0248] Next, the main control CPU 600a performs a hit determination process (step S309).

[0249] <Main control: Special pattern processing: Win detection processing explanation> This process will be explained in detail with reference to FIG. 20. The main control CPU 600a acquires a random number value for determining a big win from the main control RAM 600c in which the random number value for determining a big win (see step S253 in FIG. 18) is stored (step S370).

[0250] Next, the main control CPU 600a acquires the address of the winning determination table corresponding to the changing special symbol. That is, the address of the special symbol big winning determination table SDH_TBL shown in FIG. 23(b) and the address of the special symbol small winning determination table SDP_TBL shown in FIG. 23(c) are acquired (step S371).

[0251] Next, the main control CPU 600a changes the acquired address to the address where the judgment value is stored (step S372).

[0252] Next, the main control CPU 600a acquires information on whether the judgment value is different for each set value (step S373), and checks the value of the acquired information (step S374). If the acquired value is "0" (step S374:=0), the process proceeds to step S377, and if the acquired value is not "0" (step S374:≠0), the main control CPU 600a acquires the set value of the probability of generating a special game state advantageous to the player (for example, a set value of "00H" to "05H" corresponding to "1" to "6") stored in the main control RAM 600c (see FIG. 3) (step S375).

[0253] Next, the main control CPU 600a changes the address to the address where the judgment value corresponding to the acquired setting value is stored (step S376).

[0254] Next, the main control CPU 600a obtains a judgment value from the current address (step S377).

[0255] Next, the main control CPU 600a changes the address to the top address where the next determination value is stored (step S378), and compares the obtained random number value for determining a big win with the obtained determination value (step S379).

[0256] Next, if the acquired random number value for determining a jackpot is not smaller than the acquired determination value (step S380: NO), the main control CPU 600a returns to the processing of step S373 and repeats the processing of steps S373 to S380 until the acquired random number value for determining a jackpot becomes smaller than the acquired determination value (step S380: YES).

[0257] Next, if the acquired random number value for determining a jackpot becomes smaller than the acquired determination value (step S380: YES), the main control CPU 600a acquires a special pattern jackpot determination flag and a special pattern small jackpot determination flag according to the game status (step S381), and ends the win determination process.

[0258] <Main control: Special pattern processing: Explanation of special pattern variation start processing> Thus, after completing the hit determination process (step S309) as described above, the main control CPU 600a conducts a lottery using the random number value used when stopping the special pattern stored in the main control RAM 600c in step S253 of Figure 18, and generates a stopping pattern for the special pattern according to the lottery result (step S310).

[0259] Next, the main control CPU 600a prepares to transition to a game state such as a normal state, a time-saving state, a latent probability change state, or a probability change state (step S311). In addition, in this case, flag data is prepared in advance for turning on a flag corresponding to the game state after the transition among a normal symbol time-saving flag, a normal symbol probability change flag, a special symbol time-saving flag, a special symbol probability change flag, and an easy-to-win flag, which are set after a jackpot. In addition, the number of time-saving times to be set in the special symbol time-saving times counter and the number of probability changes to be set in the special symbol probability change times counter are also prepared. In addition, the easy-to-win flag is a flag indicating whether the game state is a time-saving game state or not.

[0260] Next, the main control CPU 600a performs a lottery using the random number value for the variation pattern stored in the main control RAM 600c in step S253 of Fig. 18, generates a variation pattern of the special symbol according to the lottery result, and transmits the variation pattern command of the generated variation pattern of the special symbol as a performance control command DI_CMD to the sub-control board 80 (sub-control CPU 800a) (step S312). In addition, in this step S312, the main control CPU 600a sets the variation time in the special symbol variation timer.

[0261] Next, the main control CPU 600a sets the special symbol changing flag to 5AH, and turns it ON (step S313).

[0262] Next, the main control CPU 600a generates a pattern designation command that designates a special pattern to be displayed on the liquid crystal display device 41 (step S314), and performs processing to transmit the generated pattern designation command to the sub-control board 80 (sub-control CPU 800a) as a performance control command DI_CMD (step S315).

[0263] Next, the main control CPU 600a sets the special symbol operation status flag to 02H (step S316), and ends the special symbol variation start process.

[0264] <Main control: Explanation of special pattern processing> On the other hand, as shown in FIG. 17, if the value of the special pattern operation status flag is 02H, the main control CPU 600a determines that the special pattern is changing (indicating that the special pattern is currently changing), and performs special pattern changing processing (step S206).

[0265] <Main control: Special pattern processing: Explanation of processing during special pattern fluctuation> This process will be described in detail with reference to Fig. 21. The main control CPU 600a first checks whether the change time set in the special symbol change timer in step S312 of Fig. 19 has elapsed, that is, whether it has become 0 (step S400). If the special symbol change timer is not 0 (step S400: NO), the main control CPU 600a ends the special symbol change process.

[0266] On the other hand, if the special symbol fluctuation timer is 0 (step S400: YES), the main control CPU 600a transmits a symbol determination command as a performance control command DI_CMD to the sub-control board 80 (sub-control CPU 800a) (step S401).

[0267] Next, the main control CPU 600a sets the special symbol operation status flag to 03H and the special symbol changing flag to 00H. Furthermore, the main control CPU 600a sets the special symbol changing timer to, for example, about 500 ms in order to maintain the special symbol winning / losing lottery result for a certain period of time (step S402). After that, the main control CPU 600a ends the special symbol changing process.

[0268] <Main control: Explanation of special pattern processing> On the other hand, as shown in FIG. 17, if the value of the special pattern operation status flag is 03H, the main control CPU 600a determines that the special pattern is being confirmed (indicating that the special pattern fluctuation has ended and is stopped), and performs processing during the special pattern confirmation time (step S207).

[0269] <Main control: Special pattern processing: Explanation of processing during special pattern confirmation time> This process will be explained in detail with reference to Fig. 22. The main control CPU 600a first checks whether the change time set in the special symbol change timer in step S312 of Fig. 19 has elapsed, that is, whether it has become 0 (step S450). If the special symbol change timer is not 0 (step S450 ≠ 0), the main control CPU 600a ends the special symbol confirmation time process.

[0270] On the other hand, if the special symbol fluctuation timer is 0 (step S450=0), the main control CPU 600a sets the special symbol operation status flag to 01H (step S451) and checks whether the special symbol jackpot determination flag is set to ON (whether 5AH is set) (step S452). If the special symbol jackpot determination flag is set to ON (if 5AH is set) (step S452: YES), the special symbol jackpot determination flag is set to 00H, the special symbol jackpot operation flag is set to 5AH, the normal symbol time reduction flag is set to 00H, the normal symbol probability change flag is set to 00H, the special symbol time reduction flag is set to 00H, the special symbol probability change flag is set to 00H, and the easy winning flag is set to 00H. Furthermore, a process is performed to set a special symbol time-saving count counter to 0000H and a special symbol probability change count counter to 00H (step S453), and the main control CPU 600a ends the special symbol confirmation time process.

[0271] On the other hand, if the special symbol big win judgment flag is not set to ON (5AH is not set) (step S452: NO), the main control CPU 600a checks whether the special symbol small win judgment flag is set to ON (5AH is set) (step S454). If the special symbol small win judgment flag is set to ON (5AH is set) (step S454: YES), the special symbol small win judgment flag is set to 00H, and the special symbol small win operation flag is set to 5AH (step S455). At this time, the normal symbol time-saving flag, the special symbol time-saving flag, and the easy winning flag are set to ON (5AH), and the time-saving number is set to the special symbol time-saving number counter.

[0272] After completing the processing of step S455, or if the special pattern small win determination flag is not set to ON (if 5AH is not set) (step S454: NO), the main control CPU 600a checks whether the value of the special pattern time-saving count counter is 0 (step S456).

[0273] If the value of the special symbol time-saving counter is not 0 (step S456: NO), the value of the special symbol time-saving counter is decremented by 1 (-1) (step S457), and the main control CPU 600a checks again whether the value of the special symbol time-saving counter is 0 (step S458). If the value of the special symbol time-saving counter is 0 (step S458: YES), the normal symbol time-saving flag is set to 00H, the normal symbol probability variable flag is set to 00H, the easy winning flag is set to 00H, and the normal symbol time-saving flag is set to 00H (step S459).

[0274] After the process of step S459 is completed, or if the value of the special symbol time-saving counter is 0 (step S456: YES), or if the value of the special symbol time-saving counter is not 0 (step S458: NO), the main control CPU 600a checks whether the value of the special symbol probability change counter is 0 (step S460). If the value of the special symbol probability change counter is 0 (step S460: YES), the process during the special symbol confirmation time is terminated.

[0275] On the other hand, if the value of the special symbol probability change counter is not 0 (step S460: NO), the main control CPU 600a subtracts 1 (-1) from the value of the special symbol probability change counter (step S461) and checks again whether the value of the special symbol probability change counter is 0 (step S462). If the value of the special symbol probability change counter is not 0 (step S462: NO), the special symbol confirmation time process is terminated.

[0276] On the other hand, if the value of the special pattern probability change count counter is 0 (step S462: YES), the main control CPU 600a sets the normal pattern time-saving flag to 00H, sets the normal pattern probability change flag to 00H, sets the easy winning flag to 00H, sets the special pattern time-saving flag to 00H, and sets the special pattern probability change flag to 00H (step S463), and ends the processing during the special pattern confirmation time.

[0277] <Main control: Explanation of special pattern processing> Thus, when any one of the processes in steps S205, S206, and S207 shown in FIG. 17 is completed, the main control CPU 600a updates the display data of the special symbols (step S208), and then ends the special symbol process.

[0278] <Explanation of the processing contents of the sub-control board> Next, the method of processing the performance contents described with reference to the above-mentioned Figs. 4 to 10 will be specifically described with reference to the processing contents (program outline) of the sub-control board 80 shown in Figs.

[0279] First, when the power is turned on to the pachinko game machine 1, a power-on signal indicating that the power has been turned on is sent from the power supply board 130 (see FIG. 3) to each control board. Then, upon receiving the signal, the sub-control CPU 800a performs the main process shown in FIG.

[0280] <Sub-control: Explanation of main process> 24, first, the sub-control CPU 800a initializes the internal registers and sets the input / output direction of the input / output port. Then, the sub-control CPU 800a sets the data to be transmitted from the output port set in the output direction so that the data is transferred serially (step S1000).

[0281] Next, the sub-control CPU 800a initializes a memory area in the sub-control RAM 800c that stores the performance control command DI_CMD received from the main control board 60 (see FIG. 3) (step S1001). Then, the sub-control CPU 800a performs interrupt permission setting processing for the input port that receives the interrupt signal from the main control board 60 (step S1002).

[0282] Next, the sub-control CPU 800a initializes the memory areas in the sub-control RAM 800c used as a working area and a stack area (step S1003), and issues an initialization command to the sound LSI 801 (see FIG. 3). As a result, the sound LSI 801 initializes the registers provided therein (step S1004).

[0283] Next, the sub-control CPU 800a checks whether or not an abnormality has occurred in the motor (not shown) that operates the top, left, right, and top left movable parts 43a to 43d (see FIG. 2), and checks the memory area in the sub-control RAM 800c in which motor data that operates the motor (not shown) is stored. If abnormal data is stored, the sub-control CPU 800a issues a command to return the motor to the origin position (retracted position). As a result, the top, left, right, and top left movable parts 43a to 43d return to their initial positions (step S1005).

[0284] Next, the sub-control CPU 800a sets a CTC (Counter Timer Circuit) that has a function of generating a pulse output at a constant period and a function of measuring time, etc. That is, the sub-control CPU 800a sets the time constant register of the CTC so that a timer interrupt is generated periodically every 1 ms (step S1006).

[0285] Next, the sub-control CPU 800a performs a checksum calculation, which is an 8-bit addition calculation, on the working area of ​​the sub-control RAM 800c (step S1007), and compares the checksum calculation value with the checksum calculation value calculated in the memory backup (see step S1015) described later and stored in the sub-control RAM 800c to confirm whether they match (step S1008). If they do not match (step S1008: NO), a process is performed to clear all areas in the sub-control RAM 800c (step S1009).

[0286] On the other hand, if there is a match (step S1008: YES) or after completing the processing of step S1009, the sub-control CPU 800a disables the watchdog timer function (not shown) (step S1010) and performs a hardware refresh of the sub-control CPU 800a, VDP 803, etc. (step S1011).

[0287] Next, the sub-control CPU 800a reads the performance control command DI_CMD received from the main control board 60 (see Figure 3) stored in the memory area of ​​the sub-control RAM 800c, and determines by lottery a performance pattern corresponding to the content of the command from among a large number of performance patterns pre-stored in the sub-control ROM 800b (step S1012).

[0288] Next, the sub-control CPU 800a performs a process of analyzing the input contents of the setting button 15 or the effect button device 13 acquired in the timer interrupt process described later (step S1013). Specifically, the sub-control CPU 800a analyzes whether the setting button 15 or the effect button device 13 is pressed by the player at the moment of pressing, the moment of releasing, or whether it is still pressed.

[0289] Next, based on the performance pattern determined by lottery in step S1012 above, the sub-control CPU 800a controls the operation of the top, left, right and top left movable parts 43a to 43d (see Figure 2), controls the turning on and off of decorative lamps such as LED lamps which are light-emitting means mounted on the decorative lamp board 90 (see Figure 3), controls the speaker 17 and controls the image displayed on the liquid crystal display device 41 (step S1014).

[0290] Next, the sub-control CPU 800a performs a checksum calculation, which is an 8-bit addition calculation, on the working area of ​​the sub-control RAM 800c, and performs memory backup processing to store the checksum calculation value in the sub-control RAM 800c (step S1015).

[0291] Next, the sub-control CPU 800a checks whether or not a VSYNC interrupt signal has been sent from the VDP 803 to the sub-control CPU 800a (step S1016). If the VSYNC interrupt signal has not been sent (step S1016: NO), the sub-control CPU 800a repeats the process of step S1016 until the VSYNC interrupt signal is sent, and when the VSYNC interrupt signal is sent (step S1016: YES), the process returns to the process of step S1007 again, and repeats the processes of steps S1007 to S1016.

[0292] <Sub-control: Data analysis processing> Next, the data analysis process of step S1014 of the main process will be described in detail with reference to Fig. 25. First, the sub-control CPU 800a generates a command list for generating image data to be displayed on the liquid crystal display device 41 by the VDP 803, based on the performance scenario data corresponding to the performance pattern determined by lottery in step S1012 shown in Fig. 24 (step S1050).

[0293] In response to this, the VDP 803 draws the background image PH10 shown in Fig. 6(a) stored in advance in the gaming ROM 805 (see Fig. 3), and when drawing the common effect image data CH1 stored in advance in the gaming ROM 805 (see Fig. 3) over a portion PH10a of the drawn background image PH10, the drawing mode is set to "multiplication" and composited. As a result, as shown in Fig. 6(b), the white background image CH1b of the common effect image data CH1 shown in Fig. 6(a) becomes transparent or invisible with respect to the background image PH10, so that only the black flame image CH1a is displayed as if it is overlaid on the background image PH10.

[0294] Next, the VDP 803 (see FIG. 3) sets the drawing mode to "addition" and synthesizes the first performance image data KH10 stored in advance in the game ROM 805 (see FIG. 3) when drawing the first performance image data KH10 overlaid on a portion PH10b of the background image PH10 shown in FIG. 6(c-1) in which the black flame image CH1a is overlaid on the background image PH10. As a result, the black background image KH10b of the first performance image data KH10 shown in FIG. 6(c-1) becomes transparent or invisible with respect to the background image PH10, so that only the blue flame image KH10a is displayed on the liquid crystal display device 41 as if it were overlaid on the background image PH10, as shown in FIG. 6(d).

[0295] Therefore, by performing the above-mentioned processing, image processing can be performed efficiently even without an alpha channel, and the problem of increasing the amount of image data can be solved.

[0296] Meanwhile, the VDP803 (see FIG. 3) draws the background image PH20 shown in FIG. 7(a) which is pre-stored in the game ROM 805 (see FIG. 3), and then draws and synthesizes a decorative pattern image P20 onto a portion PH20a of the drawn background image PH20.

[0297] Next, when drawing the first performance material image data EG1, in which the character image EG1b "reach" is placed in the center of the gray background image EG1a shown in Fig. 7(b-1) previously stored in the game ROM 805 (see Fig. 3), over a portion PH20b of the background image PH20 shown in Fig. 7(b-1), the VDP 803 (see Fig. 3) sets the drawing mode to "hard light" or "overlay" and synthesizes the data. As a result, the gray background image EG1a of the first performance material image data EG1 shown in Fig. 7(b-1) becomes transparent or invisible with respect to the background image PH20 shown in Fig. 7(b-1), so that only the character image EG1b "reach" is displayed on the liquid crystal display device 41 as if it were overlaid on the background image PH20, as shown in Fig. 7(c-1).

[0298] On the other hand, in the second performance material image data EG2 in which the character image EG2b "Chance" is arranged in the center of the gray background image EG2a shown in Fig. 7(b-2), when the second performance material image data EG2 is drawn over a portion PH20b of the background image PH20 shown in Fig. 7(b-2), the drawing mode is set to "hard light" or "overlay" for synthesis. As a result, the gray background image EG2a of the second performance material image data EG2 shown in Fig. 7(b-2) becomes transparent or invisible with respect to the background image PH20 shown in Fig. 7(b-2), so that only the character image EG2b "Chance" is displayed on the liquid crystal display device 41 as if it were overlaid on the background image PH20, as shown in Fig. 7(c-2).

[0299] On the other hand, in the third performance material image data EG3 in which the text image EG3b "Super hot" is arranged in the center of the gray background image EG3a shown in Fig. 7(b-3), when the third performance material image data EG3 is drawn over a portion PH20b of the background image PH20 shown in Fig. 7(b-3), the drawing mode is set to "hard light" or "overlay" for synthesis. As a result, the gray background image EG3a of the third performance material image data EG3 shown in Fig. 7(b-3) becomes transparent or invisible with respect to the background image PH20 shown in Fig. 7(b-3), so that only the text image EG3b "Super hot" is displayed on the liquid crystal display device 41 as if it were overlaid on the background image PH20, as shown in Fig. 7(c-3).

[0300] Therefore, even in this case, image processing can be performed efficiently without increasing the amount of image data.

[0301] Next, if the above-mentioned performance scenario data stores data indicating that a performance by pressing the performance button device 13 is enabled or data indicating that a performance by repeatedly hitting the setting button 15 is enabled, the sub-control CPU 800a stores the data in a memory area within the sub-control RAM 800c.

[0302] Furthermore, the sub-control CPU 800a performs a process of generating a control signal related to light based on the data content of the lamp data stored in the performance scenario data, and storing the control signal in the sub-control RAM 800c. At this time, the sub-control CPU 800a arranges the lighting data stored in the sub-control ROM 800b shown in Fig. 3 in layers 1 to 3 for lamps as shown in Fig. 8(a), and further arranges the edited data of each lighting data stored in the sub-control ROM 800b shown in Fig. 3 in layers 4 to 6 for lamps as shown in Fig. 8(b), and performs "addition", "subtraction", and "multiplication" processes to generate a control signal that lights up the decorative lamps on the game board 4 as shown in Fig. 8(c), and stores the control signal in the sub-control RAM 800c.

[0303] Therefore, by performing the above-mentioned processing, it is no longer necessary to create a single lamp data set, which is not only time-consuming but also increases the amount of data required, as was done in the past. This means that the volume of lamp data does not increase and the amount of work required to create the lamp data can be reduced.

[0304] In addition, the sub-control CPU 800a places the lighting data stored in the sub-control ROM 800b shown in Figure 3 in layer 1 for the lamps shown in Figures 10(a) to (c), and further places the white fade-out data stored in the sub-control ROM 800b shown in Figure 3 in layer 2 for the lamps shown in Figures 10(a) to (c), and by performing a multiplication process, generates a control signal for turning on / off the decorative lamps on the game board 4 as shown in Figures 10(a) to (c), and stores it in the sub-control RAM 800c.

[0305] Therefore, by doing as described above, one common white fade-out data is prepared for all of SP reaches A to C, and the color of the decorative lamp for each of SP reaches A to C can be faded out simply by multiplying the common white fade-out data by the lighting data of each decorative lamp during SP reaches. Therefore, according to this embodiment, it is not necessary to create lamp data in which the decorative lamp is lit in a color that matches the content of each SP reach and each color fades out (the brightness decreases), as in the past, so the volume of lamp data does not increase and the man-hours required for creating the lamp data can be reduced.

[0306] The fade-in / fade-out times are adjusted based on the presentation scenario data corresponding to the presentation pattern determined by lottery in step S1012 shown in FIG.

[0307] On the other hand, the sub-control CPU 800a determines the operation contents of the upper, left, right, and upper left movable props 43a to 43d based on the data contents of the movable prop data stored in the performance scenario data, and generates motor data for the motor (not shown) of the movable prop device 43 according to the determined operation contents.

[0308] On the other hand, the sub-control CPU 800a generates a control signal related to sound based on the data contents of the sound data stored in the above-mentioned production scenario data (step S1051).

[0309] Thus, the sub-control CPU 800a repeats the processing of steps S1050 and S1051 described above until all data based on the presentation pattern determined by lottery in step S1012 shown in FIG. 24 has been generated (step S1052: NO), and when all of the data has been generated (step S1052: YES), it proceeds to processing of step S1053.

[0310] Next, the sub-control CPU 800a performs processing when the button is enabled based on the contents stored in the sub-control RAM 800c in step S1051 above and the input contents of the setting button 15 or the performance button device 13 processed in step S1013 shown in Figure 24 (step S1053).

[0311] <Sub-control: Command reception interrupt processing> Next, referring to FIG. 26, a description will be given of the processing that is performed when a performance control command DI_CMD and an interrupt signal are sent from the main control board 60 while such main processing is being executed.

[0312] 26, when the sub-control CPU 800a receives the interrupt signal, it executes a save process to save the contents of each register to a stack area in the sub-control RAM 800c (step S1100). After that, the sub-control CPU 800a reads the register of the input port that received the performance control command DI_CMD (step S1101), and calculates a pointer indicating the address of the command transmission / reception memory area in the sub-control RAM 800c (step S1102).

[0313] Then, the sub-control CPU 800a again reads the register of the input port that received the performance control command DI_CMD (step S1103) and checks whether the value read in step S1101 and the value read in step S1103 match. If they do not match (step S1104: NO), proceed to step S1107, and if they match (step S1104: YES), store the performance control command DI_CMD received from the main control board 60 at the address corresponding to the calculated pointer (step S1105). Note that this stored performance control command DI_CMD is read out by the sub-control CPU 800a when processing step S1012 shown in FIG. 24.

[0314] Next, the sub-control CPU 800a updates a pointer indicating the address of the command transmission / reception memory area in the sub-control RAM 800c (step S1106), and restores the registers saved in the process of step S1100 (step S1107). This causes the process to return to the main process shown in FIG.

[0315] <Sub-control: Timer interrupt processing> Next, with reference to FIG. 27, a process to be performed when a timer interrupt occurs every 1 ms, which is set in the process of step S1006 (see FIG. 24) of the main process, will be described.

[0316] As shown in FIG. 27, when a timer interrupt occurs every 1 ms, the sub-control CPU 800a executes a save process to save the contents of each register in a stack area in the sub-control RAM 800c (step S1150).

[0317] Next, the sub-control CPU 800a twice acquires the data of the setting button 15, the data of the performance button device 13, the motor data of the movable role device 43, etc. (step S1151), and checks whether the data acquired twice matches (step S1152). If the data does not match (step S1152: NO), the sub-control CPU 800a repeats the process of step S1151 until the data matches, and if the data matches (step S1152: YES), stores the matching data in the sub-control RAM 800c (step S1153).

[0318] Next, the sub-control CPU 800a receives a signal from the setting button 15 or the performance button device 13 (step S1154). This received signal is analyzed in the button analysis process of step S1013 shown in FIG.

[0319] Next, the sub-control CPU 800a transmits the light-related control signal stored in the sub-control RAM 800c in step S1051 shown in Fig. 25 to the decorative lamp board 90 (see Fig. 3) (step S1155). As a result, the decorative lamps on the game board 4 are turned on as shown in Fig. 8(c) and Fig. 10(a)-(c). At this time, a control signal required to turn on or off the identification lamp device 51A (see Fig. 2) is also transmitted.

[0320] Next, the sub control CPU 800a restores the registers saved in the process of step S1150 (step S1156), thereby returning to the main process shown in FIG.

[0321] <Sub-control: command list> Here, the command list generated in step S1050 shown in FIG. 25 will be described in detail with reference to FIG.

[0322] This command list is a sequence of commands for the VDP 803 (command parser 8035), but the contents and order of the commands differ slightly depending on whether the command is to draw a moving image or a still image.

[0323] When instructing the VDP 803 to render a moving image, the initial command list in FIG. 28(a) and the steady command list in FIG. 28(b) are used.

[0324] As shown in FIG. 28(a), the sub-control CPU 800a first generates a command to set the memory area of ​​the DDR2 SDRAM 804 in which the frame buffer area is set, and the memory area of ​​the DDR2 SDRAM 804 for storing video data (step S1200).

[0325] Next, a command to instruct decoding of the moving image is generated (step S1201). Specifically, it is an instruction as to which moving image compressed data to decode, and is instructed together with the address of the CG data storage area of ​​the game ROM 805 where the corresponding moving image is stored, the number of frames of the moving image, etc.

[0326] Next, a command for finalization processing is entered to complete the generation of the initial command list (step S1202).

[0327] Next, the sub-control CPU 800a generates a steady command list shown in FIG. 28(b).

[0328] 28(b), this steady command list is made up of drawing instructions for moving images, and in the initial command list, a command is generated to indicate which frame number of decoded data is to be drawn at which coordinate position on the liquid crystal display device 41 with respect to the decoded moving image data (step S1203). Next, a termination process command is entered to complete the generation of the steady command list (step S1204).

[0329] On the other hand, when instructing the VDP 803 to draw a still image, as shown in FIG. 28(c), the sub-control CPU 800a first generates a command to set the memory area of ​​the DDR2 SDRAM 804 in which the frame buffer area is set (step S1210).

[0330] Next, a command to instruct decoding of the still image is generated (step S1211). Specifically, it is an instruction as to which still image compressed data to decode, and is instructed together with the address and data size of the CG data storage area of ​​the game ROM 805 where the corresponding still image is stored.

[0331] Next, a command is generated to indicate at what coordinate position on the liquid crystal display device 41 and in what manner (rotation angle, reduction, enlargement, etc.) the decoded still image data is to be drawn (step S1212). Next, a command for termination processing is entered to complete the generation of the command list related to still images (step S1213).

[0332] Thus, such a command list for moving images and a command list for still images are transmitted to the VDP 803 (see FIG. 4), where they are appropriately processed and then transmitted to the liquid crystal display device 41. As a result, the images shown in FIG. 6(d) and FIG. 7(c-1) to (c-3) described in detail above are displayed on the liquid crystal display device 41.

[0333] Therefore, through the above-mentioned processing, the performance contents explained with reference to the above-mentioned Figs. 4 to 10 are executed.

[0334] <Description of Modifications> In this embodiment, the sound LSI 801 and the VDP 803 are configured separately, but they may be integrated into one chip.

[0335] Furthermore, in this embodiment, an example has been shown in which the sub-control CPU 800 a is provided within the sub one-chip microcomputer 800 , but the present invention is not limited to this, and the sub-control CPU 800 a may be provided within the VDP 803 . [Explanation of symbols]

[0336] 1. Pachinko machines 41 Liquid crystal display device (display means) 803 VDP (Image Processing Means) P20 Decorative pattern image (first performance image) CH1 Common performance image data (2nd performance image) CH1b White background image (at least part of the second performance image) PH20 Background Image KH10 1st performance image data (3rd performance image) KH11 2nd performance image data (3rd performance image)

Claims

[Claim 1] A display means; image processing means capable of performing image processing on the image displayed on the display means; A preview performance execution means capable of executing a predetermined preview performance; a first preview material image composed of a first background image and a first image; a second preview material image composed of a second background image and a second image; A decorative pattern image that changes based on a predetermined start condition; the second preview material image has a plurality of second preview material images corresponding to the reliability of whether or not a profit state advantageous to the player will be generated; The preview performance execution means executing the predetermined preview performance using the first preview material image and a second preview material image selected from the plurality of second preview material images; The image processing means When the first preview material image is composited onto a portion of a predetermined background image as an image for one frame to be displayed on the display means, a first image processing is performed on the first preview material image to make the first background image transparent or invisible to the display means, and then when the selected second preview material image is composited onto the first preview material image composited onto the portion of the predetermined background image, a second image processing is performed on the selected second preview material image to make the second background image transparent or invisible to the display means, When synthesizing a decorative pattern image that is more frequently used than the first preview material image and the second preview material image with a part of the specified background image, the decorative pattern image has an alpha channel, so the gaming machine executes a synthesis process without applying the first image processing and the second image processing to the decorative pattern image.

Images