Elastic wave device

Abstract

To rationally improve a heat dissipation of an elastic wave device.SOLUTION: An elastic wave device comprises: a first part 4a that covers a non-functional surface 3b of a device chip 3; a second part 4b that covers a side surface 3c of the device chip 3 continuously to the first part 4a to reach one surface 2a of a package substrate 2; and a sealing part 4 that forms an internal space 6 between a functional surface 3a of the device chip 3 and the one surface 2a of the package substrate 2. In the device chip 3, a bottomed hole 13a that is continued from the non-functional surface 3b toward the functional surface 3a, and a penetration hole 14 that is continued in a thickness direction of the device chip 3 are formed. A heat dissipation path construction body 15 extended to the functional surface 3a side continuously from the first part 4a of the sealing part 4 by a material having a high heat conductivity filled in the bottomed hole 13a and the penetration hole 14 in the device chip 3.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to an improvement in an acoustic wave device suitable for use as a frequency filter in mobile communication devices and the like. [Background technology]

[0002] 2. Description of the Related Art An acoustic wave device used as a frequency filter in mobile communication devices and the like is disclosed in Patent Document 1. In the device of Patent Document 1, a device chip is mounted on a package substrate via bumps, and a gap between the package substrate and the device chip formed by the bumps is hermetically sealed with a resin layer to form a hollow structure (internal space or air cavity).

[0003] In acoustic wave devices, heat is generated due to insertion loss, but the piezoelectric material that constitutes the device chip has low thermal conductivity and poor heat dissipation. The thermal conductivity of lithium tantalate and lithium niobate used as piezoelectric materials is approximately 4 to 6 W / mK.

[0004] In Patent Document 1, the resin layer is formed so as to cover the other side of the device chip opposite to the side facing the hollow structure portion, and an uncovered portion is formed to expose this other side, and a metal layer is formed on this resin layer so as to contact the other side of the device chip at this uncovered portion, so that heat generated in the device chip can be dissipated via this metal layer. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2022-112576 A Summary of the Invention [Problem to be solved by the invention]

[0006] A main problem to be solved by the present invention is to provide a new structure for rationally improving the heat dissipation of this type of acoustic wave device. [Means for solving the problem]

[0007] In order to achieve the above object, the present invention provides an acoustic wave device comprising: a package substrate; a device chip mounted on the package substrate with a functional surface having a functional element including an IDT electrode facing one surface of the package substrate; a sealing portion including a first portion covering a non-functional surface of the device chip facing the functional surface of the device chip, and a second portion extending from the first portion to cover a side surface of the device chip between the functional surface and the non-functional surface that corresponds to the thickness of the device chip and reaching the one surface of the package substrate, and forming an internal space between the functional surface of the device chip and the one surface of the package substrate; Moreover, the device chip has both or either one of a bottomed hole continuing from the non-functional surface to the functional surface and a through hole continuing in a thickness direction of the device chip formed therein, The device chip is provided with a heat dissipation path structure extending from the first portion of the sealing portion to the functional surface side by a material with high thermal conductivity filled in the bottomed hole and the through hole.

[0008] One aspect of the present invention is to connect a heat dissipation path structure provided by utilizing the through hole to a ground wiring that constitutes a circuit formed on the functional surface of the device chip.

[0009] In one aspect of the present invention, the bottom of the bottomed hole is positioned above a region in the functional surface of the device chip where the functional element is formed.

[0010] In one aspect of the present invention, the distance between the bottom of the bottomed hole and the functional surface of the device chip is set to be five times or more the wavelength of the bulk wave generated in the device chip.

[0011] In one aspect of the present invention, the sealing portion is configured to include an inner layer made of resin and an outer layer made of metal, and a non-formed portion of the inner layer is provided in the first portion, and the heat dissipation path structure and the outer layer are connected in the first portion through the non-formed portion. Effect of the Invention

[0012] In the acoustic wave device according to the present invention, heat generated in the device chip can be efficiently conducted from the heat dissipation path structure to the sealing portion and released to the outside. [Brief description of the drawings]

[0013] [Figure 1] FIG. 1 is a cross-sectional view of an acoustic wave device according to an embodiment of the present invention, showing a cross section of the acoustic wave device taken along line CC in FIG. [Diagram 2] FIG. 2 is a cross-sectional view taken along line AA in FIG. [Diagram 3] FIG. 3 is a cross-sectional view taken along line BB in FIG. [Figure 4] FIG. 4 is a configuration diagram showing an example of a resonator formed in the device chip constituting the first example. [Diagram 5] FIG. 5 is a configuration diagram showing an example of a circuit formed on the device chip constituting the first example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] Hereinafter, exemplary embodiments of the present invention will be described with reference to Figures 1 to 5. An acoustic wave device 1 according to this embodiment is suitable for use as a frequency filter in mobile communication devices and the like.

[0015] The acoustic wave device 1 includes a device chip 3 mounted on a package substrate 2 with a functional surface 3a on which a functional element 7 including an IDT electrode, typically a resonator 7a, facing the surface 2a of the package substrate 2.

[0016] Typically, the device chip 3 is configured to have a rectangular plate shape with a side of 0.5 to 1 mm and a thickness of 0.15 to 0.2 mm. The package substrate 2 is configured to have a rectangular plate shape with a side of 0.7 to 3 mm and a thickness of 0.15 to 0.2 mm. The acoustic wave device 1 has a thickness of about 0.4 to 0.6 mm.

[0017] Its cross-sectional structure is shown in Figure 1. In the figure, reference numeral 3 denotes a device chip, reference numeral 3a denotes its functional surface, reference numeral 3b denotes a non-functional surface opposite to the functional surface 3a, reference numeral 7a denotes a resonator, and reference numeral 9 denotes an input / output port (terminal) that serves as the end of wiring 8 formed on the functional surface 3a. Between the device chip 3 and the package substrate 2, there is interposed a protruding electrode 10 that electrically connects the input / output port 9 to the wiring 8 formed on the package substrate 2 side, and a gap 5 is formed for this protruding electrode 10. On the other surface 2b of the package substrate 2 opposite to the surface 2a on which the device chip 3 is mounted, external connection terminals 2d are formed for connecting the acoustic wave device 1 to a motherboard (not shown).

[0018] In this manner, after the device chip 3 is mounted on the surface 2a of the package substrate 2, a sealing portion 4 is formed on the surface 2a of the package substrate 2. The sealing portion 4 includes a first portion 4a covering the non-functional surface 3b of the device chip 3 facing the functional surface 3a of the device chip 3, and a second portion 4b following the first portion 4a and covering a side surface 3c which is the thickness of the device chip 3 between the functional surface 3a and the non-functional surface 3b, and reaching the one surface 2a of the package substrate 2, thereby forming an internal space 6 (hollow structure or air cavity) between the functional surface 3a of the device chip 3 and the one surface 2a of the package substrate 2. The sealing portion 4 hermetically seals the gap 5 around the entire periphery of the device chip 3 , thereby forming the internal space 6 between the functional surface 3 a of the device chip 3 and the one surface 2 a of the package substrate 2 .

[0019] The device chip 3 is provided with a functional element 7 including an IDT electrode, a resonator 7a in the illustrated example, on the portion of the functional surface 3a facing the internal space 6.

[0020] The device chip 3 has a function of propagating elastic waves. A piezoelectric material such as lithium tantalate or lithium niobate is typically used for the device chip 3. The device chip 3 may also be configured by laminating the piezoelectric material on a support such as sapphire, silicon, alumina, spinel, quartz, or glass.

[0021] 4 shows an example of a resonator 7a serving as a SAW filter. The resonator 7a has an IDT electrode 7b and a reflector 7c formed to sandwich the IDT electrode 7b. The IDT electrode 7b is composed of an electrode pair, and each electrode pair is formed by connecting a plurality of electrode fingers 7d arranged in parallel so that their length direction crosses the propagation direction x of the elastic wave with one end side of the electrode fingers by a bus bar 7e. The reflector 7c is formed by connecting ends of a plurality of electrode fingers 7f arranged in parallel so that their length direction crosses the propagation direction x of the elastic wave with a bus bar 7g. Such a resonator 7a is typically made of a conductive metal film formed by photolithography. Furthermore, a plurality of such resonators 7a may be formed on one device chip 3.

[0022] Fig. 5 shows the concept of an example of a circuit 11 provided on one device chip 3. Reference numeral 7aa denotes resonators 7a connected in series between input / output ports 9, reference numeral 7ab denotes resonators 7a connected in parallel between input / output ports 9, reference numeral 12 denotes ground, and reference numeral 8 denotes wiring. The number and arrangement of the resonators 7a can be changed as necessary. In other words, a ladder-type filter is configured by the circuit in Fig. 5.

[0023] In addition, the device chip 3 is formed with a bottomed hole 13 extending from the non-functional surface 3b toward the functional surface 3a, and / or a through hole 14 extending in the thickness direction of the device chip 3. Here, the thickness direction of the device chip 3 is a direction perpendicular to both the non-functional surface 3b and the functional surface 3a. In the illustrated example, the device chip 3 has both a bottomed hole 13 and a through hole 14 formed therein.

[0024] The bottomed hole 13 has its hole opening 13a positioned on the non-functional surface 3b. The bottomed hole 13 is formed such that a distance y (see FIG. 1) is provided between the hole bottom 13b and the functional surface 3a in the thickness direction. Moreover, the bottomed hole 13 is formed so as to be positioned above a region in the functional surface 3a of the device chip 3 where the functional element 7 is formed (see FIGS. 2 and 3). That is, the bottomed hole 13 is formed at a position overlapping with the formation region of the functional element 7 when the device chip 3 is viewed in a direction perpendicular to the non-functional surface 3b and the functional surface 3a. In the illustrated example, four functional elements 7 are formed on the functional surface 3a, and a plurality of bottomed holes 13 are formed on an area where one of the functional elements 7 is formed. In the illustrated example, eight bottomed holes 13 are formed with a gap between adjacent bottomed holes 13 in a direction along one side of the rectangular device chip 3 (left-right direction in FIG. 2), and two rows of bottomed holes 13c are formed with a gap between adjacent bottomed holes 13c in a direction along the other side adjacent to the one side of the rectangular device chip 3 (up-down direction in FIG. 2). In the illustrated example, 16 bottomed holes 13 are formed in this manner on the formation region of one functional element 7. In the illustrated example, each bottomed hole 13 has a circular cross-sectional contour shape, and is formed so that the hole diameter gradually decreases from the hole opening 13a toward the hole bottom. Such bottomed holes 13 are preferably formed by laser ablation.

[0025] On the other hand, the through hole 14 has one hole opening 14a located on the non-functional surface 3b and the other hole opening 14b located on the functional surface 3a. In the illustrated example, the through-hole 14 has a circular cross-sectional contour shape, and is formed so that the hole diameter gradually decreases from one hole opening 14a to the other hole opening 14b. Such through holes 14 are preferably formed by laser ablation. The through-holes 14 are not formed in the region of the functional surface 3a of the device chip 3 where the functional element 7 is formed. That is, the through-hole 14 is formed at a position outside the formation region of the functional element 7 when the device chip 3 is viewed in a direction perpendicular to the non-functional surface 3b and the functional surface 3a. In the illustrated example, the through hole 14 is formed adjacent to an input / output port 9 formed adjacent to a functional element 7 having a plurality of bottomed holes 13 formed on the formation region of the device chip 3, that is, to the left of the input / output port 9 formed at the lower left of Figure 2.

[0026] The bottomed holes 13 and the through holes 14 thus formed are filled with a material having high thermal conductivity. The bottomed hole 13 is filled with the material throughout the entire range from the hole mouth 13a to the hole bottom, leaving no gaps. Moreover, the through-hole 14 is filled with the material over the entire range from one opening 14a to the other opening 14b without leaving any gaps. The device chip 3 in this embodiment has a structure in which a heat dissipation path structure 15 is incorporated, which extends from the first part 4a of the sealing portion 4 to the functional surface 3a side, by using the material filled in the bottomed hole 13 and the through hole 14 in this manner. Typically, nickel or an alloy of nickel and copper is used as the material. Furthermore, the material is typically filled into the bottomed holes 13 and through holes 14 by electrolytic plating or sputtering.

[0027] In this embodiment, the sealing portion 4 includes an inner layer 4c made of resin and an outer layer 4d made of metal. The inner layer 4c is made of an insulating resin. The inner layer 4c may be made of a resin with high thermal conductivity. Such a resin contains a filler made of a substance with high thermal conductivity in the range of 70 wt% to 90 wt% with respect to the base resin. Such a filler is typically made of granules with a diameter of about 10 μm. Specifically, the resin constituting the inner layer 4c may be an epoxy resin containing a filler or a phenolic resin containing a filler. As the filler, typically, alumina, aluminum nitride, or diamond powder may be used.

[0028] At the same time, the first portion 4a is provided with a non-formed portion 4e of the inner layer 4c. In the illustrated example, the non-formed portion 4e of the inner layer 4c is provided at the formed portion of the bottomed hole 13 and the through hole 14. The non-formed portion 4e has an opening shape made in the inner layer 4c, and in the non-formed portion 4e, the non-functional surface 3b of the device chip 3 is not covered by the inner layer 4c. The opening 13a of the bottomed hole 13 and one opening 14a of the through hole 14 are positioned within the non-formed portion 4e. After the device chip 3 is mounted on the package substrate 2 as described above, an inner layer 4c that will become the first portion 4a and an inner layer 4c that will become the second portion 4b of the sealing portion 4 are formed. In this formation process, the non-formation portion 4e is formed in the inner layer 4c that will become the first portion 4a, or the inner layer 4c that will become the first portion 4a is once formed so as to cover the entire non-functional surface 3b of the device chip 3, and then a part of it is removed to form the non-formation portion 4e.

[0029] In this way, after the inner layer 4c of the sealing portion 4 is formed, the outer layer 4d that becomes the first portion 4a and the outer layer 4d that becomes the second portion 4b are formed. In the non-formation portion 4e of the inner layer 4c, the metal that constitutes the outer layer 4d is filled into the non-formation portion 4e of the inner layer 4c without any gaps. As a result, in the non-formation portion 4e of the inner layer 4c, the end portion of the heat dissipation path constructor 15 on the non-functional surface 3b side and the outer layer 4d are integrated. That is, in the first portion 4a, the heat dissipation path constructor 15 and the outer layer 4d are connected through the non-formation portion 4e. Such an outer layer 4d is typically made of the same material as the heat dissipation path structure 15 or a material that is compatible with it, and is typically formed by electrolytic plating or sputtering.

[0030] In the illustrated example, a gap z (see FIG. 1) is formed at any position around the center of the functional surface 3a of the device chip 3 between the side surface 3c of the device chip 3 and an edge 2e of the one surface 2a of the package substrate 2. At the same time, a part 2ba of the wiring 2b on the package substrate 2 side is formed at a location on the one surface 2a of the package substrate 2 that is positioned outward from the side surface 3c of the device chip 3. In the illustrated example, the outer layer 4d which becomes the second portion 4b covers a portion 2ba of the wiring 2b on the package substrate 2 side which is formed at a location on one surface 2a of the package substrate 2 that is positioned outward from the side surface 3c of the device chip 3, and the two are connected.

[0031] The heat generated in the device chip 3 is efficiently conducted from the heat dissipation path structure 15 to the sealing portion 4 and is released to the outside through the sealing portion 4. In this embodiment, the heat generated in the device chip 3 is conducted from the heat dissipation path structure 15 to the outer layer 4d of the sealing portion 4, and from the outer layer 4d of the sealing portion 4 to the wiring 2b of the package substrate 2, and is efficiently dissipated from the package substrate 2 side.

[0032] It is preferable that the heat dissipation path structure 15 formed by the through-hole 14 is provided in the vicinity of the functional element 7 on the transmitting (Tx) side of the acoustic wave device. In this way, it is possible to effectively improve the heat dissipation properties in the vicinity of the functional element 7 on the transmitting side of the device chip 3 where a large amount of heat is generated due to the application of a large amount of electric power.

[0033] Moreover, it is preferable that the heat dissipation path constructing body 15 formed by the through hole 14 is connected to the ground wiring 12a, which is located between the functional element 7 on the transmitting side and the ground 12, among the wirings 8 formed on the functional surface 3a of the device chip 3. In this way, the heat dissipation efficiency is improved by using the wide ground wiring 12a, and the shielding property of the acoustic wave device can be improved by the outer layer 4d of the sealing part 4 connected to the ground wiring 12a via the heat dissipation path constructing body 15.

[0034] Moreover, with regard to the bottomed hole 13 , the distance y between the hole bottom 13 b and the functional surface 3 a of the device chip 3 is set to be five times the wavelength of the bulk wave generated in the device chip 3 or more. If the distance y is less than five times the wavelength of the bulk wave generated in the device chip 3, the effect of the bottomed hole 13 on the resonance frequency of the resonator formed on the functional surface 3a becomes excessive. Specifically, when the frequency of the input signal to the acoustic wave device is 1 GHz, the wavelength is about 4 μm, so the distance y is set to 20 μm or more. When the frequency of the input signal to the acoustic wave device is 2 GHz, the wavelength is about 2 μm, so the distance y is set to 10 μm or more.

[0035] Of course, the present invention is not limited to the above-described embodiments, but includes all embodiments that can achieve the object of the present invention. [Explanation of symbols]

[0036] 1. Acoustic Wave Devices 2 Package substrate 2a one side 2b, 2ba wiring 2c other side 2d External connection terminal 2e Edge 3. Device Chip 3a Functional aspect 3b Non-functional aspects 3c side 4 Sealing part 4a first part 4b Second part 4c Inner layer 4d outer layer 4e Non-formation area 5. Gap 6. Interior Space 7 Functional elements 7a, 7aa, 7ab resonators 7b IDT electrode 7c reflector 7d electrode finger 7e Busbar 7f electrode finger 7g busbar 8 Wiring 9 Input / Output Ports 10 Protruding electrode 11 Circuit 12 Grand 12a Ground wiring 13 Bottomed hole 13a hole mouth 13b Bottom of hole 13c Bottomed hole row 14 Through hole 14a One hole 14b The other hole 15 Heat dissipation path structure x Propagation direction y-distance

Claims

1. A package substrate; a device chip mounted on the package substrate with a functional surface facing the package substrate, the functional surface having a functional element including an IDT electrode on one surface of the package substrate; a sealing portion including a first portion covering a non-functional surface of the device chip facing the functional surface of the device chip, and a second portion extending from the first portion to cover a side surface of the device chip between the functional surface and the non-functional surface that corresponds to the thickness of the device chip and reaching the one surface of the package substrate, and forming an internal space between the functional surface of the device chip and the one surface of the package substrate; Moreover, the device chip has both or either one of a bottomed hole continuing from the non-functional surface to the functional surface and a through hole continuing in a thickness direction of the device chip formed therein, An elastic wave device comprising: a heat dissipation path structure within the device chip, the heat dissipation path structure extending from the first portion of the sealing portion to the functional surface side, the heat dissipation path structure being made of a material with high thermal conductivity filled in the bottomed hole and the through hole.

2. 2. The acoustic wave device according to claim 1, wherein the heat dissipation path structure provided by utilizing the through hole is connected to a ground wiring that constitutes a circuit formed on the functional surface of the device chip.

3. 2. The acoustic wave device according to claim 1, wherein a bottom of the blind hole is positioned above a region in the functional surface of the device chip where the functional element is formed.

4. 4. The elastic wave device according to claim 1, wherein the distance between the bottom of the blind hole and the functional surface of the device chip is set to be at least five times the wavelength of the bulk wave generated in the device chip.

5. 2. The acoustic wave device of claim 1, wherein the sealing portion is configured to have an inner layer made of resin and an outer layer made of metal, and the first portion has an area where the inner layer is not formed, and the heat dissipation path structure and the outer layer are connected through the area where the inner layer is not formed in the first portion.

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