Method and system for realizing hard real-time by non-real-time system in hils

By configuring non-real-time systems to execute real-time model tasks based on processor core count within HILS, the method addresses the cost and observation limitations of traditional HILS systems, enhancing efficiency and flexibility.

JP2025051560AActive Publication Date: 2025-04-04SHANGHAI TOSUN TECH LTD
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Patent Information

Application Number
JP2023203444
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-10-19
Filing Date
2023-11-30
Publication Date
2025-04-04
Estimated Expiration
2043-11-30

AI Technical Summary

Technical Problem

Existing hardware-in-the-loop simulation (HILS) systems require real-time systems, which are costly and limit the ability to directly observe and correct simulation signals locally.

Method used

A method for realizing hard real-time in non-real-time systems within HILS by creating real-time model tasks and automatically configuring the number of threads based on the processor core count, allowing for local execution without the need for additional real-time systems.

Benefits of technology

This approach enables efficient development testing and flexible simulation signal observation and correction, improving the overall efficiency and flexibility of HILS without the need for costly real-time systems.

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Abstract

To provide a method and a system capable of realizing a hard real-time, concretely, by a non-real-time system in an HILS in a vehicle software development technical field.SOLUTION: A method of realizing a hard real-time by a non-real-time system in an HILS, includes the steps of: creating a real-time model task and forming a task program; determining a number Z of processor cores of a current computer device by automatically reading a computer construction by a task program; when the core number Z of the cores is equal to or less than X, setting a thread number to n=1 to execute the real-time model task, and otherwise, setting the thread number to n=(Z-X) / Y to execute the real-time model task, wherein Y represents the number of threads of one physical core of the processor.SELECTED DRAWING: Figure 1
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Description

[Technical field]

[0001] This application claims priority from Chinese Patent Application No. 202311360067.1 filed on October 19, 2023 and U.S. Patent Application No. 18 / 371,543 filed on September 22, 2023, the entire contents of which are incorporated herein by reference. The present invention belongs to the technical field of vehicle software development, and specifically relates to a method and system for achieving hard real time in a non-real time system in HILS (Hardware-in-the-Loop Simulation). [Background technology]

[0002] Hardware-in-the-Loop Simulation always relies on a real-time system to execute the tasks, and task execution must be placed on the real-time system, which is on another computer and not local, so any action must be completed by a remote call, and key signals that determine algorithm function and performance cannot be directly observed, which causes problems. Summary of the Invention

[0003] The present invention relates to a method for realizing hard real-time in a non-real-time system in a HILS, the method including: A real-time model task is created to form a task program. The task program automatically reads the computer configuration to determine the number Z of processor cores of the current computer device, and if the number Z of cores is X or less, it sets the number of threads n=1 to execute the real-time model task, and if the number Z of cores is more than X, it sets the number of threads n=(ZX) / Y to execute the real-time model task, where Y indicates the number of threads in one physical core of the processor.

[0004] In a second aspect, the present invention further provides a computer readable storage medium having computer readable instructions stored thereon that, when executed by at least one processor, cause the HILS to perform a method for achieving hard real-time in a non-real-time system.

[0005] In a third aspect, the present invention further provides an electronic device, comprising a processor, a readable storage medium, a communication bus and a communication interface, wherein said processor, said readable storage medium and said communication interface are capable of communicating with each other via said communication bus. The readable storage medium is used to store a program for executing a method for realizing hard real-time in a non-real-time system in the HILS, and the program causes a processor to perform operations corresponding to the method for realizing hard real-time in a non-real-time system in the HILS.

[0006] In a fourth aspect, the present invention further provides a system for achieving hard real-time in a non-real-time system in a HILS, the system including a computer device, the computer device configured to execute a task creation module and a task thread setting module. The task creation module is configured to create a real-time model task and form a task program. The task thread setting module is configured so that the task program automatically reads the computer configuration to determine the number of processor cores Z of the current computer device, and if the number of cores Z is less than or equal to X, sets the number of threads n=1 to execute the real-time model task, and if the number of cores Z is more than X, sets the number of threads n=(ZX) / Y to execute the real-time model task, where Y indicates the number of threads of one physical core of the processor.

[0007] In a fifth aspect, the present invention further provides a computer program product, the product comprising a computer readable storage medium having stored thereon computer readable program code, the computer readable program code comprising instructions for causing at least one processor or at least one computing device to perform a method for achieving hard real-time in a non-real-time system in the HILS.

[0008] Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the invention. The objectives and other advantages of the invention will be realized and obtained by the structure particularly pointed out in the description and drawings.

[0009] In order to make the above objects, features and advantages of the present invention more comprehensible, preferred embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. In order to more clearly describe the specific embodiments of the present invention or the technical solutions of the prior art, the following briefly describes the drawings that need to be used to describe the specific embodiments or the prior art. The drawings described in the following description are some embodiments of the present invention, and it is obvious that those skilled in the art can obtain other drawings from these drawings without creative efforts. [Brief description of the drawings]

[0010] [Figure 1]FIG. 1 is a flow chart of a method for achieving hard real-time in a non-real-time system in a HILS according to some embodiments. [Diagram 2] FIG. 2 shows a principle block diagram of a system for achieving hard real-time in a non-real-time system in a HILS according to some embodiments. [Diagram 3] FIG. 3 shows a principle block diagram of an electronic device according to some embodiments. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] In order to make the objectives, technical aspects and advantages of the embodiments of the present invention clearer, the technical aspects of the present invention will be described clearly and completely below in conjunction with the accompanying drawings, but it is clear that the described embodiments are only some of the embodiments of the present invention, and are not all of the embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without performing creative labor, belong to the scope of protection of the invention.

[0012] Currently, when similar software executes HILS tasks, hard real-time is generally achieved by a real-time system, which requires increased hardware input and deployment costs. In some embodiments, a method for achieving hard real-time in a non-real-time system in HILS does not require a separate real-time system, and hard real-time can be achieved in a non-real-time system.

[0013] Specifically, some embodiments provide a method for achieving hard real-time in a non-real-time system in HILS, including: creating a real-time model task to form a task program; the task program automatically reads the computer configuration to determine the number of processor cores Z of the current computer device, and if the number of cores Z is less than or equal to X, sets the number of threads n=1 to execute the real-time model task; if the number of cores Z is more than X, sets the number of threads n=(ZX) / Y to execute the real-time model task, where Y indicates the number of threads of one physical core of the processor.

[0014] In some embodiments of the HILS, the method of the non-real-time system achieving hard real-time is to directly execute a virtual hard real-time environment on a personal computer when executing a HILS task, that is, there is no need to purchase a real-time system. And all operations are performed locally, which greatly improves the efficiency of development and testing, and improves the flexibility of simulation signal observation and modification. For example, if you want to observe a certain local variable, you can modify the local program code at any time, add functions such as printing information, observation information, curve drawing signal information, etc., and run it immediately after being compiled locally, which is highly efficient. In the conventional way, you need to design input and output interfaces for this local variable, update the simulation model interface table, compile the entire code program, relocate the real-time system software, and then remotely execute the simulation model and observe it.

[0015] Various non-limiting embodiments of examples of the present disclosure are described in detail below with reference to the drawings. As shown in Figure 1, some embodiments provide a method for achieving hard real-time in a non-real-time system in a HILS. The method includes: A real-time model task is created to form a task program. The task program automatically reads the computer configuration to determine the number Z of processor cores of the current computer device, and if the number Z of cores is X or less, it sets the number of threads n=1 and executes the real-time model task, and if the number Z of cores is more than X, it sets the number of threads n=(ZX) / Y and executes the real-time model task. Y indicates the number of threads per physical core of the processor.

[0016] Specifically, the real-time model task is a timing program. First, a timer is created to create the real-time model task. After the timer is created, the period of the timer is set, for example, 500 microseconds, and then the step function of the model is timed according to the period. The formed task program is a code module for simulating the real-time model task.

[0017] The number of processor cores Z is determined by the processor model, and different processor models have completely different numbers of cores Z. For example, the number of cores Z of the Intel Xeon Platinum 9282 is 56, and the number of cores Z of the Intel Core i5-2520M is 2.

[0018] If Z is less than X, the current computer performance is weak and it is not suitable to run the simulation by dividing it into multiple threads. If the number of cores Z exceeds X, it will cause the local computer to freeze. In this case, it is suitable to run the real-time model task in a single thread, i.e., the number of threads n is set to 1 to run the real-time model task.

[0019] On the other hand, if Z is more than X, it is necessary to restrict the minimum value of X to prevent the simulation from being performed in multi-threading when the computer performance is weak. That is, restrict the minimum value of Z, the number of computer cores that perform the simulation task in multi-threading. When taking the limit situation X=0, the number of threads n=Z / Y is equal to the number of real physical cores. When X is not zero, it indicates that X / Y real physical cores are reserved as self cores, and these self cores do not participate in the simulation, thereby ensuring the smooth operation of the software system and other software.

[0020] In one implementation of some embodiments, executing a real-time model task with the number of threads set to n=1 includes: Define the real-time time interval m for the execution of the real-time model task. The thread obtains the current time t in real time and determines in real time whether the current time t is greater than the next execution time t_next. If t>t_next, t_next=t_next+m, and the real-time model task is executed.

[0021] When the real-time model task is executed for the first time, t_next=m, t=0. Specifically, we will explain in detail how to execute a real-time model task when n=1, with examples. Set X=4, and if the processor model of the computer device is Intel Core i5-2520M, then the number of cores Z=2, which is less than 4, and the current computer performance is weak and not suitable for running simulation by dividing multiple threads, otherwise it will cause the local computer to run a loop, and in this case it is suitable for running the real-time model task in a single thread, that is, set the number of threads n=1 to run the real-time model task.

[0022] When only one thread executes a real-time model task, the operation of determining whether the current time t is greater than the next execution time t_next during execution does not require thread synchronization using a critical section or other means because there is no multithread preemption, and this reduces the performance cost of introducing a critical section. However, the flaws of single threads themselves are also becoming apparent, and when the processor time slice of the single thread is taken away by OS scheduling, the processor may start a new time slice, which reduces the locking precision of the t_next time, i.e., reduces the level of execution time precision for locking the next time.

[0023] When a real-time mode task is executed in a single thread, the real-time interval m for executing the real-time mode task is set to 500 microseconds. The pseudo code for the thread executing the real-time model task is as follows: m = 0.00005; while (is_running) { t = get_current_time_stamp_us(); if (t > t_next) { t_next_ = t_next + m; run_model_task(); } other_task(); } Here, "is_running" is a simulation execution enable flag, and if the simulation is terminated by the user or exits naturally, the flag is false and the algorithm does not execute the while loop. "get_current_time_stamp_us()" is an internal function of the Windows system, used to get the timestamp of the current time, in microseconds. "run_model_task()" is an internal function of the Windows system, used to periodically call the model's step function. "other_task()" is another task of the Windows system, where, for example, Sleep(1) can be executed to reduce the consumption of processor time of the current processor.

[0024] In another implementation of some embodiments, when the number of threads is n=(ZX) / Y, it indicates that the processor of the current computer device is suitable for launching a multi-threaded simulation when the number of cores Z is greater than X. A method for executing a real-time model task includes: Real-time model Define the real-time interval m for task execution. Each thread simultaneously acquires the corresponding current time t in real time, and judges in real time whether the corresponding current time t is greater than the next execution time t_next. When at least one thread recognizes that t>t_next, the thread attempts to enter the critical section, and at this time other threads are prevented from entering the critical section. After the thread successfully enters the critical section, the flag that determined that t>t_next in the previous thread is invalidated, and therefore the thread that successfully enters the critical section performs the following in the critical section: The current time t is repeatedly acquired, and it is determined whether the current time t is greater than the next execution time t_next. If so, then t_next=t_next+m, and simultaneously execute the real-time model task, and the thread exits the critical section. If not, the thread exits the critical section directly.

[0025] Specifically, we will explain in detail how to execute a real-time model task when n=(ZX) / Y, with examples. Set X=2, Y=2, and if the processor model of the computer device is Intel Core i7-8700, the number of cores is Z=6. If this is greater than 2, set the number of threads n=(ZX) / Y=(6-2) / 2=2 to execute the real-time model task.

[0026] The two threads are defined as the 0th thread and the 1st thread, respectively. If we define a real-time interval m = 500 microseconds for the execution of the real-time model task, the pseudocode for each thread executing the model task is as follows: m = 0.00005; while (is_running) { t = get_current_time_stamp_us(); if (t > t_next) { EnterCriticalSection(FSection); t = get_current_time_stamp_us(); if (t > t_next) { t_next_ = t_next + m; run_model_task(); } LeaveCriticalSection(FSection); } other_task(); } Here, "is_running" is a simulation execution enable flag. If the simulation is terminated by the user or exits naturally, the flag is false and the algorithm does not execute the while loop. "get_current_time_stamp_us()" is an internal function of the Windows system, which is used to get the timestamp of the current time, in microseconds. "EnterCriticalSection" is an API function of the Windows system, whose role is to enter the critical section. "FSection" is a multi-thread shared critical section object. "LeaveCriticalSection" is an API function of the Windows system that acts to exit the critical section. "run_model_task()" is an internal function of the Windows system, which is used to periodically call the step function of the model. "other_task()" is another task of the Windows system, where, for example, Sleep(1) can be executed to reduce the consumption of the processor time of the current processor.

[0027] The above pseudo code effectively mitigates the situation in which the simulation time accuracy is reduced due to a single thread losing processor time due to system scheduling, i.e., the above method effectively ensures the simulation time accuracy, thereby ensuring the real-time nature of the simulation.

[0028] Threads unsuccessfully entering the critical section are blocked from entering the critical section and begin their next attempt after the threads that entered the critical section have left the critical section.

[0029] Also, for example, in the above-mentioned method of executing a real-time model task with the number of threads n=2, if the 0th thread cannot timely determine the next execution time t_next due to system scheduling, the 1st thread will successfully enter the critical section when it recognizes that the probability of determining the next execution time t_next is very high and t>t_next, and thus executes the model task with priority. At this time, the 0th thread is blocked by the code line that enters the critical section. After the 1st thread executes the real-time model task and completes it and exits the critical section, the 0th thread begins to determine whether the current time t is greater than the next execution time t_next. At this time, after the 0th thread successfully enters the critical section, it updates the current time t again, that is, it repeatedly obtains the current time t, and if it determines that the current time t is less than the next execution time t_next (the next execution time t_next is updated by the 1st thread), the 0th thread does not execute the real-time model task, immediately exits the critical section, and waits for the next judgment.

[0030] The thread successfully entering the critical section is determined by the critical section itself, i.e. the thread that successfully enters the critical section is randomly determined by the Windows system.

[0031] t_next is a common global variable for each thread. That is, multiple threads can access the same variable at the same time. Each thread can share and access the same variable, and thus when any thread first finds that the current time t is greater than the next execution time t_next, it will immediately try to enter the critical section. This effectively mitigates the situation where a single thread loses processor time due to system scheduling, thereby reducing the simulation time accuracy, and effectively guarantees the simulation time accuracy.

[0032] Each configured thread occupies one physical core of the processor, The index of the processor physical core that each thread occupies is equal to a value obtained by performing a modulo operation on the corresponding thread index and the total number of processor physical cores.

[0033] Each configured thread occupies one physical core of the processor, enabling optimal performance of the computer system.

[0034] For example, if there are a total of 10 threads and the total number of physical cores of the processor is 8, the processor physical core index occupied by thread No. 0 is equal to the value obtained by performing a modulo operation on 0 and 8, which is 0. The processor physical core index occupied by thread No. 9 is equal to the value obtained by performing a modulo operation on 9 and 8, which is 1.

[0035] In the HILS disclosed herein, the method for a non-real-time system to achieve hard real-time is to directly execute a virtual hard real-time environment on a personal computer when executing a HILS task to achieve hard real-time, which means that there is no need to purchase a real-time system and all operations are performed locally, greatly improving the efficiency of development and testing and increasing the freedom of simulation signal observation and modification.

[0036] 2, some embodiments further provide a system for achieving hard real-time in a non-real-time system in a HILS, the system including a computer device, the computer device being configured to execute a task creation module and a task thread setting module. The task creation module is configured to create a real-time model task and form a task program. The task thread setting module is configured so that the task program automatically reads the computer configuration to determine the number of processor cores Z of the current computer device, and if the number of cores Z is less than or equal to X, sets the number of threads n=1 to execute the real-time model task, and if the number of cores Z is more than X, sets the number of threads n=(ZX) / Y to execute the real-time model task, where Y indicates the number of threads of one physical core of the processor.

[0037] In some embodiments, the functions performed by the task creation module and the task thread setting module are implemented in a computer device. For specific details, please refer to the specific explanation of the method for implementing hard real-time in a non-real-time system in the HILS described above, and the explanation will be omitted here.

[0038] The following describes the electronic device in some embodiments from the perspective of hardware processing. As shown in FIG. 3, some embodiments of the present disclosure are not limited to a specific implementation of an electronic device. When the processor executes the program, it realizes the steps in the embodiment of the method for realizing hard real-time in a non-real-time system in the HILS shown in Fig. 1, for example steps S101 and S102 shown in Fig. 1. Alternatively, when the processor executes the computer program, it realizes the functions of each module or unit in the embodiment of each device.

[0039] In some embodiments, the processor is specifically used to implement the following steps: A real-time model task is created to form a task program. The task program automatically reads the computer configuration to determine the number Z of processor cores of the current computer device, and if the number Z of cores is X or less, it sets the number of threads n=1 and executes the real-time model task, and if the number Z of cores is more than X, it sets the number of threads n=(ZX) / Y and executes the real-time model task. Y indicates the number of threads per physical core of the processor.

[0040] Optionally, as a possible embodiment, the processor can be further used to implement the following steps: Setting the number of threads to n=1 and running a real-time model task includes the following: Real-time model Define the real-time interval m for task execution. The thread obtains the current time t in real time and determines in real time whether the current time t is greater than the next execution time t_next. If t>t_next, then t_next=t_next+m, and the real-time model tasks are executed simultaneously.

[0041] Optionally, as a possible embodiment, the processor can be further used to implement the following steps: The first time the real-time model task is executed, t_next=m, t=0.

[0042] Optionally, as a possible embodiment, the processor can be further used to implement the following steps: To execute the real-time model tasks, set the number of threads as n=(ZX) / Y, including: Real-time model Define the real-time interval m for task execution. Each thread simultaneously acquires the corresponding current time t in real time, and judges in real time whether the corresponding current time t is greater than the next execution time t_next. If at least one thread determines that t>t_next, it attempts to enter the critical section, and if the thread successfully enters the critical section, it performs the following in the critical section: The current time t is repeatedly acquired, and it is determined whether the current time t is greater than the next execution time t_next. If so, then t_next=t_next+m, and simultaneously execute the real-time model task and the thread exits the critical section. If not, the thread exits the critical section directly.

[0043] Optionally, as a possible embodiment, the processor can be further used to implement the following steps: Any thread that has not successfully entered the critical section is prevented from entering the critical section and begins its next attempt after the thread that has entered the critical section has exited the critical section.

[0044] Optionally, as a possible embodiment, the processor can be further used to implement the following steps: The threads that successfully enter a critical section are determined by the critical section itself.

[0045] Optionally, as a possible embodiment, the processor can be further used to implement the following steps: t_next is a common global variable for each thread.

[0046] Optionally, as a possible embodiment, the processor can be further used to implement the following steps: Each configured thread occupies one physical core of the processor and includes: The physical core index of the processor that each thread occupies is equal to the modulo operation of the corresponding thread number index and the total number of physical cores of the processor.

[0047] Some embodiments provide a computer-readable storage medium having computer-readable instructions stored thereon that, when executed by at least one processor, cause the medium to perform a method for achieving hard real-time in a non-real-time system in a HILS according to any of the embodiments described above.

[0048] Some embodiments provide a computer program product, comprising a computer readable storage medium having computer readable program code stored thereon, the computer readable program code comprising instructions for causing at least one processor or at least one computing device to perform a method for achieving hard real-time in a non-real-time system in any of the possible HILs described above.

[0049] In other embodiments, computer equipment, industrial computers, etc. may also be considered as types of electronic equipment.

[0050] It should be noted that the configuration shown in FIG. 3 is not intended to limit the electronic device and may include fewer or more components than those shown, may combine some components, or may have different arrangements of components.

[0051] In some embodiments, the communication interface may be a communication interface connectable to an external bus adapter, such as RS232, RS485, USB port, TYPE port, etc. A wired or wireless network interface may also be included, which may optionally include wired and / or wireless interfaces typically used to establish communication connections between the computing device and other electronic devices (e.g., a WI-FI interface, a Bluetooth interface, etc.). The storage module, readable storage medium or computer readable storage medium includes at least one type of memory. The memory includes flash memory, hard disk, multimedia card, card-type memory (e.g., SD or DX memory, etc.), magnetic memory, magnetic disk, optical disk, etc. In some embodiments, it may be an internal storage unit of the computer device, such as the hard disk of the computer device. In other embodiments, the memory may be an external storage device of the computer device, such as a plug-in hard disk mounted on the computer device, a Smart Media Card (SMC), a Secure Digital Card (SD), a Flash Card, etc. Furthermore, the memory may include both the internal storage unit of the computer device and an external storage device. The memory is used to store various data such as application software and computer program codes installed in the computer device, as well as to temporarily store output data or data to be output.

[0052] In some embodiments, the processor may be a Central Processing Unit (CPU), controller, microcontroller, microprocessor, or other data processing chip for executing program code stored in memory or processing data, e.g., executing a computer program.

[0053] In some embodiments, the communication bus may be an I / O bus, which may be a Peripheral Component Interconnect (PCI) bus or an Enhanced Industry Standard Architecture (EISA) bus, etc. The bus may be divided into an address bus, a data bus, a control bus, etc.

[0054] Optionally, the computer device may further include a user interface. The user interface may include an input unit such as a display, a keyboard, etc., and optionally the user interface may also include a standard wired interface, a wireless interface. Optionally, in some embodiments, the display or display module may be an LED display, a liquid crystal display, a touch-type liquid crystal display, an OLED (Organic Light-Emitting Diode) toucher, etc. In this case, the display or display module is also called a display screen or a display unit, for displaying information processed in the computer device and for displaying a visualized user interface.

[0055] In some embodiments of the present invention, it is to be understood that the disclosed apparatus and method may be realized in other manners. The above-described apparatus embodiments are merely exemplary, and for example, the flowcharts and block diagrams in the drawings illustrate possible architectures, functions, and operations of the apparatus, methods, and computer program products according to some embodiments of the present invention. In this regard, each block in the flowchart or block diagram may represent a module, a program segment, or a part of code. The module, the program segment, or the part of code includes executable instructions for implementing one or more predetermined logical functions. It is to be noted that in some alternative implementations, the functions depicted in the blocks may occur in a different order than the order depicted in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and may sometimes be executed in a reverse order depending on the functions involved. It is also to be noted that each block of the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts may be implemented in a dedicated hardware-based system that executes a predetermined function or operation, or may be implemented in a combination of dedicated hardware and computer instructions.

[0056] In addition, each functional module in each embodiment of the present invention may be integrated together to form a single independent part, each module may exist independently, or two or more modules may be integrated together to form a single independent part.

[0057] The above functions can be realized in the form of software functional modules and stored in a computer-readable storage medium when sold or used as an independent product. Based on this understanding, the technical solution of the present invention essentially or the part that contributes to the prior art or the part of the technical solution can be expressed in the form of a software product. The computer software product is stored in a storage medium and includes a plurality of instructions to make a computer device (which may be a personal computer, a server, or a network device, etc.) execute all or part of the steps of the method according to each embodiment of the present invention.

[0058] The above-mentioned preferred embodiments of the present invention have been enlightened, and those skilled in the art can make various changes and modifications based on the above description without departing from the technical spirit of the present invention. The technical scope of the present invention is not limited to the contents of the specification, but should be determined based on the claims.

Claims

1. A method for achieving hard real-time in a non-real-time system in a HILS, comprising: Creating a real-time model task to form a task program; The task program automatically reads the computer configuration to determine the number Z of processor cores of the current computer device, and if the number Z of cores is X or less, sets the number of threads n=1 and executes the real-time model task, and if the number Z of cores is more than X, sets the number of threads n=(Z-X) / Y, where Y is the number of threads of one physical core of the processor, and executes the real-time model task. A method for realizing hard real-time in a non-real-time system in a HILS.

2. Setting the number of threads to n=1 and executing the real-time model task. Defining a real-time time interval m for execution of a real-time model task; The thread acquires a current time t in real time and determines in real time whether the current time t is greater than a next execution time t_next; and executing the real-time model task simultaneously, when t>t_next, with t_next=t_next+m.

3. 3. The method for realizing hard real-time in a non-real-time system in a HILS according to claim 2, wherein when the real-time model task is executed for the first time, t_next=m, t=0.

4. Setting the number of threads to n = (Z-X) / Y and executing a real-time model task is Defining a real-time time interval m for execution of a real-time model task; Each thread simultaneously acquires a corresponding current time t in real time and determines in real time whether the corresponding current time t is greater than a next execution time t_next; When at least one thread recognizes that t>t_next, that thread attempts to enter the critical section, and the threads that successfully enter the critical section: (1) Repeatedly acquiring the current time t and determining whether the current time t is greater than the next execution time t_next; (2) If it is larger, set t_next = t_next + m, execute the real-time model tasks simultaneously, and exit the critical section. (3) If it is not too large, include directly exiting the critical section.

2. A method for realizing hard real-time in a non-real-time system in a HILS according to claim 1.

5. 5. The method for achieving hard real-time in a non-real-time system in a HILS according to claim 4, characterized in that a thread that has not normally entered the critical section is prevented from entering the critical section, and a next attempt is started after a thread that has entered the critical section has exited the critical section.

6. 6. The method for achieving hard real-time in a non-real-time system in a HILS according to claim 5, wherein the thread that normally enters the critical section is determined by the critical section itself.

7. 5. The method for achieving hard real-time in a non-real-time system in a HILS according to claim 4, wherein t_next is a common global variable for each thread.

8. Each configured thread occupies one physical core of the processor, 2. The method for achieving hard real-time in a non-real-time system in a HILS according to claim 1, wherein a physical core index of the processor occupied by each thread is equal to a value obtained by performing a modulo operation on a corresponding thread number index and a total number of physical cores of the processor.

9. 1. A computer-readable storage medium, comprising: A computer-readable storage medium having computer-readable instructions stored thereon, which, when executed by at least one processor, causes the computer to execute a method for realizing hard real-time in a non-real-time system in a HILS according to any one of claims 1 to 8.

10. An electronic device, a processor, a readable storage medium, a communication bus, and a communication interface; the processor, the readable storage medium, and the communication interface realize communication between each other via the communication bus; The readable storage medium is configured to store a program of a method for realizing hard real-time in a non-real-time system in a HILS according to any one of claims 1 to 8, and the program is configured to cause a processor to execute operations corresponding to the method for realizing hard real-time in a non-real-time system in the HILS.

11. A system for realizing hard real-time in a non-real-time system in HILS, comprising: a computing device configured to execute a task creation module and a task thread setting module; The task creation module is configured to create a real-time model task and form a task program; The task thread setting module is configured to allow the task program to automatically read the computer configuration to determine the number Z of processor cores of the current computer device, and if the number Z of cores is less than or equal to X, set the number of threads n=1 to execute the real-time model task, otherwise set the number of threads n=(Z-X) / Y to execute the real-time model task, where Y indicates the number of threads of one physical core of the processor; A system for realizing hard real-time in a non-real-time system in a HILS.

12. The system for realizing hard real-time in a non-real-time system in a HILS according to claim 11, wherein the computer device is configured to execute a task creation module and a task thread setting module according to the method of any one of claims 2 to 8.

13. 1. A computer program product comprising: A computer program product comprising a computer readable storage medium having stored thereon a computer readable program code, the computer readable program code comprising instructions for causing at least one processor or at least one computing device to execute a method for realizing hard real-time in a non-real-time system in a HILS according to any one of claims 1 to 8.

Citation Information

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    CN117634189A