Transmission circuit

By designing a transmission circuit including impedance switching circuit, delay circuit and control unit, the problems of equipment complexity and large volume in the existing RFID system are solved, and the system miniaturization and efficient transmission of communication signals are realized.

JP2025066195AInactive Publication Date: 2025-04-23INSTITUTE OF SCIENCE TOKYO +1
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Patent Information

Application Number
JP2022038463
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2022-03-11
Publication Date
2025-04-23
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

In existing RFID systems, in order to realize single-side band communication, -demultiplexer is needed, resulting in equipment complexity and large size, making it difficult to achieve miniaturization.

Method used

A transmission circuit including a first and a second impedance switching circuit, a delay circuit, a control unit and a combined circuit is designed. The transmission circuit rotates the reflection coefficient at the output of the antenna on the composite plane by switching the impedance value and the delay signal, thereby realizing single-sided band communication.

Benefits of technology

This transmission circuit simplifies the device structure, realizes miniaturization of the RFID system, and ensures the quality of communication signals.

✦ Generated by Eureka AI based on patent content.

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Abstract

To reduce a size of a radio communication device of a back scatter system.SOLUTION: A transmission circuit comprises: a first resistance value switching circuit that is connected to an antenna, and can switch a resistance value; a second resistance value switching circuit that is connected to the antenna, can switch the resistance value, and is connected in parallel to the first resistance value switching circuit; a delay circuit that delays an input signal by 90 degrees, and inputs a delay signal to the second resistance value switching circuit; a control part that is constructed so as to enable a switch of the resistance value of the first and second resistance value switching circuits; and a synthesis circuit that can control a reflection coefficient of an output terminal on the antenna side to be rotated in a complex plane by synthesizing a first output signal that is output from the first resistance value switching circuit in response to the input signal with a second output signal that is output from the second resistance value switching circuit in response to the delay signal.SELECTED DRAWING: Figure 1
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Description

[Technical field]

[0001] The present disclosure relates to a transmission circuit. [Background technology]

[0002] A backscattering method is known as a data communication method for wireless communication devices. For example, Patent Document 1 discloses a technique for realizing a single sideband by suppressing either an upper sideband (USB) signal or a lower sideband (LSB) signal using a splitter / combiner. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2005-323223 A Summary of the Invention [Problem to be solved by the invention]

[0004] In RFID (Radio Frequency Identification) systems that perform backscatter data communication, there is a demand for miniaturized wireless communication devices. However, Patent Document 1 uses a splitter / combiner to achieve a single sideband, which is a disadvantage in terms of miniaturization.

[0005] An object of the present disclosure is to provide a transmission circuit that can reduce the size of a backscattering wireless communication device. [Means for solving the problem]

[0006] A transmission circuit of the present disclosure is configured to be connected to an antenna, the transmission circuit including: a first resistance value switching circuit connected to the antenna and configured to be able to switch resistance values; a second resistance value switching circuit connected to the antenna, configured to be able to switch resistance values, and connected in parallel with the first resistance value switching circuit; a delay circuit that delays an input signal by 90 degrees and inputs the delayed signal to the second resistance value switching circuit; a control unit configured to be able to switch resistance values ​​of the first resistance value switching circuit and the second resistance value switching circuit; and a combining circuit capable of controlling the reflection coefficient of the output terminal on the antenna side to rotate in a complex plane by combining a first output signal output from the first resistance value switching circuit in response to the input signal and a second output signal output from the second resistance value switching circuit in response to the delayed signal. Effect of the Invention

[0007] The present disclosure makes it possible to reduce the size of a backscattering wireless communication device. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a block diagram showing an example of the configuration of a transmission circuit according to the first embodiment. [Diagram 2] FIG. 2 is a diagram for explaining a method of rotating the reflection coefficient by switching the resistance value according to the first embodiment. [Diagram 3] FIG. 3 is a diagram illustrating an example of the configuration of the resistance value switching circuit according to the first embodiment. [Figure 4] FIG. 4 is a diagram for explaining a method of controlling the impedance of a transmission circuit according to a comparative example so as to rotate the reflection coefficient of the output terminal thereof. [Diagram 5] FIG. 5 is a diagram for explaining a method of controlling the impedance of the transmission circuit according to the first embodiment so as to rotate the reflection coefficient of the output terminal thereof. [Figure 6] FIG. 6 is a diagram illustrating an example of the configuration of a synthesis circuit according to the first embodiment. [Figure 7] FIG. 7 is a diagram showing an example of a spectral waveform of a backscattering signal according to the first embodiment. [Figure 8] FIG. 8 is a diagram showing a first example of an output signal according to the first embodiment. [Figure 9] FIG. 9 is a diagram showing a second example of an output signal according to the first embodiment. [Figure 10] FIG. 10 is a diagram illustrating an example of the configuration of the resistance value correction circuit according to the first embodiment. [Figure 11] FIG. 11 is a diagram for explaining a method of executing feedback control according to the second embodiment. [Figure 12] FIG. 12 is a diagram showing an example of a spectral waveform of a backscattering signal according to the second embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings. Note that the present invention is not limited to this embodiment, and in the following embodiments, the same components are designated by the same reference numerals, and duplicated explanations will be omitted.

[0010] [Transmission circuit] A configuration example of the transmission circuit according to the first embodiment will be described with reference to Fig. 1. Fig. 1 is a block diagram showing a configuration example of the transmission circuit according to the first embodiment.

[0011] 1, the transmission circuit 1 includes an impedance rotation circuit 10, a synthesis circuit 20, a monitor circuit 30, a resistance value correction circuit 40, and a control circuit 50. The transmission circuit 1 is configured to be connected to an antenna 2. The transmission circuit 1 is a circuit that generates a single side band (SSB) reflected signal by configuring the resistance value to be switchable.

[0012] The impedance rotation circuit 10 includes a first resistance value switching circuit 12 and a second resistance value switching circuit 14. The first resistance value switching circuit 12 and the second resistance value switching circuit 14 are configured to be able to switch resistance values. The first resistance value switching circuit 12 and the second resistance value switching circuit 14 have the same configuration.

[0013] The combining circuit 20 is a circuit that combines the output signal output from the first resistance value switching circuit 12 and the output signal output from the second resistance value switching circuit 14. The details of the combining circuit 20 will be described later.

[0014] The monitor circuit 30 is a circuit that monitors the output signal output from the first resistance value switching circuit 12 and the output signal output from the second resistance value switching circuit 14.

[0015] The resistance value correction circuit 40 is a circuit that corrects the resistance values ​​of the first resistance value switching circuit 12 and the second resistance value switching circuit 14. The details of the resistance value correction circuit 40 will be described later.

[0016] The control circuit 50 is configured to control the resistance values ​​of the first resistance value switching circuit 12 and the second resistance value switching circuit 14. The control circuit 50 includes a delay circuit 52, a pulse generating circuit 54, and a feedback control circuit 56.

[0017] The delay circuit 52 is a circuit that delays the phase of an input signal and outputs the delayed signal. The delay circuit 52 is configured to delay the phase of an input signal by 90 degrees, for example, and output the delayed signal. The delay circuit 52 may be variable. This makes it possible to adjust the phase shift caused by manufacturing variations, etc.

[0018] The pulse generating circuit 54 is a circuit that outputs a control signal for switching the resistance values ​​of the first resistance value switching circuit 12 and the second resistance value switching circuit 14 to the first resistance value switching circuit 12 and the second resistance value switching circuit 14. The pulse generating circuit 54 is configured to switch the resistance values ​​of the first resistance value switching circuit 12 and the second resistance value switching circuit 14 to rotate and control the impedance of the output terminal on the antenna 2 side of the combining circuit 20.

[0019] The feedback control circuit 56 evaluates the state (symmetry) of the monitor waveform based on the monitoring result of the monitor circuit 30, and is digitally controlled so that the resistance value correction circuit 40 corrects the resistance values ​​of the first resistance value switching circuit 12 and the second resistance value switching circuit 14 based on the evaluation result. This feedback control makes it possible to obtain a stable SSB (Single Side Band) backscatter signal.

[0020] A method of rotating the reflection coefficient by switching the resistance value according to the first embodiment will be described with reference to Fig. 2. Fig. 2 is a diagram for explaining a method of rotating the reflection coefficient by switching the resistance value according to the first embodiment.

[0021] A signal S1 is input to the first resistance switching circuit 12. A signal S2 is input to the second resistance switching circuit 14 via a delay circuit 52. The delay circuit 52 is configured to delay the phase of the signal S1 by 90 degrees and output the signal S2. That is, signals with a phase difference of 90 degrees are input to the first resistance switching circuit 12 and the second resistance switching circuit 14, respectively.

[0022] The resistance value of the first resistance value switching circuit 12 and the resistance value of the second resistance value switching circuit 14 are controlled by a pulse generating circuit 54 (omitted in FIG. 2). The first resistance value switching circuit 12 outputs an output signal S3 corresponding to the resistance value to the combining circuit 20. The second resistance value switching circuit 14 outputs an output signal S4 corresponding to the resistance value to the combining circuit 20.

[0023] The combining circuit 20 is configured to receive a high frequency signal RF from the antenna 2. The combining circuit 20 is configured to rotate the phase of the reflection coefficient by combining the signals input from the first resistance value switching circuit 12 and the second resistance value switching circuit 14. The combining circuit 20 is configured to output the SSB reflected signal to the antenna 2 as a backscatter signal BS.

[0024] A configuration example of the resistance value switching circuit according to the first embodiment will be described with reference to Fig. 3. Fig. 3 is a diagram showing a configuration example of the resistance value switching circuit according to the first embodiment.

[0025] 3 shows an example of the configuration of the first resistance value switching circuit 12. The configuration of the second resistance value switching circuit 14 is the same as that of the first resistance value switching circuit 12, and therefore a description thereof will be omitted.

[0026] As shown in FIG. 3, the first resistance value switching circuit 12 includes a switch element 61, a switch element 62, a switch element 63, a switch element 64, a switch element 65, a switch element 66, a switch element 67, a switch element 68, and a switch element 69. The first resistance value switching circuit 12 includes a resistor element 71, a resistor element 72, a resistor element 73, a resistor element 74, a resistor element 75, a resistor element 76, a resistor element 77, a resistor element 78, and a resistor element 79. In the example shown in FIG. 3, the first resistance value switching circuit 12 includes nine switch elements and nine resistor elements, but the present disclosure is not limited thereto. The number of switch elements and resistor elements included in the first resistance value switching circuit is two or more, respectively, to realize four-point impedance rotation. Increasing the number of elements increases the resolution and improves the backscatter signal characteristics.

[0027] The switch elements 61 to 69 are, for example, MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), but are not limited to this.

[0028] The switch element 61 and the resistor element 71 are connected in series. The switch element 61 and the resistor element 71 configure a resistor circuit 81. An input terminal 91 is connected to the switch element 61. The switch element 61 is configured to receive a control signal for switching between an on state (closed state) and an off state (open state) from the pulse generating circuit 54 via the input terminal 91.

[0029] The switch element 62 and the resistor element 72 are connected in series. The switch element 62 and the resistor element 72 configure a resistor circuit 82. An input terminal 92 is connected to the switch element 62. The switch element 62 is configured to receive a control signal for switching between an on state and an off state from the pulse generating circuit 54 via the input terminal 92.

[0030] The switch element 63 and the resistor element 73 are connected in series. The switch element 63 and the resistor element 73 configure a resistor circuit 83. An input terminal 93 is connected to the switch element 63. The switch element 63 is configured to receive a control signal for switching between an on state and an off state from the pulse generating circuit 54 via the input terminal 93.

[0031] The switch element 64 and the resistor element 74 are connected in series. The switch element 64 and the resistor element 74 configure a resistor circuit 84. An input terminal 94 is connected to the switch element 64. The switch element 64 is configured to receive a control signal for switching between an on state and an off state from the pulse generating circuit 54 via the input terminal 94.

[0032] The switch element 65 and the resistor element 75 are connected in series. The switch element 65 and the resistor element 75 configure a resistor circuit 85. An input terminal 95 is connected to the switch element 65. The switch element 65 is configured to receive a control signal for switching between an on state and an off state from the pulse generating circuit 54 via the input terminal 95.

[0033] The switch element 66 and the resistor element 76 are connected in series. The switch element 66 and the resistor element 76 configure a resistor circuit 86. An input terminal 96 is connected to the switch element 66. The switch element 66 is configured to receive a control signal for switching between an on state and an off state from the pulse generating circuit 54 via the input terminal 96.

[0034] The switch element 67 and the resistor element 77 are connected in series. The switch element 67 and the resistor element 77 configure a resistor circuit 87. An input terminal 97 is connected to the switch element 67. The switch element 67 is configured to receive a control signal for switching between an on state and an off state from the pulse generating circuit 54 via the input terminal 97.

[0035] The switch element 68 and the resistor element 78 are connected in series. The switch element 68 and the resistor element 78 configure a resistor circuit 88. An input terminal 98 is connected to the switch element 68. The switch element 68 is configured to receive a control signal for switching between an on state and an off state from the pulse generating circuit 54 via the input terminal 98.

[0036] The switch element 69 and the resistor element 79 are connected in series. The switch element 69 and the resistor element 79 configure a resistor circuit 89. An input terminal 99 is connected to the switch element 69. The switch element 69 is configured to receive a control signal for switching between an on state and an off state from the pulse generating circuit 54 via the input terminal 99.

[0037] The resistor circuits 81 to 89 are connected in parallel. One end of each of the resistor circuits 81 to 89 is connected to an output terminal 101. The other end of each of the resistor circuits 81 to 89 is connected to a reference potential 102. The first resistance value switching circuit 12 is configured to add one of the resistance values ​​of the resistor elements 71 to 79 by selectively controlling the on and off states of the switch elements 61 to 69 included in the resistor circuits 81 to 89, for example.

[0038] The resistance values ​​of the resistance elements 71 to 79 are greater than the resistance values ​​of the switch elements 61 to 69, respectively. Therefore, the resistance elements 71 to 79 act as feedback resistors, and the influence of manufacturing variations in the switch elements 61 to 69 can be suppressed.

[0039] Since resistor circuits 81 to 89 have the same circuit configuration, the influence of the variation in absolute value of characteristic values ​​such as resistance values ​​acts as a change in the center characteristic impedance. This change in characteristic impedance can be tolerated by adjusting the characteristic impedance of the impedance conversion circuit of the combining circuit 20, which will be described later.

[0040] Before describing the method for controlling the reflection coefficient of the output terminal on the antenna 2 side in the first embodiment so as to rotate on the complex plane of a polar chart, a method for controlling the reflection coefficient in the comparative example so as to rotate on the complex plane of a polar chart will be described.

[0041] 4 is a diagram for explaining a method of controlling the impedance of a transmission circuit according to a comparative example to rotate the reflection coefficient of the output terminal of the transmission circuit. The transmission circuit according to the comparative example includes an inductor value switching circuit and a capacitance value switching circuit.

[0042] Figure 4 shows the change in reflection coefficient Γ due to the change in impedance on a polar chart. Impedance is calculated by the following formula (1). In formula (1), Z is impedance, R is resistance value, j is an imaginary number, ω is angular frequency, L is inductance, and C is capacitance. Z = R + j(ωL-1 / ωC) (1)

[0043] The reflection coefficient Γ can be expressed by the following equation: Γ=(Z-Z0) / (Z+Z0) (2) where Z0 is the impedance of the antenna.

[0044] In the comparative example, the impedance Z is controlled by selecting and controlling the inductor value and capacitance value, and the reflection coefficient Γ is controlled to rotate around a reference point. The reference point includes the origin, but is not limited to the origin, and includes any point. The closer the reference point is to the origin, the more likely it is that the transmission circuit will obtain a signal that is closer to the ideal. The more the transmission circuit is controlled to rotate in a circle around the reference point, the more likely it is that the transmission circuit will obtain a signal that is closer to the ideal. In terms of a Smith chart, the lower semicircular area indicates capacitive properties, and the upper half indicates inductive properties. Changes on the real axis represent changes in resistance value.

[0045] FIG. 5 is a diagram for explaining a method of controlling the impedance of the transmission circuit according to the first embodiment so as to rotate the reflection coefficient of the output terminal thereof.

[0046] As shown in FIG. 1 and FIG. 2, the transmission circuit 1 according to the first embodiment includes a first resistance value switching circuit 12 and a second resistance value switching circuit 14 as impedance conversion circuits.

[0047] As the resistance value of the first resistance value switching circuit 12 to the input signal changes, the impedance of the output terminal of the transmission circuit 1 changes along the real axis in Fig. 5. On the other hand, an input signal with a phase delay of 90 degrees is input to the second resistance value switching circuit 14. In this case, as the resistance value of the second resistance value switching circuit 14 to the input signal changes, the impedance of the output terminal of the transmission circuit 1 changes along the imaginary axis in Fig. 5.

[0048] Therefore, in the first embodiment, it becomes possible to rotate and control the impedance on the complex plane by combining the impedance change of the first resistance value switching circuit 12 and the impedance change of the second resistance value switching circuit 14. In the first embodiment, it is possible to control the rotation direction of the impedance and switch between USB and LSB by changing the selection order of the switch elements controlled by the first resistance value switching circuit 12 and the second resistance value switching circuit 14 of the pulse generating circuit 54.

[0049] [Synthesis circuit] An example of the configuration of the synthesis circuit according to the first embodiment will be described with reference to Fig. 6. Fig. 6 is a diagram showing an example of the configuration of the synthesis circuit according to the first embodiment.

[0050] As shown in FIG. 6, the combining circuit 20 includes an inductor 22, a capacitor 24, and an impedance conversion circuit .

[0051] The inductor 22 and the capacitor 24 are connected in parallel. The inductor 22 and the capacitor 24 form a resonant circuit, and the resonant frequency is matched with the frequency of the high frequency signal RF. One end of the inductor 22 is connected to the output terminal of the first resistance value switching circuit 12, and the other end is connected to the input terminal of the impedance conversion circuit 26. One end of the capacitor 24 is connected to the output terminal of the second resistance value switching circuit 14, and the other end is connected to the input terminal of the impedance conversion circuit 26. The inductor 22 and the capacitor 24 are configured to be able to combine a signal output from the first resistance value switching circuit 12 and a signal output from the second resistance value switching circuit 14.

[0052] The impedance conversion circuit 26 includes a capacitor 261 and an inductor 262. One end of the capacitor 261 is connected to the input terminal of the impedance conversion circuit 26, and the other end is connected to a reference potential. One end of the inductor 262 is connected to the input terminal of the impedance conversion circuit 26, and the other end is connected to the output terminal of the impedance conversion circuit 26.

[0053] The impedance conversion circuit 26 is a circuit that converts impedance. The impedance conversion circuit 26 is a circuit that matches the output impedance of the transmission circuit 1 with the input impedance of the antenna 2. The output impedance of the transmission circuit 1 is, for example, but not limited to, 200Ω. The input impedance of the antenna 2 is, for example, but not limited to, 50Ω. In other words, the impedance conversion circuit 26 converts the impedance from 200Ω to 50Ω, for example.

[0054] The impedance conversion circuit 26 can also be used to adjust manufacturing variations in the first resistance value switching circuit 12 and the second resistance value switching circuit 14. Changes in characteristics due to manufacturing variations can be suppressed by adjusting the constants of the inductors and capacitors in the impedance conversion circuit 26. Furthermore, the impedance conversion circuit 26 may be configured as a variable circuit to adjust the variations.

[0055] [Backscatter signal] An example of a backscattering signal according to the first embodiment will be described with reference to Fig. 7. Fig. 7 is a diagram showing an example of a spectrum waveform of a backscattering signal according to the first embodiment. In Fig. 7, the horizontal axis indicates frequency [GHz (gigahertz)], and the vertical axis indicates signal level [V].

[0056] FIG. 7 shows a spectrum waveform W1. The spectrum waveform W1 includes a high-frequency signal RF1, a USB signal US1, and an LSB signal LS1. The frequency of the high-frequency signal RF1 is 1.00 [GHz]. The frequency of the LSB signal LS1 is 0.999 [GHz]. The frequency of the USB signal US1 is 1.001 [GHz]. As shown in FIG. 7, the LSB signal LS1 is suppressed compared to the USB signal US1. The difference between the USB signal US1 and the LSB signal LS1 is about 26 [dB (decibels)]. That is, in the example shown in FIG. 7, a highly suppressed USB signal is obtained.

[0057] An output signal according to the first embodiment will be described with reference to Fig. 8 and Fig. 9. Fig. 8 shows a first example of an output signal according to the first embodiment. Fig. 9 shows a second example of an output signal according to the first embodiment.

[0058] In Fig. 8, the horizontal axis indicates time [μs (microseconds)] and the vertical axis indicates signal level [mV (millivolts)]. Fig. 8 shows waveforms W11 and W12. The waveform W11 is an example of the waveform of the output signal S3 from the first resistance value switching circuit 12. The waveform W12 is an example of the waveform of the output signal S4 from the second resistance value switching circuit 14.

[0059] As shown in the waveform W11, the output signal S3 is, for example, a step-like rising signal. As shown in the waveform W12, the output signal S4 is, for example, a step-like falling signal. In the example shown in FIG. 8, an LSB signal in which the USB signal is suppressed can be obtained.

[0060] In Fig. 9, the horizontal axis represents time [μs] and the vertical axis represents signal level [mV]. Fig. 9 shows waveforms W13 and W14. The waveform W13 is an example of the waveform of the output signal S3 from the first resistance value switching circuit 12. The waveform W14 is an example of the waveform of the output signal S4 from the second resistance value switching circuit 14.

[0061] As shown in the waveform W13, the output signal S3 is, for example, a step-like falling signal. As shown in the waveform W14, the output signal S4 is, for example, a step-like rising signal. In the example shown in FIG. 9, a USB signal in which the LSB signal is suppressed can be obtained.

[0062] By changing the selection order of the switch elements using the pulse generating circuit 54, the output signal shown in the example of Fig. 8 can be changed to the output signal shown in the example of Fig. 9. In other words, the LSB signal and the USB signal can be changed.

[0063] [Resistance compensation circuit] The resistance value correction circuit according to the first embodiment will be described with reference to Fig. 10. Fig. 10 is a diagram showing an example of the configuration of the resistance value correction circuit according to the first embodiment.

[0064] The resistance value correction circuit 40 is configured to be connected in parallel to each of the first resistance value switching circuit 12 and the second resistance value switching circuit 14. The resistance value correction circuit 40 is a circuit that compensates for variations in the resistance values ​​of the first resistance value switching circuit 12 and the second resistance value switching circuit 14 during manufacturing.

[0065] 10 shows an example of the configuration of a resistance correction circuit connected in parallel to the first resistance switching circuit 12. The configuration of the resistance correction circuit connected in parallel to the second resistance switching circuit 14 is the same as the configuration of the resistance correction circuit connected to the first resistance switching circuit 12, so a description thereof will be omitted.

[0066] As shown in Fig. 10, the resistance value correction circuit 40 includes a switch element 61A, a switch element 62A, a switch element 63A, a switch element 64A, a switch element 65A, a switch element 66A, a switch element 67A, a switch element 68A, and a switch element 69A. The resistance value correction circuit 40 includes a resistor element 71A, a resistor element 72A, a resistor element 73A, a resistor element 74A, a resistor element 75A, a resistor element 76A, a resistor element 77A, a resistor element 78A, and a resistor element 79A. In the example shown in Fig. 10, the resistance value correction circuit 40 is shown as including nine switch elements and nine resistor elements, but the present disclosure is not limited thereto. By increasing the number, the resolution can be increased and the variation compensation performance is improved.

[0067] The switch elements 61A to 69A are, for example, MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), but are not limited to this.

[0068] The switch element 61A and the resistor element 71A are connected in series. The switch element 61A and the resistor element 71A configure a resistor circuit 81A. An input terminal 91A is connected to the switch element 61A. The switch element 61A is configured to receive a control signal for switching between an on state (closed state) and an off state (open state) from the feedback control circuit 56 via the input terminal 91A.

[0069] The switch element 62A and the resistor element 72A are connected in series. The switch element 62A and the resistor element 72A configure a resistor circuit 82A. An input terminal 92A is connected to the switch element 62A. The switch element 62A is configured to receive a control signal for switching between an on state and an off state from the feedback control circuit 56 via the input terminal 92A.

[0070] The switch element 63A and the resistor element 73A are connected in series. The switch element 63A and the resistor element 73A configure a resistor circuit 83A. An input terminal 93A is connected to the switch element 63A. The switch element 63A is configured to receive a control signal for switching between an on state and an off state from the feedback control circuit 56 via the input terminal 93A.

[0071] The switch element 64A and the resistor element 74A are connected in series. The switch element 64A and the resistor element 74A configure a resistor circuit 84A. An input terminal 94A is connected to the switch element 64A. The switch element 64A is configured to receive a control signal for switching between an on state and an off state from the feedback control circuit 56 via the input terminal 94A.

[0072] The switch element 65A and the resistor element 75A are connected in series. The switch element 65A and the resistor element 75A configure a resistor circuit 85A. An input terminal 95A is connected to the switch element 65A. The switch element 65A is configured to receive a control signal for switching between an on state and an off state from the feedback control circuit 56 via the input terminal 95A.

[0073] The switch element 66A and the resistor element 76A are connected in series. The switch element 66A and the resistor element 76A configure a resistor circuit 86A. An input terminal 96A is connected to the switch element 66A. The switch element 66A is configured to receive a control signal for switching between an on state and an off state from the feedback control circuit 56 via the input terminal 96A.

[0074] The switch element 67A and the resistor element 77A are connected in series. The switch element 67A and the resistor element 77A configure a resistor circuit 87A. An input terminal 97A is connected to the switch element 67A. The switch element 67A is configured to receive a control signal for switching between an on state and an off state from the feedback control circuit 56 via the input terminal 97A.

[0075] The switch element 68A and the resistor element 78A are connected in series. The switch element 68A and the resistor element 78A configure a resistor circuit 88A. An input terminal 98A is connected to the switch element 68A. The switch element 68A is configured to receive a control signal for switching between an on state and an off state from the feedback control circuit 56 via the input terminal 98A.

[0076] The switch element 69A and the resistor element 79A are connected in series. The switch element 69A and the resistor element 79A configure a resistor circuit 89A. An input terminal 99A is connected to the switch element 69A. The switch element 69A is configured to receive a control signal for switching between an on state and an off state from the feedback control circuit 56 via the input terminal 99A.

[0077] [Second embodiment] [Feedback control] Next, feedback control in the case of analog control according to the second embodiment will be described. In the case of analog control, the resistance correction circuit 40 is not necessary, and the output of the feedback control circuit is fed back to the inputs of the first resistance value switching circuit 12 and the second resistance value switching circuit 14. The output signals from the first resistance value switching circuit 12 and the second resistance value switching circuit 14 are monitored, and feedback control is performed so that the difference between the output signals from the first resistance value switching circuit 12 and the second resistance value switching circuit 14 becomes small.

[0078] A method of executing feedback control according to the second embodiment will be described with reference to Fig. 11. Fig. 11 is a diagram for explaining a method of executing feedback control according to the second embodiment.

[0079] Fig. 11 shows the first resistance value switching circuit 12, the second resistance value switching circuit 14, the synthesis circuit 20, the monitor circuit 30A, and a feedback control circuit 56A. The delay circuit 52 and the pulse generation circuit 54 are omitted in Fig. 11. The feedback control circuit 56A is configured to feedback control the first resistance value switching circuit 12 and the second resistance value switching circuit 14 based on the detection result of the output signals of the first resistance value switching circuit 12 and the second resistance value switching circuit 14 by the monitor circuit 30A.

[0080] The monitor circuit 30A is configured to detect output signals of the first resistance value switching circuit 12 and the second resistance value switching circuit 14. The monitor circuit 30A is configured to output detection results of the output signals of the first resistance value switching circuit 12 and the second resistance value switching circuit 14 to the feedback control circuit 56A.

[0081] The monitor circuit 30A includes a detection circuit 31 and a detection circuit 32. The detection circuit 31 is configured to detect the output signal S4 output by the second resistance value switching circuit 14. The detection circuit 32 is configured to detect the output signal S3 output by the first resistance value switching circuit 12.

[0082] The detection circuit 31 includes a diode 311, a diode 312, and a capacitor 313. The diode 311 and the diode 312 are, for example, Schottky barrier diodes.

[0083] The cathode of the diode 311 is connected to the output terminal of the second resistance value switching circuit 14. The anode of the diode 311 is connected to the reference potential.

[0084] The cathode of the diode 312 is connected to one end of the capacitor 313. The anode of the diode 312 is connected to the cathode of the diode 311.

[0085] One end of the capacitor 313 is connected to the cathode of the diode 312, and the other end is connected to a reference potential. The capacitor 313 constitutes a low-pass filter.

[0086] That is, the detection circuit 31 is configured to detect, by a low-pass filter, the output signal S4 from the second resistance value switching circuit 14. The detection circuit 31 is configured to output a detection signal S5 indicating a detection result of the output signal S4 to the feedback control circuit 56A.

[0087] The detection circuit 32 includes a diode 321, a diode 322, and a capacitor 323. The diode 321 and the diode 322 are, for example, Schottky barrier diodes.

[0088] The cathode of the diode 321 is connected to the output terminal of the first resistance value switching circuit 12. The anode of the diode 321 is connected to the reference potential.

[0089] The cathode of the diode 322 is connected to one end of the capacitor 323. The anode of the diode 322 is connected to the cathode of the diode 321.

[0090] One end of the capacitor 323 is connected to the cathode of the diode 322, and the other end is connected to a reference potential. The capacitor 323 constitutes a low-pass filter.

[0091] That is, the detection circuit 32 is configured to detect, by a low-pass filter, the output signal S3 from the first resistance value switching circuit 12. The detection circuit 32 is configured to output a detection signal S6 indicating a detection result of the output signal S3 to the feedback control circuit 56A.

[0092] The feedback control circuit 56A includes an amplifier circuit 561, a resistive element 562, a resistive element 563, an adder circuit 564, an adder circuit 565, a reference power supply 566, a resistive element 567, a resistive element 568, a resistive element 569, a capacitor 570, a resistive element 571, a resistive element 572, a capacitor 573, a resistive element 574, a resistive element 575, and a resistive element 576.

[0093] A detection signal S5 is input from the detection circuit 31 to one input terminal of the amplifier circuit 561. A detection signal S6 is input from the detection circuit 32 to the other input terminal of the amplifier circuit 561. The amplifier circuit 561 outputs an amplified signal S7 obtained by amplifying the difference between the voltage value of the detection signal S5 and the voltage value of the detection signal S6 from one output terminal. The amplifier circuit 561 outputs an amplified signal S8 obtained by amplifying the difference between the voltage value of the detection signal S5 and the voltage value of the detection signal S6 from the other output terminal. The amplifier circuit 561 amplifies the difference between the voltage value of the detection signal S5 and the voltage value of the detection signal S6 by, for example, 100 times, but is not limited to this.

[0094] One end of the resistor element 562 is connected to one output terminal of the amplifier circuit 561, and the other end is connected to a reference potential. One end of the resistor element 563 is connected to the other output terminal of the amplifier circuit 561, and the other end is connected to the reference potential.

[0095] The adder circuit 564 has one input terminal to which the amplified signal S7 is input, and the other input terminal to which a reference voltage Vr is input from a reference power supply 566. The adder circuit 564 outputs a control signal S9 according to the result of adding the voltage value of the amplified signal S7 and the voltage value of the reference voltage Vr.

[0096] The adder circuit 565 receives the amplified signal S8 at one input terminal and a reference voltage Vr from a reference power supply 566 at the other input terminal. The adder circuit 565 outputs a control signal S10 according to the result of adding the voltage value of the amplified signal S8 and the voltage value of the reference voltage Vr.

[0097] One end of the resistor 567 is connected to the output terminal of the adder circuit 564, and the other end is connected to the reference potential. One end of the resistor 568 is connected to the output terminal of the adder circuit 565, and the other end is connected to the reference potential.

[0098] One end of resistor 569 is connected to the output terminal of adder circuit 564, and the other end is connected to one end of capacitor 570. One end of capacitor 570 is connected to the other end of resistor 569, and the other end is connected to one end of resistor 571. One end of resistor 571 is connected to the other end of capacitor 570, and the other end is connected to a reference potential.

[0099] One end of resistor element 572 is connected to the output terminal of adder circuit 565, and the other end is connected to one end of capacitor 573. One end of capacitor 573 is connected to the other end of resistor element 572, and the other end is connected to one end of resistor element 574. One end of resistor element 574 is connected to the other end of capacitor 573, and the other end is connected to a reference potential.

[0100] One end of the resistor element 575 is connected to the other end of the resistor element 569, and the other end is connected to the input of the second resistance value switching circuit 14, and the control signal S9 is fed back to the resistor element 575. One end of the resistor element 576 is connected to the other end of the resistor element 572, and the other end is connected to the input of the first resistance value switching circuit 12, and the control signal S10 is fed back to the resistor element 575.

[0101] The feedback control circuit 56A feedback controls the first resistance value switching circuit 12 and the second resistance value switching circuit 14, thereby making it possible to bring the difference between the output signal S3 and the output signal S4 closer to a constant value, and to obtain a stable SSB backscatter signal.

[0102] [Backscatter signal] An example of a backscattering signal according to the second embodiment will be described with reference to Fig. 12. Fig. 12 is a diagram showing an example of a spectrum waveform of a backscattering signal according to the second embodiment. In Fig. 12, the horizontal axis indicates frequency [GHz], and the vertical axis indicates signal level [V].

[0103] FIG. 12 shows a spectrum waveform W2. The spectrum waveform W2 includes a high-frequency signal RF2, a USB signal US2, and an LSB signal LS2. The frequency of the high-frequency signal RF2 is 1.00 [GHz]. The frequency of the LSB signal LS2 is 0.999 [GHz]. The frequency of the USB signal US2 is 1.001 [GHz]. As shown in FIG. 12, the USB signal US2 is suppressed compared to the LSB signal LS2. The difference between the LSB signal LS2 and the USB signal US2 is about 32.2 [dB (decibels)]. That is, in the example shown in FIG. 12, a highly suppressed LSB signal is obtained.

[0104] Although the embodiments of the present disclosure have been described above, the present disclosure is not limited to the contents of these embodiments. The above-mentioned components include those that a person skilled in the art can easily imagine, those that are substantially the same, and those that are within the so-called equivalent range. Furthermore, the above-mentioned components can be appropriately combined. Furthermore, various omissions, substitutions, or modifications of the components can be made without departing from the gist of the above-mentioned embodiments. [Explanation of symbols]

[0105] 1 Transmission circuit 2 Antennas 10 Impedance Rotation Circuit 12 First resistance value switching circuit 14 Second resistance value switching circuit 20 Synthesis circuit 22 Inductor 24 Capacitor 26 Impedance conversion circuit 30 Monitor circuit 40 Resistance compensation circuit 50 Control circuit 52 Delay Circuit 54 Pulse Generation Circuit 56 Feedback control circuit 61, 62, 63, 64, 65, 66, 67, 68, 69 Switching elements 71, 72, 73, 74, 75, 76, 77, 78, 79 Resistance elements 81,82,83,84,85,86,87,88,89 Resistance circuit 91,92,93,94,95,96,97,98,99 Input terminals

Claims

1. A transmission circuit configured to be connected to an antenna, The transmission circuit includes: a first resistance value switching circuit connected to the antenna and configured to be able to switch a resistance value; a second resistance value switching circuit connected to the antenna, configured to be able to switch a resistance value, and connected in parallel with the first resistance value switching circuit; a delay circuit that delays an input signal by 90 degrees and inputs the delayed signal to the second resistance value switching circuit; a control unit configured to be able to switch the resistance values ​​of the first resistance value switching circuit and the second resistance value switching circuit; a synthesis circuit capable of controlling a reflection coefficient of the output terminal on the antenna side to rotate in a complex plane by synthesizing a first output signal output from the first resistance value switching circuit in response to the input signal and a second output signal output from the second resistance value switching circuit in response to the delayed signal.

2. 2. The transmission circuit according to claim 1, the first resistance value switching circuit and the second resistance value switching circuit each include a plurality of resistance elements each having a different resistance value, and a plurality of switch elements each connected to the plurality of resistance elements, The control unit controls the open / closed states of the plurality of switch elements to switch the resistance values ​​of the first resistance value switching circuit and the second resistance value switching circuit.

3. 3. The transmission circuit according to claim 2, The control unit is configured to be able to control a rotation direction of the reflection coefficient in a complex plane by controlling an opening / closing order of the plurality of switch elements.

4. 4. The transmission circuit according to claim 1, The synthesis circuit includes a resonant circuit having a capacitor and an inductor.

5. 5. The transmission circuit according to claim 4, an impedance transformation circuit having one end connected to the resonant circuit and the other end connected to the antenna; The transmission circuit, wherein the impedance conversion circuit is configured to convert the impedance of an output terminal on the antenna side.

6. 6. The transmission circuit according to claim 1, a first detection circuit for detecting the first output signal; a second detection circuit that detects the second output signal; The control unit is a feedback control unit configured to calculate a difference value between a first detection signal output from the first detection circuit and a second detection signal output from the second detection circuit, and to perform feedback control based on a calculation result of the difference value so that a difference between the first output signal and the second output signal falls within a predetermined range.

7. 7. The transmission circuit according to claim 6, the feedback control unit is configured to control at least one of a switch element provided at an output terminal of the first resistance value switching circuit and a switch element provided at an output terminal of the second resistance value switching circuit.

8. 8. The transmission circuit according to claim 6, a transmission circuit including a resistance correction circuit connected to the first resistance switching circuit and the second resistance switching circuit;

9. 9. The transmission circuit according to claim 8, the resistance value correction circuit includes a plurality of correction resistor elements each having a different resistance value, and a plurality of correction switch elements connected to each of the plurality of correction resistor elements, the feedback control unit is configured to control the plurality of correction switch elements based on signal levels of the first detection signal and the second detection signal to selectively connect the plurality of correction resistance elements to the first resistance value switching circuit and the second resistance value switching circuit.

10. A transmission circuit configured to be connected to an antenna, The transmission circuit includes: a first impedance switching circuit connected to the antenna and configured to be able to switch impedance; a second impedance switching circuit connected to the antenna, configured to be able to switch a resistance value, and connected in parallel with the first impedance switching circuit; a control unit configured to be able to switch the impedances of the first impedance switching circuit and the second impedance switching circuit; a first detection circuit that detects a first output signal output from the first impedance switching circuit; a second detection circuit that detects a second output signal output from the second impedance switching circuit; The control unit is a feedback control unit configured to calculate a difference value between a first detection signal output from the first detection circuit and a second detection signal output from the second detection circuit, and to perform feedback control based on a calculation result of the difference value so that a difference between the first output signal and the second output signal falls within a predetermined range.

11. 11. The transmission circuit according to claim 10, the feedback control unit is configured to control at least one of a switch element provided at an output terminal of the first impedance switching circuit and a switch element provided at an output terminal of the second impedance switching circuit.

12. 12. The transmission circuit according to claim 10, A transmission circuit including a resistance compensation circuit connected to the first impedance switching circuit and the second impedance switching circuit.

13. 13. The transmission circuit according to claim 12, the resistance value correction circuit includes a plurality of correction resistor elements each having a different resistance value, and a plurality of correction switch elements connected to each of the plurality of correction resistor elements, the feedback control unit is configured to control the plurality of correction switch elements based on signal levels of the first detection signal and the second detection signal to selectively connect the plurality of correction resistance elements to the first impedance switching circuit and the second impedance switching circuit.

Citation Information

Patent Citations

  • Wireless communication system, apparatus and method

    JP2005323223A