Solid state image pickup device

Abstract

To provide a solid-state image pickup device or semiconductor display device that improves the quality of the captured image.SOLUTION: By driving a camera using the global shutter method, the electric potential for controlling a charge accumulation operation can be shared by all pixels. Furthermore, if a plurality of photosensors connected to one wiring to which the output signal is given are a first photosensor group and a plurality of photosensors connected to another wiring to which the output signal is given are a second photosensor group, then the wiring that provides the first photosensor group with a potential or signal to control the charge accumulation operation, and the wiring that provides the second photosensor group with the potential or signal are tangential.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a solid-state imaging device having a photosensor in each pixel, and a semiconductor display device having a photosensor and a display element in each pixel.

Background Art

[0002] A photosensor using the amplification function of a MOS transistor, called a CMOS sensor, can be manufactured using a general-purpose CMOS process. Therefore, the manufacturing cost of a solid-state imaging device having a CMOS sensor in each pixel can be reduced, and a semiconductor display device in which a photosensor and a display element are integrated on the same substrate can be realized. In addition, since the CMOS sensor has a lower drive voltage than a CCD sensor, the power consumption of the solid-state imaging device can be kept low.

[0003] In a solid-state imaging device or a semiconductor display device using a CMOS sensor, a rolling shutter method is generally used in which a charge accumulation operation in a photodiode and a charge readout operation are sequentially performed for each row. However, in imaging by the rolling shutter method, the periods for performing the accumulation operation are different between the first row and the last row. Therefore, when a fast-moving subject is imaged by the rolling shutter method, distorted image data of the subject is formed.

[0004] Patent Document 1 below discloses a technique for correcting distortion of image data that occurs when imaging by the rolling shutter method using a CMOS sensor.

Prior Art Documents

Patent Documents

[0005] ​​​​​​​​​​​

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] By the way, in a solid-state imaging device using a CMOS sensor or a semiconductor display device, a wiring for supplying a power supply potential , or a signal potential is arranged in the pixel portion. Since this wiring has resistance, the farther a pixel is from the power supply potential supply source or the signal supply source, the greater the potential drop tends to be. Also, the greater the parasitic resistance generated in the resistance of the wiring, the contact portion, etc., the more likely a signal delay occurs. When a potential drop or a signal delay occurs in the wiring, the power supply potential supplied to the photosensor, or the signal potential varies within the pixel portion, and this potential variation is reflected in the potential of the signal output from the photosensor, resulting in a deterioration in the quality of the captured image.

[0007] Also, in order to eliminate the distortion of image data caused by the rolling shutter method, it is desirable to use the global shutter method employed in a solid-state imaging device using a CCD sensor in a solid-state imaging device using a CMOS sensor or a semiconductor display device. The global shutter method is a method in which the accumulation operation is performed simultaneously for all pixels, and by adopting the global shutter method, the distortion of image data can be eliminated. However, when using the global shutter method, since the accumulation operation is performed simultaneously for all pixels, depending on the current or voltage supply capacity of the drive circuit, the potential drop and signal delay in the wiring as described above are likely to occur significantly.

[0008] ​​​​​​​​​ In evaluating the performance of a solid-state imaging device or a semiconductor display device, low power consumption is one of the important points. In particular, in the case of portable electronic devices such as mobile phones, the high power consumption of the solid-state imaging device or the semiconductor display device leads to the demerit of shortening the continuous usage time, so low power consumption is required.

[0009] In view of the above problems, an object of the present invention is to provide a solid-state imaging device or a semiconductor display device that improves the quality of the captured image. Alternatively, an object of the present invention is to provide a solid-state imaging device or a semiconductor display device that can suppress power consumption.

[0010] When imaging is performed using the global shutter method, the charge accumulation operation is performed simultaneously for all pixels. Therefore, the potential supplied to the photodiode and the potential of the signal for controlling the switching of the transistor that holds the charge, etc., which are for controlling the charge accumulation operation, can be shared for all pixels. Thus, in a solid-state imaging device or a semiconductor display device according to an aspect of the present invention, when a plurality of photodetectors connected to one wiring to which an output signal is supplied are defined as a first photodetector group, and a plurality of photodetectors connected to another wiring to which an output signal is supplied are defined as a second photodetector group, a wiring for supplying the potential for controlling the charge accumulation operation to the first photodetector group and a wiring for supplying the above potential to the second photodetector group are connected. With the above configuration, the potential Prevent the potential and signals for driving from varying within the pixel section.

[0011] Also, in a solid-state imaging device or a semiconductor display device according to an aspect of the present invention, a backlight has a plurality of light sources that emit light of different colors, and field sequential drive (FS drive) for sequentially turning on the light sources may be performed. In this case, by performing a charge accumulation operation in each pixel during the period when each color light source is lit, image data corresponding to each color can be obtained. And by synthesizing the image data corresponding to each of the above colors, color image data can be obtained. Also, in a semiconductor display device, FS drive can be performed not only during imaging but also when displaying an image. Specifically, by sequentially turning on the light sources of each color and displaying the gradation corresponding to each color on the display element during the period when each color light source is lit, a color image can be displayed. In this case, as the display element, an element such as a liquid crystal element whose transmittance is controlled by an image signal is used. By using FS drive, it becomes unnecessary to provide a color filter for each pixel, and the utilization efficiency of light from the backlight can be increased. Also, since image data corresponding to each color or gradation display can be obtained with one pixel, high-definition image data can be obtained or a high-definition image can be displayed.

[0012]

[0013] When operating the backlight with FS drive, unlike the case of combining a single-color light source and a color filter, it is necessary to sequentially switch and emit the light sources of each color. Furthermore, the frequency at which the above light source switching is performed is higher than the frame frequency in the case of using a single-color light source.

[0013] ​​​It is necessary to set it. For example, when using a single-color light source, the frame frequency is 60 Hz and when FS driving is performed using light sources corresponding to each of red, green, and blue, the switching frequency of the light sources is about three times, i.e., about 180 Hz. Therefore, the period during which each color light source emits light is very short. However, in one aspect of the present invention, imaging is performed using the global shutter method so that the charge accumulation operation is performed simultaneously for all pixels. Therefore, the period until the accumulation operation is completed for all pixels can be made shorter than in the case of using the rolling shutter method That is, even if the period during which each color light source emits light becomes short by adopting FS driving, the accumulation operation for all pixels can be completed within the above period

[0014] In the case of a solid-state imaging device or a semiconductor display device using a CMOS sensor, when using the global shutter method, after the accumulation operation is performed simultaneously for all pixels, it is necessary to sequentially perform the readout operation for each row Therefore, the charge holding period during which the charge is held, from the end of the accumulation operation until the transition to the readout operation, is different for each row Therefore, if charge leakage occurs due to the off-current of the transistor, the amount of charge in each row varies according to the length of the above period, and thus image data of a subject with a changed gradation may be formed

[0015] Therefore, in a solid-state imaging device or a semiconductor display device according to one aspect of the present invention, an insulated gate field effect transistor (hereinafter simply referred to as a transistor) having an extremely small off-current may be used as a switching element for holding the charge accumulated in the photosensor The above transistor has a wider bandgap than a silicon semiconductor and a true carrier density that is​​​​​​​ It is characterized in that a semiconductor material having a lower bandgap than silicon is included in the channel formation region. By including a semiconductor material having the characteristics described above in the channel formation region, a transistor with an extremely small off-current and high breakdown voltage can be realized. Examples of such a semiconductor material include an oxide semiconductor having a bandgap about three times that of silicon. By using a transistor having the above configuration as a switching element, the leakage of charges during the charge holding period can be significantly reduced, and when the global shutter method is used, the change in gradation caused by the difference in the charge holding period depending on the row can be reduced. Furthermore, an oxide semiconductor (purified OS) that has been purified by reducing impurities such as moisture or hydrogen that act as electron donors (donors) and reducing oxygen vacancies is of the i-type (intrinsic semiconductor) or extremely close to the i-type. Therefore, a transistor using the above oxide semiconductor has the characteristic of an extremely small off-current. Specifically, for the purified oxide semiconductor, the measured value of the hydrogen concentration by secondary ion mass spectrometry (SIMS) is 5×10 / cm or less, preferably 5×10 / cm or less, more preferably 5×10 / cm or less, and even more preferably 1×10

[0016] / cm or less. Also, the carrier density of the oxide semiconductor film that can be measured by Hall effect measurement is 1×10 / cm or less. Note that the purified oxide semiconductor is of the i-type (intrinsic semiconductor) or extremely close to the i-type by reducing impurities such as moisture or hydrogen that act as electron donors (donors) and reducing oxygen vacancies. Therefore, a transistor using the above oxide semiconductor has the characteristic of an extremely small off-current. Specifically, for the purified oxide semiconductor, the measured value of the hydrogen concentration by secondary ion mass spectrometry (SIMS) is 5×10 / cm 19 / cm 3 or less, preferably 5×10 / cm 18 / cm 3 or less, more preferably 5×10 17 / cm 3 or less, and even more preferably 1×10 / cm 16 / cm 3 or less. Also, the carrier density of the oxide semiconductor film that can be measured by Hall effect measurement is 1×10 / cm 14 / cm 3Less than, preferably 1×10 1 2 / cm 3 Less than, more preferably 1×10 11 / cm 3 It is set to be less than. Further, the band gap of the oxide semiconductor is 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more. By using an oxide semiconductor film in which the concentration of impurities such as moisture or hydrogen is sufficiently reduced and the oxygen deficiency is also reduced, the off current of the transistor can be made small.

[0017] Here, the analysis of the hydrogen concentration in the oxide semiconductor film will be described. The measurement of the hydrogen concentration in the oxide semiconductor film is performed by SIMS. As is known in principle, it is difficult to accurately obtain data in the vicinity of the sample surface or in the vicinity of the laminated interface with a film of a different material by SIMS. Therefore, when analyzing the thickness direction distribution of the hydrogen concentration in the film by SIMS, in the range where the target film exists, the average value in the region where there is no extreme variation in the value and a substantially constant value can be obtained is adopted as the hydrogen concentration. Further, when the thickness of the film to be measured is small, there are cases where it is not possible to find a region where a substantially constant value can be obtained due to the influence of the hydrogen concentration in the adjacent film. In this case, the maximum or minimum value of the hydrogen concentration in the region where the film exists is adopted as the hydrogen concentration in the film. Furthermore, when there are no peak-shaped peaks having a maximum value or valley-shaped peaks having a minimum value in the region where the film exists, the value at the inflection point is adopted as the hydrogen concentration.

[0018] Specifically, the off current of a transistor using a highly purified oxide semiconductor film as an active layer ​​​​​​​​​​​This can be proven by various experiments. For example, even for a device with a channel width of 1×10 6 μ m and a channel length of 10 μm, when the voltage between the source electrode and the drain electrode (drain in voltage) is in the range of 1 V to 10 V, the off-current (the drain current when the voltage between the gate electrode and the source electrode is 0 V or less) is below the measurement limit of the semiconductor parameter analyzer, that is, a characteristic of 1×10 A or less can be obtained. In this case, it can be seen that the off-current density corresponding to the value obtained by dividing the off-current by the channel width of the transistor is 100 zA / μm -13 or less. Also, a circuit is used in which a capacitor element and a transistor are connected and the charge flowing into or flowing out of the capacitor element is controlled by the transistor to measure the off-current density. In this measurement, a highly purified oxide semiconductor film is used in the channel formation region of the transistor, and the off-current density of the transistor is measured from the change in the amount of charge per unit time of the capacitor element. As a result, when the voltage between the source electrode and the drain electrode of the transistor is 3 V, an off-current density as small as several tens of yA / μm can be obtained. Therefore, in the semiconductor device according to one aspect of the present invention, the off-current density of the transistor using the highly purified oxide semiconductor film as the active layer can be made 100 yA / μm or less, preferably 10 yA / μm or less, and more preferably 1 yA / μm or less depending on the voltage between the source electrode and the drain electrode. Therefore, the transistor using the highly purified oxide semiconductor film as the active layer has an off-current that is significantly smaller than that of a transistor using crystalline silicon.

[0019] ​​​​​​​​​​For example, as the oxide semiconductor, indium oxide, tin oxide, zinc oxide, binary metal oxides such as In-Zn system oxides, Sn-Zn system oxides, Al-Zn system oxides, Zn-Mg system oxides, Sn-Mg system oxides, In-Mg system oxides, In-Ga system oxides, ternary metal oxides such as In-Ga-Zn system oxides (also denoted as IGZO), In-Al-Zn system oxides, In-Sn-Zn system oxides, Sn-Ga-Zn system oxides, Al-Ga-Zn system oxides, Sn-Al-Zn system oxides, In-Hf-Zn system oxides, In-La-Zn system oxides, In-Ce-Zn system oxides, In-Pr-Zn system oxides, In-Nd-Zn system oxides, In-Sm-Zn system oxides, In-Eu-Zn system oxides, In-Gd-Zn system oxides, In-Tb-Zn system oxides, In-Dy-Zn system oxides, In-Ho-Zn system oxides, In-Er-Zn system oxides, In-Tm-Zn system oxides, In-Yb-Zn system oxides, In-Lu-Zn system oxides, quaternary metal oxides such as In-Sn-Ga-Zn system oxides, In-Hf-Ga-Zn system oxides, In-Al-Ga-Zn system oxides, In-Sn-Al-Zn system oxides, In-Sn-Hf-Zn system oxides, In-Hf-Al-Zn system oxides can be used. Note that, for example, the In-Ga-Zn system oxide means an oxide containing In, Ga, and Zn, and the ratio of In, Ga, and Zn is not limited. Also, other metal elements may be contained in addition to In, Ga, and Zn. Further, the above oxide semiconductor may contain silicon. oxides, Sn-Zn system oxides, Al-Zn system oxides, Zn-Mg system oxides, Sn-Mg system oxides, In-Mg system oxides, In-Ga system oxides, ternary metal oxides such as In-Ga-Zn system oxides (also denoted as IGZO), In-Al-Zn system oxides, In-Sn-Zn system oxides, Sn-Ga-Zn system oxides, Al-Ga-Zn system oxides, Sn-Al-Zn system oxides, In-Hf-Zn system oxides, In-La-Zn system oxides, In-Ce-Zn system oxides, In-Pr-Zn system oxides, In-Nd-Zn system oxides such as In-Sm-Zn system oxides, In-Eu-Zn system oxides, In-Gd-Zn system oxides, In-Tb-Zn system oxides, In-Dy-Zn system oxides, In-Ho-Zn system oxides, I n-Er-Zn system oxides, In-Tm-Zn system oxides, In-Yb-Zn system oxides, In -Lu-Zn system oxides, quaternary metal oxides such as In-Sn-Ga-Zn system oxides, I n-Hf-Ga-Zn system oxides, In-Al-Ga-Zn system oxides, In-Sn-Al- Zn system oxides, In-Sn-Hf-Zn system oxides, In-Hf-Al-Zn system oxides can be used. Note that, for example, the In-Ga-Zn system oxide means an oxide containing In, Ga, and Zn, and the ratio of In, Ga, and Zn is not limited. Also, other metal elements may be contained in addition to In, Ga, and Zn. Further, the above oxide semiconductor may contain silicon. For example, the In-Ga-Zn system oxide means an oxide containing In, Ga, and Zn, and the ratio of In, Ga, and Zn is not limited. Also, other metal elements may be contained in addition to In, Ga, and Zn. Further, the above oxide semiconductor may contain silicon. For example, the In-Ga-Zn system oxide means an oxide containing In, Ga, and Zn, and the ratio of In, Ga, and Zn is not limited. Also, other metal elements may be contained in addition to In, Ga, and Zn. Further, the above oxide semiconductor may contain silicon. For example, the In-Ga-Zn system oxide means an oxide containing In, Ga, and Zn, and the ratio of In, Ga, and Zn is not limited. Also, other metal elements may be contained in addition to In, Ga, and Zn. Further, the above oxide semiconductor may contain silicon. For example, the In-Ga-Zn system oxide means an oxide containing In, Ga, and Zn, and the ratio of In, Ga, and Zn is not limited. Also, other metal elements may be contained in addition to In, Ga, and Zn. Further, the above oxide semiconductor may contain silicon.

[0020] Alternatively, the oxide semiconductor is InMO 3 (ZnO) m (m>0, m is not necessarily a natural number It can be expressed as (none). Here, M is selected from Ga, Fe, Mn, and Co indicating one or more metal elements. As the oxide semiconductor, In 2 SnO 5 (ZnO ) n (n > 0, and n is an integer) may be used.

Advantages of the Invention

[0021] In one aspect of the present invention, among a plurality of wirings that supply potentials to the pixels in each row or each column, at least two of the plurality of wirings that supply potentials to the photodiodes, or the plurality of wirings that supply potentials of signals for controlling the switching of the transistors with extremely small off-currents are electrically connected to each other. With the above configuration, it is possible to suppress the potential drop and signal delay due to the wiring resistance, and prevent the potential of the above potential or the signal from varying within the pixel portion. As a result, it is possible to prevent the potential of the signal output from the photosensor from varying, and improve the quality of the captured image.

[0022] Alternatively, in one aspect of the present invention, by using the global shutter method, in addition to the above configuration FS driving can be combined. By using FS driving, the power consumption of the solid-state imaging device or the semiconductor display device can be reduced.

[0023] Alternatively, in one aspect of the present invention, by using a transistor with an extremely small off-current as a switching element for holding the charges accumulated in the photosensor, even when imaging is performed using the global shutter method, the change in gradation due to different charge holding periods can be significantly suppressed, and the quality of the captured image can be improved. ​​​​​​​

Brief Description of the Drawings

[0024]

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Best Mode for Carrying Out the Invention

[0025] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and those skilled in the art can easily understand that its form and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention is not to be construed as limited to the description of the embodiments shown below.

[0026] (Embodiment 1) With reference to FIG. 1, the subsequent configuration of the photosensor included in the solid-state imaging device or the semiconductor display device of the present invention will be described.

[0027] FIG. 1 is an example of a circuit diagram showing the connection configuration of a plurality of photosensors 101 in a pixel portion. In FIG. 1, the photosensors 101 included in each pixel are arranged in a matrix. Each photosensor 101 has a photodiode 102 and an amplifier circuit 103. The photodiode 102 is a photoelectric conversion element having the property of generating a current when light hits a semiconductor junction. The amplifier circuit 103 is a circuit that amplifies the current obtained when the photodiode 102 receives light, or holds the charge accumulated by the above current.

[0028] The configuration of the amplifier circuit 103 only needs to be able to amplify the current generated in the photodiode 102, and any form can be adopted. However, at least the amplifier circuit 103 has a transistor 104 that functions as a switching element. The above switching element controls the supply of the above current into the amplifier circuit 103.

[0029] ​ In one aspect of the present invention, the transistor 104 that functions as the switching element may include a semiconductor in the channel formation region thereof that has a wider bandgap and a lower intrinsic carrier density than silicon semiconductor. As an example of the semiconductor, compound semiconductors such as silicon carbide ( SiC), gallium nitride (GaN), etc., and oxide semiconductors such as zinc oxide (ZnO) which are metal oxides can be applied. Among these, oxide semiconductors can be fabricated by sputtering method or wet method (such as printing method), and have advantages such as excellent mass productivity. Also, compound semiconductors such as silicon carbide and gallium nitride must be single crystals. To obtain single crystal materials, crystal growth at a temperature significantly higher than the process temperature of oxide semiconductors, or epitaxial growth on special substrates is required. On the other hand, oxide semiconductors can be film-formed even at room temperature, so film formation on silicon wafers that are easily available or on glass substrates that can handle large sizes at low cost is possible, and the mass productivity is high. Also, semiconductor elements made of oxide semiconductors can be stacked on integrated circuits using ordinary semiconductor materials such as silicon and gallium. Therefore, among the above-mentioned wide bandgap semiconductors, oxide semiconductors in particular have the merit of high mass productivity. Also, even when trying to obtain a crystalline oxide semiconductor to improve the performance of the transistor (for example, field effect mobility), a crystalline oxide semiconductor can be easily obtained by heat treatment at 2 00°C to 800°C. In the following description, as an example, the case of using an oxide semiconductor having the above advantages as a semiconductor with a large bandgap is given. oxide semiconductor is taken as an example. oxide semiconductor is taken as an example. oxide semiconductor is taken as an example. oxide semiconductor is taken as an example. oxide semiconductor is taken as an example. oxide semiconductor is taken as an example. oxide semiconductor is taken as an example. oxide semiconductor is taken as an example.

[0030] oxide semiconductor is taken as an example. oxide semiconductor is taken as an example.

[0031] By including a semiconductor material having the above-mentioned characteristics in the channel formation region, the off-current is extremely It is possible to realize a transistor 104 having the lowest possible current and high withstand voltage. By using the transistor 104 having the above configuration as a switching element, This makes it possible to prevent leakage of the charge accumulated in 103.

[0032] The active layer of the transistor 104 is made of a semiconductor having a large band gap, such as an oxide semiconductor. Since the use of the above makes it possible to more effectively prevent leakage of the electric charge accumulated in the amplifier circuit 103, Although it is preferable, the present invention is not necessarily limited to this configuration. Amorphous, microcrystalline, polycrystalline, or single-crystalline silicon or gel other than an oxide semiconductor Even if semiconductors such as manganese are used, it is not possible to operate them using the global shutter method. It is possible.

[0033] Unless otherwise specified, in this specification, the off-state current is In this case, the drain electrode is set at a higher potential than the source and gate electrodes. When the potential of the gate electrode is 0 or less with respect to the potential of the source electrode, The off-state current in this specification refers to the current that flows between the drain electrode and the p In a channel type transistor, the drain electrode is lower than the source electrode and the gate electrode. When the potential of the gate electrode is set to a reference potential, the potential of the gate electrode is less than 0. This refers to the current that flows between the source and drain electrodes when the potential is above the threshold.

[0034] The source electrode and the drain electrode of the transistor are connected to each other. The naming convention changes depending on the potential difference applied to the pole. Generally, in an n-channel type transistor, the electrode to which a low potential is applied is called the source electrode, and the electrode to which a high potential is applied is called the drain electrode. Also, in a p-channel type transistor, the electrode to which a low potential is applied is called the drain electrode, and the electrode to which a high potential is applied is called the source electrode . Hereinafter, either one of the source electrode and the drain electrode is referred to as the first terminal, and the other is referred to as the second terminal, and the connection relationship between the photodiode 102 and the transistor 104 included in the photosensor 101 will be described.

[0035] Specifically, in FIG. 1, the anode of the photodiode 102 is connected to the wiring PR. Also, the cathode of the photodiode 102 is connected to the first terminal of the transistor 104. Since the second terminal of the transistor 104 is connected to other semiconductor elements in the amplifier circuit 103, the connection destination of the second terminal of the transistor 104 is different depending on the configuration within the amplifier circuit 103. Also, the gate electrode of the transistor 104 is connected to the wiring TX. A signal potential for controlling the switching of the transistor 104 is applied to the wiring TX. Also, the photosensor 101 is connected to the wiring OUT. A potential of an output signal output from the amplifier circuit 10 3 is applied to the wiring OUT.

[0036] Note that in this specification, "connection" means electrical connection, which corresponds to a state where current, voltage, or potential can be supplied, or transmitted. Therefore, the connected state does not necessarily refer to a directly continuous state, but rather means that current, voltage, or potential can be supplied or transmitted through circuit elements such as wiring, resistors, diodes, and transistors. ​​​​​ Even a state of being indirectly connected is included in that scope.

[0037] Also, even when components that are independent on the circuit diagram are connected, actually for example, when a part of the wiring functions as an electrode, one conductive film may have the functions of a plurality of components. In this specification, connection includes even such a case where one conductive film has the functions of a plurality of components.

[0038] In FIG. 1, a case where the wiring PR, the wiring TX, and the wiring OUT are connected to each photosensor 101 is illustrated, but in one aspect of the present invention, the number of wires that each photosensor 101 has is not limited to this. In addition to the above-mentioned wiring, a wiring to which a power supply potential is applied, a wiring to which a signal potential for resetting the amount of charge held in the amplification circuit 103 is applied

[0039] may be connected to each photosensor 101. In one aspect of the present invention, as shown in FIG. 1, one wiring OUT is connected to a plurality of photosensors 1 01, and the plurality of photosensors 101 connected to one wiring OUT are not connected to other wiring OUT and are electrically separated. And, if the plurality of photosensors 101 connected to one wiring OUT are defined as a first photosensor group, and the plurality of photosensors 101 connected to other wiring OU T are defined as a second photosensor group, then in one aspect of the present invention, exists.

[0040] In one aspect of the present invention, with the above configuration, it is possible to suppress the potential drop due to the resistance of the wiring PR or the wiring TX and the delay of the signal. As a result, it is possible to prevent the potential applied to the anode of the photodiode 102 or the potential of the signal that controls the switching of the transistor 104 for holding the charge from varying within the pixel portion. Therefore, it is possible to prevent the potential of the signal output from the photosensor 101 from varying, and to improve the quality of the captured image. is applied, or the potential of the signal that controls the switching of the transistor 104 for holding the charge can be prevented from varying within the pixel portion. Therefore, it is possible to prevent the potential of the signal output from the photosensor 101 from varying, and to improve the quality of the captured image. In addition, in FIG. 1, the configuration of the photosensor 101 having only one transistor 104 in which the amplifier circuit 103 functions as a switching element is shown, but the present invention is not limited to this configuration. In one aspect of the present invention, a configuration in which one transistor functions as one switching element is shown, but a plurality of transistors may function as one switching element. When a plurality of transistors function as one switching element, the plurality of transistors may be connected in parallel, may be connected in series, or may be connected in a combination of series and parallel. In addition, in FIG. 1, the configuration of the photosensor 101 having only one transistor 104 in which the amplifier circuit 103 functions as a switching element is shown, but the present invention is not limited to this configuration. In one aspect of the present invention, a configuration in which one transistor functions as one switching element is shown, but a plurality of transistors may function as one switching element. When a plurality of transistors function as one switching element, the plurality of transistors may be connected in parallel, may be connected in series, or may be connected in a combination of series and parallel. In the present specification, the state in which transistors are connected in series means, for example, a state in which only one of the first terminal and the second terminal of the first transistor is connected to only one of the first terminal and the second terminal of the second transistor. Also, the state in which transistors are connected in parallel means that the first terminal of the first transistor is connected to the first terminal of the second transistor, and the second terminal of the first transistor is connected to the second terminal of the second transistor. In the present specification, the state in which transistors are connected in series means, for example, a state in which only one of the first terminal and the second terminal of the first transistor is connected to only one of the first terminal and the second terminal of the second transistor. Also, the state in which transistors are connected in parallel means that the first terminal of the first transistor is connected to the first terminal of the second transistor, and the second terminal of the first transistor is connected to the second terminal of the second transistor.

[0041] In addition, in FIG. 1, the configuration of the photosensor 101 having only one transistor 104 in which the amplifier circuit 103 functions as a switching element is shown, but the present invention is not limited to this configuration. In one aspect of the present invention, a configuration in which one transistor functions as one switching element is shown, but a plurality of transistors may function as one switching element. When a plurality of transistors function as one switching element, the plurality of transistors may be connected in parallel, may be connected in series, or may be connected in a combination of series and parallel. In addition, in FIG. 1, the configuration of the photosensor 101 having only one transistor 104 in which the amplifier circuit 103 functions as a switching element is shown, but the present invention is not limited to this configuration. In one aspect of the present invention, a configuration in which one transistor functions as one switching element is shown, but a plurality of transistors may function as one switching element. When a plurality of transistors function as one switching element, the plurality of transistors may be connected in parallel, may be connected in series, or may be connected in a combination of series and parallel. In one aspect of the present invention, a configuration in which one transistor functions as one switching element is shown, but a plurality of transistors may function as one switching element. When a plurality of transistors function as one switching element, the plurality of transistors may be connected in parallel, may be connected in series, or may be connected in a combination of series and parallel. In one aspect of the present invention, a configuration in which one transistor functions as one switching element is shown, but a plurality of transistors may function as one switching element. When a plurality of transistors function as one switching element, the plurality of transistors may be connected in parallel, may be connected in series, or may be connected in a combination of series and parallel. In the case where a plurality of transistors function as one switching element, the plurality of transistors may be connected in parallel, may be connected in series, or may be connected in a combination of series and parallel. In the case where a plurality of transistors function as one switching element, the plurality of transistors may be connected in parallel, may be connected in series, or may be connected in a combination of series and parallel. In the case where a plurality of transistors function as one switching element, the plurality of transistors may be connected in parallel, may be connected in series, or may be connected in a combination of series and parallel.

[0042] In the present specification, the state in which transistors are connected in series means, for example, a state in which only one of the first terminal and the second terminal of the first transistor is connected to only one of the first terminal and the second terminal of the second transistor. Also, the state in which transistors are connected in parallel means that the first terminal of the first transistor is connected to the first terminal of the second transistor, and the second terminal of the first transistor is connected to the second terminal of the second transistor. In the present specification, the state in which transistors are connected in series means, for example, a state in which only one of the first terminal and the second terminal of the first transistor is connected to only one of the first terminal and the second terminal of the second transistor. Also, the state in which transistors are connected in parallel means that the first terminal of the first transistor is connected to the first terminal of the second transistor, and the second terminal of the first transistor is connected to the second terminal of the second transistor. In the present specification, the state in which transistors are connected in series means, for example, a state in which only one of the first terminal and the second terminal of the first transistor is connected to only one of the first terminal and the second terminal of the second transistor. Also, the state in which transistors are connected in parallel means that the first terminal of the first transistor is connected to the first terminal of the second transistor, and the second terminal of the first transistor is connected to the second terminal of the second transistor. In the present specification, the state in which transistors are connected in series means, for example, a state in which only one of the first terminal and the second terminal of the first transistor is connected to only one of the first terminal and the second terminal of the second transistor. Also, the state in which transistors are connected in parallel means that the first terminal of the first transistor is connected to the first terminal of the second transistor, and the second terminal of the first transistor is connected to the second terminal of the second transistor. In the present specification, the state in which transistors are connected in series means, for example, a state in which only one of the first terminal and the second terminal of the first transistor is connected to only one of the first terminal and the second terminal of the second transistor. Also, the state in which transistors are connected in parallel means that the first terminal of the first transistor is connected to the first terminal of the second transistor, and the second terminal of the first transistor is connected to the second terminal of the second transistor. It means a continuous state.

[0043] Also, in FIG. 1, when the transistor 104 has a gate electrode only on one side of the active layer is shown. When the transistor 104 has a pair of gate electrodes sandwiching the active layer a signal for controlling switching is applied to one of the gate electrodes, the other gate electrode may be in a floating state electrically insulated, or may be in a state where a potential is supplied from another source. In the latter case, the same height of potential may be applied to the pair of electrodes, or a fixed potential such as ground may be applied only to the other gate electrode. By controlling the height of the potential applied to the other gate electrode, the threshold voltage of the transistor 104 can be controlled. 104 can be controlled.

[0044] Next, an example of a specific configuration of the photosensor 101 will be described. In FIG. 2(A), an example of the photosensor 101 is shown in a circuit diagram.

[0045] The photosensor 101 shown in FIG. 2(A) has a transistor 105 and a transistor 106 in addition to the transistor 104 in the amplifier circuit 103. The transistor 105 has its current value or resistance value between its first and second terminals determined according to the potential applied to the second terminal of the transistor 104. Also, the transistor 106 functions as a switching element for supplying the potential of the output signal determined by the above current value or resistance value to the wiring OUT. has its current value or resistance value between its first and second terminals determined according to the potential applied to the second terminal of the transistor 104. Also, the transistor 106 functions as a switching element for supplying the potential of the output signal determined by the above current value or resistance value to the wiring OUT. has its current value or resistance value between its first and second terminals determined according to the potential applied to the second terminal of the transistor 104. Also, the transistor 106 functions as a switching element for supplying the potential of the output signal determined by the above current value or resistance value to the wiring OUT. has its current value or resistance value between its first and second terminals determined according to the potential applied to the second terminal of the transistor 104. Also, the transistor 106 functions as a switching element for supplying the potential of the output signal determined by the above current value or resistance value to the wiring OUT. functions.

[0046] Specifically, in FIG. 2(A), the second terminal of the transistor 104 is the gate of the transistor 105 It is connected to the gate electrode. The first terminal of the transistor 105 is connected to the wiring VR to which the high-level power supply potential VD is applied. The second terminal of the transistor 105 is connected to the first terminal of the transistor 106. The second terminal of the transistor 106 is connected to the wiring OUT. The gate electrode of the transistor 106 is connected to the wiring SE, and the potential of the signal for controlling the switching of the transistor 106 is applied to the wiring SE. In FIG. 2(A), the node where the second terminal of the transistor 104 and the gate electrode of the transistor 105 are connected is shown as the node FD.

[0047] The amount of charge accumulated at the node FD determines the current value or resistance value between the first and second terminals of the transistor 105. In addition, by applying the potential of the signal for controlling the switching of the transistor 106, the potential of the output signal emitted from the second terminal of the transistor 106 is determined. To more reliably hold the charge at the node FD, a holding capacitor may be connected to the node FD. In FIG. 2(A), for the transistors 105 and 106 that constitute the amplifier circuit 103 other than the transistor 104, an oxide semiconductor film may be used for their active layers. Alternatively, for the active layers of the transistors 104, 105, and 106, semiconductors such as amorphous, microcrystalline, polycrystalline, or single-crystalline silicon or germanium other than the oxide semiconductor may be used. By using an oxide semiconductor film for the active layers of all the transistors in the photosensor 101, the process can be simplified.

[0048] It is possible. Further, in the active layers of the transistor 105 and the transistor 106, for example, a semiconductor material with higher mobility than an oxide semiconductor, such as polycrystalline or single-crystalline silicon, is used to enable high-speed reading of image data from the photosensor 101. By using a semiconductor material that can obtain higher mobility than an oxide semiconductor, such as polycrystalline or single-crystalline silicon, high-speed reading of image data from the photosensor 101 can be achieved. It can be done.

[0049] FIG. 2(B) shows, as an example, the configuration of a pixel portion having the photosensor 101 shown in FIG. 2(A). It is shown.

[0050] In FIG. 2(B), a plurality of photosensors 101 are arranged in a matrix. Each column of photosensors 101 is connected to any one of a plurality of wirings PR (denoted as wiring PR1 to wiring PRx), any one of a plurality of wirings TX (denoted as wiring TX1 to wiring TXx), any one of a plurality of wirings OUT (denoted as wiring OUT1 to wiring OUTx), and any one of a plurality of wirings VR (denoted as wiring VR1 to wiring VRx). Also, each row of photosensors 101 is connected to any one of a plurality of wirings SE (denoted as wiring SE1 to wiring SEy). Each photosensor 101 in each column is connected to any one of a plurality of wirings PR (denoted as wiring PR1 to wiring PRx), any one of a plurality of wirings TX (denoted as wiring TX1 to wiring TXx), any one of a plurality of wirings OUT (denoted as wiring OUT1 to wiring OUTx), and any one of a plurality of wirings VR (denoted as wiring VR1 to wiring VRx). One of them, and each photosensor 101 in each row is connected to any one of a plurality of wirings SE (denoted as wiring SE1 to wiring SEy). In FIG. 2(B), the plurality of photosensors 101 connected to the wiring OUTi (where i is any one of 1 to x) and the wiring VRi (where i is any one of 1 to x) are not connected to the wiring OUTj (where j is other than i and is any one of 1 to x) and the wiring VRj (where j is other than i and is any one of 1 to x), and are electrically separated. Then, the plurality of photosensors 101 connected to the wiring OUTi and the wiring VRi are regarded as the first photosensor group, and the plurality of photosensors 101 connected to the wiring OUTj and the wiring VRj are regarded as the second photosensor group. It is connected to one of them. Also, in FIG. 2(B), the plurality of photosensors 101 connected to the wiring OUTi (i is any one of 1 to x) and the wiring VRi (i is any one of 1 to x) are not connected to the wiring OUTj (j is other than i and is any one of 1 to x) and the wiring VRj (j is other than i and is any one of 1 to x), and are electrically separated. And the plurality of photosensors 101 connected to the wiring OUTi and the wiring VRi are regarded as the first photosensor group, and the plurality of photosensors 101 connected to the wiring OUTj and the wiring VRj are regarded as the second photosensor group. It is connected to one of them.

[0051] Also, in FIG. 2(B), the plurality of photosensors 101 connected to the wiring OUTi (i is any one of 1 to x) and the wiring VRi (i is any one of 1 to x) are not connected to the wiring OUTj (j is other than i and is any one of 1 to x) and the wiring VRj (j is other than i and is any one of 1 to x), and are electrically separated. And the plurality of photosensors 101 connected to the wiring OUTi and the wiring VRi are regarded as the first photosensor group, and the plurality of photosensors 101 connected to the wiring OUTj and the wiring VRj are regarded as the second photosensor group. The plurality of photosensors 101 connected to the wiring OUTj (j is other than i and is any one of 1 to x) and the wiring VRj (j is other than i and is any one of 1 to x) are not connected to the wiring OUTi and the wiring VRi, and are electrically separated. And the plurality of photosensors 101 connected to the wiring OUTi and the wiring VRi are regarded as the first photosensor group, and the plurality of photosensors 101 connected to the wiring OUTj and the wiring VRj are regarded as the second photosensor group. The plurality of photosensors 101 connected to the wiring OUTi and the wiring VRi are regarded as the first photosensor group, and the plurality of photosensors 101 connected to the wiring OUTj and the wiring VRj are regarded as the second photosensor group. The plurality of photosensors 101 connected to the wiring OUTj and the wiring VRj are regarded as the second photosensor group. ​When it comes to the sensor group, in Fig. 2(B), the wiring PRi connected to the first photosensor group is connected to the wiring PRj connected to the second photosensor group. Alternatively, the wiring TXi connected to the first photosensor group is connected to the wiring TXj connected to the second photosensor group.

[0052] With the above configuration, similar to the case of Fig. 1, it is possible to suppress the potential drop due to the resistance of the wiring PR and the wiring TX and the signal delay. As a result, the potential applied to the anode of the photodiode 102, or the potential of the signal that controls the switching of the transistor 104 for holding the charge, can be prevented from varying within the pixel section. Therefore, it is possible to prevent the potential of the signal output from the photosensor 101 from varying, and the quality of the captured image can be improved.

[0053] Next, an example of the operation of the photosensor 101 shown in Fig. 2(A) and Fig. 2(B) will be described.

[0054] First, the operation of each photosensor 101 will be described. In Fig. 3, a timing chart of the various potentials applied to the photosensor 101 shown in Fig. 2(A) and Fig. 2(B) is shown as an example.

[0055] In the timing chart shown in Fig. 3, for the purpose of clearly explaining the operation of the photosensor 101, it is assumed that the wiring TX, the wiring SE, and the wiring PR are given either a high-level or a low-level potential. Specifically, it is assumed that the wiring TX is given a high-level potential HTX and a low-level potential LTX, and the wiring SE is given a Assume that a potential LSE of a certain level is applied, and the wiring PR is supplied with a high-level potential HPR and a low-level potential LPR.

[0056] First, at time T1, the potential of the wiring TX is changed from the potential LTX to the potential HTX. When the potential of the wiring TX reaches the potential HTX, the transistor 104 turns on. Note that at time T 1, the potential LSE is applied to the wiring SE, and the potential LPR is applied to the wiring PR, and they are in this state.

[0057] Next, at time T2, the potential of the wiring PR is changed from the potential LPR to the potential HPR. . Also, at time T2, the potential of the wiring TX remains at the potential HTX, and the potential of the wiring SE remains at the potential LSE. Therefore, since the potential HPR of the wiring PR is applied to the node FD, the amount of charge held in the node FD is reset.

[0058] Next, at time T3, the potential of the wiring PR is changed from the potential HPR to the potential LPR. Until immediately before time T3, the potential of the node FD is maintained at the potential HPR. Therefore, when the potential of the wiring PR reaches the potential LPR, a reverse bias voltage is applied to the photodiode 102. And when light is incident on the photodiode 102 in a state where a reverse bias voltage is applied to the photodiode 102, a current flows from the cathode to the anode of the photodiode 102. The value of the above current changes according to the intensity of the light. That is, the higher the intensity of the light incident on the photodiode 102, the higher the above current value, and the greater the outflow of charge from the node FD. Conversely, when the intensity of the light incident on the photodiode 102 is low, the lower the intensity of the light incident on the photodiode 102, the lower the above current value, and the smaller the outflow of charge from the node FD. And the smaller the outflow of charge from the node FD. The current value becomes lower accordingly, and the outflow of charge from node FD also becomes smaller. Therefore, the potential of node FD changes more significantly as the light intensity is higher, and changes less as the light intensity is lower.

[0059] Next, at time T4, when the potential of wiring TX is changed from potential HTX to potential LTX , transistor 104 turns off. Therefore, the movement of charge from node FD to photodiode 102 stops, and the potential of node FD is determined.

[0060] Next, at time T5, when the potential of wiring SE is changed from potential LSE to potential HSE , transistor 106 turns on. Then, according to the potential of node FD, charge moves from wiring VR to wiring OUT.

[0061] Next, at time T6, when the potential of wiring SE is changed from potential HSE to potential LSE , the movement of charge from wiring VR to wiring OUT stops, and the potential of wiring OUT is determined. This potential of wiring OUT corresponds to the potential of the output signal of photosensor 101. And the potential of the output signal contains the image data of the photographed subject.

[0062] The above series of operations can be classified into a reset operation, an accumulation operation, and a readout operation. That is, the operation from time T2 to time T3 is the reset operation, the operation from time T3 to time T4 is the accumulation operation, and the operation from time T5 to time T6 is the readout operation. By performing the reset operation, the accumulation operation, and the readout operation, the acquisition of image data can be performed.

[0063] Also, during the period from the end of the accumulation operation to the start of the readout operation, that is, from time T The period from time T4 to time T5 is the charge holding period during which charge is held at node FD. Correspondingly. In one aspect of the present invention, in order to operate the pixel section using the global shutter method, the length of the charge holding period varies depending on the pixels in each row. The reason will be described below. Explain.

[0064] First, an example of driving the pixel section using the global shutter method will be described. In FIG. 4, as an example, a timing chart of the potentials applied to wiring TX1 to wiring TXx and wiring SE1 to wiring SEy in the pixel section shown in FIG. 2(B) is shown. Shown.

[0065] In the timing chart shown in FIG. 4, the reset operation and the accumulation operation performed from time T2 to time T4 are performed in parallel in all the photosensors 101. Therefore, the potentials of the wiring TX1 to the wiring TXx change from the potential LTX to the potential HTX all at once at time T1, and change from the potential HTX to the potential LTX all at once at time T4. In FIG. 4, the period during which the reset operation and the accumulation operation are performed is shown as the exposure period 300. Shown.

[0066] Also, in the timing chart shown in FIG. 4, the readout operation performed from time T5 to time T6 is performed in order for each row of the photosensors 101. That is, the timings of time T5 and time T6 differ for each row of the photosensors 101. Specifically, the potential of the wiring SE1 changes from the potential LSE to the potential HSE, and then after changing from the potential HSE to the potential LSE, the potential of the wiring S E2 to the wiring SEy also changes in the same manner in order. In FIG. 4, the period during which the readout operation is performed is shown as the readout period 301. Shown.

[0067] As can be seen from FIG. 4, when operating the pixel portion in the global shutter method, the reset operation and the accumulation operation are performed simultaneously for all pixels, so the timing at which the exposure period 300 ends is the same for all pixels However, since the readout operation is performed for each row of the photosensor, the timing at which the readout period 301 starts is different for each row of the photosensor. Therefore, the charge holding period 302 from the end of the exposure period 30 0 until the start of the readout period 301 has different lengths for each row of the photosensor, and the charge holding period 3 02 in the photosensor of the last row is the longest.

[0068] When imaging an image with a uniform number of gradations, ideally, output signals having the same potential height are obtained from all photosensors. However, when the length of the charge holding period 302 is different for each row of the photosensor, the charge accumulated in the node FD leaks over time and the potential of the output signal of the photosensor becomes different for each row, and image data with a different number of gradations for each row is obtained.

[0069] However, in one aspect of the present invention, a transistor 104 with an extremely small off-current may be used as a switching element for holding the charge accumulated in the photosensor 101, specifically, the charge accumulated in the node FD. In this case, even when imaging is performed using the global shutter method, the change in the gradation of the image data due to the different charge holding periods can be significantly suppressed, and the quality of the captured image can be improved.

[0070] In the case of a solid-state imaging device, imaging can also be performed using external light. For example, in the case of a close-contact type ​​​​It is also possible to perform imaging by using the light of the backlight instead of external light, like an area sensor. And, in one aspect of the present invention, when using a backlight, the backlight may be operated by FS driving to obtain color image data. In FS driving, image data corresponding to a plurality of colors are obtained respectively, and color image data can be obtained by additive color mixing using these plurality of image data. And, in one aspect of the present invention, when using a backlight, the backlight may be operated by FS driving to obtain color image data. In FS driving, image data corresponding to a plurality of colors are obtained respectively, and color image data can be obtained by additive color mixing using these plurality of image data. And, in one aspect of the present invention, when using a backlight, the backlight may be operated by FS driving to obtain color image data. In FS driving, image data corresponding to a plurality of colors are obtained respectively, and color image data can be obtained by additive color mixing using these plurality of image data. And, in one aspect of the present invention, when using a backlight, the backlight may be operated by FS driving to obtain color image data. In FS driving, image data corresponding to a plurality of colors are obtained respectively, and color image data can be obtained by additive color mixing using these plurality of image data.

[0071] Using FIG. 5, the operation of the light source and the operation of the pixel section when the backlight is operated by FS driving in the solid-state imaging device will be described. In FIG. 5, the lighting periods and extinction periods of three light sources respectively corresponding to red (R), green (G), and blue (B), and the time changes of the potentials of wiring TX, wiring PR, and wiring SE are shown. Using FIG. 5, the operation of the light source and the operation of the pixel section when the backlight is operated by FS driving in the solid-state imaging device will be described. In FIG. 5, the lighting periods and extinction periods of three light sources respectively corresponding to red (R), green (G), and blue (B), and the time changes of the potentials of wiring TX, wiring PR, and wiring SE are shown. Using FIG. 5, the operation of the light source and the operation of the pixel section when the backlight is operated by FS driving in the solid-state imaging device will be described. In FIG. 5, the lighting periods and extinction periods of three light sources respectively corresponding to red (R), green (G), and blue (B), and the time changes of the potentials of wiring TX, wiring PR, and wiring SE are shown. Using FIG. 5, the operation of the light source and the operation of the pixel section when the backlight is operated by FS driving in the solid-state imaging device will be described. In FIG. 5, the lighting periods and extinction periods of three light sources respectively corresponding to red (R), green (G), and blue (B), and the time changes of the potentials of wiring TX, wiring PR, and wiring SE are shown.

[0072] Note that, in FIG. 5, the case where the backlight has a light source that emits red (R) light, a light source that emits green (G) light, and a light source that emits blue (B) light will be described as an example, but the type of light source that the backlight has is not limited to the above configuration. Also, in FIG. 5, the solid-state imaging device having the configuration shown in FIGS. 2(A) and 2(B) will be described as an example, and its operation will be described. Note that, in FIG. 5, the case where the backlight has a light source that emits red (R) light, a light source that emits green (G) light, and a light source that emits blue (B) light will be described as an example, but the type of light source that the backlight has is not limited to the above configuration. Also, in FIG. 5, the solid-state imaging device having the configuration shown in FIGS. 2(A) and 2(B) will be described as an example, and its operation will be described. Note that, in FIG. 5, the case where the backlight has a light source that emits red (R) light, a light source that emits green (G) light, and a light source that emits blue (B) light will be described as an example, but the type of light source that the backlight has is not limited to the above configuration. Also, in FIG. 5, the solid-state imaging device having the configuration shown in FIGS. 2(A) and 2(B) will be described as an example, and its operation will be described. Note that, in FIG. 5, the case where the backlight has a light source that emits red (R) light, a light source that emits green (G) light, and a light source that emits blue (B) light will be described as an example, but the type of light source that the backlight has is not limited to the above configuration. Also, in FIG. 5, the solid-state imaging device having the configuration shown in FIGS. 2(A) and 2(B) will be described as an example, and its operation will be described.

[0073] As shown in FIG. 5, when operating the backlight by FS driving, the light sources of each color are lit in order. Specifically, in FIG. 5, the lighting period Tr for lighting the red (R) light source, the extinction period Tk for extinguishing all the light sources, the lighting period Tg for lighting the green (G) light source, the extinction period Tk for extinguishing all the light sources, and the lighting period Tb for lighting the blue (B) light source appear in order. As shown in FIG. 5, when operating the backlight by FS driving, the light sources of each color are lit in order. Specifically, in FIG. 5, the lighting period Tr for lighting the red (R) light source, the extinction period Tk for extinguishing all the light sources, the lighting period Tg for lighting the green (G) light source, the extinction period Tk for extinguishing all the light sources, and the lighting period Tb for lighting the blue (B) light source appear in order. As shown in FIG. 5, when operating the backlight by FS driving, the light sources of each color are lit in order. Specifically, in FIG. 5, the lighting period Tr for lighting the red (R) light source, the extinction period Tk for extinguishing all the light sources, the lighting period Tg for lighting the green (G) light source, the extinction period Tk for extinguishing all the light sources, and the lighting period Tb for lighting the blue (B) light source appear in order. As shown in FIG. 5, when operating the backlight by FS driving, the light sources of each color are lit in order. Specifically, in FIG. 5, the lighting period Tr for lighting the red (R) light source, the extinction period Tk for extinguishing all the light sources, the lighting period Tg for lighting the green (G) light source, the extinction period Tk for extinguishing all the light sources, and the lighting period Tb for lighting the blue (B) light source appear in order.

[0074] During the lighting period Tr, the reset operation and the accumulation operation corresponding to red (R) are performed for the photodiodes of all pixels. They are performed simultaneously in the sensor. That is, the exposure period during which the reset operation and the accumulation operation are performed is provided within the lighting period Tr. And during the above exposure period, the potential of the signal input from the wiring Tx1 to the wiring TXx has a pulse, and moreover, the periods during which the pulses appear overlap. Also, during the above exposure period, the potential of the signal input from the wiring PR1 to the wiring PRx has a pulse, and moreover, the periods during which the pulses appear overlap .

[0075] Also, in the extinguishing period Tk that appears next to the lighting period Tr, the charge reading operation corresponding to red (R) is performed sequentially for each row of the photosensor. Therefore, within the reading period of the entire row, the reading periods of each row appear sequentially . And during the reading period of each row, in the wiring SE corresponding to the reading period among the wirings SE1 to SEy, the potential of the input signal has a pulse. That is, the pulses of the signals input to each of the wirings SE1 to SEy appear so as to shift sequentially . . That is, the pulses of the signals input to each of the wirings SE1 to SEy appear so as to shift sequentially

[0076] Similarly, in the lighting period Tg, the reset operation and the accumulation operation corresponding to green (G) are performed simultaneously in the photosensors of all pixels. That is, the exposure period during which the reset operation and the accumulation operation are performed is provided within the lighting period Tg. Also, similarly, in the extinguishing period Tk that appears next to the lighting period Tg, the charge reading operation corresponding to green (G) is performed sequentially for each row of the photosensor . . Similarly, in the lighting period Tb, the reset operation and the accumulation operation corresponding to blue (B) are performed simultaneously in the photosensors of all pixels. That is, the exposure period during which the reset operation and the accumulation operation are performed

[0077] Similarly, in the lighting period Tb, the reset operation and the accumulation operation corresponding to blue (B) are performed simultaneously in the photosensors of all pixels. That is, the exposure period during which the reset operation and the accumulation operation are performed is provided within the lighting period Tb. And during the exposure period, the potential of the signal input from the wiring Tx1 to the wiring The exposure period is provided within the lighting period Tb. Also, in the extinguishing period Tk that appears after the lighting period Tb the readout operation of the charge corresponding to blue (B) is sequentially performed for each row of the photosensor .

[0078] By performing the above operations, image data corresponding to each color can be acquired. Then, by synthesizing the image data corresponding to each of the above colors color image data can be obtained.

[0079] Note that an additional extinguishing period Tk may be added, and image data may be acquired during the extinguishing period . By subtracting the image data during the extinguishing period from the image data corresponding to each color, high-contrast color image data with reduced influence of external light can be acquired.

[0080] In the case of a solid-state imaging device, it is not necessary to insert an extinguishing period between each lighting period, but by inserting an extinguishing period the leakage of charge during the charge holding period can be further prevented.

[0081] When operating the backlight with FS drive, unlike the case of combining a single-color light source and a color filter it is necessary to sequentially switch and emit light sources of each color. Furthermore, the frequency at which the above light source is switched needs to be set to a value higher than the frame frequency in the case of using a single-color light source . For example, if the frame frequency in the case of using a single-color light source is 60 Hz when performing FS drive using light sources corresponding to each of red, green, and blue, the frequency at which the light source is switched is about 180 Hz, which is about 3 times. Therefore, the lighting period during which each color light source emits light is very short. However, in one aspect of the present invention, imaging is performed using the global shutter method In order to perform the operation, the charge reset operation and the accumulation operation can be performed simultaneously for all pixels. Therefore, the period until the accumulation operation is completed for all pixels can be made shorter than in the case of using the rolling shutter method. Therefore, by adopting the FS drive, even if the lighting period during which the light source of each color emits light is shortened, the accumulation operation for all pixels can be completed within the above period.

[0082] Also, by using the FS drive, it is not necessary to provide a color filter for each pixel, and the utilization efficiency of light from the backlight can be increased. Therefore, the power consumption of the solid-state imaging device can be reduced. Also, since image data corresponding to each color can be acquired or gradation display can be performed with one pixel, high-definition image data can be acquired or high-definition image display can be performed.

[0083] Next, an example of a pixel of a semiconductor display device according to one aspect of the present invention will be described. In the case of a solid-state imaging device, a photosensor is provided for each pixel, but in the case of a semiconductor display device, a display element is provided for each pixel in addition to the photosensor. Even in the case of a semiconductor display device, the connection configuration between the photosensors can adopt the configuration shown in FIG. 1 or FIG. 2(B). Also, even in the case of a semiconductor display device, the structure of the photosensor shown in FIG. 1 or FIG. 2(A) can be adopted.

[0084] FIG. 6 shows, as an example, the configuration of a pixel included in a semiconductor display device in a circuit diagram. In FIG. 6, pixel 120 has four display elements 121 and one photosensor 101. Note that, in the semiconductor display device according to one aspect of the present invention, the display element 121 and the photosensor The number of Sa101 is not limited to the form shown in FIG. 6.

[0085] In FIG. 6, the photosensor 101 having the configuration shown in FIG. 2(A) is used for the pixel 120. .

[0086] The display element 121 includes a liquid crystal element 122 and circuit elements such as a transistor that controls the operation of the liquid crystal element 122. Specifically, in FIG. 6, an example is shown where the display element 121 includes the liquid crystal element 122, a transistor 123 that functions as a switching element, and a capacitor element 124. The liquid crystal element 122 has a pixel electrode, a counter electrode, and liquid crystal to which a voltage is applied by the pixel electrode and the counter electrode.

[0087] Note that the display element 121 may further include other circuit elements such as a transistor, a diode, a resistance element, a capacitor element, and an inductance, if necessary.

[0088] The gate electrode of the transistor 123 is connected to the scanning line GL. The transistor 123 has its first terminal connected to the signal line SL and its second terminal connected to the pixel electrode of the liquid crystal element 122. One pair of electrodes of the capacitor element 124 has one connected to the pixel electrode of the liquid crystal element 122 and the other connected to the wiring COM to which a fixed potential is applied.

[0089] Next, taking the pixel shown in FIG. 6 as an example, the layout of the pixel of the semiconductor display device according to one aspect of the present invention will be described. FIG. 7 shows an example of a top view of the pixel 120 shown in FIG. 6. The pixel 120 shown in FIG. 7 has one photosensor 101 and four display elements 121, similar to FIG. 6.

[0090] Figure 8 shows an enlarged view of one of the display elements 121 shown in Figure 7. The display element 121 includes a conductive film 201 that functions as a scanning line GL, a conductive film 202 that functions as a signal line SL, and a wiring conductive film 203 that functions as COM. The conductive film 201 also functions as the gate electrode of the transistor 12 3. Further, the conductive film 202 also functions as the first terminal of the transistor 123 . Additionally, the display element 121 includes a pixel electrode 204, a conductive film 205, and a conductive film 206. The conductive film 206 functions as the second terminal of the transistor 123 . The conductive film 206 and the pixel electrode 204 are connected.

[0091] Moreover, the conductive film 206 is connected to the conductive film 205, and the overlapping portion between the conductive film 203 that functions as the wiring COM and the conductive film 205 with a gate insulating film sandwiched therebetween functions as a capacitance element 124. For clarity, in Figures 7 and 8, various insulating films including the gate insulating film are not shown.

[0092] Note that the conductive films 201 and 205 can be formed by processing a single conductive film formed on an insulating surface into a desired shape. A gate insulating film is formed on the conductive films 201 and 205 . Further, the conductive films 202, 203, and 206 can be formed by processing a single conductive film formed on the gate insulating film into a desired shape.

[0093] When the transistor 123 is a bottom gate type and its active layer 253 uses an oxide semiconductor, as shown in Figure 8, on the conductive film 201 that functions as the gate electrode ... ...

[0094] ... ... It is desirable to use a configuration in which the active layer 253 completely overlaps. By adopting the above configuration, it is possible to prevent the oxide semiconductor in the active layer 253 from deteriorating due to light incident from the substrate side, and thus prevent deterioration of characteristics such as a shift in the threshold voltage of the transistor 123. This can be achieved.

[0095] Also, in FIG. 9(A), one of the photosensors 101 shown in FIG. 7 is shown enlarged. In FIG. 9( B), a cross-sectional view taken along the broken line A1 - A2 in FIG. 9(A) is shown.

[0096] The photosensor 101 includes a conductive film 210 that functions as a wiring PR, a conductive film 211 that functions as a wiring TX, a conductive film 212 that functions as a wiring SE, a conductive film 213 that functions as a wiring VR, and a conductive film 214 that functions as a wiring OUT. The photosensor 101 includes a conductive film 210 that functions as a wiring PR, a conductive film 211 that functions as a wiring TX, a conductive film 212 that functions as a wiring SE, a conductive film 213 that functions as a wiring VR, and a conductive film 214 that functions as a wiring OUT. The photosensor 101 includes a conductive film 210 that functions as a wiring PR, a conductive film 211 that functions as a wiring TX, a conductive film 212 that functions as a wiring SE, a conductive film 213 that functions as a wiring VR, and a conductive film 214 that functions as a wiring OUT.

[0097] The photodiode 102 included in the photosensor 101 has a p-type semiconductor film 215, an i-type semiconductor film 216, and an n-type semiconductor film 217, which are stacked in this order. The conductive film 21 0 is connected to the p-type semiconductor film 215 that functions as the anode of the photodiode 102. It is connected.

[0098] The conductive film 218 included in the photosensor 101 functions as the gate electrode of the transistor 104 and is further connected to the conductive film 211. The conductive film 218 included in the photosensor 101 functions as the gate electrode of the transistor 104 and is further connected to the conductive film 211. The conductive film 219 included in the photosensor 101 functions as the first terminal of the transistor 104. The conductive film 220 included in the photosensor 101 functions as the second terminal of the transistor 104. The conductive film 221 included in the photosensor 101 is connected to the n-type semiconductor film 217 and the conductive film 219. The conductive film 222 of the photosensor 101 functions as the gate electrode of the transistor 105 and is further connected to the conductive film 220.

[0099] The conductive film 223 of the photosensor 101 functions as the first terminal of the transistor 105. The conductive film 224 of the photosensor 101 functions as the second terminal of the transistor 105 and the first terminal of the transistor 106. Further, the conductive film 214 also functions as the second terminal of the transistor 106. The conductive film 212 also functions as the gate electrode of the transistor 106. The conductive film 225 of the photosensor 101 is connected to the conductive film 223 and the conductive film 213.

[0100] The conductive film 226 of the photosensor 101 is continued to the conductive film 210 that functions as the wiring PR. Although not shown in FIG. 9, a plurality of conductive films 210 that function as the wiring PR are provided in the pixel portion. In one aspect of the present invention, the conductive film 226 is connected to at least two of the plurality of conductive films 210.

[0101] Further, the conductive film 227 of the photosensor 101 is connected to the conductive film 211 that functions as the wiring TX. Although not shown in FIG. 9, a plurality of conductive films 211 that function as the wiring TX are provided in the pixel portion. In one aspect of the present invention, the conductive film 227 is connected to at least two of the plurality of conductive films 211.

[0102] The conductive films 212, 218, 222, 225, 226, and 227 can be formed by processing a single conductive film formed on the insulating surface into a desired shape. ​ It is possible. A gate insulating film 228 is formed on the conductive films 212, 218, 222, 225, 226, and 227. Further, the conductive films 210, 211, 213, 214, 219, 220, 223, and 224 can be formed by processing a single conductive film formed on the gate insulating film 228 into a desired shape. It is possible. A gate insulating film 228 is formed on the conductive films 212, 218, 222, 225, 226, and 227. Further, the conductive films 210, 211, 213, 214, 219, 220, 223, and 224 can be formed by processing a single conductive film formed on the gate insulating film 228 into a desired shape. It is possible. A gate insulating film 228 is formed on the conductive films 212, 218, 222, 225, 226, and 227. Further, the conductive films 210, 211, 213, 214, 219, 220, 223, and 224 can be formed by processing a single conductive film formed on the gate insulating film 228 into a desired shape. It is possible. A gate insulating film 228 is formed on the conductive films 212, 218, 222, 225, 226, and 227. Further, the conductive films 210, 211, 213, 214, 219, 220, 223, and 224 can be formed by processing a single conductive film formed on the gate insulating film 228 into a desired shape. It is possible. A gate insulating film 228 is formed on the conductive films 212, 218, 222, 225, 226, and 227. Further, the conductive films 210, 211, 213, 214, 219, 220, 223, and 224 can be formed by processing a single conductive film formed on the gate insulating film 228 into a desired shape.

[0103] In this embodiment, the conductive film 226 that connects the wirings PR to each other and the conductive film 210 that functions as the wiring PR are formed of different conductive films. However, one aspect of the present invention is not limited to this configuration. A single conductive film may have both the function of connecting the wirings PR to each other and the function of serving as the wiring PR. That is, in this case, the above-mentioned conductive film will be stretched in a mesh pattern in the pixel portion. In this embodiment, the conductive film 226 that connects the wirings PR to each other and the conductive film 210 that functions as the wiring PR are formed of different conductive films. However, one aspect of the present invention is not limited to this configuration. A single conductive film may have both the function of connecting the wirings PR to each other and the function of serving as the wiring PR. That is, in this case, the above-mentioned conductive film will be stretched in a mesh pattern in the pixel portion. In this embodiment, the conductive film 226 that connects the wirings PR to each other and the conductive film 210 that functions as the wiring PR are formed of different conductive films. However, one aspect of the present invention is not limited to this configuration. A single conductive film may have both the function of connecting the wirings PR to each other and the function of serving as the wiring PR. That is, in this case, the above-mentioned conductive film will be stretched in a mesh pattern in the pixel portion. In this embodiment, the conductive film 226 that connects the wirings PR to each other and the conductive film 210 that functions as the wiring PR are formed of different conductive films. However, one aspect of the present invention is not limited to this configuration. A single conductive film may have both the function of connecting the wirings PR to each other and the function of serving as the wiring PR. That is, in this case, the above-mentioned conductive film will be stretched in a mesh pattern in the pixel portion. In this embodiment, the conductive film 226 that connects the wirings PR to each other and the conductive film 210 that functions as the wiring PR are formed of different conductive films. However, one aspect of the present invention is not limited to this configuration. A single conductive film may have both the function of connecting the wirings PR to each other and the function of serving as the wiring PR. That is, in this case, the above-mentioned conductive film will be stretched in a mesh pattern in the pixel portion.

[0104] In this embodiment, the conductive film 227 that connects the wirings TX to each other and the conductive film 211 that functions as the wiring TX are formed of different conductive films. However, one aspect of the present invention is not limited to this configuration. A single conductive film may have both the function of connecting the wirings TX to each other and the function of serving as the wiring TX. That is, in this case, the above-mentioned conductive film will be stretched in a mesh pattern in the pixel portion. In this embodiment, the conductive film 227 that connects the wirings TX to each other and the conductive film 211 that functions as the wiring TX are formed of different conductive films. However, one aspect of the present invention is not limited to this configuration. A single conductive film may have both the function of connecting the wirings TX to each other and the function of serving as the wiring TX. That is, in this case, the above-mentioned conductive film will be stretched in a mesh pattern in the pixel portion. In this embodiment, the conductive film 227 that connects the wirings TX to each other and the conductive film 211 that functions as the wiring TX are formed of different conductive films. However, one aspect of the present invention is not limited to this configuration. A single conductive film may have both the function of connecting the wirings TX to each other and the function of serving as the wiring TX. That is, in this case, the above-mentioned conductive film will be stretched in a mesh pattern in the pixel portion. In this embodiment, the conductive film 227 that connects the wirings TX to each other and the conductive film 211 that functions as the wiring TX are formed of different conductive films. However, one aspect of the present invention is not limited to this configuration. A single conductive film may have both the function of connecting the wirings TX to each other and the function of serving as the wiring TX. That is, in this case, the above-mentioned conductive film will be stretched in a mesh pattern in the pixel portion.

[0105] With the above configuration, it is possible to suppress the potential drop and signal delay due to the resistance of the wiring PR and the wiring TX. As a result, the potential applied to the anode of the photodiode 102 or the potential of the signal that controls the switching of the transistor 104 for holding the charge is within the pixel portion. With the above configuration, it is possible to suppress the potential drop and signal delay due to the resistance of the wiring PR and the wiring TX. As a result, the potential applied to the anode of the photodiode 102 or the potential of the signal that controls the switching of the transistor 104 for holding the charge is within the pixel portion. With the above configuration, it is possible to suppress the potential drop and signal delay due to the resistance of the wiring PR and the wiring TX. As a result, the potential applied to the anode of the photodiode 102 or the potential of the signal that controls the switching of the transistor 104 for holding the charge is within the pixel portion. It is possible to prevent variations. Therefore, it is possible to prevent variations in the level of the signal output from the photosensor 101 and improve the quality of the captured image. It is possible to prevent variations in the level of the signal output from the photosensor 101 and improve the quality of the captured image.

[0106] Note that the cross-sectional view of the photosensor 101 shown in FIG. 9(B) shows the state in which the conductive film 221 is formed up to that point. In the case of a semiconductor display device, since the display element 121 is provided in the pixel 120 in addition to the photosensor 101, actually, after forming the conductive film 221, the liquid crystal element is formed. Note that the cross-sectional view of the photosensor 101 shown in FIG. 9(B) shows the state in which the conductive film 221 is formed up to that point. In the case of a semiconductor display device, since the display element 121 is provided in the pixel 120 in addition to the photosensor 101, actually, after forming the conductive film 221, the liquid crystal element is formed. Since the display element 121 is provided in the pixel 120 in addition to the photosensor 101, actually, after forming the conductive film 221, the liquid crystal element is formed. Since the display element 121 is provided in the pixel 120 in addition to the photosensor 101, actually, after forming the conductive film 221, the liquid crystal element is formed.

[0107] When the transistor 104 is of the bottom gate type and an oxide semiconductor is used for its active layer 250, as shown in FIG. 9, it is desirable to use a configuration in which the active layer 250 completely overlaps the conductive film 218 that functions as a gate electrode. By adopting the above configuration, it is possible to prevent the oxide semiconductor in the active layer 250 from being deteriorated by the light incident from the substrate 251 side, and thus it is possible to prevent deterioration of characteristics such as a shift in the threshold voltage of the transistor 104. Note that the same effect can be obtained for the transistor 105 and the transistor 106 by adopting the above configuration. When the transistor 104 is of the bottom gate type and an oxide semiconductor is used for its active layer 250, as shown in FIG. 9, it is desirable to use a configuration in which the active layer 250 completely overlaps the conductive film 218 that functions as a gate electrode. By adopting the above configuration, it is possible to prevent the oxide semiconductor in the active layer 250 from being deteriorated by the light incident from the substrate 251 side, and thus it is possible to prevent deterioration of characteristics such as a shift in the threshold voltage of the transistor 104. Note that the same effect can be obtained for the transistor 105 and the transistor 106 by adopting the above configuration. When the transistor 104 is of the bottom gate type and an oxide semiconductor is used for its active layer 250, as shown in FIG. 9, it is desirable to use a configuration in which the active layer 250 completely overlaps the conductive film 218 that functions as a gate electrode. By adopting the above configuration, it is possible to prevent the oxide semiconductor in the active layer 250 from being deteriorated by the light incident from the substrate 251 side, and thus it is possible to prevent deterioration of characteristics such as a shift in the threshold voltage of the transistor 104. Note that the same effect can be obtained for the transistor 105 and the transistor 106 by adopting the above configuration. When the transistor 104 is of the bottom gate type and an oxide semiconductor is used for its active layer 250, as shown in FIG. 9, it is desirable to use a configuration in which the active layer 250 completely overlaps the conductive film 218 that functions as a gate electrode. By adopting the above configuration, it is possible to prevent the oxide semiconductor in the active layer 250 from being deteriorated by the light incident from the substrate 251 side, and thus it is possible to prevent deterioration of characteristics such as a shift in the threshold voltage of the transistor 104. Note that the same effect can be obtained for the transistor 105 and the transistor 106 by adopting the above configuration. When the transistor 104 is of the bottom gate type and an oxide semiconductor is used for its active layer 250, as shown in FIG. 9, it is desirable to use a configuration in which the active layer 250 completely overlaps the conductive film 218 that functions as a gate electrode. By adopting the above configuration, it is possible to prevent the oxide semiconductor in the active layer 250 from being deteriorated by the light incident from the substrate 251 side, and thus it is possible to prevent deterioration of characteristics such as a shift in the threshold voltage of the transistor 104. Note that the same effect can be obtained for the transistor 105 and the transistor 106 by adopting the above configuration. When the transistor 104 is of the bottom gate type and an oxide semiconductor is used for its active layer 250, as shown in FIG. 9, it is desirable to use a configuration in which the active layer 250 completely overlaps the conductive film 218 that functions as a gate electrode. By adopting the above configuration, it is possible to prevent the oxide semiconductor in the active layer 250 from being deteriorated by the light incident from the substrate 251 side, and thus it is possible to prevent deterioration of characteristics such as a shift in the threshold voltage of the transistor 104. Note that the same effect can be obtained for the transistor 105 and the transistor 106 by adopting the above configuration. When the transistor 104 is of the bottom gate type and an oxide semiconductor is used for its active layer 250, as shown in FIG. 9, it is desirable to use a configuration in which the active layer 250 completely overlaps the conductive film 218 that functions as a gate electrode. By adopting the above configuration, it is possible to prevent the oxide semiconductor in the active layer 250 from being deteriorated by the light incident from the substrate 251 side, and thus it is possible to prevent deterioration of characteristics such as a shift in the threshold voltage of the transistor 104. Note that the same effect can be obtained for the transistor 105 and the transistor 106 by adopting the above configuration.

[0108] In the cross-sectional view of the pixel shown in FIG. 16, the transistor 123 of the display element 121 and the photodiode 102 of the photosensor 101 are shown. The conductive film 206 that functions as the second terminal of the transistor 123 is connected to the pixel electrode 204. The conductive film 221 connected to the photodiode 102 and the pixel electrode 204 can be formed by processing a single conductive film formed on the insulating film 231 covering the transistor 123 and the photodiode 102 into a desired shape. In the cross-sectional view of the pixel shown in FIG. 16, the transistor 123 of the display element 121 and the photodiode 102 of the photosensor 101 are shown. The conductive film 206 that functions as the second terminal of the transistor 123 is connected to the pixel electrode 204. The conductive film 221 connected to the photodiode 102 and the pixel electrode 204 can be formed by processing a single conductive film formed on the insulating film 231 covering the transistor 123 and the photodiode 102 into a desired shape. In the cross-sectional view of the pixel shown in FIG. 16, the transistor 123 of the display element 121 and the photodiode 102 of the photosensor 101 are shown. The conductive film 206 that functions as the second terminal of the transistor 123 is connected to the pixel electrode 204. The conductive film 221 connected to the photodiode 102 and the pixel electrode 204 can be formed by processing a single conductive film formed on the insulating film 231 covering the transistor 123 and the photodiode 102 into a desired shape. In the cross-sectional view of the pixel shown in FIG. 16, the transistor 123 of the display element 121 and the photodiode 102 of the photosensor 101 are shown. The conductive film 206 that functions as the second terminal of the transistor 123 is connected to the pixel electrode 204. The conductive film 221 connected to the photodiode 102 and the pixel electrode 204 can be formed by processing a single conductive film formed on the insulating film 231 covering the transistor 123 and the photodiode 102 into a desired shape. In the cross-sectional view of the pixel shown in FIG. 16, the transistor 123 of the display element 121 and the photodiode 102 of the photosensor 101 are shown. The conductive film 206 that functions as the second terminal of the transistor 123 is connected to the pixel electrode 204. The conductive film 221 connected to the photodiode 102 and the pixel electrode 204 can be formed by processing a single conductive film formed on the insulating film 231 covering the transistor 123 and the photodiode 102 into a desired shape. In the cross-sectional view of the pixel shown in FIG. 16, the transistor 123 of the display element 121 and the photodiode 102 of the photosensor 101 are shown. The conductive film 206 that functions as the second terminal of the transistor 123 is connected to the pixel electrode 204. The conductive film 221 connected to the photodiode 102 and the pixel electrode 204 can be formed by processing a single conductive film formed on the insulating film 231 covering the transistor 123 and the photodiode 102 into a desired shape.

[0109] Further, a substrate 236 is arranged so as to face the substrate 232 on which the pixel electrode 204 is formed. A counter electrode 233 is formed on the substrate 236, and a liquid crystal layer 234 containing liquid crystal is provided between the pixel electrode 204 and the counter electrode 233. A liquid crystal element 122 is formed at a portion where the pixel electrode 204, the counter electrode 233, and the liquid crystal layer 234 overlap.

[0110] Note that an alignment film may be appropriately provided between the pixel electrode 204 and the liquid crystal layer 234 or between the counter electrode 233 and the liquid crystal layer 234. The alignment film can be formed using an organic resin such as polyimide or polyvinyl alcohol, and an alignment treatment for arranging liquid crystal molecules in a certain direction, such as rubbing, is performed on its surface. Rubbing can be performed by rotating a roller wrapped with a cloth such as nylon so as to contact the alignment film and rubbing the surface of the alignment film in a certain direction. Note that it is also possible to directly form an alignment film having alignment characteristics by vapor deposition using an inorganic material such as silicon oxide without performing an alignment treatment.

[0111] Also, for the injection of liquid crystal performed to form the liquid crystal layer 234, a dispenser type (drop type) may be used, or a dip type (suction type) may be used.

[0112] Note that a shielding film 235 capable of shielding light is provided on the substrate 236 in order to prevent disclination caused by disturbance of the alignment of liquid crystal between pixels from being visually recognized, or in order to prevent diffused light from being incident in parallel on a plurality of adjacent pixels. The shielding film 235 contains carbon black, titanium suboxide having an oxidation number smaller than that of titanium dioxide, ​​​​​​​​​​​​Any organic resin containing a black pigment can be used. Alternatively, a film using chromium can also be used for shielding. It is also possible to form a film.

[0113] When an oxide semiconductor is used for the active layer 253, by providing the shielding film 235 so as to overlap with the active layer 253 of the transistor 123, it is possible to prevent the oxide semiconductor in the active layer 253 from being deteriorated by the light incident from the substrate 236 side. Thus, it is possible to prevent deterioration of characteristics such as the threshold voltage of the transistor 123 from shifting. When an oxide semiconductor is used for the active layer 253, by providing the shielding film 235 so as to overlap with the active layer 253 of the transistor 123, it is possible to prevent the oxide semiconductor in the active layer 253 from being deteriorated by the light incident from the substrate 236 side. 3 from deteriorating, and thus it is possible to prevent deterioration of characteristics such as the threshold voltage of the transistor 123 from shifting. It is possible to prevent the occurrence of deterioration of characteristics such as the threshold voltage of the transistor 123 from shifting.

[0114] The pixel electrode 204 and the counter electrode 233 can be made of a conductive material having translucency, such as indium tin oxide (ITO) containing silicon oxide, indium tin oxide (ITO), zinc oxide (ZnO), indium zinc oxide (IZO), zinc oxide added with gallium (GZO), and the like. SO), indium tin oxide (ITO), zinc oxide (ZnO), indium zinc oxide (I ZO), zinc oxide added with gallium (GZO), and the like. can be used.

[0115] In addition, for the liquid crystal layer 234, known liquid crystals such as TN (Twisted Nematic) type, VA (Vertical Alignment) type, OCB (Optically Compensated Birefringence) type, IPS (In-Plane Switching) type, MVA (Multi-domain Vertical Alignment) type, etc. can be used. ical Alignment) type, OCB (Optically Compensat ed Birefringence) type, IPS (In-Plane Switchin g) type, MVA (Multi-domain Vertical Alignment) type, etc. can be used.

[0116] In addition, a liquid crystal showing a blue phase without using an alignment film may be used for the liquid crystal layer 234. The blue phase is one of the liquid crystal phases, and is a phase that appears immediately before the cholesteric liquid crystal is heated and transitions from the cholesteric phase to the isotropic phase. Since the blue phase appears only in a narrow temperature range, it is a phase that appears immediately before the cholesteric liquid crystal is heated and transitions from the cholesteric phase to the isotropic phase. Since the blue phase appears only in a narrow temperature range, Add chiral agents and ultraviolet curable resins to improve the temperature range. A liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a short response time of 1 msec or less and is optically isotropic, so alignment treatment is not required and the viewing angle dependence is small, which is preferable. In the case of a liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent, the response time is as short as 1 msec or less and it is optically isotropic. Therefore, alignment treatment is not required and the viewing angle dependence is small, which is preferable.

[0117] In FIG. 16, a liquid crystal element having a structure in which a liquid crystal layer 234 is sandwiched between a pixel electrode 204 and a counter electrode 233 was described as an example. However, the semiconductor display device according to one aspect of the present invention is not limited to this configuration. As in the case of an IPS type liquid crystal element or a liquid crystal element using a blue phase, both of a pair of electrodes may be formed on one substrate. In the case of a liquid crystal element having a structure in which a liquid crystal layer 234 is sandwiched between a pixel electrode 204 and a counter electrode 233 as shown in FIG. 16, the semiconductor display device according to one aspect of the present invention is not limited to this configuration. As in the case of an IPS type liquid crystal element or a liquid crystal element using a blue phase, both of a pair of electrodes may be formed on one substrate. It is also possible that both of a pair of electrodes are formed on one substrate.

[0118] Note that the shielding film 235 is preferably provided not only for the display element 121 but also for the photosensor 101. FIG. 20 shows a state in which the shielding film 235 is superimposed on the pixel 120 shown in FIG. 7. In FIG. 20, the shielding film 235 has openings in a region overlapping with the pixel electrode 204 of the display element 121 and a region overlapping with the photodiode 102 of the photosensor 101. Therefore, even if an oxide semiconductor is used for the active layer of the transistor constituting the display element 121 and the photosensor 101, the active layer is shielded from light by the shielding film 235, so that deterioration of the oxide semiconductor due to light can be prevented, and deterioration of characteristics such as a shift in the threshold voltage of the transistor can be prevented. Note that the shielding film 235 is preferably provided not only for the display element 121 but also for the photosensor 101. FIG. 20 shows a state in which the shielding film 235 is superimposed on the pixel 120 shown in FIG. 7. In FIG. 20, the shielding film 235 has openings in a region overlapping with the pixel electrode 204 of the display element 121 and a region overlapping with the photodiode 102 of the photosensor 101. Therefore, even if an oxide semiconductor is used for the active layer of the transistor constituting the display element 121 and the photosensor 101, the active layer is shielded from light by the shielding film 235, so that deterioration of the oxide semiconductor due to light can be prevented, and deterioration of characteristics such as a shift in the threshold voltage of the transistor can be prevented. In the case of forming the driving circuit on the panel, by performing light shielding on the gate electrode or the shielding film of the transistor used for the driving circuit, it is possible to prevent deterioration of characteristics such as a shift in the threshold voltage of the transistor. In the case of forming the driving circuit on the panel, by performing light shielding on the gate electrode or the shielding film of the transistor used for the driving circuit, it is possible to prevent deterioration of characteristics such as a shift in the threshold voltage of the transistor. Therefore, even if an oxide semiconductor is used for the active layer of the transistor constituting the display element 121 and the photosensor 101, the active layer is shielded from light by the shielding film 235, so that deterioration of the oxide semiconductor due to light can be prevented, and deterioration of characteristics such as a shift in the threshold voltage of the transistor can be prevented. It is possible to prevent the occurrence of deterioration of characteristics such as a shift in the threshold voltage of the transistor.

[0119] Note that when the driving circuit is formed on the panel, by performing light shielding on the gate electrode or the shielding film of the transistor used for the driving circuit, it is possible to prevent deterioration of characteristics such as a shift in the threshold voltage of the transistor. In the case of forming the driving circuit on the panel, by performing light shielding on the gate electrode or the shielding film of the transistor used for the driving circuit, it is possible to prevent deterioration of characteristics such as a shift in the threshold voltage of the transistor. It is possible to prevent deterioration of characteristics such as a shift in the threshold voltage of the transistor.

[0120] Note that the solid-state imaging device or semiconductor display device of the present invention includes a panel in which a pixel portion is formed between a pair of substrates. The panel includes an IC including a drive circuit, a controller, a CPU, a memory, etc. and a module in which a backlight is mounted on the panel. The drive circuit may be formed in the panel.

[0121] Next, with reference to FIG. 10, the operation of the light source and the operation of the pixel portion when the semiconductor display device is operated in FS drive will be described. In FIG. 10, the lighting periods and extinguishing periods of three light sources corresponding to red (R), green (G), and blue (B), respectively, and the time changes in the potentials of wiring TX, wiring PR, and wiring SE are shown.

[0122] In FIG. 10, the case where the backlight has a light source that emits red (R) light, a light source that emits green (G) light, and a light source that emits blue (B) light will be described as an example. However, the type of light source included in the backlight is not limited to the above configuration. Also, in FIG. 10, it is assumed that the pixel shown in FIG. 6 is included in the pixel portion in a plurality, and the pixel portion is provided with wiring TX1 to wiring TXx, wiring PR1 to wiring PRx, and wiring SE1 to wiring SEy. The operation thereof will be described.

[0123] As shown in FIG. 10, when the backlight is operated in FS drive, the light sources of each color are lit in order. Specifically, in FIG. 10, within one frame period, the lighting period Tr for lighting the red (R) light source, the extinguishing period Tk for extinguishing all the light sources, the lighting period Tg for lighting the green (G) light source, the extinguishing period Tk for extinguishing all the light sources, the lighting period Tb for lighting the blue (B) light source, and the extinguishing period Tk for extinguishing all the light sources appear in order.

[0124] First, during the lighting period Tr in the first frame period, similar to the case of a solid-state imaging device, the reset operation and the accumulation operation corresponding to red (R) are simultaneously performed on the photosensors of all pixels. That is, the exposure period during which the reset operation and the accumulation operation are performed is provided within the lighting period Tr. And during the above exposure period, the potential of the signal input from the wiring Tx1 to the wiring TXx has a pulse, and moreover, the periods during which the pulses appear overlap. Also, during the above exposure period, the potential of the signal input from the wiring PR1 to the wiring PRx has a pulse, and moreover, the periods during which the pulses appear overlap.

[0125] Also, after the lighting period Tr ends and before the lighting period Tg in the second frame period appears, the charge readout operation corresponding to red (R) is sequentially performed for each row of the photosensors. Therefore, within the readout period of all rows, the readout periods of each row appear in sequence. And in the readout period of each row, the potential of the signal input in the wiring SE corresponding to the readout period among the wirings SE1 to SEy has a pulse. That is, the pulses of the signals input to each of the wirings SE1 to SEy appear so as to shift sequentially.

[0126] Similarly, during the lighting period Tg in the second frame period, the reset operation and the accumulation operation corresponding to green (G) are simultaneously performed on the photosensors of all pixels. That is, the exposure period during which the reset operation and the accumulation operation are performed is provided within the lighting period Tg. And similarly, after the lighting period Tg ends and before the lighting period Tb in the third frame period appears, Up to this point, the charge reading operation corresponding to green (G) is sequentially performed for each row of the photosensor. .

[0127] Similarly, in the lighting period Tb in the third frame period, the reset operation and the accumulation operation corresponding to blue (B) are performed simultaneously for all the photosensors of all the pixels. That is, the exposure period during which the reset operation and the accumulation operation are performed is provided within the lighting period Tb. And, similarly, up to the time before the lighting period Tr in the fifth frame period appears after the lighting period Tb ends, the charge reading operation corresponding to blue (B) is sequentially performed for each row of the photosensor. .

[0128] By performing the above operations, image data corresponding to each color can be obtained. And by synthesizing the image data corresponding to each of the above colors, color image data can be obtained.

[0129] Note that a further light-off period Tk may be added, and image data may be acquired during the light-off period. By subtracting the image data during the light-off period from the image data corresponding to each color, color image data with high contrast and reduced influence of external light can be obtained.

[0130] When operating the backlight in FS drive, unlike the case of combining a single-color light source and a color filter, it is necessary to sequentially switch and emit light sources of each color. Further, the frequency at which the above light source switching is performed needs to be set to a value higher than the frame frequency in the case of using a single-color light source. For example, if the frame frequency in the case of using a single-color light source is 60 Hz, when performing FS drive using light sources corresponding to each of red, green, and blue, the switching of the light source The frequency at which this is done is about 180 Hz, which is approximately three times. Therefore, the lighting periods during which each color light source emits light are very short. However, in one aspect of the present invention, since imaging is performed using the global shutter method, the charge reset operation and the accumulation operation can be performed simultaneously for all pixels. Therefore, the period until the accumulation operation is completed for all pixels can be made shorter than in the case of using the rolling shutter method. Therefore, by adopting the FS drive, even if the lighting period during which each color light source emits light becomes short, the accumulation operation for all pixels can be completed within the above period. Moreover, by using the FS drive, it becomes unnecessary to provide a color filter for each pixel, and the utilization efficiency of light from the backlight can be increased. Therefore, the power consumption of the semiconductor display device can be reduced. Also, since image data corresponding to each color can be acquired or gradation display can be performed with one pixel, high-definition image data can be acquired or high-definition images can be displayed. Note that the above operations in each of the periods described above are the operations of the semiconductor display device during imaging. When displaying an image on the semiconductor display device, an image signal corresponding to each color is written to the display element 121 during each blanking period Tk. Then, during each lighting period, a gradation corresponding to each color is displayed on the display element 121 according to the above image signal, thereby enabling a color image to be displayed. Note that the response time of liquid crystal from when a voltage is applied until its transmittance converges is generally on the order of ten-odd milliseconds. Therefore, since the ratio of the response time of the liquid crystal in the lighting period is large,

[0131]

[0132]

[0133] ​​​​​​​​​​​​​​, the change in the transmittance of the liquid crystal element is likely to be visually recognized as blurring of the moving image. However, as described above appears such that the period of significant change in the transmittance of the liquid crystal and the blanking period Tk are parallel, and appears such that the period of convergence of the change in the transmittance of the liquid crystal and each lighting period are parallel, so that it is possible to prevent the change in transmittance from being visually recognized and improve the quality of the displayed image. can be achieved.

[0134] (Embodiment 2) In this embodiment, the configuration of the photosensor 101 different from that in Fig. 2(A) will be described.

[0135] Fig. 11 shows an example of the photosensor 101 in a circuit diagram. The photosensor 101 shown in Fig. 11 has an amplifier circuit 103, which includes transistors 104, 105, 106 , and transistor 107. Transistor 104 controls the supply of the current generated in the photodiode 102 into the amplifier circuit 103. Transistor 105 determines the current value or resistance value between its first and second terminals according to the potential applied to the second terminal of transistor 104. Further, transistor 106 functions as a switching element for supplying the potential of the output signal determined by the above current value or resistance value to the wiring OUT. Transistor 107 has a function of resetting the amount of charge accumulated in the amplifier circuit 103. Specifically, in Fig. 11, the first terminal of transistor 104 is connected to the cathode of the photodiode 102, and the second terminal of transistor 104 is connected to the gate electrode of transistor 105 and the first terminal of transistor 107. The first terminal of transistor 105 and the trans istor The potential of the output signal determined by the above current value or resistance value is supplied to the wiring OUT as a switching element. Transistor 107 has a function of resetting the amount of charge accumulated in the amplifier circuit 103.

[0136] Specifically, in Fig. 11, the first terminal of transistor 104 is connected to the cathode of the photodiode 102, and the second terminal of transistor 104 is connected to the gate electrode of transistor 105 and the first terminal of transistor 107. The first terminal of transistor 105 and the trans istor The first terminal of transistor 105 and the trans ​​The second terminal of the transistor 107 is connected to the wiring VR to which the high-level power supply potential VDD is applied. The gate electrode of the transistor 107 is connected to the wiring RS, and the potential of the signal for controlling the switching of the transistor 107 is applied to the wiring RS. The second terminal of the transistor 105 is connected to the first terminal of the transistor 106. The second terminal of the transistor 106 is connected to the wiring OUT. The gate electrode of the transistor 106 is connected to the wiring SE, and the potential of the signal for controlling the switching of the transistor 106 is applied to the wiring SE. The potential of the signal for controlling the switching of the transistor 106 is applied to the wiring SE.

[0137] In FIG. 11, the node where the second terminal of the transistor 104, the first terminal of the transistor 107, and the gate electrode of the transistor 105 are connected is shown as the node FD. The potential of the output signal is determined by the amount of charge accumulated in the node FD. In order to more reliably hold the charge at the node FD, a capacitive element may be connected to the node FD.

[0138] Next, an example of the operation of the photosensor 101 shown in FIG. 11 will be described. In FIG. 12, a timing chart of various potentials applied to the photosensor 101 shown in FIG. 11 is shown as an example.

[0139] In the timing chart shown in FIG. 12, in order to explain the operation of the photosensor 101 clearly, it is assumed that high-level or low-level potentials are applied to the wiring TX, the wiring SE, and the wiring RS. Specifically, it is assumed that a high-level potential HTX and a low-level potential LTX are applied to the wiring TX, and a high-level potential HSE and a low-level potential LSE are applied to the wiring SE. A potential LSE of one level is provided, and the wiring RS is provided with a high-level potential HRS and , a low-level potential LRS. Also, the wiring PR is provided with a low-level power supply potential VSS.

[0140] First, at time T1, the potential of the wiring TX is changed from the potential LTX to the potential HTX. When the potential of the wiring TX reaches the potential HTX, the transistor 104 turns on. Note that at time T 1, the potential LSE is provided to the wiring SE, and the potential LRS is provided to the wiring RS .

[0141] Next, at time T2, the potential of the wiring RS is changed from the potential LRS to the potential HRS . When the potential of the wiring RS reaches the potential HRS, the transistor 107 turns on. Also, at time T2, the potential of the wiring TX remains at the potential HTX, and the potential of the wiring SE remains at the potential LSE . Therefore, since the power supply potential VDD is provided to the node FD, the amount of charge held at the node FD is reset. Also, a reverse bias voltage is applied to the photodiode 102.

[0142] Next, at time T3, the potential of the wiring RS is changed from the potential HRS to the potential LRS . Since the potential of the node FD has been maintained at the power supply potential VDD until immediately before time T3, even after the potential of the wiring R S reaches the potential LRS, the reverse bias voltage continues to be applied to the photodiode 102. And in this state, when light is incident on the photodiode 102 , a current flows from the cathode to the anode of the photodiode 102. The value of the above current changes according to the intensity of the light. That is, the higher the intensity of the light incident on the photodiode 102, the higher the Thus, the above current value increases, and the outflow of charge from node FD also increases. Conversely, the lower the intensity of the light incident on the photodiode 102, the lower the above current value, and the smaller the outflow of charge from node FD. Therefore, the potential of node FD changes more significantly as the light intensity increases, and changes less as the light intensity decreases. The lower the intensity of the light incident on the photodiode 102, the lower the above current value, and the smaller the outflow of charge from node FD. Thus, the potential of node FD changes more significantly as the light intensity increases, and changes less as the light intensity decreases.

[0143] Next, at time T4, when the potential of wiring TX is changed from potential HTX to potential LTX, transistor 104 turns off. Therefore, since the movement of charge from node FD to photodiode 102 stops, the potential of node FD is determined.

[0144] Next, at time T5, when the potential of wiring SE is changed from potential LSE to potential HSE, transistor 106 turns on. Then, charge moves from wiring VR to wiring OUT according to the potential of node FD.

[0145] Next, at time T6, when the potential of wiring SE is changed from potential HSE to potential LSE, the movement of charge from wiring VR to wiring OUT stops, and the potential of wiring OUT is determined. This potential of wiring OUT corresponds to the potential of the output signal of photosensor 101. And the potential of the output signal contains the image data of the photographed subject.

[0146] The above series of operations can be classified into a reset operation, an accumulation operation, and a readout operation. That is, the operation from time T1 to time T3 corresponds to the reset operation, the operation from time T3 to time T4 corresponds to the accumulation operation, and the operation from time T5 to time T6 corresponds to the readout operation. By performing the reset operation, the accumulation operation, and the readout operation, image data can be acquired. That is, the operation from time T1 to time T3 corresponds to the reset operation, the operation from time T3 to time T4 corresponds to the accumulation operation, and the operation from time T5 to time T6 corresponds to the readout operation. By performing the reset operation, the accumulation operation, and the readout operation, image data can be acquired.

[0147] Next, the configuration of the photosensor 101, which is different from that in FIGS. 2(A) and 11, will be described.

[0148] An example of the photosensor 101 is shown in a circuit diagram in FIG. 13. The photosensor 101 shown in FIG. 13 has an amplifier circuit 103 including transistors 104, 105, 106, and 107. The transistor 104 controls the supply of the current generated in the photodiode 102 into the amplifier circuit 103. The transistor 105 has its current value or resistance value between its first and second terminals determined according to the potential applied to the second terminal of the transistor 104. Further, the transistor 106 functions as a switching element for supplying the potential of the output signal determined by the above current value or resistance value to the wiring OUT. The transistor 107 has a function of resetting the amount of charge stored in the amplifier circuit 103. Specifically, in FIG. 13, the first terminal of the transistor 104 is connected to the cathode of the photodiode 102, and the second terminal of the transistor 104 is connected to the gate electrode of the transistor 105 and the first terminal of the transistor 107. The transistor 105 has its first terminal connected to the second terminal of the transistor 106 and its second terminal connected to the wiring OUT.

[0149] The first terminal of the transistor 106 and the second terminal of the transistor 107 are connected to a wiring VR to which a high-level power supply potential VDD is applied. The gate electrode of the transistor 107 is connected to a wiring RS, and a potential of a signal for controlling the switching of the transistor 107 is applied to the wiring RS. The gate electrode of the transistor 106 is connected to a wiring SE. and the potential of the signal for controlling the switching of the transistor 106 is applied to the wiring SE. is given.

[0150] In FIG. 13, the node where the second terminal of the transistor 104, the first terminal of the transistor 107, and the gate electrode of the transistor 105 are connected is shown as the node FD. The potential of the output signal is determined by the amount of charge accumulated in the node FD. In order to more reliably hold the charge at the node FD, a capacitive element may be connected to the node FD.

[0151] Regarding the operation of the photosensor 101 shown in FIG. 13, reference can be made to the timing chart shown in FIG. 12.

[0152] In the photosensor shown in FIG. 11 or FIG. 13, the channel formation region of the transistor 104 is characterized by including a semiconductor having a wider bandgap and a lower intrinsic carrier density than silicon semiconductor. By including a semiconductor material having the above-described characteristics in the channel formation region, a transistor 104 with an extremely low off-current and a high breakdown voltage can be realized. And by using the transistor 104 having the above configuration as a switching element, leakage of the charge accumulated in the amplifier circuit 103 can be prevented.

[0153] Also, in FIG. 11 or FIG. 13, the transistors 104, 105, 106, and 107 constituting the amplifier circuit 103 may have an oxide semiconductor film used for their active layer. Alternatively, the transistors 104, 10 5. The active layers of the transistors 106 and 107 are made of an amorphous material other than an oxide semiconductor. Semiconductors such as silicon or germanium, microcrystalline, polycrystalline, or single crystal, are used. The active layers of all the transistors in the photosensor 101 may be made of oxide semiconductor. By using a thin film, the process can be simplified. The active layers of the transistors 106 and 107 are made of, for example, polycrystalline or single-crystalline silicon. Use semiconductor materials such as silicon that have higher mobility than oxide semiconductors. Therefore, image data can be read out from the photosensor 101 at high speed.

[0154] This embodiment mode can be implemented in combination with the above embodiment modes.

[0155] (Embodiment 3) In this embodiment, a transistor using silicon and a transistor using an oxide semiconductor are A method for manufacturing a solid-state imaging device or a semiconductor display device according to one embodiment of the present invention is described below. I will explain this in more detail.

[0156] In one embodiment of the present invention, a transistor included in an amplifier circuit is formed using an oxide semiconductor. It may also be germanium, silicon, silicon germanium, or single crystal silicon carbide. For example, a transistor using silicon may be used. The device is made of single crystal semiconductor substrates such as silicon wafers, silicon thin films fabricated by the SOI method, etc. The insulating film 11 can be formed by using a silicon thin film produced by a vapor phase growth method.

[0157] First, as shown in FIG. 14(A), a semiconductor device is formed on an insulating surface of a substrate 700 by a known CMOS manufacturing method. Using a method, a photodiode 704 and an n-channel transistor 705 are formed. In this embodiment, taking as an example the case of forming a photodiode 704 and an n-channel transistor 705 using a single-crystalline semiconductor film separated from a single-crystalline

[0158] semiconductor substrate. An example of a specific method for manufacturing the single-crystalline semiconductor film will be briefly described. First, an ion beam composed of ions accelerated by an electric field is implanted into the single-crystalline semiconductor substrate to form a brittle layer that is locally weakened due to disruption of the crystal structure in a region having a certain depth from the surface of the semiconductor substrate. The depth of the region where the brittle layer is formed can be adjusted by the acceleration energy of the ion beam and the incident angle of the ion beam. Then, the semiconductor substrate and the substrate 700 on which the insulating film 701 is formed are bonded together 2 such that the insulating film 701 is sandwiched therebetween. The bonding is performed 2 by applying a pressure of 1 N / cm 2 or more and 500 N / cm 2 or less, preferably 11 N / cm 2 or more and 20 N / cm 2 or less after overlapping the semiconductor substrate and the substrate 700. When the pressure is applied, bonding of the semiconductor substrate and the insulating film 701 starts from that portion and finally spreads to the entire adhered surface. Next, by performing a heat treatment, the microvoids existing in the brittle layer combine with each other, increasing the volume of the microvoids. As a result, a single-crystalline semiconductor film, which is a part of the semiconductor substrate in the brittle layer, separates from the semiconductor substrate. The temperature of the above heat treatment is set to a temperature not exceeding the strain point of the substrate 700. Then, by processing the single-crystalline semiconductor film into a desired shape by etching or the like, island-shaped semiconductor films 702 and 703 can be formed.

[0159] The photodiode 704 is formed using an island-shaped semiconductor film 702 on an insulating film 701 and the n-channel transistor 705 is formed using an island-shaped semiconductor film 703 on the insulating film 701 Also, the photodiode 704 is of a lateral junction type in which a region 727 having p-type conductivity, a region 728 having i-type conductivity, and a region 729 having n-type conductivity are formed in the island-shaped semiconductor film 702 Also, the n-channel transistor 705 has a gate electrode 707. And the n-channel transistor 705 has an insulating film 708 between the island-shaped semiconductor film 703 and the gate electrode 707 Note that the region 728 having i-type conductivity refers to a region in the semiconductor film where the concentration of impurities imparting p-type or n-type is 1×10

[0160] cm or less and the photoconductivity is 100 times or more that of the dark conductivity. The region 728 having i-type conductivity also includes those having impurity elements of Group 13 or Group 15 of the periodic table. That is, an i-type semiconductor 20 cm -3 shows weak n-type electrical conductivity when impurity elements for valence electron control are not intentionally added, so the region 728 having i-type conductivity includes those in which impurity elements imparting p-type are intentionally or unintentionally added during film formation or after film formation There is no major limitation on the substrate that can be used as the substrate 700, but at least it is necessary to have heat resistance enough to withstand subsequent heat treatment. For example, the substrate 700 includes glass substrates, quartz substrates, ceramic substrates, etc. produced by the fusion method or the float method

[0161] ​​​​​​ can be used. As the glass substrate, when the temperature of the subsequent heat treatment is high, it is preferable to use one with a strain point of 730 °C or higher. Also, a metal substrate including a stainless steel substrate or a substrate formed by forming an insulating film on the surface of a silicon substrate may be used. A substrate made of a flexible synthetic resin such as plastic generally has a lower heat-resistant temperature compared to the above substrates, but it can be used if it can withstand the processing temperature in the manufacturing process.

[0162] In this embodiment, an example of forming the photodiode 704 and the n-channel type transistor 705 using a single-crystalline semiconductor film is described, but the present invention is not limited to this configuration. For example, a polycrystalline or microcrystalline semiconductor film formed by a vapor deposition method on the insulating film 701 may be used, or the above semiconductor film may be crystallized by a known technique. Known crystallization methods include a laser crystallization method using a laser beam and a crystallization method using a catalyst element. Alternatively, a crystallization method using a catalyst element and a laser crystallization method may be combined and used. When using a substrate with excellent heat resistance such as quartz, a thermal crystallization method using an electric furnace, a lamp annealing crystallization method using infrared light, a crystallization method using a catalyst element, or a crystallization method combining a high-temperature annealing method at about 950 °C may be used. °C may also be used.

[0163] Also, in Fig. 14(A), after forming a conductive film on the insulating film 708, the conductive film is processed into a desired shape by etching or the like to form the wiring 711 together with the gate electrode 707.

[0164] Next, as shown in Fig. 14(A), the photodiode 704, the n-channel transistor ​An insulating film 712 is formed so as to cover the contact plug 705 and the wiring 711. In the present embodiment , although the case of using a single-layer insulating film 712 is exemplified, the insulating film 712 does not necessarily have to be a single layer , and a two-layer or more insulating film may be laminated and used as the insulating film 712.

[0165] The insulating film 712 is made of a material that can withstand the temperature of the heat treatment in the subsequent manufacturing process. Specifically , as the insulating film 712, it is desirable to use silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, aluminum nitride , aluminum oxide, etc.

[0166] In this specification, oxynitride means a substance having a higher oxygen content than nitrogen in its composition, and nitroxide means a substance having a higher nitrogen content than oxygen in its composition .

[0167] The surface of the insulating film 712 may be planarized by a CMP method or the like.

[0168] Next, as shown in FIG. 14(A), a gate electrode 713 is formed on the insulating film 712.

[0169] The material of the gate electrode 713 can be a metal material such as molybdenum, titanium, chromium, tantalum, tungsten, iridium, scandium, a conductive film using an alloy material mainly composed of these metal materials, or nitrides of these metals, which can be used singly or in layers. In addition, if it can withstand the temperature of the heat treatment performed in the subsequent process, aluminum , copper can also be used as the above metal material. Aluminum or copper is preferably used in combination with a high melting point metal material in order to avoid problems of heat resistance and corrosion. As the high melting point metal material, Molybdenum, titanium, chromium, tantalum, tungsten, neodymium, scandium, etc. can be used. It is possible.

[0170] For example, as the gate electrode 713 having a two-layer stacked structure, a two-layer stacked structure in which a molybdenum film is stacked on an aluminum film, a two-layer structure in which a molybdenum film is stacked on a copper film, a two-layer structure in which a titanium nitride film or a tantalum nitride film is stacked on a copper film, or a two-layer structure in which a titanium nitride film and a molybdenum film are stacked is preferred. As the gate electrode 713 having a three-layer stacked structure, it is preferred to have a structure in which an aluminum film, an alloy film of aluminum and silicon, an alloy film of aluminum and titanium, or an alloy film of aluminum and neodymium is used as an intermediate layer, and a tungsten film, a tungsten nitride film, a titanium nitride film, or a titanium film is used as upper and lower layers. A two-layer structure in which a molybdenum film is stacked on an aluminum film, a two-layer structure in which a molybdenum film is stacked on a copper film, a two-layer structure in which a titanium nitride film or a tantalum nitride film is stacked on a copper film, or a two-layer structure in which a titanium nitride film and a molybdenum film are stacked. A two-layer structure in which a titanium nitride film or a tantalum nitride film is stacked, or a two-layer structure in which a titanium nitride film and a molybdenum film are stacked is preferred. For the gate electrode 713 having a three-layer stacked structure, it is preferred to have a structure in which an aluminum film, an alloy film of aluminum and silicon, an alloy film of aluminum and titanium, or an alloy film of aluminum and neodymium is used as an intermediate layer, and a tungsten film, a tungsten nitride film, a titanium nitride film, or a titanium film is used as upper and lower layers. As the gate electrode 713 having a three-layer stacked structure, it is preferred to have a structure in which an aluminum film, an alloy film of aluminum and silicon, an alloy film of aluminum and titanium, or an alloy film of aluminum and neodymium is used as an intermediate layer, and a tungsten film, a tungsten nitride film, a titanium nitride film, or a titanium film is used as upper and lower layers. An alloy film of aluminum and silicon, an alloy film of aluminum and titanium, or an alloy film of aluminum and neodymium is used as an intermediate layer, and a tungsten film, a tungsten nitride film, a titanium nitride film, or a titanium film is used as upper and lower layers. A structure in which a tungsten film, a tungsten nitride film, a titanium nitride film, or a titanium film is stacked as upper and lower layers is preferred. It is preferred.

[0171] In addition, an oxide conductive film having translucency such as indium oxide, an indium oxide-tin oxide mixture, an indium oxide-zinc oxide mixture, zinc oxide, zinc oxide-aluminum, aluminum zinc oxynitride, or zinc oxide-gallium can also be used for the gate electrode 713. An indium oxide-tin oxide mixture, an indium oxide-zinc oxide mixture, zinc oxide, zinc oxide-aluminum, aluminum zinc oxynitride, or zinc oxide-gallium. It is also possible to use an oxide conductive film having translucency such as indium oxide, an indium oxide-tin oxide mixture, an indium oxide-zinc oxide mixture, zinc oxide, zinc oxide-aluminum, aluminum zinc oxynitride, or zinc oxide-gallium.

[0172] The film thickness of the gate electrode 713 is 10 nm to 400 nm, preferably 100 nm to 200 nm. In this embodiment, after forming a conductive film for the gate electrode with a thickness of 150 nm by sputtering using a tungsten target, the conductive film is processed (patterned) into a desired shape by etching to form the gate electrode 713. When the end portion of the formed gate electrode has a tapered shape, the covering property of the gate insulating film stacked thereon is improved, which is preferable. After forming a conductive film for the gate electrode with a thickness of 150 nm by sputtering using a tungsten target, the conductive film is processed (patterned) into a desired shape by etching to form the gate electrode 713. When the end portion of the formed gate electrode has a tapered shape, the covering property of the gate insulating film stacked thereon is improved, which is preferable. When the end portion of the formed gate electrode has a tapered shape, the covering property of the gate insulating film stacked thereon is improved, which is preferable. It is preferable. Note that the resist mask may be formed by an inkjet method. Since forming the resist mask by the inkjet method does not use a photomask, the manufacturing cost can be reduced. .

[0173] Next, as shown in FIG. 14(B), a gate insulating film 714 is formed on the gate electrode 713. The gate insulating film 714 can be formed by using a plasma CVD method, a sputtering method, or the like, such as a single-layer or laminated silicon oxide film, silicon nitride film, silicon oxynitride film, nitrogen silicon oxide film, aluminum oxide film, aluminum nitride film, aluminum oxynitride film, nitrogen aluminum oxide film, hafnium oxide film, or tantalum oxide film. It is desirable that the gate insulating film 714 contains as few impurities as possible, such as moisture and hydrogen. When forming a silicon oxide film by sputtering, a silicon target or a quartz target is used as the target, and oxygen or a mixed gas of oxygen and argon is used as the sputtering gas. Since an oxide semiconductor (highly purified oxide semiconductor) from which impurities have been removed is extremely sensitive to interface levels and interface charges, the interface between the highly purified oxide semiconductor and the gate insulating film 714 is important. Therefore, the gate insulating film (GI) in contact with the highly purified oxide semiconductor is required to be of high quality. For example, high-density plasma CVD using microwaves (frequency 2.45 GHz) is preferable because it can form a high-quality insulating film that is dense and has high dielectric breakdown voltage. This is because when the highly purified oxide semiconductor and the high-quality gate insulating film are in close contact, the interface levels can be reduced and the interface characteristics can be improved.

[0174]

[0175]

[0176] Of course, as long as a high-quality insulating film can be formed as the gate insulating film 714, other film formation methods such as sputtering ring method or plasma CVD method can be applied. Also, an insulating film whose film quality and interface characteristics with the oxide semiconductor are improved by heat treatment after film formation may be used. In any case, not only should the film quality as the gate insulating film be good, but it is sufficient if it can reduce the interface level density between the gate insulating film and the oxide semiconductor and form a good interface. .

[0177] An insulating film using a material with high barrier properties and an insulating film such as a silicon oxide film or silicon oxynitride film with a low nitrogen content ratio may be laminated to form the gate insulating film 714 having a structure. In this case, the insulating film such as a silicon oxide film or silicon oxynitride film is formed between the insulating film with high barrier properties and the oxide semiconductor film. Examples of the insulating film with high barrier properties include a silicon nitride film, a silicon oxynitride film , an aluminum nitride film, or an aluminum oxynitride film. By using an insulating film with high barrier properties, impurities in the atmosphere such as moisture or hydrogen, or impurities such as alkali metals or heavy metals contained in the substrate can be prevented from entering the oxide semiconductor film, the gate insulating film 714, or the interface and its vicinity between the oxide semiconductor film and other insulating films. Also, by forming an insulating film such as a silicon oxide film or silicon oxynitride film with a low nitrogen content ratio in contact with the oxide semiconductor film, it is possible to prevent the insulating film with high barrier properties from directly contacting the oxide semiconductor film. .

[0178] For example, as the first gate insulating film, a silicon nitride film (SiN (y>0)) with a film thickness of 50 nm or more and 200 nm or less is formed by sputtering, and a second gate is formed on the first gate insulating film. y (y>0)) is formed, and a second gate is formed on the first gate insulating film. As the gate insulating film, a silicon oxide film (SiO x (x>0)) with a film thickness of 5 nm or more and 300 nm or less may be deposited to form a gate insulating film 714 with a film thickness of 100 nm. The film thickness of the gate insulating film 714 may be appropriately set according to the characteristics required for the transistor, and may be about 350 nm to 400 nm.

[0179] In this embodiment, a gate insulating film 71 4 having a structure in which a 100-nm-thick silicon oxide film formed by sputtering is laminated on a 50-nm-thick silicon nitride film formed by sputtering is formed.

[0180] Note that the gate insulating film 714 is in contact with the oxide semiconductor formed later. Since the characteristics of the oxide semiconductor are adversely affected by the inclusion of hydrogen, the gate insulating film 714 desirably contains no hydrogen, hydroxyl groups, and moisture. In order to minimize the inclusion of hydrogen, hydroxyl groups, and moisture in the gate insulating film 714, as a pretreatment for film formation, the substrate 700 on which the gate electrode 713 is formed is preheated in the preheating chamber of the sputtering apparatus, and the moisture adsorbed on the substrate 700 or impurities such as hydrogen are desorbed and exhausted. The preheating temperature is preferably 1 00 °C or higher and 400 °C or lower, more preferably 150 °C or higher and 300 °C or lower. The exhaust means provided in the preheating chamber is preferably a cryopump. Note that this preheating process may be omitted.

[0181] Next, an oxide semiconductor film with a film thickness of 2 nm or more and 200 nm or less, preferably a film thickness of 3 nm or more and 50 nm or less, and more preferably a film thickness of 3 nm or more and 20 nm or less is formed on the gate insulating film 714. The oxide semiconductor film is formed by sputtering using an oxide semiconductor as a target. Form a film. Further, the oxide semiconductor film is formed by sputtering in an atmosphere of a noble gas (for example, argon), an oxygen atmosphere, or in an atmosphere of a mixed gas of a noble gas (for example, argon) and oxygen. It can be done.

[0182] Note that before forming the oxide semiconductor film by sputtering, reverse sputtering is performed by introducing argon gas to generate plasma to remove dust adhering to the surface of the gate insulating film 714. Reverse sputtering is a method in which a voltage is applied to the substrate side using an RF power source in an argon atmosphere without applying a voltage to the target side to form plasma near the substrate and modify the surface. Note that nitrogen, helium, etc. may be used instead of the argon atmosphere. It is a method of modifying the surface. Note that nitrogen, helium, etc. may be used instead of the argon atmosphere. It is also possible to use nitrogen, helium, etc. instead of the argon atmosphere. Further, it may be performed in an atmosphere in which oxygen, nitrous oxide, etc. are added to the argon atmosphere. Further, it may be performed in an atmosphere in which chlorine, carbon tetrafluoride, etc. are added to the argon atmosphere. It is also possible to perform it in an atmosphere in which oxygen, nitrous oxide, etc. are added to the argon atmosphere. Further, it may be performed in an atmosphere in which chlorine, carbon tetrafluoride, etc. are added to the argon atmosphere. It is also possible to perform it in an atmosphere in which chlorine, carbon tetrafluoride, etc. are added to the argon atmosphere.

[0183] The oxide semiconductor to be used preferably contains at least indium (In) or zinc (Zn). It is particularly preferable to contain In and Zn. Further, as a stabilizer for reducing the variation in the electrical characteristics of the transistor using the oxide semiconductor, it is preferable to have gallium (Ga) added thereto. Further, it is preferable to have tin (Sn as a stabilizer. Further, it is preferable to have hafnium (Hf) as a stabilizer. Further, it is preferable to have aluminum (Al) as a stabilizer. Further, as other stabilizers, lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), which are lanthanoids, are used. are used. as a stabilizer. Further, it is preferable to have hafnium (Hf) as a stabilizer. Further, it is preferable to have aluminum (Al) as a stabilizer. Further, as other stabilizers, lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), which are lanthanoids, are used. are used. Further, as other stabilizers, lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), which are lanthanoids, are used. It may have any one or more of europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb). It may have any one or more of lutetium (Lu). Specifically, the oxide semiconductor film may include, as described above, indium oxide, tin oxide, zinc oxide, binary metal oxides such as In-Zn system oxides, Sn-Zn system oxides, Al-Zn system oxides, Zn-Mg system oxides, Sn-Mg system oxides, In-Mg system oxides, In-Ga system oxides, ternary metal oxides such as In-Ga-Zn system oxides (also denoted as IGZO), In-Al-Zn system oxides, In-Sn-Zn system oxides, Sn-Ga-Zn system oxides, Al-Ga-Zn system oxides, Sn-Al-Zn system oxides, In-Hf-Zn system oxides, In-La-Zn system oxides, In-Ce-Zn system oxides, In-Pr-Zn system oxides, In-Nd-Zn system oxides In-Sm-Zn system oxides, In-Eu-Zn system oxides, In-Gd-Zn system oxides In-Tb-Zn system oxides, In-Dy-Zn system oxides, In-Ho-Zn system oxides, In-Er-Zn system oxides, In-Tm-Zn system oxides, In-Yb-Zn system oxides, I n-Lu-Zn system oxides, and quaternary metal oxides such as In-Sn-Ga-Zn system oxides, In-Hf-Ga-Zn system oxides, In-Al-Ga-Zn system oxides, In-Sn-Al -Zn system oxides, In-Sn-Hf-Zn system oxides, In-Hf-Al-Zn system oxides can be used.

[0184] In this embodiment, an In-Ga-Zn system oxide semiconductor film with a film thickness of 30 nm obtained by sputtering using a target containing In (indium), Ga (gallium), and Zn (zinc). A thin film of a conductor is used as an oxide semiconductor film. When forming an In-Ga-Zn-based oxide semiconductor film by sputtering, preferably, a target of In-Ga-Zn-based oxide having an atomic ratio of In:Ga:Zn = 1:1:1, 4:2:3, 3:1:2, 1:1:2, 2:1:3, or 3:1:4 is used. By forming an oxide semiconductor film using a target of In-Ga-Zn-based oxide having the above atomic ratio, polycrystals or CAACs are easily formed. Further, the filling rate of the target containing In, Ga, and Zn is 90% or more and 100% or less, preferably 95% or more and less than 100%. By using a target with a high filling rate, the formed oxide semiconductor film becomes a dense film. When using a material of In-Zn-based oxide as the oxide semiconductor, the composition ratio of the target to be used is, in terms of atomic ratio, In:Zn = 50:1 to 1:2 (converted to molar ratio, In O :ZnO = 25:1 to 1:4), preferably In:Zn = 20:1 to 1:1 (converted to molar ratio, In O :ZnO = 10:1 to 1:2), more preferably In:Zn =

[0185] 15:1 to 1.5:1 (converted to molar ratio, In O 2 O 3 :ZnO = 15:2 to 3:4). For example, for a target used for forming an In-Zn-O-based oxide semiconductor, when the atomic ratio is In:Zn:O = X:Y:Z, Z > 1.5X + Y. By keeping the ratio of Zn within the above range, an improvement in mobility can be achieved. In this embodiment, a substrate is held in a processing chamber maintained in a reduced pressure state, and the residual moisture in the processing chamber 2 O 3 :ZnO = 10:1 to 1:2), more preferably In:Zn = 15:1 to 1.5:1 (converted to molar ratio, In 2 O 3 :ZnO = 15:2 to 3:4). For example, for a target used for forming an In-Zn-O-based oxide semiconductor, when the atomic ratio is In:Zn:O = X:Y:Z, Z > 1.5X + Y. By keeping the ratio of Zn within the above range, an improvement in mobility can be achieved. In this embodiment, a substrate is held in a processing chamber maintained in a reduced pressure state, and the residual moisture in the processing chamber is controlled.

[0186] In this embodiment, a substrate is held in a processing chamber maintained in a reduced pressure state, and the residual moisture in the processing chamber While removing , introduce a sputtering gas from which hydrogen and moisture have been removed, and use the above target to Form an oxide semiconductor film on the substrate 700. During film formation, the substrate temperature is 100 °C or higher and 600 °C Hereinafter, it may be preferably 200 °C or higher and 400 °C or lower. Film formation is carried out while heating the substrate By doing so, the impurity concentration contained in the formed oxide semiconductor film can be reduced. Also In addition, the damage caused by sputtering is reduced. In order to remove the residual moisture in the processing chamber, It is preferable to use an adsorption type vacuum pump. For example, a cryopump, an ion pump, It is preferable to use a titanium sublimation pump. Further, as the exhaust means, a turbo A pump with a cold trap added may be used. When evacuating the film formation chamber using a cryopump, for example, hydrogen atoms, water (H 2 O), etc., compounds containing hydrogen atoms (more preferably compounds containing carbon atoms as well) are exhausted, so that the concentration of impurities contained in the oxide semiconductor film formed in the film formation chamber can be reduced.

[0187] As an example of the film formation conditions, the distance between the substrate and the target is 100 mm, the pressure is 0.6 Pa The conditions under a direct current (DC) power supply of 0.5 kW and an oxygen (oxygen flow ratio 100%) atmosphere are applied It should be noted that when using a pulsed direct current (DC) power supply, the dust generated during film formation can be reduced, and the film thickness distribution becomes uniform, which is preferable.

[0188] In addition, in order to minimize the inclusion of hydrogen, hydroxyl groups, and moisture in the oxide semiconductor film, As a pre-treatment for film formation, the substrate 700 on which the gate insulating film 714 is formed up to the preheating chamber of the sputtering apparatus is preheated, and impurities such as moisture or hydrogen adsorbed on the substrate 700 are removed It is preferably discharged separately. The temperature of preheating is 100°C or higher and 400°C or lower, preferably 150°C or higher and 300°C or lower. The exhaust means provided in the preheating chamber is preferably a cryo pump. Note that this preheating process can also be omitted. Also, this preheating can be similarly performed on the substrate 700 formed with the conductive films 716 to 721 before the formation of the insulating film 722 which is to be performed later.

[0189] Next, as shown in FIG. 14(B), the oxide semiconductor film is processed (patterned) into a desired shape by etching or the like, and an island-shaped oxide semiconductor film 715 is formed at a position overlapping the gate electrode 713 on the gate insulating film 714.

[0190] A resist mask for forming the island-shaped oxide semiconductor film 715 may be formed by an inkjet method. When the resist mask is formed by the inkjet method, since a photomask is not used, the manufacturing cost can be reduced.

[0191] Note that the etching for forming the island-shaped oxide semiconductor film 715 may be dry etching, wet etching, or both may be used. As the etching gas used for dry etching, a gas containing chlorine (chlorine-based gas, for example, chlorine (Cl ), boron trichloride ( 2 ), silicon tetrachloride (SiCl ), carbon tetrachloride (CCl 3 ), etc.) is preferable. Also, 4 a gas containing fluorine (fluorine-based gas, for example, carbon tetrafluoride (CF 4 ), sulfur hexafluoride (SF ), nitrogen trifluoride (NF 4 ), trifluoromethane (CHF 6 ), etc.), hydrogen bromide (HB 3 ), etc.) is also preferable. 3 ) is preferable. Also, r), oxygen (O 2 ), and gases obtained by adding noble gases such as helium (He) and argon (Ar) to these gases can be used.

[0192] As the dry etching method, a parallel plate type RIE (Reactive Ion Etch ing) method or an ICP (Inductively Coupled Plasma) etching method can be used. The etching conditions (the amount of power applied to the coil-type electrode, the amount of power applied to the electrode on the substrate side, the electrode temperature on the substrate side, etc.) are appropriately adjusted so that etching can be performed into a desired processed shape.

[0193] ITO-07N (manufactured by Kanto Chemical Co., Inc.) may be used as the etching solution for wet etching.

[0194] Note that it is preferable to perform reverse sputtering before forming the conductive film in the next step to remove resist residues and the like adhering to the surfaces of the island-shaped oxide semiconductor film 715 and the gate insulating film 714.

[0195] Note that the oxide semiconductor film formed by sputtering or the like may contain a large amount of moisture or hydrogen as impurities. Since moisture or hydrogen easily forms donor levels, it is an impurity for the oxide semiconductor. Therefore, in one aspect of the present invention, in order to reduce impurities such as moisture or hydrogen in the oxide semiconductor film, the oxide semiconductor film 715 is heat-treated in an atmosphere of nitrogen, oxygen, ultra-dry air, or a noble gas (argon, helium, etc.). The above gas has a water content of 20 ppm or less, preferably ​​​​​​​​​​​It is preferably 1 ppm or less, more preferably 10 ppb or less.

[0196] By subjecting the oxide semiconductor film 715 to a heat treatment, moisture or water in the oxide semiconductor film 715 can be desorbed. Specifically, the heat treatment may be performed at 300°C or higher and 700°C or lower, preferably 3 00°C or higher and 500°C or lower. For example, it may be performed at about 500°C for 3 minutes or more and 6 minutes or less. If the RTA method is used for the heat treatment, dehydration or dehydrogenation can be performed in a short time, so that the treatment can be performed even at a temperature exceeding the strain point of the glass substrate.

[0197] In this embodiment, an electric furnace, which is one of the heat treatment apparatuses, is used.

[0198] Note that the heat treatment apparatus is not limited to an electric furnace, and it may be provided with an apparatus that heats an object to be treated by heat conduction or heat radiation from a heating element such as a resistance heating element. For example, an RTA (Rapid Thermal An neal) apparatus such as a GRTA (Gas Rapid Thermal Anneal) apparatus or an LRTA (Lamp Rapid Thermal Anneal) apparatus can be used. The LRTA apparatus is an apparatus that heats an object to be treated by radiation of light (electromagnetic waves) emitted from a lamp such as a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high-pressure sodium lamp, or a high-pressure mercury lamp. The GRTA apparatus is an apparatus that performs a heat treatment using a high-temperature gas. As the gas, a noble gas such as argon, or an inert gas such as nitrogen that does not react with the object to be treated by the heat treatment is used.

[0199] Note that in the heat treatment, nitrogen or a noble gas such as helium, neon, or argon is mixed with water It is preferable that it does not contain components such as minute amounts or hydrogen. Alternatively, the purity of nitrogen, helium, neon, argon or other rare gases introduced into the heat treatment apparatus is 6N (99.9999%) or higher , preferably 7N (99.99999%) or higher (that is, the impurity concentration is 1 ppm or lower, preferably 0.1 ppm or lower).

[0200] By the above steps, the concentration of hydrogen in the oxide semiconductor film 715 can be reduced and purified to a high purity. Thereby, the oxide semiconductor film can be stabilized. Further, by heat treatment at a temperature equal to or lower than the glass transition temperature, an oxide semiconductor film having a small carrier density due to hydrogen and a wide band gap can be formed. For this reason, a transistor can be manufactured using a large-area substrate, and mass productivity can be enhanced. When heating the oxide semiconductor film, depending on the material of the oxide semiconductor film and the heating conditions,

[0201] plate-like crystals may be formed on the surface thereof. The plate-like crystals are preferably single crystals having a c-axis orientation substantially perpendicular to the surface of the oxide semiconductor film. Further, even if it is not a single crystal, it is preferable that each crystal is a polycrystal having a c-axis orientation substantially perpendicular to the surface of the oxide semiconductor film. And in addition to the c-axis orientation, it is preferable that the ab planes of the respective crystals coincide, or the a-axis or the b-axis coincides. When there are irregularities on the lower surface of the oxide semiconductor film, the plate-like crystals become polycrystals. Therefore, it is desired that the lower surface is as flat as possible.

[0202] Next, the insulating film 708, the insulating film 712, and the gate insulating film 714 are partially etched. ​​​​Then, an island-shaped semiconductor film 702, an island-shaped semiconductor film 703, and a contact hole reaching the wiring 711 are formed.

[0203] Then, after forming a conductive film by sputtering or vacuum evaporation so as to cover the oxide semiconductor film 715, the conductive film is patterned by etching or the like, whereby conductive films 716 to 721 that function as source electrodes, drain electrodes, or wirings are formed as shown in FIG. 14(C).

[0204] Note that the conductive film 716 and the conductive film 717 are in contact with the island-shaped semiconductor film 702. The conductive films 718 and 719 are in contact with the island-shaped semiconductor film 703. The conductive film 720 is in contact with the wiring 711 and the oxide semiconductor film 715. The conductive film 721 is in contact with the oxide semiconductor film 715.

[0205] Examples of the material of the conductive film that becomes the conductive films 716 to 721 include elements selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, and tungsten, alloys containing the above-described elements as components, alloy films formed by combining the above-described elements, and the like. Further, a configuration in which a high melting point metal film such as chromium, tantalum, titanium, molybdenum, or tungsten is laminated on the lower side or the upper side of a metal film such as aluminum or copper may be used. Further, aluminum or copper is preferably used in combination with a high melting point metal material in order to avoid problems such as heat resistance and corrosion resistance. Examples of the high melting point metal material that can be used include molybdenum, titanium, chromium, tantalum, tungsten, neodymium, scandium, and yttrium.

[0206] Further, the conductive film may have a single-layer structure or a laminated structure of two or more layers. For example, silicon​​​​​​​​​​​​​ The single-layer structure of the aluminum film, the two-layer structure in which a titanium film is laminated on the aluminum film, titanium film, an aluminum film is laminated on the titanium film, and a titanium film is formed on the aluminum film, and a three-layer structure such as this can be mentioned.

[0207] In addition, as the conductive film that becomes the conductive films 716 to 721, it may be formed of a conductive metal oxide. As the conductive metal oxide, indium oxide, tin oxide, zinc oxide, indium tin oxide mixture, indium zinc oxide mixture, or those containing silicon or silicon oxide in the metal oxide material can be used.

[0208] When heat treatment is performed after forming the conductive film, it is preferable to give the conductive film heat resistance that can withstand this heat treatment.

[0209] In addition, when etching the conductive film, appropriately adjust each material and etching conditions so that the oxide semiconductor film 715 is not removed as much as possible. Depending on the etching conditions, a groove portion (recess) may be formed by partially etching the exposed portion of the island-shaped oxide semiconductor film 715.

[0210] In this embodiment, a titanium film is used for the conductive film. Therefore, it is possible to selectively wet-etch the conductive film using a solution containing ammonia and hydrogen peroxide water (ammonia peroxide), but the oxide semiconductor film 715 may also be partially etched. Specifically, use ammonia peroxide in which 31 % by weight of hydrogen peroxide water, 28% by weight of ammonia water, and water are mixed at a volume ratio of 5:2:2. Alternatively, chlorine (Cl 2 )), boron chloride (BCl 3 )), etc. ​​​​​​​​The conductive film may be dry-etched using the gas contained therein.

[0211] Note that in order to reduce the number of photomasks and the number of processes used in the photolithography process, a resist mask formed by a multi-tone mask that gives multi-stage intensity to the transmitted light may be used to perform the etching process. The resist mask formed using the multi-tone mask has a shape with a plurality of film thicknesses, and the shape can be further deformed by performing etching. Therefore, it can be used in a plurality of etching processes for processing into different patterns. Thus, a resist mask corresponding to at least two or more different patterns can be formed by a single multi-tone mask. Therefore, the number of exposure masks can be reduced, and the corresponding photolithography process can also be reduced, enabling simplification of the process.

[0212] Next, plasma treatment is performed using a gas such as N 2 O, N 2 , or Ar. This plasma treatment removes water and the like adhering to the surface of the exposed oxide semiconductor film. Also, plasma treatment may be performed using a mixed gas of oxygen and argon.

[0213] Note that after the plasma treatment, as shown in FIG. 14(C), an insulating film 722 is formed so as to cover the conductive films 716 to 72 1 and the oxide semiconductor film 715. The insulating film 722 desirably contains as few impurities as possible, such as moisture, hydrogen, and oxygen, and may be a single-layer insulating film or may be composed of a plurality of laminated insulating films. If hydrogen is contained in the insulating film 722 , the hydrogen penetrates into the oxide semiconductor film, or the hydrogen attracts oxygen in the oxide semiconductor film Etching may cause the back channel portion of the oxide semiconductor film to have a lower resistance (n-type conversion), resulting in the formation of a parasitic channel. Therefore, it is important that the insulating film 722 is formed by a film formation method that does not use hydrogen so that it contains as little hydrogen as possible. It is desirable to use a material with high barrier properties for the insulating film 722. For example, as the insulating film with high barrier properties, a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, or an aluminum oxynitride film can be used. When using a plurality of laminated insulating films, an insulating film such as a silicon oxide film or a silicon oxynitride film with a low nitrogen content ratio is formed closer to the oxide semiconductor film 715 than the insulating film with high barrier properties. Then, with an insulating film with a low nitrogen content ratio sandwiched therebetween, a high-barrier insulating film is formed so as to overlap with the conductive films 716 to 721 and the oxide semiconductor film 715. By using a high-barrier insulating film, it is possible to prevent impurities such as moisture or hydrogen from entering the oxide semiconductor film 715, the gate insulating film 714, or the interface between the oxide semiconductor film 715 and other insulating films and its vicinity. Also, by forming an insulating film such as a silicon oxide film or a silicon oxynitride film with a low nitrogen ratio so as to contact the oxide semiconductor film 715, it is possible to prevent the insulating film using a high-barrier material from directly contacting the oxide semiconductor film 715. There is a risk of forming a parasitic channel. Therefore, it is important that the insulating film 722 contains as little hydrogen as possible by not using hydrogen in the film formation method. For the insulating film 722 described above, it is desirable to use a material with high barrier properties. For example, as the insulating film with high barrier properties, a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, or an aluminum oxynitride film can be used. When using a plurality of laminated insulating films, an insulating film such as a silicon oxide film or a silicon oxynitride film with a low nitrogen content ratio is formed closer to the oxide semiconductor film 715 than the insulating film with high barrier properties. Then, with an insulating film with a low nitrogen content ratio sandwiched therebetween, a high-barrier insulating film is formed so as to overlap with the conductive films 716 to 721 and the oxide semiconductor film 715. By using a high-barrier insulating film, it is possible to prevent impurities such as moisture or hydrogen from entering the oxide semiconductor film 715, the gate insulating film 714, or the interface between the oxide semiconductor film 715 and other insulating films and its vicinity. Also, by forming an insulating film such as a silicon oxide film or a silicon oxynitride film with a low nitrogen ratio so as to contact the oxide semiconductor film 715, it is possible to prevent the insulating film using a high-barrier material from directly contacting the oxide semiconductor film 715. In this embodiment, an insulating film 722 having a structure in which a 100-nm-thick silicon nitride film formed by sputtering is laminated on a 200-nm-thick silicon oxide film formed by sputtering is formed. The substrate temperature during film formation may be from room temperature to 300°C, and in this embodiment, it is 100°C. There is a risk of forming a parasitic channel. Therefore, it is important that the insulating film 722 contains as little hydrogen as possible by not using hydrogen in the film formation method. For the insulating film 722 described above, it is desirable to use a material with high barrier properties. For example, as the insulating film with high barrier properties, a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, or an aluminum oxynitride film can be used. When using a plurality of laminated insulating films, an insulating film such as a silicon oxide film or a silicon oxynitride film with a low nitrogen content ratio is formed closer to the oxide semiconductor film 715 than the insulating film with high barrier properties. Then, with an insulating film with a low nitrogen content ratio sandwiched therebetween, a high-barrier insulating film is formed so as to overlap with the conductive films 716 to 721 and the oxide semiconductor film 715.

[0214] In this embodiment, an insulating film 722 having a structure in which a 100-nm-thick silicon nitride film formed by sputtering is laminated on a 200-nm-thick silicon oxide film formed by sputtering is formed. The substrate temperature during film formation may be from room temperature to 300°C, and in this embodiment, it is 100°C. The substrate temperature during film formation may be from room temperature to 300°C, and in this embodiment, it is 100°C. In this embodiment, it is 100°C.

[0215] Note that heat treatment may be performed after the insulating film 722 is formed. In an atmosphere of dry air or rare gas (argon, helium, etc.), preferably for 20 The temperature is between 0°C and 400°C, for example between 250°C and 350°C. The content is 20 ppm or less, preferably 1 ppm or less, and more preferably 10 ppb or less. In this embodiment, for example, the heat treatment is performed at 250° C. for 1 hour in a nitrogen atmosphere. Alternatively, before the conductive films 716 to 721 are formed, moisture or hydrogen is reduced. In the same manner as the heat treatment performed on the oxide semiconductor film for the purpose of After the insulating film 722 containing oxygen is provided, heat treatment may be performed. As a result, the oxide semiconductor film 715 Even if oxygen vacancies occur in the oxide semiconductor film 715, oxygen is supplied from the insulating film 722 to the oxide semiconductor film 715. Then, oxygen is supplied to the oxide semiconductor film 715, so that the oxide semiconductor film 7 In 15, it is possible to reduce the oxygen vacancies that act as donors and satisfy the stoichiometric composition ratio. The oxide semiconductor film 715 contains oxygen in an amount exceeding the stoichiometric ratio. As a result, the oxide semiconductor film 715 can be made closer to an i-type semiconductor, and oxygen vacancies can be reduced. This reduces the variation in the electrical characteristics of transistors caused by the The timing of this heat treatment is not particularly limited as long as it is performed after the insulating film 722 is formed. Other processes, such as heat treatment during resin film formation and heating to reduce the resistance of the transparent conductive film, By combining the above-mentioned treatment with the above-mentioned treatment, the oxide semiconductor film 715 can be made closer to an i-type film without increasing the number of steps. It is possible.

[0216] In addition, by performing heat treatment on the oxide semiconductor film 715 in an oxygen atmosphere, the oxide semiconductor In this case, oxygen vacancies serving as donors in the oxide semiconductor film 715 may be reduced by adding oxygen. The temperature of the heat treatment is, for example, 100° C. or higher and lower than 350° C., preferably 150° C. or higher and lower than 250° C. The oxygen gas used in the heat treatment in the oxygen atmosphere contains water, hydrogen, etc. It is preferable that the purity of the oxygen gas introduced into the heat treatment device is not more than 6N ( 99.9999%) or more, preferably 7N (99.99999%) or more (i.e., oxygen It is preferable to keep the impurity concentration at 1 ppm or less, and preferably at 0.1 ppm or less.

[0217] Alternatively, the oxide semiconductor film 715 may be formed by ion implantation, ion doping, or the like. By adding oxygen, the donor oxygen vacancies can be reduced. For example, 2.45G Oxygen plasma generated by microwaves at 100 Hz may be added to the oxide semiconductor film 715 .

[0218] Note that after a conductive film is formed over the insulating film 722, the conductive film is patterned to form an oxide film. A back gate electrode may be formed at a position overlapping with the organic semiconductor film 715. In the case where a back gate electrode is formed, it is preferable to form an insulating film so as to cover the back gate electrode. The gate electrode is made of the same material as the gate electrode 713 or the conductive films 716 to 721. It is possible to form the structure.

[0219] The thickness of the back gate electrode is 10 nm to 400 nm, preferably 100 nm to 200 nm. For example, a conductive film having a structure in which a titanium film, an aluminum film, and a titanium film are stacked is used. After forming the resist mask, a resist mask is formed by photolithography or the like, and then etching is performed. By removing more unnecessary portions and processing (patterning) the conductive film into a desired shape, it is preferable to form a back gate electrode.

[0220] Through the above steps, the transistor 724 is formed.

[0221] The transistor 724 includes a gate electrode 713, a gate insulating film 714 on the gate electrode 713, an oxide semiconductor film 715 overlapping the gate electrode 713 on the gate insulating film 714, a pair of conductive films 720 or conductive films 721 formed on the oxide semiconductor film 715, and may further include an insulating film 722 in its components. The transistor 724 shown in FIG. 14(C) has a channel etch structure in which a part of the oxide semiconductor film 715 is etched between the conductive film 720 and the conductive film 721.

[0222] Although the transistor 724 has been described using a single gate structure transistor, if necessary, by having a plurality of gate electrodes 713 electrically connected, it is also possible to form a multi-gate structure transistor having a plurality of channel formation regions.

[0223] This embodiment can be implemented in combination with the above embodiment.

[0224] (Embodiment 4) In this embodiment, a transistor using an oxide semiconductor film having a structure different from that of Embodiment 3 will be described.

[0225] In the solid-state imaging device or semiconductor display device shown in FIG. 15(A), similar to Embodiment 3, it has a photodiode 704 and an n-channel type transistor 705. And, in the figure, ​​​​ In 15(A), on the photodiode 704 and the n-channel transistor 705, a bottom-gate transistor 724 with a channel protection structure using an oxide semiconductor film is formed.

[0226] The transistor 724 includes a gate electrode 730 formed on the insulating film 712, a gate insulating film 731 on the gate electrode 730, an oxide semiconductor film 732 overlapping the gate electrode 730 on the gate insulating film 731, a channel protection film 733 formed on the oxide semiconductor film 732 at a position overlapping the gate electrode 730, and conductive films 734 and 735 formed on the oxide semiconductor film 732. Further, the transistor 724 may include an insulating film 736 formed on the conductive films 734, 735, and the channel protection film 733 as its components.

[0227] By providing the channel protection film 733, damage such as film reduction due to plasma or an etching agent during etching in a later process can be prevented to the portion of the oxide semiconductor film 732 that becomes the channel formation region. Therefore, the reliability of the transistor can be improved.

[0228] For the channel protection film 733, an inorganic material containing oxygen (such as silicon oxide, silicon oxynitride, silicon nitride oxide, aluminum oxide, or aluminum oxynitride) can be used. The channel protection film 733 can be formed using a vapor deposition method such as plasma CVD or thermal CVD or a sputtering method. The channel protection film 733 is processed into a shape by etching after film formation. Here, a silicon oxide film is formed by sputtering, and photolithography is used. A channel protective film 733 is formed by etching using the mask.

[0229] By using an inorganic material containing oxygen for the channel protective film 733, moisture or hydrogen is reduced. Even if oxygen vacancies are generated in the oxide semiconductor film 732 by the heat treatment for the oxidation, Oxygen is supplied to the nitride semiconductor film 732 from the channel protective film 733 to fill the oxygen vacancies that serve as donors. The oxide semiconductor film 732 can be reduced to satisfy the stoichiometric composition. It is preferable that the amount of oxygen contained in the catalyst exceeds the stoichiometric composition ratio. The channel forming region can be made closer to the i-type, and the electric field of the transistor 724 due to oxygen vacancies can be reduced. It is possible to reduce the variation in characteristics and achieve improved electrical characteristics.

[0230] The solid-state imaging device or semiconductor display device shown in FIG. 15B is a crystalline solid-state imaging device or a semiconductor display device similar to the third embodiment. The photodiode 704 is made of conductive silicon, and the n-channel transistor 705 is made of conductive silicon. In FIG. 15B, a photodiode 704 and an n-channel transistor A bottom-contact transistor 724 using an oxide semiconductor film is formed over the transistor 705. It has been made.

[0231] The transistor 724 includes a gate electrode 741 formed on an insulating film 712 and a gate electrode 7 A gate insulating film 742 on the gate insulating film 742, a conductive film 743 on the gate insulating film 742, and a conductive film 744 The oxide semiconductor film 74 overlaps the gate electrode 741 with the gate insulating film 742 interposed therebetween. Further, the transistor 724 has a first insulating film formed over an oxide semiconductor film 745. An insulating film 746 may be included as a component thereof.

[0232] Note that the transistor 724 shown in this embodiment may further have a back gate electrode. It is also acceptable.

[0233] This embodiment can be implemented in combination with the above-described embodiment.

[0234] (Embodiment 5) In this embodiment, a configuration example of a transistor will be described. Note that the same parts or parts having similar functions, and processes, are performed in the same manner as in the above-described embodiment, and repeated explanations in this embodiment are omitted. Note that detailed explanations of the same parts are also omitted. It is possible, and the repeated explanations in this embodiment are omitted. Note that the detailed explanations of the same parts are also omitted. will be omitted.

[0235] In the transistor 2450 shown in FIG. 19(A), a gate electrode 2401 is formed on a substrate 2400, a gate insulating film 2402 is formed on the gate electrode 2401, an oxide semiconductor film 2403 is formed on the gate insulating film 2402, and a source electrode 2 405a and a drain electrode 2405b are formed on the oxide semiconductor film 2403. Further, an insulating film 2407 is formed on the oxide semiconductor film 240 3, the source electrode 2405a, and the drain electrode 2405b. Further, an insulating film 2409 may be formed on the insulating film 2407. The transistor 24 50 is one of the transistors having a bottom gate structure and is also one of the reverse staggered transistors. is formed. 50 is one of the transistors having a bottom gate structure and is also one of the reverse staggered transistors.

[0236] In the transistor 2460 shown in FIG. 19(B), a gate electrode 2401 is formed on a substrate 2400, a gate insulating film 2402 is formed on the gate electrode 2401, an oxide semiconductor film 2403 is formed on the gate insulating film 240 2, and a channel protection film is formed on the oxide semiconductor film 2403. 2406 is formed, and source electrode 2405a and drain electrode 2405b are formed on the channel protection film 2406 and the oxide semiconductor film 2403. Also, an insulating film 2409 may be formed on the source electrode 24 05a and the drain electrode 2405b. The transistor 2460 is one of the bottom gate structures called channel protection type (also referred to as channel stop type), and is also one of the reverse staggered type transistors. The channel protection film 2406 can be formed using the same materials and methods as other insulating films.

[0237] For the transistor 2470 shown in FIG. 19(C), a base film 2436 is formed on the substrate 2400 and an oxide semiconductor film 2403 is formed on the base film 2436. Source electrode 2405a and drain electrode 2405b are formed on the oxide semiconductor film 2403 and the base film 2436. A gate insulating film 2402 is formed on the oxide semiconductor film 2403, the source electrode 2405a, and the drain electrode 2405b, and a gate electrode 2401 is formed on the gate insulating film 2402 . Also, an insulating film 2409 may be formed on the gate electrode 2401. The transistor 2470 is one of the transistors with a top gate structure.

[0238] For the transistor 2480 shown in FIG. 19(D), a gate electrode 2411 is formed on the substrate 2400 and a first gate insulating film 2413 is formed on the gate electrode 2411. An oxide semiconductor film 2403 is formed on the first gate insulating film 2413, and source electrode 2405a and drain electrode 2405 b are formed on the oxide semiconductor film 2403 and the first gate insulating film 2413. Also, on the oxide semiconductor film 2403, the source electrode 2405a, and the drain A second gate insulating film 2414 is formed on the in - electrode 2405b, and a back - gate electrode 2412 is formed on the second gate insulating film 2 414. Also, an insulating film 2409 may be formed on the back - gate electrode 241 2.

[0239] The transistor 2480 has a structure combining the transistor 2450 and the transistor 2470.

[0240] By changing the potential of the back - gate electrode, the threshold voltage of the transistor can be changed. The back - gate electrode is formed so as to overlap with the channel - forming region of the oxide semiconductor film 2403. The back - gate electrode may be in a floating state that is electrically insulated, or may be in a state where a potential is applied. In the latter case, the back - gate electrode may be given a potential at the same height as the gate electrode, or may be given a fixed potential such as ground. By controlling the height of the potential applied to the back - gate electrode, the threshold voltage of the transistor can be controlled.

[0241] Also, by completely covering the oxide semiconductor film 2403 with the back - gate electrode, the source electrode 2405a, and the drain electrode 2405b, light incident on the oxide semiconductor film 2 403 from the back - gate electrode side can be prevented. Therefore, light degradation of the oxide semiconductor film 2403 can be prevented, and deterioration of characteristics such as shift of the threshold voltage of the transistor can be prevented.

[0242] The insulating films in contact with the oxide semiconductor film 2403 (in this embodiment, the gate insulating film 240 2, the insulating film 2407, the channel protection film 2406, the base film 2436, the first gate insulating film 2​​​​​ 413 corresponds to the second gate insulating film 2414. ) preferably uses an insulating material containing group 13 elements and oxygen. Many oxide semiconductor materials contain group 13 elements and an insulating material containing group 13 elements has good compatibility with an oxide semiconductor. By using this as the insulating film in contact with the oxide semiconductor , the state of the interface with the oxide semiconductor can be kept good. The insulating material containing group 13 elements means that the insulating material contains one or more group 13 elements. Examples of the insulating material containing group 13 elements include gallium oxide, aluminum oxide

[0243] aluminum gallium oxide, gallium aluminum oxide, etc. Here, aluminum gallium oxide refers to the one in which the content of aluminum (atomic %) is more than the content of gallium (atomic %), and gallium aluminum oxide refers to the one in which the content of gallium (atomic %) is equal to or more than the content of aluminum (atomic %). For example, when forming an insulating film in contact with a gallium-containing oxide semiconductor film, using a material containing gallium oxide in the insulating film can keep the interface characteristics between the oxide semiconductor film and the insulating film good . For example, by providing the oxide semiconductor film in contact with the insulating film containing gallium oxide , the hydrogen pile-up at the interface between the oxide semiconductor film and the insulating film can be reduced. When using an element of the same group as the component element of the oxide semiconductor in the insulating film , the same effect can be obtained. For example, it is also effective to form an insulating film using a material containing aluminum oxide. Since aluminum oxide has the property of being difficult to permeate water

[0244] using this material can prevent water from entering the oxide semiconductor film. is also preferable.

[0245] In addition, the insulating film in contact with the oxide semiconductor film 2403 is preferably in a state where oxygen is more than the stoichiometric composition ratio of the insulating material by heat treatment in an oxygen atmosphere, oxygen doping, or the like. Oxygen doping means adding oxygen to the bulk. The term "bulk" is used to clarify that oxygen is added not only to the thin film surface but also to the inside of the thin film. Also, oxygen doping includes oxygen plasma doping in which plasmaized oxygen is added to the bulk. In addition, oxygen doping may be performed using an ion implantation method or an ion doping method. For example, when gallium oxide is used as the insulating film in contact with the oxide semiconductor film 2403, the composition of gallium oxide can be made Ga O

[0246] (X = 3 + α, 0 < α < 1) by heat treatment in an oxygen atmosphere or oxygen doping. Also, when aluminum oxide is used as the insulating film in contact with the oxide semiconductor film 2403, the composition of aluminum oxide can be made A 2 l X (X = 3 + α, 0 < α < 1) by heat treatment in an oxygen atmosphere or oxygen doping.

[0247] In addition, when gallium aluminum oxide (aluminum gallium oxide) is used as the insulating film in contact with the oxide semiconductor film 2403, the composition of gallium aluminum oxide (aluminum gallium oxide) can be made Ga Al l 2 O X (X = 3 + α, 0 < α < 1) by heat treatment in an oxygen atmosphere or oxygen doping.

[0248] In addition, when gallium aluminum oxide (aluminum gallium oxide) is used as the insulating film in contact with the oxide semiconductor film 2403, the composition of gallium aluminum oxide (aluminum gallium oxide) can be made Ga Al O X Al 2-X O 3+αIt can be set as (0 < X < 2, 0 < α < 1).

[0249] By performing oxygen doping treatment, an insulating film having a region where oxygen is more than the stoichiometric composition ratio can be formed. When an insulating film having such a region is in contact with an oxide semiconductor film, excess oxygen in the insulating film is supplied to the oxide semiconductor film, and oxygen deficiency in the oxide semiconductor film or at the interface between the oxide semiconductor film and the insulating film is reduced, and the oxide semiconductor film can be made into an i-type or an oxide semiconductor that is infinitely close to the i-type. Note that the insulating film having a region where oxygen is more than the stoichiometric composition ratio may be used for only one of the upper insulating film or the lower insulating film among the insulating films in contact with the oxide semiconductor film 2403, but it is preferable to use both insulating films. By using the insulating film having a region where oxygen is more than the stoichiometric composition ratio for the upper and lower insulating films in contact with the oxide semiconductor film 2403 and sandwiching the oxide semiconductor film 2403, the above-described effect can be further enhanced. Also, the insulating film used for the upper layer or the lower layer of the oxide semiconductor film 2403 may be an insulating film having the same constituent elements in the upper layer and the lower layer, or an insulating film having different constituent elements. For example, both the upper layer and the lower layer may be gallium oxide with the composition of Ga(X = 3 + α, 0 < α < 1), or one of the upper layer and the lower layer may be gallium oxide with the composition of Ga(X = 3 + α, 0 < α < 1), and the other may be aluminum oxide with the composition of Al(X = 3 + α, 0 < α < 1).

[0250]

[0251] 2 X 2 X 2 X ​​​​​​​​​​​​​​​​​​It is also possible to use this method.

[0252] In addition, the insulating film in contact with the oxide semiconductor film 2403 has a region having more oxygen than the stoichiometric composition. For example, an insulating film having a composition of G may be provided over the oxide semiconductor film 2403. a 2 O X (X=3+α, 0<α<1) gallium oxide is formed, and the composition of Ga X A l 2-X O 3+α (0 <X<2、0<α<1)の酸化ガリウムアルミニウム(酸化アルミ Note that a lower layer of the oxide semiconductor film 2403 may be formed using a stoichiometric Alternatively, the oxide semiconductor film 24 may be a stack of insulating films each having a region with a higher oxygen content than the oxide semiconductor film 24. Both the upper and lower layers of 03 are made of insulating films having regions with more oxygen than the stoichiometric composition ratio. It may also be layered.

[0253] This embodiment mode can be implemented in appropriate combination with other embodiment modes. EXAMPLES

[0254] In this example, a panel and a backlight in a semiconductor display device according to one embodiment of the present invention are The arrangement will be explained.

[0255] FIG. 17 is an example of a perspective view showing a structure of a semiconductor display device according to one embodiment of the present invention. In the semiconductor display device shown in FIG. 7, a pixel including a display element and a photosensor is formed between a pair of substrates. The panel 1601 is a first diffuser plate 1602, a prism sheet 1603, and a second diffuser plate 1604. A light emitting diode having a diffuser 1604, a light guide plate 1605, a reflector 1606, and a plurality of light sources 1607. The display device includes a backlight 1608 and a circuit board 1609.

[0256] Panel 1601, a first diffusion plate 1602, a prism sheet 1603, a second diffusion plate 1604, a light guide plate 1605, and a reflector 1606 are laminated in this order. A light source 160 7 is provided at an end of the light guide plate 1605, and the light source 16 diffused inside the light guide plate 1605 The light from 07 is uniformly irradiated onto the panel 1601 from the side of the opposing substrate by the first diffusion plate 1602, the prism sheet 1603, and the second diffusion plate 16 04.

[0257] In this embodiment, the first diffusion plate 1602 and the second diffusion plate 1604 are used, but the number of diffusion plates is not limited to this, and it may be a single one or three or more. And the diffusion plate only needs to be provided between the light guide plate 1605 and the panel 1601. Therefore, the diffusion plate may be provided only on the side closer to the panel 1601 than the prism sheet 1603, or the diffusion plate may be provided only on the side closer to the light guide plate 1605 than the prism sheet 1603.

[0258] Also, the prism sheet 1603 is not limited to the shape with a sawtooth cross-section shown in FIG. 17, and it only needs to have a shape capable of condensing the light from the light guide plate 1605 toward the panel 1601 side.

[0259] The circuit board 1609 is provided with circuits for generating or processing various signals input to the panel 1601, circuits for processing various signals output from the panel 1601, and the like. And in FIG. 17, the circuit board 1609 and the panel 1601 are connected via an FPC (Flexible P rinted Circuit) 1611. Note that the above circuit may be connected to the panel 1601 using the COG (Chip ON Glass) method. ​​​A part of the above circuit may be connected to the FPC1611 using the COF (Chip ON Film) method. It may be connected.

[0260] In FIG. 17, a circuit of a control system that controls the driving of the light source 1607 is provided on the circuit board 1609, and an example in which the circuit of the control system and the light source 1607 are connected via the FPC1610 is shown. However, the circuit of the control system may be formed on the panel 1601, and in this case, the panel 1601 and the light source 1607 are connected by an FPC or the like.

[0261] The plurality of light sources 1607 emit light of different colors. As the light source 1607, for example, a light emitting element such as an LED or an OLED can be used.

[0262] Note that FIG. 17 illustrates an edge light type light source in which the light source 1607 is disposed at the edge of the panel 1601, but in the semiconductor display device according to one aspect of the present invention, the light source 1607 may be a direct type disposed directly below the panel 1601.

[0263] For example, when the finger 1612, which is the object to be detected, is brought close to the panel 1601, the light from the backlight 1608 passes through the panel 1601, a part of which is reflected by the finger 1612 and then enters the panel 1601 again. By sequentially lighting the light sources 1607 corresponding to each color and acquiring imaging data for each color, it is possible to obtain imaging data of the color of the finger 1612, which is the object to be detected.

[0264] This embodiment can be implemented in appropriate combination with the above-described embodiment.

Embodiment

[0265] Since the solid-state imaging device or semiconductor display device according to one aspect of the present invention uses FS driving it is possible to acquire high-resolution image data, and since it adopts a global shutter method even when the subject is moving, it is possible to obtain high-quality image data. Therefore, an electronic device using the solid-state imaging device or semiconductor display device according to one aspect of the present invention can be equipped with a more highly functional application by adding the solid-state imaging device or semiconductor display device as a component thereof. Alternatively, since the solid-state imaging device or semiconductor display device according to one aspect of the present invention uses FS driving, it has the feature of low power consumption. Therefore, an electronic device using the solid-state imaging device or semiconductor display device according to one aspect of the present invention can reduce power consumption by adding the solid-state imaging device or semiconductor display device as a component thereof.

[0266] The solid-state imaging device or semiconductor display device according to one aspect of the present invention can be used in a display device, a notebook personal computer, an image playback device equipped with a recording medium (typically a device having a display capable of playing back a recording medium such as a DVD:Digital Versatile Disc and displaying its image). In addition, as an electronic device that can use the solid-state imaging device or semiconductor display device according to one aspect of the present invention, a mobile phone, a portable game machine, a portable information terminal, an electronic book, a video camera, a digital still camera, a goggle-type display (head-mounted display), a navigation system, an audio playback device (car audio, digital audio player, etc.), a copying machine, a facsimile machine, a printer, ​​​Examples include a multifunction printer, an automated teller machine (ATM), a vending machine, etc. Specific examples of these electronic devices are shown in FIG. 18.

[0267] FIG. 18(A) is a display device, which has a housing 5001, a display unit 5002, a support base 5003, etc. The semiconductor display device according to one aspect of the present invention can be used for the display unit 5002. By using the semiconductor display device according to one aspect of the present invention for the display unit 5002, it is possible to acquire high-resolution and high-quality image data, and a display device equipped with a more highly functional application can be provided. Alternatively, by using the semiconductor display device according to one aspect of the present invention for the display unit 5002, the power consumption of the display device can be reduced. Note that the display device includes all information display devices for personal computers, TV broadcast reception, advertisement display, etc.

[0268] FIG. 18(B) is a portable information terminal, which has a housing 5101, a display unit 5102, operation keys 5103, etc. The semiconductor display device according to one aspect of the present invention can be used for the display unit 5102. By using the semiconductor display device according to one aspect of the present invention for the display unit 5102, high-resolution and high-quality image data can be acquired, and a portable information terminal equipped with a more highly functional application can be provided. Alternatively, by using the semiconductor display device according to one aspect of the present invention for the display unit 5102, the power consumption of the portable information terminal can be reduced.

[0269] FIG. 18(C) is an automated teller machine, which has a housing 5201, a display unit 5202, a coin insertion slot 5203, a bill insertion slot 5204, a card insertion slot 5205, a passbook insertion slot 5206, etc. ​​​​It can be used for the display unit 5202. By using the semiconductor display device according to one aspect of the present invention for the display unit 5202, high-resolution and high- quality image data can be acquired, and a more highly functional application can be installed to provide a cash dispenser. Alternatively, by using the semiconductor display device according to one aspect of the present invention for the display unit 5202, the power consumption of the cash dispenser can be reduced. And the cash dispenser using the semiconductor display device according to one aspect of the present invention can more accurately read biometric information such as fingerprints, faces, handprints, palm prints, vein patterns of hands, and irises used for biometric authentication. Therefore, in biometric authentication, the false rejection rate of misidentifying as not the person even though it is the person, and the false acceptance rate of misidentifying as the person even though it is another person can be kept low.

[0270] FIG. 18(D) shows a portable game machine, which includes a housing 5301, a housing 5302, a display unit 5303, a display unit 5304, a microphone 5305, a speaker 5306, operation keys 5307, a start button 5308, etc. The semiconductor display device according to one aspect of the present invention can be used for the display unit 5303 or the display unit 5304. By using the semiconductor display device according to one aspect of the present invention for the display unit 5303 or the display unit 5304, high-resolution and high-quality image data can be obtained, and a more highly functional portable game machine can be provided. Alternatively, by using the semiconductor display device according to one aspect of the present invention for the display unit 5303 or the display unit 5304, the power consumption of the portable game machine can be reduced. Note that the portable game machine shown in Fig. 18(D) has two display units 5303 and display unit 530 4, but the number of display units of the portable game machine is not limited to this.

[0271] Fig. 18(E) shows a mobile phone, which has a housing 5401, a display unit 5402, a voice input unit 5403, a voice output unit 5404, operation keys 5405, a light receiving unit 5406, etc. By converting the light received by the light receiving unit 5406 into an electrical signal, an external image can be captured. The semiconductor display device according to one aspect of the present invention can be used for the display unit 5402. By using the semiconductor display device according to one aspect of the present invention for the display unit 5 402, it is possible to acquire high-resolution and high-quality image data, and a mobile phone equipped with more highly functional applications can be provided. Alternatively, by using the semiconductor display de vice according to one aspect of the present invention for the display unit 5402, the power consumption of the mobile phone can be reduced. Further, the solid-state imaging device according to one aspect of the present invention can be used to convert the light received by the light receiving unit 5406 into an electrical signal. By using the solid-state imaging device according to one aspect of the present invention, it is possible to acquire high-resolution and high-quality image data, and a mobile phone equipped with more highly functional applications can be provided. Alternatively, by using the solid-state imaging de vice according to one aspect of the present invention, the power consumption of the mobile phone can be

[0272] reduced. This embodiment can be implemented in appropriate combination with the above-described embodiment or the above-described examples.

Description of Reference Numerals

[0273] 101 Photo sensor 102 Photodiode 103 Amplifier circuit 104 Transistor 105 Transistor 106 Transistor 107 Transistor 120 Pixel 121 Display element 122 Liquid crystal element 123 Transistor 124 Capacitor element 201 Conductive film 202 Conductive film 203 Conductive film 204 Pixel electrode 205 Conductive film 206 Conductive film 210 Conductive film 211 Conductive film 212 Conductive film 213 Conductive film 214 Conductive film 215 Semiconductor film 216 Semiconductor film 217 Semiconductor film 218 Conductive film 219 Conductive film 220 Conductive film 221 Conductive film 222 Conductive film 223 Conductive film 224 Conductive film 225 Conductive film 226 Conductive film 227 Conductive film 228 Gate insulating film 231 Insulating film 232 Substrate 233 Counter electrode 234 Liquid crystal layer 235 Masking film 236 Substrate 250 Active layer 251 Substrate 253 Active layer 300 Exposure period 301 Readout period 302 Charge holding period 700 Substrate 701 Insulating film 702 Semiconductor film 703 Semiconductor film 704 Photodiode 705 n-channel transistor 707 Gate electrode 708 Insulating film 711 Wiring 712 Insulating film 713 Gate electrode 714 Gate insulating film 715 Oxide semiconductor film 716 Conductive film 717 Conductive film 718 Conductive film 719 Conductive film 720 Conductive film 721 Conductive film 722 Insulating film 724 Transistor 727 Region with p-type conductivity 728 Region with i-type conductivity 729 Region with n-type conductivity 730 Gate electrode 731 Gate insulating film 732 Oxide semiconductor film 733 Channel protection film 734 Conductive film 735 Conductive film 736 Insulating film 741 Gate electrode 742 Gate insulating film 743 Conductive film 744 Conductive film 745 Oxide semiconductor film 746 Insulating film 1601 Panel 1602 Diffuser 1603 Prism sheet 1604 Diffuser 1605 Light guide plate 1606 Reflector 1607 Light source 1608 Backlight 1609 Circuit board 1610 FPC 1611 FPC 1612 Finger 2400 Substrate 2401 Gate Electrode 2402 Gate Insulating Film 2403 Oxide Semiconductor Film 2405a Source Electrode 2405b Drain Electrode 2406 Channel Protection Film 2407 Insulating Film 2409 Insulating Film 2411 Gate Electrode 2412 Back Gate Electrode 2413 Gate Insulating Film 2414 Gate Insulating Film 2436 Underlayer Film 2450 Transistor 2460 Transistor 2470 Transistor 2480 Transistor 5001 Housing 5002 Display Unit 5003 Support Stand 5101 Housing 5102 Display Unit 5103 Operation Key 5201 Housing 5202 Display Unit 5203 Coin Insertion Slot 5204 Banknote Insertion Slot 5205 Card Insertion Slot 5206 Passbook Insertion Slot 5301 Housing 5302 Housing 5303 Display Unit 5304 Display Unit 5305 Microphone 5306 Speaker 5307 Operation Key 5308 Stylus 5401 Housing 5402 Display Unit 5403 Voice Input Section 5404 Voice Output Section 5405 Operation key 5406 Light-receiving part

Claims

[Claim 1] A photodiode whose current flow value is determined according to the intensity of light irradiated thereon; an amplifier circuit for generating an output signal including information on an amount of charge stored in the pixel, the amount of charge being determined by the current value; the amplifier circuit includes a transistor for holding the accumulated charge; A solid-state imaging device in which, among the plurality of pixels, a plurality of pixels connected to one wiring to which the output signal is applied are defined as a first pixel group, and a plurality of pixels connected to another wiring to which the output signal is applied are defined as a second pixel group, in which a wiring that applies a potential for controlling the accumulation of the charge to the first pixel group and a wiring that applies the potential to the second pixel group are connected.

Images