Display device

Abstract

To provide a thin touch panel, a touch panel with a simplified structure, or a touch panel that is easily incorporated in an electronic apparatus.SOLUTION: A touch panel includes a first substrate, a second substrate, a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, liquid crystal, and an FPC. The first conductive layer has a function as a pixel electrode. The second conductive layer has a function as a common electrode. The third conductive layer and the fourth conductive layer have a function as a touch sensor electrode. The FPC is electrically connected to the fourth conductive layer. The first conductive layer, the second conductive layer, the third conductive layer, the fourth conductive layer, and the liquid crystal are located between the first substrate and the second substrate. The first conductive layer, the second conductive layer, and the third conductive layer are provided on the first substrate. The FPC is provided on the first substrate.SELECTED DRAWING: Figure 7

Description

[Technical Field]

[0001] 1. Field of the Invention The present invention relates to an input device. 2. Field of the Invention The present invention relates to a display device. TECHNICAL FIELD One embodiment of the present invention relates to an input / output device.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. One aspect of the present invention relates to a product, a method, or a manufacturing method. , manufacture, or composition of matter. Therefore, the technical field of one embodiment of the present invention disclosed in this specification and the like is specifically a semiconductor device. , display devices, light-emitting devices, power storage devices, storage devices, electronic devices, lighting devices, input devices, input / output devices Examples include devices, driving methods thereof, and manufacturing methods thereof.

[0003] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Refers to devices in general, including semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory The device is one embodiment of a semiconductor device. power devices, input / output devices, electro-optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.) BACKGROUND ART Some electronic devices and devices include semiconductor devices. [Background technology]

[0004] In recent years, display devices (or display modules) equipped with touch sensors as position input means have become popular. A display device (or a display module) equipped with a touch sensor is These are called touch panels or touch screens (hereafter, we will refer to them simply as "touch panels"). It does not have a display device and is composed only of a touch sensor. Such a component may be called a touch panel. The display device equipped with the sensor is called a touch sensor display device, a touch panel with a display device, or The display device may also be called a display module. If an in-cell touch sensor is built in, Display device with on-cell touch sensor), or on-cell touch sensor (or on-cell touch sensor attached table) In-cell touch sensors are sometimes called liquid crystal display devices. The electrodes used are also used as electrodes for the touch sensor. The touch sensor has a touch panel on the upper side of the counter substrate (the side on which the display element is not provided), for example. For example, these touch panels are The portable information terminals provided include smartphones and tablet terminals.

[0005] One type of display device is a liquid crystal display device that includes a liquid crystal element. The transistors are arranged in a trix shape and used as switching elements connected to each pixel electrode. Active matrix liquid crystal display devices using such devices have been attracting attention.

[0006] For example, a metal oxide channel-type switching element is used as a switching element connected to each pixel electrode. Active matrix liquid crystal display devices using transistors as a composition region are known. (Patent Documents 1 and 2).

[0007] Furthermore, Patent Documents 3 to 6 describe touch panels to which liquid crystal elements are applied.

[0008] Liquid crystal display devices are generally classified into two types: a transmissive type and a reflective type.

[0009] Transmissive LCD devices use backlights such as cold cathode fluorescent lamps or LEDs to illuminate the LCD. By utilizing the optical modulation effect of the backlight, light from the backlight passes through the liquid crystal and exits the LCD. Select the output state and the non-output state, and display light and dark. The image is displayed by combining the above.

[0010] In addition, a reflective liquid crystal display device utilizes the optical modulation effect of liquid crystal to reflect external light, i.e., incident light. A state in which the light is reflected by the pixel electrode and output to the outside of the device, and a state in which the incident light is not output to the outside of the device By selecting the brightness and darkness, and combining them, you can display an image. This is what happens. [Prior art documents] [Patent documents]

[0011] [Patent Document 1] Japanese Patent Application Laid-Open No. 2007-123861 [Patent Document 2] Japanese Patent Application Laid-Open No. 2007-96055 [Patent Document 3] Japanese Patent Application Laid-Open No. 2011-197685 [Patent Document 4] Japanese Patent Application Laid-Open No. 2014-44537 [Patent Document 5] Japanese Patent Application Laid-Open No. 2014-178847 [Patent Document 6] U.S. Patent No. 7,920,129 Summary of the Invention [Problem to be solved by the invention]

[0012] The display panel (display device or display module) is equipped with a Therefore, there is a demand for touch panels that allow input by touching the screen with a finger or a stylus. are.

[0013] In addition, there is a demand for thinner and lighter electronic devices that use touch panels. Therefore, there is a demand for thinner and lighter touch panels.

[0014] For example, a touch panel is a display panel that is visible on the side (display surface side), that is, on the side where a person's finger or pen touches it. A touch sensor may be provided on the touch side.

[0015] For example, as a configuration of a touch panel (or display module), A substrate having a touch sensor can be attached. The display panel and touch sensor are separate components in the display module (or display module). It is configured so that the display panel and the touch sensor are bonded together. However, in this configuration, a touch sensor board is required in addition to the display panel board. Since a substrate for the touch panel is required, the thickness of the touch panel (or display module) can be reduced. There were problems such as the lack of a suitable design and the large number of parts required.

[0016] One aspect of the present invention is a thin touch panel (or a display device with a touch sensor) One of the objectives is to provide a touch panel (or touch panel) with a simplified configuration. One of the objectives is to provide a display device with a sensor, etc. One of the objectives is to provide a touch panel (or a display device with a touch sensor) that is easy to use. Alternatively, a touch panel with a small number of parts (or a display device with a touch sensor) can be used. One of the objectives is to provide a lightweight touch panel (or touch sensor attached table) One of the objectives is to provide a display device.

[0017] Another object is to provide a novel input / output device. Another object of the present invention is to provide a novel display device. The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment of the present invention to solve all of these problems. The problem is self-evident from the description, drawings, claims, etc. It is possible to extract other issues from documents, drawings, claims, etc. [Means for solving the problem]

[0018] One aspect of the present invention is a semiconductor device comprising a first substrate, a second substrate, a first conductive layer, a second conductive layer, and The touch panel includes a third conductive layer, a fourth conductive layer, a liquid crystal, and an FPC. The first conductive layer functions as a pixel electrode, and the second conductive layer functions as a common electrode. The third conductive layer and the fourth conductive layer function as electrodes of the touch sensor. The FPC is electrically connected to the fourth conductive layer. The layer, the fourth conductive layer, and the liquid crystal are located between the first substrate and the second substrate, and the first conductive layer, The second conductive layer and the third conductive layer are provided on the first substrate, and the FPC is provided on the first substrate. It is being done.

[0019] In the above, the fifth conductive layer and the connector are provided, and the fifth conductive layer is connected to the first substrate. the fourth conductive layer is provided on the second substrate, and the fifth conductive layer and the fourth conductive layer are It is preferable that the electrical connection is made via a connector.

[0020] Alternatively, the fourth conductive layer is preferably provided on the first substrate.

[0021] At this time, either the third conductive layer or the fourth conductive layer is on the same plane as the second conductive layer. It is preferable that the sensor is provided in the position indicated by the arrows.

[0022] Alternatively, the third conductive layer is provided on the same surface as the first conductive layer or the second conductive layer, and the third conductive layer is provided on the same surface as the first conductive layer or the second conductive layer. The fourth conductive layer is preferably provided on the same plane as the first conductive layer or the second conductive layer. It's nice.

[0023] Alternatively, the second conductive layer may be formed integrally with either the third conductive layer or the fourth conductive layer. It is preferable that the

[0024] Alternatively, the first conductive layer may be formed integrally with either the third conductive layer or the fourth conductive layer. It is preferable that the [Effects of the Invention]

[0025] According to one aspect of the present invention, a thin touch panel (or a display device with a touch sensor) Or, a touch panel (or a display with a touch sensor) with a simplified configuration can be provided. Or, we can provide touch panels (or touch devices) that are easy to incorporate into electronic devices. Or, we can provide touch panels with a small number of parts (or Or, a lightweight touch panel (or a touch sensor display device) can be provided. It is possible to provide a display device with a touch sensor, etc. Also, it is possible to provide a novel input device. This can provide a novel input / output device or a novel display device. The description of these effects does not preclude the existence of other effects. It is not necessary to have all of these effects. Effects other than these may be described in the specification, This becomes clear from the description, drawings, claims, etc. From any description, it is possible to extract effects other than these. [Brief explanation of the drawings]

[0026] [Figure 1] 1A and 1B are a block diagram and a timing chart of a touch sensor according to an embodiment. [Figure 2] 1A to 1C are diagrams illustrating a pixel including a touch sensor according to an embodiment. [Figure 3] 1A to 1C are diagrams illustrating a pixel including a touch sensor according to an embodiment. [Figure 4] 1A to 1C are diagrams illustrating a pixel including a touch sensor according to an embodiment. [Figure 5] 1A to 1C are diagrams illustrating a pixel including a touch sensor according to an embodiment. [Figure 6] 1A to 1C are diagrams illustrating operations of a touch sensor and a pixel according to an embodiment. [Figure 7] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 8] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 9] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 10] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 11] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 12] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 13]1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 14] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 15] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 16] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 17] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 18] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 19] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 20] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 21] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 22] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 23] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 24] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 25] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 26] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 27] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 28] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 29] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 30] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 31] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 32] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 33] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 34] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 35] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 36] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 37] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 38] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 39] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 40] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 41] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 42] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 43] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 44] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 45] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 46] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 47] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 48] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 49] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 50] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 51] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 52] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 53] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 54] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 55] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 56] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 57] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 58] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 59] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 60] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 61] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 62] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 63] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 64] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 65] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 66] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 67] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 68] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 69] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 70] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 71] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 72] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 73] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 74] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 75] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 76] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 77] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 78]1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 79] 1 shows an example of the configuration of a touch panel according to an embodiment. [Figure 80] FIG. 1 is a schematic diagram illustrating an example of a display device. [Figure 81] 1A and 1B are cross-sectional views illustrating one embodiment of a transistor. [Figure 82] 1A and 1B are cross-sectional views illustrating one embodiment of a transistor. [Figure 83] 1A and 1B are cross-sectional views illustrating one embodiment of a transistor. [Figure 84] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 85] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 86] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 87] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 88] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 89] FIG. 2 is a diagram illustrating an energy band structure. [Figure 90] 1A to 1C are diagrams illustrating a display module according to an embodiment. [Figure 91] 1A to 1C illustrate electronic devices according to an embodiment. [Figure 92] 1A to 1C illustrate electronic devices according to an embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0027] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. The present invention is not limited to the above embodiments, and various changes and modifications may be made in form and detail without departing from the spirit and scope of the present invention. Therefore, the present invention is based on the following embodiments. The present disclosure should not be construed as being limited to the contents of the preceding paragraph.

[0028] In the configuration of the invention described below, the same parts or parts having similar functions are The same reference numerals are used in common between different drawings, and repeated explanations thereof will be omitted. When referring to a function, the hatch pattern may be the same and no particular symbol may be assigned.

[0029] In each figure described in this specification, the size, layer thickness, or area of ​​each component is The figures may be exaggerated for clarity and are not necessarily limited to that scale. stomach.

[0030] In this specification, ordinal numbers such as "first" and "second" are used to avoid confusion of components. The number is not a numerical limitation.

[0031] The words "film" and "layer" can be used interchangeably. For example, the term "conductive layer" may be changed to the term "conductive film." In some cases, the term "insulating film" can be changed to the term "insulating layer." .

[0032] (Embodiment 1) In this embodiment, a driving method, a driving mode, and a driving method of an input device or an input / output device according to one embodiment of the present invention will be described. An example of the configuration will be described with reference to the drawings.

[0033] [Example of sensor detection method] FIG. 1(A) is a block diagram showing the configuration of a mutual capacitance type touch sensor. ) shows a pulse voltage output circuit 601 and a current detection circuit 602. As an example, the electrode 621 to which the pulse voltage is applied and the electrode 62 to which the change in the current is detected are 2 are shown as six wires, X1-X6 and Y1-Y6. The number of electrodes is not limited to this. or the electrodes 621 and 622 are arranged close to each other. The electrode 621 and the electrode 622 have the same function. You can replace it.

[0034] As an example, the pulse voltage output circuit 601 applies a pulse voltage to the wirings X1 to X6 in order. When a pulse voltage is applied to the X1-X6 wiring, a capacitance of 60 An electric field is generated between the electrodes 621 and 622 that form the electrode 3. Then, a pulse voltage This causes a current to flow through the capacitor 603. The electric field generated between these electrodes is In other words, the capacitance of 603 changes depending on the touch of a finger or pen. The capacitance value changes. In this way, the capacitance value changes when touched by a finger or pen. By utilizing this, it is possible to detect the approach or contact of a detection object.

[0035] The current detection circuit 602 detects the current in the wiring Y1-Y6 due to a change in the capacitance value of the capacitor 603. The Y1-Y6 wiring is used to detect changes in the If there is no contact, the detected current value will not change, but if the object to be detected approaches or touches it, When the capacitance value decreases, the change in the current value is detected. The total amount may be detected. In this case, an integrating circuit or the like may be used for detection. Alternatively, the peak value of the current may be detected. In this case, the current is converted into a voltage and the voltage value is The peak value may be detected.

[0036] Next, FIG. 1(B) shows the input / output of the mutual capacitance type touch sensor shown in FIG. 1(A). The timing chart of the waveform is shown in Figure 1(B). In Figure 1(B), when no object is detected (non-touch), ) and when detecting an object to be detected (touch). For the wire Y6, the waveform is shown as a voltage value corresponding to the detected current value. The display panel also performs a display operation. It is desirable to synchronize the timing of the touch sensor. shows an example in which the display operation is not synchronized.

[0037] A pulse voltage is applied to the wires X1-X6 in order, and the The waveform in the Y6 wiring changes. When there is no approach or contact of the object to be detected, X1-X6 The waveforms of Y1-Y6 change uniformly according to the change in the voltage of the wiring. Or, at the contact point, the current value decreases, and the corresponding voltage waveform also changes. do.

[0038] In this way, by detecting the change in capacitance, the approach or contact of the object to be detected can be detected. In addition, when a detected object such as a finger or pen comes into contact with the touch sensor or touch panel, Even if the vehicle is not moving and is approaching, the signal may be detected.

[0039] The pulse voltage output circuit 601 and the current detection circuit 602 are, for example, implemented as a single IC. It is desirable that the IC chip is formed in a It is preferable that the device be mounted on a touch panel or on a board inside the housing of an electronic device. In addition, when using a flexible touch panel, parasitic capacitance increases at the bent portion. However, this may increase the influence of noise, so a drive that is less susceptible to noise is recommended. It is preferable to use an IC chip to which the method is applied. For example, the signal-to-noise ratio (S / It is preferable to use an IC chip that employs a driving method that increases the N ratio.

[0040] In addition, in FIG. 1A, a package in which only a capacitor 603 is provided at the intersection of the wiring as a touch sensor is used. The configuration of the active matrix touch sensor is shown. A touch sensor of an active matrix type may also be used.

[0041] [Configuration example of an in-cell touch panel] Here, a touch sensor is formed on a substrate on which a display element, a transistor, etc. are provided. An example in which at least one of the electrodes is disposed will be described.

[0042] Below, we will discuss a touch panel (so-called Here, a configuration example of a display element (in-cell type) provided in a pixel will be described. However, one embodiment of the present invention is not limited to this and various Such a display element can be applied.

[0043] FIG. 2A shows a part of a pixel circuit provided in the display unit of the touch panel illustrated in this configuration example. FIG.

[0044] One pixel has at least a transistor 63 and a liquid crystal element 64. In addition, a storage capacitor may be provided. A wiring 62 is electrically connected to either the source or the drain.

[0045] The pixel circuit includes a plurality of wirings (for example, wirings 72_1 and 72_2) extending in the X direction. , a plurality of wirings (for example, wirings 71_1 and 71_2) extending in the Y direction, are provided so as to cross each other, and capacitance is formed between the wirings.

[0046] As an example, among the pixels provided in the pixel circuit, some adjacent pixels One electrode of each liquid crystal element is electrically connected to form one block. Here, for example, a plurality of linear blocks extending in the Y direction (for example, blocks In addition, in FIG. 2(A), only a part of the pixel circuit is shown. However, in reality, these blocks are repeatedly arranged in the X direction. One of the electrodes of the element may be, for example, a common electrode or an opposing electrode. On the other hand, the other electrode of the liquid crystal element is, for example, a pixel electrode.

[0047] By adopting such a configuration, the electrodes constituting the touch sensor and the liquid crystal of the pixel circuit In FIG. 2A, the wiring 71_1 and the wiring 71_2 can serve as one electrode of the element. 2 serves as one electrode of the liquid crystal element and also serves as an electrode that constitutes the touch sensor. The wire 72_1 and the wiring 72_2 function as electrodes that constitute the touch sensor. Therefore, the configuration of the touch panel can be simplified. In FIG. 2(A), a plurality of The wiring (for example, the wiring 71_1 and the wiring 71_2) is connected to one electrode of the liquid crystal element and the touch sensor. However, one embodiment of the present invention is not limited to this. For example, A plurality of wirings (for example, wirings 72_1 and 72_2) extending in the X direction are arranged in a liquid crystal element. The electrodes may also serve as electrodes that form the touch sensor. is shown in Figure 3.

[0048] In addition, in FIG. 2(A) and FIG. 3, the wiring is connected to one electrode of the liquid crystal element and the touch sensor. However, one embodiment of the present invention is not limited to this. One electrode of the liquid crystal element and the electrode that constitutes the touch sensor are each connected by separate wiring. For example, as shown in FIG. 2B, one electrode of the liquid crystal element 64 and In this case, the wiring 66 may be connected to the liquid crystal element 64. At least one of the electrodes constituting the liquid crystal element 64 and the other electrode constituting the liquid crystal element 64 is connected in the X direction. and at least one of the wirings extending in the Y direction and the wirings extending in the Y direction, By simultaneously forming the wiring 6, the manufacturing process of the touch panel can be simplified. 6 and the wiring 71_1 and the wiring 71_2 may be formed simultaneously, or the wiring 66 and the wiring 7 2_1 and the wiring 72_2 may be formed at the same time.

[0049] In addition, in FIGS. 2(A), 2(B) and 3, a liquid crystal element is used as the display element. However, one embodiment of the present invention is not limited to this. An example of this use is shown in FIGS. 4 and 5.

[0050] FIG. 6A shows a plurality of wirings 72 extending in the X direction and a plurality of wirings 71 extending in the Y direction. 1 is an equivalent circuit diagram showing the connection configuration of the touch sensor. Each of the wirings 71 extending in the Y direction is connected to an input voltage (or , selected voltage) or common potential (or ground potential, or reference potential) In addition, each of the wirings 72 extending in the X direction is connected to a ground potential (or a reference potential). Alternatively, the wiring 72 can be electrically connected to the detection circuit. The wiring 71 and the wiring 72 can be interchanged. may be connected.

[0051] The operation of the above-mentioned touch panel will be described below with reference to FIGS. 6(B) and 6(C).

[0052] Here, as an example, one frame period is divided into a writing period and a sensing period. The write period is a period in which image data is written to the pixels, and the wiring 61 (gate On the other hand, during the detection period, the touch sensor In this period, the wirings 71 extending in the Y direction are selected in order, and the input voltage is entered.

[0053] 6B is an equivalent circuit diagram during the writing period. A common potential is input to both the wiring 72 extending in the Y direction and the wiring 71 extending in the Y direction.

[0054] FIG. 6C is an equivalent circuit diagram at a certain point in the detection period. Each of the wires 72 extending in the Y direction is electrically connected to the detection circuit. The selected one receives the input voltage, and the others receive the common potential. do.

[0055] The driving method exemplified here is applicable not only to the in-cell method but also to the touch panel exemplified above. This can also be applied to

[0056] In this way, the image writing period and the period for sensing by the touch sensor can be separated. For example, it is preferable to perform sensing during the blanking period of the display. This prevents the reduction in sensitivity of the touch sensor caused by noise when writing to pixels. It is possible.

[0057] [Touch panel method] Below, several methods applicable to the touch panel according to one embodiment of the present invention will be described. do.

[0058] In this specification, the touch panel has a function of displaying (outputting) images on a display surface. Touch sensors detect when a finger, stylus, or other object touches or approaches the display surface. Therefore, the touch panel is one type of input / output device. do.

[0059] In this specification, the substrate of the touch panel may be, for example, an FPC (Flexible Printed Circuit). Print Circuit) or TCP (Tape Carrier Packaging e) or COG (Chip On Ground) connectors are attached to the board. The IC (integrated circuit) mounted by the TECHNICAL LASS method is called a touch panel module. It may also be called a display module or simply a touch panel.

[0060] A capacitive touch sensor applicable to one aspect of the present invention includes a pair of conductive layers. A capacitance is formed between the pair of conductive layers. When the object to be detected touches or is connected to the pair of conductive layers, The capacitance between the pair of conductive layers changes when the electrodes are brought closer together, and this is used for detection. It is possible.

[0061] The capacitance type includes the surface capacitance type and the projected capacitance type. There are two types of capacitance methods, self-capacitance and mutual capacitance, which differ mainly in their driving methods. The mutual capacitance method is preferable because it allows simultaneous multi-point detection. It is also possible to use the method.

[0062] Further, as a display element included in the touch panel of one embodiment of the present invention, a liquid crystal element (vertical electric field type) or in-plane switching type), MEMS (Micro Electro Mechanical Optical elements using the Al System, organic EL (Electro Luminescence) ence element and light emitting diode (LED) Various display elements such as light-emitting elements such as e) and electrophoretic elements can be used.

[0063] Here, as an example, a liquid crystal element to which a horizontal electric field method is applied as a display element in a touch panel is used. It is preferable to apply a transmission type liquid crystal display device using the above.

[0064] The touch panel according to one aspect of the present invention includes a pair of electrodes that constitute a touch sensor between a pair of substrates. The display panel and the touch sensor are connected by sandwiching electrodes (also called conductive layers or wiring). It has an integrated structure. In other words, instead of forming a touch sensor on a separate substrate, A touch sensor is formed on a pair of substrates on which a display element and a transistor are provided. This reduces the thickness of the touch panel, making it possible to realize a lightweight touch panel.

[0065] Furthermore, the touch panel according to one embodiment of the present invention includes an FPC (Fl Both the flexible printed circuit (FPC) and the FPC that drives the touch sensor This makes it easier to incorporate into electronic devices and reduces the number of parts. It is possible to reduce

[0066] FIG. 7(A) is a schematic cross-sectional view illustrating the structure of a touch panel 10 according to one embodiment of the present invention. .

[0067] The touch panel 10 includes a substrate 11, a substrate 12, an FPC 13, a conductive layer 14, a liquid crystal element 20, It has a colored layer 31, a conductive layer 41, and the like.

[0068] The liquid crystal element 20 is composed of a conductive layer 21, a conductive layer 22, and a liquid crystal 23. FFS (Fringe Field Switching) mode is applied to the crystal element 20. The figure shows an example in which a liquid crystal element having a conductive layer 21 is used. The conductive layer 22 has, for example, a comb-like upper surface shape or a slit-like upper surface shape. The conductive layer 21 and the conductive layer 22 have a top surface shape (also referred to as a planar shape) in which One of them functions as a common electrode, and the other functions as a pixel electrode. When a light emitting element or the like is used, the conductive layer 22 may have a comb-like upper surface, or does not have a top surface shape with slits.

[0069] The touch sensor is formed by a conductive layer 41 provided on the substrate 12 side and a pair of electrodes of the liquid crystal element 20. The capacitance formed between the conductive layer 21 and the other layer can be used for detection. Here, as an example, the conductive layer 41 is formed on the surface of the substrate 12 facing the substrate 11 (i.e., the surface of the substrate 12 facing the substrate 11). It is preferable that the surface is provided on the lower surface.

[0070] The conductive layer 41 provided on the substrate 12 side is connected to the conductive layer 41 provided on the substrate 11 side by the connecting layer 15. The conductive layer 14 is electrically connected to the FPC 13 attached to the substrate 11 side. This configuration allows the touch sensor to be driven on one board. Both an FPC for the liquid crystal display panel and an FPC for driving the liquid crystal element 20 can be arranged.

[0071] Here, as a configuration of the touch panel, for example, the surface of the substrate 12 opposite to the substrate 11 side (the That is, when a conductive layer that functions as an electrode of the touch sensor is disposed on the upper surface of the substrate 12, 7A, an FPC for electrical connection with the board 12 must be attached. Even if the connecting layer 15 shown is not used, the FPC electrically connected to the conductive layer 41 is It is necessary to attach it to the substrate 12. In addition, it is necessary to attach it to a substrate different from the substrates 11 and 12. When placing a conductive layer that functions as an electrode for the sensor, attach the FPC to the substrate. Therefore, in such a configuration, the number of parts increases, and it is difficult to incorporate the parts into electronic devices. On the other hand, in one aspect of the present invention, Since it is possible to place an FPC on only one of the pair of boards, the number of parts can be reduced and The configuration can be made easy to incorporate into child devices.

[0072] In addition, one electrode of the liquid crystal element 20 is connected to at least one of a pair of electrodes that function as a touch sensor. By combining both functions, the process can be simplified, improving yield. The manufacturing cost can be reduced.

[0073] In FIG. 7B, the conductive layer 41 that functions as an electrode of the touch sensor is disposed on the substrate 11 side. The conductive layer 41 is electrically connected to the conductive layer 14. The touch sensor is The conductive layer 41 and a conductive layer that functions as one of a pair of electrodes (for example, a common electrode) of the liquid crystal element 20. This can be detected by utilizing the capacitance formed between the electrode layer 21 and the electrode layer 22. In this case, the FPC 13 can be disposed on the substrate 11 side. It is preferable to use the surface on the side as the touch surface, since this can further increase the detection sensitivity.

[0074] In the configuration shown in FIG. 7C, the conductive layer 41 is disposed on the same plane as the conductive layer 22. The conductive layer 41 is electrically connected to the conductive layer 14 in a region not shown. It is preferable that the conductive layer 41 and the conductive layer 22 are simultaneously formed by processing the same conductive film. The touch sensor detects the capacitance formed between the conductive layer 41 and the conductive layer 21. The conductive layer 21 can function as a common electrode for the liquid crystal element 20 and as a touch panel. It also functions as an electrode of the sensor.

[0075] The configuration shown in FIG. 7D is an IPS (In-Plane Switching Indicator) type liquid crystal element 20. ng) mode is applied.

[0076] The conductive layer 21 and the conductive layer 22 that constitute the liquid crystal element 20 are provided on the same surface. The layer 21 and the conductive layer 22 each have a comb-like shape, and they are interlocked. The touch sensor utilizes the capacitance formed between the conductive layer 41 and the conductive layer 21. The conductive layer 21 functions as a common electrode of the liquid crystal element 20, for example. The electrode functions as a contact hole and as an electrode of the touch sensor.

[0077] The conductive layer 41, which functions as one electrode of the touch sensor, is made of the conductive layer 21 and the conductive layer 2 2. The conductive layer 41 is electrically connected to the conductive layer 14 in a region not shown. Here, the conductive layer 41, the conductive layer 21, and the conductive layer 22 are connected to the same conductive layer. It is preferable that the film is processed and formed at the same time.

[0078] The configuration shown in FIG. 7(E) is another example in which the liquid crystal element 20 employs the FFS mode. The touch sensor uses the capacitance formed between the conductive layer 41a and the conductive layer 41b. The conductive layer 21 and the conductive layer 22 are formed by a common electrode of the liquid crystal element 20. One functions as a conducting electrode, and the other functions as a pixel electrode of the liquid crystal element 20.

[0079] The conductive layer 41a is provided on the same plane as the conductive layer 22. The conductive layer 41b is provided on the same plane as the conductive layer 22. The conductive layer 41a and the conductive layer 22 are formed on the same surface as the conductive layer 41a. Similarly, it is preferable to form the conductive layer 41b and the conductive layer 21 simultaneously by using the same conductive layer. It is preferable to process the film and form the film simultaneously. In the process of forming a pair of electrodes of 0, a pair of electrodes constituting a touch sensor is simultaneously formed. This allows the device to function as a touch sensor without increasing the manufacturing process. The panel 10 can be fabricated.

[0080] The configuration shown in FIG. 8(A) is another example in which the liquid crystal element 20 to which the FFS mode is applied is used. The touch sensor uses the capacitance formed between the conductive layer 41a and the conductive layer 41b. The conductive layer 21 can be used as a common electrode of the liquid crystal element 20, for example. It has the following functions.

[0081] The conductive layer 41a and the conductive layer 41b are provided on the same plane as the conductive layer 22. The conductive layer 41a, the conductive layer 41b, and the conductive layer 22 are simultaneously formed by processing the same conductive film. By adopting such a configuration, in the step of forming one electrode of the liquid crystal element 20, Since a pair of electrodes constituting the touch sensor can be formed at the same time, the manufacturing process can be simplified. Therefore, it is possible to manufacture a touch panel 10 that functions as a touch sensor without any trouble. do.

[0082] The conductive layer 41a is provided so as to overlap the conductive layer 21. The conductive layer 21 may be provided so as not to overlap the conductive layer 41a. As a result, the parasitic capacitance of the conductive layer 41a can be reduced. Similarly, in this case, the conductive layer 21 may be provided so as not to overlap the conductive layer 41b.

[0083] The configuration shown in FIG. 8B is another example in which the liquid crystal element 20 employs the FFS mode. The touch sensor uses the capacitance formed between the conductive layer 41a and the conductive layer 41b. The conductive layer 21 and the conductive layer 22 are formed by a common electrode of the liquid crystal element 20. One functions as a conducting electrode, and the other functions as a pixel electrode of the liquid crystal element 20.

[0084] The conductive layer 41a and the conductive layer 41b are provided on the same plane as the conductive layer 21. The conductive layer 41a, the conductive layer 41b, and the conductive layer 21 are simultaneously formed by processing the same conductive film. By adopting such a configuration, in the step of forming one electrode of the liquid crystal element 20, Since a pair of electrodes constituting the touch sensor can be formed at the same time, the manufacturing process can be simplified. Therefore, it is possible to manufacture a touch panel 10 that functions as a touch sensor without any trouble. do.

[0085] The configuration shown in FIG. 8C is another example in which the liquid crystal element 20 employs the FFS mode. The touch sensor includes a conductive layer 41 and a liquid crystal element 20 as one of a pair of electrodes. This can be detected by utilizing the capacitance formed between the conductive layer 21 and the functioning conductive layer 2. 1 functions as a common electrode for the liquid crystal element 20 and as an electrode for the touch sensor. It has the ability.

[0086] The conductive layer 41 is provided on the same plane as the conductive layer 21. It is preferable that the first and second electrodes are formed simultaneously by processing the same conductive film. In this way, in the process of forming one electrode of the liquid crystal element 20, a pair of electrodes that constitute the touch sensor are simultaneously formed. This allows the formation of electrodes, enabling the device to function as a touch sensor without increasing the manufacturing process. Therefore, a touch panel 10 having such a function can be manufactured.

[0087] The configuration shown in FIG. 9 shows an example in which the IPS mode is applied to the liquid crystal element 20.

[0088] The conductive layer 21 and the conductive layer 22 that constitute the liquid crystal element 20 are provided on the same plane. The layer 21 and the conductive layer 22 each have a comb-like shape, and they are interlocked. The conductive layer 21 and the conductive layer 22 are arranged such that one of them serves as a common electrode of the liquid crystal element 20. The other functions as a pixel electrode of the liquid crystal element 20.

[0089] The conductive layers 41a and 41b functioning as electrodes of the touch sensor are The conductive layer 41a, the conductive layer 41b, and the conductive layer 22 are disposed on the same plane. It is preferable that the conductive layer 21 and the conductive layer 22 are formed simultaneously by processing the same conductive film. The touch sensor detects the capacitance formed between the conductive layer 41a and the conductive layer 41b. It is possible.

[0090] When the FFS mode is applied, the conductive layer 21 is formed in a comb-like or strip-like shape. By providing a lit top surface, it is possible to change to IPS mode.

[0091] For example, FIG. 10A shows the case where FIG. 7C is changed to the IPS mode. 1 functions as a common electrode for the liquid crystal element 20 and as an electrode for the touch sensor. It has the ability.

[0092] Similarly, FIG. 10(B) shows the case where FIG. 7(E) is changed to the IPS mode. One of the layers 1 and 22 functions as a common electrode for the liquid crystal element 20, and the other functions as a common electrode for the liquid crystal element 20. The pixel electrode 20 functions as a pixel electrode.

[0093] Similarly, when Fig. 8(A) and Fig. 8(B) are changed to IPS mode, Fig. 11 11(A) and 11(B). One of the conductive layer 21 and the conductive layer 22 is a common layer of the liquid crystal element 20. One functions as an electrode, and the other functions as a pixel electrode of the liquid crystal element 20.

[0094] Similarly, FIG. 11(C) shows the case where FIG. 8(C) is changed to the IPS mode. 1 functions as a common electrode for the liquid crystal element 20 and as an electrode for the touch sensor. It has the ability.

[0095] The upper electrode is a pixel electrode of the liquid crystal element 20, and the lower electrode is a common electrode of the liquid crystal element 20. Although many examples in which the upper electrode is used as the electrode have been shown, one embodiment of the present invention is not limited thereto. The upper electrode is a common electrode of the liquid crystal element 20, and the lower electrode is a pixel electrode of the liquid crystal element 20. You may do so.

[0096] For example, in FIG. 7C, the upper electrode is made to be a common electrode for the liquid crystal element 20. An example is shown in Fig. 12. The conductive layer 21 has functions as a common electrode for the liquid crystal element 20, It also functions as an electrode of the touch sensor.

[0097] Similarly, in FIG. 8(A), the upper electrode is made to be a common electrode for the liquid crystal element 20. An example is shown in FIG. 13(A). The conductive layer 21 functions as a common electrode of the liquid crystal element 20, for example. It has the ability.

[0098] Similarly, in FIG. 8(C), the upper electrode is made to be a common electrode for the liquid crystal element 20. An example is shown in FIG. 13(B). The conductive layer 21 functions as a common electrode of the liquid crystal element 20, for example. The electrode functions as a contact hole and as an electrode for the touch sensor.

[0099] Similarly, in FIG. 11(C), the upper electrode is made to be the common electrode for the liquid crystal element 20. An example of this is shown in FIG. 14. The conductive layer 21 functions as a common electrode for the liquid crystal element 20, for example. , and functions as an electrode of the touch sensor.

[0100] 15(A), (B), and (C) are conceptual diagrams of a touch panel according to one embodiment of the present invention as viewed from above. Therefore, parts other than the touch sensor are largely omitted. In addition, the pixel electrode 51 has a comb-like upper surface shape or an upper surface shape with slits. Although there are cases where it has such a function, it is omitted here.

[0101] In the configuration shown in FIG. 15(A), the touch sensor has a sensor electrode 55 and a sensor electrode 56. Here, the sensor electrodes 55 and 56 are made of the same conductive film as the pixel electrodes 51. Alternatively, the sensor electrodes 55 and 56 may be formed in the same manner as the pixel electrodes 51. The plurality of sensor electrodes 55 arranged in the X direction are electrically connected to each other. At this time, the sensor electrodes 55 are connected by wiring 57. The sensor electrode 56 is provided extending in the Y direction. The sensor electrodes 55 and 56 are arranged in a plane. Instead of being an electrode, the electrode may be formed from the same conductive film as the common electrode.

[0102] In the configuration shown in FIG. 15(B), the common electrode 52 and the sensor electrode 55 are formed from the same conductive film. Alternatively, the common electrode 52 and the sensor electrode 55 may be provided on the same surface. Here, the common electrode 52 and the sensor electrode 55 have a strip shape extending in the X direction. 15B has a configuration in which the electrodes intersect with each sensor electrode 56. In other words, FIG. 15B is the same as FIG. 8C. It can also be said to show a floor plan.

[0103] In FIG. 15(C), the common electrode 52 shown in FIG. 15(B) also serves as the sensor electrode 55. In other words, FIG. 15(C) shows a plan view of FIG. 7(C). can.

[0104] Although the sensor electrodes 56 are shown in the example extending in the Y direction, they may be arranged in the X direction. In Figures 15(A), 15(B), and 15(C), Examples of the case where the electrodes extend in the X direction are shown in Figs. 16(A), 16(B), and 16(C), respectively. vinegar.

[0105] In addition, in FIG. 15(B) and FIG. 15(C), the upper electrode (the electrode closer to the liquid crystal layer, In other words, the electrode closest to the object to be detected (such as a finger or pen) is the pixel electrode, and the lower electrode (the The electrode farthest from the object to be detected (i.e., the electrode farthest from the finger or pen) is the common electrode. However, one embodiment of the present invention is not limited to this. The electrode on the near side (i.e., the electrode closest to the object to be detected, such as a finger or pen) is the common electrode, and the The electrode on the side farther from the liquid crystal layer, i.e., the electrode on the side farther from the object to be detected, such as a finger or pen. ) may be configured to serve as a pixel electrode. Such a configuration is shown in FIG. 15(B) and FIG. 17(A) and 17(B) show examples of the case where the method is applied to the method of the present invention. The common electrode 52 has a comb-like upper surface shape or an upper surface shape with slits. Although there are cases where it has such a function, it is omitted here.

[0106] This concludes the explanation of the touch panel method.

[0107] [Configuration example 1] A more specific example of the configuration of the touch panel will be described below.

[0108] 18(A) is a perspective schematic diagram of a touch panel 310 according to one embodiment of the present invention. 18(B) is a perspective schematic view of the developed version of FIG. 18(A). For clarity, a representative structure is shown. In FIG. 18(B), only the components (substrate 372) are shown with dashed lines. Only the outline is shown.

[0109] The touch panel 310 has a substrate 371 and a substrate 372 that are provided opposite each other.

[0110] On the substrate 371, a display unit 381, a driving circuit 382, ​​wiring 383, a driving circuit 384, etc. are provided. The display portion 381 is provided with a conductive layer 332. 18(A) is provided with an FPC 373 electrically connected to the wiring 383. (B) shows an example in which IC374 is mounted on FPC373.

[0111] The surface of the substrate 372 facing the substrate 371 is provided with a plurality of conductive layers 331 and a plurality of conductive layers 335, a plurality of conductive layers 341, etc. are formed. The plurality of conductive layers 341 are electrically connected to the substrate 37 via the connection portions 385. 1 and electrically connect it to the FPC 373 provided on the

[0112] The conductive layer 335 is disposed between the two conductive layers 331. By providing the conductive layer 335, A difference in transmittance occurs between the area where the conductive layer 331 is provided and the area where it is not provided. In addition, the conductive layer 335 is preferably electrically floating. In this way, one of the conductive layers 331 and 332 can be electrically connected to the conductive layer 335 through the conductive layer 335. The change in potential of one electrode can be efficiently transmitted to the other electrode, thereby increasing the detection sensitivity. The conductive layer 335 may not be provided if it is not necessary.

[0113] The display unit 381 has at least a plurality of pixels. A pixel is at least one display element. Preferably, the pixel includes a transistor and a display element. As the light emitting element, a light emitting element such as an organic EL element or a liquid crystal element can be used. .

[0114] The driving circuit 382 uses a circuit that functions as, for example, a scanning line driving circuit, a signal line driving circuit, etc. You can be there.

[0115] The wiring 383 has a function of supplying signals and power to the display portion 381 and the driver circuit 382 . The signal and power are input to the outside via FPC373 or from IC374 to wiring 383. will be done.

[0116] The driver circuit 384 has a function of sequentially selecting the conductive layers 332. When the touch sensor is driven by sequentially selecting the conductive layers 331 instead of the driving The circuit 384 switches between a fixed potential and a signal used for sensing and supplies it to the conductive layer 332. The touch sensor is driven by a signal supplied from IC374 or an external device. In this case, the drive circuit 384 may not be provided.

[0117] In addition, in Figure 18(A)(B), a COF (Chip On Film) is mounted on FPC373. ) method is used. For example, an IC having a function as a scanning line driver circuit or a signal line driver circuit can be applied. The touch panel 310 is provided with a circuit that functions as a scanning line driving circuit and a signal line driving circuit. In some cases, a circuit that functions as a scanning line driver circuit or a signal line driver circuit is provided externally, and the FPC When a signal for driving the display unit 381 is input via the IC 373, the IC 374 The IC 374 may be configured without a COG (Chip On Glass) Alternatively, the device may be directly mounted on the substrate 371 by the method (s) or the like.

[0118] The touch sensor is made up of a conductive layer 331 provided on a substrate 372 and a conductive layer 332 provided on a substrate 371. The capacitance formed between the conductive layer 331 and the conductive layer 332 is Using this, the touch sensor can detect.

[0119] By adopting such a configuration, the FPC connected to the touch panel 310 is located on one board side ( In this case, it can be arranged only on the substrate 371 side. As shown in the figure, the touch panel 310 is provided with one FPC 373, and the FPC 373 is If the configuration has a function to supply signals to both the display panel and the touch sensor, the configuration can be simplified. This is preferable because it can be simplified.

[0120] At this time, IC374 may have a function to drive a touch sensor, or Alternatively, an IC for driving the touch sensor may be provided. It may be mounted on a substrate 371 .

[0121] FIG. 19 shows a schematic top view of a touch panel 310 having a different configuration from that shown in FIG. do.

[0122] The touch panel shown in FIG. 19 has a plurality of FPCs 373a and 373b on a substrate 371. The FPC 373a is a circuit for driving the display unit 381. The FPC 373b has a function of supplying signals. 31.

[0123] In this way, the FPC 373a is connected along two or more sides of the display unit 381 of the touch panel 310. By arranging the display unit 381, many signals can be supplied to the touch panel 310. When the display has a high resolution, a signal is supplied from two or more sides of the display unit 381 in this manner. By using this structure, the parasitic capacitance between the wirings can be reduced due to the increased wiring density. In the case of a display device of this type, the length of the wiring can be shortened by using such a configuration. This reduces wiring resistance and suppresses the effects of signal delays and the like.

[0124] [Cross-section example 1] An example of a cross-sectional configuration of a touch panel according to one embodiment of the present invention will be described below with reference to the drawings. Reveal.

[0125] [Cross-sectional configuration example 1-1] 20 is a schematic cross-sectional view of the touch panel 310. In FIG. 20, The area including the FPC 373, the area including the drive circuit 382, ​​and the area including the display unit 381 are each The cross section of the

[0126] The substrate 371 and the substrate 372 are bonded together by an adhesive layer 151. The liquid crystal 253 is sealed in the area surrounded by the substrate 371, the substrate 372, and the adhesive layer 151. .

[0127] On the substrate 371, the transistor 201, the transistor 203, the connection portion 206, the conductive layer 207, a conductive layer 251 and a conductive layer 252 which constitute a liquid crystal element 208, and the like are provided.

[0128] On the substrate 371, an insulating layer 211, an insulating layer 212, an insulating layer 213, an insulating layer 214, an insulating layer 215, an insulating layer 216, an insulating layer 217, an insulating layer 218, an insulating layer 219, an insulating layer 220, an insulating layer 221, an insulating layer 222, an insulating layer 223, an insulating layer 224, an insulating layer 225 The insulating layer 211 is provided with a layer 254, a spacer 216, etc. A part of the insulating layer 211 is provided with each transistor. The insulating layers 212, 213, and 214 function as gate insulating layers for the gate insulating layer of the transistor. The insulating layer 214 is provided to cover the transistors, etc., for example, a planarizing layer. In this example, the insulating layer 21 is used as an insulating layer for covering the transistors and the like. 2, insulating layer 213, and insulating layer 214, but the present invention is not limited to this. It may be four or more layers, a single layer, or two layers. The insulating layer 214 may not be provided if it is not necessary.

[0129] FIG. 20 shows a cross section of one sub-pixel as an example of the display section 381. The pixel is a sub-pixel that exhibits red, a sub-pixel that exhibits green, or a sub-pixel that exhibits blue. For example, the sub-pixel shown in Figure 20 is a transistor. The display panel 200 includes a display panel 203, a liquid crystal element 208, and a colored layer 231.

[0130] 20, an example in which a transistor 201 is provided as a driving circuit 382 is shown. It shows.

[0131] In FIG. 20, as an example of a transistor 201 and a transistor 203, a channel is formed. The semiconductor layer is formed as a gate electrode 283 and a gate electrode 284, or a gate electrode 281 and a gate electrode 282. The transistor shown in FIG. In the case where the gate electrode 281 and the gate electrode 282 are connected, or the gate electrode 283 and the gate electrode 284 are connected, the field effect It is possible to increase the mobility and increase the on-current. Furthermore, it is possible to reduce the area occupied by the circuit portion. By applying a transistor with a large on-current, it is possible to Even if the number of wires increases when the panel is made larger or higher resolution, It is possible to reduce signal delay and suppress display unevenness.

[0132] The transistors included in the driver circuit 382 and the transistors included in the display portion 381 are The plurality of transistors in the driving circuit 382 may all have the same structure. The transistors may have the same structure, or transistors with different structures may be used in combination. The plurality of transistors included in the display portion 381 may all have the same structure or may have different structures. Transistors having different structures may be used in combination.

[0133] At least one of the insulating layers 212 and 213 covering each transistor is, for example, It is preferable to use a material that does not easily diffuse impurities such as water and hydrogen. The insulating layer 212 or the insulating layer 213 can function as a barrier film. This effectively prevents impurities from diffusing into the transistor from the outside. This makes it possible to realize a highly reliable touch panel.

[0134] FIG. 20 shows a liquid crystal element 208 with FFS (Fringe Field Switching) The liquid crystal element 208 is a conductive type. The conductive layer 251, the liquid crystal 253, and the conductive layer 252 are The orientation of the liquid crystal 253 can be controlled by the electric field generated therebetween.

[0135] A conductive layer 252 is provided on the insulating layer 214. An insulating layer 2 54 is provided, and a conductive layer 251 is provided on the insulating layer 254. The conductive layer 251 is an insulating The transistor is connected to the insulating layer 254 through openings in the insulating layer 214, the insulating layer 213, and the insulating layer 212. The conductive layer 251 is electrically connected to one of the source and drain of the transistor 203. When a light-transmitting conductive material is used as the conductive layer 252, the touch panel 310 can be a transmissive type. The display device may be a liquid crystal display device.

[0136] The conductive layer 251 has a comb-like upper surface shape or an upper surface shape with slits (planar shape). The conductive layer 252 is disposed to overlap with the conductive layer 251. In the area overlapping with the colored layer 231, the conductive layer 251 is not disposed on the conductive layer 252. It has a small part.

[0137] In FIG. 20, the conductive layer 251 functions as a pixel electrode, and the conductive layer 252 functions as a common electrode. In addition, the conductive layer 25 provided on the upper layer and having a comb-like or slit-like upper surface shape 1 can be used as a common electrode, and the conductive layer 252 provided below can be used as a pixel electrode. In that case, the conductive layer 252 is electrically connected to one of the source and drain of the transistor 203. Simply connect it to the network.

[0138] A connecting portion 206 is provided in an area near the end of the substrate 371. The connecting portion 206 is The FPC 373 is electrically connected via the connection layer 209. In FIG. 7 and a conductive layer formed by processing the same conductive film as the conductive layer 251. An example of the configuration of the connection section 206 is shown.

[0139] On the surface of the substrate 372 facing the substrate 371, a conductive layer 331, a conductive layer 341, a colored layer 231, a shielding layer An optical layer 232, an insulating layer 255, etc. are provided.

[0140] FIG. 20 shows a case where the conductive layer 331 and the conductive layer 341 are formed on the same surface. Here, the conductive layer 331 and the conductive layer 341 are formed simultaneously by processing the same conductive film. It is also preferable that the conductive layer 331 and the conductive layer 341 are integral with each other. At this time, at least the portion overlapping with the display unit 381 functions as one electrode of the touch sensor. The other part can also be called a conductive layer 341. 20 shows an example of a cross-sectional view of the case of FIG. 7(A).

[0141] In the connection portion 385, the conductive layer 341 has an area that is not covered by the insulating layer 255. The layer 341 is electrically connected to the conductive layer 207 provided on the substrate 371 side via a connector 386. As a result, the FPC 373 and the conductive layer 331 are electrically connected. is formed on the same plane as the conductive layer 251 and the portion where the connector 386 contacts the conductive layer 341, 207 and a portion in contact with the conductive layer 207. .

[0142] The connector 386 may be, for example, a conductive particle. For this purpose, particles of organic resin or silica coated with a metal material may be used. It is preferable to use nickel or gold as the metal material, as this reduces the contact resistance. Particles coated with layers of two or more metal materials, such as nickel coated with gold, are used. It is preferable to use a material that can be elastically or plastically deformed as the connector 386. At this time, the conductive particles are preferably in a shape that is crushed in the vertical direction as shown in FIG. This may result in a connection between the connector 386 and the conductive layer electrically connected thereto. The contact area is increased, which reduces contact resistance and prevents problems such as poor connections. do.

[0143] The connector 386 is preferably disposed so as to be covered with the adhesive layer 151. For example, the adhesive layer After applying the paste or the like that will become 151, the connector 386 is placed on the connecting portion 385. For example, the adhesive layer 151 is used in a display device having a solid sealing structure or a hollow sealing structure. The structure used in the periphery is adapted to have a structure in which a connecting portion 385 is disposed in the portion where the adhesive layer 151 is provided. It can be used.

[0144] The colored layer 231 and the light-shielding layer 232 are provided on the conductive layer 331. An insulating layer 255 is provided to cover the light-shielding layer 232 .

[0145] The insulating layer 255 prevents impurities contained in the colored layer 231, the light-shielding layer 232, etc. from diffusing into the liquid crystal 253. It functions as an overcoat to prevent this.

[0146] The spacer 216 is provided on the insulating layer 254, and the distance between the substrate 371 and the substrate 372 is uniform. 20 shows the structure of the spacer 216 and the substrate 372 side. Although an example is shown in which the insulating layer 255 and the other object are in contact with each other, they do not necessarily have to be in contact with each other. In addition, although an example in which the spacer 216 is provided on the substrate 371 side has been shown here, it is also possible to For example, it may be disposed between two adjacent sub-pixels. Granular spacers may be used as the spacers 216. Examples of the granular spacers include silica. However, it is preferable to use elastic materials such as organic resins and rubber. At this time, the granular spacers may be crushed in the vertical direction.

[0147] In addition, in the conductive layer 251, the insulating layer 254, the insulating layer 255, etc., the surface in contact with the liquid crystal 253 An alignment film for controlling the alignment of the liquid crystal 253 may be provided on the substrate 251 .

[0148] At least the portion of the conductive layer 331 that overlaps with the colored layer 231 is made of a light-transmitting material. It is preferable that

[0149] In the case of the transmissive liquid crystal element 208, for example, polarizing plates (not shown) are arranged to sandwich the display unit. The light from the backlight placed outside the polarizing plate is At this time, the liquid crystal 25 is turned on by the voltage applied between the conductive layer 251 and the conductive layer 252. By controlling the orientation of the 3, the optical modulation of light can be controlled. The intensity of the light emitted can be controlled. 231 absorbs light outside of a specific wavelength range, and the emitted light is, for example, red, blue, Or the light will be green.

[0150] In addition to the polarizing plate, for example, a circular polarizing plate can be used. For example, a laminate of a linear polarizer and a quarter-wave retardation plate can be used. This reduces viewing angle dependency.

[0151] In this example, an element to which the FFS mode is applied is used as the liquid crystal element 20. It is possible to use liquid crystal elements that are applied in various modes, such as VA (Ver tical Alignment mode, TN (Twisted Nematic) mode Mode, IPS (In-Plane-Switching) mode, FFS (Fringe Field Switching) mode, ASM (Axially Symmetry ic aligned micro-cell) mode, OCB (Optically Compensated Birefringence mode, FLC (Ferrero) lectric Liquid Crystal) mode, AFLC (AntiFerr Liquid crystal elements that use the dielectric liquid crystal mode, etc. It can be used.

[0152] In addition, the touch panel 310 is provided with a normally black type liquid crystal display device, for example, a vertical alignment ( A transmissive liquid crystal display device employing a vertical alignment (VA) mode may also be used. is MVA (Multi-Domain Vertical Alignment) mode. PVA (Patterned Vertical Alignment) mode, A SV (Advanced Super View) mode, etc. can be used.

[0153] The liquid crystal element is an element that controls the transmission or non-transmission of light by the optical modulation action of the liquid crystal. The optical modulation effect of the liquid crystal is due to the electric field applied to the liquid crystal (horizontal electric field, vertical electric field). The liquid crystal used in the liquid crystal element is are thermotropic liquid crystal, low molecular weight liquid crystal, high molecular weight liquid crystal, polymer dispersed liquid crystal (PDLC:P polymer dispersed liquid crystal), ferroelectric liquid crystal, Antiferroelectric liquid crystals can be used. These liquid crystal materials can be cholesteric depending on the conditions. These phases include smectic phase, cubic phase, chiral nematic phase, and isotropic phase.

[0154] The liquid crystal material may be either a positive type liquid crystal or a negative type liquid crystal. The optimum liquid crystal material may be selected depending on the mode and design to be applied.

[0155] In addition, when the in-plane switching method is adopted, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases, and when the temperature of cholesteric liquid crystal is increased, the cholesteric The blue phase appears just before the transition from the black phase to the isotropic phase. Therefore, in order to improve the temperature range, a liquid crystal composition containing a chiral agent of several weight percent or more is used. The liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent is used in the liquid crystal layer. The blue phase is a characteristic of the liquid crystal composition containing a liquid crystal and a chiral agent. The composition does not require alignment treatment and has little viewing angle dependency. This eliminates the need for rubbing, preventing electrostatic damage caused by rubbing. This can prevent defects and damage to the liquid crystal display device during the manufacturing process.

[0156] In this configuration example, the capacitance formed between the conductive layer 331 and the conductive layer 252 is used to That is, the conductive layer 252 is a pair of the liquid crystal element 208. The electrode serves as both one of the electrodes of the touch sensor and one of the pair of electrodes of the touch sensor.

[0157] Here, the conductive layer 251, the conductive layer 252, or the conductive layer 331 is a layer that transmits visible light. It is preferable to use a conductive material. For example, a conductive material containing a metal oxide is used. For example, among the translucent conductive materials described later, metal oxides can be used. Cut.

[0158] Alternatively, the conductive layer 251, the conductive layer 252, or the conductive layer 331 may be, for example, another conductive layer or It is preferable to use a metal oxide containing the same metal element as the semiconductor layer. When an oxide semiconductor is used for the semiconductor layer of the transistor included in the filter 310, It is preferable to use a conductive oxide containing a metal element. A silicon nitride film containing hydrogen may be used. In that case, the conductive layer 252 is made of an oxide semiconductor. When using a body, the conductivity can be improved by hydrogen supplied from the insulating layer 254. That is, the oxide semiconductor can be made into an N+ state.

[0159] In some cases, a fixed potential may be applied to the conductive layer 331. can shield electromagnetic noise from the outside. In this case, a constant potential that does not affect the switching of the liquid crystal 253 may be applied to the conductive layer 331. For example, a ground potential, a common potential, or any constant potential can be used. The conductive layer 331 and the conductive layer 252 may be set to the same potential.

[0160] In addition, by applying an appropriate potential to the conductive layer 331, the conductive layers 251 and 252 The direction of the electric field (direction of the electric field lines) generated between the In this way, the electric field can be directed in a direction substantially perpendicular to the thickness (horizontal direction). This suppresses alignment defects in the liquid crystal 253 and prevents problems such as light leakage. This can be done.

[0161] Here, a substrate that is directly in contact with a sensing object such as a finger or a stylus is placed above the substrate 372. In this case, a polarizing plate or a circular polarizing plate may be provided between the substrate 372 and the substrate. In this case, a protective layer (ceramic coating, etc.) is provided on the substrate. The protective layer is preferably made of, for example, silicon oxide, aluminum oxide, or yttrium oxide. Alternatively, inorganic insulating materials such as yttria-stabilized zirconia (YSZ) can be used. Further, the substrate may be made of tempered glass. The tempered glass may be made by an ion exchange method, an air cooling method, or the like. The material is subjected to physical or chemical treatment and compressive stress is applied to the surface. It is possible.

[0162] [About each component] Each of the above components will be described below.

[0163] {substrate} The substrate of the touch panel can be made of a material having a flat surface. The substrate on the side from which light is extracted is made of a material that transmits the light. For example, glass or quartz is used. Materials such as ceramic, sapphire, and organic resin can be used. Single crystal semiconductor substrates made of silicon carbide, polycrystalline semiconductor substrates, silicon germanium, etc. It is also possible to apply compound semiconductor substrates, SOI substrates, etc., and semiconductors can be formed on these substrates. A substrate provided with a semiconductor element may be used as the substrate.

[0164] When using a glass substrate as the substrate, the 6th generation (1500mm x 1850mm ), 7th generation (1870mm x 2200mm), 8th generation (2200mm x 2400mm ), 9th generation (2400mm x 2800mm), 10th generation (2950mm x 3400mm By using a large area substrate such as a GaN substrate, a large display device can be manufactured. A flexible substrate is used as the plate, and transistors, capacitors, etc. are formed directly on the flexible substrate. That's fine.

[0165] By using a thin substrate, the touch panel can be made lighter and thinner. Furthermore, by using a substrate having a thickness sufficient to provide flexibility, a flexible touch panel can be obtained. This can be achieved.

[0166] Examples of glass include alkali-free glass, barium borosilicate glass, and aluminophobic glass. Usable materials include silicate glass.

[0167] Examples of materials that are flexible and transparent to visible light include: Thickness of glass, polyethylene terephthalate (PET), polyethylene naphthalate Polyester resins such as (PEN), polyacrylonitrile resins, polyimide resins, polymers methyl methacrylate resin, polycarbonate (PC) resin, polyethersulfone (PE S) Resin, polyamide resin, cycloolefin resin, polystyrene resin, polyamide imide resin, polyvinyl chloride resin, polytetrafluoroethylene (PTFE) resin, etc. In particular, it is preferable to use a material with a low thermal expansion coefficient, such as polyamideimide. Resin, polyimide resin, PET, etc. can be suitably used. Uses substrates impregnated with resin or substrates with a lower thermal expansion coefficient by mixing inorganic fillers into organic resin Since the substrate using such a material is light in weight, the substrate can be easily used. The touch panel can also be made lighter.

[0168] In addition, the substrate on the side from which light is not extracted does not need to be light-transmitting. In addition to the substrates mentioned above, metal substrates made of metal or alloy materials, ceramic substrates, or semiconductor substrates are also available. Metallic materials and alloy materials have high thermal conductivity, and heat is distributed to the entire sealing substrate. This is preferable because it can easily conduct heat and suppress local temperature increases on the touch panel. To obtain flexibility and bendability, the thickness of the metal substrate should be between 10 μm and 200 μm. is preferable, and it is more preferable that it is 20 μm or more and 50 μm or less.

[0169] The material for the metal substrate is not particularly limited, but examples thereof include aluminum, copper, and nickel. Nickel, or an alloy of metals such as aluminum alloy or stainless steel is preferably used. This can be done.

[0170] In addition, insulating materials can be obtained by oxidizing the surface of a conductive substrate or by forming an insulating film on the surface. A substrate that has been subjected to a treatment may be used. For example, a coating method such as a spin coating method or a dip method may be used. The insulating film may be formed by electrodeposition, vapor deposition, sputtering, or the like. In addition to leaving it in an atmosphere or heating it, an oxide film is formed on the surface of the substrate by anodizing or other methods. It may be done.

[0171] As for the flexible substrate, a layer using the above material is used to protect the surface of the touch panel from scratches, etc. Hard coating layers (such as silicon nitride layers) that protect the surface from the pressure, and layers made of materials that can disperse pressure The laminate may be formed by laminating a layer (for example, an aramid resin layer) or the like. In order to prevent the deterioration of the life of the display element due to the above-mentioned reasons, silicon nitride film and silicon oxynitride film are used. and permeable films containing nitrogen and silicon such as aluminum nitride films. It may have an insulating film with low water-solubility.

[0172] The substrate may be formed by laminating a plurality of layers. In particular, a substrate having a glass layer may be used. This improves the barrier properties against water and oxygen, making it possible to create a highly reliable touch panel. do.

[0173] For example, a substrate having a glass layer, an adhesive layer, and an organic resin layer stacked from the side closest to the display element is used. The thickness of the glass layer is preferably 20 μm or more and 200 μm or less. The thickness of the glass layer is 25 μm or more and 100 μm or less. A glass layer with such a thickness is highly resistant to water and oxygen. It can simultaneously achieve high barrier properties and flexibility. The thickness of the organic resin layer is 10 μm. The thickness of such organic resin is set to be 200 μm or more, and preferably 20 μm or more and 50 μm or less. By providing this layer, it is possible to suppress breakage and cracks in the glass layer and improve mechanical strength. By applying such a composite material of glass material and organic resin to a substrate, This makes it possible to provide a highly reliable flexible touch panel.

[0174] {Transistor} The transistor has a conductive layer that functions as a gate electrode, a semiconductor layer, and a a conductive layer that functions as a drain electrode; a conductive layer that functions as a gate insulating layer; The above describes the case where a bottom-gate transistor is used. are.

[0175] Note that there is no particular limitation on the structure of a transistor included in a touch panel of one embodiment of the present invention. For example, it may be a planar type transistor or a staggered type transistor. Alternatively, a top gate or bottom gate transistor may be used. Alternatively, the transistor may have a gate electrode above and below the channel. The semiconductor material used for the transistor is not particularly limited, and for example, Examples of the semiconductor include nitride semiconductors, silicon, and germanium.

[0176] The crystallinity of the semiconductor material used in the transistor is not particularly limited. A semiconductor having crystallinity (a microcrystalline semiconductor, a polycrystalline semiconductor, a single-crystal semiconductor, or a semiconductor having a partially crystalline region) If a semiconductor having crystallinity is used, This is preferable because it can suppress deterioration of the resistor characteristics.

[0177] Semiconductor materials used in transistors include, for example, elements of Group 14, compound semiconductors, and the like. A conductor or an oxide semiconductor can be used for the semiconductor layer. A conductor, a semiconductor containing gallium arsenide, an oxide semiconductor containing indium, or the like can be used.

[0178] In particular, an oxide semiconductor can be used as a semiconductor in which a channel of a transistor is formed. It is particularly preferable to use an oxide semiconductor having a larger band gap than silicon. It is preferable to use a semiconductor material with a wider band gap and lower carrier density than silicon. The use of such a compound is preferable because it can reduce the current in the off state of the transistor.

[0179] For example, the oxide semiconductor may contain at least indium (In) or zinc (Zn It is preferable that the oxide contains In-M-Zn (wherein M is Al, Ti, or Zn). oxides represented by the formula (metals such as a, Ge, Y, Zr, Sn, La, Ce, Hf or Nd) Includes.

[0180] In particular, the semiconductor layer has a plurality of crystal portions, and the c-axes of the crystal portions are aligned with the surface on which the semiconductor layer is formed. Or, the crystals are oriented approximately perpendicular to the upper surface of the semiconductor layer, and grain boundaries are observed between adjacent crystal portions. It is preferable to use an oxide semiconductor film that cannot be formed by the above-mentioned method.

[0181] Such oxide semiconductors have no crystal grain boundaries, so when the display panel is bent, The occurrence of cracks in the oxide semiconductor film due to stress is suppressed. Such oxide semiconductors are suitable for use in touch panels that are flexible and can be curved. It can be used.

[0182] In addition, by using such a crystalline oxide semiconductor for the semiconductor layer, This suppresses fluctuations in the resistance, thereby achieving a highly reliable transistor.

[0183] In addition, a transistor using an oxide semiconductor with a wider band gap than silicon is Due to its low off-state current, the charge stored in the capacitor connected in series with the transistor can be maintained for a long period of time. By applying such a transistor to a pixel, It is also possible to stop the driving circuit while maintaining the gradation of the image displayed in each display area. As a result, a display device with extremely reduced power consumption can be realized.

[0184] The semiconductor layer may be, for example, at least indium (In), zinc (Zn), and M (Al, Ti). In-M-Zn oxide containing metals such as Ga, Y, Zr, La, Ce, Sn or Hf In addition, the electric field of a transistor using the oxide semiconductor is preferably It is preferable to include a stabilizer therewith to reduce variations in air properties.

[0185] The stabilizer includes the metals described above under M, for example, gallium (Ga), silicon (Si), and the like. Sn, hafnium (Hf), aluminum (Al), or zirconium (Zr) Other stabilizers include lanthanum (La), a lanthanide. , Cerium (Ce), Praseodymium (Pr), Neodymium (Nd), Samarium (Sm), Europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium ( Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), lutetium (Lu), etc.

[0186] Examples of oxide semiconductors that form the semiconductor layer include In-Ga-Zn oxides, In- Al-Zn oxide, In-Sn-Zn oxide, In-Hf-Zn oxide, In-L a-Zn oxide, In-Ce-Zn oxide, In-Pr-Zn oxide, In-Nd -Zn-based oxides, In-Sm-Zn-based oxides, In-Eu-Zn-based oxides, In-Gd- Zn-based oxide, In-Tb-Zn-based oxide, In-Dy-Zn-based oxide, In-Ho-Z n-based oxides, In-Er-Zn-based oxides, In-Tm-Zn-based oxides, In-Yb-Zn In-based oxides, In-Lu-Zn-based oxides, In-Sn-Ga-Zn-based oxides, In-Hf- Ga-Zn oxide, In-Al-Ga-Zn oxide, In-Sn-Al-Zn oxide In-Sn-Hf-Zn oxides, In-Hf-Al-Zn oxides can be used. can.

[0187] Here, the In-Ga-Zn oxide refers to an oxide having In, Ga, and Zn as its main components. The ratio of In, Ga, and Zn does not matter. Metal elements other than n may be included.

[0188] The semiconductor layer and the conductive layer may contain the same metal element from the oxides. By using the same metal element for the semiconductor layer and the conductive layer, it is possible to reduce manufacturing costs. For example, by using metal oxide targets with the same metal composition, manufacturing costs can be reduced. In addition, by using a metal oxide target with the same metal composition, The etching gas or etching solution is commonly used for processing the semiconductor layer and the conductive layer. However, even if the semiconductor layer and the conductive layer contain the same metal element, the composition may be different. For example, during the manufacturing process of a transistor or a capacitor, the metal element in the film may be different. The elements may be released, resulting in a different metal composition.

[0189] When the semiconductor layer is an In-M-Zn oxide, the In and M excluding Zn and O The atomic ratio of In is preferably In when the sum of In and M is 100 atomic %. is higher than 25 atomic %, M is less than 75 atomic %, and more preferably In is 34 atomic % or higher and M less than 66 atomic %.

[0190] The semiconductor layer has an energy gap of 2 eV or more, preferably 2.5 eV or more, and more preferably The energy gap is 3 eV or more. This allows the off-state current of the transistor to be reduced.

[0191] The thickness of the semiconductor layer is 3 nm or more and 200 nm or less, preferably 3 nm or more and 100 nm or less. More preferably, the thickness is 3 nm or more and 50 nm or less.

[0192] The semiconductor layer is In-M-Zn oxide (M is Al, Ti, Ga, Ge, Y, Zr, Sn, L a, Ce, Hf or Nd), the spatula used to deposit the In-M-Zn oxide The atomic ratio of the metal elements in the target preferably satisfies In≧M, Zn≧M. The atomic ratio of the metal elements in such a sputtering target is In:M:Z. n=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=3:1:2, 4: The atomic ratio of the semiconductor layers to be formed is preferably 2:3. The atomic ratio of metal elements contained in the sputtering target varies by ±40% Includes.

[0193] For example, an oxide semiconductor film having a low carrier density is used as the semiconductor layer. , carrier density is 1×10 17 pieces / cm 3 Less than 1 × 1015 pieces / cm 3 below , and more preferably 1 × 10 13 pieces / cm 3 Less than 1×10, more preferably 11 pieces / cm 3 The following oxide semiconductor film is used.

[0194] However, the semiconductor characteristics and electrical characteristics (field effect) of the required transistors are not limited to these. It is sufficient to use an appropriate composition depending on the required properties (e.g., the mobility, threshold voltage, etc.). In order to obtain the semiconductor characteristics of a transistor, the carrier density, impurity concentration, and defect density of the semiconductor layer must be carefully considered. It is preferable to appropriately set the density, atomic ratio of metal element to oxygen, interatomic distance, density, etc. stomach.

[0195] When silicon or carbon, which is one of the group 14 elements, is contained in the semiconductor layer, As a result, oxygen vacancies increase in the semiconductor layer, causing it to become n-type. The carbon concentration (obtained by secondary ion mass spectrometry) was 2 × 10 18 atoms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 The following applies.

[0196] In addition, in the semiconductor layer, alkali metal or alkali metals obtained by secondary ion mass spectrometry The concentration of alkaline earth metals is 1×10 18 atoms / cm 3 Less than or equal to 2 x 10 1 6 atoms / cm 3 Alkali metals and alkaline earth metals are oxide semiconductors. When the electrons combine with the electrons, carriers may be generated, increasing the off-state current of the transistor. Therefore, it is necessary to reduce the concentration of alkali metals or alkaline earth metals in the semiconductor layer. It is preferable that

[0197] In addition, when nitrogen is contained in the semiconductor layer, electrons are generated as carriers, and the carrier density As a result, transistors using oxide semiconductors containing nitrogen are easily made n-type. Therefore, in the oxide semiconductor film, nitrogen is It is preferable that the amount of the ions is reduced as much as possible. For example, the amount of the ions is reduced as much as possible by secondary ion mass spectrometry. The nitrogen concentration is 5×10 18 atoms / cm 3 It is preferable to do the following:

[0198] The semiconductor layer may have a non-single crystal structure, for example. CAAC-OS(C Axis Aligned-Crystalline Oxide Semiconductor), polycrystalline structure, microcrystalline structure (described later), or amorphous structure Among non-single crystal structures, the amorphous structure has the highest defect level density, and CAAC-OS has the lowest defect level density.

[0199] The semiconductor layer may have an amorphous structure. The amorphous oxide semiconductor film may be, for example, The molecular arrangement is disordered and does not have a crystalline component. Alternatively, an oxide film with an amorphous structure is, for example, It has a completely amorphous structure and does not have any crystalline parts.

[0200] The semiconductor layer may have an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAA region, or a crystalline structure region. The film may be a mixed film having two or more of the C-OS region and the single crystal structure region. The composite film may have, for example, an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC- It may have a layered structure of two or more regions, either an OS region or a single crystal structure region. .

[0201] Alternatively, silicon is preferably used as the semiconductor in which the channel of the transistor is formed. Although amorphous silicon may be used as silicon, silicon having crystallinity is particularly preferred. It is preferable to use silicon. For example, microcrystalline silicon, polycrystalline silicon, single crystal silicon, etc. In particular, polycrystalline silicon has a lower temperature than single-crystal silicon. It can be formed without any additional process and has higher field effect mobility and higher reliability than amorphous silicon. By applying such a polycrystalline semiconductor to the pixel, the aperture ratio of the pixel can be improved. Even when the pixels are extremely fine, the gate drive circuit and source drive circuit This makes it possible to form the circuit and the pixel on the same substrate, reducing the number of parts that make up electronic devices. It is possible.

[0202] {Conductive layer} In addition to the gate, source, and drain of the transistor, various wiring that makes up the touch panel Materials that can be used for conductive layers such as wires and electrodes include aluminum, titanium, Chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or The material is a metal such as tungsten, or an alloy containing this as its main component, in a single layer structure or a multilayer structure. For example, a single layer structure of aluminum film containing silicon, aluminum film on titanium film, Two-layer structure with tungsten film on top of aluminum film, two-layer structure with tungsten film on top of aluminum film, copper - Two-layer structure with copper film laminated on magnesium-aluminum alloy film, copper film laminated on titanium film Two-layer structure with copper film laminated on tungsten film, two-layer structure with titanium film or titanium nitride film A titanium film and an aluminum film or copper film are laminated on the titanium film or titanium nitride film. A three-layer structure in which a titanium film or titanium nitride film is formed on top of the titanium film, a molybdenum film or The molybdenum nitride film is a layer of aluminum overlaid on the molybdenum film or the molybdenum nitride film. A molybdenum film or a copper film is laminated on the substrate, and a molybdenum film or a molybdenum nitride film is then formed on the laminate. There are three-layer structures, etc. Transparent conductive materials containing indium oxide, tin oxide, or zinc oxide Furthermore, when copper containing manganese is used, the shape can be easily controlled by etching. This is preferable because it increases

[0203] Examples of the conductive material having light-transmitting properties include indium oxide, indium tin oxide, and indium tin oxide. Conductive oxides such as indium zinc oxide, zinc oxide, and gallium-doped zinc oxide, or Graphene can be used. Alternatively, gold, silver, platinum, magnesium, nickel, tantalum, etc. such as tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, or titanium Metallic materials and alloy materials containing such metallic materials can be used. Alternatively, a metal material, an alloy material (or a combination thereof) may be used. When using these nitrides, it is sufficient to make them thin enough to have light transmission properties. A laminated film of a material can be used as the conductive layer. For example, a silver-magnesium alloy and an insulator can be used. It is preferable to use a laminated film of tin oxide or the like, since the conductivity can be increased.

[0204] Alternatively, the conductive layer is preferably made of an oxide semiconductor similar to that of the semiconductor layer. When the conductive layer is formed, the conductive layer exhibits a lower electrical resistance than the region in which the channel of the semiconductor layer is formed. , is preferably formed.

[0205] For example, such a conductive layer may be used as a conductive layer that functions as a second gate electrode of a transistor. Alternatively, it can be applied to other conductive layers that are light-transmitting.

[0206] {Method for controlling the resistivity of oxide semiconductors} The oxide semiconductor film that can be used for the semiconductor layer and the conductive layer has oxygen vacancies and / or is a semiconductor material whose resistivity can be controlled by the concentration of impurities such as hydrogen and water in the film. Therefore, a process that increases oxygen deficiency and / or impurity concentration in the semiconductor layer and the conductive layer, or by selecting a treatment that reduces oxygen deficiency and / or impurity concentration, respectively. The resistivity of the oxide semiconductor film can be controlled.

[0207] Specifically, a plasma treatment is performed on an oxide semiconductor film used for a conductive layer, and the oxide semiconductor Increase of oxygen vacancies in the film and / or impurities such as hydrogen and water in the oxide semiconductor film By increasing the amount of the oxide semiconductor film, the carrier density can be increased and the resistivity can be reduced. Alternatively, an insulating film containing hydrogen may be formed in contact with the oxide semiconductor film, and the insulating film containing hydrogen may be formed in contact with the oxide semiconductor film. By diffusing hydrogen from the insulating film into the oxide semiconductor film, the carrier density is increased and the resistivity is reduced. The oxide semiconductor film can have low conductivity.

[0208] On the other hand, the semiconductor layer that functions as the channel region of the transistor is in contact with the insulating film that contains hydrogen. At least one of the insulating films in contact with the semiconductor layer contains oxygen. Then, by applying an insulating film capable of releasing oxygen, it is possible to supply oxygen to the semiconductor layer. The semiconductor layer to which oxygen is supplied becomes resistant because oxygen vacancies in the film or at the interface are filled. The insulating film capable of releasing oxygen can be an oxide semiconductor film with high resistivity. For example, a silicon oxide film or a silicon oxynitride film can be used.

[0209] In order to obtain an oxide semiconductor film with low resistivity, an ion implantation method, an ion doping method, etc. , plasma immersion ion implantation method, etc. Nitrogen or nitrogen may be implanted into the oxide semiconductor film.

[0210] In order to obtain an oxide semiconductor film with low resistivity, the oxide semiconductor film is subjected to plasma treatment. For example, the plasma treatment may be carried out using a rare gas (He, Ne, A Plasma using gas containing one or more selected from the group consisting of r, Kr, Xe), hydrogen, and nitrogen. More specifically, plasma treatment under an Ar atmosphere, a mixture of Ar and hydrogen, Plasma treatment under a mixed gas atmosphere, plasma treatment under an ammonia atmosphere, and plasma treatment under Ar and ammonia Plasma treatment in a mixed gas atmosphere of nia or plasma treatment in a nitrogen atmosphere Examples include:

[0211] By the plasma treatment, the oxide semiconductor film is formed into a lattice from which oxygen is desorbed (or Oxygen vacancies are formed in the separated portions. These oxygen vacancies may become a cause of carrier generation. In addition, in the vicinity of the oxide semiconductor film, more specifically, in the lower side or the upper side of the oxide semiconductor film, When hydrogen is supplied from the insulating film adjacent to the side, the oxygen vacancies and hydrogen combine to form the capacitor. In some cases, electrons are generated.

[0212] On the other hand, an oxide semiconductor film in which oxygen vacancies are filled and the hydrogen concentration is reduced can be made highly purified and intrinsic. Alternatively, it can be said that the oxide semiconductor film is substantially highly purified and made intrinsic. The carrier density of the oxide semiconductor film is 8×10 11 pieces / cm 3 Less than 1 x 10 1 1 / cm 3 less than 1×10 10 pieces / cm 3 It means that the purity is less than A highly pure or substantially highly pure intrinsic oxide semiconductor film has few carrier generation sources. In addition, the carrier density can be reduced. Some oxide semiconductor films have a low density of defect states, and therefore, the density of trap states can be reduced. Cut.

[0213] In addition, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a significantly low off-state current. Very small, with a channel width of 1×10 6 Even if the device has a channel length of 10 μm, When the voltage between the source electrode and the drain electrode (drain voltage) is in the range of 1V to 10V, The current is below the measurement limit of the semiconductor parameter analyzer, i.e., 1×10 -13 A and below Therefore, the above-mentioned high purity pure or substantially high purity pure can be obtained. A transistor using a semiconductor layer including an oxide semiconductor film, which is electrically conductive, for a channel region is This results in a highly reliable transistor with little fluctuation in characteristics.

[0214] As an insulating film in contact with the oxide semiconductor film used as a conductive layer, for example, an insulating film containing hydrogen In other words, an insulating film capable of releasing hydrogen, typically a silicon nitride film, is used. As an insulating film capable of releasing hydrogen, indicates that the hydrogen concentration in the film is 1×10 22 atoms / cm 3 It is preferable that this is equal to or greater than this. By forming such an insulating film in contact with the conductive layer, hydrogen can be effectively contained in the conductive layer. In this way, by changing the structure of the insulating film in contact with the semiconductor layer and the conductive layer, In this case, the resistivity of the oxide semiconductor film can be controlled.

[0215] The hydrogen contained in the oxide semiconductor film reacts with oxygen that is bonded to metal atoms to form water. The oxygen vacancies are formed in the lattice from which oxygen is desorbed (or in the portions from which oxygen is desorbed). When hydrogen enters the electron carrier, it can generate electrons. By bonding with oxygen, which bonds with metal atoms, electrons, which act as carriers, may be generated. Therefore, the conductive layer provided in contact with the insulating film containing hydrogen has a higher hydrogen content than the semiconductor layer. An oxide semiconductor film with high carrier density is obtained.

[0216] The semiconductor layer in which the channel region of the transistor is formed has as little hydrogen as possible. Specifically, it is preferable to measure the thickness of the semiconductor layer by secondary ion mass spectrometry (SIMS). Water obtained by Secondary Ion Mass Spectrometry The element concentration is 2 x 10 20 atoms / cm 3 Less than or equal to 5 x 10 19 atoms / cm 3 Less than 1×10, more preferably 19 atoms / cm 3 Below, 5 x 10 18 ato ms / cm 3 Less than 1 x 10 18 atoms / cm 3 Less than or equal to 5, more preferably x10 17 atoms / cm 3 or less, more preferably 1 × 10 16 atoms / cm 3 The following applies.

[0217] On the other hand, the conductive layer has a higher hydrogen concentration and / or oxygen vacancy than the semiconductor layer, and has a lower resistivity. The hydrogen concentration in the conductive layer is 8×10 19 atoms / cm 3 or more, preferably 1 × 10 20 atoms / cm 3 More preferably, 5 × 10 20 a toms / cm 3 In addition, the hydrogen concentration in the conductive layer is higher than that in the semiconductor layer. The resistivity of the conductive layer is at least 2 times, preferably at least 10 times, that of the semiconductor layer. 1×10 -8 more than 1x10 -1 It is preferably less than 1×10 -3 Ωcm or more 1×10 4 Ωcm, and more preferably a resistivity of 1×10 -3 Ωcm or more 1×10 -1 It is preferable that the resistivity is less than Ωcm.

[0218] {insulating layer} Examples of insulating materials that can be used for the insulating layers, overcoats, spacers, etc. include: Examples include resins such as acrylic and epoxy, resins with siloxane bonds, silicon oxide, Inorganic insulation such as silicon oxynitride, silicon nitride oxide, silicon nitride, and aluminum oxide Materials can also be used.

[0219] {adhesive layer} The adhesive layer is made of a hardening resin such as a thermosetting resin, a photo-hardening resin, or a two-component mixed hardening resin. For example, resins such as acrylic, urethane, and epoxy, or silicone Resins such as resins having siloxane bonds, such as corn, can be used.

[0220] {Connection Layer} Anisotropic Conductive Film (ACF) is used as the connection layer. conductive film) and anisotropic conductive paste (ACP) Conductive Paste) can be used.

[0221] {Colored layer} Materials that can be used for the coloring layer include metal materials, resin materials, pigments, and dyes. Examples include resin materials.

[0222] This concludes the explanation of each component.

[0223] [Cross-sectional configuration example 1-2] FIG. 21 shows an example of a cross-sectional configuration of a touch panel that is partially different from the above. Note that we will omit the explanation of the parts that overlap with the above and will only explain the differences.

[0224] 21 shows an example in which the colored layer 231 is disposed on the substrate 371 side. In this case, the colored layer 231 is provided in contact with the upper surface of the insulating layer 213. An insulating layer 214 is provided to function as a planarizing layer.

[0225] By adopting such a configuration, the configuration of the substrate 372 can be further simplified. For example, in FIG. 21, only the conductive layer 331 and the conductive layer 341 are formed on the substrate 372. If necessary, an alignment film or the like may be provided on the substrate 372.

[0226] [Cross-sectional configuration example 1-3] In FIG. 22, the transistor 201 and the transistor 203 in FIG. 20 are This shows an example in which a gate-type transistor is applied.

[0227] Each transistor has a semiconductor layer, and a gate electrode is provided on the semiconductor layer via an insulating layer 211. The semiconductor layer may also have a region with a low resistance. Acts as a source or drain.

[0228] The source and drain electrodes of the transistor are provided on the insulating layer 213, and the insulating layer 2 13, the insulating layer 212, the insulating layer 211 through the openings provided in the insulating layer 211, the semiconductor layer having a low resistance The area is electrically connected to the

[0229] The region of the semiconductor layer with reduced resistance is, for example, a region where a transistor channel is formed. regions containing more impurities, regions with higher carrier concentrations, or regions with lower crystallinity. The impurities that have the effect of increasing the conductivity can be selected from the semiconductor layer. Although it varies depending on the material, elements that can give n-type conductivity, such as phosphorus, and boron, etc. Elements that can give p-type conductivity, rare gases such as helium, neon, and argon, as well as hydrogen, Lithium, sodium, magnesium, aluminum, nitrogen, fluorine, potassium, calcium Other examples include titanium, iron, nickel, copper, zinc, silver, indium, and sulphur. For example, regions 262 and 263 act as impurities that affect the conductivity of the semiconductor. The region 63 contains more of the above impurities than the region where the channel of the transistor is formed.

[0230] [Cross-sectional configuration example 1-4] FIG. 23 shows an example in which the position of the conductive layer 252 is different from that of FIG. 20 and the like. Specifically, an example of a configuration in which the conductive layer 252 is located between the insulating layer 212 and the insulating layer 213 is shown. There are.

[0231] For the conductive layer 252, for example, the above-described light-transmitting conductive material can be used. .

[0232] For example, the conductive layer 252 may include a low-resistance oxide semiconductor. In particular, it is preferable that the semiconductor layer of the transistor included in the touch panel 310 is oxidized. When a compound semiconductor is used, it is preferable to use an oxide semiconductor having a lower resistivity than the compound semiconductor. .

[0233] For example, the resistance of the conductive layer 252 can be reduced by the above-described method for controlling the resistivity of an oxide semiconductor. It can be done.

[0234] In this case, the insulating layer 213 covering the conductive layer 252 is formed of the above-mentioned insulating material containing a large amount of hydrogen. It is preferred to use an edge layer, particularly one that includes an insulating film containing silicon nitride.

[0235] [Cross-section example 2] Below is an example of the cross-sectional configuration of a touch panel that differs in part from the cross-sectional configuration example above. explain.

[0236] [Cross-sectional configuration example 2-1] 24, the conductive layer 331 and the conductive layer 341 are disposed on the substrate 371 side, which is different from the above cross section. It differs from the surface configuration example.

[0237] The conductive layer 331 and the conductive layer 341 are provided on a substrate 371. An insulating layer 217 is provided to cover the conductive layer 341. A transistor 201, a transistor 203, etc. are provided.

[0238] In addition, in the connection portion 385, the conductive layer 341 and the insulating layer 217 are connected through an opening provided in the insulating layer 217. The conductive layer 207 is electrically connected to the conductive layer 207 .

[0239] Here, the capacitance generated between the conductive layer 331 and the conductive layer 252 is used to detect the touch operation. It can be put out.

[0240] By adopting such a configuration, the configuration of the substrate 372 can be simplified.

[0241] At this time, the conductive layer 331 and the conductive layer 341 are preferably made of a conductive material with high heat resistance. In addition, when a material having a light-shielding property such as a metal is used as the conductive layer 331, It is preferable to provide an opening in the portion overlapping with the colored layer 231 as shown in FIG.

[0242] As shown in FIG. 24, the conductive layer 331 is arranged so as not to overlap the transistor 203 and the like. Alternatively, an opening is preferably formed in a portion of the conductive layer 331 that overlaps with the transistor 203 and the like. It is preferable that the conductive layer 331 has a structure having an opening. As a result, the transistor 203 and the like can be prevented from malfunctioning.

[0243] [Cross-sectional configuration example 2-2] 25 shows the structure shown in FIG. 24, in which the colored layer 231 is disposed on the substrate 371 side in the same manner as in FIG. 21. An example is shown.

[0244] In this way, the conductive layer 331, the conductive layer 341, and the colored layer 231 are provided on the substrate 371 side. By doing so, it is possible to form a structure in which nothing is formed on the substrate 372. An alignment film may be provided in a region of the substrate 371 that is in contact with the liquid crystal layer.

[0245] [Configuration example 2] Below, drawings are shown of examples of touch panel configurations that are partially different from the above-mentioned configuration example 1. Please refer to the following for explanation.

[0246] The touch panel according to one embodiment of the present invention described below includes a pair of conductive electrodes constituting a touch sensor. At least one of the conductive layers is the same as at least one of the pair of conductive layers included in the liquid crystal element. At least one of the pair of conductive layers constituting the touch sensor and the liquid crystal element are formed. At least one of the pair of conductive layers is disposed on the same surface. At least one of the pair of conductive layers constituting the liquid crystal element is In other words, one conductive film serves as a pair of conductive films that constitute the touch sensor. and at least one of a pair of conductive layers of the liquid crystal element. This simplifies the touch panel manufacturing process. This can further reduce the manufacturing cost.

[0247] [Configuration Example 2-1] FIG. 26 shows a pair of conductive layers that function as electrodes of a liquid crystal element and a touch sensor. FIG. 1 is a top view schematic diagram showing an example of a layout of paired conductive layers, where the FFS mode is applied. The following description will be given taking the liquid crystal element as an example.

[0248] FIG. 27 shows a cross section of the touch panel corresponding to the section line X1-X2 in FIG. 26 and 27 correspond to FIG. 8(A).

[0249] The conductive layers 401 have island shapes and are arranged in a matrix in the X and Y directions. Slits are provided in the conductive layer 401. The conductive layer 402 overlaps each conductive layer 401. Here, the conductive layer 401 functions as a pixel electrode, and the conductive layer 402 Here, the upper conductive layer 401 serves as a pixel electrode, and the lower conductive layer 402 serves as a common electrode. The case where the conductive layer 402 is a common electrode will be described. good.

[0250] The conductive layer 411a and the conductive layer 411b extending in the Y direction are adjacent to each other. It is arranged to be located between layers 401.

[0251] The conductive layer 412a extending in the X direction is composed of the conductive layer 404 and the conductive layer 405. The conductive layer 404 has a strip shape with its long side parallel to the X direction. The conductive layer 405 is provided between the conductive layer 411a and the conductive layer 411b. The conductive layer 411a and the conductive layer 411b are overlapped with each other. The conductive layer 404 is electrically connected to the conductive layer 405 through a contact hole. The layer 411a and the conductive layer 411b overlap with each other via an insulating layer (not shown). The conductive layer 405 may be arranged to extend in the X direction, as shown in FIG. In this way, the wiring resistance of the conductive layer 404 can be substantially reduced.

[0252] In FIG. 26 or 28, the conductive layer 411a and the conductive layer 411b are The conductive layer 412a and the conductive layer 412b are arranged so as to extend in the Y direction. It may be placed.

[0253] Here, the conductive layer 411a, the conductive layer 411b, the conductive layer 404, and the conductive layer 401 are Each of the conductive layers is formed by processing the same conductive film. The conductive layer 411b, the conductive layer 404, and the conductive layer 401 are arranged on the same plane. become.

[0254] Here, the conductive layer 405 is formed by using the source and drain electrodes 285 of the transistor. In this case, the same conductive film as that of the gate electrode 402 is formed under the conductive layer 405. Even if a gate electrode or the like is arranged, the layout can be performed without any problems. The layer 405 is overlapped with the gate electrode and a film formed by processing the same conductive film as the gate electrode. However, one embodiment of the present invention is not limited thereto, and the transistors The same conductive film as the gate electrode 281, the semiconductor layer, or other conductive layers is processed to form a conductive layer. 405 can be formed.

[0255] As an example, the conductive layer 405 is formed by processing the same conductive film as the gate electrode. 29. In this case, the source electrode and the drain electrode 285 are formed on the conductive layer 405. Therefore, the conductive layer 405 can be laid out without any problem. , the source electrode and the drain electrode 285, or the same conductor as the source electrode and the drain electrode 285 The conductive film can be placed on top of or crossing the film formed by processing the conductive film. A source signal line (a wiring having a function of transmitting a video signal to each pixel) and a conductive layer 411a or Therefore, the layer of the conductive layer 401 can be arranged so that the conductive layer 401 and the conductive layer 411b overlap each other. This allows the area of ​​the outer periphery to be increased, which means that the aperture ratio can be increased.

[0256] Alternatively, the conductive layer 405 may be formed by processing the same conductive film as the conductive layer 402, as shown in FIG. In this case, the source and drain electrodes 285 and the gate electrode 286 are formed under the conductive layer 405. Even if a gate electrode or the like is arranged, the layout can be performed without any problems. The layer 405 may be a gate electrode, a source electrode and a drain electrode 285, or a layer formed in the same manner as the gate electrode. A film formed by processing a conductive film or the same conductive film as the source electrode and the drain electrode 285 is used. It can be placed on top of or across the processed membrane. A signal line (a wiring having a function of transmitting a video signal to each pixel) and a conductive layer 411a or a conductive Therefore, the layout surface of the conductive layer 401 can be In other words, the aperture ratio can be increased. Signal lines (wiring having the function of transmitting signals for selecting each pixel) and the conductive layer 404 or conductive Therefore, the layout area of ​​the conductive layer 401 can be reduced by In other words, the aperture ratio can be increased.

[0257] In FIG. 26 or 28, the conductive layer 411a and the conductive layer 411b are The conductive layer 412a and the conductive layer 412b are arranged so as to extend in the Y direction. When the conductive layers 412a and 412b are arranged, the conductive layers 412a and 412b are arranged in different directions. The conductive layer 411a is arranged to overlap the source signal line instead of the gate signal line. The conductive layer 411b is arranged to overlap the gate signal line, not the source signal line. It will be placed there.

[0258] In addition, when it is desired to reduce the resistance of the conductive layer 411a, the conductive layer 411b, and the conductive layer 404, In this case, a low-resistance layer is provided above or below the conductive layer 411a, the conductive layer 411b, and the conductive layer 404. Conductive layers 411a_1, 411b_1, and 404_1 may be provided. For example, aluminum , copper, titanium, molybdenum, tungsten, or a laminate thereof as the conductive layer 411a, The conductive layer 411b may be provided above or below the conductive layer 404. At least one of a_1, 411b_1, and 404_1 is a metal film processed into a mesh shape. Alternatively, the conductive layers 411a_1, 411b_1, and 404_1 may be formed of at least one of the conductive layers 411a_1, 411b_1, and 404_1. At least one of them is made of metal nanowires or carbon nanotubes. However, it is preferable that the conductive layer 401 has a light-transmitting property. It is desirable not to provide a low-resistance conductive layer above or below O1. Examples of such cases are: This is shown in Figures 31 and 32.

[0259] In addition, when it is desired to substantially reduce the resistance value of the conductive layer 411a and the conductive layer 411b, The conductive layer 411aa and the conductive layer 411bb may be disposed. The conductive layer 411aa (conductive layer 411bb) is connected to the conductive layer 411aa via a contact hole. An example of this case is shown in Figures 33 and 34.

[0260] Although the conductive layer 405 may be formed separately, it is preferable to form it simultaneously with other conductive layers. I wish.

[0261] [Configuration Example 2-2] FIG. 35 shows a case where the conductive layer 411a, the conductive layer 411b, and the conductive layer 404 are the same as the conductive layer 402. Therefore, the conductive layer 411a is formed by processing the conductive film. Layer 411b, conductive layer 404, and conductive layer 402 are arranged on the same plane. FIG. 36 shows a cross section of the touch panel taken along line X3-X4 in FIG. 35 and 36 correspond to FIG. 8(B).

[0262] 35, the conductive layer 402 has an island shape. The two adjacent conductive layers 402 sandwiching the conductive layer 411b are formed as conductive layers similarly to the conductive layer 412a. 405. In this example, two conductive layers adjacent in the Y direction are electrically connected to each other. Although an example in which the conductive layers 402 are not electrically connected has been shown, it is also possible to use a case in which multiple conductive layers 402 are connected in the Y direction. Electrical connection may be made via the conductive layer 405, or the conductive layer 40 may be used in both the X and Y directions. 5. In this case, the upper conductive layer 401 is a pixel electrode. The case where the lower conductive layer 402 is a common electrode will be described. It is also acceptable to do so.

[0263] The conductive layer 405 may be arranged to extend in the X direction as shown in FIG. By doing so, the wiring resistance of the conductive layer 404 can be substantially reduced. .

[0264] In FIG. 35 or 37, the conductive layer 411a and the conductive layer 411b are The conductive layer 412a and the conductive layer 412b are arranged so as to extend in the Y direction. It may be placed.

[0265] In FIG. 36, the conductive layer 405 is formed by using the source and drain electrodes 28 of the transistor. 5. In this case, the conductive layer 405 is formed by processing the same conductive film as that of the conductive layer 405. Even if gate electrodes and the like are arranged, the layout can be done without any problems. The conductive layer 405 is formed by overlapping the gate electrode and a film formed by processing the same conductive film as the gate electrode. However, one embodiment of the present invention is not limited thereto, and the transistor The gate electrode 281, the semiconductor layer, or the same conductive film as the other conductive layer is processed to form a conductive layer. A layer 405 can be formed.

[0266] For example, when the conductive layer 405 is formed by processing the same conductive film as the gate electrode 281, 38 shows the case where the source electrode and the drain electrode 2 are formed on the conductive layer 405. Even if conductive layer 4 is arranged, the layout can be performed without any problem. 05 is a source electrode and a drain electrode 285 or a semiconductor device similar to the source electrode and the drain electrode 285 The film formed by processing the other conductive film can be overlapped or crossed. That is, the source signal line and the conductive layer 411a or the conductive layer 411b are disposed to overlap each other. Therefore, the layout area of ​​the conductive layer 401 can be increased. , the aperture ratio can be increased.

[0267] Alternatively, the conductive layer 405 may be formed by processing the same conductive film as the conductive layer 401, as shown in FIG. 9. In this case, the source and drain electrodes 285 and the gate electrode 286 are formed under the conductive layer 405. Even if a gate electrode or the like is arranged, the layout can be performed without any problems. The layer 405 may be a gate electrode, a source electrode and a drain electrode 285, or a layer formed in the same manner as the gate electrode. A film formed by processing a conductive film or the same conductive film as the source electrode and the drain electrode 285 is used. It can be placed on top of or across the processed membrane. The signal line and the conductive layer 411a or the conductive layer 411b can be disposed to overlap each other. Therefore, the layout area of ​​the conductive layer 401 can be increased. Alternatively, the gate signal line and the conductive layer 404 or the conductive layer 405 may be overlapped. Therefore, the layout area of ​​the conductive layer 401 can be increased. In other words, the aperture ratio can be increased.

[0268] In FIG. 35 or 37, the conductive layer 411a and the conductive layer 411b are The conductive layer 412a and the conductive layer 412b are arranged so as to extend in the Y direction. When the conductive layers 412a and 412b are arranged, the conductive layers 412a and 412b are arranged in different directions. The conductive layer 411a is arranged to overlap the source signal line instead of the gate signal line. The conductive layer 411b is arranged to overlap the gate signal line, not the source signal line. It will be placed there.

[0269] 36, 38, and 39, the upper conductive layer 401 is a pixel electrode, and the lower However, in one embodiment of the present invention, The upper conductive layer 401 is used as a common electrode, and the lower conductive layer 402 is used as a pixel electrode. Examples of this case are shown in Figures 40, 41, and 42.

[0270] 40, 41, 42, etc., the conductive layer 411a, the conductive layer 411b, and the conductive layer In this example, the conductive layer 404 is formed by processing the same conductive film as the conductive layer 402. However, one embodiment of the present invention is not limited thereto. The layer 404 may be formed by processing the same conductive film as the conductive layer 401. Layer 411a, conductive layer 411b, conductive layer 404, and conductive layer 401 are disposed on the same plane. Examples of this case are shown in Figures 43, 44, and 45.

[0271] In addition, when it is desired to reduce the resistance of the conductive layer 411a, the conductive layer 411b, and the conductive layer 404, In this case, a low-resistance layer is provided above or below the conductive layer 411a, the conductive layer 411b, and the conductive layer 404. Conductive layers 411a_1, 411b_1, and 404_1 may be provided. For example, aluminum , copper, titanium, molybdenum, tungsten, or a laminate thereof as the conductive layer 411a, The conductive layer 411b may be provided above or below the conductive layer 404. At least one of a_1, 411b_1, and 404_1 is a metal film processed into a mesh shape. Alternatively, the conductive layers 411a_1, 411b_1, and 404_1 may be formed of at least one of the conductive layers 411a_1, 411b_1, and 404_1. At least one of them is made of metal nanowires or carbon nanotubes. However, it is preferable that the conductive layer 402 has a light-transmitting property. It is desirable not to provide a low-resistance conductive layer above or below O2. Examples of such cases are as follows: This is shown in Figures 46 and 47.

[0272] In addition, when it is desired to substantially reduce the resistance value of the conductive layer 411a and the conductive layer 411b, The conductive layer 411aa and the conductive layer 411bb may be disposed. The conductive layer 411aa (conductive layer 411bb) is connected to the conductive layer 411aa via a contact hole. An example of this case is shown in Figure 48 and Figure 49.

[0273] [Configuration Example 2-3] FIG. 50 shows a conductive layer 411a and a conductive layer 411b formed by processing the same conductive film as the conductive layer 401. The conductive layers 412a and 412b are formed by processing the same conductive film as the conductive layer 402. Therefore, the conductive layer 411a, the conductive layer 411b, and the conductive layer 401 are arranged on the same plane. 2b and the conductive layer 402 are arranged on the same plane. 1 shows a schematic cross-sectional view of the touch panel, including a cross-section of a portion corresponding to the cutting line X5-X6 in FIG. 50 and 51 correspond to FIG. 7(E).

[0274] In this way, two conductive layers (e.g., conductive layers 411a and conductive layer 412a, or conductive layer 411b and conductive layer 412b, etc.) By forming the layers in different layers, they can be crossed. Compared with the first and second configuration examples, there is no need to form a bridge portion using the conductive layer 405, so This simplifies the configuration, thereby improving the manufacturing yield. 411a, conductive layer 412a, conductive layer 411b, or conductive layer 412b. Even if the source electrode, drain electrode 285, gate electrode 281, etc. are arranged, the laser beam can be Therefore, the conductive layer 411a, the conductive layer 412a, and the conductive layer 411b can be laid out. Alternatively, the conductive layer 412b may be formed on the gate electrode 281 or the source and drain electrodes 285. a film formed by processing the same conductive film as the gate electrode 281; a film formed by processing the same conductive film as the source electrode and the drain electrode; The film formed by processing the same conductive film as the electrode 285 is overlapped or crossed. That is, the source signal line, the conductive layer 411a, the conductive layer 412a, the conductive layer 411b, and the conductive layer 411c can be formed. 1b or conductive layer 412b can be disposed so as to overlap with each other. The layout area of ​​01 can be increased. In other words, the aperture ratio can be increased. Alternatively, the gate signal line and the conductive layer 411a, the conductive layer 412a, the conductive layer 411b, or Therefore, the layer of the conductive layer 401 can be arranged to overlap with the conductive layer 412b. The out area can be increased, that is, the aperture ratio can be increased.

[0275] In FIG. 51, the upper conductive layer 401 is a pixel electrode, and the lower conductive layer 402 is a common electrode. Although the polar case will be described, these relationships may be reversed.

[0276] In FIG. 50, the conductive layer 411a and the conductive layer 411b are arranged so as to extend in the X direction. The conductive layers 412a and 412b may be arranged to extend in the Y direction. stomach.

[0277] 50 and 51, the upper conductive layer 401 is a pixel electrode, and the lower conductive layer An example in which 402 is a common electrode is shown. However, one embodiment of the present invention is not limited to this. The upper conductive layer 401 may be used as a common electrode, and the lower conductive layer 402 may be used as a pixel electrode. Examples of this case are shown in Figures 52 and 53.

[0278] The conductive layers 411a, 411b, 412a, and 412b When it is desired to reduce the resistance, the conductive layer 411a, the conductive layer 411b, the conductive layer 412a, and Conductive layers 411a_1, 411b_1, 412b_2, and 412c having low resistance are provided above or below the conductive layer 412b. a_1, 412b_1 may be provided. For example, aluminum, copper, titanium, molybdenum , tungsten, or a laminate thereof is formed as a conductive layer 411a, a conductive layer 411b, a conductive layer 411c, a conductive layer 411d, a conductive layer 411e, a conductive layer 411f, a conductive layer 411g, a conductive layer 411h, a conductive layer 411i, a conductive layer 411j ... The conductive layer 411a may be provided above or below the conductive layer 412b. At least one of 411b_1, 412a_1, and 412b_1 is meshed. Alternatively, the conductive layers 411a_1, 411b_1, and At least one of 412a_1 and 412b_1 is a metal nanowire or a carbon nanowire. However, the conductive layer 401 and the conductive layer 402 may be made of a transparent tube or the like. Therefore, in the opening, the conductive layer 401 and the conductive It is desirable not to provide a low resistance conductive layer above or below the layer 402. This is shown in Figures 54 and 55.

[0279] Note that the conductive layer 411a, the conductive layer 411b, the conductive layer 412a, or the conductive layer 412b When it is desired to substantially reduce the resistance value, the conductive layer 411aa, the conductive layer 411bb, and the conductive layer 41 2aa or conductive layer 412bb may be disposed. , conductive layer 412a, or conductive layer 412b) and conductive layer 411aa (conductive layer 411bb The conductive layer 412aa or the conductive layer 412bb is connected to the conductive layer 412b via a contact hole. An example of this case is shown in FIG. 56 and FIG. 57. For example, the conductive layer 411 When connecting the conductive layer 402 to the conductive layer 411aa, the connection is made through a hole provided in the conductive layer 402. That is, the conductive layer 402 is interposed between the upper conductive layer such as the conductive layer 402 and the lower conductive layer such as the conductive layer 402. When connecting to the conductive layer, a hole or the like is provided in the conductive layer 402.

[0280] The conductive layers 411a and 411b, and the conductive layers 412a and 412b At the intersection, a capacitance is formed. However, the size of this capacitance is Therefore, in order to reduce this cross capacitance, another The conductive layers may be connected to each other via the conductive layers and contact holes. 58 and 59 show examples of this case. In FIG. 58 and FIG. 59, the conductive layers 412a (conductive layers 412b) are 12b) are connected via a contact hole and a conductive layer 405. 405 is, for example, a film formed by processing the same conductive film as the gate electrode 281, or a source The drain electrode 285 is formed by processing the same conductive film as the drain electrode 285. This reduces the parasitic capacitance of the touch sensor electrode. This can improve the sensitivity of the sensor.

[0281] [Configuration Example 2-4] In the above, a pair of conductive layers constituting a liquid crystal element and a pair of conductive layers constituting a touch sensor However, one conductive layer of the liquid crystal element is connected to one conductive layer of the touch sensor. It may also be configured to function as an electrical layer.

[0282] In FIG. 60, the conductive layer 402 has a strip shape extending in the X direction and is divided in the Y direction. In this case, one of the conductive layers 402 functions as an electrode of the touch sensor. The conductive layer 412a, the conductive layer 412b, or the conductive layer 412c functions as a conductive layer One of the conductive layers also functions as a common electrode. 60 and 61 show schematic cross-sectional views of the touch panel, including a cross-section of a portion corresponding to 5-X6. FIG. 61 corresponds to FIG. 7(C).

[0283] A conductive layer (e.g., conductive layer 412a, conductive layer 412b) functions as a pair of electrodes of the touch sensor. 12b, etc.) and the conductive layer 402 are formed in different layers, so that they intersect. Therefore, compared with the configuration example 1 and the configuration example 2, the conductive layer 405 is used. Since there is no need to form a bridge portion, the structure can be further simplified. In addition, the conductive layer 411a, the conductive layer 412a, the conductive layer 411b, Alternatively, the source electrode and drain electrode 285 and the gate electrode 286 may be formed under the conductive layer 412b. Even if the conductive layer 4 is arranged, the layout can be performed without any problem. 11a, the conductive layer 412a, the conductive layer 411b, or the conductive layer 412b is a gate electrode 28. 1, the source electrode and drain electrode 285, and the gate electrode 281 are processed using the same conductive film. or a film formed by processing the same conductive film as the source electrode and the drain electrode 285. In other words, the source signal line and the conductive film can be arranged to overlap or cross each other. The layer 411a, the conductive layer 412a, the conductive layer 411b, or the conductive layer 412b are arranged one on top of the other. Therefore, the layout area of ​​the conductive layer 401 can be increased. That is, the aperture ratio can be increased. , the conductive layer 412a, the conductive layer 411b, or the conductive layer 412b is disposed to overlap with each other. Therefore, the layout area of ​​the conductive layer 401 can be increased. , the aperture ratio can be increased.

[0284] In addition, in FIG. 60 and FIG. 61, the upper conductive layer 401 is a pixel electrode, and the lower conductive layer An example in which 402 is a common electrode is shown. However, one embodiment of the present invention is not limited to this. The upper conductive layer 401 may be used as a common electrode, and the lower conductive layer 402 may be used as a pixel electrode. Examples of this case are shown in Figures 62 and 63.

[0285] The conductive layers 411a, 411b, 412a, and 412b When it is desired to reduce the resistance, the conductive layer 411a, the conductive layer 411b, the conductive layer 412a, and Conductive layers 411a_1, 411b_1, 412b_2, and 412c having low resistance are provided above or below the conductive layer 412b. a_1, 412b_1 may be provided. For example, aluminum, copper, titanium, molybdenum , tungsten, or a laminate thereof is formed as a conductive layer 411a, a conductive layer 411b, a conductive layer 411c, a conductive layer 411d, a conductive layer 411e, a conductive layer 411f, a conductive layer 411g, a conductive layer 411h, a conductive layer 411i, a conductive layer 411j ... The conductive layer 411a may be provided above or below the conductive layer 412b. At least one of 411b_1, 412a_1, and 412b_1 is meshed. Alternatively, the conductive layers 411a_1, 411b_1, and At least one of 412a_1 and 412b_1 is a metal nanowire or a carbon nanowire. However, the conductive layer 401 and the conductive layer 402 may be made of a transparent tube or the like. Therefore, in the opening, the conductive layer 401 and the conductive It is desirable not to provide a low resistance conductive layer above or below the layer 402. This is shown in Figures 64 and 65.

[0286] Note that the conductive layer 411a, the conductive layer 411b, the conductive layer 412a, or the conductive layer 412b When it is desired to substantially reduce the resistance value, the conductive layer 411aa, the conductive layer 411bb, and the conductive layer 41 2aa or conductive layer 412bb may be disposed. , conductive layer 412a, or conductive layer 412b) and conductive layer 411aa (conductive layer 411bb The conductive layer 412aa or the conductive layer 412bb is connected to the conductive layer 412b via a contact hole. An example of this case is shown in FIG. 66 and FIG. 67. For example, the conductive layer 411 When connecting the conductive layer 402 to the conductive layer 411aa, the connection is made through a hole provided in the conductive layer 402. That is, the conductive layer 402 is interposed between the upper conductive layer such as the conductive layer 402 and the lower conductive layer such as the conductive layer 402. When connecting to the conductive layer, a hole or the like is provided in the conductive layer 402.

[0287] The conductive layers 411a and 411b, and the conductive layers 412a and 412b At the intersection, a capacitance is formed. However, the size of this capacitance is Therefore, in order to reduce this cross capacitance, another The conductive layers may be connected to each other via the conductive layers and contact holes. 68 and 69 show examples of this case. In FIG. 68 and FIG. 69, the conductive layers 402 are in contact with each other. The conductive layer 405 is connected to the gate hole through the conductive layer 405. The conductive layer 405 is, for example, The source electrode and the drain electrode 281 are formed by processing the same conductive film. 85 is made of a film formed by processing the same conductive film. The parasitic capacitance of the sensor electrode can be reduced, thereby improving the sensitivity of the touch sensor. It is possible to do this.

[0288] In FIG. 60, the conductive layer 411a and the conductive layer 411b are arranged so as to extend in the X direction. The conductive layers 412a and 412b may be arranged to extend in the Y direction. stomach.

[0289] In FIG. 70, the conductive layer 402 has a strip shape extending in the Y direction and is divided in the X direction. In this case, one of the conductive layers 402 is used as an electrode of the touch sensor. The conductive layer 411a, the conductive layer 411b, or the conductive layer 411c functions as a liquid crystal layer. One conductive layer of the element also functions as, for example, a common electrode.

[0290] This configuration is preferable because it can further simplify the configuration.

[0291] Here, an example in which a liquid crystal element in the FFS mode is used has been described. However, for example, a liquid crystal element in IPS mode may be used. The conductive layers 401 and 402 may be formed by processing the same conductive film. Alternatively, both the conductive layer 401 and the conductive layer 402 may have comb-like top surfaces. At this time, the conductive layer 402 functioning as a common electrode is stretched in either the X direction or the Y direction. It is preferable that the electrode be in the shape of a long strip and function as one electrode of the touch sensor.

[0292] [Configuration example 3] Below, we will explain a touch panel configuration example that has some different configurations from the above configuration examples 1 and 2. This will be described with reference to the drawings.

[0293] The touch panel according to one embodiment of the present invention described below uses organic EL elements as display elements. It is a touch panel.

[0294] [Configuration Example 3-1] FIG. 71 shows an example of a cross-sectional configuration of a region including two sub-pixels. The panel is a bottom-emitting type that emits light to the substrate side on which the transistor 201 and other elements are formed. This includes a light-emitting device of the type.

[0295] The touch panel has a light-emitting element 202. The light-emitting element 202 includes a conductive layer 321 and an EL The conductive layer 321 and the conductive layer 322 are stacked. An optical adjustment layer 324 may be provided between the light emitting element 202 and the substrate 3. The light is emitted toward the insulating layer 21, covering the end portions of the conductive layer 321 and the optical adjustment layer 324. 5 is provided.

[0296] The conductive layer 321 preferably has a light-transmitting property. It is preferable that

[0297] In addition, a colored layer 231 is provided closer to the substrate 371 than the light emitting element 202. In the configuration shown in FIG. 2, a colored layer 231 is provided on an insulating layer 213 .

[0298] One of the conductive layers 351 and 352 functions as one electrode of the touch sensor, and the other The conductive layer 351 functions as the other electrode of the touch sensor. The conductive layer 352 is formed on the two gate electrodes of the transistor 201. Therefore, the touch panel can be easily mounted without increasing the manufacturing process. Chipanel can be made.

[0299] As shown in FIG. 71, on the substrate 371 side, a conductive layer 351 and a conductive layer 352 are formed. This can be detected by utilizing the capacitance.

[0300] [Light Emitting Element] The light emitting element can be a self-luminous element, which can be illuminated by current or voltage. The category includes devices whose light intensity is controlled, such as light-emitting diodes (LEDs), organic An EL element, an inorganic EL element, etc. can be used.

[0301] Light-emitting elements are available in top-emission, bottom-emission, and dual-emission types. The electrode on the light extraction side uses a conductive film that transmits visible light. In addition, it is preferable to use a conductive film that reflects visible light for the electrode on the side from which light is not extracted. stomach.

[0302] The EL layer has at least a light-emitting layer. The EL layer has a hole-injecting layer as a layer other than the light-emitting layer. high hole-transporting material, hole-blocking material, high electron-transporting material, electron injection materials with high electron transporting and hole transporting properties, or bipolar materials (materials with high electron transporting and hole transporting properties), etc. The film may further include a layer containing a metal oxide.

[0303] The EL layer can be made of either low molecular weight compounds or high molecular weight compounds. The layers constituting the EL layer may each be formed by a deposition method (including a vacuum deposition method). The layer can be formed by a method such as a transfer method, a printing method, an ink jet method, or a coating method.

[0304] When a voltage higher than the threshold voltage of the light-emitting element is applied between the cathode and anode, the EL layer is charged from the anode side. Holes are injected from the cathode side, and electrons are injected from the cathode side. The injected electrons and holes are The luminescent material contained in the EL layer emits light.

[0305] When a white light emitting element is used as the light emitting element, two or more types of light emitting elements are used in the EL layer. For example, it is preferable to use a configuration in which two or more luminescent materials each emit light of a complementary color. White light can be obtained by selecting a luminescent material so that the following relationship is established. Luminescent materials that emit light in R (red), G (green), B (blue), Y (yellow), O (orange), etc. Or among luminescent materials that emit light containing spectral components of two or more colors of R, G, and B, It is preferable that the spectrum of light emitted from the light-emitting element is in the visible light region. A light emitting element having two or more peaks within a wavelength range (for example, 350 nm to 750 nm) is used. It is preferable to use a material having a peak in the yellow wavelength region. Preferably, the material has spectral components in the green and red wavelength regions as well.

[0306] More preferably, the EL layer comprises a light-emitting layer containing a light-emitting material that emits light of one color and a light-emitting layer containing a light-emitting material that emits light of another color. For example, the EL layer may be formed by laminating a light-emitting layer containing a light-emitting material. The light-emitting layers in the light-emitting layer may be laminated in contact with each other or may be laminated via a separating layer. For example, a separation layer may be provided between the fluorescent-emitting layer and the phosphorescent-emitting layer. stomach.

[0307] The separation layer is used to convert the excited state of a phosphorescent material generated in the phosphorescent-emitting layer into the fluorescent material in the fluorescent-emitting layer. Prevents energy transfer (especially triplet energy transfer) to optical materials via the Dexter mechanism The separation layer only needs to be a few nanometers thick. 1 nm to 20 nm, or 1 nm to 10 nm, or 1 nm to 5 nm The separating layer may be a single material (preferably a bipolar material) or a plurality of materials. (preferably a hole transporting material and an electron transporting material).

[0308] The separation layer may be formed using a material contained in the light-emitting layer that is in contact with the separation layer. This makes it easier to fabricate the light-emitting device and reduces the driving voltage. When the separation layer is made of a host material, an assist material, and a phosphorescent material (guest material), The separation layer may be formed of a host material and an assist material. The phosphorescent layer has a region that does not contain the material, and the phosphorescent layer has a region that contains the phosphorescent material. It is possible to vapor-deposit the separation layer and the phosphorescent layer separately depending on whether or not the phosphorescent material is present. This configuration makes it possible to form the separation layer and the phosphorescent layer in the same chamber. This allows the manufacturing cost to be reduced.

[0309] The light-emitting element may be a single element having one EL layer, or a light-emitting element having multiple EL layers. and a charge generating layer may be laminated therebetween to form a tandem element.

[0310] [Configuration Example 3-2] FIG. 72 differs from FIG. 71 in that the position of the conductive layer 352 is different. In this case, the conductive layer 352 and one of the gate electrodes of the transistor 201 are insulated from the insulating layer 212. It is provided between layers 213.

[0311] The conductive layer 352 and one of the gate electrodes of the transistor 201 are provided with the above-described low-resistance It is preferable that the insulating film is configured to contain an oxide semiconductor.

[0312] 73, the conductive layer 352 is connected to the conductive layer 321, the optical adjustment layer 324, and the EL layer 32 2, the conductive layer 323, and the colored layer 231 may be disposed so as to overlap at least one of them. As shown in FIG. 74, the conductive layer 352 is made up of the conductive layer 321, the optical adjustment layer 324, the EL layer 322, and the conductive layer 352. The colored layer 231 may be disposed so as not to overlap with either the conductive layer 323 or the colored layer 231 .

[0313] [Cross-sectional configuration example 3-2] FIG. 75 shows that both the conductive layer 351 and the conductive layer 352 constituting the touch sensor are conductive layers 32 1 is formed on the same plane as the first embodiment.

[0314] At this time, the conductive layer 351 disposed in one sub-pixel and the conductive layer 352 disposed in the other sub-pixel are The capacitance generated between the layer 352 can be used for detection.

[0315] [Cross-sectional configuration example 3-3] FIG. 76 shows a touch panel including a top-emission type light-emitting device that emits light to the substrate 372 side. 1 is an example of a cross-sectional configuration of a panel.

[0316] In the light-emitting element 202, the conductive layer 321 has a reflectivity, and the conductive layer 323 has a light-transmitting It has sexuality.

[0317] The conductive layer 323 has an opening in a portion that overlaps at least a part of the conductive layer 351. The conductive layer 323 may have slits or openings, or may have a comb-like shape. It's fine.

[0318] The conductive layer 351 and the conductive layer 352 are formed on the same plane as the conductive layer 321 .

[0319] In the example shown in FIG. 76, the conductive layer 351 disposed in one subpixel and the conductive layer 352 disposed in the other subpixel are 3 shows an example in which detection is performed by utilizing the capacitance generated between the electrode and the conductive layer 352.

[0320] Also, as shown in FIG. 77, the conductive layer 323 can be used as an electrode of a touch sensor. That is, the capacitance generated between the conductive layer 351 and the conductive layer 323 is used for detection. It may also be possible to use the following.

[0321] FIG. 77 shows an example in which the EL layer 322 is formed by a color-coded method. At this time, by covering the end of the EL layer 322 with a conductive layer 323 as shown in FIG. The diffusion of impurities into the L layer 322 is suppressed, and reliability can be improved. 1 shows an example in which the colored layer 231 and the like are not provided.

[0322] [Other configuration examples] Note that one embodiment of the present invention is not limited to the above-described exemplary configurations and can have various configurations. .

[0323] [Positional relationship between sensor electrodes and pixel wiring] For example, the source lines (signal lines) of the pixels are arranged in even-numbered columns and odd-numbered columns. The position can be changed to the right or left, resulting in two adjacent source lines. A conductive layer (electrode) for a touch sensor can be placed on top of the pixel. Similarly, the gate lines are placed close to each other in the upper and lower pixels, and the touch sensor electrodes are placed on top of them. An example of this case is shown in Figure 78. 4 are adjacent to each other in pairs. Also, the gate lines 85, 86, 87, and 88 are adjacent to each other in pairs. It is being treated like a

[0324] [Peripheral circuits] The peripheral circuits can be configured not to be integrally formed. The circuit for driving the pixel and the circuit for driving the pixel can be formed separately. These functions may be realized by a single circuit.

[0325] In addition, either the X-direction conductive layer or the Y-direction conductive layer (electrode) of the touch sensor A driver circuit for selecting the electric layer can also be formed integrally with the TFT.

[0326] The circuit that drives the touch sensor is the gate driver that drives the pixel, or the source It may be located on either the driver's side.

[0327] Also, it is electrically connected to the conductive layer (electrode) in the X direction or the conductive layer (electrode) in the Y direction of the touch sensor. Of the two circuits, it is preferable to use an IC as the circuit having the detection function. In this case, it is preferable that the conductive layer is controlled by the IC via an FPC.

[0328] [Touch sensor conductive layer (electrode) material] At least one of the pair of conductive layers constituting the touch sensor is connected to a common electrode constituting the liquid crystal element. It is preferable to use the same material as the electrodes and pixel electrodes.

[0329] Alternatively, at least one of the pair of conductive layers constituting the touch sensor is processed into a mesh shape. Alternatively, the insulating layer may be made of a metal film (also called a metal mesh).

[0330] Also, at least one of the conductive layers (electrodes) in the X direction or the Y direction of the touch sensor The resistance can be reduced by attaching a metal film directly below or above it. When a laminated structure of a conductive film containing a metal oxide and a conductive film containing a metal is used, a half-tone mask is used. It is preferable to form the film by a patterning technique using a mask, since this simplifies the process.

[0331] [Wiring connecting the conductive layers (electrodes) of the touch sensor] At the intersection of the X-direction conductive layer and the Y-direction conductive layer of the touch sensor, When a bridge structure is realized using the conductive layer, for example, the conductive layer is used as a gate electrode of a transistor. The conductive layer in the X direction is routed across the entire pixel in the horizontal direction parallel to the gate line. Alternatively, the conductive layer may be formed on the same plane as the source and drain electrodes of the transistor. The Y-direction conductive layer is arranged parallel to the source line and is routed vertically across the entire pixel. A contact portion can be formed in the pixel, or the conductive layer can function as a common electrode. The same conductive layer as the conductive layer functioning as the pixel electrode, or a conductive layer on the same surface as the conductive layer functioning as the pixel electrode. may also be used.

[0332] [Conductive layers (electrodes) of touch sensors and conductive layers (electrodes) of liquid crystal elements] The conductive layer (electrode) with slits arranged on the top is used as a pixel electrode, and the A conductive layer (electrode) provided across a plurality of pixels is called a common electrode (also called a common electrode). ) can be used as

[0333] Alternatively, a conductive layer ( The common electrode is a conductive electrode arranged at the bottom and provided for each of the plurality of pixels. The layer (electrode) can be used as a pixel electrode.

[0334] The conductive layer in the X direction of the touch sensor is used as a conductive layer that functions as a pixel electrode or a common electrode. Alternatively, the conductive layer may be configured to function as a conductive layer in the Y direction of the touch sensor. The conductive layer functions as a pixel electrode or a common electrode. It can be configured as follows.

[0335] The conductive layer in the X direction of the touch sensor is also a conductive layer to which a pulse voltage is applied or a current is detected. In this case, the conductive layer in the Y direction of the touch sensor may be Just do the other one.

[0336] In addition, at the intersection of the X-direction conductive layer or the Y-direction conductive layer of the touch sensor, The shape of one of the conductive layers may be different from that of the other portion. For example, The pair of conductive layers of the touch sensor is formed only by the conductive layer on the same plane as the conductive layer that functions as the pixel electrode. When forming the touch sensor, the conductive layer that functions as a common electrode arranged at the bottom is However, it is possible to avoid placing the conductive layer of the touch sensor below the conductive layer. If the conductive layer functioning as the common electrode is not provided at all, Therefore, the conductive layer that functions as a common electrode becomes island-shaped, and the conductive layer that functions as a common electrode for two adjacent electrodes It is preferable that the conductive layer has a shape with a slit so that a part of the conductive layer is connected.

[0337] In addition, the conductive layer functioning as a common electrode may be provided across a plurality of pixels. Alternatively, for example, a common wiring formed by a conductive layer on the same plane as the gate electrode of the transistor may be used. In this case, the conductive layer that functions as a common electrode may be It may have an island shape.

[0338] [Counter substrate] A substrate (also called an opposing substrate) is provided opposite to a substrate on which a transistor or the like is provided. When a conductive layer in the X direction or Y direction of the touch sensor is provided, the It is preferable to place a light-shielding layer on the side.

[0339] In addition, when one of the electrodes of the liquid crystal element is formed on the opposing substrate (TN mode, MVA mode, etc.), In this case, the electrode is provided on the counter substrate in the area where it overlaps with the conductive layer of the touch sensor. It is preferable to provide a lit.

[0340] In addition, in FFS mode, IPS mode, etc., a pair of electrodes is connected by a transistor or the like. Even when forming the liquid crystal display on a substrate, a conductive layer for controlling the orientation of the liquid crystal is provided on the opposing substrate. In this case, the conductive layer may also have a groove at the portion where it overlaps with the conductive layer of the touch sensor. It is preferable to provide a slot.

[0341] [Driving method] As a method for driving the touch sensor, for example, one horizontal period (one gate selection) for driving the pixel is A method of sensing (scanning) the corresponding row in the gap between the selection periods can be used. Alternatively, one frame period can be divided into two periods, with writing to all pixels in the first half and sensing in the second half. You can also use it.

[0342] [Transistor] For example, in this specification, transistors of various structures are used as transistors. Therefore, there is no limitation on the type of transistor that can be used. As examples, transistors having single crystal silicon, or amorphous silicon, polycrystalline silicon, Silicon, microcrystalline (also called microcrystalline, nanocrystalline, or semi-amorphous) A transistor having a non-single-crystal semiconductor film, such as a capacitor, can be used. Alternatively, thin film transistors (TFTs) made from these semiconductors can be used. There are various advantages to using TFTs. For example, it is This allows for lower manufacturing temperatures, reducing manufacturing costs and enabling the use of larger manufacturing equipment. Since the manufacturing equipment can be made larger, it is possible to manufacture on large substrates. Since a large number of display devices can be manufactured, the manufacturing cost can be reduced. Therefore, a substrate with low heat resistance can be used. Alternatively, a display element can be manufactured using a transistor on a light-transmitting substrate. The thin film of the transistor allows the light transmission to be controlled. A part of the film that forms the star can transmit light, which improves the aperture ratio. It is possible.

[0343] In addition, when producing polycrystalline silicon, by using a catalyst (such as nickel), It is possible to further improve the crystallinity and manufacture transistors with good electrical characteristics. As a result, the gate driver circuit (scanning line driver circuit), the source driver circuit (signal line driver circuit) ), and signal processing circuits (signal generation circuit, gamma correction circuit, DA conversion circuit, etc.) on the board It can be integrally formed.

[0344] In addition, when manufacturing microcrystalline silicon, by using a catalyst (nickel, etc.), It is possible to further improve the crystallinity and manufacture transistors with good electrical characteristics. In this case, the crystallinity can be improved by simply applying heat treatment without laser irradiation. As a result, part of the source driver circuit (analog switch, etc.) and gate The gate driver circuit (scanning line driving circuit) can be formed integrally on the substrate. Therefore, if laser irradiation is not performed, unevenness in the crystallinity of silicon can be suppressed. Therefore, it is possible to display images with improved quality. However, the catalyst (nickel, etc.) It is possible to produce polycrystalline or microcrystalline silicon without using a silicon dioxide.

[0345] In addition, improving the crystallinity of silicon to polycrystalline or microcrystalline can improve the overall panel performance. It is desirable to perform this in a partial area of ​​the panel, but it is not limited to this. The crystallinity of the crystalline silicon may be improved. For example, the peripheral circuit area, which is an area other than the pixel area, can be selectively irradiated. only in the area of ​​the gate driver circuit and the source driver circuit, or only in the area of ​​the source driver circuit, etc. Even if the laser light is irradiated only on a part of the driver circuit (for example, an analog switch), As a result, silicon crystallization is enhanced only in areas where high-speed circuit operation is required. The pixel area does not need to operate at high speed, so the crystallinity can be improved. Even if the pixel circuit is not connected, it can still operate without any problems. Since the region where crystallinity needs to be improved is small, the manufacturing process can be shortened. This can improve throughput and reduce manufacturing costs. Since fewer manufacturing devices are required, manufacturing costs can be reduced.

[0346] An example of a transistor is a compound semiconductor (e.g., SiGe, GaAs, etc.). ), or oxide semiconductors (e.g., Zn-O, In-Ga-Zn-O, In-Zn-O, I n-Sn-O(ITO), Sn-O, Ti-O, Al-Zn-Sn-O(AZTO), I A transistor having a material such as n-Sn-Zn-O can be used. These compound semiconductors or thin film transistors made by thinning these oxide semiconductors These can lower the manufacturing temperature, so that, for example, As a result, it is possible to manufacture a resistor on a substrate with low heat resistance, such as a plastic It is possible to form transistors directly on a substrate or film substrate. Compound semiconductors or oxide semiconductors are used not only for the channel portion of transistors but also for For example, these compound semiconductors or oxide semiconductors can be used for other purposes. It can be used as a wiring, a resistor element, a pixel electrode, or a light-transmitting electrode. These can be deposited or formed simultaneously with the transistor, thereby reducing costs.

[0347] An example of a transistor is a transistor formed by an ink-jet method or a printing method. These can be used for manufacturing at room temperature, manufacturing at low vacuum, or can be manufactured on a large substrate. Therefore, it can be manufactured without using a mask (reticle). This allows the transistor layout to be easily changed. Alternatively, it can be manufactured without using resist, which reduces material costs and the number of processes. Or, since it is possible to apply the film only to the necessary parts, after forming the film on the entire surface, This method wastes less material and is less costly than the conventional etching method.

[0348] An example of a transistor is a transistor having an organic semiconductor or a carbon nanotube. This allows transistors to be mounted on a flexible substrate. Transistors using organic semiconductors and carbon nanotubes can be formed. The device using this can be made shock resistant.

[0349] Note that transistors with various other structures can also be used. For example, transistors include MOS transistors, junction transistors, and bipolar transistors. A MOS transistor can be used as the transistor. By using this, the size of the transistor can be reduced. It is possible to mount a bipolar transistor as a transistor. This allows a large current to flow, making it possible to operate the circuit at high speed. It is also possible to combine MOS transistors and bipolar transistors on the same substrate. This makes it possible to achieve low power consumption, miniaturization, high-speed operation, etc. Yes, it is possible.

[0350] For example, in this specification, an example of a transistor is a transistor having two or more gate electrodes. A multi-gate structure transistor can be used. Since the channel regions are connected in series, multiple transistors are connected in series. Therefore, the multi-gate structure reduces the off-current and improves the breakdown voltage of the transistor (reliability). Or, by using a multi-gate structure, it is possible to improve the saturation region. In other words, even if the voltage between the drain and source changes, the current between the drain and source remains constant. The voltage-current characteristic does not change and has a flat slope. By using the voltage-current characteristic, an ideal current source circuit or a circuit with a very high resistance can be constructed. As a result, a differential circuit or a current mirror circuit with good characteristics can be realized. It is possible to realize roads, etc.

[0351] An example of a transistor is a transistor having a structure in which gate electrodes are arranged above and below a channel. A transistor with a structure in which gate electrodes are arranged above and below the channel can be applied. By using this structure, the circuit configuration becomes like multiple transistors connected in parallel. This increases the channel area, which can increase the current value. By using a structure in which gate electrodes are placed above and below the Therefore, the S value can be improved.

[0352] An example of a transistor is a transistor in which a gate electrode is disposed above a channel region. a structure in which the gate electrode is located below the channel region, a forward staggered structure, an inverted staggered structure a structure in which the channel region is divided into a plurality of regions, a structure in which the channel regions are connected in parallel, or A transistor having a structure in which channel regions are connected in series can be used. There are three types of transistors: planar, FIN, and TRI-GATE. gate type), top gate type, bottom gate type, double gate type (gates above and below the channel) Various configurations are possible, such as a

[0353] An example of a transistor is a transistor having a source electrode in a channel region (or a part thereof). A transistor having a structure in which the gate and drain electrodes overlap can be used. By making the structure such that the source electrode and drain electrode overlap with the This prevents unstable operation caused by charge accumulation in part of the channel area. .

[0354] As an example of a transistor, a structure provided with an LDD region can be applied. By providing a region, the off-state current can be reduced or the withstand voltage of the transistor can be improved (reliability can be improved). Alternatively, by providing an LDD region, it is possible to , even if the voltage between the drain and source changes, the drain current does not change much, and the slope is A flat voltage-current characteristic can be obtained.

[0355] For example, in FIG. 61, when a top gate type transistor is used, the .

[0356] [What is connection?] For example, in this specification, it is explicitly stated that X and Y are connected. In this case, X and Y are electrically connected, and X and Y are functionally connected. The case where X and Y are directly connected and the case where X and Y are directly connected are both considered to be disclosed in this specification. Therefore, it is not limited to predetermined connection relationships, for example, connection relationships shown in drawings or text. Connections other than those shown in the drawings or text are also included. Let's say.

[0357] Here, X and Y are the object (for example, a device, an element, a circuit, a wiring, an electrode, a terminal, a conductive film, layer, etc.).

[0358] An example of a direct connection between X and Y is a circuit that allows electrical connection between X and Y. The elements that function as When a diode, display element, light-emitting element, load, etc. is not connected between X and Y, and elements (e.g., switches, transistors, capacitors) that allow electrical connection between X and Y. without using any capacitors, inductors, resistors, diodes, display elements, light-emitting elements, loads, etc. In this case, X and Y are connected.

[0359] An example of the case where X and Y are electrically connected is The elements that function as One or more diodes, display elements, light-emitting elements, loads, etc.) are connected between X and Y. The switch has a function to control on / off. A switch can be in a conducting state (ON state) or a non-conducting state (OFF state) and allows current to flow. The switch has the function of controlling whether or not current flows. When X and Y are electrically connected, X This includes the case where Y is directly connected to Y.

[0360] An example of a case where X and Y are functionally connected is when the functional connection between X and Y is possible. Circuits that perform functions (e.g., logic circuits (inverters, NAND circuits, NOR circuits, etc.)), signal Conversion circuits (DA conversion circuits, AD conversion circuits, gamma correction circuits, etc.), potential level conversion circuits ( Power supply circuits (boost circuits, step-down circuits, etc.), level shifter circuits that change the signal potential level, etc. ), voltage sources, current sources, switching circuits, amplifier circuits (which can increase the signal amplitude or current amount, etc.) circuits, operational amplifiers, differential amplifier circuits, source follower circuits, buffer circuits, etc.), signal generation One or more circuits (synthesis circuit, memory circuit, control circuit, etc.) can be connected between X and Y. For example, even if another circuit is inserted between X and Y, the signal output from X If a signal is transmitted to Y, then X and Y are considered to be functionally connected. When X and Y are functionally connected, there are cases where X and Y are directly connected and cases where X and Y are functionally connected. This includes the case where Y is electrically connected.

[0361] If it is explicitly stated that X and Y are electrically connected, When X and Y are electrically connected (i.e., when there is another element or another circuit between X and Y), X and Y are functionally connected (i.e., X and Y are (When X and Y are functionally connected with another circuit between them) and (When X and Y are directly connected) (i.e., when X and Y are connected without any other element or circuit between them) In other words, it is assumed that the above is disclosed in the present specification. If it is explicitly stated that it is connected, The same contents as those in the above case are deemed to be disclosed in the present specification.

[0362] For example, if the source (or first terminal, etc.) of the transistor is connected to the The drain (or second terminal, etc.) of the transistor is electrically connected to X. It may be electrically connected to Y through Z2 (or not), or the source of the transistor may be The first terminal (or the first terminal, etc.) is directly connected to a part of Z1, and another part of Z1 is directly connected to X. The drain (or second terminal, etc.) of the transistor is directly connected to a part of Z2. When a part of Z2 is directly connected to Y, and another part of Z2 is directly connected to Y, it can be expressed as follows: It can be manifested.

[0363] For example, "X and Y and the source (or first terminal, etc.) and drain (or second terminal, etc.) of a transistor" 2 terminals) are electrically connected to each other, and X, the source (or The first terminal, etc.), the drain of the transistor (or the second terminal, etc.), and the Y are electrically connected in this order. "It is connected to the source (or The first terminal (or the drain of the transistor) is electrically connected to X, and the second terminal (or the drain of the transistor) is electrically connected to ) is electrically connected to Y, and X is the source (or first terminal, etc.) of the transistor, The drains (or second terminals, etc.) of the transistors, Y, are electrically connected in this order. Alternatively, "X is the source (or first terminal) of the transistor." and the drain (or second terminal, etc.) is electrically connected to Y, and X, The source (or first terminal, etc.) of a transistor, the drain (or second terminal, etc.) of a transistor, For example, Y is provided in this order. By specifying the order of connections in a circuit configuration using various representation methods, The source (or first terminal, etc.) and the drain (or second terminal, etc.) of the transistor are separated. The technical scope can be determined separately.

[0364] Alternatively, for example, "the source (or first terminal, etc.) of a transistor" ) is electrically connected to X through at least a first connection path, and the first connection path does not have a second connection path, and the second connection path is a The source (or first terminal, etc.) of the transistor and the drain (or second terminal, etc.) of the transistor The first connection path is a path via Z1, and the second connection path is a path between the transistor The drain (or second terminal, etc.) of the transistor is connected to Y via at least a third connection path. the third connection path does not have the second connection path, and the third connection path is electrically connected to the The connection path of this is the path via Z2. The source (or first terminal, etc.) of the resistor is connected to Z1 by at least the first connection path. and the first connection path does not have a second connection path. The second connection path has a connection path through a transistor, and the drain of the transistor The pin (or second terminal, etc.) is connected to Y via Z2 by at least a third connection path. The third connection path is electrically connected to the second connection path, and the third connection path does not have the second connection path. Alternatively, the source (or first terminal, etc.) of the transistor may be and X through Z1 by at least a first electrical path. The electrical path does not have a second electrical path, and the second electrical path is a transistor From the source (or first terminal, etc.) of the transistor to the drain (or second terminal, etc.) of the transistor The drain (or second terminal, etc.) of the transistor is an electrical path The third electrical path is electrically connected to Y through Z2, and the third electrical path does not have a fourth electrical path, and the fourth electrical path is The electrical connection from the input (or second terminal, etc.) to the source (or first terminal, etc.) of the transistor. Using the same expression as these examples, the circuit structure can be expressed as follows: By defining the connection path in the structure, the source (or first terminal) of the transistor The technical scope can be determined by distinguishing between the first terminal (or the first terminal, etc.) and the drain (or the second terminal, etc.). This can be done.

[0365] It should be noted that these expression methods are merely examples, and the present invention is not limited to these expression methods. X, Y, Z1, and Z2 are the objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films) , layer, etc.).

[0366] Note that the circuit diagram shows independent components as if they are electrically connected to each other. Even if one component has the functions of multiple components, For example, when a part of the wiring also functions as an electrode, one conductive film functions as both the wiring and the electrode. Therefore, the present invention has the functions of both the electrode and the electrode. Electrical connection means that one conductive film has the functions of multiple components. This case will also be included in that category.

[0367] 〔substrate〕 For example, in this specification and the like, it is possible to form transistors using various substrates. The type of substrate is not limited to a specific one. Conductor substrates (e.g., single crystal substrates or silicon substrates), SOI substrates, glass substrates, quartz substrates, Plastic substrate, sapphire glass substrate, metal substrate, stainless steel substrate, stainless Substrate with less steel foil, tungsten substrate, tungsten foil Substrates, flexible substrates, laminated films, paper containing fibrous materials, base film, etc. Examples of glass substrates include barium borosilicate glass and aluminoborosilicate glass. Glass or soda lime glass. Flexible substrates, laminating films, base film Examples of films include polyethylene terephthalate. Polyethylene naphthalate (PET), Polyethersulfone (PES) ), and polytetrafluoroethylene (PTFE) are typical plastics. For example, synthetic resin such as acrylic resin is used. Examples include polyethylene, polyester, polyvinyl fluoride, and polyvinyl chloride. Examples include polyamide, polyimide, aramid, epoxy, inorganic vapor deposition film, and paper. In particular, transistors using semiconductor substrates, single crystal substrates, SOI substrates, etc. By manufacturing these, there is little variation in characteristics, size, or shape, and the current capacity is high. This allows for the manufacture of high-performance, small-sized transistors. Therefore, when the circuit is configured, it is possible to reduce the power consumption of the circuit or to increase the integration density of the circuit. .

[0368] In addition, a flexible substrate is used as the substrate, and a transistor is formed directly on the flexible substrate. Alternatively, a separation layer may be provided between the substrate and the transistor. After a semiconductor device is partially or completely completed, it is separated from the substrate and transferred to another substrate. In this case, the transistor can be transferred to a substrate with poor heat resistance or a flexible substrate. The above-mentioned peeling layer may be formed of an inorganic film such as a tungsten film and a silicon oxide film. It uses a laminated film structure or a structure in which an organic resin film such as polyimide is formed on a substrate. It is possible.

[0369] That is, a transistor is formed using one substrate, and then a transistor is formed on another substrate. The transistor may be transposed and placed on another substrate. For example, in addition to the substrate on which the above-mentioned transistors can be formed, a paper substrate, a cellophane substrate, etc. Fan board, aramid film board, polyimide film board, stone board, wood board, cloth Substrate (natural fibers (silk, cotton, linen), synthetic fibers (nylon, polyurethane, polyester) or recycled fibers (including acetate, cupra, rayon, recycled polyester, etc.), There are leather substrates, rubber substrates, etc. By using these substrates, Formation of transistors, formation of low power consumption transistors, manufacturing of durable devices, heat resistance It is possible to provide a lighter, thinner, or more flexible device.

[0370] This embodiment may be any of the other embodiments, at least some of which are described herein, or , can be implemented in appropriate combination with at least a part of this embodiment mode.

[0371] (Embodiment 2) In this embodiment, a driver IC is applied to the display device described in the above embodiment. An example of actual implementation will be described with reference to Figures 80(A) and (B).

[0372] The display device 500A of FIG. 80(A) includes a pixel section 510, a gate driver 520_1, a gate The pixel section 510 has a gate driver 520_2 and a source driver 530. The source driver 530 has a plurality of pixels 511 connected to a line GL and a source line SL. Number of TAB (Tape Automated Bonding) tapes: 531, sourced The driver ICs 532_1 to 532_k (k is a natural number of 2 or more) are included.

[0373] In the pixel section 510, the pixel 511 is, for example, a pixel on the long side (X shown in FIG. 80(A)). 80(A)) and the short side (Y direction shown in FIG. 80(A)). Therefore, in the configuration of this embodiment, the pixels 5 connected to the same gate line GL and provided on the short side The number of pixels 511 connected to the same source line SL and provided on the long side is greater than the number of pixels 11. It becomes more.

[0374] The gate driver 520_1 and the gate driver 520_2 are provided on the two long sides. The gate driver 520_1 drives the odd-numbered gate lines (GL1, GL3), The gate driver 520_2 drives the gate lines (GL2, GL4) in the even-numbered rows. The number of gate lines GL arranged side by side increases according to the number of pixels. 20_1, and gate driver 520_2 are provided to select one gate line GL. The period can be longer.

[0375] The gate driver 520_1 and the gate driver 520_2 are source drivers. 530, the gate driver 520_1 does not need to operate at high speed. The gate driver 520_2 is a transistor manufactured in the same manner as the transistor of the pixel 511. The display device 500A includes a gate driver 520_1. By incorporating the gate driver 520_2, costs can be reduced. The frame of the display device 500A can be narrowed.

[0376] The source driver ICs 532_1 to 532_k (k is a natural number of 2 or more) are connected to the TAB The display device 500A is mounted on the substrate 531 by an anisotropic conductive adhesive or the like. A plurality of TAB tapes 531 on which driver ICs 532_1 to 532_k are mounted are attached. By this, a plurality of source lines (SL1, SL2) are driven.

[0377] The source driver ICs 532_1 to 532_k are the gate driver 520_1, the gate Therefore, the source driver IC53 2_1 to 532_k are the gate drivers 520_1 and 520_2. As a result, it is difficult to incorporate the source driver into the display device 500A. By placing the source driver ICs on the short side, the number of source driver ICs can be reduced, resulting in low cost. It is possible to achieve this.

[0378] The reduction in the number of source driver ICs is particularly important for display devices with a large number of pixels, such as 8k pixels. It is extremely effective to apply this technology to displays with a large number of pixels, such as 4K. The low cost of manufacturing allows for higher pixel resolution, resulting in a more realistic display. can be produced at low cost.

[0379] Note that a configuration different from that shown in FIG. 80(A) may be used, as shown in FIG. 80(B). The display device 500B in FIG. 80(A) differs from the display device 500B in that the number of gate lines GL per pixel row is This is a configuration in which the number of source lines SL per pixel column is increased and the number of source lines SL per pixel column is reduced.

[0380] The gate driver 520_1 and the gate driver 520_2 in FIG. 80(B) are As in (A), the gate drivers 520_1 are provided on the two long sides. The gate driver 520_2 drives the gate lines (GL1, GL3, GL5, GL7). , drive the gate lines of the even rows (GL2, GL4, GL6, GL8).

[0381] The source driver ICs 532_1 to 532_k / 2 in FIG. 80(B) are the same as those in FIG. It is only necessary to drive half the number of source lines (SL1) compared to the source driver. The number of bar ICs can be further reduced, leading to further cost reductions.

[0382] Here, especially for display devices with large screens of 50 inches or more, or 60 inches or more, To achieve this, the transistors provided in each pixel must have relatively high mobility. For example, it is preferable to use polycrystalline silicon for the semiconductor layer of a transistor. However, it is preferable to use an oxide semiconductor because it can be easily formed on a large substrate. In this case, when an In-M-Zn oxide is used as the oxide semiconductor, there is more In than M. For example, an oxide containing In:Ga:Zn=4:2:3 is preferably used. The oxide semiconductor film, which is a stack of a semiconductor film and an oxide film of In:Ga:Zn=1:1:1, is By applying the transistors used in the layer, high mobility can be achieved.

[0383] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0384] (Embodiment 3) In this embodiment mode, the transistor described in the above embodiment mode can be replaced with a An example of a transistor that can be used will be described with reference to the drawings.

[0385] The touch panel of one embodiment of the present invention can be implemented using a bottom-gate transistor or a top-gate transistor. The semiconductor device can be manufactured using various types of transistors such as transistors. The semiconductor layer materials and transistor structures used can be easily changed to suit existing production lines. It can be replaced.

[0386] [Bottom-gate transistor] FIG. 81(A1) shows a channel protection transistor, which is a type of bottom gate transistor. 81(A1) is a cross-sectional view of a transistor 810. In FIG. 81(A1), the transistor 810 is The transistor 810 is formed on a substrate 771 with an insulating layer 772 formed on the substrate 771. The semiconductor layer 742 is formed on the electrode 746 with an insulating layer 726 interposed therebetween. The electrode 746 can function as a gate electrode. The insulating layer 726 can function as a gate insulating layer. It can function as such.

[0387] In addition, an insulating layer 741 is provided over a channel formation region of the semiconductor layer 742. Electrodes 744a and 744b are provided on the insulating layer 726 in contact with a portion of the insulating layer 742. Electrode 744a can function as either a source electrode or a drain electrode. , which can function as the other of the source electrode and the drain electrode. A portion of the electrode 744 b is formed on the insulating layer 741 .

[0388] The insulating layer 741 can function as a channel protection layer. By providing the insulating layer 1, the insulating layer 100 of the semiconductor layer 742 generated when the electrodes 744a and 744b are formed can be effectively prevented. Therefore, when the electrodes 744a and 744b are formed, the semiconductor This can prevent the channel formation region of the layer 742 from being etched. According to this method, a transistor with good electrical characteristics can be realized.

[0389] The transistor 810 has an insulating layer 744 a, an insulating layer 744 b, and an insulating film 741. It has an edge layer 728 and an insulating layer 729 on top of the insulating layer 728 .

[0390] The electrodes, semiconductor layers, insulating layers, and the like constituting the transistor disclosed in this embodiment are the same as those of other It can be formed using the materials and methods disclosed in the embodiments.

[0391] When an oxide semiconductor is used for the semiconductor layer 742, the electrode 744a and the electrode 744b At least in the area in contact with the semiconductor layer 742, oxygen is taken from a part of the semiconductor layer 742, and oxygen deficiency is formed. It is preferable to use a material that can generate oxygen vacancies in the semiconductor layer 742. The carrier concentration in the region where this occurs increases, and the region becomes n-type, forming an n-type region (n + layer) Therefore, the region can function as a source region or a drain region. When an oxide semiconductor is used for the semiconductor layer 742, oxygen is taken from the semiconductor layer 742, and oxygen vacancies occur. Examples of materials that can generate this include tungsten and titanium. Cut.

[0392] The source and drain regions are formed in the semiconductor layer 742, forming an electrode 744. Therefore, the contact resistance between the electrode 744a and the semiconductor layer 742 can be reduced. To improve the electrical characteristics of transistors, such as field effect mobility and threshold voltage. can be done.

[0393] When a semiconductor such as silicon is used for the semiconductor layer 742, the semiconductor layer 742 and the electrode 744 a, and between the semiconductor layer 742 and the electrode 744b, an n-type semiconductor or a p-type semiconductor is It is preferable to provide a layer that functions as an n-type semiconductor or a p-type semiconductor. , can function as the source or drain region of a transistor.

[0394] The insulating layer 729 has a function of preventing or reducing the diffusion of impurities into the transistor from the outside. It is preferable to form the insulating layer 729 using a material having the insulating properties. It can also be omitted.

[0395] Note that in the case where an oxide semiconductor is used for the semiconductor layer 742, the insulating layer 729 is formed before or after the insulating layer 729 is formed. Heat treatment may be performed after the formation of the insulating layer 729, or before or after the formation of the insulating layer 729. The oxygen contained in the insulating layer 729 and other insulating layers is diffused into the semiconductor layer 742, and the semiconductor layer The oxygen vacancies in the insulating layer 742 can be filled. Alternatively, the insulating layer 729 can be formed while being heated. By doing so, oxygen vacancies in the semiconductor layer 742 can be compensated for.

[0396] Generally, the CVD method is a plasma CVD (PECVD) method that uses plasma. sma Enhanced CVD method, and thermal CVD (TCVD) Furthermore, depending on the source gas used, it can be classified into metal CVD (MCV) and other methods. D: Metal CVD) method, metal organic CVD (MOCVD) method c CVD) method.

[0397] Generally, the evaporation method includes resistance heating evaporation, electron beam evaporation, MBE (Molecular Beam Evaporation), r Beam Epitaxy) method, PLD (Pulsed Laser Deposit) tion) method, IAD (Ion beam Assisted Deposition) These methods can be classified into the ALD (Atomic Layer Deposition) method and the ALD (Atomic Layer Deposition) method.

[0398] The plasma CVD method can produce high-quality films at relatively low temperatures. When using a deposition method that does not use plasma during deposition, damage occurs to the surface to be deposited. This makes it difficult to form a film with few defects.

[0399] Generally, the sputtering method is classified into DC sputtering method, magnetron sputtering method, sputtering method, RF sputtering method, ion beam sputtering method, ECR (Electron Cyclotron Resonance) Cyclotron Resonance sputtering method, facing targets It can be classified into methods such as sputtering.

[0400] In the facing target sputtering method, the plasma is confined between the targets. This reduces plasma damage to the substrate. This allows the incident angle of sputtering particles onto the substrate to be shallow, improving step coverage. It can be increased.

[0401] The transistor 811 shown in FIG. 81A2 has a gate insulating layer 729 and a gate insulating layer 729 formed thereon as a back gate electrode. The transistor 810 differs from the transistor 810 in that it has an electrode 723 that can function as a It can be made of the same materials and methods as pole 746 .

[0402] In general, the back gate electrode is formed of a conductive layer, and the gate electrode and the back gate electrode form a semiconductor. The back gate electrode is disposed so as to sandwich the channel forming region of the gate electrode. The back gate electrode can be made to function in the same manner as the gate electrode. Alternatively, the potential may be a ground potential (GND potential) or any other potential. By changing the potential of the gate electrode independently of the potential of the gate electrode, the transistor The threshold voltage can be varied.

[0403] Both the electrode 746 and the electrode 723 can function as gate electrodes. Therefore, the insulating layer 726, the insulating layer 728, and the insulating layer 729 each serve as a gate insulating layer. The electrode 723 is provided between the insulating layer 728 and the insulating layer 729. It is okay to do so.

[0404] When one of the electrodes 746 and 723 is referred to as a "gate electrode," the other is referred to as a "bar For example, in the transistor 811, the electrode 723 is called a "gate electrode." When referring to "electrodes," the electrode 746 is referred to as a "back gate electrode." When the transistor 811 is used as a top gate electrode, In addition, either the electrode 746 or the electrode 723 can be considered as a type of The first gate electrode may be referred to as the "first gate electrode" and the other as the "second gate electrode."

[0405] By providing the electrode 746 and the electrode 723 with the semiconductor layer 742 sandwiched therebetween, the electrode 7 By setting the potential of the electrode 46 and the electrode 723 at the same potential, carriers flow in the semiconductor layer 742. The area becomes larger in the film thickness direction, and the amount of carrier movement increases. The on-state current of the transistor 811 increases and the field-effect mobility also increases.

[0406] Therefore, the transistor 811 is a transistor having a large on-current relative to its area. That is, the area occupied by the transistor 811 is According to one embodiment of the present invention, the area occupied by a transistor can be reduced. Therefore, according to one embodiment of the present invention, a highly integrated semiconductor device can be realized. It is possible.

[0407] In addition, the gate electrode and back gate electrode are formed from a conductive layer, so that the external The function of preventing the electric field generated by the The back gate electrode has a function of shielding the electric field against vapors and other harmful substances. By forming the semiconductor layer in a thin film and covering it with a back gate electrode, the electric field shielding function can be improved. do.

[0408] In addition, the electrode 746 and the electrode 723 each have the function of shielding an external electric field. Therefore, charges such as charged particles generated on the insulating layer 772 side or above the electrode 723 are transferred to the semiconductor layer This does not affect the channel formation region of 742. As a result, stress tests (e.g., applying load to the gate) GBT (Gate Bias-Temperature) stress test In addition, the on-current starts to flow depending on the magnitude of the drain voltage. This can reduce the phenomenon of the gate voltage (start-up voltage) changing. This effect occurs when electrode 746 and electrode 723 are at the same potential or at different potentials. .

[0409] The BT stress test is a type of accelerated test that detects the transitions that occur during long-term use. It is possible to evaluate the change in characteristics (aging) of a resistor in a short time. The amount of change in the threshold voltage of a transistor before and after testing is an important indicator for examining reliability. The smaller the threshold voltage fluctuation, the more reliable the transistor. do.

[0410] Also, the electrode 746 and the electrode 723 are provided, and the electrode 746 and the electrode 723 are at the same potential. By doing so, the amount of variation in threshold voltage is reduced. At the same time, the variation in electrical characteristics is reduced.

[0411] In addition, a transistor with a back gate electrode has a positive charge applied to the gate +GB The change in threshold voltage before and after the T-stress test was also Smaller than Zysta.

[0412] In addition, by forming the back gate electrode using a conductive film having a light-shielding property, This prevents light from entering the semiconductor layer from the electrode side, thereby preventing light degradation of the semiconductor layer. This prevents the deterioration of electrical characteristics, such as a shift in the threshold voltage of a transistor. do.

[0413] According to one embodiment of the present invention, a highly reliable transistor can be provided. As a result, a highly reliable semiconductor device can be realized.

[0414] Figure 81(B1) shows a channel protection transistor, which is a type of bottom gate transistor. 8 shows a cross-sectional view of transistor 820. Transistor 820 is similar to transistor 810. However, the difference is that the insulating layer 741 covers the semiconductor layer 742. In an opening formed by selectively removing a part of the insulating layer 741 that overlaps the semiconductor layer 742, The semiconductor layer 742 and the electrode 744a are electrically connected to each other. In another opening formed by selectively removing a part of the insulating layer 741, the semiconductor layer 742 is The region of the insulating layer 741 that overlaps with the channel forming region is electrically connected to the electrode 744b. The region can function as a channel protection layer.

[0415] The transistor 821 shown in FIG. 81B2 has a back gate electrode over the insulating layer 729. The transistor 820 differs from the transistor 820 in that it has an electrode 723 that can function as a transistor.

[0416] By providing the insulating layer 741, the semiconductor generated when the electrodes 744a and 744b are formed can be prevented. Therefore, the formation of the electrode 744a and the electrode 744b can be prevented. In some cases, it is possible to prevent the semiconductor layer 742 from becoming thin.

[0417] Also, the transistors 820 and 821 are the same as the transistors 810 and 821. The distance between the electrode 744a and the electrode 746 and the distance between the electrode 744b and the electrode 744c are smaller than the distance between the electrode 744a and the electrode 746 and the electrode 744b. Therefore, the distance between the electrodes 744a and 746 is increased. In addition, the parasitic capacitance generated between the electrode 744b and the electrode 746 can be reduced. According to one aspect of the present invention, a transistor with good electrical characteristics can be realized. can.

[0418] The transistor 825 shown in FIG. 81(C1) is a bottom-gate transistor. The transistor 825 is a channel-etched transistor. The electrodes 744a and 744b are formed without using the A part of the semiconductor layer 742 that is exposed when the electrode 744b is formed may be etched. On the other hand, since the insulating layer 741 is not provided, productivity of the transistor can be increased.

[0419] The transistor 826 shown in FIG. 81C2 has a back gate electrode over the insulating layer 729. The transistor 724 differs from the transistor 825 in that it has an electrode 723 that can function as a transistor.

[0420] [Top-gate transistor] FIG. 82(A1) shows a transistor 830, which is a type of top-gate transistor. The transistor 830 includes a semiconductor layer 742 over an insulating layer 772. An electrode 744a in contact with a part of the semiconductor layer 742 and an insulating layer 772 are provided on the semiconductor layer 742 and the insulating layer 772. and an electrode 744b in contact with a part of the semiconductor layer 742. An insulating layer 726 is provided over the electrode 744b, and an electrode 746 is provided over the insulating layer 726.

[0421] Transistor 830 is connected between electrode 746 and electrode 744a, and between electrode 746 and electrode 744b. Since the electrodes 746 and 744b do not overlap, the parasitic capacitance between the electrodes 746 and 744a, In addition, the parasitic capacitance occurring between the electrode 746 and the electrode 744b can be reduced. After forming the electrode 746, the impurity 755 is introduced into the semiconductor layer using the electrode 746 as a mask. By introducing the ions into the semiconductor layer 742, the ions are self-aligned in the semiconductor layer 742. An impurity region can be formed (see FIG. 82(A3)). According to one embodiment of the present invention, A transistor with good electrical characteristics can be realized.

[0422] The impurity 755 is introduced by an ion implantation device, an ion doping device, or a plasma This can be done using a processing device.

[0423] The impurity 755 may be, for example, at least one of Group 13 elements or Group 15 elements. When an oxide semiconductor is used for the semiconductor layer 742, one kind of element can be used. contains at least one element selected from the group consisting of rare gases, hydrogen, and nitrogen as impurities 755. It is also possible to use

[0424] The transistor 831 shown in FIG. 82A2 has an electrode 723 and an insulating layer 727. The transistor 831 is formed on an insulating layer 772. The electrode 723 has an insulating layer 727 formed thereon. Therefore, the insulating layer 727 can function as a back gate electrode. The insulating layer 727 can function as a protective layer. It can be formed more easily.

[0425] Like transistor 811, transistor 831 has a large on-state current relative to its area. In other words, for the required on-current, the transistor According to one embodiment of the present invention, the area occupied by the transistor 831 can be reduced. Therefore, according to one aspect of the present invention, a highly integrated semiconductor device can be manufactured. A conductor device can be realized.

[0426] The transistor 840 illustrated in FIG. 82B1 is a top-gate transistor. The transistor 840 is formed by forming the electrodes 744a and 744b. The transistor 830 differs from the transistor 830 in that a dielectric layer 742 is formed. The transistor 841 has an electrode 723 and an insulating layer 727. In the transistor 840 and the transistor 841, the semiconductor layer 74 A part of the semiconductor layer 742 is formed on the electrode 744a, and another part of the semiconductor layer 742 is formed on the electrode 744b. It is done.

[0427] Like transistor 811, transistor 841 has a large on-state current relative to its area. In other words, for the required on-current, the transistor According to one embodiment of the present invention, the area occupied by the transistor 841 can be reduced. Therefore, according to one aspect of the present invention, a highly integrated semiconductor device can be manufactured. A conductor device can be realized.

[0428] The transistor 842 illustrated in FIG. 83(A1) is a top-gate transistor. The transistor 842 is formed by forming the insulating layer 729 and then forming the electrode 744a and the electrode 744b. The transistor 830 and the transistor 840 differ in that the electrode 744b is formed. The electrodes 744a and 744b are semi-conductors formed in the openings in the insulating layers 728 and 729. It is electrically connected to the conductor layer 742 .

[0429] Also, a part of the insulating layer 726 that does not overlap with the electrode 746 is removed, and the electrode 746 and the remaining insulating layer 726 are separated. Impurities 755 are introduced into the semiconductor layer 742 using the layer 726 as a mask, thereby forming a semiconductor Impurity regions can be formed in a self-aligned manner in layer 742 ( (See FIG. 83(A3)). The transistor 842 has an insulating layer 726 that extends beyond the edge of the electrode 746. When the impurity 755 is introduced into the semiconductor layer 742, the semiconductor layer 74 The impurity concentration in the region where the impurity 755 is introduced through the insulating layer 726 of the second insulating layer 726 is Therefore, the area of ​​the semiconductor layer 742 is smaller than the area into which the impurity 755 is introduced without passing through the semiconductor layer 742. A lightly doped diamond (LDD) was formed in the area adjacent to the area overlapping with the electrode 746. in) region is formed.

[0430] The transistor 843 shown in FIG. 83(A2) has an electrode 723. 42. The transistor 843 has an electrode 723 formed on a substrate 771. The electrode 723 overlaps with the semiconductor layer 742 with the insulating layer 772 interposed therebetween. It can function.

[0431] In addition, the transistor 844 shown in FIG. 83(B1) and the transistor 845 shown in FIG. 83(B2) As in the case of the sta 845, the insulating layer 726 in the area not overlapping with the electrode 746 may be entirely removed. In addition, the transistor 846 shown in FIG. 83(C1) and the transistor 847 shown in FIG. 83(C2) The insulating layer 726 may be left in areas that do not overlap with the electrode 746, such as the stanchion 847.

[0432] The transistors 842 to 847 are also formed by forming the electrode 74 after forming the electrode 746. 6 as a mask, an impurity 755 is introduced into the semiconductor layer 742, and the semiconductor layer 74 According to one aspect of the present invention, an impurity region can be formed in a self-aligned manner in the semiconductor substrate. A transistor with good characteristics can be realized. A highly integrated semiconductor device can be realized.

[0433] [s-channel transistor] FIG. 84 illustrates an example of a transistor structure in which an oxide semiconductor is used as the semiconductor layer 742. The transistor 850 illustrated in FIG. 84 has a semiconductor layer 742b on a semiconductor layer 742a. The upper surface of the semiconductor layer 742b and the side surfaces of the semiconductor layer 742b and the semiconductor layer 742a are formed. 84A is a top view of the transistor 850. Figure 84(B) is a cross section of the portion indicated by the dashed line X1-X2 in Figure 84(A). FIG. 84(C) is a cross-sectional view in the channel length direction. 1 is a cross-sectional view (cross-sectional view in the channel width direction) of a portion indicated by a dashed dotted line.

[0434] The transistor 850 also includes an electrode 743 that functions as a gate electrode. The electrode 43 can be formed using the same material and method as the electrode 746. The electrode 743 is a stack of two conductive layers.

[0435] The semiconductor layer 742a, the semiconductor layer 742b, and the semiconductor layer 742c are made of In or Ga. Typically, the material is an In-Ga oxide (In and Ga In-Zn oxide (oxide containing In and Zn), In-Zn-Zn oxide (Oxide containing In, element M, and Zn. Element M is Al, Ti, Ga, Y, Zr, La , Ce, Nd, or Hf, which has a stronger bond with oxygen than In. It is a strong metallic element.

[0436] The semiconductor layer 742a and the semiconductor layer 742c are formed by the same metal element as that of the semiconductor layer 742b. Among these, it is preferable that the material contains one or more kinds of the same metal element. When such a material is used, the interface between the semiconductor layer 742a and the semiconductor layer 742b and the semiconductor This can make it difficult for interface states to be generated at the interface between the layer 742c and the semiconductor layer 742b. Therefore, scattering and capture of carriers at the interface are less likely to occur, and the field-effect transport of transistors is improved. It is also possible to reduce variations in the threshold voltage of transistors. Therefore, it is possible to realize a semiconductor device having good electrical characteristics. It becomes Noh.

[0437] The thickness of the semiconductor layer 742a and the semiconductor layer 742c is preferably 3 nm or more and 100 nm or less. The thickness of the semiconductor layer 742b is preferably 3 nm or more and 50 nm or less. 00 nm or less, preferably 3 nm or more and 100 nm or less, and more preferably 3 nm or more and 50 nm or less.

[0438] The semiconductor layer 742b is an In-M-Zn oxide, and the semiconductor layer 742a and the semiconductor When the semiconductor layer 742c is also an In-M-Zn oxide, the semiconductor layer 742a and the semiconductor layer 74 2c is In:M:Zn=x1:y1:z1 [atomic ratio], and the semiconductor layer 742b is In:M: If Zn=x2:y2:z2 [atomic ratio], y1 / x1 is greater than y2 / x2. The semiconductor layer 742a, the semiconductor layer 742c, and the semiconductor layer 742b are selected so that Preferably, the ratio y1 / x1 is set to be 1.5 times or more larger than y2 / x2. A conductive layer 742a, a semiconducting layer 742c, and a semiconducting layer 742b are selected. In other words, the semiconductor layer 742a and the semiconductor layer 742b are arranged so that y1 / x1 is at least twice as large as y2 / x2. Preferably, y1 / x1 is greater than y2. The semiconductor layer 742a, the semiconductor layer 742c, and the semiconductor layer 742d are formed so that the thickness of the semiconductor layer 742a is three times or more larger than the thickness of the semiconductor layer 742c. When y1 is equal to or greater than x1, stable electrical characteristics are imparted to the transistor. However, if y1 is three times or more of x1, the field effect of the transistor Therefore, it is preferable that y1 is less than three times x1. By configuring the semiconductor layer 742a and the semiconductor layer 742c as described above, The semiconductor layer 742c can be made to be a layer in which oxygen vacancies are less likely to occur than in the semiconductor layer 742b.

[0439] When the semiconductor layer 742a and the semiconductor layer 742c are made of In-M-Zn oxide, The content of In and element M, excluding Zn and O, is preferably 50 atomic % In. element M is 50 atomic % or more, and more preferably In is less than 25 atomic % The element M is 75 atomic % or more. When it is an oxide, the content of In and element M, excluding Zn and O, is preferably 2% by weight. 5 atomic % or more, element M is less than 75 atomic %, and more preferably In is 34 atomic % or more, and element M is less than 66 atomic %.

[0440] For example, a semiconductor layer 742a containing In or Ga and a semiconductor layer 742b containing In or Ga Layer 742c: In:Ga:Zn=1:3:2, 1:3:4, 1:3:6, 1:6:4 In-Ga-Zn oxide formed using targets with atomic ratios of 1:9:6, etc. In-Ga oxide formed using targets with atomic ratios such as In:Ga=1:9 The semiconductor layer 742b may be made of In:G Atomic ratios such as a:Zn=3:1:2, 1:1:1, 5:5:6, or 4:2:4.1 The In-Ga-Zn oxide formed using the target can be used. The atomic ratios of the conductor layer 742a, the semiconductor layer 742b, and the semiconductor layer 742c are The difference includes a variation of plus or minus 20% of the atomic ratio above.

[0441] In order to provide stable electrical characteristics to a transistor using the semiconductor layer 742b, The impurities and oxygen vacancies in the semiconductor layer 742b are reduced to make the semiconductor layer 742b highly intrinsic. It is preferable to use an oxide semiconductor layer that can be regarded as intrinsic or substantially intrinsic. In either case, the channel forming region in the semiconductor layer 742b is an oxide that can be regarded as intrinsic or substantially intrinsic. It is preferably a semiconductor layer.

[0442] Note that an oxide semiconductor layer that can be considered substantially intrinsic has a carrier density But 8 x 10 11 pieces / cm 3 Less than 1 x 10 11 / cm 3 Less than, even more preferred 1×10 10 pieces / cm3 Less than 1 x 10 -9 pieces / cm 3 oxide semiconductor This refers to the body layer.

[0443] FIG. 85 illustrates an example of a transistor structure in which an oxide semiconductor is used as the semiconductor layer 742. The transistor 822 illustrated in FIG. 85 has a semiconductor layer 742b on a semiconductor layer 742a. The transistor 822 is a bottom-gate transistor having a back gate electrode. It is a type of transistor. Figure 85(A) is a top view of the transistor 822. B) is a cross-sectional view (channel length direction) of the portion indicated by the dashed line X1-X2 in FIG. 85(A). FIG. 85(C) is a cross-sectional view of the portion indicated by the dashed line Y1-Y2 in FIG. 85(A). 1 is a cross-sectional view of the device (cross-sectional view in the channel width direction).

[0444] The electrode 723 provided on the insulating layer 729 is connected to the insulating layer 726, the insulating layer 728, and the insulating layer 729. The layer 729 is electrically connected to the electrode 746 through openings 747a and 747b. Therefore, the same potential is supplied to the electrode 723 and the electrode 746. It is not necessary to provide either the opening 747a or the opening 747b. It is not necessary to provide both the opening 747a and the opening 747b. If neither is provided, different potentials can be applied to the electrode 723 and the electrode 746 .

[0445] [Energy band structure of oxide semiconductors] Here, the semiconductor layer 742a, the semiconductor layer 742b, and the semiconductor layer 742c are stacked. The function and effect of the semiconductor layer 742 will be described with reference to FIGS. 89(A) and 89(B). The energy band structure shown in Figure 89(A) is the same as that shown in Figure 84(B). FIG. 89(A) shows the energy band structure of the portion indicated by the dashed line in the D1-D2 region. The energy band structure of the channel forming region of the transistor 850 is shown.

[0446] In Figure 89(A), Ec882, Ec883a, Ec883b, Ec883c, Ec88 6 are the insulating layer 772, the semiconductor layer 742a, the semiconductor layer 742b, and the semiconductor layer 742 c, The energy of the conduction band minimum of the insulating layer 726 is shown.

[0447] Here, the energy difference between the vacuum level and the bottom of the conduction band (also called "electron affinity") is The energy difference between the vacuum level and the top of the valence band (also called the ionization potential) The energy gap is calculated by subtracting the energy gap from the spectroscopic ellipsometer. (For example, HORIBA JOBIN YVON UT-300) The energy difference between the vacuum level and the top of the valence band can be measured by ultraviolet photoelectron spectroscopy (UPS). Ultraviolet Photoelectron Spectroscopy (Ultraviolet Photoelectron Spectroscopy) Measurement can be performed using a probe (for example, VersaProbe manufactured by PHI).

[0448] The In- formed using a target with an atomic ratio of In:Ga:Zn=1:3:2 The energy gap of Ga-Zn oxide is approximately 3.5 eV and the electron affinity is approximately 4.5 eV. In addition, the In film was formed using a target with an atomic ratio of In:Ga:Zn=1:3:4. The energy gap of Ga-Zn oxide is about 3.4 eV, and the electron affinity is about 4.5 eV. In addition, the I layer was formed using a target with an atomic ratio of In:Ga:Zn=1:3:6. The energy gap of n-Ga-Zn oxide is approximately 3.3 eV, and the electron affinity is approximately 4.5 eV. In addition, the film was formed using a target with an atomic ratio of In:Ga:Zn=1:6:2. The energy gap of In-Ga-Zn oxide is approximately 3.9 eV, and the electron affinity is approximately 4.3 e V. The target was formed using an atomic ratio of In:Ga:Zn=1:6:8. The energy gap of the In-Ga-Zn oxide is approximately 3.5 eV and the electron affinity is approximately 4.4 eV. The atomic ratio of the target was In:Ga:Zn=1:6:10. The energy gap of the synthesized In-Ga-Zn oxide is about 3.5 eV, and the electron affinity is about 4 0.5 eV. In addition, using a target with an atomic ratio of In:Ga:Zn=1:1:1, The energy gap of the formed In-Ga-Zn oxide is approximately 3.2 eV, and the electron affinity is approximately The atomic ratio of the target is In:Ga:Zn=3:1:2. The energy gap of the In-Ga-Zn oxide formed by this method is about 2.8 eV, and the electron affinity is It is about 5.0 eV.

[0449] Since the insulating layer 772 and the insulating layer 726 are insulators, Ec882 and Ec886 are Closer to the vacuum level than Ec83a, Ec83b, and Ec83c (lower electron affinity) ).

[0450] Also, Ec883a is closer to the vacuum level than Ec883b. a is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more than Ec883b 0.15 eV or more and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less A temperature close to the vacuum level is preferred.

[0451] Also, Ec883c is closer to the vacuum level than Ec883b. c is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more than Ec883b 0.15 eV or more and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less A temperature close to the vacuum level is preferred.

[0452] In addition, the vicinity of the interface between the semiconductor layer 742a and the semiconductor layer 742b and the semiconductor layer 742b A mixed region is formed near the interface between the semiconductor layer 742c and the semiconductor layer 742d, and therefore the energy at the bottom of the conduction band The energy changes continuously, i.e., there are no or almost no levels at these interfaces. do not have.

[0453] Therefore, in the stacked structure having this energy band structure, electrons flow through the semiconductor layer 742 Therefore, the electrons move mainly through the interface between the semiconductor layer 742a and the insulating layer 772. Alternatively, even if a level exists at the interface between the semiconductor layer 742c and the insulating layer 726, the level The position of the semiconductor layer 742a and the semiconductor layer 742b has almost no effect on the movement of electrons. There is almost no level at the interface and the interface between the semiconductor layer 742c and the semiconductor layer 742b. Therefore, the movement of electrons in the region is not hindered. Transistors with a semiconductor stack structure can achieve high field-effect mobility. .

[0454] As shown in FIG. 89(A), the interface between the semiconductor layer 742a and the insulating layer 772 and the semiconductor layer 742b are In the vicinity of the interface between the conductor layer 742c and the insulating layer 726, there are trap levels 8 due to impurities and defects. 90 can be formed, but the semiconductor layer 742a and the semiconductor layer 742c are present. This can distance the semiconductor layer 742b from the trap levels.

[0455] In particular, in the transistor exemplified in this embodiment, the upper surface and the side surface of the semiconductor layer 742b are semiconductor. The lower surface of the semiconductor layer 742b is in contact with the semiconductor layer 742a. In this way, the semiconductor layer 742b is covered with the semiconductor layer 742a and the semiconductor layer 742c. By doing so, the influence of the trap levels can be further reduced.

[0456] However, the energy difference between Ec883a or Ec883c and Ec883b is small. In this case, electrons in the semiconductor layer 742b may exceed the energy difference and reach the trap level. When electrons are captured in the trap level, a negative fixed charge is generated at the interface of the insulating layer. , the threshold voltage of the transistor shifts in the positive direction.

[0457] Therefore, the energy difference between Ec883a and Ec883c and Ec883b is If each of these is set to 0.1 eV or more, preferably 0.15 eV or more, the threshold voltage of the transistor Voltage fluctuations are reduced and the electrical characteristics of the transistor can be improved. preferable.

[0458] The band gaps of the semiconductor layer 742a and the semiconductor layer 742c are It is preferable that the band gap is wider than that of 2b.

[0459] Figure 89(B) shows the energy band of the region indicated by the dashed line D3-D4 in Figure 85(B). FIG. 89(B) shows the energy balance of the channel formation region of the transistor 822. The figure shows the band structure.

[0460] In FIG. 89(B), Ec887 indicates the energy of the bottom of the conduction band of the insulating layer 728. By forming the semiconductor layer 742 into two layers, the semiconductor layer 742a and the semiconductor layer 742b, the transistor The productivity of the semiconductor layer 742c can be improved. Although it is easily affected by the potential 890, it has a higher potential than when the semiconductor layer 742 has a single layer structure. Field effect mobility can be achieved.

[0461] According to one embodiment of the present invention, a transistor with little variation in electrical characteristics can be realized. Therefore, a semiconductor device with little variation in electrical characteristics can be realized. According to one embodiment, a highly reliable transistor can be realized. A highly reliable semiconductor device can be realized.

[0462] In addition, oxide semiconductors have a large energy gap of 3.0 eV or more, and are highly resistant to visible light. In addition, the transistor obtained by processing the oxide semiconductor under appropriate conditions In this case, the off-state current is 100zA (1 x10 -19 A) or less, or 10zA (1 x 10 -20 A) and below, and even 1zA( 1×10 -21 A) or less. Therefore, a semiconductor device with low power consumption can be obtained. can be provided.

[0463] According to one embodiment of the present invention, a transistor with low power consumption can be provided. As a result, a semiconductor device such as a display element or a display device with low power consumption can be realized. Alternatively, a semiconductor device such as a display element or a display device with high reliability can be realized.

[0464] Returning to the description of the transistor 850 shown in FIG. By providing the semiconductor layer 742b, the side surface of the semiconductor layer 742b can also be covered with the electrode 743. That is, the transistor 850 can be configured such that the semiconductor layer 742 is electrically connected to the transistor 850 by the electric field of the electrode 743. b is electrically surrounded by the electric field of the conductive film. The structure of the transistor that electrically surrounds the semiconductor layer in which the channel is formed is called the surr This is called a surrounded channel (s-channel) structure. A transistor with a nel structure is called an "s-channel transistor" or " It is also called an "s-channel transistor."

[0465] In the s-channel structure, a channel is formed in the entire (bulk) of the semiconductor layer 742b. In the s-channel structure, the drain current of the transistor can be increased. Furthermore, the electric field of the electrode 743 As a result, the entire channel formation region formed in the semiconductor layer 742b can be depleted. Therefore, in the s-channel structure, the off-state current of the transistor can be further reduced. It is possible.

[0466] In addition, by increasing the height of the protrusion of the insulating layer 772 and reducing the channel width, the s-ch The tunnel structure can further enhance the effects of increasing the on-current and reducing the off-current. Furthermore, when forming the semiconductor layer 742b, the exposed semiconductor layer 742a may be removed. In this case, the side surfaces of the semiconductor layer 742a and the semiconductor layer 742b may be aligned.

[0467] Also, as in a transistor 851 shown in FIG. 86, an insulating layer is provided below the semiconductor layer 742. An electrode 723 may be provided through the transistor 851. FIG. FIG. 86(B) is a cross-sectional view of the portion indicated by the dashed line X1-X2 in FIG. 86(A). FIG. 86(C) is a cross-sectional view of the portion indicated by the dashed line Y1-Y2 in FIG. 86(A).

[0468] 87, an insulating layer 775 is formed above the electrode 743. 87A shows a transistor 852. FIG. 87(B) is a top view of the portion indicated by the dashed line X1-X2 in FIG. 87(A). FIG. 87(C) is a cross-sectional view of the portion indicated by the dashed line Y1-Y2 in FIG. 87(A). Cross-sectional view.

[0469] In FIG. 87, the layer 725 is provided on the insulating layer 775, but it may be provided on the insulating layer 728 or The layer 725 may be provided over the insulating layer 729. By forming the layer 725 using a light-blocking material, This can prevent the characteristics of the transistor from changing due to light irradiation, and the reliability from decreasing. The layer 725 is formed to be at least larger than the semiconductor layer 742b, and the layer 725 is formed to cover the semiconductor layer 742. The layer 725 can be made of an organic material, an inorganic material, or the like. The layer 725 can be made of a conductive material. In this case, layer 725 may be supplied with a voltage or may be left in an electrically floating state. It may also be possible to use the following.

[0470] FIG. 88 shows an example of a transistor having an s-channel structure. The transistor 848 has almost the same configuration as the transistor 847 described above. In the transistor 848 , the semiconductor layer 742 is formed on a protrusion provided in the insulating layer 772 . The transistor 848 is a type of top-gate transistor with a back gate electrode. FIG. 88(A) is a top view of the transistor 848. FIG. 88(B) is a top view of the transistor 848. 88(A) is a cross-sectional view of the portion indicated by the dashed line X1-X2 in FIG. ) is a cross-sectional view of the portion indicated by the dashed line Y1-Y2 in FIG.

[0471] The electrode 744a provided on the insulating layer 729 is connected to the insulating layer 726, the insulating layer 728, and the insulating layer 729. An opening 747c is provided in the edge layer 729, and the semiconductor layer 742 is electrically connected to the opening 747c. The electrode 744b provided on the insulating layer 729 is formed by the insulating layers 726, 728, and an opening 747d formed in the insulating layer 729, which is electrically connected to the semiconductor layer 742. It has been done.

[0472] The electrode 743 provided on the insulating layer 726 is connected to the insulating layer 726 and the insulating layer 772. The openings 747a and 747b are electrically connected to the electrode 723. Therefore, the same potential is supplied to the electrode 746 and the electrode 723. It is not necessary to provide either the opening 747a or the opening 747b. It is not necessary to provide both the opening 747a and the opening 747b. In this case, different potentials can be applied to the electrodes 723 and 746.

[0473] The semiconductor layer used in the transistor having the s-channel structure is an oxide semiconductor. It is not limited to the body.

[0474] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiment modes. It is Noh.

[0475] (Fourth embodiment) In this embodiment, a display device according to one embodiment of the present invention or a display module having a touch panel will be described. The module and electronic device will be described with reference to FIGS. 90 to 92.

[0476] The display module 8000 shown in FIG. 90 includes an upper cover 8001 and a lower cover 8002. Between them, the touch panel 8004 connected to the FPC 8003, the frame 8009, and the printer It has a power board 8010 and a battery 8011.

[0477] The touch panel of one embodiment of the present invention can be used for the touch panel 8004, for example. do.

[0478] The upper cover 8001 and the lower cover 8002 are designed to fit the size of the touch panel 8004. The shape and dimensions can be changed as needed.

[0479] The touch panel 8004 is a resistive or capacitive touch panel. In addition, the opposing substrate (sealing substrate) of the touch panel 8004 can be used by overlapping it with the It is also possible to provide a touch panel function. It is also possible to provide an optical sensor in each pixel of the display 4 to create an optical touch panel.

[0480] In addition, when a transmissive liquid crystal element is used, as shown in FIG. The backlight 8007 has a light source 8008. In the above example, the light source 8008 is disposed above the backlight 8007. For example, a light source 8008 may be disposed at the end of the backlight 8007, and a light diffuser 8008 may be disposed at the end of the backlight 8007. A diffused plate may be used. When a self-luminous light-emitting element such as an organic EL element is used, In the case of a reflective panel, the backlight 8007 is not provided. That's fine.

[0481] The frame 8009 not only protects the touch panel 8004 but also secures the printed circuit board 8010. It also functions as an electromagnetic shield to block electromagnetic waves generated by operation. The frame 8009 may also function as a heat sink.

[0482] The printed circuit board 8010 includes a power supply circuit, a signal circuit for outputting a video signal and a clock signal. The power supply circuit is provided with a signal processing circuit. Alternatively, the power source may be a battery 8011 provided separately. This can be omitted if a commercial power source is used.

[0483] In addition, the Touch Panel 8004 adds components such as a polarizing plate, a retardation plate, and a prism sheet. It may also be provided as follows.

[0484] 91(A) to 91(H) and 92 are diagrams showing electronic devices. These electronic devices are Housing 5000, display unit 5001, speaker 5003, LED lamp 5004, operation key 5 005 (including a power switch or an operation switch), a connection terminal 5006, and a sensor 5007 (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemicals Quality, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, (including a function to measure light or infrared rays), microphone 5008, etc. can be done.

[0485] FIG. 91(A) shows a mobile computer, which includes, in addition to the above, a switch 5009 , an infrared port 5010, etc. FIG. 91(B) shows a portable device equipped with a recording medium. A portable image reproducing device (for example, a DVD reproducing device) is also included. It can have a display unit 5002, a recording medium reading unit 5011, etc. The vision device may have a stand 5012 and the like in addition to the above. The television device can be operated using an operation switch provided on the housing 5000 or a separate remote control. This can be done by the remote control operation device 5013. This allows you to control the channel and volume, and manipulate the image displayed on the display unit 5001. In addition, the remote control operation device 5013 can be operated by the remote control operation device 5013. A display unit for displaying information output from the portable game device may be provided. In addition to the above components, the device may also include a recording medium reading unit 5011. 91(E) is a digital camera with a television receiving function, and in addition to the above, it also has an antenna 5014, a shutter button 5015, an image receiving unit 5016, etc. 1(F) is a portable gaming machine, and in addition to the above, it has a second display unit 5002, a recording medium reader / writer, 91(G) is a portable television receiver. In addition to the above, a charger 5017 capable of transmitting and receiving signals may be included. FIG. 91(H) shows a wristwatch type information terminal, which includes, in addition to the above, a band 5018, a clasp, and the like. The housing 5000 also serves as a bezel. The display unit 5001 has a non-rectangular display area. icon 5020, other icons 5021, etc. can be displayed. This is a digital signage. Figure 92(B ) is a digital signage mounted on a cylindrical pillar.

[0486] The electronic devices shown in Figures 91(A) to 91(H) and 92 can have various functions. For example, functions to display various information (still images, videos, text images, etc.) on the display, Touch panel function, calendar, date or time display function, various software ( It has the function of controlling processing by using a program, wireless communication function, and various functions using wireless communication function. Functions for connecting to computer networks, transmitting various data using wireless communication functions, The function of receiving the program or data recorded on the recording medium is to read it and display it on the display unit. Furthermore, in electronic devices having multiple display units, In this case, one display section is used mainly to display image information, and another display section is used mainly to display text information. It also has the function of displaying information on the screen, or displaying images that take parallax into account on multiple displays to create a three-dimensional image. Furthermore, in electronic devices having an image receiving unit, The camera has the functions of taking still images, taking videos, and correcting the captured images automatically or manually. function to save the captured images to a recording medium (external or built-in to the camera); It can have a function to display an image on the display unit. The functions that the electronic device shown in FIG. 92 can have are not limited to these, and various functions can be provided. It can have.

[0487] The electronic device of this embodiment is characterized by having a display unit for displaying some information. The touch panel of one embodiment of the present invention can be applied to the display portion.

[0488] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination. [Explanation of symbols]

[0489] 10 Touch Panel 11 Circuit Board 12 PCB 13 FPC 14 Conductive layer 15 Connectivity Layer 20 Liquid crystal element 21 Conductive layer 22 Conductive layer 23 LCD 31 Colored layer 41 Conductive layer 41a Conductive layer 41b Conductive layer 51 pixel electrode 52 Common electrode 55 Sensor electrode 56 Sensor electrode 57 Wiring 61 Wiring 62 Wiring 63 Transistor 64 Liquid crystal element Block 65_1 Block 65_2 66 Wiring 71 Wiring 71_1 Wiring 71_2 Wiring 72 Wiring 72_1 Wiring 72_2 Wiring 81 source line 82 source lines 83 source line 84 source lines 85 gate lines 86 Gate Line 87 Gate Line 88 Gate Line 151 Adhesive layer 201 Transistor 202 Light-emitting element 203 Transistor 206 Connection 207 Conductive Layer 208 Liquid crystal element 209 Connection Layer 211 Insulating layer 212 Insulating layer 213 Insulating Layer 214 Insulating layer 215 Insulating Layer 216 Spacer 217 Insulating Layer 231 Colored layer 232 Light blocking layer 251 Conductive Layer 252 Conductive layer 253 LCD 254 Insulating Layer 255 insulating layer 262 areas 263 areas 281 Gate electrode 282 gate electrode 283 Gate electrode 284 gate electrode 285 Drain electrode 310 Touch Panel 321 Conductive Layer 322 EL layer 323 Conductive Layer 324 Optical adjustment layer 331 Conductive Layer 332 Conductive Layer 335 Conductive Layer 341 Conductive Layer 351 Conductive Layer 352 Conductive layer 371 Circuit Board 372 PCB 373 FPC 373a FPC 373b FPC 374 IC 381 Display section 382 Drive Circuit 383 Wiring 384 Drive Circuit 385 Connection 386 Connectors 401 Conductive layer 402 Conductive layer 404 Conductive layer 405 Conductive Layer 411a Conductive layer 411a_1 Conductive layer 411aa Conductive layer 411b Conductive layer 411b_1 Conductive layer 411bb conductive layer 411c conductive layer 412a conductive layer 412aa conductive layer 412b Conductive layer 412bb conductive layer 412c conductive layer 500A display device 500B display unit 510 pixel section 511 pixels 520_1 Gate driver 520_2 Gate driver 530 Source Driver 531 TAB tape 532_k Source Driver IC 532_1 Source driver IC 601 Pulse voltage output circuit 602 Current detection circuit 603 capacity 621 Electrode 622 Electrode 723 Electrode 725 layers 726 Insulation Layer 727 Insulation Layer 728 Insulation Layer 729 Insulation Layer 741 Insulation Layer 742 Semiconductor layer 742a Semiconductor layer 742b Semiconductor layer 742c Semiconductor layer 743 Electrode 744a electrode 744b electrode 746 Electrode 747a aperture 747b aperture 747c aperture 747d aperture 755 Impurities 771 Circuit Board 772 Insulation Layer 775 Insulation Layer 810 Transistor 811 Transistor 820 transistors 821 Transistor 822 transistor 825 transistors 826 Transistor 830 transistors 831 Transistor 840 transistors 841 Transistor 842 transistors 843 Transistor 844 transistors 845 transistors 846 transistors 847 Transistor 848 transistors 850 transistors 851 Transistor 852 transistors 882 Ec 883a Ec 883b Ec 883c Ec 886 Ec 887 Ec 890 trap levels 5000 cabinets 5001 Display section 5002 Display section 5003 Speaker 5004 LED lamp 5005 Operation key 5006 Connection terminal 5007 Sensor 5008 Microphone 5009 Switch 5010 Infrared port 5011 Recording medium reading unit 5012 Stand 5013 Remote control operation machine 5014 Antenna 5015 Shutter button 5016 Image receiving unit 5017 charger 5018 Band 5019 Clasp 5020 Icon 5021 Icon 8000 Display Module 8001 Top cover 8002 Lower cover 8003 FPC 8004 Touch Panel 8007 Backlight 8008 light source 8009 Frame 8010 Printed Circuit Board 8011 Battery

Claims

1. A substrate; a first insulating layer having a region overlying the substrate; a first conductive layer having a region in contact with an upper surface of the first insulating layer and functioning as one of a source electrode and a drain electrode of a transistor; a second conductive layer having a region in contact with an upper surface of the first conductive layer; a second insulating layer having a region located above the first conductive layer and a region located above the second conductive layer; a third conductive layer having an area located above the second insulating layer and functioning as one electrode of a touch sensor; a third insulating layer having a region located above the third conductive layer; a fourth conductive layer having a region located above the third insulating layer and functioning as a pixel electrode; the third conductive layer is electrically connected to the second conductive layer through a first opening provided in the second insulating layer; the fourth conductive layer has a plurality of openings; The display device, wherein the fourth conductive layer is electrically connected to the first conductive layer through a second opening provided in the second insulating layer.

2. A substrate; a first insulating layer having a region overlying the substrate; a first conductive layer having a region in contact with an upper surface of the first insulating layer and functioning as one of a source electrode and a drain electrode of a transistor; a second conductive layer having a region in contact with an upper surface of the first conductive layer; a second insulating layer having a region in contact with an upper surface of the first conductive layer and a region in contact with an upper surface of the second conductive layer; a third conductive layer having an area in contact with an upper surface of the second insulating layer and functioning as one electrode of a touch sensor; a third insulating layer having a region in contact with an upper surface of the third conductive layer; a fourth conductive layer having a region located above the third insulating layer and functioning as a pixel electrode; the third conductive layer is electrically connected to the second conductive layer through a first opening provided in the second insulating layer; the fourth conductive layer has a plurality of openings; The display device, wherein the fourth conductive layer is electrically connected to the first conductive layer through a second opening provided in the second insulating layer.

3. In claim 1 or claim 2, The third insulating layer comprises nitrogen and silicon.

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