Pacemaker and method of operation of such a pacemaker - Patents.com

JP2025514586A5Pending Publication Date: 2026-03-24BIOTRONIK SE & CO KG
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-04-04
Publication Date
2026-03-24

AI Technical Summary

Technical Problem

Intracardiac pacemakers operating in VDD mode face challenges in maintaining synchronization with the natural heart cycle due to intermittent sensing of endogenous AV conduction, leading to potential loss of synchronization and errors in heart rate measurements.

Method used

A cardiac pacemaker comprising a processing unit, data memory, detector, and pacing signal generator, which continuously determines the average endogenous AV delay and uses it for ventricular pacing only when frequently measured, otherwise relying on programmed or heart rate-based AV delays.

Benefits of technology

The solution enables the pacemaker to remain synchronized with the natural heart cycle even during intermittent sensing, reducing errors in heart rate measurements and maintaining optimal pacing functionality.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention relates to a cardiac pacemaker (10) that remains synchronized with the natural cycle of the heart even when atrial sense events are sensed intermittently and intrinsic AV conduction occurs intermittently. The pacemaker includes a processing unit (120), a data memory (122), a detector (126), and a pacing signal generator (124), the processing unit, the data memory, the detector, and the pacing signal generator being electrically interconnected, the data memory configured to store a predefined programmed AV delay, the detector configured to detect intrinsic atrial activity signals and to detect intrinsic ventricular activity signals, and the processing unit configured to generate and transmit a ventricular pacing control signal to the pacing signal generator. The present invention further relates to methods of operation of each.
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Description

[Technical field]

[0001] The present invention relates generally to cardiac pacemakers and methods of operation of such pacemakers, respective computer program products and computer readable data carriers.

[0002] A cardiac pacemaker (or artificial pacemaker) is a medical device that generates electrical pulses delivered by electrodes connected to or fixed to the pacemaker to contract the myocardial chambers (i.e., atria and / or ventricles) and thereby pump blood. In doing so, the device substitutes for and / or regulates the function of the heart's electrical conduction system. One of the purposes of a pacemaker is to maintain an appropriate heart rate, either because the heart's natural pacemaker is not fast enough or because there is a blockage in the heart's electrical conduction system. Additionally or alternatively, pacemakers can stimulate various sites within the ventricles to improve ventricular synchrony or provide defibrillation capabilities, with the goal of treating life-threatening arrhythmias. Modern pacemakers are externally programmable, allowing an individual patient to select the most appropriate pacing mode by their health care provider (HCP).

[0003] An implantable intracardiac pacemaker (also known as an implantable leadless pacemaker (ILP)) is a well-known miniaturized pacemaker that is entirely implanted in the patient's ventricle (V) or atrium (A). ILP is considered the future of cardiac pacing. Alternative or additional functions of conventional or intracardiac pacemakers include providing other electrical or electromagnetic signals to the heart or surrounding tissues of the heart, and sensing electrical or electromagnetic signals (e.g., signals from depolarizing electric fields) or other physiological parameters of the heart and / or surrounding tissues of the heart, such as intrinsic (i.e., the heart's natural) atrial contractions or intrinsic (i.e., the heart's natural) ventricular contractions. Due to the high constraints imposed on the size of the device, the battery capacity of an ILP is small. An ILP can be operated in a VDD pacing mode (i.e., a pacing mode in which the ventricles are stimulated according to atrial activity and AV conduction monitoring). The VDD mode is suitable for patients with AV conduction disorders, of which there are several types. In particular, the present invention relates to patients with intermittent AV conduction.

[0004] In VDD mode, the pacemaker synchronizes ventricular pacing with intrinsic atrial timing by sensing when an atrial contraction occurs. Although an ILP implanted in the right ventricle can detect atrial contraction information as a far-field signal, it is less reliable and accurate than a dual-chamber pacemaker with leads in both the right atrium and the right ventricle. Since there is no atrial pacing in VDD mode, the pacemaker relies entirely on synchronization to the heart's conditions, rather than controlling the timing in both chambers as can be done in DDD pacing mode (where both the atrium and the ventricle are paced). Thus, the pacemaker must learn both the cardiac cycle rate and determine when an atrial sensed event (i.e., a natural atrial contraction) occurs in this cycle. The cardiac cycle interval (the inverse of the heart rate) is composed of an AV portion (the portion of the cardiac cycle between an atrial sensed event and a subsequent ventricular sensed event) and a VA portion (the portion of the cardiac cycle between a ventricular sensed event and a subsequent atrial sensed event). The AV portion of the cardiac cycle is also referred to hereafter as the AV delay. A ventricular sensed event is a sensed spontaneous ventricular contraction. In VDD mode, ventricular pacing may be based on a preprogrammed AV delay or an adapted AV delay (e.g., adapted according to the patient's sports activity level or heart rate).

[0005] In conventional VDD timing, the presence of ventricular sense events (abbreviated Vs) is often intermittent. In ILP, atrial sense events (abbreviated As) can also be intermittent, especially due to far-field detection of atrial signals (e.g., detection of depolarization fields occurring in cardiac tissue not directly adjacent to the electrodes). Learning the intrinsic heart rate always requires sensing in either the atrium or ventricle or both. Furthermore, sensing must occur in at least two consecutive cardiac cycles to be able to measure cycle intervals. The most straightforward approach to making interval measurements is to use a counter to count a regular known clock rate and start counting at each ventricular event, which is either a ventricular sense event or a ventricular pace (Vp). In a cycle that ends with a ventricular sense event, the cycle interval is the time elapsed between Vx and Vs (VxVs), where Vx means one of Vp and Vs. In a cycle with atrial sense (As), the atrial sense event starts the AV delay. If the cycle ends with a ventricular sense, the cycle interval time is the same as in the first case. If the cycle ends with a ventricular pace, the cycle interval time is the VxAsVp elapsed time. If the cycle does not have a ventricular or atrial sense event and begins with a ventricular pace, the cycle cannot be used to measure the intrinsic (i.e., natural) heart rate, which may vary over the course of the day depending on, for example, the patient's activity level.

[0006] The pacing function of a conventional or intracardiac pacemaker is intended to remain synchronized with the heart's natural activity during such cycles. If the programmed AV delay differs from the intrinsic AV conduction time, with intermittent sensing of atrial events and intermittent AV conduction, the measurement of heart rate may result in errors in filling when no sensing is present. This may result in a loss of synchronization between the pacemaker and the heart.

[0007] With an ILP implanted in the right ventricle, atrial contraction information can be detected as a far-field signal in the ventricular sensing signal. The ventricular artifact in the signal is much larger than the atrial artifact due to its near-field nature, making it difficult to distinguish the atrial component so that atrial contractions can be detected. In an AV-synchronized heart, the atria and ventricles are active at different periods, which can be used as a means to aid in this distinction. Ideally, atrial contractions occur after the ventricular T wave (repolarization artifact). The pacemaker can determine when to start looking for atrial artifacts based on when and under what conditions ventricular events occur. The cardiac interval is divided into a VA portion and an AV portion, and when the pacemaker paces in the ventricle, it can determine the time relationship between the detected atrial contractions and ventricular events, which can be used to increase the probability of detecting atrial contractions.

[0008] Thus, what is needed is a cardiac pacemaker that remains synchronized with the heart's natural cycle even when atrial sense events are sensed intermittently and, similarly, intrinsic AV conduction occurs intermittently. As well, what is needed is a corresponding method of operation of such a pacemaker.

[0009] The above mentioned problem is solved by a cardiac pacemaker having the features of claim 1 and by a method of operation having the features of claim 5.

[0010] In particular, the above-mentioned problems are solved by a cardiac pacemaker comprising a processing unit, a data memory, a detector, and a pacing signal generator, the processing unit (processor), the data memory, the detector, and the pacing signal generator being electrically interconnected. The data memory is configured to store a predefined programmed AV delay, and the detector is configured to detect an intrinsic atrial activity signal and detect an intrinsic ventricular activity signal. The processing unit is configured to generate and transmit a ventricular pacing control signal to the pacing signal generator, and the processing unit is further configured to determine an atrial sensed event from the intrinsic atrial activity signal received from the detector, and determine an intrinsic AV delay from the atrial sensed event and a subsequent intrinsic ventricular activity signal received from the detector. The processing unit is further configured to continuously determine an average intrinsic AV delay from a most recently determined intrinsic AV delay and a previously determined AV delay, and store the average intrinsic AV delay in the data memory. In one embodiment, the average intrinsic AV delay determined in the early cycle and the most recently measured intrinsic AV delay are used to calculate a new (actual) average intrinsic AV delay value. If no intrinsic AV delay is determined in the actual cycle, the average intrinsic AV delay does not change. The processing unit is further configured to generate a ventricular pacing control signal based on the (actual) average intrinsic AV delay if the average intrinsic AV delay is new, or based on the programmed AV delay or the differently determined AV delay if the average intrinsic AV delay is old, after one atrial sensed event is determined. In other words, the average intrinsic AV delay embodying the heart's natural AV delay is used for ventricular pacing only if it has been measured frequently (i.e., a reasonable number of times) in a recent period. If this condition is not true, i.e., if the average intrinsic AV delay is old, i.e., if it has been measured rarely and / or was measured a relatively long time ago, the ventricular pacing control signal is determined based on the programmed AV delay or the differently determined AV delay.The differently determined AV delay may be an AV delay adapted based on another physiological condition of the patient, for example, the patient's heart rate. This heart rate may be based on the use of an accelerometer built into the pacemaker, or may be based on the intrinsic rhythm of the heart. For example, three different AV delay values ​​may be stored in the data memory, one for low heart rates, one for medium heart rates, and one for high heart rates. If the average intrinsic AV delay is out of date, the AV delay value corresponding to the measured heart rate may be used as the AV delay for ventricular pacing. This heart rate-based AV delay is a well-known feature of pacemakers called dynamic AV delay. The conversion from heart rate to AV interval may also be calculated by the pacemaker without using a lookup from a table.

[0011] The atrioventricular delay, also called the AV delay, is the time interval from the onset of atrial contraction to the onset of ventricular contraction.

[0012] The cardiac pacemaker described above can better synchronize cardiac pacing with the natural cycle of the heart. The cardiac pacemaker can be an ILP or a (conventional) pacemaker where no device is placed within the patient's heart.

[0013] The processing unit processes the signal data received from the detector, for example, the intrinsic atrial or ventricular activity signal. From these signals, the processing unit can derive an atrial or ventricular sensed event based on different known signal evaluation methods, such as high-pass, low-pass or band-pass filters. The terms "atrial sensed event" and "ventricular sensed event" refer to respective natural signals that refer to natural contractions of the atria and ventricles, respectively. For example, if the signal data received from the detector is an IEGM (intracardiac electrocardiogram), the processing unit can evaluate this IEGM. An atrial sensed event may be derived from the IEGM if a P wave is identified, and a ventricular sensed event may be derived if a QRS complex or an R wave is detected in the IEGM. From the atrial sensed event and the subsequent ventricular sensed event, the processing unit determines an intrinsic AV delay. The AV delay is the period between an atrial sensed event and the next (subsequent) ventricular sensed event, and in one embodiment, this period cannot be longer than a predefined AV delay threshold. An AV delay threshold is defined and stored in the data memory to exclude cases where a subsequent ventricular sensed event in the next cycle and no atrial sensed event are detected after one atrial sensed event. In the context of the present invention, the processing unit is generally considered to be a functional unit of the pacemaker that interprets and executes instructions, including a command control unit and an arithmetic unit. The processing unit may include a microprocessor, a controller, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), a discrete logic circuit, or any combination thereof. Furthermore, the processing unit may include a counter and a clock. The counter may be used to count the clock signals of the clock. The counter may be started at each sensed atrial event and count the number of clock signals until a ventricular sensed event is determined or a ventricular pacing signal is provided by the pacing signal generator.The intrinsic AV delay may be determined from the number of counted clock signals between an atrial sensed event and a subsequent ventricular sensed event (within one cycle). In particular, the processing unit is configured to continuously determine an average intrinsic AV delay and a ventricular pacing control signal. Based on the ventricular pacing control signal, the pacing signal generator generates an electrical pacing signal for delivery to an electrode, which applies the signal to cardiac tissue adjacent the electrode.

[0014] The pacemaker's data memory may include any volatile, nonvolatile, magnetic or electrical media, such as random access memory (RAM), read-only memory (ROM), nonvolatile RAM (NVRAM), electrically erasable programmable ROM (EEPROM), flash memory or any other memory device.

[0015] The detector may comprise means for detecting the IEGM signal as described above. Additionally or alternatively, the detector may comprise an accelerometer, a vibration sensor, an acoustic sensor (including ultrasound), an impedance sensor, a pressure sensor, and / or any other mechanical, electrical and / or magnetic sensor that may detect cardiac activity, in particular atrial or ventricular activity of the patient's heart, i.e., information regarding the contraction of the heart chambers, to determine atrial sensed events, ventricular sensed events and intrinsic AV delays, e.g., "atrial kicks" occurring during the contraction of the atrium. The detector collects cardiac activity signals and converts them into electrical signals. Furthermore, the detector may digitize or smooth analog signals. Some pre-processing steps may be provided by the detector as well. The signals generated by the detector may be transmitted to a processing unit directly or after a predefined time delay.

[0016] The pacing signal generator generates pacing signals, which are then applied to the cardiac tissue via the electrodes. The pacing signals are pulses that begin at a desired time and have a desired strength and length. Furthermore, the pulse shape may vary. The information about the pacing signal required to generate the correct pacing signal is provided by the pacing control signal of the processing unit.

[0017] The pacemaker may further comprise a module such as a communication unit for communicating with a remote computer and a power source such as a battery. The communication unit may exchange messages with an external (at least partially outside the body) remote computer, e.g., unidirectionally or bidirectionally. The communication may be provided wirelessly, through the patient's body and / or through the air, using electromagnetic waves, e.g., Bluetooth, WLAN, ZigBee, NFC, Wibree or WiMAX in the radio frequency domain or IrDA or Free Space Optics (FSO) in the infrared or optical frequency domain, or wired (electrical and / or optical). The remote computer is a functional unit capable of performing substantial calculations including numerous arithmetic and logical operations without human intervention, such as, e.g., a personal mobile device (PMD), a desktop computer, a server computer, a cluster / warehouse scale computer, or an embedded system. The pacemaker units and components may be contained in a hermetically sealed housing.

[0018] In one embodiment, the pacemaker comprises electrodes for application of an electrical pacing signal provided by a pacing signal generator. The electrodes are electrically connected to the pacing signal generator via a header of the pacemaker. In one embodiment, the electrodes may comprise leads that may be removably connected to respective connectors in the header. With respect to the ILP, one electrode may be located at the distal end of the ILP, near a fixation member for fixing the ILP in the tissue of the patient's heart, for example in the internal tissue of the ventricle. The second electrode may be located at the proximal end of the ILP, or may be located in a part of the ILP housing that may function, for example, as a counter electrode. Furthermore, the electrodes may be adapted to detect intrinsic ventricular or atrial activity signals by picking up electrical potentials. Thus, the electrodes may be part of the detector of the pacemaker.

[0019] In one embodiment, the average intrinsic AV delay is determined from the most recently determined intrinsic AV delay and the previously determined AV delay using a recursive filter. The intent of the filtering is to minimize the effect of outlier timing from the measurement average. To achieve this, a moving average, a weighted average, or other well-known averaging techniques may be used. The intrinsic AV delay may naturally shift, for example as a result of heart rate, and the time constant used to perform this averaging would be selected to track such shifts with minimal delay while minimizing the effect of, for example, ectopic events in the heart. For example, a recursive filter that weights new inputs by 1 / 4 would be suitable.

[0020] In one embodiment, the processing unit is configured to determine a freshness counter value, which continues from one cycle to the next and is increased by a first predetermined value after one intrinsic AV delay is determined and is decreased by a second predetermined value after one ventricular pacing control signal is transmitted to the pacing signal generator. The first and second values ​​may be the same or different. In each cycle, the freshness counter value is checked, and if the freshness counter value is equal to or greater than the freshness threshold, the actual average intrinsic AV delay is considered fresh, and if the freshness counter value is below the freshness threshold, the actual average intrinsic AV delay is considered stale. This is a simple and effective approach to determine whether the average intrinsic AV delay is fresh or stale. This can be realized in hardware or software. The initial value of the freshness counter (e.g., used after a restart or a pacemaker) is, for example, 0, indicating that there is no recent history and therefore the AV average should be considered stale. The first predetermined value may be, for example, 1, and the second predetermined value may also be, for example, 1. The recency threshold may be selected, for example, to be 4, indicating that some AV intervals have been measured in the last 6 cycles. Instead of using such an up / down counter approach, a "one-shot" mechanism may be used, where each time an AV interval is measured, the counter is set to a maximum value, for example, 7, and each time a ventricular pace is delivered, the counter is decremented, for example, by 1 (to a minimum value of 0). As long as the counter remains greater than 0, the average AV interval measurement is considered fresh. Otherwise, the average AV interval measurement is considered stale. Similarly, other means of determining whether the average intrinsic AV delay represents a current value may be used. For example, each determined intrinsic AV delay may be time-stamped. In this case, the time-stamp may be used to determine the most recent value (e.g., within a predefined period), from which an average value (e.g., arithmetic mean, geometric mean, harmonic mean, or median) may be calculated.

[0021] In one embodiment, in the case where the average intrinsic delay is old, the ventricular pacing control signal is generated by the processing unit after one atrial sensed event is determined based on a predefined hysteresis value and the programmed AV delay or the differently determined AV delay, where the programmed AV delay is extended by the hysteresis value or the differently determined AV delay is extended by the hysteresis value. This embodiment implements a hysteresis feature used to promote ventricular sensing rather than pacing. This embodiment extends the time before a ventricular pace is delivered to allow ongoing AV conduction to reach the ventricle first, which causes a ventricular sensed event that inhibits ventricular pacing. In cycles where the average intrinsic AV delay is used instead of the programmed AV delay (i.e., in cycles where the average intrinsic AV delay is considered new), the hysteresis feature is skipped. This results in more ventricular pacing than occurs when the hysteresis feature is active, but extended hysteresis alters (lengthens) the pacing rate, which may contribute to loss of AV synchrony. It is unclear whether AV synchrony, which helps to preserve tricuspid and mitral valve function, is more important in long-term cardiac health than promoting the use of intrinsic AV conduction (i.e., avoidance of ventricular pacing), which helps to promote RV / LV synchrony.

[0022] The above-mentioned object is further achieved by a method of operation of a cardiac pacemaker, wherein the pacemaker comprises a processing unit, a data memory, a detector, and a pacing signal generator, the processing unit, the data memory, the detector, and the pacing signal generator being electrically interconnected, the data memory storing a predefined programmed AV delay, the detector detecting an intrinsic atrial activity signal and an intrinsic ventricular activity signal, the processing unit generating and transmitting a ventricular pacing control signal to the pacing signal generator, the processing unit determining a ventricular pacing control signal from the intrinsic atrial activity signal received from the detector. The method includes determining an atrial sensed event, determining an intrinsic AV delay from the atrial sensed event and a subsequent intrinsic ventricular activity signal received from the detector, continuously determining an average intrinsic AV delay from the most recently determined intrinsic AV delay and a previously determined AV delay, storing the average intrinsic AV delay in a data memory, and the processing unit generates a ventricular pacing control signal after one atrial sensed event is determined based on the average intrinsic AV delay if the average intrinsic AV delay is new, or based on a programmed AV delay or a differently determined AV delay if the average intrinsic AV delay is old. The above method has the advantages shown for each of the above pacemakers. In one embodiment, the average intrinsic AV delay is determined from the most recently determined intrinsic AV delay and a previously determined AV delay using a recursive filter.

[0023] In one embodiment, the processing unit determines a freshness counter value that is increased by a first predetermined value after one intrinsic AV delay is determined and is decreased by a second predetermined value after one ventricular pacing control signal is transmitted to the pacing signal generator, and if the freshness counter value is greater than or equal to a freshness threshold, the average intrinsic AV delay is considered fresh, and if the freshness counter value is below the threshold, the average intrinsic AV delay is considered stale.

[0024] In one embodiment, in the case where the average intrinsic delay is old, a ventricular pacing control signal is generated after one atrial sensed event is determined based on a predefined hysteresis value and the programmed AV delay or the differently determined AV delay, where the programmed AV delay is extended by the hysteresis value or the differently determined AV delay is extended by the hysteresis value.

[0025] The above-described embodiments of the method of operation have the same advantages as the above-described pacemaker. The above-described embodiments of the pacemaker can be implemented in the same manner in the method of operation. In this regard, reference is made to the above description of the pacemaker.

[0026] For example, the above-mentioned method may be implemented, for example, as a computer program including instructions which, when executed, cause a processing unit (processor) to perform the steps of the above-mentioned method (implemented by a medical device, in particular a processor of the medical device), the instructions being a combination of the specific computer instructions above and below and data definitions enabling computer hardware to perform a computational or control function, or the instructions being syntactic units consisting of declarations and descriptions or commands necessary for the above-mentioned specific functions, tasks or problem solutions and the below-mentioned specific functions, tasks or problem solutions, conforming to the rules of a specific programming language.

[0027] Further disclosed is a computer program product comprising instructions which, when executed by a processing unit, cause the processing unit to perform the steps of the method defined above. Accordingly, disclosed is a computer readable data carrier storing such a computer program product.

[0028] The invention will now be described in more detail with reference to the accompanying schematic drawings. [Brief description of the drawings]

[0029] [Figure 1] 1 illustrates a first embodiment of a pacemaker in cross-section of a patient's heart. [Diagram 2] FIG. 2 is a functional block diagram of the pacemaker shown in FIG.

[0030] FIGURE 1 shows an exemplary ventricular leadless pacemaker (ILP) 10 implanted within a heart 20 of a patient 30. The ILP 10 can be implanted within a right ventricle 21 of the heart 20 and configured to pace the ventricle, sense intrinsic ventricular depolarizations and depolarizations of an atrium (e.g., the right atrium 22), and inhibit ventricular pacing in response to a detected ventricular depolarization. A programmer (not shown) can be used to program the ILP 10 and receive data from the ILP 10. The ILP 10 is one example of a cardiac pacemaker 10. Other embodiments of the cardiac pacemaker 10 are possible.

[0031] FIG. 2 shows a functional block diagram of an ILP 10 configured for implantation in a cardiac ventricle 21 (FIG. 1). The ILP 10 comprises a processing unit 120 having a clock and at least one counter of a clock signal, a data memory 122, a pacing signal generator 124, a detector 126, a communication unit 128 and a power source 132. The power source 132 may include a battery, for example a rechargeable or non-rechargeable battery. The power source 132 provides electrical energy to all units and components of the ILP 10, in particular all units mentioned above, and is therefore electrically connected to these units and components. The units included in the ILP 10 are representative of their respective functions. Similar or identical units and functions may also be included in the ILP 10. The units of the present disclosure may include any discrete and / or integrated electronic circuit components implementing analog and / or digital circuits capable of generating the functions attributed to the units herein. For example, the units may include analog circuits, for example amplification circuits, filtering circuits and / or other signal conditioning circuits. The units may include digital circuits, e.g., combinational or sequential logic circuits, memory devices, etc. The data memory 122 may include any volatile, non-volatile, magnetic, or electrical medium described above. Additionally, the processing units 120 may include instructions that, when executed by one or more processing circuits, cause the units to perform various functions attributed to these units herein. Functions attributed to units herein may be embodied as one or more processors, hardware, firmware, software, or any combination thereof. The depiction of various features as units is intended to highlight various functional aspects and does not necessarily imply that such units must be realized by separate hardware or software components.Rather, functions associated with one or more units may be performed by separate hardware or software components or may be integrated within a common or separate hardware or software component. Data memory 122 may include computer-readable instructions that, when executed by processing unit 120, cause processing unit 120 to perform various functions herein ascribed to processing unit 120. Additionally, data memory 122 may store parameters for these functions, such as pacing signal parameters. For example, data memory 122 may store predefined programmable AV delays. Pacing commands and pacing signal parameters may be updated by a programmer using communication unit 128. Communication unit 128 may include an antenna or a transceiver.

[0032] The processing unit 120 can communicate with, and transmit signals to, the pacing signal generator 124 and the detector 126. The pacing signal generator 124 and the detector 126 are electrically connected to the electrodes 111, 112 of the ILP 10. The detector 126 is configured to monitor signals from the electrodes 111, 112 to monitor electrical activity of the heart 20. Furthermore, the detector 126 may include an accelerometer, an acoustic sensor, and / or a pressure sensor. The pacing signal generator 124 is configured to deliver an electrical stimulation signal to the ventricle 21 via the electrodes 111, 112.

[0033] The processing unit 120 can control the pacing signal generator 124 to generate and deliver electrical stimuli to the ventricle 21 via the electrodes 111, 112. The electrical stimuli can include pacing pulses. The processing unit 120 can control the pacing signal generator 124 to deliver the electrical stimulation therapy according to one or more therapy programs, which include pacing parameters, which can be stored in the data memory 122.

[0034] Detector 126 may include circuitry to acquire electrical signals from the heart (e.g., depolarized electrical signals) that include intrinsic cardiac electrical activity, such as intrinsic ventricular activity and / or intrinsic ventricular activity. Detector 126 may filter, amplify, and digitize the acquired electrical signals to generate raw digital data. Processing unit 120 may receive the digitized data generated by detector 126.

[0035] Processing unit 120 can evaluate the raw digital data received from detector 126 and is configured to identify atrial and ventricular sensed events. For example, a static or dynamic amplitude threshold detector can be used to distinguish the events, timing patterns can be used to distinguish sensing from noise, and events recognized as ventricular sensed signals or ventricular repolarization (T-wave) signals can be used to define a period used to qualify potential atrial sensed signals.

[0036] The ILP 10 may include a housing, fixation tines, and electrodes 111, 112. The housing may have a pill-shaped cylindrical form factor in some examples. The fixation tines are configured to connect (e.g., tether) the ILP 10 to the heart 20. The fixation tines may be fabricated from a shape memory material, such as Nitinol. In some examples, the fixation tines may connect the ILP 10 to the heart 20 in one of multiple chambers of the heart 20. For example, as shown and described herein with respect to FIG. 1, the fixation tines may be configured to tether the ILP 10 to the heart 20 in the right ventricle 21. Although the ILP 10 includes multiple fixation tines configured to tether the ILP 10 to cardiac tissue in the right ventricle, it is contemplated that a pacemaker according to the present disclosure may be anchored to cardiac tissue in other chambers of the patient's heart 20 using other types of anchoring mechanisms.

[0037] The ILP 10 may include two electrodes 111, 112, although in other examples more than two electrodes may be included in the pacemaker. The electrodes 111, 112 may be spaced apart a sufficient distance to be able to detect various electrical signals generated by the heart 20, such as P waves generated by the atria and QRS complexes generated by the ventricles. The housing houses the electronic components of the ILP 10. The electronic components may include any discrete and / or integrated electronic circuit components implementing analog and / or digital circuits capable of generating the functions attributed to the ILP 10 described above.

[0038] The communications unit 128 may enable the ILP 10 to communicate with other electronic devices, such as a programmer or other external patient monitor. In some examples, the housing may house an antenna for wireless communication. The housing may also include a power source 132.

[0039] Processing unit 120 can be adapted to control the pacing of right ventricle 21 using the known VDD mode. A counter in processing unit 120 used to time the AV delay (to provide a ventricular pacing signal) can also be used to measure the intrinsic AV delay. This timer is restarted when an atrial sensed event is detected by processing unit 120 in the activity signal derived from detector 126. If no ventricular sensed event is seen before the timeout, a ventricular pacing control signal is generated by processing unit 120 and transmitted to pacing signal generator 124. In the case where a ventricular sensed event is seen, the counter value at the instant of sensing detection is a measure of the intrinsic AV delay. This value may be averaged over several cycles by weighting the current measurements using arithmetic logic and by weighting the stored moving averages using arithmetic logic, adding them in a logical adder, and dividing them by a logical shift to give a weighted average, so that the output represents the most recent average of the intrinsic AV delay, referred to as the average intrinsic AV delay. To keep track of whether the average intrinsic AV delay average is fresh enough to use, a "one-shot" mechanism (which can be either hardware or software) can be used, for example a recency counter. Immediately after the ILP 10 is restarted, the recency counter has a predefined value, for example 0. Furthermore, the recency counter has a maximum value of 7, and therefore can take values ​​from 0 to 7. Each time AV conduction is detected (i.e., each time a ventricular sensed event is detected after one atrial sensed event in the same cycle), the recency counter is loaded with a first predefined value (for example 7). This value is decremented each time a ventricular pace is delivered at a predefined second value (e.g., 1), i.e., each cycle in which there is no AV conduction to measure. When the recency counter count falls to a predefined recency threshold (e.g., 0), the average intrinsic AV delay is considered stale. If the recency counter is greater than 0, the average intrinsic AV delay is considered fresh.

[0040] In cycles in which an atrial sensed event is detected by processing unit 120, if the determined average intrinsic AV delay is recent, the AV timer is used to time its duration. If a ventricular sensed event is not seen before the timeout, a ventricular pacing control signal is generated by processing unit 120 and transmitted to pacing signal generator 124 for delivery of the respective pacing signals to the patient's heart 20 by electrodes 111, 112. If the average intrinsic AV delay is stale, a user-programmed AV delay, stored in data memory 122, is used instead.

[0041] In one embodiment, a hysteresis feature is used to encourage ventricular sensing rather than pacing. By extending the time before a ventricular pace is delivered by a predefined hysteresis value, ongoing AV conduction is allowed to reach the ventricle first, thereby triggering a ventricular sensing event that inhibits ventricular pacing. The predefined hysteresis value may be stored in the data memory 122 and may be programmed by the programmer. However, the hysteresis feature is skipped during cycles in which the average intrinsic AV delay is used instead of the programmed AV delay.

[0042] In one embodiment, the above algorithm may be configured as an optional feature of the ILP 10. If the user programs, for example, "AV Persist" ON, the algorithm will be used. If the user programs, for example, "AV Persist" OFF, the programmed AV delay will always be used. This allows the physician to decide whether to prioritize intrinsic AV conduction time or minimize ventricular pacing.

[0043] The ILP10 and described methods above use an AV delay (i.e., average intrinsic AV delay), which more accurately represents normal AV conduction time when that information is available. Alternatively, when measurements are not fresh enough to be meaningful, i.e., during periods when AV conduction is lost, the user uses a programmed AV delay. This improves the ability of the VDD in the ILP10 to remain synchronized with the natural cardiac timing of the patient's heart 20. Furthermore, when the intrinsic and programmed AV delays are different and AV conduction follows a 2:1 pattern, alternating long and short cardiac cycles are reduced.

Claims

1. A cardiac pacemaker (10) comprising a processing unit (120), a data memory (122), a detector (126), and a pacing signal generator (124), The processing unit, the data memory, the detector, and the pacing signal generator are electrically interconnected. The data memory is configured to store a predetermined, programmed AV delay. The detector is configured to detect endogenous atrial activity signals and endogenous ventricular activity signals. The processing unit is configured to generate a ventricular pacing control signal and transmit it to the pacing signal generator. The processing unit is further configured to determine an atrial sensing event from the intrinsic atrial activity signal received from the detector, determine the intrinsic AV delay from the atrial sensing event and the subsequent intrinsic ventricular activity signal received from the detector, continuously determine the mean intrinsic AV delay from the most recently determined intrinsic AV delay and the previously determined AV delay, and store the mean intrinsic AV delay in the data memory. The processing unit is further configured to generate the ventricular pacing control signal after an atrial sensing event has been determined, based on the mean endogenous AV delay if the mean endogenous AV delay is recent, or based on the programmed AV delay or a differently determined AV delay if the mean endogenous AV delay is old. Pacemaker.

2. The pacemaker according to claim 1, wherein the mean endogenous AV delay is determined using digital averaging from the most recently determined endogenous AV delay and the previously determined AV delay.

3. The processing unit (120) is configured to determine a novelty counter value, which is increased by a first predetermined value after one intrinsic AV delay is determined, and decreased by a second predetermined value after one ventricular pacing control signal is transmitted to the pacing signal generator (124). The pacemaker according to claim 1 or 2, wherein if the newness counter value is equal to or greater than the newness threshold, the mean endogenous AV delay is considered new, and if the newness counter value is less than the newness threshold, the mean endogenous AV delay is considered old.

4. In the case where the mean intrinsic delay is old, the ventricular pacing control signal is generated after one atrial sensing event has been determined, based on a predetermined hysteresis value and the programmed AV delay or the differently determined AV delay. The pacemaker according to claim 1 or 2, wherein the programmed AV delay is extended by the hysteresis value, or the differently determined AV delay is extended by the hysteresis value.

5. A method of operation for a cardiac pacemaker (10), The pacemaker comprises a processing unit (120), a data memory (122), a detector (126), and a pacing signal generator (124). The processing unit, the data memory, the detector, and the pacing signal generator are electrically interconnected. The data memory stores a predetermined, programmed AV delay. The detector detects endogenous atrial activity signals and endogenous ventricular activity signals. The processing unit generates a ventricular pacing control signal and transmits it to the pacing signal generator. The processing unit determines an atrial sensing event from the intrinsic atrial activity signal received from the detector, determines the intrinsic AV delay from the atrial sensing event and the subsequent intrinsic ventricular activity signal received from the detector, continuously determines the mean intrinsic AV delay from the most recently determined intrinsic AV delay and the previously determined AV delay, and stores the mean intrinsic AV delay in the data memory. The processing unit generates the ventricular pacing control signal after an atrial sensing event has been determined, based on the mean endogenous AV delay if the mean endogenous AV delay is recent, or based on the programmed AV delay or a differently determined AV delay if the mean endogenous AV delay is old. method.

6. The method according to claim 5, wherein the mean intrinsic AV delay is determined using digital averaging from the most recently determined intrinsic AV delay and the previously determined AV delay.

7. The processing unit (120) determines a newness counter value, increases the newness counter value by a first predetermined value after one intrinsic AV delay has been determined, and decreases it by a second predetermined value after one ventricular pacing control signal has been transmitted to the pacing signal generator (124). The method according to claim 5, wherein if the newness counter value is equal to or greater than the newness threshold, the average intrinsic AV delay is considered new, and if the newness counter value is less than the newness threshold, the average intrinsic AV delay is considered old.

8. In cases where the mean intrinsic delay is old, the ventricular pacing control signal is generated after one atrial sensing event has been determined, based on a predetermined hysteresis value and the programmed AV delay or the differently determined AV delay. The method according to claim 5, wherein the programmed AV delay is extended by the hysteresis value, or the differently determined AV delay is extended by the hysteresis value.

9. A computer program product, When executed by a processing unit (120), the processing unit is provided with an instruction to perform a step of the method according to any one of claims 5 to 8. Computer program products.

10. A computer-readable data carrier, A computer program product according to claim 9 is stored in Computer-readable data carrier.