Slider interface voltage control in a data storage device

Abstract

To provide a data storage device (DSD) that reduces degradation of a slider caused by operation of an energy-assisted magnetic recording technique in the slider while maintaining a safe flying height of the slider.SOLUTION: The DSD100 comprises a magnetic disc 120 and a slider 110b including a write portion configured to magnetically write to the magnetic disc. A voltage is applied to the slider to provide a target offset voltage between the slider and the magnetic disk, wherein the applied voltage is different from a disk voltage of the magnetic disk. In one aspect, a first disk voltage for a magnetic disk is determined. The voltage to be applied to the slider is determined to adjust the potential difference between the slider and the disk to a non-zero target offset voltage.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] Data storage devices (DSDs) are often used to record data on or reproduce data from a storage medium. One type of storage medium includes a rotating magnetic disk, such as in a hard disk drive (HDD). In such DSDs, a slider including a read transducer and a write transducer is typically positioned relative to the magnetic disk to magnetically read and write data from a recording layer, which is the surface of the magnetic disk. The slider is attached to an actuator arm by a suspension and is positioned very close to the disk surface (e.g., within 5 nanometers) by the suspension. Typically, a DSD contains a stack of disks, and a slider-suspension assembly is associated with each disk surface in the stack.

[0002] The separation or spacing between the slider and the disk surface is called the flying height. The slider has a disk-facing gas-bearing surface (GBS), which rests on a cushion or bearing of gas, typically air or helium, generated by the rotation of the disk. The slider is attached to a flexure on a suspension, which includes a load beam that applies a load force to the slider, countering the gas-bearing force while allowing the slider to "pitch" and "roll." The flying dynamics of the slider, and therefore the flying height, are affected by factors such as the rotational speed of the disk, the aerodynamic shape of the slider's GBS, the load force applied to the slider by the suspension, and the pitch and roll torques applied to the slider by the suspension.

[0003] An interface voltage control (IVC) is used to apply a voltage to the slider body or the disk. In some cases, an IVC may be used to passivate the slider by enveloping at least a portion of the slider body with an electrostatic charge, which can help preserve the life of the slider and its components by protecting the slider from mechanical wear and chemical oxidation. An IVC may also be used to minimize the potential difference between the slider and the disk. If the potential difference between the slider and the disk is not completely canceled, electrostatic attraction may pull the slider toward the disk, causing contact between the slider and the disk, and / or the slider may pick up or accumulate disk lubricant from the disk surface. In many cases, the accumulation of lubricant from the disk surface can degrade slider performance, such as by interfering with the slider's ability to accurately read or write data. [Brief explanation of the drawings]

[0004] Features and advantages of embodiments of the present disclosure will become more apparent from the detailed description set forth below when taken in conjunction with the drawings, which drawings and associated description are provided to illustrate embodiments of the present disclosure and not to limit the scope of the claims. [Figure 1] 1 is a plan view of an exemplary data storage device (DSD) according to one or more embodiments. [Figure 2A] 1 illustrates different interface voltages between a slider and a magnetic disk. [Figure 2B] 2B is a graph showing the change in flying height above a magnetic disk of the slider of FIG. 2A as the interface voltage changes. [Figure 3] FIG. 2 is a block diagram of a slider coupled to a slider bias voltage generator in accordance with one or more embodiments. [Figure 4]1 is a graph illustrating the voltage applied to the slider over time to maintain a target offset voltage between the slider and a varying disk voltage in accordance with one or more embodiments. [Figure 5] 1 is a graph illustrating the average voltage applied to a slider in a DSD over a long time frame to maintain a target offset voltage between the sliders and an average disk voltage in accordance with one or more embodiments. [Figure 6] 10 is a flowchart of an initial slider voltage setting process according to one or more embodiments. [Figure 7] 10 is a flowchart of an iterative slider voltage setting process in accordance with one or more embodiments. DETAILED DESCRIPTION OF THE INVENTION

[0005] In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be apparent to those skilled in the art that the various disclosed embodiments may be practiced without some of these specific details. In other instances, well-known structures and techniques have not been shown in detail to avoid unnecessarily obscuring the various embodiments.

[0006] Exemplary Data Storage Device 1 is a plan view of an exemplary data storage device (DSD) 100, according to one or more embodiments, to illustrate an exemplary operating environment. In some implementations, the DSD 100 can include a hard disk drive (HDD) or other types of DSDs that include magnetic disks as data storage media, such as solid-state hybrid drives (SSHDs) that can include solid-state non-volatile memory in addition to one or more magnetic disks.

[0007] 1, the DSD 100 includes a slider 110b that includes a magnetic read / write head 110a. Collectively, the slider 110b and the head 110a may be referred to as a head slider. The DSD 100 further includes at least one head gimbal assembly (HGA) 110, which includes a head slider, a lead suspension 110c typically attached to the head slider via a flexure, and a load beam 110d attached to the lead suspension 110c.

[0008] The DSD 100 also includes at least one magnetic disk 120 rotatably mounted on a spindle 124, and a drive motor (not shown) attached to the spindle 124 for rotating the magnetic disk 120. The head 110a includes a writing portion or element and a reading portion or element for writing and reading data stored on the magnetic disk 120 of the DSD 100, respectively. The magnetic disk 120, or multiple magnetic disks stacked below the magnetic disk 120, may be attached to the spindle 124 by a disk clamp 128.

[0009] 1, the DSD 100 further includes an arm 132 attached to the HGA 110, a carriage 134, a voice-coil motor (VCM) including an armature 136 and a voice coil 140 attached to the carriage 134, and a stator 144 including a voice coil magnet (not shown). The armature 136 of the VCM is attached to the carriage 134 and configured to move the arm 132 and HGA 110 to access portions of the magnetic disk 120, and is attached to a pivot shaft 148 by an intervening pivot bearing assembly 152. In the case of multiple disks, the carriage 134 may be referred to as an "E-block" or comb, as it is arranged to carry a series of arms interlocked to resemble a comb.

[0010] An assembly comprising a head gimbal assembly (e.g., HGA 110), including a flexure to which a head slider is coupled, an actuator arm (e.g., arm 132) and / or a load beam to which the flexure is coupled, and an actuator (e.g., VCM) to which the actuator arm is coupled, may be collectively referred to as a head stack assembly (HSA). However, an HSA may include more or fewer components than those listed. For example, an HSA may refer to an assembly that further includes electrical interconnection components. Generally, an HSA is an assembly configured to move a head slider to access portions of magnetic disk 120 for read and write operations.

[0011] 1 , electrical signals (e.g., current to the voice coil 140 of the VCM), including write signals to and read signals from the head 110 a, are provided by a flexible interconnect cable 156 (“flex cable”). An Arm-Electronics (AE) module 160, which may have an on-board preamplifier for the read signal as well as other read and write channel electronics, provides the connection between the flex cable 156 and the head 110 a. The AE module 160 may be attached to the carriage 134 as shown, or may be included as part of the circuitry 166 of the controller 170. The flex cable 156 is coupled to an electrical connector block 164, which provides electrical communication to the controller 170 located below the electrical connector block 164 via electrical feedthroughs provided by a housing 168. The housing 168, also referred to as a base, together with a cover, provides a sealed, protective enclosure for the data storage components of the DSD 100.

[0012] Other electronic components, including a disk controller and servo electronics, which may further include a digital signal processor (DSP), provide electrical signals to the drive motor, the voice coil 140 of the VCM, and the head 110a of the HGA 110. The electrical signals provided to the drive motor enable the drive motor to spin, providing torque to the spindle 124, which is then transmitted to the magnetic disk 120 attached to the spindle 124. As a result, the magnetic disk 120 spins in a direction 172. The magnetic disk 120 forms a cushion of gas that acts as a gas bearing on which the gas bearing surface (GBS) of the slider 110b rides, allowing the slider 110b to fly above the surface of the magnetic disk 120 without contacting the thin magnetic recording layer of the disk 120 on which data is recorded.

[0013] An electrical signal provided to the voice coil 140 of the VCM enables the head 110a of the HGA 110 to access tracks 176 where data is to be recorded. In this manner, the armature 136 of the VCM oscillates along an arc 180, thereby enabling the head 110a of the HGA 110 to access various tracks on the magnetic disk 120. Data is stored on the magnetic disk 120 in a plurality of radially nested tracks arranged within sectors, such as sector 184. Correspondingly, each track is made up of a plurality of sectored track portions (or "track sectors"), such as sectored track portion 188. Each sectored track portion may store the recorded data, a servo burst signal pattern that identifies the track 176, e.g., an ABCD servo burst signal pattern, and a header that includes error correction code information. When accessing track 176, the read element of head 110a of HGA 110 reads the servo burst signal pattern, which provides a position-error-signal (PES) to the servo electronics, which in turn controls the electrical signal provided to voice coil 140 of the VCM to enable head 110a to follow track 176. Upon locating track 176 and identifying sectored track portion 188, head 110a reads data from or writes information to track 176 in response to instructions, such as instructions received by controller 170 from an external host, such as a microprocessor in a computer system.

[0014] 1, controller 170 is shown with a dashed line connected to electrical connector block 164 to indicate that controller 170 is in electrical communication with electrical connector block 164. As will be understood by one of ordinary skill in the art, controller 170 in some implementations may include a printed circuit board (PCB) coupled to a bottom surface of DSD 100, such as housing 168. As shown in the example of FIG. 1, controller 170 includes circuitry 166 and at least one non-volatile memory (NVM) 174.

[0015] The circuit 166 may include electronic components for performing different functions for the operation of the DSD, such as an interface controller, a read / write integrated circuit (R / W IC) (e.g., R / W IC 305 in FIG. 3 ), an AE module, a motor driver, a servo processor, and other digital processors and associated memories. In the example of FIG. 1 , the circuit 166 may include one or more processors for executing instructions, such as a microcontroller, a DSP, an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA), hardwired logic, analog circuits, and / or combinations thereof. In some implementations, the circuit 166 may include a system on a chip (SoC), which may also include one or more memories of the NVM 174.

[0016] 1 , at least one NVM 174 stores an interface voltage control (IVC) module 10, a target offset voltage 12, and an IVC voltage setting 14. As discussed in more detail below, circuitry 166 can execute IVC module 10 to apply a voltage based on IVC voltage setting 14 to slider 110 b to reach a target offset voltage (which may be represented by target offset voltage 12) between slider 110 b and magnetic-disk 120. IVC module 10 may form part of firmware for DSD 100, executed by circuitry 166 to control operation of DSD 100.

[0017] In a conventional DSD with a magnetic disk, the IVC may apply an "optimum interface voltage" (OIV) to the slider so that the slider voltage matches the disk voltage to cancel or minimize the potential difference between the slider and the disk. As discussed in more detail below with reference to Figures 2A and 2B, the OIV applied to the slider eliminates the electrostatic attraction between the slider and the disk, resulting in the highest flying height between the disk and the slider, thereby reducing the risk of the slider contacting or impacting the disk surface and / or accumulating lubricant from the disk surface, which may degrade the performance and / or usable life of the slider.

[0018] Unlike such conventional DSDs, the present disclosure maintains a target offset voltage, or conventional OIV, between the slider voltage and the magnetic disk voltage by applying a voltage to the slider that is lower than the disk voltage. The voltage applied to the slider can increase the usable life of the slider by passivating the slider or by enveloping at least a portion of the slider with an electrostatic charge, and can help preserve the life of the slider and its components by protecting the slider from mechanical wear and / or chemical oxidation. Such mechanical wear or degradation has proven particularly problematic for sliders using newer energy-assisted magnetic recording (EAMR) technologies. Examples of such EAMR technologies include microwave-assisted magnetic recording (MAMR), energy-assisted perpendicular magnetic recording (ePMR), and heat-assisted magnetic recording (HAMR).

[0019] As will be understood by those skilled in the art with reference to this disclosure, other implementations of DSD 100 may differ from the example shown in Figure 1. For example, other implementations of DSD 100 may include additional types of storage media, such as non-volatile solid-state memory, in addition to one or more magnetic disks. As another exemplary variation, the target offset voltage 12 and the IVC voltage setting may be stored in the same data structure.

[0020] FIG. 2A illustrates three different exemplary interface voltages between slider 110b and magnetic disk 120 to illustrate the electrostatic attraction when there is a difference between the voltage of magnetic disk 120 and the voltage of slider 110b.

[0021] 2A, a voltage of −400 mV is applied to slider 110b1, resulting in a potential difference of −200 mV between the −200 mV voltage on magnetic disk 1201 and the −400 mV voltage applied to slider 110b1. This results in an electrostatic attraction force between the slider and the magnetic disk, as indicated by the downward arrow pointing from slider 110b1 toward disk 120. This electrostatic force affects the flying height of slider 110b1 above magnetic disk 1201, having a flying height FH1.

[0022] In the center example shown in FIG. 2A, a voltage of −200 mV is applied to slider 110b2, resulting in a 0 mV potential difference between the −200 mV voltage on magnetic disk 1202 and the −200 mV voltage applied to slider 110b2. This results in little or no electrostatic attraction between the slider and the magnetic disk. At this matched voltage, conventionally referred to as OIV, slider 110b2 will have a flying height of its maximum flying height FH2. This flying height is represented by FH2 at the maximum of the curve in FIG. 2B, which is a graph showing the change in flying height of slider 110b as the IVC voltage applied to slider 110b is changed. As shown in FIG. 2B, the delta flying height measured in picometers (pm) increases from FH1 with an IVC voltage of −400 mV applied to slider 110b1 to the maximum flying height with an offset of 0 pm.

[0023] In the rightmost example shown in Figure 2A, a voltage of +200 mV is applied to slider 110b3, resulting in a 400 mV potential difference between the -200 mV voltage at magnetic disk 1203 and the 200 mV voltage applied to slider 110b3. This results in a stronger electrostatic attractive force between the slider and the magnetic disk, as indicated by the downward arrow from slider 110b3 to magnetic disk 1203. This attractive force results in a reduced flying height FH3, which is also shown at an IVC voltage of 200 mV in the curve of Figure 2B, resulting in a larger magnitude of delta flying height from FH2.

[0024] As described above, the present disclosure aims to not only apply an IVC voltage to the slider to improve the usable life of the slider, but also to maintain a target offset voltage between the disk voltage and the IVC voltage to keep the electrostatic attraction within a safe range to reduce the risk of undesired contact between the slider and the disk and / or the accumulation of lubricant from the disk surface to the slider. The IVC voltage applied to the slider can be controlled to provide a voltage that is lower than the determined disk voltage by the target offset voltage. In some implementations, the target offset voltage can have a magnitude within a range of 100 mV to 700 mV such that the IVC voltage applied to the slider is 100 mV to 700 mV lower than the disk voltage. For example, an IVC voltage can be applied to the slider to provide an interface voltage (i.e., a potential difference between the slider voltage and the disk voltage) between the slider and the disk that substantially matches the target offset voltage of −600 mV, thereby extending the life of the slider while maintaining a relatively safe flying height.

[0025] 3 is a block diagram of slider 110b coupled to slider bias voltage generator 315 in R / W IC 305, in accordance with one or more embodiments. Slider bias voltage generator 315 functions as an IVC circuit, generating a direct current (DC) bias voltage through an existing signal path to elements and / or structures of slider 110b, which in the example of FIG. 3 is the signal path to embedded contact sensor (ECS) 308.

[0026] 3, slider 110b comprises a conductive body 330 and includes a write element (WE) 302, a read element (RE) 304, a heater element (HE) 306, an ECS 308, and an energy-assisted writer (EAW) 310. In some implementations, EAW 310 can have a HAMR, MAMR, or ePMR configuration to improve magnetic writing on the disk.

[0027] In Figure 3, the slider bias voltage generator 315 is shown as part of the R / W IC 305, which may form part of the circuitry 166 of the controller 170 in Figure 1. In other implementations, the slider bias voltage generator 315 may form part of other circuitry of the DSD 100 that is located external to the controller 170 in Figure 1. For example, the slider bias voltage generator 315 may, in some implementations, be included as part of the AE module 160 of Figure 1 that is attached to the carriage 134.

[0028] Signal paths exist between the R / W IC 305 and each of the WE 302, RE 304, HE 306, ECS 308, and EAW 310. The R / W IC 305 includes multiple R / W IC input / outputs (I / O) 312. The I / O 312 may include, for example, pads for electrically connecting to corresponding pads on the top of the slider 110b via existing signal paths. The R / W IC input / outputs 312 in FIG. 3 include write+ (W+) and write- (W-), read+ (R+) and read- (R-), heater element control+ (H+) and ground (G), ECS+ and ECS-, and EAW+ and EAW-.

[0029] The WE 302 may include a writer coil, which is part of the writer, which includes the main pole, a trailing magnetic shield, and a return pole 258 connected to the trailing shield. The main pole is exposed at the GBS of the slider 110b and faces the disk. Current flowing through the WE 302 generates a magnetic field that emanates from the tip of the main pole, reversing the magnetization of magnetic regions on the disk to form recorded bits. The WE 302 is connected to write head contact pads W+ and W− on the slider 110b. The return pole is positioned to return magnetic flux from the disk to the writer structure, completing the magnetic circuit. A magnetic trailing shield is typically positioned between the main pole and the return pole to help focus the magnetic flux emanating from the main pole.

[0030] RE 304 may include a read sensor, typically a magnetoresistive sensor, located between two soft magnetic shields and connected to contact pads R+, R− on slider 110b. RE 304 provides a read signal to R / W IC 305, which is used to read data stored on the disk.

[0031] The HE 306 is controlled by a TFC device (not shown) connected to the HE 306 at pads H+ and G on the slider 110b. By applying a current to the HE 306, the surrounding slider material expands in response to the heat generated by the HE 306, causing the slider 110b to bulge toward the disk, thus reducing the flying height. This reduced flying height can be controlled to achieve greater data storage density when writing data and to reduce flying height variation between writing and reading data. During a write operation, the heat from the HE 306 moves the writer's main pole and trailing shield closer to the disk 120 to allow the written magnetic bits to be positioned closer to each other on the disk. In this regard, the HE 306 and its associated TFC can be a form of EAMR, which can increase degradation of the slider 110b.

[0032] The ECS 308 may include a metal strip located at the GBS of the slider 110b and connected to contact pads ECS+ and ECS- on the slider 110b. The resistance of the ECS changes with temperature and can be used to detect slider-disk contact when the slider temperature suddenly rises due to frictional heat from the disk.

[0033] In some implementations, the ECS signal or the read signal from the RE 304 can be used to determine the voltage to apply to the slider by indirectly measuring the slider flying height. For example, a series of input voltages within a voltage range (e.g., within voltage limits 20 and 22 in FIG. 2B, or 1 V to −1 V) can be applied by the slider bias voltage generator 315 while the slider 110b flies over the disk. The head-disk spacing signal is then monitored by the DSD 100's circuitry (e.g., the R / W IC 305) from the ECS 308 or the RE 304 using a Wallace spacing loss signal or dual harmonic sensing, as described in U.S. Patent Application Publication No. 2014 / 0240871, which is assigned to the present applicant and incorporated herein by reference. Based on the relationship between the interval signal value and the series of input voltages, an IVC operating point or IVC voltage setting (e.g., IVC voltage setting 14 in FIG. 1) for the voltage applied to the slider is identified corresponding to the target offset voltage (e.g., target offset voltage 12 in FIG. 1).

[0034] 3, where the IVC is provided through the ECS, slider 110b includes resistive components R1 and R2, which are coupled between the Slider Body Connection (SBC) and each leg of the signal path between the ECS and the R / W IC 305. This provides a common-mode signal path that couples the applied voltage or slider bias voltage to slider 110b. In this connection scheme, the ECS common-mode voltage V ECS-CM is (V ECS- +V ECS+) / 2 and can be used to control the potential of slider 110b relative to the disk.

[0035] 3 illustrates an embodiment in which the existing signal path is an ECS signal path, the existing signal path can include any of a write signal path, a read signal path, a heater element control signal path, an energy-assisted writer path, or an ECS path. By "existing signal path," we mean that a conventional existing signal path, such as a read path, a write path, a heater element control path, an energy-assisted signal path, or an ECS path, is utilized to couple the bias voltage generator 315 to the slider 110b. The existing signal path may be slightly modified, such as by including components such as a capacitor, a coupling to a slider body connection, and / or one or more resistors, but a separate, dedicated signal path for coupling the slider IVC voltage from the slider bias voltage generator 315 to the slider 110b is not required. The existing signal path is primarily used to carry other signals (e.g., read data signals, write data signals, heater element control signals, energy-assisted signals, or ECS signals) between the slider and electronics external to the slider. However, at least sometimes, other signals and the slider bias voltage are simultaneously carried and integrated with one another on the same signal path within the slider. Thus, this existing signal path may carry the IVC voltage to slider 110b in an "integral manner" along with other signals being carried to or from the slider on the same signal path. In other implementations, a dedicated signal path may be used to apply the voltage for the IVC to the slider.

[0036] In some implementations, the existing signal and / or IVC voltage is applied through a common-mode voltage on a pair of signal lines. The IVC can use a programmable IVC voltage setting (e.g., IVC voltage setting 14 in FIG. 1 ) to control the IVC voltage generation. As discussed in more detail below, the IVC voltage setting is determined to provide a target potential difference between the slider and the disk (e.g., target offset voltage 12 in FIG. 1 ), which provides a voltage less than the disk voltage to protect slider components while ensuring that the potential difference between the disk and the slider is not so large that it could cause excessive attraction between the slider and the disk. In some implementations, once the IVC voltage setting is determined, well-known circuit methods are utilized to transfer the digital setting to an analog voltage reference, which is then used to generate the IVC voltage.

[0037] As mentioned above, slider 110b includes an energy-assisted writer 310 that helps increase the amount of data that can be magnetically written to the disk by using, for example, HAMR, MAMR, or ePMR. Application of an IVC voltage to the slider or a portion of the slider can help deactivate or electrostatically encapsulate the slider or a portion thereof that is more susceptible to further degradation caused directly or indirectly by these EAMR techniques. In some implementations, the IVC voltage applied to the slider can be a less negative voltage than the disk voltage, and the disk voltage can be a positive disk voltage or a more negative disk voltage than the more negative IVC voltage applied to the slider.

[0038] In the case of HAMR, the EAW 310 may include a waveguide, a near-field transducer (NFT), and an NFT temperature sensor (NTS). In such a case, a laser is optically coupled to the waveguide, which guides light from the laser to the NFT to create a strong near-field pattern that heats the recording layer of the disk and temporarily reduces the coercivity (i.e., the magnetic field required to switch grains or bits in the recording layer). Examples of HAMR writer configurations can be found, for example, in U.S. Pat. No. 10,910,007, which is assigned to the present applicant and incorporated herein by reference.

[0039] However, the usable life of an NFT can be adversely affected by excessive heating of the NFT, which can cause the NFT to diffuse until the tip of the NFT becomes rounded and the recording degrades. To reduce the diffusion or degradation of the NFT, a voltage, such as a negative voltage, can be applied to the NFT via the SBC. In other implementations, the voltage that can be applied via the NTS can be connected to the EA+ and EA- pads. In such implementations, the EA+ and EA- pads would also provide an existing signal path for measuring the temperature of the NFT to calibrate the NFT.

[0040] In the case of MAMR, the EAW 310 may include a spin torque oscillator (STO) in the write gap between the main pole and the writer's trailing shield. In such cases, the STO generates a high-frequency oscillating auxiliary magnetic field that is applied to grains in the disk's recording layer to temporarily facilitate writing data. Examples of MAMR writer configurations can be found, for example, in U.S. Pat. No. 10,650,850, which is assigned to the present applicant and incorporated herein by reference.

[0041] However, the STO of a MAMR writer can oxidize due to degradation of the slider protective overcoat. To reduce STO oxidation, a voltage, such as a negative voltage, can be applied to the STO via the SBC. In other implementations, the voltage can be applied through the main and return poles of the writer, which can be connected to the EA+ and EA− pads. In such implementations, the EA+ and EA− pads would also provide an existing signal path for actuating the STO by supplying current through the main pole, STO, trailing shield, and return pole, as discussed for MAMR.

[0042] For ePMR, the EAW 310 may include a conductive or metal layer in the write gap between the write pole and the writer's trailing shield. In such a case, current may be supplied through the conductive layer via connections on the writer's main and return poles to generate a circular magnetic field that is substantially transverse to the magnetization of the write pole when writing data, thereby increasing magnetization reversal and improving the consistency of the write field and increasing the signal-to-noise ratio. Examples of ePMR writer configurations can be found, for example, in U.S. Pat. No. 10,679,650, which is assigned to the present applicant and incorporated herein by reference.

[0043] However, the conductive layer of the ePMR writer can oxidize due to degradation of the slider protective overcoat. To reduce oxidation of the conductive layer, a voltage, such as a negative voltage, can be applied to the conductive layer via the SBC. In other implementations, the voltage can be applied via the main and return poles of the writer, which can be connected to the EA+ and EA− pads. In such implementations, the EA+ and EA− pads would also provide an existing signal path for current flowing through the conductive layer, as discussed above for ePMR.

[0044] Those skilled in the art will understand with reference to this disclosure that other implementations of slider bias voltage generator 315 and / or slider 110b may differ from Figure 3. For example, other implementations may include an IVC voltage applied across a different connection than ECS+ or ECS-, or may not include some connections such as for HE 306 or EAW 310.

[0045] FIG. 4 is a graph illustrating the voltage applied to the slider over time to maintain a target offset voltage between the slider and the disk voltage, according to one or more embodiments. As shown in the example of FIG. 4, the disk voltage, indicated by the dashed line, varies over time. The IVC voltage setting 14 adjusts over time to track changes in the disk voltage while maintaining a target offset voltage 12, or potential difference between the slider and the disk, which is lower than the disk voltage by the target offset voltage. In some implementations, the magnitude of the target offset voltage 12 can be a fixed value within a range of 100 mV to 700 mV, preferably within a range of 200 mV to 600 mV. The magnitude of the target offset voltage 12 can depend on the physical geometry of the slider and / or disk, such as the slider's operating flying height setting or specification, to provide a relatively large negative voltage to the slider while protecting it from excessive electrostatic attraction that could cause contact between the disk and the slider.

[0046] During the initial time period 16, a default IVC voltage setting may be used. In some implementations, the default IVC voltage setting may be based on measurements made at a factory for the DSD or a particular model of DSD. As discussed in more detail below with reference to the initial slider voltage setting process of FIG. 6, the initial time period 16 may be used to determine the disk voltage of the magnetic disk a predetermined number of times (e.g., eight times during the first eight hours of operation). After determining the disk voltage the predetermined number of times, the IVC voltage setting may be adjusted from the default IVC voltage setting based at least in part on the disk voltage measured or determined during the initial time period.

[0047] The DSD may then periodically (e.g., every 8 hours of operation) update its measurement or determination of the disk voltage and determine a new IVC voltage setting or maintain the same IVC voltage setting such that the IVC voltage setting 14 remains less than the measured or determined disk voltage by approximately the target offset voltage 12. Notably, this can often allow a lower voltage to be applied to the slider than would otherwise be used by the default voltage setting, which can further improve the usable life of the slider and its components.

[0048] As shown in the example of Figure 4, the upper and lower voltage limits 22 and 20 may limit the range of the IVC voltage setting 14. These limits may result from circuit limitations of the DSD in some implementations and / or may be set to safely avoid contact between the slider and the disk due to electrostatic attraction based on an estimated range of disk voltage fluctuations. Figure 5, discussed in more detail below, provides an example of setting the upper voltage limit 22 based on an estimated maximum disk voltage. In particular, the IVC voltage setting 14 is maintained at a negative voltage (i.e., less than 0 mV) in Figure 4 to extend the life of the slider.

[0049] 5 is a graph showing the average voltage applied to sliders in a DSD over a long time frame to maintain a target offset voltage and average disk voltage between sliders, according to one or more embodiments. In some implementations, the mean or average disk voltage can represent the disk voltage determined for many disks in a single DSD. In other implementations, the mean or average disk voltage can represent the disk voltage determined for a large set of DSDs, such as a particular model of DSD.

[0050] As shown in Figure 5, the time scale is in years and the average disk voltage has a gradually increasing voltage over time. This upward drift in disk voltage causes a corresponding upward drift in the average IVC voltage setting, so that the target offset voltage 12 is generally maintained between the average disk voltage and the average ICV voltage setting.

[0051] In some implementations, the upper voltage limit 22 for an IVC voltage setting (e.g., IVC voltage setting 14 in FIG. 1) can be determined based on more than six standard deviations of the average disk voltage to reflect the worst-case or highest estimated disk voltage and ensure a safe potential difference between the disk and slider when the IVC voltage is at the upper voltage limit 22, preventing contact between the disk and slider due to too large a potential difference.

[0052] This limit on the potential difference between the upper limit voltage 22 and the highest estimated disk voltage can be greater than the target offset voltage 12, as shown in Figure 5. For example, the target offset voltage 12 can be set at 400 mV, and the difference between six standard deviations above the average disk voltage at year 7 and the upper limit voltage 22 at year 7 can be 500 mV. This potential difference between the upper limit voltage and the highest estimated disk voltage at a particular time (e.g., at year 7) can also include a safety factor, such as if a potential difference of 600 mV would cause the slider to contact the disk surface, but the upper limit voltage 22 is set for a potential difference of 500 mV below six standard deviations above the average disk voltage at a particular time, e.g., at year 7.

[0053] Those skilled in the art will understand with reference to this disclosure that other implementations of setting the upper voltage limit or estimating the maximum disk voltage may differ. For example, other implementations may use a different number of standard deviations above the mean disk voltage to estimate the maximum disk voltage, or may use a different time point to determine the upper voltage limit, such as the fifth year of operation as opposed to the seventh year of operation. Additionally, the voltage values ​​for the mean disk voltage, target offset voltage, and corresponding average IVC voltage setting may differ in other implementations.

[0054] Example Process

[0023] Figure 6 is a flowchart of an initial slider voltage setting process according to one or more embodiments. The process of Figure 6 may be implemented, for example, by circuit 166 of DSD 100 that executes IVC module 10 of Figure 1. In this regard, circuit 166 and / or other circuitry of DSD 100, such as R / W IC 305 or slider bias voltage generator 315 of Figure 3, may, in some implementations, comprise means for performing the functions of the initial slider voltage setting process of Figure 6.

[0055] In block 602, the circuitry applies a starting default voltage to the slider. The default voltage may correspond to a fixed value (e.g., −600 mV) based on, for example, tests performed on other DSDs and / or factory testing of the particular DSD.

[0056] In block 604, the circuit determines the disk voltage or OIV a predetermined number of times within a predetermined time period. This time period may correspond to time period 16 in the example of FIG. 4. During this time period, the circuit may measure or determine the disk voltage at fixed intervals, such as every 6 or 8 hours of operation. The disk voltage may be determined by indirectly measuring the slider's flying height, such as by monitoring a head-disk spacing signal using a Wallace separation loss signal or double harmonic sensing. For example, the head-disk spacing signal may be monitored, and then a series of input voltages within a range of voltages may be applied by a slider bias voltage generator while the slider is flying over the disk to determine a voltage that provides a maximum flying height and a corresponding minimum amplitude for a signal, such as a read signal or ECS signal. In some implementations, the head-disk spacing signal may be monitored during one revolution of the disk. The voltage corresponding to the maximum flying height generally provides zero potential difference between the slider and the disk and thus represents the disk voltage or conventional OIV.

[0057] At block 606, a first voltage to be applied to the slider after using the default voltage for a predetermined time period is determined based at least in part on the disk voltage determined at block 608. In some implementations, a filter may be applied to a predetermined number of the determined voltages to remove any voltages outside the upper and / or lower voltage limits, and the remaining predetermined voltages may be averaged to provide a filtered average disk voltage. A target offset voltage (e.g., 400 mV) may then be subtracted from this filtered average voltage to provide the first voltage to be applied to the slider.

[0058] In block 608, an indication of the determined first voltage can be stored in non-volatile memory of the DSD, such as NVM 174 of FIG. 1. If the DSD is powered off, the stored indication of the first voltage can be used as the IVC voltage to be applied to the slider after the DSD is powered back on. Circuitry of the DSD can also apply the first voltage to the slider in block 608, for example, via slider bias voltage generator 315 of FIG. 3. As discussed in more detail below with reference to FIG. 7, subsequent measurements or determinations of disk voltage can occur over time, and the voltage applied to the slider can be adjusted from the first voltage to compensate for changes in disk voltage and attempt to maintain a target offset voltage between the slider and disk.

[0059] Those skilled in the art will understand with reference to this disclosure that other methods of determining the first or initial voltage setting are possible. For example, in other implementations, the determination of the first voltage to be applied to the slider may occur after a single measurement or determination of the disk voltage, as opposed to requiring a predetermined number of measurements or determinations of the disk voltage over a predetermined time period. Additionally, those skilled in the art will understand with reference to this disclosure that the process of FIG. 6 can be performed for each slider in a DSD. In this regard, the voltage on either side of the magnetic disk may vary.

[0060] 7 is a flowchart of an iterative slider voltage setting process according to one or more embodiments. The process of FIG. 7 can be performed, for example, by circuit 166 of DSD 100 executing IVC module 10 of FIG. 1. In this regard, circuit 166 and / or other circuitry of DSD 100, such as R / W IC 305 or slider bias voltage generator 315 of FIG. 3, can, in some implementations, comprise means for performing the functions of the iterative slider voltage setting process of FIG. 7. The process of FIG. 7 can be performed after an initial determination of the voltage to apply to the slider, such as after the first slider voltage setting process of FIG. 6.

[0061] The disk voltage or conventional OIV for the magnetic disk is determined in block 702. The disk voltage can be determined by indirectly measuring the flying height of the slider, such as by monitoring the head-disk spacing signal using a Wallace separation loss signal or double harmonic sensing, as discussed above.

[0062] In block 704, a voltage to be applied to the slider is determined based on the difference between the disk voltage determined in block 702 and the target offset voltage. Referring to the example of FIG. 2A discussed above, the disk voltage may be determined to be −200 mV, corresponding to FH2 having the maximum flying height. If the target offset voltage is 400 mV, the voltage applied to the slider would be −600 mV to obtain a target offset voltage lower than the determined disk voltage.

[0063] In block 706, the voltage applied to the slider is changed from the currently applied voltage to the voltage determined in block 704. An indication of the newly applied voltage can be stored in non-volatile memory of the DSD in block 708. If the DSD is powered off, the stored voltage indication can be used as the IVC voltage to be applied to the slider after the DSD is powered back on. The process of Figure 7 can then be repeated after a predetermined period of time (e.g., after 8 hours of operation) by returning to block 702 to again determine the disk voltage of the magnetic disk.

[0064] Those skilled in the art will understand with reference to this disclosure that other implementations of the iterative slider voltage setting process of Figure 7 may vary. For example, in some implementations, the voltages applied to the sliders may not be stored in the DSD's non-volatile memory, such that after a restart of the DSD, default voltages may be used instead until the process of Figure 7 is performed. Additionally, those skilled in the art will understand with reference to this disclosure that the process of Figure 7 may be performed for each slider within a DSD.

[0065] The above-described system and method for applying a voltage to the slider that is less than the disk voltage can increase the lifespan of the slider and its components by applying the lowest voltage to the slider within the safety margin provided by the target offset voltage to reduce the possibility of contact between the slider and the disk. In addition, the voltage can be adjusted over the operating life of the DSD to continue to provide the lowest possible voltage within the safety margin provided by the target offset voltage, even as the disk voltage changes over time.

[0066] Other embodiments Those skilled in the art will appreciate that the various illustrative logical blocks, modules, and processes described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or a combination of both. Furthermore, the processes may be embodied on a computer-readable medium that causes a processor or controller circuitry to realize or perform particular functions.

[0067] To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, and modules have been described generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Those skilled in the art may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure.

[0068] The various illustrative logical blocks, units, modules, processing circuits, and control circuits described in connection with the examples disclosed herein may be implemented with or performed by a general-purpose processor, a GPU, a DSP, an ASIC, an FPGA or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof, designed to perform the functions described herein. A general-purpose processor may be a microprocessor, but alternatively, the processor may be any conventional processor, controller, microcontroller, or state machine. Processor or controller circuitry may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, multiple microprocessors, an SoC, one or more microprocessors in conjunction with a DSP core, or any other such configuration.

[0069] The activities of a method or process described in connection with the examples disclosed herein may be embodied directly in hardware, in a software module executed by a processor or controller circuitry, or a combination of the two. The steps of a method or algorithm may also be performed in an alternate order to that provided in the examples. The software modules may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, a hard disk, removable media, optical media, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor or controller circuitry such that the processor or controller circuitry can read information from and write information to the storage medium. Alternatively, the storage medium may be integral to the processor or controller circuitry. The processor or controller circuitry and the storage medium may reside in an ASIC or SoC.

[0070] The foregoing description of the disclosed exemplary embodiments is provided to enable any person skilled in the art to make or use embodiments of the present disclosure. Various modifications to these examples will be readily apparent to those skilled in the art, and the principles disclosed herein may be applied to other examples without departing from the spirit and scope of the present disclosure. The described embodiments are to be considered in all respects as illustrative and not restrictive. Additionally, the use of language in the following claims of the form "at least one of A and B" should be understood to mean "A only, B only, or both A and B."

Claims

1. A data storage device (DSD), comprising: A magnetic disk, a slider including a writer configured to magnetically write data to the magnetic disk; and circuitry configured to apply a voltage to the slider to provide a target offset voltage between the slider and the magnetic disk, wherein the voltage applied to the slider is different from a disk voltage of the magnetic disk.

2. 10. The DSD of claim 1, wherein the voltage applied to the slider differs from the disk voltage by at least 100 mV.

3. The circuit determining a first disk voltage of the magnetic disk; 10. The DSD of claim 1, further configured to determine the voltage to be applied to the slider based on a difference between the determined first disk voltage and the target offset voltage.

4. The circuit determining a second disk voltage of the magnetic disk at a time subsequent to the determination of the first disk voltage; determining a new voltage to be applied to the slider based on a difference between the determined second disk voltage and the target offset voltage; 4. The DSD of claim 3, further configured to change the voltage applied to the slider to the determined new voltage.

5. 10. The DSD of claim 1, wherein the circuitry is further configured to store an indication of the applied voltage in a non-volatile memory of the DSD.

6. 2. The DSD of claim 1, wherein the magnitude of the target offset voltage is in the range of 100 mV to 700 mV.

7. 10. The DSD of claim 1, wherein the voltage applied to the slider is limited by at least one of a lower threshold and an upper threshold.

8. the writer is an energy-assisted writer configured to use microwave-assisted magnetic recording (MAMR), energy-assisted perpendicular magnetic recording (ePMR), or thermally-assisted magnetic recording (HAMR); 10. The DSD of claim 1, wherein the voltage applied to the slider reduces degradation of the slider caused by operation of the energy-assisted writer.

9. The circuit applying an initial default voltage to the slider; determining a disk voltage of the magnetic disk at predetermined times within a predetermined time period; 10. The DSD of claim 1, further configured to determine a first voltage to be applied to the slider based at least in part on a predetermined number of the determined disk voltages.

10. 1. A method for controlling a voltage applied to a slider of a data storage device (DSD), comprising: determining a first disk voltage of a magnetic disk of the DSD; determining a voltage to be applied to the slider based on the determined first disk voltage so as to adjust a potential difference between the slider and the magnetic disk to a non-zero target offset voltage; and applying the determined voltage to the slider.

11. The method of claim 10 , wherein the target offset voltage has a magnitude of at least 100 mV.

12. The method of claim 10 , wherein the determined voltage is less than the first disk voltage of the magnetic disk.

13. 11. The method of claim 10, further comprising determining the voltage to be applied to the slider based on a difference between the determined first disk voltage and the target offset voltage.

14. determining a second disk voltage of the magnetic disk at a time after the determination of the first disk voltage; determining a new voltage to be applied to the slider based on a difference between the determined second disk voltage and the target offset voltage; The method of claim 10 , further comprising: changing the voltage applied to the slider to the determined new voltage.

15. 11. The method of claim 10, further comprising storing an indication of the determined voltage in a non-volatile memory of the DSD.

16. The method of claim 10, wherein the target offset voltage magnitude is in the range of 100 mV to 700 mV.

17. The method of claim 10 , wherein the determined voltage has a negative value.

18. the slider further includes an energy-assisted writer configured to use microwave-assisted magnetic recording (MAMR), energy-assisted perpendicular magnetic recording (ePMR), or thermally-assisted magnetic recording (HAMR); The method of claim 10 , wherein the determined voltage applied to the slider reduces degradation of the slider caused by operation of the energy-assisted writer.

19. applying an initial default voltage to the slider; determining a disk voltage of the magnetic disk a predetermined number of times within a predetermined time period; 11. The method of claim 10, further comprising: determining a first voltage to be applied to the slider based at least in part on a predetermined number of the determined disk voltages.

20. A data storage device (DSD), comprising: A magnetic disk, a slider including a writer configured to magnetically write data to the magnetic disk; means for applying a voltage to the slider to provide a target offset voltage between the slider and the magnetic disk, wherein the voltage applied to the slider is different from a disk voltage of the magnetic disk.

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