Light-emitting device

Abstract

To provide a semiconductor device capable of detecting a minute current with high accuracy.SOLUTION: A semiconductor device includes a first circuit, a second circuit, a first transistor, and a second transistor, a first analog signal is input to the first circuit through the first transistor, a second analog signal is input to the second circuit through the second transistor, the first analog signal includes a value of a first current, the second analog signal includes a value of a second current, the first analog signal is converted into a first digital signal, the second circuit generates a second digital signal in accordance with the first digital signal, the first circuit converts the second analog signal into a third digital signal in accordance with the second digital signal, and the first or second transistor includes an oxide semiconductor in a channel.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One embodiment of the present invention relates to a semiconductor device, a display device, or an electronic device. The embodiments include, for example, circuits using semiconductors, processing circuits, memory circuits, driving methods thereof, or the like. This invention relates to methods for producing these. [Background technology]

[0002] There are various circuit configurations for the pixels of active matrix display devices that use light-emitting elements. Generally, a pixel includes a light emitting element, a transistor that controls the input of a video signal to the pixel, and a transistor, and a transistor that controls the current supplied to the light-emitting element (drive transistor ) is provided. The drain current flowing through the driving transistor is supplied to the light emitting element. By supplying a current to the light emitting element, the light emitting element emits light at a brightness corresponding to the value of the drain current. The drain current of the transistor is controlled by the voltage of the video signal.

[0003] Therefore, the electrical characteristics (threshold voltage) of the driving transistors are different between the multiple pixels that make up the screen of the display device. If there are variations in the voltage, field effect mobility, etc., even if a video signal of the same voltage is supplied, This causes variations in the brightness of the optical elements. Electrical characteristics of the drive transistors among multiple pixels The variation in the brightness is one of the causes of the degradation of the display quality of the display device.

[0004] On the other hand, active matrix display devices are being promoted to have more pixels in order to achieve higher resolution. Therefore, one display device has hundreds of thousands to tens of millions of pixels. For example, the number of pixels is If the resolution is Full-HD, it is 1,366 x 768 x 3 (RGB) = 1,049.0 88, and for 8k4k (Super Hi-Vision), it is 7,680 x 4,320 x 3 (RGB) = 33,177,600. Therefore, we investigated the electrical characteristics of the drive transistor. Therefore, it has been proposed to correct the luminance of the light-emitting element (for example, Patent Document 1).

[0005] In order to accommodate the increasing number of gradations and high definition of the display unit, the driver circuit of the display device, especially the A dedicated IC (driver IC) is used for the driver circuit (see, for example, Patent Document See 2).

[0006] The pixel circuit or driver circuit of the display device uses a transistor (field effect transistor) using a semiconductor thin film. A field effect transistor (FET) or thin film transistor (TFT) is used. In recent years, oxide semiconductors have become popular as semiconductor thin films that can be used in these transistors. This has attracted attention (Patent Document 3). [Prior art documents] [Patent documents]

[0007] [Patent Document 1] Japanese Patent Application Laid-Open No. 2009-265459 [Patent Document 2] Japanese Patent Application Laid-Open No. 2007-286525 [Patent Document 3] Japanese Patent Application Laid-Open No. 2007-123861 Summary of the Invention [Problem to be solved by the invention]

[0008] The circuit for acquiring the electrical characteristics of the pixel's driving transistor is It handles very small current signals of around 100 nA. Therefore, when verifying the operation of this circuit, It is desirable to verify this using such a minute current signal.

[0009] In view of this, one embodiment of the present invention provides a semiconductor device capable of detecting a minute current with high accuracy. Another object of one embodiment of the present invention is to provide a power supply that can supply a minute current with low power consumption. Another object of the present invention is to provide a semiconductor device capable of detecting a signal. One aspect of the present invention is to provide a novel semiconductor device or a novel method of operating a semiconductor device. It shall be one of the following.

[0010] It should be noted that the description of multiple problems does not preclude the existence of each problem. The embodiment does not necessarily solve all of these problems. These problems are also clearly evident from the description of the present invention, such as drawings and claims. This could be a form of challenge for Ming. [Means for solving the problem]

[0011] One aspect of the present invention is a semiconductor device including a first circuit, a second circuit, a first transistor, and a second transistor. The first circuit is a semiconductor device having a first transistor. The first circuit receives an analog signal from the second transistor. A first analog signal is input. The first analog signal includes a value of the first current. A second analog signal is input. The signal includes a value of the second current. The first circuit converts the first analog signal into a first digital signal. The second circuit generates a second digital signal in response to the first digital signal. The first circuit converts the second analog signal into a third digital signal in response to the second digital signal. The first or second transistor has a channel formation region formed of an oxide semiconductor. include.

[0012] In the above embodiment, the second current is a current flowing through a pixel of a display device.

[0013] In the above embodiment, the first circuit includes an integrating circuit, a comparator, and a counter. It is preferable.

[0014] In the above aspect, the second circuit preferably includes a successive approximation register.

[0015] In the above embodiment, the oxide semiconductor is selected from the group consisting of indium, zinc, M (M is Al, Ga, Ge, Y , Zr, Sn, La, Ce or Hf).

[0016] One embodiment of the present invention is an electronic device including the semiconductor device described in the above embodiment and a display device. do.

[0017] In this specification, the ordinal numbers "first," "second," and "third" are used to indicate the mixture of constituent elements. In order to avoid confusion, they may be added, and in that case, they are not limited in number and order. It is not limiting.

[0018] In this specification, a semiconductor device is a device that utilizes semiconductor characteristics, and is a semiconductor element ( It refers to a circuit that includes a semiconductor (transistor, diode, etc.), or a device that has such a circuit. It refers to any device that can function by utilizing the characteristics of the device. For example, an integrated circuit, a device equipped with an integrated circuit, The chip is an example of a semiconductor device. Electronic devices and the like may themselves be semiconductor devices or may include semiconductor devices.

[0019] A transistor has three terminals called the gate, source, and drain. The source is a node that functions as a control node that controls the conduction state of a transistor. The two input / output nodes that function as the source or drain are determined by the type of transistor and the terminals. Depending on the level of the applied potential, one side becomes the source and the other side becomes the drain. In this specification, the terms source and drain can be used interchangeably. In addition, in this specification and the like, the two terminals other than the gate may be referred to as the first terminal and the second terminal. There is a match.

[0020] A node can be a terminal, wiring, electrode, conductor, or impurity region depending on the circuit configuration, device structure, etc. Terminals and the like can be referred to as nodes. .

[0021] Voltage is the voltage between a certain potential and a reference potential (e.g., ground potential (GND) or source potential). Therefore, voltage can be replaced with electric potential. Therefore, even if it is described as ground potential, it does not necessarily mean 0 It may not mean V.

[0022] In this specification, the terms "film" and "layer" may be used interchangeably. These terms can be used interchangeably depending on the situation. For example, the term "conductive layer" In some cases, it may be possible to change the term "insulating film" to "conductive film." In some cases, it may be possible to change the term to "insulating layer."

[0023] The arrangement of each circuit block in the drawings is for the purpose of explanation and may differ from the actual arrangement. Even if a diagram shows that different circuit blocks realize different functions, in actual circuits or areas In some cases, the same circuit block may be provided so that different functions can be realized. The function of each circuit block in the drawings is specified for the purpose of explanation, and is not intended to be a single circuit. Even if shown as a circuit block, in the actual circuit or area, it is performed in one circuit block. In some cases, processing is provided to be performed by multiple circuit blocks.

[0024] In addition, when it is explicitly stated in this specification that X and Y are connected, is when X and Y are electrically connected and when X and Y are functionally connected. and the case where X and Y are directly connected are considered to be disclosed in this specification and the like. Therefore, the present invention is not limited to predetermined connection relationships, for example, connection relationships shown in drawings or text. Connections other than those shown in the drawings or text are also considered to be described in the drawings or text. X and Y are the object (e.g., device, element, circuit, wiring, electrode, terminal, conductive film, layer, etc.) (etc.)

[0025] In addition, in the drawings, the size, thickness of layers, or areas may be exaggerated for clarity. Therefore, the drawings are not necessarily limited to the scale. The above is a formula and is not limited to the shapes or values ​​shown in the drawings. Variations in signals, voltages, or currents due to timing differences, or variations in signals, voltages, Alternatively, it is possible to include variations in current. [Effects of the Invention]

[0026] According to one embodiment of the present invention, a semiconductor device capable of detecting a minute current with high accuracy is provided. According to one embodiment of the present invention, it is possible to detect a minute current with low power consumption. It is possible to provide a semiconductor device that can emit light. As a result, it is possible to provide a novel semiconductor device or a novel method for operating the semiconductor device. do.

[0027] It should be noted that the description of multiple effects does not preclude the existence of other effects. The embodiment does not necessarily have to have all of the effects exemplified. Problems, effects, and novel features other than those described above can be understood from the description and drawings of this specification. The facts will become clear by themselves. [Brief explanation of the drawings]

[0028] [Figure 1] FIG. 1 is a circuit diagram illustrating a configuration example of a semiconductor device. [Figure 2] FIG. 1 is a circuit diagram illustrating a configuration example of a semiconductor device. [Figure 3] 1 is a timing chart showing an example of the operation of a semiconductor device. [Figure 4] FIG. 1 is a circuit diagram illustrating a configuration example of a semiconductor device. [Figure 5] FIG. 10 is a flow diagram illustrating an example of operation of a semiconductor device. [Figure 6] FIG. 1 is a circuit diagram illustrating a configuration example of a semiconductor device. [Figure 7] FIG. 1 is a circuit block diagram showing a configuration example of a display device. [Figure 8] FIG. 1 is an exploded perspective view showing a configuration example of a display device. [Figure 9] FIG. 2 is a plan view showing an example of the configuration of a display panel. [Figure 10] (A) Circuit diagram showing an example of pixel configuration, (B) timing chart showing an example of operation of the same. [Figure 11] FIG. 2 is a circuit diagram showing a configuration example of a monitor circuit. [Figure 12] FIG. 2 is a cross-sectional view showing a configuration example of a display panel. [Figure 13] 1A and 1B are a top view and a cross-sectional view illustrating a structural example of a transistor. [Figure 14] 1A and 1B are a top view and a cross-sectional view illustrating a structural example of a transistor. [Figure 15] 1A and 1B are diagrams illustrating examples of the configuration of electronic devices. [Figure 16] 1A and 1B are diagrams illustrating examples of the configuration of electronic devices. DETAILED DESCRIPTION OF THE INVENTION

[0029] The following describes an embodiment of the present invention. However, one embodiment of the present invention is not limited to the following description. and variations in form and details may be made without departing from the spirit and scope of the present invention. It will be readily apparent to those skilled in the art that modifications may be made thereto. The present invention is not to be construed as being limited to the description of the following embodiments.

[0030] The following embodiments can be combined as appropriate. When multiple configuration examples are shown, the configuration examples can be combined as appropriate.

[0031] In the drawings, identical elements or elements with similar functions, elements of the same material, or Elements formed at the same time may be given the same reference numerals, and repeated explanations thereof will be omitted. This may be the case.

[0032] In addition, when the same symbols are used, especially when it is necessary to distinguish them, the symbols should be marked with " When adding identification symbols such as "_1", "_2", "[n]", "[m, n]", etc. There is a match.

[0033] (Embodiment 1) In this embodiment, a semiconductor device according to one embodiment of the present invention will be described with reference to FIGS. Make it clear.

[0034] <<Configuration Example 1 of Semiconductor Device>> FIG. 1 is a circuit diagram showing a configuration example of a semiconductor device 10. The semiconductor device 10 includes a plurality of transistors. M1 (M1[1] to M1[N], where N is a natural number greater than or equal to 1) and a plurality of transistors M2 (M2[1] to M2[N]), an inverter 42, a plurality of ANDs 41, and a plurality of The circuit IF_CONV (IF_CONV[1] to IF_CONV[N]) and the circuit DC CS (Digital Calibration Control System) and A plurality of TRIBUF (tristate buffer circuits) 43 and a circuit SR (shift register ) and has.

[0035] In the following, the transistors M1 and M2 are assumed to be n-channel transistors. However, one aspect of the present invention is that the transistor M1 and the transistor M2 are p-channel. It is also applicable to the case of a diode-type transistor.

[0036] Signal I shown in Figure 1 MON (I MON [1]~I MON [N]) flows into the pixels of the display device. The semiconductor device 10 includes the value of the current (analog signal) that is transmitted as information. I MON into a digital signal and output it as the signal CMOUT.

[0037] Also, the signal I shown in Figure 1 TEST The reference current value (analog signal) is used as information. The semiconductor device 10 includes this signal I TEST Using this, signal I MON signal from It has a function to calibrate errors that occur when generating CMOUT.

[0038] Signal I TEST is input to the circuit IF_CONV via the transistor M1. Signal I MON is input to the circuit IF_CONV via the transistor M2. No. I MON , I TEST This is not just the current flowing into the circuit IF_CONV from external pixels. It is also possible to handle the current flowing from the circuit IF_CONV to an external pixel.

[0039] The signal input to the circuit IF_CONV is switched by turning on (conducting) the transistors M1 and M2. This can be done by controlling the on / off state of the transistors M1 and M2. The ON / OFF control of AND41 is performed by the signal TEST. is applied to the gate of transistor M1 via inverter 42, and Given to the gate of M2.

[0040] The circuit IF_CONV converts the input analog signal into a digital signal, OUT (signal OUT_1 to OUT_N) and output them.

[0041] The circuit SR is a shift register, and one of the signals OUT_1 to OUT_N is The signal SP and signal SCLK shown in Figure 1 are , and represent the pulse signal and clock signal input to the circuit SR.

[0042] The circuit SR outputs a plurality of signals SEL (SEL[1] to SEL[N]). When one of the signals L[1] to SEL[N] becomes a high level (hereinafter referred to as H level), The remaining N-1 signals become low level (L level). On the other hand, the signal SEL at the L level turns on the TRIBUF43. RIBUF43 is set to high impedance. In this way, the signal selected for the circuit SR is The signal OUT is output to the outside as a signal CMOUT.

[0043] For example, consider the case where the signal SEL[1] and the signal TEST are at H level. The gate of the transistor M1[1] is given a high-level potential, and the transistor M1[1 ] is turned on. Meanwhile, the gates of the transistors M2[1] to M2[N] are supplied with an L level The potential of the signal S is applied to the transistors M2[1] to M2[N], turning them off. EL[2] to SEL[N] become L level, and transistors M1[2] to M1[N] As a result, only transistor M1[1] is turned on, and signal I TEST but , which is input to the circuit IF_CONV[1].

[0044] For example, consider the case where the signal SEL[1] becomes H level and the signal TEST becomes L level. At this time, an L-level potential is applied to the gates of the transistors M1[1] to M1[N]. Therefore, transistors M1[1] to M[N] are turned off. An H-level potential is applied to the gates of transistors M2[1] to M2[N]. to M2[N] are turned on. As a result, the signal I MON [1]~I MON [N] is the The signals SEL are all at L level except for the signal SEL[1]. Therefore, only the signal OUT_1 is output to the outside as the signal CMOUT.

[0045] The circuit DCCS has the function of calibrating the conversion function of the circuit IF_CONV described above. When TEST goes high, the signal I TEST is input to the circuit IF_CONV, and the signal The signal OUT is input to the circuit DCCS.

[0046] Also, the circuit DCCS receives the signal I TEST is ideally converted to a digital signal. The DCCS circuit compares the signal OUT with the signal X and generates the The amount of calibration of the signal OUT is transmitted to the circuit IF_CONV based on the signal deviation. V is the signal I according to the determined calibration quantity. MON Converts the signal I into the signal OUT. MON is finally output to the outside as a signal CMOUT.

[0047] In addition to the above signals, the semiconductor device 10 also receives signals CLK1 and CLK2 from the outside. These signals are input to the circuit IF_CONV and the circuit DCCS, These are used to operate each circuit.

[0048] Although this embodiment shows an example in which 8-bit data is handled, the present invention is not limited to this. In addition, one aspect of the present invention is also capable of handling data of any k bits (k is a natural number equal to or greater than 1). It is possible.

[0049] In the semiconductor device 10, the transistor M1 is preferably a transistor with a small off-state current. The off-state current refers to the leakage current that flows when a transistor is off. Then, in an n-channel transistor, a voltage below the threshold is applied between the gate and source. When a voltage is applied to the gate and source of a p-channel transistor, a threshold voltage is applied between the gate and source. This refers to the leakage current that flows between the source and drain when a voltage greater than the applied voltage is applied. It represents:

[0050] For example, transistor M1[1] is on, and transistors M1[2] to M1[N] are off. Consider the case where transistors M1[2] to M1[N] are in parallel with transistor M1[1]. Since the transistors M1[2] to M1[N] are connected in a row, the off-state current of the transistors M1[2] to M1[N] is large. For example, signal I TEST The current flows to the outside via transistors M1[2] to M1[N]. It leaks out. Signal I TEST handles very small currents of 1 nA to several hundred nA. Therefore, even a small amount of leakage current has a large effect. [1], signal I TEST The current is not transmitted correctly and the circuit DCCS is not calibrated correctly. I can't.

[0051] Therefore, by using a transistor with a small off-state current as the transistor M1, The device 10 receives the signal I TEST Therefore, it becomes possible to detect the current value with high accuracy.

[0052] In addition, by using a transistor with a low off-state current as the transistor M1, 10 is a low power consumption signal I TEST It is possible to detect the current value.

[0053] The transistor M1 has a wider band gap than silicon in the channel formation region and is an intrinsic A semiconductor material having a carrier density lower than that of silicon may be used. For example, An oxide semiconductor is preferably used as the insulating film. The transistor has an extremely small off-state current.

[0054] In the semiconductor device 10, for example, elements other than the transistor M1 are made of, for example, Si or Si The transistor M1 is formed on a semiconductor substrate such as Ge, and an oxide semiconductor transistor is formed on the semiconductor substrate. It may also be formed of a transistor.

[0055] The transistor M2 as well as the transistor M1 has a small off-state current. It is preferable to apply a transistor to not only the transistor M1 but also the transistor M2. By reducing the current, the semiconductor device 10 can more accurately detect the signal I MON and signal I TE ST Furthermore, the semiconductor device 10 consumes less power. Power Signal I MON and signal I TEST It is possible to detect the current value.

[0056] In this case, for example, elements other than the transistors M1 and M2 may be made of Si or is formed on a semiconductor substrate such as SiGe, and a transistor M1 and a transistor The transistor M2 may be formed of an oxide semiconductor transistor.

[0057] Note that the oxide semiconductor transistor will be described in detail in Embodiment 3 below. .

[0058] <Example of circuit IF_CONV configuration> Next, a specific example of the configuration of the circuit IF_CONV shown in FIG. To clarify the above, we will first explain the basic operation of the circuit IF_CONV. The case where F_CONV is connected to the circuit DCCS and has a calibration function will be explained later. cormorant.

[0059] FIG. 2 shows an example of a circuit diagram of the circuit IF_CONV. The circuit IF_CONV includes a latch 57 and , a counter 58, a comparator 59, and an integrating circuit 53. The circuit 53 includes an operational amplifier 50 , a capacitive element 51 , and a switch 52 .

[0060] The circuit IF_CONV receives the signals CLK1 and CLK2 from the outside. The signals CLK1 and CLK2 have different frequencies, with the signal CLK1 having a higher frequency than the signal CLK2. The signal CLK1 is input to the counter 58, and the signal CLK2 is , are input to a switch 52, a counter 58 and a latch 57.

[0061] One electrode of the capacitance element 51 is electrically connected to the inverting input terminal (-) of the operational amplifier 50. The other electrode of the capacitance element 51 is electrically connected to the output terminal of the operational amplifier 50 .

[0062] The switch 52 is provided between one electrode of the capacitor element 51 and the other electrode of the capacitor element 51. The switch 52 has the function of switching on and off in accordance with the signal CLK2. The switch 52 may be made of a transistor.

[0063] The inverting input terminal of the operational amplifier 50 receives the signal I MON or signal I TEST is entered and The potential VREF1 is input to the non-inverting input terminal (+) of the operational amplifier 50. The output terminal outputs the signal OUT_OP.

[0064] The operational amplifier 50 is an amplifier circuit that amplifies the potential difference between the inverting input terminal and the non-inverting input terminal. It has the function of outputting.

[0065] The inverting input terminal (-) of the comparator 59 is electrically connected to the output terminal of the operational amplifier 50. The signal OUT_OP is input to the inverting input terminal of the comparator 59. The potential VREF2 is input to the non-inverting input terminal (+) of the comparator 59. The output terminal 59 outputs the signal OUT_COMP.

[0066] The comparator 59 has a first potential applied to its non-inverting input terminal and a second potential applied to its inverting input terminal. If the first potential is higher than the second potential, the potential is set to H level. When the first potential is lower than the second potential, the L-level potential is output. do.

[0067] Counter 58 counts the number of times the potential of signal CLK1 switches from H level to L level (or It has a function to count the number of times the signal switches from L level to H level. The counter 58 has a function of outputting the count (number) as a signal OUT_COUNT. It contains a latch circuit inside, and when the potential of the signal OUT_COMP changes from L level to H level, When the counter 58 receives the signal CLK2, it has the function of holding the previous count. When this is given, the count number of the signal OUT_COUNT is initialized to 0. The number of times the potential of the signal CLK1 switches from H level to L level (or the number of L levels) The number of times the CLK signal switches from low to high is sometimes called the number of pulses of the signal CLK1.

[0068] When the potential of the signal CLK2 changes from the L level to the H level, the latch 57 latches the immediately preceding signal O. It has the function of storing UT_COUNT and outputting it as a signal OUT.

[0069] Next, an example of the operation of the circuit IF_CONV will be explained using the timing chart shown in Figure 3. Reveal.

[0070] The timing chart shown in FIG. 3 includes signals CLK1, CLK2, OUT_OP, and 10 shows the potential changes of the signals OUT_COMP, OUT_COUNT, and OUT. Times T1 to T5 shown in FIG. 3 are added to explain the timing of the operations.

[0071] As described above, the signals OUT_COUNT and OUT indicate the count number of the signal CLK1. Figure 3 shows an example of these counts expressed as 8-bit hexadecimal numbers.

[0072] First, at time T1, the signal CLK2 changes from L level to H level. Then, the switch 52 is turned on, and the capacitor 51 starts discharging. P is initialized to the potential VREF1.

[0073] Also, at time T1, counter 58 is reset and signal OUT_COUNT is 0 At the same time, the latch 57 stores the previous signal OUT_COUNT and the signal O In FIG. 3, the data of the signal OUT_COUNT before time T1 (5E ) is output as a signal OUT after time T1.

[0074] Next, at time T2, the signal CLK2 changes from H level to L level. The switch 52 is turned off, the capacitance element 51 starts to charge, and the integration circuit 53 starts to integrate. Signal I MON or signal I TEST The potential obtained by integrating this with respect to time is output as the signal OUT_OP. The potential of the signal OUT_OP gradually decreases.

[0075] Also, from time T2, the counter 58 detects that the potential of the signal CLK1 has changed from the H level to the L level. Start counting the number of changes (or the number of changes from L level to H level) and is output as the signal OUT_COUNT.

[0076] Next, at time T3, the potential of the signal OUT_OP becomes equal to the potential VREF2, and the signal The potential of OUT_COMP changes from L level to H level. At this time, the counter 58 The latch circuit included in ) is held as the signal OUT_COUNT.

[0077] Thereafter, the potential of the signal OUT_OP continues to decrease and reaches the potential GND.

[0078] Next, at time T4, similarly to time T1, the potential of the signal CLK2 changes from the L level to the H level. The signal OUT_OP then changes to the potential VRE It is initialized to F1.

[0079] At time T4, the potential of the signal OUT_COMP changes from H level to L level. At the same time, the signal CLK2 unlatches the signal OU. T_COUNT is initialized to 00. The data of the previous signal OUT_COUNT (in Figure 3) 5B) is output as signal OUT. At this time, signal OUT isMON or Signal I TEST That is, the signal I MON or signal I TE ST is converted into a digital signal.

[0080] After that, by repeating the above operation, the signal I MON or signal I TEST to signal OUT can be exchanged.

[0081] <Configuration example of IF_CONV circuit with calibration function> Next, we will look at an example of a configuration in which a circuit with a calibration function, DCCS, is added to the circuit IF_CONV. The explanation will be given using FIG.

[0082] The circuit IF_CONV shown in FIG. 4 is connected in parallel to the circuit IF_CONV shown in FIG. A plurality of capacitance elements C (C[0] to C[7]) and a plurality of capacitance elements C for controlling electrical connections A number of switches S1 (S1[0] to S1[7]) and switches S2 (S2[0] to S2[7]) [7]) and a latch 64 are added. Also, the circuit IF_CONV shown in Figure 4 The counter 58 and latch 57 of the circuit IF_CONV shown in FIG. 2 are combined into one circuit 63. It's stopped.

[0083] The DCCS circuit in Figure 4 includes a counter 65, a comparator 66, and a SAR (Success It has a Continual Approximation Register (CIRR).

[0084] Counter 65 receives signal CLK1 and generates signal X. Signal X is , signal I TEST is the digital signal ideally converted by the circuit IF_CONV. .

[0085] Comparator 66 compares signal Y with signal X and has the function of outputting the comparison result in a binary value of "1" (H level) or " 0" (L level). For example, assume that when X≥Y, it outputs "1", and when X<Y, it outputs "0".

[0086] SAR 67 is a successive approximation register. SAR 67 has the function of generating signal Z in response to the comparison result in comparator 66.

[0087] Latch 64 has the function of temporarily holding signal Z. When signals TEST and SEL become H level, the latch is released and signal Z is passed to the integration circuit path as signal CA_REG.

[0088] Circuit IF_CONV causes an error in the output signal OUT due to variations in the capacitance elements included in the integration circuit. Circuit DCCS has the function of supplying signal Z for calibrating such an error to circuit IF_CONV.

[0089] The procedure for circuits IF_CONV and DCCS to calibrate signals will be described below with reference to FIG. 5. Note that the following description simplifies the actual circuit operation to some extent for clarity, and one aspect of the present invention is not limited thereto. For example, FIG. 5 shows the procedure for processing a 6-bit signal, but one aspect of the present invention can be applied to the case of handling data of any k bits (k is a natural number of 1 or more). or more).

[0090] First, when signal TEST becomes H level, signal I TEST is converted to signal OUT via circuit IF_CONV.​​

[0091] The signal OUT is input into the circuit DCCS as the signal Y via the TRIBUF43.

[0092] The comparator 66 compares the signal X and the signal Y, and passes the comparison result to the SAR67. For example when X = 45 and Y = 32, X ≥ Y, and it outputs "1" (Figure 5 Step1).

[0093] Next, the SAR67 receives the comparison result of the comparator 66 and determines the signal Z. For example, let Z = 16.

[0094] The latch 64 receives the signal Z and passes it to the integration circuit as the signal CA_REG.

[0095] The integration circuit determines the conduction / non - conduction of the switches S1 and S2 according to the signal CA_REG, and changes the value of the added capacitance. As a result, the circuit IF_CONV is updated.

[0096] Through the updated circuit IF_CONV, again, the signal I TEST is converted into a digital signal and input into the comparator 66 as the signal Y. At this time, the signal Y is 32 + 16 = 4 8.

[0097] When X = 45 and Y = 48, X < Y, and the comparator 66 outputs "0" (Figure 5 Step2).

[0098] [[ID=�4]] The SAR67 receives the comparison result of the comparator and rejects the previously given Z = 16. Next, for example, let Z = 8.

[0099] Through the same procedure as above, the signal Y is input into the comparator 66 again. At this time, Y = 3 2+8 = 40.

[0100] X = 45, Y = 40, X ≥ Y, and comparator 66 outputs "1" (Figure 5 Step 3).

[0101] SAR 67 receives the comparison result of comparator 66 and adopts the previous Z = 8. Next let, for example, Z = 8 + 4 = 12.

[0102] Through the same procedure as above, signal Y is input to comparator 66 again. At this time, Y = 3 2 + 8 + 4 = 44.

[0103] X = 45, Y = 44, X ≥ Y, and comparator 66 outputs "1" (Figure 5 Step 4).

[0104] SAR 67 receives the comparison result of comparator 66 and adopts the previous Z = 8 + 4 . Next, let, for example, Z = 8 + 4 + 2 = 14.

[0105] Through the same procedure as above, signal Y is input to comparator 66 again. At this time, Y = 3 2 + 8 + 4 + 2 = 46.

[0106] X = 45, Y = 46, X < Y, and comparator 66 outputs "0" (Figure 5 Step 5).

[0107] SAR 67 receives the comparison result of comparator 66 and rejects the previous Z = 8 + 4 + 2 . Next, let, for example, Z = 8 + 4 + 1 = 13.

[0108] Through the same procedure as above, signal Y is input to comparator 66 again. At this time, Y = 3 2 + 8 + 4 + 1 = 45. <00007,31> X = 45, Y = 45, X ≥ Y, and comparator 66 outputs "1" (Figure 5 Step 6).

[0110] SAR67 uses the result of the comparison by Comparator 66 and adopts Z=8+4+1. do.

[0111] By the above procedure, the circuit DCCS generates a signal Z (Z=8+4 +1=13).

[0112] After signal Z is determined, signal TEST goes to L level and signal I MON The circuit IF_CO At this time, the latch 64 is in a state of holding the signal CA_REG. , the circuit IF_CONV remains calibrated.

[0113] Finally, the calibrated signal OUT is output to the outside as a signal CMOUT.

[0114] As described above, with the above configuration, the semiconductor device 10 can detect minute currents with high accuracy. Furthermore, the semiconductor device 10 can detect minute currents with low power consumption. It becomes Noh.

[0115] <<Configuration Example 2 of Semiconductor Device>> FIG. 6 shows an example of the configuration of a semiconductor device 20 according to an aspect of the present invention.

[0116] In the semiconductor device 10 of FIG. 1, there are a plurality of circuits IF_CONV. MON [1] ~I MON [N] is input to the corresponding circuit IF_CONV. In the semiconductor device 20 of FIG. MON [1]~I MON [N] is one circuit Input to IF_CONV.

[0117] By adopting the configuration shown in FIG. 6, the semiconductor device 20 can reduce the area occupied by the circuit. This makes it possible to make chairs smaller.

[0118] Furthermore, by adopting the configuration shown in FIG. 6, the semiconductor device 20 can It is possible to reduce the influence of fluctuations.

[0119] In the semiconductor device 20, the transistor M2 is preferably a transistor with a small off-state current. For example, transistor M2[1] is on, and transistors M2[2] to M2[N] are off. Transistors M2[2] to M2[N] are connected to transistor M2[1]. Since the transistors M2[2] to M2[N] are connected in parallel, the off-state current of the transistors M2[2] to M2[N] is large. If so, signal I MON The current of [1] passes through transistors M2[2] to M2[N] It leaks out. Signal I MON The current is very small, ranging from 1 nA to several hundred nA. As a result, the semiconductor device 20 is highly reliable. No. I MON Therefore, the current value cannot be detected correctly.

[0120] Therefore, by using a transistor with a small off-state current as the transistor M2, The device 20 receives the signal I MON Therefore, it becomes possible to detect the current value with high accuracy.

[0121] In addition, by using a transistor with a low off-state current as the transistor M2, 20 is a low power consumption signal I MON It is possible to detect the current value.

[0122] The transistor M2 has a wider band gap than silicon in the channel formation region and is an intrinsic A semiconductor material having a carrier density lower than that of silicon may be used. An oxide semiconductor is preferably used as the channel formation region. The off-state current of the transistor is extremely small.

[0123] In the semiconductor device 20, for example, elements other than the transistor M2 are formed of, for example, Si or Si The transistor M2 is formed on a semiconductor substrate such as Ge. It may also be formed of a transistor.

[0124] In addition to the transistor M2, the transistor M1 also has a transistor with a small off-state current. It is preferable to apply a transistor. By reducing the off-state current of the signal I MON and signals I TEST Furthermore, the semiconductor device 20 can detect a current value of less than 1000 V. Power consumption in signal I MON and signal I TEST It is possible to detect the current value.

[0125] In this case, for example, elements other than the transistors M1 and M2 may be made of Si or is formed on a semiconductor substrate such as SiGe, and a transistor M1 and a transistor The transistor M2 may be formed of an oxide semiconductor transistor.

[0126] As described above, with the above configuration, the semiconductor device 20 can detect minute currents with high accuracy. Furthermore, the semiconductor device 20 can detect minute currents with low power consumption. It becomes Noh.

[0127] (Embodiment 2) In this embodiment, a table having the semiconductor device 10 or the semiconductor device 20 shown in the first embodiment is used. An example of a display device will be described.

[0128] <<Display device>> 7 is a block diagram showing an example of the configuration of a display device. The display device 200 includes a pixel section 210, a peripheral A side circuit 220, a CPU 230, a control circuit 231, a power supply circuit 232, an image processing circuit 233, and memory 234.

[0129] The CPU 230 is a circuit for executing instructions and controlling the display device 200 in an overall manner. The instructions executed by the CPU 230 are input from the outside and instructions stored in the internal memory. The CPU 230 sends signals to control the control circuit 231 and the image processing circuit 233. Based on the control signal from the CPU 230, the control circuit 231 controls the operation of the display device 200. The control circuit 231 controls the peripherals so that the processing determined by the CPU 230 is executed. The control circuit 220, the power supply circuit 232, the image processing circuit 233, and the memory 234. The circuit 231 receives, for example, various synchronization signals that determine the timing of rewriting the screen. The synchronization signals include, for example, a horizontal synchronization signal, a vertical synchronization signal, and a reference clock signal. The control circuit 231 generates control signals for the peripheral circuit 220 from these signals. The power supply circuit 232 has a function of supplying a power supply voltage to the pixel section 210 and the peripheral circuit 220. .

[0130] The pixel section 210 includes a plurality of pixels 211, a plurality of wirings GL, a plurality of wirings SL, and a plurality of wirings GL, SL, and a plurality of wirings SL. The plurality of pixels 211 are arranged in an array. , ML are provided in accordance with the arrangement of the plurality of pixels 211. The wiring GL is arranged in the vertical direction. The lines SL and ML are arranged in the horizontal direction. The lines GL are gate lines and scanning lines. The wiring SL may be called a source line, a data line, etc. The wiring ML is a wiring provided to monitor the pixel 211, and is, for example, This can be called monitor wiring.

[0131] The peripheral circuit 220 includes a gate driver circuit 221, a source driver circuit 222, a monitor The digital signal processing circuit 222 includes a digital signal processing circuit 223 and an analog-to-digital conversion circuit (ADC) 224.

[0132] The gate driver circuit 221 is a circuit for driving the wiring GL. The source driver circuit 222 has a function of generating a signal. The monitor circuit 223 is a line that generates a signal to be supplied to the wiring M. The ADC224 has the function of detecting the analog signal flowing through the monitor circuit. This is a circuit for converting the analog signal output from the line 223 into a digital signal. The C224 outputs a signal CMOUT to the image processing circuit 233.

[0133] The display device 200 includes the semiconductor device 10 or the semiconductor device 20 according to the first embodiment in the ADC 224. It is applied.

[0134] The image processing circuit 233 processes an externally input video signal to generate a data signal VDATA. The data signal VDATA is a digital signal that represents the gradation. The image processing circuit 233 has a function of correcting the data signal VDATA using the signal CMOUT. The source driver circuit 222 processes the data signal VDATA and supplies the data to each line SL The memory 234 has a function of generating a data signal to be supplied to the image processing circuit 233. The memory 234 is provided to store data necessary for processing. For example, the signal CMOUT, the data signal VDATA, or the externally input video signal is It will be delivered.

[0135] 8 is an exploded perspective view of the display device 200. The display device 200 includes an upper cover 258-1 The touch panel unit with FPC256 connected between it and the bottom cover 258-2 252, a display panel 250 to which an FPC 255 is connected, a frame 259, a printed circuit board The touch panel unit 251 includes a battery 253. In some cases, the light source 252 and the like are not provided. A backlight unit may also be provided.

[0136] The upper cover 258-1 and the lower cover 258-2 are connected to the touch panel unit 252 and The shape and dimensions can be changed as appropriate to fit the size of the frame and the display panel 250. The function of the display panel 250 is to protect the display panel 250 and also to prevent damage caused by the operation of the printed circuit board 251. The frame 259 also functions as an electromagnetic shield to block electromagnetic waves. , may have a function as a heat sink.

[0137] The printed circuit board 251 includes a CPU 230, a power supply circuit 232, an image processing circuit 233, a memory 2 The power supply circuit 232 is supplied with power from an external commercial power source. Alternatively, the power source may be a separately provided battery 253. In addition, the display device 200 does not include a polarizing plate, a retardation plate, or the like. Additional members such as plates and prism sheets may be provided.

[0138] The touch panel unit 252 is a resistive or capacitive touch panel. The display panel 250 can be used by overlapping it with the opposing substrate (sealing substrate) of the display panel 250. It is also possible to provide a touch panel function to the display panel. It is also possible to provide an optical sensor in each pixel of the 250 to create an optical touch panel. Alternatively, a touch sensor electrode may be provided in each pixel of the display panel 250, and a capacitive touch sensor may be used. It may also be a panel.

[0139] The display panel 250 shown in FIG. 8 includes a substrate 260 and a substrate (opposite substrate) 261. The LCD panel 60 includes a pixel section 210 and a peripheral circuit 220. The substrate 260 on which the circuit is provided is sometimes called the element substrate (backplane). A part or all of the path 220 may be provided on the substrate 260 in the same manufacturing process as the pixel section 210. In the example of FIG. 8, a part of the peripheral circuit 220 is provided in the IC 270. 270 is mounted on the substrate 260 using the COG (Chip on Glass) method.

[0140] <<Display Panel>> FIG. 9 is a plan view showing an example of the configuration of an element substrate of the display panel 250. Here, based on FIG. Similarly, terms indicating positional relationships such as left, right, top, and bottom will be used.

[0141] The display panel 250 includes a pixel section 210 and a peripheral circuit 220 (circuits 221-224). Among the peripheral circuits, the gate driver circuit 221 and the monitor circuit 223 are This is a circuit formed on the substrate 260 in the same manufacturing process as the element part 210. Gate driver circuit 221 is divided into two circuits (GDL, GDR) and is provided on the left and right of the pixel section 210. For example, the GDR is electrically connected to the odd-numbered wiring GL, and the GDL is electrically connected to the even-numbered wiring GL. In this case, GDL and GDR alternately drive the wiring GL. do.

[0142] The area 262 is provided with a source driver circuit 222 and an ADC 224. In this example, the source driver circuit 222 and the ADC 224 are six driver ICs 30. The number of driver ICs 30 is not limited to this. A plurality of terminals (not shown) are formed on the driver IC 30, which are electrically connected to the driver IC 30. It has been done.

[0143] Hereinafter, the horizontal (H) resolution of the pixel unit 210 is n×RGB, and the vertical (V) resolution is n×RGB. The display device 200 will be described assuming that the image resolution is m. n and m are integers of 2 or more. RGB (Red, Green, Blue) represents the color displayed by the pixel 211. ) constitute one unit pixel.

[0144] The configuration of the unit pixel is not limited to this. The arrangement of the sub-pixels in the unit pixel can be set as appropriate. When the unit pixel is made up of four sub-pixels, the combination of colors to be displayed is [red (R), green ( [Red (R), Green (G), Blue (B), Yellow (Y)] or [Red (R), Green (G), Blue (B), White (W)] etc. In this specification, when the components are distinguished by the color displayed by the pixel, , _R, [R], R[1], etc. For example, pixel 211_R is red The wiring SL_G[2] is electrically connected to the pixel 211_G. It represents the second row of wiring SL.

[0145] <<Pixels>> FIG. 10(A) is a circuit diagram showing an example of a pixel 211, and FIG. 10(B) is a circuit diagram showing the pixel 211 shown in FIG. 10(A). 10 is a timing chart showing an example of the operation of the pixel 211.

[0146] FIG. 10(A) shows the kth row, jth column (k is an integer between 2 and m, and j is an integer between 2 and n). The pixel 211 is connected to the lines GL, SL, ML, and A. NL. The pixel 211 includes transistors M5-M7 and a capacitance element C1. , and a light-emitting element EL1.

[0147] The light-emitting element EL1 has a pair of terminals (anode and cathode). For this purpose, an element whose luminance can be controlled by current or voltage can be used. The light emitting element EL1 may be an LED (Light Emitting Diode) or an OL ED (Organic Light Emitting Diode) is a typical example. For example, in the case of an OLED, the light-emitting element EL1 has an EL (electroluminescence) layer. The EL layer is provided between the anode and cathode and is composed of a single layer or multiple layers. The EL layer includes at least a layer containing a light-emitting substance (light-emitting layer). Light-emitting elements are sometimes called EL elements. A display device that uses EL elements as pixels is called an EL display device. In particular, a light-emitting element having an organic EL layer is called an organic EL element, and an organic E Display devices that use LED elements are sometimes called organic light-emitting diode (OLED) displays. The light-emitting element EL1 can be an organic EL element.

[0148] In FIG. 10(A), transistors M5-M7 are n-type transistors. Alternatively, all transistors M5-M7 may be p-type transistors. The back gate is electrically connected to the transistor. The current driving capability of the transistors M5-M7 can be improved. Some or all of the transistors 7 may be transistors without a back gate.

[0149] The transistor M5 connects the gate (node ​​N2) of the transistor M6 to the line SL. The transistor M7 is a pass transistor connected between the wiring ML and the anode of the light-emitting element EL1. (node ​​N1). Transistor M6 is a pass transistor that connects Transistor M6 functions as a current source supplied to light-emitting element EL1. The luminance of the light emitting element EL1 is adjusted by the magnitude of the drain current of the capacitor C1. , a storage capacitor that holds the voltage between the node N1 and the node N2.

[0150] <Example of operation> A data signal Vda is input to the wiring SL. The voltage of the data signal Vda is In Fig. 10(B), [k] and [k+1] represent the kth row and the k+th row, respectively. This indicates that the data signal Vda is input to the pixels 211 in one row.

[0151] The period P1 is a writing operation period, during which the light-emitting element EL1 does not emit light. A voltage Vano is applied to the cathode of the light-emitting element EL1, and a voltage Vcat is applied to the cathode of the light-emitting element EL1. The line ML is electrically connected to the power supply line that supplies the voltage V0. When the line GL is set to a high level, The transistors M5 and M6 are turned on. The voltage Vda of the line SL is applied to the node N2. A drain current corresponding to the voltage Vda flows through the transistor M6.

[0152] The voltages Vano, V0, and Vcat satisfy the following formulas (b1) to (b3). In the following formula, the voltage V thE is the light-emitting element EL1 is the threshold voltage, and the voltage V th2 is the threshold voltage of transistor M6. V0 <Vcat+V thE (b1) Vano>V0+V thE (b2) Vano>Vcat+V thE +V th2 (b3)

[0153] Because (b1) and (b2) are true, during the period P1 (write period), the transistor M7 Even when the transistor M6 is on, the drain current of the transistor M6 is prioritized over the wiring ML rather than the light emitting element EL1. By satisfying (b3), the wiring AN A potential difference occurs between L and the cathode of the light-emitting element EL1, so that the drain of the transistor M6 A turn-on current is supplied to the light-emitting element EL1, causing the light-emitting element EL1 to emit light. At 2, transistors M5 and M7 are turned off.

[0154] The period P3 is a monitor period for acquiring the drain current of the transistor M6. The power supply that supplies the line ML and the voltage V0 is turned on. The voltage at node N2 is connected to the line SL, and the electrical connection with the line is cut off. th2 twist A voltage Vano is applied to the wiring ANL, and the A voltage Vcat is applied to the cathode. By driving the wiring SL in this way, the transistor This allows the drain current of the photodiode M6 to flow preferentially to the wiring ML rather than the light-emitting element EL1. Cut.

[0155] In the period P3, the signal I is output from the pixel 211 to the line ML. MON is the transistor during the light emission period. This includes the drain current flowing through the transistor M6. MON Based on the analysis results, By correcting the voltage Vda of the signal, the deviation in luminance of the pixel 211 can be corrected.

[0156] The monitor operation does not always have to be performed after the light emission operation. For example, in the pixel 211, After repeating the cycle of writing and light emitting operations several times, the monitor operation is performed. After the monitor operation, the data signal corresponding to the minimum gray level value 0 can be By writing to the pixel 211, the light emitting element EL1 may be set to a non-light emitting state.

[0157] Although an example in which a light-emitting element is used as a display element has been shown here, the embodiment of the present invention is not limited to this. For example, in this specification, a display element, a display device that is a device having a display element, The light-emitting element and the light-emitting device, which is a device having the light-emitting element, can be used in various forms. The display element, the display device, the light-emitting element or the light-emitting device can have various elements. For example, EL (electroluminescence) elements (EL elements containing organic and inorganic materials, organic EL elements, inorganic EL elements), LEDs (white LEDs, red LEDs, green LEDs, blue LEDs) etc.), transistors (transistors that emit light according to the current), electron-emitting elements, liquid crystal elements , electronic ink, electrophoretic element, grating light valve (GLV), plasma display Using MEMS (Micro-Electro-Mechanical Systems) Display element, Digital Micromirror Device (DMD), DMS (Digital Micromirror Shutter), MIRASOL (registered trademark), IMOD (Interference Module ration element, shutter-type MEMS display element, optical interference-type MEMS display element , electrowetting element, piezoelectric ceramic display, carbon nanotube In addition to these, there are also at least one electric or magnetic The display medium has contrast, brightness, reflectance, transmittance, etc. that change due to electrochemical effects. An example of a display device using an EL element is an EL display. An example of a display device using electron-emitting elements is a field emission display ( FED) or SED type flat panel display (SED: Surface-conduct ion electron-emitter display). An example of the display device used is a liquid crystal display (transmissive liquid crystal display, semi-transmissive LCD display, reflective LCD display, direct-view LCD display, projection LCD display Spray) and other inks using electronic ink, electronic liquid powder (registered trademark), or electrophoretic elements. An example of such a display device is electronic paper. In order to realize a reflective LCD, some or all of the pixel electrodes must be reflective. For example, a part or the whole of the pixel electrode may be , aluminum, silver, etc. In this case, the reflective electrode It is also possible to provide a memory circuit such as an SRAM in the memory. When using an LED, the LED electrodes and the nitride semiconductor Graphene or graphite may be arranged on a plurality of Layers may be stacked to form a multilayer film. This allows a nitride semiconductor, for example, an n-type GaN semiconductor layer having a crystal structure, to be easily formed thereon. Furthermore, a p-type GaN semiconductor layer having crystals can be formed on top of it. It is possible to construct an LED by using graphene and graphite. An AlN layer may be provided between the n-type GaN semiconductor layer and the GaN layer of the LED. The semiconductor layer may be formed by MOCVD. However, by providing graphene, L The GaN semiconductor layer of the ED can also be formed by sputtering.

[0158] Monitor circuit Signal I MON is input to the monitor circuit 223. The monitor circuit 223 receives the signal I MON A The monitor circuit 2 has a function to control the output to the DC 224. The monitor circuit 223 is configured as follows: The circuit MONI[j] is controlled by the MOSFET and has m stages of circuits MONI. For example, when the resolution of the display panel 250 is 8k4K, The circuit 223 has 4320 circuits MONI.

[0159] The circuit MONI[j] is a 3-input, 1-output circuit. The input terminal of the circuit MONI is wire 3. (ML_R, ML_G, ML_B) are electrically connected, and the output terminal MOUT is ADC2 24. The circuit MONI[j] is electrically connected to the six transistors (Msw1-Ms The gates of the transistors Msw1-Msw3 are connected to the signal V The transistors Msw1, Msw2, and Msw3 are connected to the power supply line 215. It has the function of a switch that controls the conduction state with the wiring ML_R, ML_G, and ML_B. Transistors MS1, MS2, and MS3 are connected to the output terminal MOUT and the wiring ML_R, ML_G, and M The power supply line 215 has a function of a switch that controls the conduction state between the L_B and the This is wiring for use.

[0160] The signal V0_SW is input to the gates of the transistors Msw1 to Msw3. The gates of the data modules MS1, MS2, and MS3 are connected to the signals MSEL[1], MSEL[2], and MSEL [3] is input. Writing period and light emitting period (periods P1 and P2 in FIG. 10(B)) Then, turn on the transistors Msw1-Msw3 and turn off the transistors MS1-MS3. During the monitoring period (period P3 in FIG. 10B), the transistors Msw1 to Msw3 The transistors MS1-MS3 are controlled so that only one of them is turned on. During the monitoring period, the current signal I flows through ML_R[j], ML_G[j], and ML_B[j]. MON _R[j], I MON _G[j], IMON _B[j] sequentially connects to the terminal MOUT[ j].

[0161] Here, the transistors Msw1-Msw3 and MS1-MS3 are n-type transistors. However, some or all of these may be p-type transistors. Msw1-Msw3 and MS1-MS3 have back gates, but some of these may all be transistors without a back gate.

[0162] <<Display Panel>> FIG. 12 shows an example of the device structure of the display panel 250. 12 shows the stacked structure of the pixel section 210 and the The device structure of the peripheral circuit 220a (GDR, GDL, and monitor circuit 223 in the example of FIG. 9) 12 is a diagram for explaining the above and is not a cross-sectional view of a specific portion of the display panel 250. The display panel 250 receives light 555 from the light emitting element EL1 through the substrate 261 side. An example of a top emission structure is shown.

[0163] There are no particular restrictions on the device structures such as transistors and capacitors provided on the substrate 260. Select a device structure suitable for each function of the pixel section 210 and the peripheral circuit 220a. For example, the device structure of a transistor can be a top gate type, a bottom gate type, or and dual gate type with both a gate (front gate) and a bottom gate. A typical example is a multi-gate type having multiple gate electrodes for one semiconductor layer. There are no particular restrictions on the semiconductor layer in which the transistor channel is formed. Semiconductors are broadly classified into single crystal and non-single crystal semiconductors. Semiconductor materials include conductors, microcrystalline semiconductors, and amorphous semiconductors. Semiconductors containing one or more of the above (e.g., silicon, silicon germanium, silicon carbide, etc.) oxide semiconductors (e.g., In-Ga-Zn oxide, In-Sn-Zn oxide, etc.) ), compound semiconductors, etc.

[0164] Here, as an example of the display panel 250, an element substrate is configured with transistors of the same conductivity type. An example in which a transistor on an element substrate has a channel formed in an oxide semiconductor layer will be described. The figure shows an example of a transistor (hereinafter sometimes referred to as an OS transistor). 12 includes a transistor M7, a capacitance element C1, a light emitting element EL1, and a peripheral circuit 220a The transistors M7 and M10 have a dual gate structure. The gate electrode is located on the substrate 260 side.

[0165] <Element substrate> The element substrate of the display panel 250 is a substrate 260 having an oxide semiconductor (OS) layer, a plurality of insulating layers, and a The electrode is constructed by laminating a plurality of conductive layers.

[0166] The conductive layer of the display panel 250 may be formed of a single layer of conductive film or two or more layers of conductive film. Such conductive films include aluminum, chromium, copper, silver, gold, platinum, and titanium. Ta, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium Metal films of manganese, magnesium, zirconium, beryllium, etc. can be used. In addition, alloy films and compound films containing these metals, and films containing impurity elements such as phosphorus, A polycrystalline silicon film, a silicide film, etc. can also be used. The conductive film may be a light-transmitting conductive film. Tungsten-containing indium oxide, tungsten oxide-containing indium zinc oxide, Indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium Indium tin oxide (called ITO), indium zinc oxide, and indium with silicon oxide Examples of the film include a film containing a metal oxide such as aluminum tin oxide.

[0167] The insulating layer of the display panel 250 may be formed of a single insulating layer or two or more insulating layers. Inorganic insulating films include aluminum oxide, magnesium oxide, silicon oxide, Silicon oxynitride, silicon nitride oxide, silicon nitride, gallium oxide, germanium oxide , yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide Examples of resin films include films made of acrylic resin, polycarbonate, and the like. Polyimide resin, benzocyclobutene resin, siloxane resin, polyamide resin, epoxy In this specification, the term "oxynitride" refers to a film containing an oxide rather than nitrogen. Nitrogen oxides are compounds that contain more nitrogen than oxygen. This refers to

[0168] The element substrate of the display panel shown in FIG. 12 includes oxide semiconductor (OS) layers 501 and 502, a first conductive layer, and a second conductive layer. Conductive layers 511-513 provided on the first conductive layer, and conductive layers 521-524 provided on the second conductive layer. , conductive layers 531-533 provided in the third conductive layer, conductive layer 541 provided in the fourth conductive layer -544, a conductive layer 550 provided on the fifth conductive layer, and a conductive layer 551 provided on the sixth conductive layer , a conductive layer 552 provided on the seventh conductive layer, an EL layer 553, and insulating layers 571-576. The insulating layer 571 is the gate insulating layer of the transistor M7, the transistor M10, and the capacitor The insulating layer 572 constitutes the dielectric of the element C1. Layer 576 acts as a spacer to maintain the space between substrate 260 and substrate 261. do.

[0169] <GDR、GDL> The transistor M10 includes an OS layer 501 and conductive layers 511, 521, 522, and 531. The conductive layer 531 functions as a back gate and is electrically connected to the conductive layer 511. The conductive layer 541 is an electrode or wiring for wiring elements provided on the GDR and GDL. It is a line.

[0170] <Pixel section> Transistor M7 includes an OS layer 502 and conductive layers 512, 523, 524, and 532. The conductive layer 532 functions as a back gate and is electrically connected to the conductive layer 512. The conductive layer 512 constitutes the wiring GL, and the conductive layer 523 constitutes the wiring ML. 12, the conductive layer 512 is shared with the capacitor element C1. The entire lower surface of the OS layer 502 is covered with an insulating layer 571. The capacitor C1 is an MIM type capacitor, and the conductive layer 513, the insulating layer 514, and the conductive layer 512 overlap each other. The conductive layer 54 is a stack of a layer 571, a conductive layer 524, an insulating layer 572, and a conductive layer 533. 2 is a wiring ANL, the conductive layer 543 is a wiring SL, and the conductive layer 544 is a light-emitting element EL1 to the transistor M7 and the capacitance element C1.

[0171] The light-emitting element EL1 is provided on the insulating layer 574. The conductive layers 550-552 and the EL layer The portion where the conductive layers 550 and 551 are laminated functions as the light-emitting element EL1. The conductive layers 550 and 551 function as the anode and cathode electrodes of the light-emitting element EL1. The conductive layer 552 and the EL layer 553 are provided for each pixel 211. One or more of the following are provided:

[0172] The EL layer 553 contains a small amount of a light-emitting material that can emit light by recombining holes and electrons. The EL layer 553 includes at least one layer such as a hole injection layer, a hole transport layer, an electron transport layer, an electron injection layer, etc. Any functional layer may be formed as needed. In this example, an EL layer 553 that emits white light is provided. The conductive layer 551 is formed to form the light-emitting element EL1 into a microcavity structure. For example, the conductive layer 551 is formed of an indium tin oxide film containing silicon oxide. The conductive layer 551 can reduce the optical path length between the conductive layer 550 and the conductive layer 552. The thickness of the conductive layer 551 is adjusted according to the wavelength of the light to be extracted from the pixel 211. For example, the thickness of the conductive layer 551 is adjusted in the range of 5 nm to 100 nm. The conductive layer 551 is made thicker as the wavelength of the light 555 becomes longer. The thickness is as follows: pixel 211_R>pixel 211_G>pixel 211_B.

[0173] <Configuration example of opposing substrate> The opposing substrate is fixed to face the substrate 260 by a sealing member (not shown). The counter substrate of the display panel 250 shown in FIG. 12 comprises a substrate 261, a light-shielding layer 580, a color filter The color filter layer 581 corresponds to the pixel 211. The color filter layer 581 may be provided on the element substrate or The peripheral circuit 220a is shielded from light by a light-shielding layer 580. A light-shielding layer 580 is provided on the overcoat 580 so as to shield the area that does not contribute to the display. The overcoat layer 582 serves to flatten the surface of the opposing substrate and to remove impurities (typically water and / or oxygen). The overcoat layer 582 has a function of preventing the diffusion of the fluorine-containing compounds. It can be formed from epoxy resin, acrylic resin, or the like.

[0174] <substrate> Substrates applicable to the substrates 260 and 261 include, for example, glass substrates, quartz substrates, and plastic substrates. Includes tungsten substrate, metal substrate, stainless steel substrate, and stainless steel foil. Substrate, tungsten substrate, substrate with tungsten foil, flexible substrate, bonding Examples of the substrate include a film, a paper containing a fibrous material, and a base film. Examples include barium borosilicate glass, aluminoborosilicate glass, or soda lime glass. Examples of flexible substrates include polyethylene terephthalate (PET) and glass. , polyethylene naphthalate (PEN), and polyethersulfone (PES). The materials include flexible plastics, acrylic resins, etc. The film is made of polypropylene, polyester, polyvinyl fluoride, polyvinyl chloride, etc. A film made of a material such as a silicon dioxide film or an inorganic vapor deposition film can also be used. Examples include polyester, polyamide, polyimide, aramid, epoxy, and inorganic vapor deposition film. In the example of FIG. 12, the substrate 261 is transparent to light 555 (visible light). Pass.

[0175] The substrate 260 is a support substrate (glass) used to fabricate the pixel section 210 and the peripheral circuit 220a. After the pixel section 210 and the peripheral circuit 220a are completed or after the manufacturing process, During this process, the support substrate may be peeled off and a flexible substrate may be attached using an adhesive layer. Similarly, the substrate 261 is also a support substrate (glass substrate) used to manufacture the color filter layer 581, etc. After the overcoat layer 582 is formed, the support substrate is peeled off and the adhesive layer is applied. A more flexible substrate may also be attached.

[0176] By using flexible substrates for the substrates 260 and 261, a flexible display device can be obtained. Furthermore, by incorporating a flexible display device, a flexible semiconductor device can be provided. be.

[0177] (Embodiment 3) In this embodiment, the transistor M1 or the transistor M2 shown in Embodiment 1 is 13 and 14 are used to explain a structure example of an oxide semiconductor transistor that can be used in the present invention. explain.

[0178] <<Configuration Example 1 of Oxide Semiconductor Transistor>> 13A to 13C show top views and cross-sectional views of the transistor 150. 13(A) is a top view of the transistor 150, and FIG. 13(B) is a dot-dash diagram of FIG. 13(A). 13(C) corresponds to a cross-sectional view of the section between the line AB, and FIG. 13(C) corresponds to a cross-sectional view of the section between the line CD and dashed line in FIG. 13(A). In FIG. 13(A), for clarity, only one of the components is shown. In the figure, some parts are omitted.

[0179] The transistor 150 includes a conductive film 104 provided over a substrate 102 and a conductive film 105 formed between the substrate 102 and the conductive film 105. a first insulating film 108 including an insulating film 106 and an insulating film 107 formed on the film 104; The oxide semiconductor film 110 overlaps with the conductive film 104 with the insulating film 108 interposed therebetween. The conductive film 112a and the conductive film 112b are in contact with the body film 110.

[0180] The first insulating film 108, the oxide semiconductor film 110, the conductive film 112a, and the conductive film 112b On top of that, a second insulating film 120 including insulating films 114, 116, and 118 is formed. and a conductive film 122 formed thereon.

[0181] The conductive film 122 is formed through an opening 142e provided in the first insulating film 108 and the second insulating film 120. 10, it is connected to the conductive film 104.

[0182] In the transistor 150, the conductive film 104 functions as a first gate electrode. The conductive film 122 functions as a second gate electrode. , has a function as a first gate insulating film, and the second insulating film 120 has a function as a second gate insulating film. It has the function as.

[0183] In the transistor 150, the conductive film 112a serves as one of a source electrode and a drain electrode. The conductive film 112b functions as the other of the source electrode and the drain electrode. do.

[0184] The transistor 150 described in this embodiment has the conductive film 104 and the An oxide semiconductor is formed between the conductive films 122 via the first insulating film 108 and the second insulating film 120. 13A, the conductive film 104 has a top surface shape , the insulating film 108 overlaps with the side surface of the oxide semiconductor film 110 with the first insulating film 108 interposed therebetween.

[0185] The conductive film 104 and the conductive film 122 are connected in the opening 142e. By making the conductive film 122 have the same potential, carriers flow over a wide range of the oxide semiconductor film 110. This increases the amount of carriers moving through transistor 150.

[0186] As a result, the on-state current of the transistor 150 increases and the field-effect mobility increases. , typically with a field-effect mobility of 10 cm 2 / V·s or more, even 20cm 2 / V·s or later Note that the field-effect mobility here is the mobility as a physical property value of the oxide semiconductor film. It is not an approximate value, but an index of the current driving force in the saturation region of the transistor, and is an apparent This is the field effect mobility.

[0187] The channel length (also referred to as L length) of the transistor is set to 0.5 μm or more and 6.5 μm or less. Preferably, it is greater than 1 μm and less than 6 μm, more preferably greater than 1 μm and less than 4 μm, More preferably, it is greater than 1 μm and not greater than 3.5 μm, and even more preferably, it is greater than 1 μm and not greater than 2. By setting the channel length to 0.5 μm or less, the field effect mobility increases significantly. By making it smaller, between 5 μm and 6.5 μm, the channel width can also be made smaller. be.

[0188] In addition, the conductive film 104 and the conductive film 122 each shield an electric field from the outside. In order to have a function of preventing the formation of a conductive film, a conductive film is provided between the substrate 102 and the conductive film 104 or on the conductive film 122. The fixed charges generated by the oxide semiconductor film 110 do not affect the oxide semiconductor film 110. Applying a negative potential to the gate electrode - Gate Bias Temperature The degradation of the drain voltage at different drain voltages is suppressed. This makes it possible to suppress fluctuations in the voltage rise of the on-state current.

[0189] The BT stress test is a type of accelerated test that measures the transients that occur during long-term use. It is possible to evaluate the change in the characteristics of the BT string (i.e., the change over time) in a short time. The amount of change in the threshold voltage of a transistor before and after the load test is an important factor for examining reliability. The smaller the threshold voltage fluctuation before and after the BT stress test, the better the It can be said that this is a highly reliable transistor.

[0190] Note that in the transistor 150, the conductive film 104 and the conductive film 122 are not connected to each other, but are connected to different In this way, the threshold voltage of the transistor 150 can be controlled. It can be controlled.

[0191] In some cases, the conductive film 122 may be omitted from the transistor 150.

[0192] The individual elements that make up substrate 102 and transistor 150 are described below.

[0193] <Substrate 102> Substrates applicable to the substrate 102 include, for example, glass substrates, quartz substrates, and plastic substrates. Plate, metal substrate, stainless steel substrate, substrate with stainless steel foil, Tungsten substrate, substrate with tungsten foil, flexible substrate, laminated film Examples of the glass substrate include paper containing fibrous materials and base films. The glass is made of barium borosilicate glass, aluminoborosilicate glass, or soda lime glass. Examples of flexible substrates include polyethylene terephthalate (PET), polyethylene terephthalate (PE ... Polyethylene naphthalate (PEN) and polyethersulfone (PES) are typical examples of The laminated film is made of flexible synthetic resin such as acrylic. , polypropylene, polyester, polyvinyl fluoride, polyvinyl chloride, etc. An inorganic film or an inorganic vapor deposition film can also be used. Polyester, polyamide, polyimide, aramid, epoxy, inorganic vapor deposition film, or There are papers and so on.

[0194] The substrate 102 is not limited to being a simple support, but may also be used to support other elements such as transistors and capacitors. The substrate may be a substrate on which a

[0195] <Gate electrode> The conductive film 104 and the conductive film 122 may be made of aluminum, chromium, copper, or titanium. a metal element selected from the group consisting of aluminum, titanium, molybdenum, and tungsten, or the above-mentioned metal elements It can be formed using an alloy containing the above-mentioned metal elements or an alloy combining the above-mentioned metal elements. The materials used for the conductive film 104 and the conductive film 122 may have a single-layer structure or a two-layer structure or more. For example, a two-layer structure in which a titanium film is laminated on an aluminum film, a nitride film, or the like may be used. Two-layer structure in which a titanium film is laminated on a titanium nitride film, and a tungsten film is laminated on a titanium nitride film. a two-layer structure in which a tungsten film is laminated on a tantalum nitride film or a tungsten nitride film; Layer structure: titanium film, aluminum film stacked on top of titanium film, titanium film on top of that There are also three-layer structures that form a film. A combination of one or more selected from the group consisting of silicon, molybdenum, chromium, neodymium, and scandium Alternatively, an alloy film or a nitride film may be used for the conductive film 104 and the conductive film 122. The material can be formed by, for example, sputtering.

[0196] In addition, a conductive film that can be used for the conductive film 104 and the conductive film 122 is a conductive film containing indium For example, an oxide containing tungsten oxide, an oxide containing indium oxide, Indium zinc oxide containing tungsten, indium oxide containing titanium oxide, titanium oxide Indium tin oxide containing tin, indium tin oxide (hereinafter referred to as ITO), Conductive materials with transparency such as indium zinc oxide and silicon oxide-doped indium tin oxide Materials can be used.

[0197] <Gate insulating film> The first insulating film 108 is exemplified by a two-layer laminate structure of an insulating film 106 and an insulating film 107 . The structure of the first insulating film 108 is not limited to this, and may be, for example, a single layer structure or a structure of three or more layers. The laminated structure may be formed as follows.

[0198] The insulating film 106 may be, for example, a silicon nitride oxide film, a silicon nitride film, or an aluminum oxide film. A film such as a rubber film can be used, and it can be formed as a laminate or a single layer using a PE-CVD device. When the insulating film 106 has a laminated structure, a silicon nitride film with few defects is used as the first silicon nitride film. The first silicon nitride film was used as a silicon nitride film, and the second silicon nitride film was used as a silicon nitride film. It is preferable to provide a silicon nitride film that releases less ammonia. The hydrogen and nitrogen contained in the oxide semiconductor film 6 move or diffuse into the oxide semiconductor film 110 to be formed later. This can prevent this from happening.

[0199] The insulating film 107 may be a silicon oxide film, a silicon oxynitride film, or the like. -It is formed in a laminated or single layer using a CVD apparatus.

[0200] Furthermore, as the insulating film 106, for example, a silicon nitride film having a thickness of 400 nm is formed, and then As the insulating film 107, a stacked structure is used in which a silicon oxynitride film having a thickness of 50 nm is formed. The silicon nitride film and the silicon oxynitride film can be formed successively in a vacuum. It is preferable to use silicon nitride oxide, since this prevents the inclusion of impurities. Silicon oxynitride is an insulating material with a higher oxygen content than silicon dioxide. This refers to insulating materials with a higher content of elemental elements.

[0201] <Oxide semiconductor film> The oxide semiconductor film 110 contains at least indium (In), zinc (Zn), and M (Al, In-M-Zn oxide containing metals such as Ga, Ge, Y, Zr, Sn, La, Ce or Hf It is preferable that the film contains a film represented by a Zn-based compound. Alternatively, it is preferable that the film contains both In and Zn. In addition, in order to reduce the variation in the electrical characteristics of the transistor, It is preferable to include a stabilizer.

[0202] Stabilizers include gallium (Ga), tin (Sn), hafnium (Hf), and aluminum. Aluminum (Al) or zirconium (Zr). Also, other stabilizers The lanthanides are lanthanum (La), cerium (Ce), and praseodymium (P r), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium ( Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium Er, Thulium, Ytterbium, Lutetium, etc. .

[0203] The oxide semiconductor constituting the oxide semiconductor film 110 is, for example, an In—Ga—Zn-based oxide. In-Al-Zn oxides, In-Sn-Zn oxides, In-Hf-Zn oxides , In-La-Zn oxide, In-Ce-Zn oxide, In-Pr-Zn oxide, In-Nd-Zn oxide, In-Sm-Zn oxide, In-Eu-Zn oxide, I n-Gd-Zn oxide, In-Tb-Zn oxide, In-Dy-Zn oxide, In -Ho-Zn oxide, In-Er-Zn oxide, In-Tm-Zn oxide, In- Yb-Zn oxide, In-Lu-Zn ​​oxide, In-Sn-Ga-Zn oxide, I n-Hf-Ga-Zn oxide, In-Al-Ga-Zn oxide, In-Sn-Al- Zn-based oxide, In-Sn-Hf-Zn-based oxide, In-Hf-Al-Zn-based oxide are used. You can be there.

[0204] Here, the In-Ga-Zn oxide is a material containing In, Ga, and Zn as main components. It means oxide, and the ratio of In, Ga, and Zn does not matter. Other metal elements may also be included.

[0205] The oxide semiconductor film 110 is formed by a sputtering method, an MBE (Molecular Beam Epitaxy) method, or the like. Beam Epitaxy, CVD, pulsed laser deposition, ALD (Atomic Layer Deposition method, etc. can be used as appropriate. When the semiconductor film 110 is formed by sputtering, a dense film is formed. It is suitable.

[0206] When the oxide semiconductor film 110 is formed, the hydrogen concentration in the film is reduced as much as possible. In order to reduce the hydrogen concentration, for example, the film is formed by using a sputtering method. In this case, it is necessary not only to evacuate the film formation chamber to a high vacuum, but also to highly purify the sputtering gas. The oxygen gas and argon gas used as the sputtering gas have a dew point of -40°C or less, preferably -80℃ or less, more preferably -100℃ or less, more preferably -120℃ or less By using a highly purified gas, it is possible to prevent moisture and the like from being taken into the oxide semiconductor film as much as possible. This can be prevented.

[0207] In order to remove residual moisture in the film-forming chamber, an adsorption-type vacuum pump, for example, a cryo- It is preferable to use a pump, an ion pump, or a titanium sublimation pump. A cryopump may be a turbomolecular pump with a cold trap added. For example, compounds containing hydrogen atoms such as water (HO) (more preferably compounds containing carbon atoms) The high pumping capacity of the cryopumps allows the deposition chamber to be evacuated using a cryopump. The concentration of impurities contained in the compound semiconductor film can be reduced.

[0208] In addition, when the oxide semiconductor film 110 is formed by a sputtering method, The relative density (filling rate) of the metal oxide target used for film formation is 90% or more and 100% or less. Preferably, the density is 95% or more and 100% or less. This allows the deposited film to be a dense film.

[0209] Note that the oxide semiconductor film 110 was formed while the substrate 102 was kept at a high temperature. Forming a film having a thickness of 100 nm or less is also effective in reducing the concentration of impurities that may be contained in the oxide semiconductor film. The temperature to which the substrate 102 is heated may be preferably 150° C. or higher and 450° C. or lower. For example, the substrate temperature may be set to 200° C. or higher and 350° C. or lower.

[0210] Next, a first heat treatment is preferably performed. The first heat treatment is performed at a temperature of 250° C. or higher and 650° C. Preferably, the temperature is 300°C or higher and 500°C or lower, and the inert gas atmosphere and the oxidizing gas atmosphere are used. The first heat treatment may be carried out in an atmosphere containing 10 ppm or more or under reduced pressure. After heat treatment in an inert gas atmosphere, an oxidizing gas is added to replace the oxygen that has been removed. The first heat treatment may be performed in an atmosphere containing 0 ppm or more of fluorine. The crystallinity of the oxide semiconductor used for the first insulating film 108 is increased, and the first insulating film 108 and the oxide semiconductor film Impurities such as hydrogen and water can be removed from the oxide semiconductor film 110. A first heating step may be carried out before processing the particles into islands.

[0211] Charges trapped in the trap states of the oxide semiconductor film take a long time to disappear. Therefore, oxides with high trap level density can behave as if they are fixed charges. Transistors in which the channel region is formed in a semiconductor film may have unstable electrical characteristics. The impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, and the like.

[0212] The oxide semiconductor film 110 is an oxide semiconductor film having a low impurity concentration and a low density of defect states. By using this, a transistor having excellent electrical characteristics can be manufactured. Here, the low impurity concentration and low defect level density (low oxygen vacancies) are called high purity intrinsic or substantially high purity intrinsic. Since the conductive film has a small number of carrier generation sources, the carrier density can be reduced. The transistor in which the channel region is formed in the oxide semiconductor film has a negative threshold voltage. It is rare for the electrical characteristics to become unstable (also known as normally-on). Alternatively, a substantially highly pure intrinsic oxide semiconductor film has a low density of defect states, and therefore, traps The level density may also be lower. The compound semiconductor film has a significantly small off-state current and a channel width of 1×10 6 The channel length L in μm Even with a 10 μm element, the voltage between the source and drain electrodes (drain voltage) is 1 V. In the range of 10V to 10V, the off-state current is below the measurement limit of the semiconductor parameter analyzer. That is, 1 x 10 -13 It can achieve a characteristic of A or below.

[0213] Therefore, the high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor film has a channel region. The transistors in which this region is formed have small fluctuations in electrical characteristics and are highly reliable. It is possible.

[0214] <Source Electrode and Drain Electrode> Materials that can be used for the conductive film 112a and the conductive film 112b include aluminum. , titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tungsten A single layer structure or a metal such as aluminum or tungsten, or an alloy with this as the main component It can be used as a laminated structure. In particular, aluminum, chromium, copper, tantalum, titanium It is preferable that the alloy contains one or more elements selected from the group consisting of titanium, molybdenum, and tungsten. For example, a two-layer structure in which a titanium film is laminated on an aluminum film, or a titanium film on a tungsten film, Two-layer structure: a copper film laminated on a copper-magnesium-aluminum alloy film , a titanium film or a titanium nitride film, and an aluminum film overlaid on the titanium film or the titanium nitride film. A three-layer structure in which an aluminum or copper film is laminated and a titanium or titanium nitride film is formed on top of that. Structure, molybdenum film or molybdenum nitride film, and the molybdenum film or molybdenum nitride film An aluminum film or copper film is laminated on top of the film, and a molybdenum film or a nitride film is then laminated on top of that. There are three-layer structures that form a molybdenum oxide film. A transparent conductive material containing zinc may be used. The conductive film may be formed by, for example, sputtering. It can be formed using

[0215] <Protective insulating film> The second insulating film 120 is exemplified by a three-layer laminate structure of insulating films 114, 116, and 118. The structure of the second insulating film 120 is not limited to this, and may be, for example, a single-layer structure or a two-layer laminate structure. Alternatively, a laminated structure of four or more layers may be used.

[0216] The insulating films 114 and 116 are formed by interfacing with the oxide semiconductor used as the oxide semiconductor film 110. In order to improve the surface characteristics, inorganic insulating materials containing oxygen can be used. Examples of the insulating material include a silicon oxide film and a silicon oxynitride film. The insulating films 114 and 116 are formed by using, for example, the PE-CVD method. can be done.

[0217] The thickness of the insulating film 114 is 5 nm or more and 150 nm or less, preferably 5 nm or more and 50 nm or less. The thickness of the insulating film 116 can be set to 30 nm or more, preferably 10 nm or more and 30 nm or less. The thickness can be 0 nm or more and 500 nm or less, preferably 150 nm or more and 400 nm or less. do.

[0218] In addition, the insulating films 114 and 116 can be made of the same material. In some cases, the interface between the insulating film 114 and the insulating film 116 cannot be clearly confirmed. In this embodiment, the interface between the insulating film 114 and the insulating film 116 is shown by a broken line. In the embodiment, the two-layer structure of the insulating film 114 and the insulating film 116 has been described. However, the present invention is not limited to this, and examples thereof include a single layer structure of the insulating film 114, a single layer structure of the insulating film 116, and a three-layer structure. A laminated structure of more than one layer may also be used.

[0219] The insulating film 118 is free from external impurities such as water, alkali metals, and alkaline earth metals. The film is formed of a material that prevents diffusion of hydrogen into the oxide semiconductor film 110. nothing.

[0220] An example of the insulating film 118 is a silicon nitride film having a thickness of 150 nm or more and 400 nm or less. In this embodiment, the insulating film 118 may be a silicon oxide film or the like. A silicon nitride film with a thickness of 150 nm is used.

[0221] The silicon nitride film is formed at a high temperature to improve its ability to block impurities. For example, the substrate temperature is preferably 100° C. or higher and lower than the distortion point of the substrate, more preferably 3 It is preferable to form the film by heating at a temperature of 00°C or higher and 400°C or lower. In this case, oxygen is released from the oxide semiconductor used as the oxide semiconductor film 110, and the carrier concentration Since a phenomenon in which the temperature rises may occur, the temperature should be set at a level at which such a phenomenon does not occur.

[0222] <<Configuration Example 2 of Oxide Semiconductor Transistor>> 14 shows a structural example of an oxide semiconductor transistor different from the transistor 150 in FIG. 13. vinegar.

[0223] 14A is a top view of the transistor 300, and FIG. 14B is a top view of the transistor 300 shown in FIG. 14A. 14(C) is a cross-sectional view taken along the dashed line Y1-Y in FIG. 14(A). 14B is a cross-sectional view of the transistor 300 in the channel length direction. 14(C) is a cross-sectional view of the transistor 300 in the channel width direction. In FIG. 14(A), for clarity, some of the components are omitted.

[0224] The transistor 300 includes a conductive film 361 formed on a substrate 362 and a conductive film 362 and a conductive film 363 formed on the substrate 362. An insulating film 364 on the film 361, an oxide semiconductor film 366 on the insulating film 364, and an oxide semiconductor The conductive film 370a, the conductive film 370b, and the insulating film 372 are in contact with the film 366. The conductive film 374 overlaps with the oxide semiconductor film 366 with an intervening film. An insulating film 376 is provided on the substrate 300.

[0225] In the transistor 300, the conductive film 374 functions as a first gate electrode. The insulating film 361 functions as a second gate electrode. The insulating film 364 functions as a first gate insulating film. .

[0226] In the transistor 300, the conductive film 370a serves as one of a source electrode and a drain electrode. The conductive film 370b functions as the other of the source electrode and the drain electrode. do.

[0227] As shown in FIG. 14C, the conductive film 374 is provided on the insulating film 372 and the insulating film 364. The transistor 300 is connected to the conductive film 361 through the opening 389. As with the transistor 150, the same potential is applied to the first gate electrode and the second gate electrode. Therefore, the on-current is increased, the initial characteristic variation is reduced, and the deterioration of the GBT stress test is suppressed. It is also possible to suppress fluctuations in the on-current rise voltage at different drain voltages.

[0228] In addition, in the transistor 300, the conductive film 374 and the conductive film 361 are not connected to each other, but are formed as different films. In this way, the threshold voltage of the transistor 300 can be set to It can be controlled.

[0229] Depending on the circumstances, the conductive film 361 may be omitted.

[0230] In the oxide semiconductor film 366, the conductive films 370a, 370b, and 374 overlap. The region where oxygen vacancies do not occur contains elements that form oxygen vacancies. , will be explained as impurity elements. Typical examples of impurity elements include hydrogen and rare gas elements. Representative examples of rare gas elements are helium, neon, argon, krypton, and xenon. Furthermore, impurity elements include boron, carbon, nitrogen, fluorine, aluminum, and silicon. The oxide semiconductor film 366 may contain elements such as phosphorus and chlorine.

[0231] The insulating film 376 is a film containing hydrogen, and is typically a nitride insulating film. When the insulating film 376 is in contact with the oxide semiconductor film 366, hydrogen contained in the insulating film 376 is absorbed by the oxide semiconductor film 366. As a result, in a region where the oxide semiconductor film 366 is in contact with the insulating film 376, It contains a lot of hydrogen.

[0232] When a rare gas element is added to an oxide semiconductor film as an impurity element, the gold in the oxide semiconductor film is The bond between the metal element and oxygen is broken, and oxygen vacancies are formed. The interaction between the electron vacancy and hydrogen increases the electrical conductivity of the oxide semiconductor film. When hydrogen enters the oxygen vacancies contained in the semiconductor film, carriers (electrons) are generated. As a result, the conductivity is high.

[0233] For details of the substrate 362, please refer to the description of the substrate 102 in FIG.

[0234] The details of the conductive film 361 and the conductive film 374 are the same as those of the conductive film 104 and the conductive film 122 in FIG. Please refer to the following.

[0235] The details of the conductive film 370a and the conductive film 370b are the same as those of the conductive film 112a and the conductive film 112b in FIG. Please refer to the description in b.

[0236] For details of the oxide semiconductor film 366, refer to the description of the oxide semiconductor film 110 in FIG. .

[0237] The insulating film 364 can be formed as a single layer or a stack of an oxide insulating film or a nitride insulating film. Note that in order to improve the interface characteristics with the oxide semiconductor film 366, At least a region in contact with the oxide semiconductor film 366 is preferably formed using an oxide insulating film. In addition, by using an oxide insulating film that releases oxygen by heating as the insulating film 364, By the heat treatment, oxygen contained in the insulating film 364 can be transferred to the oxide semiconductor film 366. It is possible.

[0238] The thickness of the insulating film 364 is 50 nm or more, or 100 nm or more and 3000 nm or less, or 20 By making the insulating film 364 thick, the insulating film 364 can be made to have a thickness of 0 nm or more and 1000 nm or less. The amount of oxygen released from the insulating film 364 can be increased, and the insulating film 364 and the oxide semiconductor film The interface states at the interface with the oxide semiconductor film 366 and the oxide semiconductor film 366 included in the channel region are It is possible to reduce oxygen vacancies.

[0239] The insulating film 364 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or nitride. Silicon, aluminum oxide, hafnium oxide, gallium oxide, etc. may be used. It may be provided in layers or laminates.

[0240] The insulating film 372 can be formed as a single layer or a stack of an oxide insulating film or a nitride insulating film. Note that in order to improve the interface characteristics with the oxide semiconductor film 366, At least a region in contact with the oxide semiconductor film 366 is preferably formed using an oxide insulating film. The insulating film 372 is preferably made of, for example, silicon oxide, silicon oxynitride, or silicon nitride oxide. If silicon dioxide, silicon nitride, aluminum oxide, hafnium oxide, or gallium oxide is used, It may be provided as a single layer or a laminate.

[0241] In addition, an insulating film having a blocking effect against oxygen, hydrogen, water, etc. is provided as the insulating film 372. This allows oxygen to diffuse from the oxide semiconductor film 366 to the outside and oxygen to flow from the outside to the oxide semiconductor film 366. It can prevent hydrogen, water, etc. from entering 366. Blocking effect of oxygen, hydrogen, water, etc. Examples of insulating films having the above structure include aluminum oxide, aluminum oxynitride, gallium oxide, and oxide. Gallium oxide nitride, yttrium oxide, yttrium oxynitride, hafnium oxide, yttrium oxynitride Hafnium, etc.

[0242] The insulating film 372 is made of hafnium silicate (HfSiO x ), nitrogen added Hafnium silicate (HfSi x O y N z ), nitrogen-doped hafnium aluminate HfAl x O y N z ), high-k materials such as hafnium oxide and yttrium oxide By using this, the gate leakage of the transistor can be reduced.

[0243] In addition, by using an oxide insulating film that releases oxygen by heating as the insulating film 372, By the heat treatment, oxygen contained in the insulating film 372 can be transferred to the oxide semiconductor film 366. It is possible.

[0244] The thickness of the insulating film 372 is 5 nm or more and 400 nm or less, or 5 nm or more and 300 nm or less, or can be 10 nm or more and 250 nm or less.

[0245] (Fourth embodiment) In this embodiment mode, a display device and a semiconductor device including the display device will be described.

[0246] By incorporating a flexible display device, electronic devices can be made more reliable and resistant to repeated bending. We can provide equipment and lighting devices.

[0247] Examples of electronic devices include television sets (also known as televisions or television receivers). (c), computer monitors, digital cameras, digital video cameras, digital Photo frames, mobile phones (also called mobile phones or mobile phone devices), portable game consoles, mobile phones Examples include portable information terminals, audio playback devices, and large game machines such as pachinko machines. Electronic equipment may be mounted on the interior or exterior walls of a house or building, or on the curved interior or exterior surfaces of a vehicle. It is also possible to incorporate it along the same lines. Figure 15 shows an example of the configuration of an electrical device. The display device of the second embodiment, for example, can be incorporated into the display unit of the device.

[0248] A mobile phone 7400 shown in FIG. 15A includes a display portion 7402 incorporated in a housing 7401. In addition, there are operation buttons 7403, an external connection port 7404, a speaker 7405, a microphone Note that the mobile phone 7400 is an input / output device according to one embodiment of the present invention. The device is manufactured by using it as the display portion 7402. It is possible to provide a highly reliable mobile phone with a high yield. 00, information can be input by touching the display portion 7402 with a finger or the like. Any operation such as making a call or entering text can be performed by touching the display portion 7402 with a finger or the like. Also, by operating the operation button 7403, the power can be turned on or off. It is possible to switch between ON and OFF operations and the type of image displayed on the display portion 7402 . For example, you can switch from the email creation screen to the main menu screen.

[0249] FIG. 15(B) shows an example of a wristwatch-type portable information terminal. The information terminal 7100 includes a housing 7101, a display unit 7102, a band 7103, and a buckle 710. 4, operation buttons 7105, input / output terminals 7106, etc. The mobile information terminal 7100 is Mobile phone, e-mail, viewing and writing text, music playback, internet communication, computers The display unit 7102 can run various applications such as games. The display surface is curved, and the display can be performed along the curved display surface. The display unit 7102 is equipped with a touch sensor and can be operated by touching the screen with a finger or a stylus. For example, by touching the icon 7107 displayed on the display unit 7102, The application can be launched.

[0250] The operation button 7105 is used to set the time, turn the power on and off, and turn wireless communication on and off. It has various functions such as operation, silent mode activation and deactivation, power saving mode activation and deactivation, etc. For example, an operating system installed in the portable information terminal 7100 can The system also allows the functions of the operation buttons 7105 to be freely set. The 7100 is capable of performing short-range wireless communication according to a communication standard. You can also make hands-free calls by connecting to a compatible headset. The portable information terminal 7100 also has an input / output terminal 7106, and can be connected to other information terminals via a connector. Data can be exchanged directly through the input / output terminal 7106. Charging can also be performed. Note that the charging operation is performed by wireless power supply without going through the input / output terminal 7106. You may go there.

[0251] The display panel of the second embodiment can be made to function as a flat light source. The display panel is appropriately called a light-emitting panel or a light source panel. An example of an electronic device equipped with a light source is shown in FIG. 15C. The light source has a base 7201 with an operating switch 7203 and a light emitting unit supported by the base 7201. The display panel is built into the light-emitting part. The light-emitting part is made of plastic material, a movable frame, etc. The light emitting surface of the light emitting portion may be configured to be freely curved depending on the application. FIG. 15(C) illustrates an example of a lighting device in which a light-emitting unit is supported by a base. The housing including the unit can be fixed to the ceiling or can be suspended from the ceiling. The light-emitting surface can be curved, so a specific area can be illuminated by curving the light-emitting surface concavely. It can be used to illuminate a small area, or the light-emitting surface can be curved convexly to illuminate an entire room.

[0252] The electronic devices and lighting devices to which one embodiment of the present invention is applied are not limited to flexible products. An example of such an electronic device is shown in FIG. 15(D). The display device 700 shown in FIG. The display device 7000 includes a housing 7001, a display unit 7002, a support base 7003, and the like.

[0253] 15(E) and (F) show an example of a portable touch panel. Touch panel 7300 7301, a display unit 7302, operation buttons 7303, a drawer member 7304, a control The touch panel 7300 is rolled up in a cylindrical housing 7301. The touch panel 7300 is connected to a control unit 7305. Therefore, a video signal can be received, and the received video can be displayed on the display portion 7302 . The control unit 7305 is equipped with a battery. The device may be configured to have a terminal section for connecting to the device, and to supply video signals and power directly from the outside via a wire. In addition, the operation button 7303 can be used to turn the power on and off and to change the image to be displayed. You can make changes, etc.

[0254] FIG. 15(F) shows a touch screen device in a state where the display unit 7302 is pulled out by the pull-out member 7304. In this state, an image can be displayed on the display unit 7302. In addition, the operation button 7303 arranged on the surface of the housing 7301 allows for easy operation with one hand. 15(E), the operation button 7303 can be attached to the center of the housing 7301. By arranging the display unit 730 to one side, it can be easily operated with one hand. When the display unit 7302 is pulled out, the display surface of the display unit 7302 is fixed to be flat. A frame for reinforcement may be provided on the side of the housing 7302. It can also be configured to incorporate a speaker and output audio using the audio signal received along with the video signal. good.

[0255] 16(A)-16(C) show examples of the configuration of a foldable mobile information terminal 810. 16(B) shows the portable information terminal 810 in the unfolded state. The mobile information terminal 810 is in the process of changing from one folded state to the other. 8C) shows the portable information terminal 810 in a folded state. When folded, it is highly portable, and when unfolded, it has a seamless, wide display area for easy viewing. Excellent overview.

[0256] The display panel 816 is supported by three housings 815 connected by hinges 818. The two housings 815 are bent via the hinge 818, and the portable information terminal 81 0 can be reversibly transformed from an unfolded state to a folded state. A display panel with a touch panel that can be bent with a bending radius of 1 mm or more and 150 mm or less is used. It can detect whether the display panel is folded or unfolded, A sensor for supplying detection information may be provided. The folded part (or the folded part) is obtained from the user. It is also possible to control the operation of the part that is no longer visible. The display of the touch panel may be stopped. Also, the detection by the touch sensor may be stopped. It acquires information indicating that the roll is in the expanded state and detects it by displaying it or by using the touch sensor. Control may be performed to restart the operation.

[0257] 16(D) and 16(E) show a foldable mobile information terminal 820. 16(E) shows the portable information terminal 820 in a folded state with the section 822 facing outwards. ) shows the portable information terminal 820 in a folded state with the display unit 822 facing inward. When the mobile information terminal 820 is not in use, the non-display section 825 is folded outward to hide the display. The input / output device of one embodiment of the present invention can be used for the display portion 822. You can be there.

[0258] Fig. 16(F) is a perspective view illustrating the external shape of the mobile information terminal 880. 16(H) is a top view of the portable information terminal 880. FIG.

[0259] The portable information terminals 880 and 840 are, for example, a telephone, a notebook, an information viewing device, or the like. Specifically, each device can be used as a smartphone. The mobile information terminals 880 and 840 can display text and image information on multiple surfaces. For example, three operation buttons 889 can be displayed on one surface (see FIG. 16(F)). ), H). Also, information 887 shown in the dashed rectangle can be displayed on another surface (see FIG. 16). (G), H). Examples of information 887 include SNS (social networking) Notifications of services, notifications of incoming e-mails and phone calls, and titles of e-mails, etc. Name, sender name (e.g. email), date and time, battery level, antenna reception strength, etc. Or, instead of the information 887, an operation button is displayed where the information 887 is displayed. The button 889, icon, etc. may be displayed.

[0260] 16(F) and (G) show examples in which information 887 is displayed on the upper side, but the present invention is not limited to this. For example, even if it is displayed on the side, as in the mobile information terminal 840 shown in FIG. For example, the user of the mobile information terminal 880 may carry the mobile information terminal 880 in the breast pocket of his / her clothes. When the item is stored, you can check the display (information 887 in this case). The telephone number or name of the caller of the incoming call is observed from above the mobile information terminal 880. The user can easily access the mobile information terminal 880 without taking it out of his / her pocket. You can check the display and decide whether to answer the call or not. Also, like the portable information terminal 845 shown in FIG. 16(I), information may be displayed on three or more screens. Here, information 855, information 856, and information 857 are displayed on different sides. Here is an example:

[0261] (Embodiment 5) In this embodiment, a crystal structure of an oxide semiconductor film that can be used in one embodiment of the present invention will be described. Explanations will be given.

[0262] In this specification, "parallel" means that two straight lines are at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. "Approximately parallel" means that two straight lines are arranged at an angle of between -30° and 30°. Also, "perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it also includes the case where the angle is between 85° and 95°. refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0263] In addition, in this specification, when the crystal is a trigonal or rhombohedral crystal, it is expressed as a hexagonal crystal system. .

[0264] The structure of the oxide semiconductor film will be described below.

[0265] Oxide semiconductor films are classified into non-single-crystal oxide semiconductor films and single-crystal oxide semiconductor films. Alternatively, oxide semiconductors can be divided into, for example, crystalline oxide semiconductors and amorphous oxide semiconductors. do.

[0266] As a non-single-crystal oxide semiconductor, CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor, polycrystalline oxide Semiconductors, microcrystalline oxide semiconductors, amorphous oxide semiconductors, etc. The materials include single-crystalline oxide semiconductors, CAAC-OS, polycrystalline oxide semiconductors, and microcrystalline oxides. Semiconductors, etc.

[0267] First, the CAAC-OS film will be described.

[0268] The CAAC-OS film is one of oxide semiconductor films having a plurality of crystal parts aligned along the c-axis.

[0269] Transmission Electron Microscope (TEM) A bright-field image and a combined analysis image of the diffraction pattern of the CAAC-OS film were obtained by using a microscope. By observing the TEM image, multiple crystalline regions can be identified. On the other hand, high-resolution TEM images also reveal clear boundaries between crystalline parts, i.e., grain boundaries. Therefore, the CAAC-OS film is It can be said that the decrease in electron mobility caused by grain boundaries is unlikely to occur.

[0270] When a high-resolution TEM image of the cross section of the CAAC-OS film was observed from a direction approximately parallel to the sample surface, It can be seen that the metal atoms are arranged in layers in the crystalline part. Each layer of metal atoms is The CAAC-OS film is formed on a surface (also called a surface to be formed) or on a surface that reflects the unevenness of the surface. The CAAC-OS film has a shape and is aligned parallel to the surface on which the film is formed or the upper surface.

[0271] On the other hand, a high-resolution TEM image of the plane of the CAAC-OS film was observed from a direction approximately perpendicular to the sample surface. It was confirmed that the metal atoms in the crystals were arranged in a triangular or hexagonal shape. However, there is no regularity in the arrangement of metal atoms between different crystal parts.

[0272] X-ray diffraction (XRD) was performed on the CAAC-OS film. For example, a CAAC-OS film with InGaZnO4 crystals was found by structural analysis using the device. In the out-of-plane analysis, a peak was observed at a diffraction angle (2θ) of approximately 31°. This peak is attributed to the (009) plane of the InGaZnO4 crystal. Therefore, the crystals of the CAAC-OS film have a c-axis orientation, and the c-axis is approximately aligned on the surface on which the film is formed or on the upper surface. You can see that it is oriented vertically.

[0273] In addition, the out-of-plane method of CAAC-OS film with InGaZnO4 crystals In the analysis by , in addition to the peak at 2θ around 31°, a peak also appeared at 2θ around 36°. The peak at 2θ around 36° is due to the presence of c-axis orientation in part of the CAAC-OS film. The CAAC-OS film contains crystals that do not have a 2θ of around 31°. It is preferable that the peak is exhibited at 2θ of around 36° and that the peak is not exhibited at 2θ of around 36°.

[0274] The CAAC-OS film is an oxide semiconductor film with a low concentration of impurities. These are elements other than the main components of the oxide semiconductor film, such as silicon and transition metal elements. The elements that bond to oxygen more strongly than the metal elements that constitute the oxide semiconductor film, such as fluorine, are oxidized. By removing oxygen from the oxide semiconductor film, the atomic arrangement of the oxide semiconductor film is disrupted, reducing its crystallinity. In addition, heavy metals such as iron and nickel, argon, and carbon dioxide have an atomic radius (or molecular radius) is large, and when it is contained inside the oxide semiconductor film, The impurities contained in the oxide semiconductor film are likely to disturb the atomic arrangement and cause a decrease in crystallinity. Objects can act as carrier traps or carrier sources.

[0275] The CAAC-OS film is an oxide semiconductor film with a low density of defect states. Oxygen vacancies in the semiconductor film can become carrier traps or trap hydrogen, It can be a source of carrier generation.

[0276] Low impurity concentration and low defect level density (low oxygen vacancies) are called high purity intrinsic or The term "substantially highly purified intrinsic" refers to a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film. Since there are fewer carrier generation sources, the carrier density can be reduced. The transistor using the oxide semiconductor film has electrical characteristics ( It is also called normally-on.) It is rare for it to become a high-purity intrinsic or substantially high-purity The intrinsic oxide semiconductor film has few carrier traps. Transistors using this film have little fluctuation in electrical characteristics and are highly reliable. Note that it takes time for the charges trapped in the carrier traps in the oxide semiconductor film to be released. The impurity concentration is high and the charge is stable for a long time, so the charge may behave like a fixed charge. Therefore, a transistor using an oxide semiconductor film with a high density of defect states has unstable electrical characteristics. This may occur.

[0277] In addition, transistors using CAAC-OS films show improved electrical characteristics when irradiated with visible light or ultraviolet light. The fluctuation is small.

[0278] Next, a microcrystalline oxide semiconductor film will be described.

[0279] The microcrystalline oxide semiconductor film has a region where crystals can be confirmed in a high-resolution TEM image. The microcrystalline oxide semiconductor film has a crystal structure including a crystal region and a crystal region where no clear crystal part can be identified. The crystal part contained in the crystal has a size of 1 nm to 100 nm or 1 nm to 10 nm. In particular, the fine particles are often between 1 nm and 10 nm, or between 1 nm and 3 nm. The oxide semiconductor film having nanocrystals (nc) is called nc -OS(nanocrystalline oxide semiconductor) In addition, the nc-OS film has clearly defined grain boundaries in high-resolution TEM images. It may not be possible to recognize it.

[0280] The nc-OS film is a microscopic region (e.g., a region of 1 nm to 10 nm, especially a region of 1 nm or more). The nc-OS film has a periodic atomic arrangement in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystal parts. Therefore, no orientation is observed throughout the film. Therefore, the nc-OS film cannot be distinguished from an amorphous oxide semiconductor film depending on the analysis method. For example, X-ray diffraction (XR) using X-rays with a diameter larger than that of the crystals is used for nc-OS films. When structural analysis is performed using the D device, the crystal plane is In addition, the peaks indicating the probes larger than the crystalline part were not detected in the nc-OS film. Electron diffraction (also called selected area electron diffraction) using an electron beam with a diameter (for example, 50 nm or more) When the diffraction pattern is changed to 0.05μm, a halo-like diffraction pattern is observed. Nanobeam electrons are used, which use an electron beam with a probe diameter close to or smaller than the size of the crystal part. When diffraction is performed, spots are observed. If you do this, you may observe a circular (ring-shaped) area of ​​high brightness. When nanobeam electron diffraction was performed on the nc-OS film, multiple spots were observed within the ring-shaped region. It may be observed.

[0281] The nc-OS film is an oxide semiconductor film with higher order than an amorphous oxide semiconductor film. Therefore, the nc-OS film has a lower density of defect states than the amorphous oxide semiconductor film. In the nc-OS film, there is no regularity in the crystal orientation between different crystal parts. The S film has a higher defect state density than the CAAC-OS film.

[0282] Next, the amorphous oxide semiconductor film will be described.

[0283] The amorphous oxide semiconductor film has an irregular atomic arrangement in the film and is an oxide film that does not have a crystalline portion. An example is an oxide semiconductor film that has an amorphous state, such as quartz.

[0284] In the amorphous oxide semiconductor film, no crystalline portion can be confirmed in a high-resolution TEM image.

[0285] When the structure of the amorphous oxide semiconductor film is analyzed using an XRD device, out-of-p In the analysis by the Lane method, no peaks indicating crystal planes were detected. When electron diffraction is performed on a conductive film, a halo pattern is observed. When nanobeam electron diffraction is performed on a conductive film, no spots are observed, and a halo pattern is observed. Observed.

[0286] The oxide semiconductor film has a structure that exhibits physical properties between the nc-OS film and the amorphous oxide semiconductor film. An oxide semiconductor film having such a structure may be used, particularly, for amorphous-like oxidation. Amorphous-like Oxide Semiconductor (a-like OS) The membrane is called a conductor membrane.

[0287] In the a-like OS film, voids are observed in high-resolution TEM images. In addition, crystals can be clearly seen in high-resolution TEM images. The a-like OS film has a region where the crystal part is not observed and a region where the crystal part is not observed. Crystallization occurs due to the small amount of electron irradiation, which is the level observed with a TEM, and the growth of the crystals can be seen. On the other hand, if the nc-OS film is of good quality, the small amount of charge observed by TEM can be detected. Almost no crystallization due to electron irradiation is observed.

[0288] The size of the crystalline parts of the a-like OS film and the nc-OS film was measured using a high-resolution T This can be done using EM images. For example, InGaZnO4 crystals have a layered structure, There are two Ga-Zn-O layers between the In-O layers. The structure has three In-O layers and six Ga-Zn-O layers, for a total of nine layers aligned in the c-axis direction. Therefore, the spacing between these adjacent layers is The lattice spacing (also called the d value) is approximately the same as the value of 0.29 nm from crystal structure analysis. Therefore, we focused on the lattice fringes in high-resolution TEM images and calculated the spacing between the lattice fringes. In the region where the distance is between 0.28 nm and 0.30 nm, each lattice fringe is InG aIt corresponds to the ab plane of the ZnO4 crystal.

[0289] In addition, the density of an oxide semiconductor film may differ depending on the structure. If the composition of the oxide film is known, the density can be compared with that of a single-crystal oxide semiconductor film having the same composition. By this method, the structure of the oxide semiconductor film can be estimated. The density of a-like OS film is 78.6% or more and less than 92.3% of the density of semiconductor film. For example, the density of the nc-OS film and The density of the CAAC-OS film is 92.3% or more and less than 100%. It is difficult to form an oxide semiconductor film with a density of less than 78% of the density of the semiconductor film. be.

[0290] The above will be explained using a specific example. For example, In:Ga:Zn=1:1:1 [atomic In the oxide semiconductor film that satisfies the numerical ratio, single crystal InGaZnO4 with a rhombohedral crystal structure The density of 3 Therefore, for example, In:Ga:Zn=1:1:1 In an oxide semiconductor film that satisfies the atomic ratio, the density of the a-like OS film is 5.0g / cm 3 More than 5.9g / cm 3 For example, In:Ga:Zn=1:1: In the oxide semiconductor film satisfying the atomic ratio of 1, the density and CAAC- The density of the OS film is 5.9 g / cm 3 More than 6.3g / cm 3 It will be less than.

[0291] In some cases, single crystals with the same composition do not exist. In such cases, crystals with different compositions at any ratio are used. By combining single crystals, it is possible to calculate the density corresponding to a single crystal of the desired composition. The density of a single crystal of a desired composition can be determined by the ratio of the single crystals of different compositions combined. However, the density should be calculated using as few types of single crystals as possible. It is preferable to calculate them in combination.

[0292] The oxide semiconductor film may be, for example, an amorphous oxide semiconductor film, an a-like OS film, or a finely crystalline oxide semiconductor film. The film may be a stacked film including two or more of a crystalline oxide semiconductor film and a CAAC-OS film. [Explanation of symbols]

[0293] 10 Semiconductor devices 20 Semiconductor Devices 30 Driver IC 41 AND 42 Inverter 43 TRIBUF 50 operational amplifiers 51 Capacitor element 52 Switch 53 Integral circuit 57 Latch 58 Counter 59 Comparator 63 circuits 64 Latch 65 Counter 66 Comparator 102 Circuit Board 104 Conductive film 106 insulating film 107 Insulating film 108 insulating film 110 Oxide semiconductor film 112a Conductive film 112b Conductive film 114 insulating film 116 Insulating film 118 insulating film 120 insulating film 122 Conductive film 142e aperture 150 transistors 200 Display device 210 Pixel section 211 pixels 211_B pixels 211_G pixels 211_R pixels 215 Power line 220 Peripheral Circuits 220a Peripheral circuit 221 Gate driver circuit 222 Source driver circuit 223 Monitor Circuit 224 ADC 230 CPU 231 Control circuit 232 Power supply circuit 233 Image Processing Circuit 234 memory 250 display panel 251 Printed Circuit Board 252 Touch Panel Unit 253 Battery 255 FPC 256 FPC 258-1 Upper cover 258-2 Lower cover 259 frames 260 boards 261 Circuit Board 262 areas 270 IC 300 transistors 361 Conductive Film 362 PCB 364 Insulating Film 366 Oxide semiconductor film 370a Conductive film 370b Conductive film 372 insulating film 374 Conductive Film 376 Insulating Film 389 Aperture 501 OS layer 502 OS layer 511 Conductive layer 512 Conductive layer 513 Conductive layer 521 Conductive layer 522 Conductive layer 523 Conductive Layer 524 Conductive Layer 531 Conductive layer 532 Conductive layer 533 Conductive Layer 541 Conductive Layer 542 Conductive layer 543 Conductive Layer 544 Conductive Layer 550 Conductive layer 551 Conductive layer 552 Conductive layer 553 EL layer 555 light 571 Insulating Layer 572 Insulating layer 574 Insulating Layer 576 Insulating Layer 580 Light blocking layer 581 Color filter layer 582 Overcoat layer 810 Mobile Information Terminals 815 Case 816 Display Panel 818 Hinge 820 Mobile Information Terminal 822 Display section 825 Hidden part 840 Mobile Information Terminals 845 Mobile Information Terminals 855 Information 856 Information 857 Information 880 Mobile Information Terminals 887 Information 889 Operation Button 7000 display device 7001 Case 7002 Display section 7003 Support stand 7100 Mobile Information Terminal 7101 Housing 7102 Display section 7103 Band 7104 Buckle 7105 Operation button 7106 Input / output terminal 7107 Icon 7201 Daibu 7203 Operation switch 7210 Lighting equipment 7300 Touch Panel 7301 Housing 7302 Display section 7303 Operation button 7304 Materials 7305 Control Unit 7400 mobile phone 7401 Housing 7402 Display section 7403 Operation button 7404 External connection port 7405 Speaker 7406 Microphone

Claims

1. A pixel having a light-emitting element, a first transistor to a third transistor, and a first wiring to a third wiring, One of the source electrode or drain electrode of the first transistor is electrically connected to the first wiring to which the video signal is input. Either the source electrode or the drain electrode of the third transistor is electrically connected to the third wiring. The source electrode or drain electrode of the third transistor, the other of which is electrically connected to the anode electrode of the light-emitting element, The first transistor has the function of controlling the input of the video signal to the pixel, The second transistor is a light-emitting device having the function of controlling the current flowing between the second wiring and the light-emitting element according to the potential corresponding to the video signal, A semiconductor film having a channel formation region for the third transistor, A first conductive film having a region positioned above the semiconductor film, functioning as either the source electrode or the drain electrode of the third transistor, and functioning as the third wiring, A second conductive film having a region positioned above the semiconductor film and functioning as the other of the source electrode or drain electrode of the third transistor, A third conductive film having a region positioned above the semiconductor film and functioning as the gate electrode of the third transistor, A first insulating film having a region positioned above the first conductive film, a region positioned above the second conductive film, and a region positioned above the third conductive film, A fourth conductive film having a region positioned above the first insulating film and electrically connected to the second conductive film, A fifth conductive film having a region positioned above the first insulating film and functioning as the first wiring, A sixth conductive film having a region positioned above the first insulating film and functioning as the second wiring, A second insulating film having a region positioned above the fourth conductive film, a region positioned above the fifth conductive film, and a region positioned above the sixth conductive film, A seventh conductive film having a region positioned above the second insulating film, electrically connected to the fourth conductive film, and functioning as the anode electrode of the light-emitting element, The sixth conductive film has a region that overlaps with the first conductive film. Light-emitting device.

2. A pixel having a light-emitting element, a first transistor to a third transistor, and a first wiring to a third wiring, One of the source electrode or drain electrode of the first transistor is electrically connected to the first wiring to which the video signal is input. Either the source electrode or the drain electrode of the third transistor is electrically connected to the third wiring. The source electrode or drain electrode of the third transistor, the other of which is electrically connected to the anode electrode of the light-emitting element, The first transistor has the function of controlling the input of the video signal to the pixel, The second transistor is a light-emitting device having the function of controlling the current flowing between the second wiring and the light-emitting element according to the potential corresponding to the video signal, A semiconductor film having a channel formation region for the third transistor, A first conductive film having a region positioned above the semiconductor film, functioning as either the source electrode or the drain electrode of the third transistor, and functioning as the third wiring, A second conductive film having a region positioned above the semiconductor film and functioning as the other of the source electrode or drain electrode of the third transistor, A third conductive film having a region positioned above the semiconductor film and functioning as the gate electrode of the third transistor, A first insulating film having a region positioned above the first conductive film, a region positioned above the second conductive film, and a region positioned above the third conductive film, A fourth conductive film having a region positioned above the first insulating film and electrically connected to the second conductive film, A fifth conductive film having a region positioned above the first insulating film and functioning as the first wiring, A sixth conductive film having a region positioned above the first insulating film and functioning as the second wiring, A second insulating film having a region positioned above the fourth conductive film, a region positioned above the fifth conductive film, and a region positioned above the sixth conductive film, A seventh conductive film having a region positioned above the second insulating film, electrically connected to the fourth conductive film, and functioning as the anode electrode of the light-emitting element, Each of the fourth conductive film, the fifth conductive film, and the sixth conductive film has a region that is in contact with the upper surface of the first insulating film. The sixth conductive film has a region that overlaps with the first conductive film. Light-emitting device.

3. A pixel having a light-emitting element, a first transistor to a third transistor, and a first wiring to a third wiring, One of the source electrode or drain electrode of the first transistor is electrically connected to the first wiring to which the video signal is input. The source electrode or drain electrode of the second transistor is electrically connected to the anode electrode of the light-emitting element. The source electrode or the other drain electrode of the second transistor is electrically connected to the second wiring. Either the source electrode or the drain electrode of the third transistor is electrically connected to the third wiring. The source electrode or drain electrode of the third transistor, the other of which is electrically connected to the anode electrode of the light-emitting element, The first transistor has the function of controlling the input of the video signal to the pixel, The second transistor is a light-emitting device having the function of controlling the current flowing between the second wiring and the light-emitting element according to the potential corresponding to the video signal, A semiconductor film having a channel formation region for the third transistor, A first conductive film having a region positioned above the semiconductor film, functioning as either the source electrode or the drain electrode of the third transistor, and functioning as the third wiring, A second conductive film having a region positioned above the semiconductor film and functioning as the other of the source electrode or drain electrode of the third transistor, A third conductive film having a region positioned above the semiconductor film and functioning as the gate electrode of the third transistor, A first insulating film having a region positioned above the first conductive film, a region positioned above the second conductive film, and a region positioned above the third conductive film, A fourth conductive film having a region positioned above the first insulating film and electrically connected to the second conductive film, A fifth conductive film having a region positioned above the first insulating film and functioning as the first wiring, A sixth conductive film having a region positioned above the first insulating film and functioning as the second wiring, A second insulating film having a region positioned above the fourth conductive film, a region positioned above the fifth conductive film, and a region positioned above the sixth conductive film, A seventh conductive film having a region positioned above the second insulating film, electrically connected to the fourth conductive film, and functioning as the anode electrode of the light-emitting element, The sixth conductive film has a region that overlaps with the first conductive film. Light-emitting device.

4. A pixel having a light-emitting element, a first transistor to a third transistor, and a first wiring to a third wiring, One of the source electrode or drain electrode of the first transistor is electrically connected to the first wiring to which the video signal is input. The source electrode or drain electrode of the second transistor is electrically connected to the anode electrode of the light-emitting element. The source electrode or the other drain electrode of the second transistor is electrically connected to the second wiring. Either the source electrode or the drain electrode of the third transistor is electrically connected to the third wiring. The source electrode or drain electrode of the third transistor, the other of which is electrically connected to the anode electrode of the light-emitting element, The first transistor has the function of controlling the input of the video signal to the pixel, The second transistor is a light-emitting device having the function of controlling the current flowing between the second wiring and the light-emitting element according to the potential corresponding to the video signal, A semiconductor film having a channel formation region for the third transistor, A first conductive film having a region positioned above the semiconductor film, functioning as either the source electrode or the drain electrode of the third transistor, and functioning as the third wiring, A second conductive film having a region positioned above the semiconductor film and functioning as the other of the source electrode or drain electrode of the third transistor, A third conductive film having a region positioned above the semiconductor film and functioning as the gate electrode of the third transistor, A first insulating film having a region positioned above the first conductive film, a region positioned above the second conductive film, and a region positioned above the third conductive film, A fourth conductive film having a region positioned above the first insulating film and electrically connected to the second conductive film, A fifth conductive film having a region positioned above the first insulating film and functioning as the first wiring, A sixth conductive film having a region positioned above the first insulating film and functioning as the second wiring, A second insulating film having a region positioned above the fourth conductive film, a region positioned above the fifth conductive film, and a region positioned above the sixth conductive film, A seventh conductive film having a region positioned above the second insulating film, electrically connected to the fourth conductive film, and functioning as the anode electrode of the light-emitting element, Each of the fourth conductive film, the fifth conductive film, and the sixth conductive film has a region that is in contact with the upper surface of the first insulating film. The sixth conductive film has a region that overlaps with the first conductive film. Light-emitting device.

5. In any one of Claims 1 to 4, The semiconductor film includes In, Ga, and Zn. Light-emitting device.

6. In any one of Claims 1 to 5, Having a top emission structure, Light-emitting device.

Images