Communication apparatus, control method, and storage medium

Abstract

To provide a communication apparatus for detecting a switching timing between downlink communication and uplink communication with respect to a radio signal whose reception state is satisfactory, and to provide a control method thereof and a program.SOLUTION: In the wireless communication system, the switching timing generation unit 153 included in the control unit of the master station device includes a signal reception unit that receives an OFDM signal and converts the OFDM signal into a baseband time axis waveform signal, a time waveform calculation unit that extracts a part of the time axis waveform signal which is an output of the signal reception unit and calculates a correlation value between the extracted signal and a known signal, and an SSB timing generation unit that outputs a timing at which a reception state is the best in a predetermined timing detection period based on the correlation value.SELECTED DRAWING: Figure 8

Description

[Technical Field]

[0001] An embodiment of the present invention relates to a communication device, a control method, and a program. [Background technology]

[0002] Distributed Antenna Systems (DAS) are known as one type of wireless communication system. In a distributed antenna system, communication is performed using a time division duplex (TDD) method, which switches between downlink (DL) communication from a base station to a terminal and uplink (UL) communication from a terminal to a base station at predetermined intervals. Such a distributed antenna system needs to detect the DL and UL periods of wireless signals and switch appropriately.

[0003] The distributed antenna system also includes a master station connected to a base station and one or more slave station devices that relay signals between the master station and terminal devices that communicate with the base station. The master station is a communication device that functions as a master station or slave station and receives Orthogonal Frequency Division Multiplexing (OFDM) signals transmitted by a time division multiplexing method. In the distributed antenna system using the TDD method, the master station receives a radio frame including a synchronization signal block (SS / PBCH Block). The SSB includes a primary synchronization signal (PSS), a secondary synchronization signal (SSS), and a physical broadcast channel (PBCH).

[0004] The master station detects and decodes the SSB from the received radio frame to determine the position of the received SSB within the radio frame. The master station then estimates the timing for switching between downstream and upstream communications based on the position of the SSB within the radio frame and the TDD DL / UL pattern. This allows the master station to detect the timing for switching between downstream and upstream communications (TDD switching timing) even when there is no power (signal) in the first symbol of a radio frame, such as a 5G radio signal.

[0005] In the above series of processes for detecting the TDD switching timing, the master station device as a communication device preferably processes the SSB with the best reception status within a predetermined timing detection period. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Publication No. 2024-007110 Summary of the Invention [Problem to be solved by the invention]

[0007] However, in the initial stage of detecting the timing to switch to TDD, it is not possible to know in advance when SSB will be received, or which SSB will provide the best reception condition.

[0008] Therefore, the present invention has been made in consideration of the above circumstances, and aims to provide a communication device, a control method, and a program that can detect the timing to switch between downlink communication and uplink communication for the radio signal with the best reception status within a predetermined timing detection period in a TDD system that switches between DL communication and UL communication at predetermined intervals. [Means for solving the problem]

[0009] A communication device according to an embodiment is in a distributed antenna system including a master station connected to a base station and one or more slave station devices that relay signals between terminal devices communicating with the base station and the master station. The communication device functions as the master station or the slave station and receives an Orthogonal Frequency Division Multiplexing (OFDM) signal transmitted using a time division multiplexing method. The communication device includes a signal receiver, a time waveform calculator, a symbol timing generator, an FFT unit, a frequency waveform calculator, and a switching timing estimation unit. The signal receiver receives the OFDM signal and converts it into a baseband time domain waveform signal. The time waveform calculator extracts a portion of the time domain waveform signal output from the signal receiver and calculates a correlation value between the extracted signal and a known signal. The symbol timing generator outputs timing based on the correlation value. The FFT unit performs an FFT (Fast Fourier Transform) on the time domain waveform signal output from the signal receiver based on the timing. The frequency waveform calculation unit extracts a portion of the frequency axis waveform signal output by the FFT unit and calculates the degree of similarity between the extracted signal and a known signal. The switching timing estimation unit estimates the timing of switching between uplink and downlink communication in the device based on the calculation result of the frequency waveform calculation unit. [Brief explanation of the drawings]

[0010] [Figure 1] FIG. 1 is a diagram illustrating an example of a schematic configuration of a distributed antenna system according to the first embodiment. [Figure 2] FIG. 2 is a diagram illustrating an example of the data structure of a radio frame. [Figure 3] FIG. 3 is a diagram showing an example of an arrangement pattern of SSBs in a radio frame. [Figure 4] FIG. 4 is a diagram showing an example of a DL / UL configuration and an SSB arrangement in a TDD system. [Figure 5] FIG. 5 is a diagram illustrating an example of the functional configuration of the master station device in the first embodiment. [Figure 6]FIG. 6 is a diagram illustrating an example of the functional configuration of the control unit in the first embodiment. [Figure 7A] FIG. 7A is a diagram illustrating an example of a PSS correlation value according to the first embodiment. [Figure 7B] FIG. 7B is a diagram showing an example of a form of beamforming in which multiple SSBs are transmitted using different beams. [Figure 8] FIG. 8 is a diagram illustrating an example of a functional configuration of the switch timing generation unit according to the first embodiment. [Figure 9] FIG. 9 is a diagram illustrating an example of a functional configuration of a PSS detection unit according to the first embodiment. [Figure 10] FIG. 10 is a diagram illustrating an example of a functional configuration of the SSB timing generation unit according to the first embodiment. [Figure 11] FIG. 11 is a diagram illustrating an example of a functional configuration of the SSS detection unit according to the first embodiment. [Figure 12] FIG. 12 is a diagram illustrating an example of a functional configuration of a DMRS detector according to the first embodiment. [Figure 13] FIG. 13 is a flowchart illustrating an example of the TDD detection process according to the first embodiment. [Figure 14] FIG. 14 is a flowchart showing an example of time waveform processing according to the first embodiment. [Figure 15] FIG. 15 is a flowchart showing an example of the SSB timing generation process according to the first embodiment. [Figure 16] FIG. 16 is a flowchart showing an example of the FFT processing according to the first embodiment. [Figure 17] FIG. 17 is a flowchart showing an example of frequency waveform processing according to the first embodiment. [Figure 18] FIG. 18 is a flowchart showing an example of the SSS detection process according to the first embodiment. [Figure 19] FIG. 19 is a flowchart illustrating an example of the DMRS detection process according to the first embodiment. [Figure 20]FIG. 20 is a flowchart showing an example of the switching timing estimation process according to the first embodiment. [Figure 21] FIG. 21 is a diagram illustrating an example of the time required for TDD timing detection according to the first embodiment. [Figure 22] FIG. 22 is a diagram illustrating an example in which the time required for TDD timing detection according to the first embodiment is increased. [Figure 23] FIG. 23 is a diagram illustrating an example of variations in the time required for TDD timing detection according to the first embodiment. [Figure 24] FIG. 24 is a diagram illustrating an example of a functional configuration of an SSB timing generation unit according to the second embodiment. [Figure 25] FIG. 25 is a flowchart showing an example of an SSB timing generation process according to the second embodiment. [Figure 26] FIG. 26 is a flowchart showing an example of FFT processing according to the second embodiment. [Figure 27] FIG. 27 is a diagram illustrating an example of the time required for TDD timing detection according to the second embodiment. [Figure 28] FIG. 28 is a diagram illustrating an example of a functional configuration of a switch timing generation unit according to the third embodiment. [Figure 29] FIG. 29 is a diagram illustrating an example of a functional configuration of an SSB timing generation unit according to the third embodiment. [Figure 30] FIG. 30 is a flowchart showing an example of an SSB timing generation process according to the third embodiment. [Figure 31] FIG. 31 is a diagram illustrating an example of the time required for TDD timing detection according to the third embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0011] The communication device, the control method, and the program will be described in detail below with reference to the accompanying drawings. In the following description of each embodiment and modification, parts with the same reference numerals have substantially the same functions, and the description of overlapping parts will be omitted as appropriate.

[0012] (First embodiment) 1 is a diagram showing an example of a schematic of a distributed antenna system 1 according to the first embodiment. The distributed antenna system 1 includes a master station device 10 (MU), a relay device 45 (HU), a slave station device 47 (RU), and a transmission path 46 connecting these. More specifically, the distributed antenna system 1 includes the master station device 10 connected to a base station 50, and one or more slave station devices 47 that relay signals between the master station device 10 and a terminal device 60 that communicates with the base station 50. The master station device and the slave station devices are examples of communication devices.

[0013] The master station device 10 is connected to a plurality of slave station devices 47 within the distributed antenna system 1. As shown in Fig. 1, the master station device 10 may be connected to a plurality of slave station devices 47 via relay devices 45, or may be connected directly to the master station device 10. Furthermore, as shown in Fig. 1, the master station device 10 may be connected to a plurality of relay devices 45 in cascade.

[0014] The master station device 10 is connected to the base station 50 via a coaxial cable, and transmits and receives wireless signals to and from the base station 50. Here, the wireless signals are signals in a wireless communication band that are transmitted to the terminal devices 60. The master station device 10 relays wireless signals received from the base station 50 to the relay device 45 or the slave station device 47. The master station device 10 also relays wireless signals received from the relay device 45 or the slave station device 47 to the base station 50.

[0015] The slave station device 47 is connected by a wired cable to an antenna 70 for wireless communication with the terminal device 60, and transmits and receives wireless signals to and from the terminal device 60 via this antenna 70. The slave station device 47 relays wireless signals received from the terminal device 60 to the master station device 10 or the relay device 45. The slave station device 47 also relays wireless signals received from the master station device 10 or the relay device 45 to the terminal device 60.

[0016] The distributed antenna system 1 having such a configuration makes it possible to connect wireless terminals that cannot be directly reached by radio waves to the base station 50, thereby expanding the communication range of the mobile communication network covered by the base station 50. For example, the distributed antenna system 1 is applicable to mobile communication networks such as 5G.

[0017] On the other hand, conventional mobile communications use a TDD system in which uplink and downlink communications are switched at predetermined intervals. Therefore, when the distributed antenna system 1 is applied to a mobile communications network, the distributed antenna system 1 must detect this switching and appropriately switch between DL processing and UL processing. Therefore, in order to expand the coverage area of ​​the mobile communications network without degrading communication quality, it is necessary to accurately detect the switching between uplink and downlink communications.

[0018] Furthermore, in a communication device that shares a single DAS with multiple mobile operators, if the timing of switching between downlink and uplink communications of the multiple operators differs, they will interfere with each other, so it is necessary to detect the first symbol of the downlink radio frame to detect and correct the difference in the timing of switching between downlink and uplink communications between the operators.Even in this case, it is necessary to accurately detect the switch between downlink and uplink communications.

[0019] In a distributed antenna system 1 including a master station device 10 connected to a base station 50 and one or more slave station devices 47 that relay signals between the master station device 10 and terminal devices 60 that communicate with the base station 50, the master station device 10 functions as the master station device 10 or the slave station device 47 and is a communication device that receives an orthogonal frequency division multiplexing (OFDM) signal transmitted by a time division multiplexing system. The master station device 10 receives a radio frame including a synchronization signal block (SSB) in the distributed antenna system 1 that employs a TDD system in which DL communication and UL communication are switched at predetermined intervals. The SSB includes a primary synchronization signal (PSS), a secondary synchronization signal (SSS), and a physical broadcast channel (PBCH). The master station device 10 detects and decodes the SSB from the received radio frame to determine where the received SSB was located within the radio frame.

[0020] The master station device 10 then estimates the DL / UL switching timing based on the position of the SSB within the radio frame and the DL / UL pattern of the TDD system. This allows the master station device 10 to estimate the DL / UL switching timing even when there is no power (signal) in the first symbol of the radio frame, such as a 5G radio signal.

[0021] Figure 2 shows an example of the data structure of a radio frame. Figure 2 shows an example of a 5G radio frame. One frame is transmitted every 10 ms. Each frame consists of 10 subframes, each transmitted every 1 ms. 5G supports multiple subcarrier frequency intervals, which result in different symbol lengths. For this reason, the concept of slots is incorporated into the radio frame, where the number of symbols per subframe is divided into multiple slots. The difference in symbol length due to the difference in subcarrier frequency intervals is absorbed by the number of slots per subframe. One slot contains 14 symbols, regardless of the subcarrier frequency interval. Figure 2 shows a case where the subcarrier frequency interval is 30 kHz, with one subframe consisting of two slots and 28 symbols. As shown in Figure 2, SSBs are allocated to specific positions in the radio frame. As shown in Figure 2, SSBs are allocated to specific positions in the radio frame, and each SSB position is assigned an SSB index.

[0022] FIG. 3 shows an example of an SSB placement pattern in a radio frame. An SSB consists of four symbols. The SSB also has two synchronization signals, PSS and SSS, and a PBCH signal. The PBCH signal has a DMRS (DeModulation of Reference Signal) for PBCH signal, which is a reference signal for decoding the PBCH signal. An SSB index number is assigned to each SSB position in the radio frame. For example, in Japan, values ​​from 0 to 7 are assigned, as shown in FIG. 3. Since the location of an SSB is up to the operator, after detecting an SSB, it is necessary to identify its location.

[0023] Figure 4 shows an example of a DL / UL configuration and SSB allocation for a TDD system. The SSB shown in Figure 4 has a subcarrier frequency spacing of 30 kHz, an SSB period of 20 ms, and a transmission period of 5 ms. The transmission period includes 10 slots, with the first 6 slots assigned to DL and the last 3 slots assigned to UL, with a buffer slot allocated between the DL and UL slots. In this way, the number of consecutive DL slots and the number of consecutive UL slots within the transmission period are set in advance. The buffer slot is also allocated with consecutive DL symbols, consecutive UL symbols, and blank symbols that function as a guard between them. The SSB shown in Figure 4 has a configuration in which 3 symbols are assigned to DL symbols and 3 symbols are assigned to UP symbols, and 8 symbols are assigned as guard symbols.

[0024] From the above, if the master station device 10 can detect the index number of an SSB placed at a specific position in a radio frame, it can estimate the position within the transmission cycle at which that SSB is placed. Furthermore, if the master station device 10 knows the DL / UL configuration information of the TDD system, it can estimate the DL / UL switching timing within the transmission cycle relative to the SSB placement position.

[0025] In the following, the direction of communication from the base station 50 to the terminal device 60 is referred to as the downstream direction (downlink), and the opposite direction is referred to as the upstream direction (uplink). Correspondingly, a signal transmitted in the downstream direction is referred to as a "DL signal," and a signal transmitted in the upstream direction is referred to as a "UL signal."

[0026] Furthermore, a downstream signal transmitted in the form of a frame is called a "downstream frame," and an upstream signal transmitted in the form of a frame is called an "upstream frame." Furthermore, the upstream side of a device may be referred to as the "upstream" side, and the downstream side as the "downstream." Correspondingly, a device connected to the upstream side of a device may be referred to as the "upstream device," and a device connected to the downstream side may be referred to as the "downstream device."

[0027] For example, the master station device 10 is a higher-level device than the relay device 45 and the slave station device 47, and the relay device 45 is a higher-level device than the slave station device 47. Conversely, the relay device 45 and the slave station device 47 are lower-level devices than the master station device 10, and the slave station device 47 is a lower-level device than the master station device 10 and the relay device 45.

[0028] FIG. 5 is a diagram illustrating an example of the functional configuration of the master station device 10 according to the first embodiment. The master station device 10 includes a central processing unit (CPU), memory, auxiliary storage device, and the like, all connected via a bus, and executes a program. By executing the program, the master station device 10 includes an upper input / output unit 11, a lower input / output unit 12, a downlink processing unit 13, an uplink processing unit 14, and a control unit 15. Note that all or part of the functions of the master station device 10 may be implemented using hardware such as an application specific integrated circuit (ASIC), a programmable logic device (PLD), or a field programmable gate array (FPGA). The program may be recorded on a computer-readable recording medium. Examples of the computer-readable recording medium include portable media such as a flexible disk, a magneto-optical disk, a read-only memory (ROM), and a CD-ROM, and storage devices such as a hard disk built into a computer system. The program may be transmitted via a telecommunications line.

[0029] The upper input / output unit 11 is a communication interface for inputting and outputting radio signals to and from an upper device of the parent station device 10. Specifically, the upper input / output unit 11 is a communication interface for inputting and outputting radio signals to and from the base station 50 via a coaxial cable. The upper input / output unit 11 outputs DL signals received from the base station 50 to the downlink processing unit 13, and outputs UL signals input from the uplink processing unit 14 to the base station 50.

[0030] The lower-level input / output unit 12 is a communication interface for inputting and outputting radio signals to and from lower-level devices of the master station device 10. Specifically, the lower-level input / output unit 12 is a communication interface for inputting and outputting radio signals to and from the slave station device 47. The lower-level input / output unit 12 outputs a UL signal received from the slave station device 47 to the uplink processing unit 14, and outputs a DL signal input from the downlink processing unit 13 to the slave station device 47.

[0031] The downlink processing unit 13 executes a process (hereinafter referred to as "DL processing") in which the master station device 10 outputs a DL signal received from a higher-level device to a lower-level device. Specifically, the DL processing of the master station device 10 includes an AD (Analog to Digital) conversion process for the DL signal received from the base station 50, a mapping process for associating the digital signal with a frame, and the like. The downlink processing unit 13 outputs a downstream frame associated with the DL signal in the DL processing to the lower-side input / output unit 12.

[0032] The uplink processing unit 14 executes a process (hereinafter referred to as "UL processing") in which the master station device 10 outputs an UL signal received from a lower-level device to a higher-level device. Specifically, the UL processing of the master station device 10 includes a demapping process for acquiring an UL signal from an upstream frame received from the relay device 45 or the slave station device 47, and a DA (Digital to Analog) conversion process for the UL signal acquired by the demapping process. The uplink processing unit 14 outputs the UL signal converted into an analog signal in the UL processing to the upper-level input / output unit 11.

[0033] The control unit 15 has a function of switching between upstream communication and downstream communication in the master station device 10. Specifically, the control unit 15 has a function of detecting a switch between upstream communication and downstream communication, and switches between DL processing and UL processing (transmission operation) at the timing when the control unit 15 detects a switch between upstream communication and downstream communication.

[0034] 6 is a diagram showing an example of the functional configuration of the control unit 15 in the first embodiment. The control unit 15 includes a switching timing generation unit 153 and a switching unit 154.

[0035] The switching timing generation unit 153 estimates the UL period or the DL period, and notifies the timing of switching between the UL processing and the DL processing. Specifically, the switching timing generation unit 153 notifies the start timing of the estimated UL period or the DL period. The start timing may be notified as the start time of the UL period or the DL period, or may be notified as the elapsed time from the current time. Furthermore, the notification of the start timing may notify the arrival of the start timing.

[0036] The switching unit 154 switches between the UL process and the DL process at the switching timing notified by the switching timing generation unit 153.

[0037] FIG. 7A shows an example of a PSS correlation value. An SSB consists of four symbols. The SSB also has two synchronization signals, PSS and SSS, and a PBCH signal. When a correlation calculation is performed with a known PSS code sequence on a radio signal received by a communication device, the PSS correlation value rises when the PSS symbol is received. Generally, the better the reception conditions, the higher the PSS correlation value.

[0038] Figure 7B shows an example of a form of beamforming in which multiple SSBs are transmitted using different beams. As shown in Figure 7B, different beamforming may be applied when transmitting multiple SSBs from the base station. Beamforming is a technology that forms a directional pattern on an antenna by controlling the amplitude and phase of multiple antennas, thereby increasing or decreasing the antenna gain in a specific direction. In this case, the PSS correlation value is highest when the communication device receives a radio signal that best matches the antenna's directivity.

[0039] In other words, when a series of switching timing detection processes is performed on the SSB with the highest PSS correlation value within a predetermined timing detection period, the processing is performed on the radio signal with the best reception conditions, and as a result, improvements in the accuracy and stability of the obtained switching timing can be expected.

[0040] In the TDD timing detection process according to the first embodiment, the timing at which the reception status is best within the SSB allocation period is determined. Then, based on the determined timing, the SSB with the best reception status within the next SSB allocation period is acquired, and the timing for switching between downlink and uplink communication for that SSB is estimated.

[0041] 8 is a diagram showing an example of the switching timing generation unit 153 of the first embodiment. The switching timing generation unit 153 includes a signal receiving unit 1001, a time waveform calculation unit 1002, an SSB timing generation unit 1007, an FFT (Fast Fourier Transform) unit 1004, a frequency waveform calculation unit 1005, and a switching timing estimation unit 1006. The SSB timing generation unit 1007 is an example of a symbol timing generation unit.

[0042] The signal receiving unit 1001 includes an ADC unit 1010, a carrier frequency conversion unit 1011, and a sampling rate conversion unit 1012. The signal receiving unit 1001 receives an ODFM signal and converts it into a baseband time domain waveform signal. More specifically, the signal receiving unit 1001 receives a radio frame including an SSB. That is, the signal receiving unit 1001 receives an SSB having a PBCH including a PSS, an SSS, and a DMRS.

[0043] The ADC unit 1010 converts the input analog signal into a digital signal and outputs it to the carrier frequency conversion unit 1011. The carrier frequency conversion unit 1011 down-converts the frequency of the input digital signal into a baseband signal and outputs it to the sampling rate conversion unit 1012. The sampling rate conversion unit 1012 converts the sampling rate of the input baseband signal to generate a baseband time-domain waveform signal, which is a baseband time-domain waveform signal. The sampling rate conversion unit 1012 then outputs the baseband time-domain waveform signal to the PSS detection unit 1013 and FFT unit 1004 of the time waveform calculation unit 1002.

[0044] The time waveform calculation unit 1002 includes a PSS detection unit 1013. The time waveform calculation unit 1002 extracts a portion of the baseband time domain waveform signal that is the output of the signal receiving unit 1001, and calculates the degree of similarity (e.g., correlation value) between the extracted signal and a known signal. More specifically, the PSS detection unit 1013 performs a correlation calculation between the time domain waveform signal and a PSS code sequence, and outputs the resulting correlation value and a PSS index that identifies the PSS code sequence to the SSB timing generation unit 1007. The configuration of the PSS detection unit 1013 will be described in detail later.

[0045] The SSB timing generation unit 1007 detects the PSS signal placed at the beginning of the SSB and outputs the detected timing as SSB timing to the FFT unit 1004. The SSB timing generation unit 1007 also determines which of multiple PSS code sequences the detected PSS signal corresponds to and outputs this as NID2, a physical layer cell identifier, to the SSS detection unit of the frequency waveform calculation unit 1005. The configuration of the SSB timing generation unit 1007 will be described in detail later.

[0046] The FFT unit 1004 performs an FFT on the baseband time-domain waveform signal that is the output of the sampling rate conversion unit 1012 of the signal receiving unit 1001. More specifically, the FFT unit 1004 extracts the SSB from the baseband time-domain waveform signal after sampling rate conversion and performs a Fourier transform on it, based on the SSB timing input from the SSB timing generation unit 1007. The FFT unit 1004 then outputs the SSB frequency-domain waveform signal obtained by the Fourier transform to the frequency waveform calculation unit 1005.

[0047] The frequency waveform calculation unit 1005 includes an SSS detection unit 1016 and a DMRS detection unit 1017 .

[0048] The SSS detector 1016 detects an SSS signal included in the SSB frequency domain waveform signal output by the FFT unit 1004. More specifically, the SSS detector 1016 detects the SSS signal from the SSB frequency domain waveform signal. The SSS detector 1016 also determines which of multiple SSS sequences the detected SSS signal corresponds to. The SSS detector 1016 then outputs the determined SSS signal to the DMRS detector 1017 as NID1, which indicates the group of physical layer cell identifiers. The configuration of the SSS detector 1016 will be described in detail later.

[0049] The DMRS detector 1017 detects the DMRS signal included in the SSB frequency domain waveform signal output by the FFT unit 1004. More specifically, the DMRS detector 1017 detects the DMRS signal from the SSB frequency domain waveform signal. The DMRS detector 1017 determines which of multiple DMRS sequences the detected DMRS signal corresponds to. The DMRS detector 1017 then outputs ibar_SSB corresponding to the DMRS sequence to the switching timing estimation unit 1006. The configuration of the DMRS detector 1017 will be described in detail later.

[0050] The switching timing estimation unit 1006 estimates the timing of switching between downlink and uplink communications in the own device based on the calculation result of the frequency waveform calculation unit 1005. More specifically, the switching timing estimation unit 1006 estimates the position within the transmission cycle at which the SSB is placed from the input ibar_SSB. The switching timing estimation unit 1006 estimates the timing of switching between downlink and uplink communications within the transmission cycle from the placement position of the SSB to be estimated and DL / UL configuration information in a known TDD system.

[0051] 9 is a diagram showing an example of the functional configuration of the PSS detection unit 1013 according to the first embodiment. The PSS detection unit 1013 includes a time signal extraction unit 1131, a PSS generation unit 1132, and a correlation calculation unit 1133.

[0052] The time signal extraction unit 1131 extracts a portion of the time domain waveform signal. More specifically, the time signal extraction unit 1131 extracts data having a length of the ODFM symbol period from the input baseband time domain waveform signal and outputs the data to the correlation calculation unit 1133. That is, the time signal extraction unit 1131 outputs a portion of the baseband time domain waveform signal to the correlation calculation unit 1133.

[0053] The PSS generation unit 1132 outputs a plurality of PSS code sequences of the PSS signal and code sequence numbers that identify the PSS code sequences. More specifically, the PSS generation unit 1132 outputs the plurality of PSS code sequences as PSS sequences to the correlation calculation unit 1133. The PSS generation unit 1132 also outputs a PSS index, which is a code sequence number that identifies the PSS code sequence, to the SSB timing generation unit 1007.

[0054] The correlation calculation unit 1133 performs a correlation calculation between the time domain waveform signal output from the time signal extraction unit 1131 and the PSS sequence, which is a PSS code sequence from the PSS generation unit 1132, and outputs the correlation value to the SSB timing generation unit 1007. That is, the correlation calculation unit 1133 performs a correlation calculation between the baseband time domain waveform signal input from the time signal extraction unit 1131 and the PSS sequence, and outputs the correlation value, which is the calculation result, to the SSB timing generation unit 1007.

[0055] 10 is a diagram showing an example of the functional configuration of the SSB timing generation unit 1007 according to the first embodiment. The SSB timing generation unit 1007 includes a correlation value comparison unit 1071, a clock counter 1072, a correlation value holding unit 1073, a PSS index holding unit 1074, a clock counter holding unit 1075, and a clock counter comparison unit 1076. The SSB timing generation unit 1007 detects the timing for switching between downlink communication and uplink communication for the radio signal with the best reception status within a predetermined timing detection period, and outputs the detected timing to the FFT unit 1004.

[0056] The correlation value comparison unit 1071 compares the input correlation value with the correlation value held in the correlation value holding unit 1073. If the input correlation value is larger, the correlation value comparison unit 1071 instructs the correlation value holding unit 1073, the PSS index holding unit 1074, and the clock counter holding unit 1075 to update the values ​​they hold.

[0057] The clock counter 1072 is a counter that operates continuously while the master station device 10 is operating.

[0058] The counter period of the clock counter 1072 is set to the SSB allocation period. The clock counter 1072 starts from 0 and executes counting operation for a period corresponding to the SSB allocation period. When the counter expires, it returns to 0 and starts counting again. The clock counter 1072 outputs the clock counter value to the clock counter holding unit 1075.

[0059] The correlation value holding unit 1073 is initialized by the input TDD timing detection start signal, and replaces the correlation value it holds with the input correlation value when an update instruction is input from the correlation value comparing unit 1071. The correlation value holding unit 1073 outputs the correlation value it holds to the correlation value comparing unit 1071.

[0060] The PSS index holding unit 1074 is initialized by the input TDD timing detection start signal, and replaces the held PSS index with the input PSS index when an update instruction is input from the correlation value comparison unit 1071. The PSS index holding unit 1074 outputs the held PSS index as NID2, which is a cell identifier in the physical layer.

[0061] The clock counter holding unit 1075 is initialized by the input TDD timing detection start signal, and when an update instruction to the correlation value comparison unit 1071 is input, it replaces the value of the clock counter it holds with the input clock counter value.

[0062] After one clock counter period has elapsed since the TDD timing detection start signal was input, the clock counter comparator 1076 compares the input clock counter value with the value held in the clock counter holding unit 1075, and if the input clock counter value is the same as the value held in the clock counter holding unit 1075, it determines that an SSB is present in the radio signal at this point in time and outputs this as SSB timing.

[0063] As described above, the SSB timing generation unit 1007 detects the maximum value of the input correlation value in the first SSB allocation period after starting TDD timing detection, and stores the clock counter value at that time. Then, in the next SSB allocation period, it outputs SSB timing when the clock counter reaches the stored value. By outputting the SSB timing, the subsequent FFT unit 1004 and frequency waveform calculation unit 1005 are executed. In this way, TDD timing detection processing is performed on the radio signal with the best reception status within the SSB allocation period.

[0064] 11 is a diagram showing an example of the functional configuration of the SSS detection unit 1016 according to the first embodiment. The SSS detection unit 1016 includes an SSS extraction unit 1161, an SSS generation unit 1162, a data determination unit 1163, a comparison operation unit 1164, and an NID1 detection unit 1165.

[0065] The SSS extraction unit 1161 extracts the frequency components to which the SSS signal is assigned from the frequency axis waveform signal. More specifically, the SSS extraction unit 1161 extracts the frequency components to which the SSS signal is assigned from the SSB symbol that is the input frequency axis waveform signal, and outputs the extracted frequency components to the data determination unit 1163.

[0066] That is, the SSS extraction unit 1161 outputs the frequency components of the SSS signal.

[0067] The SSS generator 1162 outputs a plurality of SSS sequences corresponding to the physical layer cell identifier NID2, which is the output of the SSB timing generator 1007, and an SSS index that identifies the SSS sequence. More specifically, the SSS generator 1162 generates a plurality of SSS code sequences based on the input NID2, and outputs them as SSS sequences to the comparison operation unit 1164. The SSS generator 1162 also outputs the SSS index that identifies the SSS sequence to the NID1 detector 1165.

[0068] The data determination unit 1163 determines the demodulated data corresponding to the IQ complex coordinate position of the SSS signal output from the SSS extraction unit 1161, and outputs a series of data determined for the entire SSS signal to the comparison operation unit 1164 as an SSS sequence.

[0069] The comparison operation unit 1164 compares the SSS sequence from the data determination unit 1163 with the SSS sequence from the SSS generation unit 1162, and outputs the number of matching values ​​as the comparison result to the NID1 detection unit 1165. Note that the comparison operation unit 1164 may also output a degree of similarity indicating the degree of similarity between the SSS sequence from the data determination unit 1163 and the SSS sequence from the SSS generation unit 1162 to the NID1 detection unit 1165.

[0070] The NID1 detection unit 1165 determines the one with the highest number of matches from the comparison results that are outputs from the comparison operation unit 1164. Then, the NID1 detection unit 1165 outputs the SSS index corresponding to the SSS sequence with the highest number of matches as NID1 that indicates a group of cell identifiers in the physical layer.

[0071] 12 is a diagram showing an example of the functional configuration of the DMRS detector 1017 according to the first embodiment. The DMRS detector 1017 includes a DMRS extractor 1171, a DMRS generator 1172, a data determiner 1173, a comparison calculator 1174, and an ibar_SSB detector 1175.

[0072] DMRS extraction section 1171 extracts frequency components to which DMRS signals are assigned from the frequency domain waveform signal. More specifically, DMRS extraction section 1171 extracts frequency components to which DMRS signals are assigned from SSB symbols, which are the input frequency domain waveform signal, and outputs the extracted frequency components to data determination section 1173. That is, DMRS extraction section 1171 outputs the frequency components of the DMRS signal.

[0073] The DMRS generator 1172 outputs a plurality of DMRS sequences corresponding to NID1 indicating a group of physical layer cell identifiers, which is the output of the SSS detector 1016, and an ibar_SSB index that identifies the DMRS sequences. More specifically, the DMRS generator 1172 generates a plurality of code sequences based on the input NID1, and outputs these as DMRS sequences to the comparison calculation unit 1174. The DMRS generator 1172 also outputs the DMRS index that identifies the DMRS sequence to the ibar_SSB detector 1175.

[0074] The data decision section 1173 decides the demodulated data corresponding to the IQ complex coordinate position of the DMRS signal output from the DMRS extraction section 1171, and outputs the series of decided data for the entire DMRS signal to the comparison operation section 1174 as a DMRS sequence.

[0075] Comparison operation section 1174 compares the DMRS sequence from data determination section 1173 with the DMRS sequence from DMRS generation section 1172, and outputs the number of matches as the comparison result to ibar_SSB detection section 1175.

[0076] ibar_SSB detection section 1175 determines the DMRS sequence with the highest number of matches from the comparison results output by comparison operation section 1174. Then, ibar_SSB detection section 1175 outputs the ibar_SSB index corresponding to the DMRS sequence with the highest number of matches as ibar_SSB.

[0077] Next, various processes executed by the master station device 10 according to the first embodiment will be described.

[0078] FIG. 13 is a flowchart illustrating an example of the TDD detection process according to the first embodiment. Here, it is assumed that the distributed antenna system 1 is receiving either a DL signal or an UL analog radio signal, and that the distributed antenna system 1 is capable of referencing identification information indicating whether the TDD detection processing period is enabled or disabled, and TDD DL / UL configuration information.

[0079] The signal receiving unit 1001 performs AD conversion, frequency down-conversion, and sampling rate conversion on the input analog signal, and acquires a baseband time-domain waveform signal as the received signal (step S1).

[0080] Next, the time waveform calculation unit 1002 executes time waveform processing (step S2). That is, the time waveform calculation unit 1002 extracts a portion of the baseband time domain waveform signal, performs correlation calculation between the extracted signal and the PSS code sequence, and outputs the resulting correlation value and a PSS index that identifies the PSS code sequence to the SSB timing generation unit 1007.

[0081] Next, the SSB timing generation unit 1007 executes SSB timing generation. That is, the SSB timing generation unit 1007 detects the PSS signal placed at the beginning of the SSB and notifies the FFT unit 1004 of the detected timing as SSB timing (step S3).

[0082] Next, the FFT unit 1004 extracts the SSB from the baseband signal based on the notified SSB timing, performs a Fourier transform on it, and notifies the frequency waveform calculation unit 1005 of the completion of the FFT process (step S4).

[0083] Next, the frequency waveform calculation unit 1005 detects the index of the SSB, which indicates at what position within the transmission period the SSB is placed (step S5).

[0084] The signal receiving unit 1001, time waveform calculation unit 1002, SSB timing generation unit 1007, FFT unit 1004, and frequency waveform calculation unit 1005 repeatedly execute steps S1 to S5 described above while the TDD detection process is valid (step S6; Yes).

[0085] When the TDD detection processing period ends (step S6; No), the switching timing estimation unit 1006 estimates where the SSB is placed within the transmission cycle, and estimates the timing of switching between downlink and uplink communication within the transmission cycle from the SSB placement position and known TDD DL / UL configuration information (step S7).

[0086] 14 is a flowchart showing an example of the time waveform processing according to the first embodiment. That is, the flowchart shown in FIG. 14 is the time waveform processing of step S2 shown in FIG.

[0087] The time waveform calculation unit 1002 determines whether the TDD detection processing period is valid or not (step S21).

[0088] If the TDD detection processing period is invalid (step S21; No), the time waveform calculation unit 1002 ends the time waveform processing. On the other hand, if the TDD detection processing period is valid (step S21; Yes), the time waveform calculation unit 1002 executes the subsequent processing.

[0089] Next, the time waveform calculation unit 1002 calculates correlation values ​​by performing correlation calculations between the baseband time domain waveform signal and a plurality of PSS code sequences (step S22).

[0090] FIG. 15 is a flowchart showing an example of the SSB timing generation process according to the first embodiment.

[0091] That is, the flowchart shown in FIG. 15 is the SSB timing generation process of step S3 shown in FIG.

[0092] The SSB timing generation unit 1007 determines whether the TDD detection start signal is valid (step S31). If the TDD detection start signal is valid (step S31; Yes), the SSB timing generation unit 1007 initializes the correlation value comparison unit 1071, correlation value holding unit 1073, and PSS index holding unit 1074 (step S32). On the other hand, if the TDD detection start signal is invalid (step S31; No), the SSB timing generation unit 1007 executes the subsequent processing.

[0093] Next, the SSB timing generation unit 1007 determines whether one clock counter period has elapsed since the clock counter 1072 started detecting the TDD timing (step S33). If one period has not elapsed (step S33; No), the SSB timing generation unit 1007 executes the processes from step S34 onward. On the other hand, if one period has elapsed (step S33; Yes), the SSB timing generation unit 1007 executes the processes from step S38 onward.

[0094] Next, the correlation value comparison unit 1071 compares the input correlation value with the correlation value held in the correlation value holding unit 1073 (step S34). If the input correlation value is smaller than or equal to the correlation value held in the correlation value holding unit 1073 (step S34; No), the correlation value comparison unit 1071 terminates the SSB timing generation process. On the other hand, if the input correlation value is larger than the correlation value held in the correlation value holding unit 1073 (step S34; Yes), the SSB timing generation unit 1007 executes the subsequent process.

[0095] Next, the correlation value holding unit 1073 replaces the correlation value it holds with the input correlation value (step S35).

[0096] Next, the PSS index storage unit 1074 replaces the stored PSS index with the input PSS index (step S36).

[0097] Next, the clock counter holding unit 1075 replaces the held clock counter value with the input clock counter value (step S37).

[0098] If it is determined in step S33 that one clock counter period has elapsed since the start of TDD timing detection (step S33; No), the clock counter comparator 1076 determines whether the input clock counter value is equal to the value held in the clock counter holding unit 1075 (step S38). If the input clock counter value is not equal to the value held in the clock counter holding unit 1075 (step S38; No), the clock counter comparator 1076 ends the SSB timing generation process. On the other hand, if the input clock counter value is equal to the value held in the clock counter holding unit 1075 (step S38; Yes), the clock counter comparator 1076 executes the subsequent process.

[0099] Next, as a result of step S38, the SSB timing generation unit 1007 determines that the point in time when the clock counter value reaches the value held in the clock counter holding unit 1075 during the second cycle of the clock counter 1072 is the SSB timing, and notifies this to the FFT processing shown in step S4 (step S39).

[0100] 16 is a flowchart showing an example of FFT processing according to the first embodiment. That is, the flowchart shown in FIG. 16 is the FFT processing of step S4 shown in FIG.

[0101] The FFT unit 1004 determines whether or not the SSB timing has been notified by the SSB timing generation unit 1007 (step S41). If there has been no notification (step S41; No), the FFT unit 1014 ends the FFT process. On the other hand, if there has been a notification (step S41; Yes), the FFT unit 1014 executes the subsequent process.

[0102] Next, the FFT unit 1004 extracts the SSB from the baseband signal after sampling rate conversion based on the notified SSB timing (step S42).

[0103] Next, the FFT unit 1004 performs a Fourier transform on the extracted SSB time-domain waveform signal to a frequency-domain waveform signal (step S43).

[0104] Next, the FFT unit 1004 notifies the frequency waveform processing shown in step S5 of the completion of the FFT processing (step S44).

[0105] 17 is a flowchart showing an example of frequency waveform processing according to the first embodiment. That is, the flowchart shown in FIG. 17 is the frequency waveform processing of step S5 shown in FIG.

[0106] The frequency waveform calculation unit 1005 determines whether or not the completion of FFT processing has been notified (step S51). If no notification has been received (step S51; No), the frequency waveform calculation unit 1005 ends the frequency waveform processing.

[0107] On the other hand, if there is a notification (step S51; Yes), the frequency waveform calculation unit 1005 executes the subsequent processing.

[0108] Next, the SSS detection unit 1016 executes the SSS detection process (step S52).

[0109] Next, the frequency waveform calculation unit 1005 determines whether a significant SSS has been detected (step S53). Here, a significant SSS is determined when the similarity to the SSS sequence calculated in the SSS detection process exceeds a predetermined threshold and is at its maximum. If a significant SSS does not exist (step S53; No), the frequency waveform calculation unit 1005 ends the frequency waveform processing. On the other hand, if a significant SSS exists (step S53; Yes), the frequency waveform calculation unit 1005 performs the subsequent processing.

[0110] Next, the DMRS detector 1017 performs DMRS detection processing (step S54). Next, the frequency waveform calculation unit 1005 determines whether a significant DMRS has been detected (step S55). A significant DMRS is determined here when the similarity to the DMRS sequence calculated during the DMRS detection process exceeds a predetermined threshold and is at its maximum. If no significant DMRS exists (step S55; No), the frequency waveform calculation unit 1005 ends the frequency waveform process. On the other hand, if a significant DMRS exists (step S55; Yes), the frequency waveform calculation unit 1005 performs the subsequent process.

[0111] Next, the frequency waveform calculation unit 1005 notifies the switching timing estimation process shown in step S7 of the completion of the frequency waveform processing (step S56).

[0112] 18 is a flowchart showing an example of the SSS detection process according to the first embodiment. That is, the flowchart shown in FIG. 18 is the SSS detection process of step S52 shown in FIG.

[0113] The SSS extraction unit 1161 extracts the frequency components in which the SSS signal is allocated from the frequency axis waveform signal (step S521).

[0114] Next, the SSS generation unit 1162 reads out the PSS index held in the PSS index holding unit 1074 as NID2 (step S522).

[0115] Next, the SSS generation unit 1162 generates a plurality of SSS sequences and an SSS index for identifying the SSS sequences based on NID2 (step S523).

[0116] Next, the comparison operation unit 1164 detects the SSS sequence that is most similar to the extracted SSS signal (step S524).

[0117] Next, the NID1 detection unit 1165 stores the SSS index corresponding to the most similar SSS sequence as NID1 (step S525).

[0118] 19 is a flowchart showing an example of the DMRS detection process according to the first embodiment. That is, the flowchart shown in FIG. 19 is the DMRS detection process of step S54 shown in FIG.

[0119] The DMRS extraction unit 1171 extracts the frequency components to which the DMRS signals are assigned from the frequency axis waveform signal (step S541).

[0120] Next, the DMRS generator 1172 reads out NID1 stored in step S525 (step S542).

[0121] Next, the DMRS generator 1172 generates a plurality of DMRS sequences and an ibar_SSB index for identifying the DMRS sequences based on NID1 (step S543).

[0122] Next, comparison operation section 1174 detects the DMRS sequence that is most similar to the extracted DMRS signal (step S544).

[0123] Next, ibar_SSB detector 1175 stores the ibar_SSB index corresponding to the DMRS sequence with the highest similarity as ibar_SSB (step S545).

[0124] FIG. 20 is a flowchart showing an example of the switching timing estimation process according to the first embodiment.

[0125] That is, the flowchart shown in FIG. 20 is the switching timing estimation process of step S7 shown in FIG.

[0126] The switching timing estimation unit 1006 determines whether or not the completion of frequency waveform processing has been notified (step S71). If there has been no notification (step S71; No), the switching timing estimation unit 1006 ends the switching timing estimation process. On the other hand, if there has been a notification (step S71; Yes), the switching timing estimation unit 1006 executes the subsequent process.

[0127] Next, the switching timing estimation unit 1006 reads the value of the clock counter holding unit 1075 (step S72).

[0128] Next, the switching timing estimation unit 1006 reads out the ibar_SSB stored in step S545 (step S73).

[0129] Next, the switching timing estimation unit 1006 estimates the position of the frame in which the currently detected SSB is arranged, based on the known SSB arrangement pattern and the ibar_SSB read out in step S73 (step S74).

[0130] Next, the switching timing estimation unit 1006 estimates the timing when the next TDD switching will occur from the known TDD DL / UL configuration information, the clock counter value read in step S72, and the SSB frame position estimated in step S74 (step S75).

[0131] As described above, the switching timing generation unit 153 according to the first embodiment receives an ODFM signal and converts it into a baseband ODFM signal. The switching timing generation unit 153 also extracts a portion of the time-domain waveform signal output from the signal receiving unit, and calculates a correlation value between the extracted signal and a known signal. The switching timing generation unit 153 also generates the timing of the SSB with the best reception status from within the SSB allocation period based on the correlation value. The switching timing generation unit 153 also performs a Fourier transform on the time-domain waveform signal based on the generated timing. The switching timing generation unit 153 also extracts a portion of the frequency-domain waveform signal, and calculates the degree of similarity between the extracted signal and a known signal. The switching timing generation unit 153 also estimates the timing of switching between downlink communication and uplink communication in the device itself based on the calculation result of the frequency waveform calculation unit 1005.

[0132] Next, the effects achieved by the switching timing generation unit 153 according to the first embodiment will be described in more detail.

[0133] FIG. 21 is a diagram showing an example of the time required for TDD timing detection. FIG. 21 shows a case where multiple SSBs exist within an SSB period. In FIG. 21, the horizontal axis represents time. The upper part shows an example of a PSS correlation value; when multiple SSBs exist, there will be multiple times when the correlation value spikes. The lower part shows the value of a clock counter that operates by constantly supplying a continuous clock while the master station device 10 is operating. The counter period is set to the SSB allocation period, starts from 0, and counts for the duration of the SSB period. When the counter expires, it returns to 0 and begins counting again.

[0134] As shown in Figure 21, there is a timing in each SSB period when the PSS correlation value is maximized. It is desirable to detect the TDD switching timing based on the SSB corresponding to the timing when the PSS correlation value is maximized. However, it is impossible to predict in advance the timing when the PSS correlation value will be maximized.

[0135] Therefore, switching timing generation unit 153 holds the maximum PSS correlation value among the PSS correlation values ​​calculated sequentially during the first SSB period (the SSB period on the left side shown in FIG. 21) after starting detection of TDD timing, and saves the clock counter value at the time corresponding to the timing of the maximum PSS correlation value. Then, when the counter period expires, switching timing generation unit 153 determines the timing (clock counter value) at which the PSS correlation value becomes maximum.

[0136] When the clock counter value reaches the saved value again in the next SSB cycle (the SSB cycle on the right side in FIG. 21), the switching timing generation unit 153 considers that the SSB at that time has the best reception status and starts processing the SSS and PBCH. After that, a series of switching timing estimation processes are performed to calculate the SSB index, and TDD timing detection is completed.

[0137] That is, the communication device having the switching timing generation unit 153 according to the first embodiment includes a signal receiving unit 1001, a time waveform calculation unit 1002, an SSB timing generation unit 1007 as a symbol timing generation unit, an FFT unit 1004, a frequency waveform calculation unit 1005, and a switching timing estimation unit 1006. The signal receiving unit 1001 receives an ODFM signal and converts it into a baseband ODFM signal. The time waveform calculation unit 1002 extracts a portion of the time domain waveform signal output by the signal receiving unit 1001 and calculates a correlation value between the extracted signal and a known signal. The SSB timing generation unit 1007 outputs timing based on the correlation value. The FFT unit 1004 performs FFT processing on the time domain waveform signal output by the time waveform calculation unit 1002 based on the timing. The frequency waveform calculation unit 1005 extracts a portion of the frequency domain waveform signal output by the FFT unit 1004 and calculates the degree of similarity between the extracted signal and the known signal. Based on the result of the frequency waveform calculation unit 1005, the timing for switching between uplink communication and downlink communication in the own device is estimated.

[0138] With the above configuration, the switching timing generation unit 153 according to the first embodiment can detect the timing to switch between downlink communication and uplink communication for the radio signal with the best reception status within a predetermined timing detection period in a TDD system in which downlink communication and uplink communication are switched at predetermined intervals.

[0139] <Second embodiment> Next, let's consider the variability in the time it takes to detect TDD timing. Because the timing at which TDD timing detection processing starts and the timing at which SSB arrive are not synchronized, there is variability in the time it takes for SSB to arrive within the first SSB period after detection processing begins. Then, within the next SSB period, the detection processing for the switching timing is performed at the time when SSB reception conditions are optimal, so the variability in the time from the start of TDD timing detection to the arrival of SSB directly translates into variability in detection time.

[0140] Figure 22 shows an example in which the time required for TDD timing detection is long. Compared to Figure 21, in Figure 22, it takes a long time from the start of TDD timing detection until the PSS correlation value becomes prominent in the first SSB period. Furthermore, in Figure 22, it also takes a long time in the following SSB period until the clock counter reaches the saved value again and captures the SSB. As a result, the time required for TDD timing detection is nearly twice the SSB period.

[0141] 23 shows an example of the variation in the time required for TDD timing detection. The upper part shows a case where the TDD timing detection time is relatively short (e.g., corresponding to the example shown in FIG. 21), and the lower part shows a case where the TDD timing detection time is long (e.g., corresponding to the example shown in FIG. 22).

[0142] Assume that the switching timing generation unit 153 of the master station device 10 according to the first embodiment performs operations according to the examples shown in the upper and lower parts of Fig. 23. That is, the switching timing generation unit 153 starts TDD timing detection / maximum PSS correlation value determination in the left SSB period (1). The switching timing generation unit 153 holds the counter value at the time when it determines that the maximum value has been reached (2). When the counter period expires, the switching timing generation unit 153 determines the timing at which the PSS correlation value reached its maximum and holds the corresponding counter value (3). When the counter value reaches the held counter value in the subsequent right SSB period (4), the switching timing generation unit 153 executes the remaining TDD timing detection processing (SSS / PBCH processing, SSB index calculation) (5) and completes TDD timing detection (6).

[0143] As can be seen by comparing the upper and lower sections of Figure 23, the master station device 10 cannot predict in advance the time from the start of TDD timing detection when it will receive an SSB, or which SSB will provide the best reception. Therefore, the variability in the time from the start of TDD timing detection to the arrival of an SSB directly translates into variability in detection time. This detection time variability is equivalent to one SSB period (e.g., 20 ms). As a result, the time required for TDD timing detection may take two periods (e.g., 40 ms). This lengthens the TDD timing control interval, adversely affecting the TDD switching operation of the entire system. Furthermore, system operations other than TDD switching must also be designed to take into account the large variability in TDD timing detection time, which increases design costs.

[0144] The second embodiment has been made in consideration of the above circumstances, and provides a communication device in a TDD system in which downstream communication and upstream communication are switched at predetermined intervals, in which the time required to detect the timing to switch between downstream communication and upstream communication varies little and the average detection time is short.

[0145] 24 is a diagram showing an example of the SSB timing generation unit 1007 of the second embodiment. Here, components having the same functions as those in FIG. 10 are denoted by the same reference numerals and explanations thereof are omitted, and the explanation is limited to components having different functions.

[0146] 10, the SSB timing is output from the clock counter comparator 1076, whereas in Fig. 24, it is output from the correlation value comparator 1071. Also, the clock counter comparator 1076 does not exist in Fig. 24.

[0147] The correlation value obtained as a result of the correlation calculation between the time domain waveform signal and the PSS code sequence and the correlation value held in the correlation value holding unit 1073 are input to the correlation value comparison unit 1071 in Figure 24, and the two are compared. If the correlation value with the PSS code sequence is larger, the correlation value comparison unit 1071 determines that an SSB is present in the radio signal at the time the correlation value was calculated, and outputs this as SSB timing. Furthermore, the correlation value comparison unit 1071 instructs the correlation value holding unit 1073, PSS index holding unit 1074, and clock counter holding unit 1075 to update the values ​​they hold.

[0148] FIG. 25 is a flowchart showing an example of an SSB timing generation process according to the second embodiment.

[0149] Here, steps having the same functions as those in FIG. 15 are given the same reference numerals and explanations thereof are omitted, and explanations are limited to steps having different functions.

[0150] 25, there is no step S33 in which the clock counter 1072 determines whether one clock counter period has elapsed since the start of TDD timing detection. Furthermore, immediately after the value held in the PSS index holding unit 1074 is replaced (step S37), the SSB timing is notified to the FFT processing (step S39).

[0151] Fig. 26 is a flowchart showing an example of FFT processing according to the second embodiment. Here, steps having the same functions as those in Fig. 16 are given the same reference numerals and explanations thereof will be omitted, and only steps having different functions will be explained.

[0152] 26, after determining whether SSB timing has been notified from the SSB timing generation unit 1007 (step S41), the FFT unit 1004 determines whether FFT processing is currently being performed (step S45). If the FFT processing is currently being performed (step S45; Yes), the FFT unit 1004 initializes the FFT processing. On the other hand, if the FFT processing is not currently being performed (step S45; No), the FFT unit 1004 performs subsequent processing. As a result, if new SSB timing is notified while the FFT processing is currently being performed, the FFT unit 1004 discards the previous FFT processing results, immediately initializes, and starts the FFT processing again.

[0153] As described above, the switching timing generation unit 153 according to the second embodiment outputs SSB timing from the SSB timing generation unit 1007 each time the maximum calculated PSS correlation value is updated after the start of TDD timing detection, without waiting for one cycle of the clock counter 1072 to elapse, and speculatively executes the downstream FFT unit 1004 and frequency waveform calculation unit 1005. This speculative execution is performed even if the correlation value is a provisional value that is not the maximum within the SSB allocation period.

[0154] As a result, the timing at which the maximum PSS correlation value was last updated is the timing at which the largest PSS correlation value is obtained within the SSB allocation period. Therefore, the timing at which the maximum PSS correlation value was last updated indicates the SSB timing with the best reception conditions, and the results obtained by executing the FFT unit 1004, frequency waveform calculation unit 1005, and switching timing estimation unit 1006 at that timing accurately and stably estimate the switching timing between downlink communication and uplink communication in the device itself.

[0155] That is, estimation of the timing to switch between downlink and uplink communication is completed when the clock counter 1072 completes one SSB allocation period after starting TDD timing detection and the time required for execution of the FFT unit 1004, frequency waveform calculation unit 1005, and switch timing estimation unit 1006 has elapsed. As a result, in the TDD system, the variation in the time required to detect the timing to switch between downlink and uplink communication is reduced, and the average detection time can be shortened.

[0156] Next, the effects of the switching timing generation unit 153 according to the second embodiment will be described in more detail.

[0157] 27 is a diagram showing an example of the time required for TDD timing detection according to the second embodiment, illustrating the same case as the example shown in FIG. 22 where the time required for TDD timing detection is long.

[0158] As shown in Fig. 27, the switching timing generation unit 153 starts TDD timing detection / determining the maximum PSS correlation value in the SSB period on the left (1). After starting TDD timing detection, the switching timing generation unit 153 sequentially updates the maximum PSS correlation value over time (2). However, since the correlation result with a non-PSS signal is calculated from the start of detection until the arrival of an SSB in the radio signal, the maximum value during that period, i.e., the values ​​val0 to val4 in Fig. 27, is meaningless.

[0159] On the other hand, the switching timing generation unit 153 speculatively executes FFT processing by the FFT unit 1004 and frequency waveform calculation by the frequency waveform calculation unit 1005 at the update timing of each of the maximum values ​​in real time, for example, val0 to val4 in Figure 27 ((7-1) and (8-1) in Figure 27).

[0160] As time passes and an SSB arrives near the end of the cycle of the clock counter 1072, a correlation result with the original PSS signal is calculated, resulting in a timing when the PSS correlation value spikes. Accordingly, the maximum PSS correlation value is updated to val5, val6, and finally to val7, which is the maximum within the SSB cycle. Furthermore, the switching timing generation unit 153 speculatively executes FFT processing by the FFT unit 1004 and frequency waveform calculation by the frequency waveform calculation unit 1005 at each update timing of the real-time maximum value, i.e., val5 to val7 in FIG. 27 ((7-2) and (8-2) in FIG. 27).

[0161] Then, when the clock counter 1072 expires, the maximum value of the PSS correlation value is determined to be val7, and the SSB timing also becomes the clock counter value at the time val7 is calculated (3). Therefore, the results of the FFT unit 1004 and the frequency waveform calculation unit 1005, which are speculatively executed at the time val7 is calculated, are effective for the switching timing estimation unit 1006 to estimate the timing at which TDD switching will occur.

[0162] In this way, after TDD timing detection starts, the estimation of the switching timing between downlink and uplink communication is completed when the clock counter 1072 completes one cycle of the SSB allocation period and the time required for execution of the FFT unit 1004, frequency waveform calculation unit 1005, and switching timing estimation unit 1006 has elapsed.

[0163] As described above, according to the switching timing generating unit 153 of the second embodiment, in the TDD method in which downlink communication and uplink communication are switched at predetermined intervals, the variation in the time required to detect the timing to switch between downlink communication and uplink communication is reduced, and further, the average detection time can be shortened.

[0164] <Third embodiment> Next, consider the case where the SSB is not captured within the time until the SSB arrives in the radio signal or within the TDD timing detection time.

[0165] As shown in Figure 27, after TDD timing detection starts, the maximum value of the PSS correlation value is updated over time. However, since correlation results with non-PSS signals are calculated from the start of detection until SSB arrives in the radio signal, the maximum value during that period, that is, the values ​​val0 to val4 in Figure 27, are meaningless. On the other hand, since the maximum value of the PSS correlation value is updated, the FFT unit 1004 and the frequency waveform calculation unit 1005 are speculatively executed at each update timing. Therefore, speculative execution at this point is wasteful and should be avoided from the perspective of power consumption.

[0166] Furthermore, if the frequency band targeted for TDD timing detection is not TDD and the radio signal does not contain SSB, the TDD timing should not be detected.

[0167] However, according to the second embodiment, unnecessary speculative execution is performed each time the correlation result with a non-PSS signal is calculated and updated as the maximum PSS correlation value. Furthermore, the timing for switching between downlink and uplink communication is estimated from the result of speculative execution at the time when the PSS correlation value is maximum during the TDD timing detection period, which may result in erroneous detection of the TDD timing.

[0168] Therefore, the third embodiment has been made in consideration of the above circumstances, and provides a communication device that, in a TDD system in which downlink communication and uplink communication are switched at predetermined intervals, does not waste power consumption until an SSB arrives in a radio signal or when an SSB is not captured, and suppresses erroneous detection of TDD timing.

[0169] 28 is a diagram showing an example of a switching timing generation unit 153b according to the third embodiment. Here, components having the same functions as those in FIG. 8 are denoted by the same reference numerals, and explanations thereof are omitted, and the explanation is limited to components having different functions.

[0170] In Fig. 8, the correlation value resulting from the correlation calculation between the time domain waveform signal and the PSS code sequence, and the PSS index that identifies the PSS code sequence are input to the SSB timing generator 1007, and a TDD timing detection start signal is also input. On the other hand, the SSB timing generator 1007b in Fig. 28 also receives a correlation value threshold value as input. Note that the outputs of the SSB timing generator 1007 in Fig. 8 and the SSB timing generator 1007b in Fig. 28 are the same. The SSB timing generator 1007b is an example of a symbol timing generator.

[0171] Figure 29 is a diagram showing an example of the SSB timing generation unit 1007b of the third embodiment. Here, components having the same functions as those in Figure 24 are given the same reference numerals and their explanations are omitted, and the explanation is limited to components with different functions.

[0172] 24 receives the correlation value obtained as a result of the correlation calculation between the time domain waveform signal and the PSS code sequence and the correlation value stored in the correlation value storage unit 1073, and compares the two. If the correlation value with the PSS code sequence is larger, the correlation value storage unit 1071 determines that an SSB is present in the radio signal at the time the correlation value was calculated, and outputs this as SSB timing. Furthermore, the correlation value storage unit 1071 instructs the correlation value storage unit 1073, PSS index storage unit 1074, and clock counter storage unit 1075 to update the values ​​they store.

[0173] 29, a correlation value threshold value is input in addition to the correlation value with the PSS code sequence and the correlation value held in the correlation value holding unit 1073. The output signal is separated into an update instruction signal and an SSB timing signal.

[0174] The correlation value comparison unit 1071b generates a signal instructing the correlation value holding unit 1073, PSS index holding unit 1074, and clock counter holding unit 1075 to update in the same way as the correlation value comparison unit 1071 in Fig. 24. That is, the correlation value with the PSS code sequence is compared with the correlation value held in the correlation value holding unit 1073, and if the correlation value with the PSS code sequence is larger, the respective holding units are instructed to update the values ​​they hold.

[0175] On the other hand, the method of outputting as SSB timing differs from that of the correlation value comparison unit 1071 in Fig. 24. That is, when the correlation value with the PSS code sequence is greater than the correlation value stored in the correlation value storage unit 1073 and is greater than the correlation value threshold, the correlation value comparison unit 1071b determines that an SSB is present in the radio signal at the time the correlation value was calculated, and outputs it as SSB timing.

[0176] In FIG. 29, the correlation value threshold is input from outside, but it may also be calculated within the SSB timing generation unit 1007b based on the correlation value obtained as a result of correlation calculation between the time domain waveform signal and the PSS code sequence or the correlation value stored in the correlation value storage unit 1073.

[0177] FIG. 30 is a flowchart showing an example of an SSB timing generation process according to the third embodiment.

[0178] Here, steps having the same functions as those in FIG. 25 are given the same reference numerals and explanations thereof are omitted, and explanations are limited to steps having different functions.

[0179] 30, immediately before notifying the FFT processing of the SSB timing (step S39), it is determined whether the correlation value with the PSS code sequence is greater than the correlation value threshold (step S3A). If it is greater than the correlation value threshold (step S3A; Yes), the point at which the correlation value with the PSS code sequence is calculated is notified to the FFT processing as the SSB timing (step S39). On the other hand, if it is less than or equal to the correlation value threshold (step S3A; No), the SSB timing generation processing is terminated without notifying the FFT processing.

[0180] As described above, the switching timing generation unit 153b according to the third embodiment outputs SSB timing from the SSB timing generation unit 1007b and speculatively executes the downstream FFT unit 1004 and frequency waveform calculation unit 1005 when the maximum value of the calculated PSS correlation value is updated and the PSS correlation value exceeds the correlation value threshold value after the start of TDD timing detection, without waiting for one cycle of the clock counter 1072 to elapse.

[0181] This speculative execution is performed even if the PSS correlation value is a provisional value that is not the maximum within the SSB allocation period. However, since the PSS correlation value exceeds the correlation value threshold, there is a high possibility that an SSB is present in the radio signal at that time. Therefore, even if the PSS correlation value is a provisional value that is not the maximum within the SSB allocation period, it is appropriate to execute the subsequent FFT unit 1004 and frequency waveform calculation unit 1005.

[0182] Next, the effects of the switching timing generation unit 153 according to the third embodiment will be described in more detail.

[0183] 31 is a diagram showing an example of the time required for TDD timing detection according to the third embodiment, in the same case as the example of the time required for TDD timing detection according to the second embodiment shown in FIG.

[0184] 31, the switching timing generation unit 153 starts TDD timing detection / maximum PSS correlation value determination in the left SSB period (1). After starting TDD timing detection, the switching timing generation unit 153 sequentially updates the maximum PSS correlation value over time (2).

[0185] Until the SSB arrives in the radio signal, the correlation result with the non-PSS signal is calculated, and therefore a large PSS correlation value exceeding the correlation value threshold is not calculated. Therefore, in Fig. 31, the FFT unit 1004 and the frequency waveform calculation unit 1005 are not executed at the timing when the maximum values ​​are updated to the respective values ​​from val1 to val4 (9). In contrast, in the example of Fig. 27, the FFT unit 1004 and the frequency waveform calculation unit 1005 are speculatively executed at the timing when the maximum values ​​are updated to the respective values ​​from val1 to val4 ((7-1) in Fig. 27).

[0186] As time passes and an SSB arrives near the end of the cycle of the clock counter 1072, a correlation result with the original PSS signal is calculated, resulting in a timing when the PSS correlation value spikes. Accordingly, the maximum PSS correlation value is updated to val5, val6, and finally to val7, which is the maximum within the SSB cycle. Furthermore, the switching timing generation unit 153 speculatively executes FFT processing by the FFT unit 1004 and frequency waveform calculation by the frequency waveform calculation unit 1005 at the update timings of the real-time maximum values ​​that exceed the threshold, i.e., val5 to val7 in FIG. 31 ((10) and (11) in FIG. 31).

[0187] Furthermore, if the frequency band targeted for TDD timing detection does not use the TDD system and the radio signal does not contain SSB, the correlation result with a non-PSS signal is always calculated, so a large PSS correlation value that exceeds the correlation value threshold is not calculated. As a result, even when the PSS correlation value is at its maximum during the TDD timing detection period, the FFT unit 1004 and the frequency waveform calculation unit 1005 are not executed. Therefore, the timing for switching between downlink and uplink communications is not estimated, and erroneous detection of TDD timing is avoided.

[0188] As described above, according to the switching timing generation unit 153 of the third embodiment, in the TDD system in which downlink communication and uplink communication are switched at predetermined intervals, the variation in the time required to detect the timing to switch between downlink communication and uplink communication is small, and further, while shortening the average detection time, there is no unnecessary power consumption until the SSB arrives in the radio signal or when the SSB is not captured, and it is possible to suppress erroneous detection of TDD timing.

[0189] In addition, the program executed by the parent station device 10 of this embodiment is provided as a file in an installable or executable format, recorded on a computer-readable recording medium such as a semiconductor storage device, such as a DVD (Digital Versatile Disk), a USB (Universal Serial Bus) memory, or an SSD (Solid State Drive).

[0190] The program may also be configured to be stored on a computer connected to a network such as the Internet and provided by being downloaded via the network, or may be configured to be provided or distributed via a network such as the Internet.

[0191] The program may also be provided in a state where it is pre-installed in a ROM or the like. [Explanation of symbols]

[0192] 1...Distributed antenna system, 10...Master station unit (MU), 11...High-order input / output unit, 12...Lower-order input / output unit, 13...Downlink processing unit, 14...Uplink processing unit, 15...Control unit, 45...Relay unit (HU), 47...Slave station unit (RU), 46...Transmission path, 50...Base station, 60...Terminal unit, 70...Antenna, 153...Switching timing generation unit, 154...Switching unit, 1001...Signal receiving unit, 1002...Time waveform calculation unit, 1004...FFT (Fast Fourier Transform) Transform unit, 1005... frequency waveform calculation unit, 1006... switching timing estimation unit, 1007, 1007b... SSB timing generation unit, 1010... ADC unit, 1011... carrier frequency conversion unit, 1012... sampling rate conversion unit, 1013... PSS detection unit, 1016... SSS detection unit, 1017... DMRS detection unit, 1071, 1071b... correlation value comparison unit, 1072... clock counter, 1073... correlation value holding unit, 1074... PSS index Clock holding unit, 1075...clock counter holding unit, 1076...clock counter comparison unit, 1131...time signal extraction unit, 1132...PSS generation unit, 1133...correlation calculation unit, 1161...SSS extraction unit, 1162...SSS generation unit, 1163...data judgment unit, 1164...comparison calculation unit, 1165...NID1 detection unit, 1171...DMRS extraction unit, 1172...DMRS generation unit, 1173...data judgment unit, 1174...comparison calculation unit, 1175...ibar_SSB detection unit.

Claims

1. a master station connected to the base station; a terminal device that communicates with the base station and one or more slave station devices that relay signals between the master station device and the terminal device, A communication device that functions as the master station device or the slave station device and receives an orthogonal frequency division multiplexing (ODFM) signal transmitted by a time division multiplexing method, a signal receiving unit that receives the ODFM signal and converts it into a baseband ODFM signal; a time waveform calculation unit that extracts a portion of a time-axis waveform signal that is an output of the signal receiving unit and calculates a correlation value between the extracted signal and a known signal; a symbol timing generation unit that outputs timing based on the correlation value; an FFT unit that performs a Fast Fourier Transform (FFT) on the time waveform signal that is the output of the time waveform calculation unit based on the timing; a frequency waveform calculation unit that extracts a portion of the frequency axis waveform signal that is the output of the FFT unit and calculates the degree of similarity between the extracted signal and a known signal; a switching timing estimation unit that estimates a switching timing between uplink communication and downlink communication in the own device based on a result of the frequency waveform calculation unit; A communication device comprising:

2. 2. The communication device according to claim 1, wherein the signal receiving unit receives a primary synchronization signal (PSS), a secondary synchronization signal (SSS), and a synchronization signal block (SS / PBCH block) having a physical broadcast channel (PBCH) including a demodulation reference signal (DMRS).

3. The communication device according to claim 2 , wherein the time waveform calculation unit includes a PSS detection unit that detects a PSS signal included in the time domain waveform signal.

4. the PSS detection unit includes a time signal extraction unit that extracts a part of the time-axis waveform signal; a PSS generator that outputs a plurality of PSS code sequences of the PSS signal and code sequence numbers that identify the PSS code sequences; a correlation calculation unit that performs correlation calculation between a time-axis waveform signal that is an output of the time signal extraction unit and a PSS code sequence from the PSS generation unit. The communication device according to claim 3 , wherein the correlation value calculated by the correlation calculation unit and a PSS code sequence number identifying the PSS code sequence are output as a PSS index.

5. 5. The communication device according to claim 4, wherein the symbol timing generation unit holds the correlation value that is an output of the time waveform calculation unit, and when a correlation value that exceeds the held correlation value is newly input from the time waveform calculation unit, the symbol timing generation unit updates the held correlation value with the new correlation value and outputs the updated timing.

6. the symbol timing generation unit includes a correlation value storage unit that stores a correlation value that is an output of the time waveform calculation unit; a correlation value comparison unit that compares the correlation value output from the time waveform calculation unit with the correlation value stored in a correlation value storage unit, when the correlation value output by the correlation value comparison unit is greater than the correlation value held by the correlation value holding unit as a result of comparing the correlation values ​​by the correlation value comparison unit, the correlation value held by the correlation value holding unit is updated with the correlation value output by the time waveform calculation unit; 6. The communication device according to claim 5, wherein the timing at which the correlation value held in said correlation value holding unit is updated is output as SSB timing.

7. the symbol timing generation unit includes a PSS index holding unit that holds a PSS index that is an output of the time waveform calculation unit; a clock counter that is continuously supplied with clocks and operates while the communication device is in operation; a clock counter holding unit that holds the value of the clock counter, updating the PSS index held in the PSS index holding unit with the PSS index output from the time waveform calculation unit at the timing when the correlation value held in the correlation value holding unit is updated; 7. The communication device according to claim 6, wherein, at the timing when the correlation value held in the correlation value holding unit is updated, the value of the clock counter held in the clock counter holding unit is updated with the value of the clock counter at that time.

8. The clock counter has a counter period set to the SSB allocation period, The count value starts from 0, Counting operation is performed for a period corresponding to the SSB allocation period, 8. The communication device according to claim 7, wherein the counter resets to 0 when it expires and starts counting again.

9. the FFT unit performs a Fourier transform based on the SSB timing output from the symbol timing generation unit; 8. The communication device according to claim 7, wherein if a Fourier transform is being executed at the time of the SSB timing, the execution results up to that point are immediately discarded, and the internal state is initialized before the Fourier transform is executed.

10. The communication device according to claim 9 , wherein the frequency waveform calculation unit includes an SSS detection unit that detects an SSS signal included in the frequency axis waveform signal.

11. The communication device according to claim 10 , wherein the frequency waveform calculation unit includes a DMRS detection unit that detects a DMRS signal included in the frequency axis waveform signal.

12. The communication device according to claim 11, wherein the switching timing estimation unit estimates a timing for switching between downlink communication and uplink communication in the communication device itself based on a result of the frequency waveform calculation unit and a value of the clock counter held by the clock counter holding unit.

13. the symbol timing generation unit includes a correlation value storage unit that stores a correlation value that is an output of the time waveform calculation unit; a correlation value comparison unit that compares the correlation value output from the time waveform calculation unit with the correlation value stored in the correlation value storage unit, when the correlation value output by the correlation value comparison unit is greater than the correlation value held by the correlation value holding unit as a result of comparing the correlation values ​​by the correlation value comparison unit, the correlation value held by the correlation value holding unit is updated with the correlation value output by the time waveform calculation unit; 6. The communication device according to claim 5, wherein, when the correlation value output from the time waveform calculation unit is greater than the correlation value held in the correlation value holding unit as a result of comparing the correlation values ​​in the correlation value comparison unit and when the correlation value output from the time waveform calculation unit is greater than a predetermined correlation value threshold, the communication device outputs, as the SSB timing, the timing at which the correlation value held in the correlation value holding unit is updated.

14. the symbol timing generation unit includes a PSS index holding unit that holds a PSS index that is an output of the time waveform calculation unit; a clock counter that is continuously supplied with clocks and operates while the communication device is in operation; a clock counter holding unit that holds the value of the clock counter, updating the PSS index held in the PSS index holding unit with the PSS index output from the time waveform calculation unit at the timing when the correlation value held in the correlation value holding unit is updated; 14. The communication device according to claim 13, wherein, at the timing when the correlation value held in the correlation value holding unit is updated, the value of the clock counter held in the clock counter holding unit is updated with the value of the clock counter at that time.

15. The clock counter has a counter period set to the SSB allocation period, The count value starts from 0, Counting is performed for a period corresponding to the SSB allocation period, 15. The communication device according to claim 14, wherein the counter resets to 0 when it expires and starts counting again.

16. the FFT unit performs a Fourier transform based on the SSB timing output from the symbol timing generation unit; 16. The communication device according to claim 15, wherein if a Fourier transform is being executed at the time of the SSB timing, the execution results up to that point are immediately discarded, and the internal state is initialized before the Fourier transform is executed.

17. The communication device according to claim 16 , wherein the frequency waveform calculation unit includes an SSS detection unit that detects an SSS signal included in the frequency axis waveform signal.

18. The communication device according to claim 17 , wherein the frequency waveform calculation unit includes a DMRS detection unit that detects a DMRS signal included in the frequency axis waveform signal.

19. 20. The communication device according to claim 18, wherein the switching timing estimation unit estimates a timing for switching between downlink communication and uplink communication in the communication device itself based on a result of the frequency waveform calculation unit and a value of the clock counter held by the clock counter holding unit.

20. a master station connected to the base station; a terminal device that communicates with the base station and one or more slave station devices that relay signals between the master station device and the terminal device, A communication device that functions as the master station device or the slave station device and receives an orthogonal frequency division multiplexing (ODFM) signal transmitted by a time division multiplexing method, a signal receiving unit that receives the ODFM signal and converts it into a baseband ODFM signal; a time waveform calculation unit that extracts a portion of a time-axis waveform signal that is an output of the signal receiving unit and calculates a correlation value between the extracted signal and a known signal; a symbol timing generation unit that outputs timing based on the correlation value; an FFT unit that performs a Fast Fourier Transform (FFT) on the time waveform signal that is the output of the time waveform calculation unit based on the timing; a frequency waveform calculation unit that extracts a portion of the frequency axis waveform signal that is the output of the FFT unit and calculates the degree of similarity between the extracted signal and a known signal; a switching timing estimation unit that estimates a switching timing between uplink communication and downlink communication in the own device based on a result of the frequency waveform calculation unit; A program to make it function as such.

21. a master station connected to the base station; a terminal device that communicates with the base station and one or more slave station devices that relay signals between the master station device and the terminal device, A control method for a communication device that functions as the master station device or the slave station device and receives an orthogonal frequency division multiplexing (ODFM) signal transmitted by a time division multiplexing method, comprising: receiving and converting the ODFM signal to a baseband ODFM signal; extracting a portion of the time-axis waveform signal obtained by the conversion, and calculating a correlation value between the extracted signal and a known signal; outputting timing based on the correlation value; performing a Fast Fourier Transform (FFT) on a portion of the time domain waveform signal based on the timing; extracting a portion of the frequency axis waveform signal after the FFT, and calculating a degree of similarity between the extracted signal and a known signal; estimating a timing for switching between upstream communication and downstream communication in the own device based on the degree of similarity; A control method comprising:

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