Test and measurement apparatus and method thereof

The variable sample rate oscilloscope addresses the trade-off in traditional oscilloscopes by adjusting sampling based on slew rate, optimizing memory usage and capturing high-frequency details effectively.

JP2026088077APending Publication Date: 2026-05-28TEKTRONIX INC
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Patent Information

Application Number
JP2025194197
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-11-10
Filing Date
2025-11-13
Publication Date
2026-05-28

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Abstract

Efficiently save characteristic parts of the waveform to memory. [Solution] The oscilloscope 100 includes an input unit 102 that receives an input signal consisting of multiple waveform segments whose amplitude changes with respect to time, a sampler that samples the input signal at regular intervals and generates a sampling signal consisting of multiple sample segments corresponding to each waveform segment, an acquisition processor 110 having a slew rate controller 112 that determines the instantaneous rate of change of amplitude of a selected waveform segment in the waveform segments of the input signal as the instantaneous slew rate of the input signal, and a sampling filter that stores the sample segment corresponding to the selected waveform segment in the waveform segments of the input signal in the acquisition memory 114 only for the period during which the instantaneous slew rate of the selected waveform segment of the input signal exceeds a slew rate threshold.
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Description

Technical Field

[0001] The present disclosure relates to test and measurement devices, and particularly to signal acquisition technologies in test and measurement devices such as oscilloscopes.

Background Art

[0002] Modern test and measurement devices such as oscilloscopes receive analog signals for testing from a device under test (DUT). One of the first steps in processing an analog signal is to convert the analog signal into a digital signal using one or more analog-to-digital converters (ADCs).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Non-Patent Documents

[0004]

Non-Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] Traditional oscilloscopes have a fixed and continuous sample rate for each DUT acquisition (waveform data acquisition), but this conventional approach forces users to compromise on setup details. Because the size of the oscilloscope's acquisition memory is fixed and limited, this compromise typically manifests as a trade-off between a sampling rate fast enough to capture the high-frequency characteristics of the input signal and a sampling rate slow enough to capture a sufficient input signal for effective analysis of the signal's behavior over a longer period. Serial signal standards are a good example. Users often struggle between sampling at a rate fast enough to detect anomalies at each edge (monotonicity, over / undershoot, etc.) and sampling at a rate slow enough to capture the entire serial bus protocol exchange in a single acquisition within limited memory.

[0006] In many test scenarios, there are particularly important periods, such as rapidly transitioning edges or signal summaries that show the timing relationships between all captured edges. Other parts of the input signal, such as dead time between edges where the signal is nearly static or has a relatively stable voltage, are of little value to the user, except for the ability to accurately identify the timing relationships between surrounding edges (counted as "ticks" in the sample rate). However, since the sampling rate of the input signal is determined based on the entire signal, i.e., both the important and unimportant parts, much of the sampled signal is of little value to the user and effectively wastes the already limited memory capacity of the device. [Means for solving the problem]

[0007] In contrast to selecting a fixed signal acquisition rate, embodiments of this disclosure address this issue with a variable sample rate apparatus. This variable sample rate apparatus links the rate at which digital samples of an analog signal are stored in acquisition memory (sample rate: SR) to the slew rate (dV / dT) of the signal under test. When the transitions of the input signal exceed a certain slew rate threshold, the sampling rate of the acquisition processor increases, thereby acquiring (acquiring waveform data from) rapidly changing signals with higher fidelity.

[0008] Conversely, if the slew rate of the input signal is below this slew rate threshold, the acquisition processor reduces the sample rate and, in turn, saves the capacity of the acquisition memory. In this way, embodiments of the present disclosure efficiently store digitized waveform signals with increased detail during periods of rapid transition, while minimizing the amount of data required to store input signals digitized during periods of little change or little transition.

[0009] While a specific embodiment describes comparing an input signal against a single slew-rate threshold, embodiments of the present invention are not limited to such an embodiment. In another example, the slew rate of the input signal at the very moment or current time may be compared against several slew-rate thresholds, and the acquisition processor selects one of a number of different acquisition rates based on the current slew rate of the input signal. Some embodiments include two, four, or up to several dozen slew rates that the system can select.

[0010] Furthermore, although the slew rate is described above as the change in voltage per unit time, in the embodiment, the numerator can be the change in any measured parameter and does not necessarily have to be voltage. Current, power, or changes in other measured parameters can also be used. Moreover, the slew rate and slew rate threshold may be determined as absolute values, or they may include directional components, such as negative slew rates and positive slew rates. [Brief explanation of the drawing]

[0011] [Figure 1] Figure 1 is a block diagram of a test and measurement apparatus including a variable-rate acquisition processor according to an embodiment of the present disclosure. [Figure 2] Figure 2 shows when the test measurement apparatus of Figure 1, based on an embodiment of the present disclosure, activates the high sampling rate. [Figure 3] Figure 3 is a block diagram showing an example of the components of the variable-rate acquisition processor of Figure 1, based on an embodiment of the present disclosure. [Figure 4A] Figure 4A shows a scheme of data structures available to the variable-rate acquisition processors of Figures 1 and 3 based on embodiments of this disclosure. [Figure 4B] Figure 4B shows a scheme of alternative data structures available to the variable-rate acquisition processors of Figures 1 and 3 based on embodiments of this disclosure. [Figure 4C] Figure 4C shows yet another data structure scheme available to the variable-rate acquisition processors of Figures 1 and 3 based on embodiments of this disclosure. [Modes for carrying out the invention]

[0012] Figure 1 is a block diagram of an example of a test measurement apparatus, such as an oscilloscope 100 having a variable-rate acquisition processor according to an embodiment of the present disclosure. In another embodiment, the test measurement apparatus may refer to any apparatus or device that creates a digital sample from an analog input signal, such as a logic analyzer, a bit error rate tester, a protocol analyzer, or other apparatus. The oscilloscope 100 in Figure 1 has one or more input ports 102, which may be any electrical or optical signal transmission medium. Ports 102 may include receivers and transceivers. Each port 102 is a channel of the oscilloscope 100. In some embodiments, the oscilloscope 100 includes eight, sixteen, or more independent ports. The oscilloscope 100 can be coupled to a device under test (DUT) 101 via one or more ports 102. A DUT 101 with multiple outputs can have each of these outputs connected to the oscilloscope 100 via multiple independent ports 102.

[0013] The input signal received at port 102 is sent to the acquisition processor 110 in analog format. The acquisition processor 110 receives the input signal, filters and adjusts it, converts the input signal into a digital waveform, and stores it in the acquisition memory 114. As described above, the rate at which the waveform data is stored in the acquisition memory 114 depends on the slew rate of the input signal, i.e., how quickly the signal changes over time. The oscilloscope 100 may have a single acquisition processor 110 that receives all input signals from one or more ports 102, or each input port 102 may have its own dedicated signal acquisition processor. In another embodiment, there may be two or more acquisition processors 110, even if the number of acquisition processors 110 is less than the number of input ports. As will be explained in more detail below, the acquisition processor 110 converts analog signals received through one or more ports 102 into digital data representing these input signals and stores these signals in the acquisition memory 114. The acquisition rate of the acquisition processor 110 may also be controlled by a slew rate controller 112, which controls the acquisition processor and changes its acquisition rate based on the characteristics of the input signal (the rate at which the input signal is changing, i.e., the slew rate of the input signal). This control of the acquisition processor 110 based on the slew rate will be explained in detail below with reference to Figure 3.

[0014] The acquisition memory 114 is a relatively large but finite memory, structured to quickly store large amounts of received data. Depending on the implementation details, the acquisition memory 114 may be implemented as volatile memory or as solid-state memory, such as a solid-state disk drive.

[0015] The oscilloscope 100 also includes one or more main processors 120 configured to execute instructions from the main memory 121, which can perform any method or associated steps indicated by these instructions. The one or more main processors 120 control the operation of the oscilloscope 100 based on these instructions. The one or more main processors 120 may consist of long-established microprocessors, programmable mechanisms such as field-programmable gate arrays (FPGAs), or a combination of both. In some embodiments, a digital signal processor (DSP) may also be used in conjunction with the processors 120. In some embodiments, the main memory 121 and acquisition memory 114 are integrated into a single memory that serves all of the above-described uses of memory.

[0016] The user input unit 130 is coupled to one or more processors 120 and may have a keyboard, mouse, touchscreen, or other operating device that the user can use to interactively operate the GUI on the output display 132. In some embodiments, the user input unit 130 may be connected to or controlled by a remote interface 134, allowing the user to control the operation of the oscilloscope 100 from a location physically separate from the device. The user input unit 130 can also receive program instruction commands. The display 132 may be a liquid crystal display, LED display, or digital screen that displays waveforms, measurements, and other data to the user. In some embodiments, the output display 132 may include a local display on the oscilloscope 100, and may also include a display located remotely from the oscilloscope. In some embodiments, the user input unit 130 includes a menu through which the user of the oscilloscope 100 can configure or control the acquisition processor 110 and the slew rate controller 112 using the techniques described above.

[0017] One or more measurement units 140 are illustrated as part of oscilloscope 100. These measurement units 140 perform the main function of measuring parameters and other characteristics of signals from DUT 101 that are measured by oscilloscope 100 and analyzed by the user. Typical measurements include time-domain measurements of the voltage, current, and power of an input signal, and measurements of the characteristics of an input signal in the frequency domain. The measurement units 140 generally represent any measurement performed by a test measurement apparatus.

[0018] The components of oscilloscope 100 are depicted as being integrated within oscilloscope 100, but one of ordinary skill in the art will understand that any of these components can be placed external to oscilloscope 100 and coupled to oscilloscope 100 by conventional methods (such as wired or wireless communication media and mechanisms). For example, in some instances, data and images generated by oscilloscope 100 may be provided to other devices through a cloud or other communication network 150.

[0019] There are several ways to determine the slew rate of an input signal. In one method, this determination can be implemented as any mathematical formula SR = f(dV / dT), where dV / dT represents the change in voltage with respect to the change in time. With k as a constant, the directly proportional SR = k(dV / dT) is conceptually the simplest but is somewhat complex in practical terms. A more practical embodiment provides discrete (stepwise) steps, and the acquisition processor 110 is programmed or controlled to select any one of n possible sample rates. In the simplest embodiment described below, n = 1, which means that, as will be described with reference to FIGS. 2 and 3, the maximum sampling rate of the oscilloscope is used during the rapid transition period of the input signal, and samples are not collected during the less-changing (static) portions of the input signal.

[0020] Figure 2 shows a portion of waveform 202, which is relatively static at the first voltage V1 from time T0 to T1, and is also relatively static at the second voltage V0 from time T2 to T3. The transition part of waveform 202 occurs between time T1 and T2, when the waveform changes from V1 to V0. The illustrated part of waveform 202 is called a falling edge and is typical of the signals transmitted on the serial bus of the DUT. Although not illustrated, there may be a rising edge in waveform 202 in the time period after T3, and the waveform may transition back from V0 to V1.

[0021] As described above, the information that needs to be known about waveform 202 is mainly concentrated around the transition period between times T1 and T2. Other parts of waveform 202 are of little use to the user analyzing them because the waveform changes relatively little. Embodiments of this disclosure control the sample rate for acquired waveforms such as waveform 202 as shown at the top of Figure 2. A slow sampling rate 210 is applied between times T0 and T1, and a slow sampling rate 214 is applied between times T2 and T3. Conversely, a fast sampling rate is applied between times T1 and T2 when waveform 202 transitions between V1 and V2. In some embodiments, the fast sampling rate 212 is the maximum, i.e., fastest rate possible on the oscilloscope 100 (Figure 1) to store the transition period in the most detail possible. The slow sampling rates 210 and 214 may be any rate lower than the fast or fastest sampling rate 212. As described above, the slow sampling rate may be one of several discrete rates that are slower than the fast sampling rate. In the specific embodiments described below, the slow sampling rates 210 and 214 may be set to a sampling rate of 0. That is, the waveform 202 is not sampled at all between relatively unchanging portions T0 and T1, T2 and T3. In this particular embodiment, in addition to the sampled data, additional data is stored indicating that the waveform 202 has not transitioned during the period when no data is stored. This case will be described in detail below. The portions of the waveform 202 with different sampling rates can be called different segments of the waveform. For example, referring to Figure 2, the first segment of the waveform contains the waveform from time T0 to T1. The second segment of the waveform contains the waveform from time T1 to T2, and the third segment contains the waveform from time T2 to T3. The waveform may contain any number of segments, from one to billions of segments.

[0022] The example in Figure 2 is shown as a voltage-varying waveform 202, but changes in current, power, or other measurement parameters may be used to control the rate. By measuring the rate at which the measurement parameters change, data is stored in acquisition memory at this rate, and by selecting a rate, data is stored at the selected rate based on that information.

[0023] Figure 3 is a block diagram showing an example of the components of a variable-rate acquisition processor 300 according to an embodiment of the present disclosure. The acquisition processor 300 may be an example of the acquisition processor 110 in Figure 1, but other implementations are possible. In other words, embodiments of the present disclosure are not limited to the specific components and details of the acquisition processor 300 shown in Figure 3.

[0024] The acquisition processor 300 receives an input signal, which is then adjusted by the analog signal adjustment unit 302. Such adjustment may include, at the user's discretion, low-pass or band-pass filtering, or other filtering. After the input signal has been filtered, the analog-to-digital converter (ADC) 304 converts the filtered input signal into digital samples. The ADC 304 has a sampling rate sufficient to sample the input signal with a resolution sufficient for use with the oscilloscope 100 (Figure 1), and may be an 8-bit, 12-bit, or higher bit-resolution ADC. The digital sampled signal output from the ADC 304 is called full sample data.

[0025] Full sample data is temporarily stored in a data buffer (referred to as FIFO (First-In, First-Out memory) 306 in Figure 3). FIFO 306 is a fixed-size buffer that functions as a delay element for the full sample data. When FIFO 306 is full, another data is supplied to the output each time another data is pushed into the FIFO. The time delay of FIFO 306 is directly related to the size of the FIFO and the data sampling rate. In one example, the ADC 304 samples data at 2.5 gigasamples per second (GS / s), and FIFO 306 stores 32 samples. Therefore, the data stored in FIFO 306 spans a period of 12.8 nanoseconds. In this example, each of the 32 samples in FIFO 306 represents 400 picoseconds of data. Of course, the size of FIFO 306 and the data sampling rate by the ADC 304 vary from embodiment to embodiment and are not limited to these examples.

[0026] The slew rate determination unit 308 receives input from both the input and output of the FIFO 306. Since the size of the FIFO 306 is predetermined and represents a finite time for a given sample rate, the change in the magnitude of the input signal between the first and last samples of the FIFO 306 corresponds to a change in signal amplitude over a known period. The slew rate determination unit 308 measures the coded difference (output from the ADC 304) between the first and last samples of the FIFO 306. Since the duration of the input signal stored in the FIFO 306 is known, measuring this difference in the ADC code determines the slew rate of the digitized input signal. As described above, other slew rate thresholds are also possible depending on user needs.

[0027] Referring again to the formula SR=f(dV / dT), the difference in ADC codes determined by the slew rate determination unit 308 represents "dV," and the number of samples in the FIFO 306 represents "dT." For example, if the dT of the FIFO 306 stores 32 samples (12.8 ns (nanoseconds)) over 400 picoseconds, and dV is 1V, this corresponds to 32 ADC codes with a vertical resolution of approximately 800mV / div (800mV per division). In one embodiment, if the input signal transitions above this 1V / 12.8ns dV / dT threshold, the system in this example stores all samples at the maximum rate; if the input signal falls below this threshold, no samples are stored.

[0028] The output from the slew rate determination unit 308 is passed to the sample filter and time tagging unit 320, which also receives input from the arming (trigger preparation operation) or trigger logic 310, which determines which parts of the input signal to store in the acquisition memory 330 and at what rate. In operation, the arming or trigger logic 310 determines which parts of the input signal to store in the oscilloscope. For example, if the user wants to evaluate only the high-to-low transition of the input signal, the trigger logic 310 is programmed to ignore the low-to-high transition of the input signal, even if the slew rate exceeds the slew rate threshold.

[0029] The sample filter and time tagging unit 320, also known as the downsampler, receives full sample data from the ADC 304 and information on the instantaneous slew rate of the input signal from the slew rate determination unit 308 and the arming or trigger logic 310, and determines whether to save or skip digital samples from the input waveform. The sample filter and time tagging unit 320 may also save one or more slew rate thresholds. In embodiments with multiple sample rates, the sample filter and time tagging unit 320 can determine which parts of the entire sample data are saved at the maximum rate and which are saved at an arbitrary reduced rate by comparing the instantaneous slew rate with a set of multiple slew rate thresholds and selecting a predetermined data storage rate corresponding to the comparison result. In other words, the sample filter and time tagging unit 320 can filter the maximum rate data to generate low-rate samples. The reduction rate applied to the maximum sample data is controlled by the output of the slew rate determination unit 308. The slew rate determination unit 308 compares the slew rate of the input signal with one or more slew rate thresholds. Note that in these embodiments, the reduction rate does not change the bit depth or sample rate of the ADC 304; instead, it converts the maximum sample data to a selected data storage rate by decimation, downsampling, or other methods. Waveform data stored at a reduced data storage rate occupies less memory than data stored at the maximum sampling rate.

[0030] In the specific embodiments described above, if a sample of the digitized input waveform is not stored during a period with a low or no slew rate, the sample is tagged to indicate how many samples were skipped or how many were not stored. This is illustrated in more detail with reference to Figures 4A and 4B below.

[0031] To recreate the sampled waveform on the waveform display 350 (which may be an embodiment of the output display 132 in Figure 1), the oscilloscope uses the above technique to retrieve the sample data previously stored in the acquisition memory 330. The post-processor 340 then uses the sample data stored in the acquisition memory 330, along with a timestamp or zero-time data (details described below), to form a representation of the complete recreated waveform signal.

[0032] Referring again to Figures 2 and 3, waveform 202 exhibits a low slew rate between times T0-T1 and T2-T3. During these periods, the slew rate determination unit 308 controls the sample filter and time tagging unit 320 to store samples in the acquisition memory 330 at a lower sampling rate (which may be zero). Also, during the period from time T1 to T2, when waveform 202 exhibits a high slew rate, the slew rate determination unit 308 controls the sample filter and time tagging unit 320 to store samples in the acquisition memory 330 at the oscilloscope's maximum sampling rate.

[0033] In some embodiments, the presence of the FIFO 306 also allows for the capture and storage of the history of certain signals. For example, a certain amount of samples prior to a transition period may be stored along with the data stored at the maximum sampling rate. In one example, 6.4 nanoseconds of samples prior to time T1 (i.e., prior to the falling edge) are stored in acquisition memory. This allows the user to see the actual stored data from waveform 202, rather than the data reproduced by the post-processor 340 without this data being stored. Similarly, waveform data after the slew rate of waveform 202 falls below the current slew rate threshold may also be stored, allowing the user to see the complete transition portion of waveform 202. In one example, oscilloscope 100 stores 25.6 nanoseconds after the last dV / dT sample that meets the selection criteria. This ensures that even small ringing details are captured, even if the dV / dT criteria are not met. Of course, parameters such as the slew rate threshold and the amount of data stored before and after the transition period can be controlled by the user, allowing for the most beneficial selection for the user.

[0034] In systems that do not save data for relatively small changes in waveform transitions, a separate mechanism is needed for the post-processor 340 to recover missing timing information when post-processing the saved acquisition data. To achieve this, the oscilloscope 100 uses timing markers, stored in the acquisition memory 330, that indicate the number of unsaved samples. The timing markers are inserted into the acquisition memory by the sample filter and time tagging unit 320. During post-processing of the acquisition data by the post-processor 340, even if some of the original waveform is not saved as samples, the accurate timing of the original waveform can be reconstructed by inserting the corresponding dead time into the recovered waveform. In other words, instead of saving waveform samples when the waveform has a low slew rate, information on how long the waveform was not sampled is saved. Saving this information uses significantly less memory than saving waveform sample data, even when a very low sample rate is selected. Figures 4A and 4B show two sample implementations, but other implementations can be used in combination with the embodiment.

[0035] Figure 4A shows the contents of acquisition memory 400, which may also be an example of acquisition memory 330 (Figure 3), which utilizes time information used by post-processor 340 to display the waveform on waveform display 350. In this example, after sample data (sample data 1) is saved, information (indication) indicating how long the signal will remain at its last output level until the next sample (sample data 2) is also saved. Note that during the relatively static portion of the acquired waveform, the waveform will remain at the same (or very close) level as the last output level. Therefore, post-processor 340 uses this static time information saved with the sample data to determine how long to maintain the last output level of the current sample (sample 1) until the next sample data (sample 2) is reproduced. This system is repeated by post-processor 340 until the entire waveform is reproduced. Because the data representing this static time data is very compact, storing this information uses only a small amount of the acquisition memory's capacity, while the post-processor 340 can faithfully reproduce the entire original sampled waveform. The last part of the data in acquisition memory 400 may be used to indicate to the post-processor 340 that it is the last sample, or it may contain other information that the post-processor 340 uses to reproduce the sample. Figure 4B shows a similar concept in acquisition memory 401. However, in this example, instead of time data, acquisition memory 401 stores the number of cycles (periods) in which the waveform is maintained at the same level before proceeding to reproduce subsequent samples.

[0036] Thus, embodiments of the present disclosure allow for sampling and saving the most important parts of a waveform, while less important parts that are relatively easy to reproduce because they are static can be represented in a very compact form. For example, if a waveform spanning 55 milliseconds is sampled in real time at a maximum rate of 2.5 gigasamples per second, a conventional oscilloscope would require more than 100 megasamples to save all samples, including the timing relationships between edges, stored at a resolution of 400 nanoseconds. However, embodiments of the present disclosure allow for the reproduction of the entire waveform using less than 1 megasample, effectively eliminating the need to save the less important parts of the waveform.

[0037] In the past, some oscilloscopes attempted to store less data than the maximum sample rate by dividing the acquisition memory and storing several short acquisition data in its capacity. However, these solutions do not store timing information between frames and, unlike the embodiments of this disclosure, cannot reproduce the original waveform with complete fidelity.

[0038] In some cases, signals with low dV / dT below a threshold, which are not completely static but still trigger memory operations, can be problematic when using the current embodiments. These signals may produce high-voltage drift over long periods, but according to the embodiments described above, this change may not be recorded in acquisition memory. To address this, some embodiments may provide a minimum sample rate for all cases. This drift problem is solved by providing discrete steps of the minimum sample rate. The trade-off is that more acquisition memory is used, but less memory is used than storing all waveform samples at the maximum rate.

[0039] An alternative to the method using the minimum sample rate for slow-changing signals is described in U.S. Patent No. 10,670,632, which is incorporated herein by reference. Patent '632 describes a system and method for capturing the behavior of slow-changing signals while still not saving any samples for a purely DC input signal. However, the method of Patent '632 is insufficient to capture the fine timing details of fast-moving edges because every sample requires a timestamp. Therefore, in some embodiments, the above system and method may be combined with the method described in Patent '632 to provide a more robust overall solution. In such a combined system, edges of the input waveform exceeding the aforementioned slew rate threshold are saved at the maximum sample rate. Slower-changing signals are then stored in acquisition memory using the method of Patent '632, which describes intermittent saving of samples exhibiting a low slew rate.

[0040] Figure 4C shows the contents of acquisition memory 402, which may be an example of acquisition memory 330 (Figure 3), which stores information used by the post-processor 340 to reconstruct the waveform and display it on the waveform display 350, using tokens. Each unit group stored in memory includes an identifier that identifies whether the contents of that group store data tokens (substitutes for actual data) or data samples. In one embodiment, a data token stores the elapsed time since the previous data sample and the sample rate of the subsequent sample. A data token can be defined as multiple bytes, and the post-processor 340 can understand it as such, so that there is enough information for the post-processor 340 to reconstruct the sampled signal from the information stored in memory 402. Because data tokens are shorter than actual sampled data, the majority of acquisition memory 402 is filled with actual data samples rather than timestamps as in previous solutions. In some embodiments, data tokens are stored only in rare cases, such as when the sample rate changes or when the dead time is extended beyond the maximum data value that can be stored in a single data token. Such token-based memory structures support the use of a maximum sampling rate in embodiments where memory bandwidth (memory read / write speed) is a constraint on maintaining the sampling rate.

[0041] When data tokens or other data are stored in acquisition memory in association with the stored samples, the format and content of such associated data are specific to the implementation, but the embodiment is not limited to any particular data format, as long as it can adequately communicate to the post-processor 340 enough information to reconstruct what is represented by the input signal acquired by a test measurement device such as an oscilloscope, waveform digitizer, or data logger. Such information includes the stored samples themselves, as well as slew rate information, sample rate information, and time and cycle information describing the duration of the sampled input signal that is not sampled and not stored in acquisition memory.

[0042] Embodiments of the disclosed technology can operate on a specially programmed general-purpose computer, including specially created hardware, firmware, digital signal processors, or processors that operate according to programmed instructions. The terms “controller” or “processor” in this application mean microprocessors, microcomputers, ASICs, and dedicated hardware controllers, etc. Embodiments of the disclosed technology can be implemented by one or more computers (including monitoring modules) or other devices, using computer-readable data such as program modules and computer-executable instructions. Generally, program modules include routines, programs, objects, components, data structures, etc., which, when executed by a processor in a computer or other device, perform specific tasks or implement specific abstract data type expressions. Computer-executable instructions may be stored on computer-readable storage media such as hard disks, optical disks, removable storage media, solid-state memory, and RAM. As will be understood by those skilled in the art, the functions of the program modules may be combined or distributed as needed in various embodiments. Furthermore, these functions can be embodied in whole or in part in firmware or hardware equivalents such as integrated circuits or field-programmable gate arrays (FPGAs). One or more aspects of the disclosed technology can be more effectively implemented using specific data structures, such data structures are considered to be within the scope of computer-executable instructions and computer-usable data described herein.

[0043] The disclosed embodiments may, in some cases, be implemented in hardware, firmware, software, or any combination thereof. The disclosed embodiments may also be implemented as instructions carried or stored in one or more computer-readable media that can be read and executed by one or more processors. Such instructions may be referred to as computer program products. The computer-readable media described herein means any medium accessible by a computing device. For example, but not limited to, computer-readable media may include computer storage media and communication media.

[0044] Computer storage media means any medium that can be used to store computer-readable information. Examples of computer storage media include, but are not limited to, random-access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory and other memory technologies, compact disc read-only memory (CD-ROM), DVD (Digital Video Disc) and other optical disc storage devices, magnetic cassettes, magnetic tapes, magnetic disk storage devices and other magnetic storage devices, and any other volatile or non-volatile removable or non-removable media implemented by any technology. Computer storage media exclude signals themselves and temporary forms of signal transmission.

[0045] A communication medium means any medium that can be used to transmit computer-readable information. Examples of communication mediums, though not limited to them, include coaxial cables, fiber optic cables, air, or any other medium suitable for transmitting electrical, optical, radio frequency (RF), infrared, sound, or other types of signals. Examples

[0046] The following examples are provided that are useful for understanding the technology disclosed herein. These embodiments may include one or more of the examples described below, or any combination thereof.

[0047] Example 1 is a test and measurement device, An input section that receives an input signal consisting of multiple waveform segments whose amplitude changes with respect to time, A sampler configured to sample the above input signal at regular intervals and generate a sampled signal formed from multiple sample segments corresponding to each of the above waveform segments, An acquisition processor having a slew rate controller configured to determine the instantaneous rate of change of the amplitude of a selected waveform segment among the waveform segments of the above input signal as the instantaneous slew rate of the above input signal, A sampling filter configured to store the sample segment corresponding to the selected waveform segment within the waveform segment of the input signal in acquisition memory only for the period during which the instantaneous slew rate of the selected waveform segment of the input signal exceeds the slew rate threshold. It is equipped with.

[0048] Example 2 is a test measurement apparatus based on Example 1, wherein the sampling filter is further configured to prevent the sample segment from being stored in the acquisition memory during a period in which the instantaneous slew rate of the input signal does not exceed the slew rate threshold.

[0049] Embodiment 3 is a test measurement apparatus based on any of the embodiments described above, wherein the sampling filter is further configured to store an indicator in the acquisition memory indicating that the instantaneous slew rate of the input signal does not exceed the slew rate threshold.

[0050] Example 4 is a test measurement device based on any of the above-described embodiments, wherein the indicator includes one or more of the group consisting of time value, cycle count, and slew rate value.

[0051] Example 5 is a test measurement apparatus based on any of the above embodiments, wherein the sampling filter is further configured to store the indicators of each sample segment stored in the acquisition memory.

[0052] Example 6 is a test measurement apparatus based on any of the above-described embodiments, further comprising a post-processor configured to create an output waveform based on one or more sample segments acquired from the acquisition memory and indicators and other acquired information related to the one or more sample segments stored in the acquisition memory.

[0053] Example 7 is a test measurement apparatus based on Example 1, wherein the sampling filter has a downsampler, and the sampling filter is configured to store in the acquisition memory a downsampled version of the sample segment during a period in which the instantaneous slew rate of the input signal does not exceed the slew rate threshold.

[0054] Example 8 is a test measurement apparatus based on any of the above embodiments, wherein the slew rate controller is further configured to compare the input amplitude value of a fixed-length data buffer with the output amplitude value of the fixed-length data buffer.

[0055] Example 9 is a test measurement apparatus based on any of the above embodiments, further comprising a trigger processor having an output coupled to the sampling filter, wherein the sampling filter uses the output of the trigger processor as a control signal.

[0056] Example 10 is a method in a test measurement apparatus, A process that receives a waveform having one or more waveform segments, A process of sampling the above waveform and generating a sampled signal formed from multiple sample segments corresponding to one or more of the above waveform segments, The process of determining the slew rate of the current waveform segment, The process of storing the sample segment corresponding to the current waveform segment in acquisition memory only when the slew rate of the current waveform segment exceeds the slew rate threshold, and It is equipped with.

[0057] Example 11 is a method based on Example 10, further comprising the step of not storing the sample segment corresponding to the current waveform segment if the slew rate of the current waveform segment does not exceed the slew rate threshold.

[0058] Example 12 is a method based on an embodiment of any of the above-described methods, further comprising the process of storing in the acquisition memory an indicator indicating the amount of time or number of cycles (periods) in which the slew rate of the current waveform segment does not exceed the slew rate threshold.

[0059] Example 13 is a method based on an embodiment of any of the above-described methods, further comprising the process of storing slew rate information that identifies the slew rate of the current waveform segment in the acquisition memory.

[0060] Example 14 is a method based on an embodiment of any of the above-described methods, further comprising the process of storing sampling rate information in the acquisition memory that identifies the sample rate at which the current waveform segment is stored in the acquisition memory.

[0061] Example 15 is a method based on an embodiment of any of the above-described methods, wherein the process of determining the slew rate of the current waveform segment includes comparing a first amplitude value stored in a fixed-size data buffer with a second amplitude value stored in the same fixed-size data buffer.

[0062] Example 16 is a method based on Example 15, wherein the first amplitude value is the value that has been stored in the fixed-size data buffer for the longest period of time, and the second amplitude value is the next amplitude value to be stored in the fixed-size data buffer.

[0063] Example 17 is a method based on Example 15, wherein the first amplitude value is the value that has been stored in the fixed-size data buffer for the longest time, and the second amplitude value is the most recent value stored in the fixed-size data buffer.

[0064] Example 18 is a test and measurement device, An input section that receives an input signal consisting of one or more waveform segments whose amplitude changes with respect to time, Equipped with one or more processors, The one or more processors are A process of sampling the above input signal and generating a sampled signal formed from multiple sample segments corresponding to one or more of the above waveform segments, The process of determining the slew rate of the current waveform segment, The process involves storing the sample segment corresponding to the current waveform segment in acquisition memory only if the slew rate of the current waveform segment exceeds the slew rate threshold. It is configured to perform the process of having one or more of the above processors carry out the task.

[0065] Example 19 is a test measurement apparatus based on Example 18, wherein one or more processors are configured to perform a process that causes one or more processors not to store the sample segment corresponding to the current waveform segment if the slew rate of the current waveform segment does not exceed the slew rate threshold.

[0066] Example 20 is a test measurement apparatus based on Example 18 or Example 19, wherein one or more processors are configured to perform a process to determine the slew rate of the current waveform segment by comparing a first amplitude value stored in a fixed-size data buffer with a second amplitude value stored in the fixed-size data buffer.

[0067] Example 21 is a test measurement apparatus based on Example 20, in which the first amplitude value and the second amplitude value are values ​​of voltage, current, or power.

[0068] Example 22 is a test measurement apparatus based on any one of Examples 18 to 21, wherein one or more processors are configured to perform a process that causes one or more processors to store in the acquisition memory an indicator that shows the amount of time or number of cycles (periods) in which the slew rate of the current waveform segment does not exceed the slew rate threshold.

[0069] The aforementioned versions of the subject matter of this disclosure have many effects that have been described or will be apparent to those skilled in the art. Nevertheless, not all of these effects or features are required in all versions of the disclosed apparatus, system, or method.

[0070] In addition, the description of this application refers to certain features. It should be understood that the disclosures herein include all possible combinations of these particular features. Where a particular feature is disclosed in relation to a particular aspect or example, that feature may, to the extent possible, also be used in relation to other aspects and examples.

[0071] Furthermore, when this application refers to a method having two or more defined steps or processes, these defined steps or processes may be performed in any order or simultaneously, as long as the circumstances do not rule out such possibilities.

[0072] For the sake of explanation, specific embodiments of the present invention have been illustrated and described, but it should be understood that various modifications are possible without deviating from the gist and scope of the present invention. Therefore, the present invention should not be limited to anything other than the appended claims. [Explanation of symbols]

[0073] 100 Oscilloscopes 101 Device under test (DUT) 102 One or more ports 110 Acquisition Processors 112 Slew Rate Controller 114 Acquisition Memory 120 One or more main processors 121 Main Memory 130 User Input Section 132 Output Display 134 Remote Command / Interface 140 One or more measuring units 150 Cloud or communication network 300 Variable Rate Acquisition Processors 302 Analog Signal Conditioner 304 Analog-to-Digital Converter 306 FIFO (First-In, First-Out memory) 308 Through Rate Determination Unit 310 Arming or Trigger Logic 320 Sample Filter and Time Tagging Section 330 Acquisition Memory 340 Post-Processors 350 Waveform Display

Claims

1. A test and measurement device, An input section that receives an input signal consisting of multiple waveform segments whose amplitude changes with respect to time, A sampler configured to sample the above input signal at regular intervals and generate a sampled signal formed from multiple sample segments corresponding to each of the above waveform segments, An acquisition processor having a slew rate controller configured to determine the instantaneous rate of change of amplitude in a selected waveform segment among the waveform segments of the above input signal as the instantaneous slew rate of the above input signal, A sampling filter configured to store the sample segment corresponding to the selected waveform segment within the waveform segment of the input signal in acquisition memory only for the period during which the instantaneous slew rate of the selected waveform segment of the input signal exceeds the slew rate threshold. A test and measurement device equipped with [the following features].

2. The above sampling filter further, During the period in which the instantaneous slew rate of the above input signal does not exceed the slew rate threshold, the above sample segment is not stored in the above acquisition memory. The acquisition memory stores an indicator indicating that the instantaneous slew rate of the input signal does not exceed the slew rate threshold. A test and measurement apparatus according to claim 1, configured as follows.

3. A test measurement apparatus according to claim 1, wherein the sampling filter has a downsampler, and the sampling filter is configured to store in the acquisition memory a downsampled version of the sample segment for a period during which the instantaneous slew rate of the input signal does not exceed the slew rate threshold.

4. A test and measurement apparatus according to claim 1, further comprising a trigger processor having an output coupled to the sampling filter, wherein the sampling filter utilizes the output of the trigger processor as a control signal.

5. A method in a test and measurement apparatus, A process for receiving a waveform having one or more waveform segments, A process of sampling the above waveform and generating a sampled signal formed from multiple sample segments corresponding to one or more of the above waveform segments, The process of determining the slew rate of the current waveform segment, The process of storing the sample segment corresponding to the current waveform segment in acquisition memory only when the slew rate of the current waveform segment exceeds the slew rate threshold, and A method in a test and measurement apparatus equipped with the following.

6. If the slew rate of the current waveform segment does not exceed the slew rate threshold, the process of not storing the sample segment corresponding to the current waveform segment is performed. The process involves storing in the acquisition memory an indicator that shows the amount of time or number of cycles in which the slew rate of the current waveform segment does not exceed the slew rate threshold. A method in a test and measurement apparatus according to claim 5, further comprising the above.

7. A method in a test measurement apparatus according to claim 5, wherein the process of determining the slew rate of the current waveform segment includes a process of comparing a first amplitude value stored in a fixed-size data buffer with a second amplitude value stored in the fixed-size data buffer.

8. A method in a test measurement apparatus according to claim 7, wherein the first amplitude value is the value that has been stored in the fixed-size data buffer for the longest period of time, and the second amplitude value is the next amplitude value to be stored in the fixed-size data buffer.

9. A method in a test measurement apparatus according to claim 7, wherein the first amplitude value is the value that has been stored in the fixed-size data buffer for the longest time, and the second amplitude value is the latest value stored in the fixed-size data buffer.

10. A test and measurement device, An input section that receives an input signal consisting of one or more waveform segments whose amplitude changes with respect to time, Equipped with one or more processors, The one or more processors are A process of sampling the above input signal and generating a sampled signal formed from multiple sample segments corresponding to one or more of the above waveform segments, The process of determining the slew rate of the current waveform segment, The process of storing the sample segment corresponding to the current waveform segment in acquisition memory only when the slew rate of the current waveform segment exceeds the slew rate threshold, and A test and measurement device configured to perform a process that causes one or more of the above-mentioned processors to carry out the above.

11. A test and measurement apparatus according to claim 10, wherein one or more processors are configured to perform a process to determine the slew rate of the current waveform segment by comparing a first amplitude value stored in a fixed-size data buffer with a second amplitude value stored in the fixed-size data buffer, and the first amplitude value and the second amplitude value are values ​​of voltage, current, or power.

Citation Information

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