Semiconductor device manufacturing methods

Abstract

To facilitate the formation of waveguides. [Solution] A method for manufacturing a semiconductor device comprising: a substrate having a first surface and a second surface opposite to the first surface, and including a photoelectric conversion element that generates an electric charge corresponding to light incident from the first surface; and an insulating film disposed on the first surface, the method comprising: preparing the substrate on which the insulating film is provided on the first surface and has an opening positioned to overlap with at least a part of the photoelectric conversion element in a plan view with respect to the first surface; and applying a precursor to the substrate such that the amount applied to the upper part of the opening is greater than that applied to other parts, thereby forming a first film having a flat upper surface.

Description

Technical Field

[0005] ,

[0001] The present invention relates to a method for manufacturing a semiconductor device.

Background Art

[0002] Patent Document 1 discloses a semiconductor device having a waveguide.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the method for forming a waveguide described in Patent Document 1, there is a step of filling a large opening with a high refractive index material, removing portions other than the opening, and planarizing. For planarization, the removal is performed multiple times. Also, since planarization is affected by the arrangement density of the openings, it has been difficult to easily obtain a high degree of flatness. The object of the present invention is to provide a method for facilitating the formation of a waveguide.

Means for Solving the Problems

[0005] According to one disclosure of the present specification, there is provided a method for manufacturing a semiconductor device including a substrate having a first surface and a second surface facing the first surface, the substrate including a photoelectric conversion element that generates electric charges in response to light incident from the first surface, and an insulating film disposed on the first surface, the method including: preparing the substrate provided with the insulating film having an opening disposed at a position overlapping at least a part of the photoelectric conversion element in a plan view with respect to the first surface; and applying a precursor on the substrate so that an application amount in an upper portion of the opening is larger than that in other portions to form a first film having a flat upper surface. [Effects of the Invention]

[0006] According to the present invention, it becomes possible to facilitate the formation of waveguides. [Brief explanation of the drawing]

[0007] [Figure 1] A schematic diagram showing the configuration of a planarization device. [Figure 2] A schematic diagram illustrating the flattening process. [Figure 3] A schematic diagram illustrating the manufacturing method of a semiconductor device according to the first embodiment. [Figure 4] A schematic diagram illustrating the manufacturing method of a semiconductor device according to the first embodiment. [Figure 5] A schematic diagram illustrating the manufacturing method of a semiconductor device according to the second embodiment. [Figure 6] A schematic diagram illustrating an application example of the semiconductor device of the third embodiment. [Modes for carrying out the invention]

[0008] The embodiments will be described below with reference to the drawings. Note that the embodiments described below do not limit the invention as defined in the claims. While multiple features are described in the embodiments, not all of these features are essential to the invention, and the features may be combined in any way. Furthermore, in the attached drawings, the same or similar configurations are given the same reference numeral, and redundant descriptions may be omitted.

[0009] Embodiments of the present invention will be described in detail below with reference to the drawings. In the following description, terms indicating specific directions or positions (e.g., "up," "down," "right," "left," and other terms including these terms) will be used as needed. The use of these terms is for the purpose of facilitating the understanding of embodiments with reference to the drawings, and the meaning of these terms does not limit the technical scope of the present invention.

[0010] In this specification, a plan view refers to a view taken from a direction perpendicular to the top surface of the semiconductor substrate. A cross-sectional view refers to a surface perpendicular to the top surface of the semiconductor substrate. If the top surface of the semiconductor substrate is rough when viewed microscopically, the plan view is defined based on the top surface of the semiconductor substrate as viewed macroscopically. The top surface of the semiconductor substrate is defined as the surface on which elements formed on the semiconductor substrate, such as the gate of a transistor, are provided, or the surface on which connections to contact plugs are located.

[0011] Furthermore, expressions such as "A or B," "at least one of A and B," "at least one of A and / or B," and "one or more of A and / or B" include all possible combinations of the enumerated items unless explicitly defined otherwise. That is, the above expressions are understood to disclose all cases where at least one A is included, where at least one B is included, and where at least one A and at least one B are included. This applies equally to combinations of three or more elements.

[0012] <First Embodiment> Figure 1 is a schematic diagram showing the configuration of the planarization apparatus 100 according to this embodiment. Directions are indicated in an XYZ coordinate system where the horizontal plane is the XY plane. Generally, the substrate 1, which is the object to be processed, is placed on the substrate stage 3 so that its surface is parallel to the horizontal plane (XY plane). Therefore, in the following, the directions that are orthogonal to each other in the plane along the surface of the substrate 1 will be referred to as the X axis and the Y axis, and the direction perpendicular to the X axis and the Y axis will be referred to as the Z axis. Also, in the following, the directions parallel to the X axis, Y axis and Z axis in the XYZ coordinate system will be referred to as the X direction, Y direction and Z direction, respectively, and the rotational directions around the X axis, Y axis and Z axis will be referred to as the θX direction, θY direction and θZ direction, respectively. The substrate 1 will be described later, but it is a material to which semiconductor processes can be applied, such as a semiconductor wafer, a semiconductor wafer with a wiring structure formed on it, a glass substrate with an element formed on it, or a metal substrate.

[0013] The underlying pattern on the substrate has an uneven profile resulting from the pattern formed in the previous process, and especially with the recent increase in the multilayer structure of memory elements, process substrates are now sometimes found to have steps of around 100 nm. Steps caused by gentle undulations across the entire substrate can be corrected by the focus tracking function of the scan exposure equipment used in the photoprocessing stage. However, fine-pitched irregularities that fit within the exposure slit area of ​​the exposure equipment may fall outside the exposure equipment's DOF ​​(Depth of Focus). Conventionally, methods such as SOC (Spin On Carbon) and CMP (Chemical Mechanical Polishing) have been used to smooth the underlying pattern of the substrate by forming or flattening a planarization layer. However, conventional techniques have the problem of not being able to obtain sufficient planarization performance. For example, manufacturing processes are evolving to new technology nodes such as 22 nm, 16 nm, 14 nm, and 10 nm. Even if a planarization layer that was practically sufficient was obtained at the previous node, that planarization layer may not be practical at the next node. For example, surface irregularities in the planarization layer that were acceptable in the previous node may not be acceptable in the next node. Furthermore, CMP is expensive and its applicability is limited, while the difference in substrate irregularities due to multi-layer construction is expected to increase further in the future.

[0014] To solve this problem, a planarization apparatus that uses imprint technology to planarize substrates is being investigated. The planarization apparatus brings a flat surface of a component, or a component without a pattern (a planar template), into contact with an uncured composition that has been supplied to the substrate in advance, thereby planarizing a localized area or the entire surface of the substrate. Subsequently, the composition is cured while in contact with the planar template, and the planar template is separated from the cured composition. This forms a planarized layer on the substrate. This planarization apparatus is not affected by the unevenness of the pattern surface of the substrate, unlike the planarization method using a commonly used SOC sacrificial film, and is therefore expected to improve the accuracy of planarization compared to existing methods.

[0015] The planarization apparatus 100 in Figure 1 can be realized by a molding apparatus that forms a composition on a substrate 1 using a pressing member, which is a plate (super straight) 9. The planarization apparatus 100 hardens the composition while the material on the substrate 1 and the plate 9 are in contact, and then separates the plate 9 from the hardened composition to form a planarized layer of material on the substrate 1.

[0016] Substrate 1 is a semiconductor, insulator, or metal substrate, and its shape can be circular, such as a silicon wafer or quartz wafer, or rectangular, such as a (mother) glass for an FPD (Flat Panel Display). The material of substrate 1 may be, but is not limited to, a single-crystal silicon wafer. The material of the substrate may be an elemental semiconductor or compound semiconductor such as silicon, germanium, diamond, silicon carbide, silicon germanium, gallium nitride, gallium arsenide, indium arsenide, or cadmium telluride. The material of substrate 1 may also be an inorganic insulator such as silicon oxide, silicon nitride, aluminum oxide, or aluminum nitride. The material of substrate 1 may also be an organic insulator such as polyimide, polyamide, or polycarbonate. Furthermore, substrate 1 may be aluminum, titanium-tungsten alloy, aluminum-silicon alloy, or aluminum-copper-silicon alloy. In short, substrate 1 may be composed of one or more materials arbitrarily selected from the materials listed above. The surface of the substrate 1 may have at least one film of a semiconductor, insulator, or metal formed on it, and its surface may be flat or have an uneven surface. Furthermore, a substrate may be used in which an adhesion layer is formed on the surface by surface treatment such as silane coupling treatment, silazane treatment, or deposition of an organic thin film to improve adhesion to the composition. The substrate 1 is typically circular with a diameter of 300 mm, but is not limited to this.

[0017] As the plate 9, it can be made of a light-transmissive material in consideration of the light irradiation process. The material of such a material is, for example, a light-transmissive inorganic material such as glass or quartz, or a light-transmissive organic material such as PMMA (Polymethyl methacrylate) or polycarbonate resin. The plate 9 may be a rigid plate or a flexible film. And the surface of the plate 9 that contacts the composition is flat. Note that the plate 9 preferably has a circular shape with a diameter larger than 300 mm and smaller than 500 mm, but is not limited thereto. Also, the thickness of the plate 9 is preferably 0.25 mm or more and less than 2 mm, but is not limited thereto. Note that when the composition is a thermosetting material instead of a photocurable material, the plate 9 does not need to be transparent, and any material having the above characteristics may be used.

[0018] The composition is a precursor that cures to form at least a part of the planarizing film, and is a curable composition that can be cured by receiving light or heat energy. A curable composition that can be cured by receiving light or heat energy is a photocurable composition that cures when irradiated with light, a thermosetting composition that cures when heated, or a photothermal curable composition that cures by receiving both light and heat energy. Examples of the photocurable composition include UV curable liquids. As the UV curable liquid, typically monomers such as acrylates and methacrylates can be used. The curable composition may also be referred to as a moldable material. Hereinafter, the moldable material is also simply referred to as "material".

[0019] As shown in Fig. 1, the planarization device 100 includes a substrate chuck 2, a substrate stage 3, a base platen 4, a support column 5, a top plate 6, a guide bar 7, a support column 8, a plate chuck 11, a head 12, and an alignment shelf 13. The planarization device 100 further includes a pressure adjustment unit 15, a supply unit 17, a substrate transfer unit 18, an alignment scope 19, a light source 20, a stage drive unit 21, a plate transfer unit 22, a cleaning unit 23, an input unit 24, and a control unit 200. The substrate chuck 2 and the substrate stage 3 can hold and move the substrate 1. Also, the plate chuck 11 and the head 12 can hold and move the plate 9.

[0020] The substrate 1 is carried into the planarization device 100 from the outside by a substrate transfer unit 18 including a transfer hand or the like and is held by the substrate chuck 2. The substrate stage 3 is supported by the base platen 4 and is driven in the X and Y directions to position the substrate 1 held by the substrate chuck 2 at a predetermined position. The stage drive unit 21 includes, for example, a linear motor, an air cylinder, or the like and drives the substrate stage 3 at least in the X and Y directions, but may have a function of driving the substrate stage 3 in two or more axes directions (for example, six axes directions). Also, the stage drive unit 21 includes a rotation mechanism and can rotationally drive the substrate chuck 2 or the substrate stage 3 in the θZ direction.

[0021] The pressing member, plate 9, is brought in from outside the flattening device 100 by a plate transport unit 22, including a transport hand, and held by a plate chuck 11. The plate 9 has, for example, a circular or rectangular outer shape and a first surface including a flat surface 10 that contacts the material placed on the substrate 1, and a second surface opposite to the first surface. In this embodiment, the flat surface 10 is the same size as the substrate 1 or larger than the substrate 1. The plate chuck 11 is supported by a head 12 and may have the function of correcting the position of the plate 9 in the θZ direction (tilt around the Z axis). Each of the plate chuck 11 and the head 12 includes an aperture that allows light (ultraviolet light) irradiated from the light source 20 through a collimator lens to pass through. The plate chuck 11 functions as a holding part that mechanically holds the plate 9. For example, the plate chuck 11 holds the plate 9 by pulling the second surface of the plate 9 upwards. The head 12 also mechanically holds the plate chuck 11. The plate chuck 11 and the head 12 constitute a forming unit 50 that performs the process of forming a planarized film. The head 12 includes a drive mechanism (not shown) for positioning the distance between the substrate 1 and the plate 9 when the plate 9 is brought into contact with and separated from the material on the substrate 1, and moves the plate 9 in the Z direction. The drive mechanism of the head 12 may be composed of an actuator such as a linear motor, an air cylinder, or a voice coil motor. A load cell may also be placed in the plate chuck 11 or the head 12 for measuring the pressing force (imprinting force) of the plate 9 against the material on the substrate. The plate deformation mechanism (plate deformation unit) first includes a sealing member 14 that seals the spatial region A formed by the space inside the plate chuck 11 and the internal space surrounded by the plate 9. The plate deformation mechanism also includes a pressure adjustment unit 15 installed outside the plate chuck 11 that adjusts the pressure in the spatial region A. The sealing member 14 is made of a light-transmitting flat plate member such as quartz glass, and is provided with a connection port (not shown) for a pipe 16 connected to the pressure adjustment unit 15. The pressure adjustment unit 15 can increase the amount by which the plate 9 deforms convexly toward the substrate side by increasing the pressure in the spatial region A.Furthermore, the pressure adjustment unit 15 can reduce the amount of convex deformation of the plate 9 by lowering the pressure in spatial region A. Support columns 5 that support the top plate 6 are arranged on the base plate 4. The guide bar 7 is suspended from the top plate 6, passes through the alignment shelf 13, and is fixed to the head 12. The alignment shelf 13 is suspended from the top plate 6 via support columns 8. The guide bar 7 passes through the alignment shelf 13. In addition, the alignment shelf 13 is equipped with a height measuring system (not shown) for measuring the height (flatness) of the substrate 1 held by the substrate chuck 2, for example, using an oblique incidence image misalignment method.

[0022] The alignment scope 19 includes an optical system and imaging system for observing a reference mark provided on the substrate stage 3 and an alignment mark provided on the plate 9. However, if no alignment mark is provided on the plate 9, the alignment scope 19 may not be necessary. The alignment scope 19 is used for alignment, measuring the relative position of the reference mark provided on the substrate stage 3 and the alignment mark provided on the plate 9, and correcting any misalignment.

[0023] The supply unit 17 includes a dispenser with nozzles that dispense uncured material onto the substrate 1, and supplies (coats) the material onto the substrate. The supply unit 17 employs, for example, a piezo jet system or a micro solenoid system, and can supply a minute volume of material of about 1 pL (picoliters) onto the substrate 1 while the substrate stage 3 is scanning. There is no limit to the number of nozzles in the supply unit 17; there may be one (single nozzle) or multiple (for example, 100 or more). Multiple nozzles may form a linear nozzle array of one or more rows. Dispensers of the type known as an inkjet head are particularly suitable because they can apply liquid material to the substrate as minute droplets. A piezo inkjet head, which is equipped with at least one piezoelectric energy generator at each nozzle, is particularly suitable because it can change the volume of the ejected droplets.

[0024] The cleaning unit 23 cleans the plate 9 while it is held in the plate chuck 11. In this embodiment, the cleaning unit 23 removes material adhering to the plate 9, particularly to the flat surface 10, by separating the plate 9 from the hardened material on the substrate. The cleaning unit 23 may, for example, wipe off the material adhering to the plate 9, or it may remove the material adhering to the plate 9 using UV irradiation, electrostatic discharge, wet cleaning, dry plasma cleaning, or the like.

[0025] The control unit 200 is composed of a computer device including a CPU and memory, and controls the entire planarization apparatus 100. The control unit 200 functions as a processing unit that comprehensively controls each part of the planarization apparatus 100 and performs the planarization process. Here, the planarization process is a process in which the flat surface 10 of the plate 9 is brought into contact with the material on the substrate, and the flat surface 10 is made to conform to the surface shape of the substrate 1, thereby flattening the material. Generally, the planarization process is performed on a lot basis, that is, for each of the multiple substrates included in the same lot.

[0026] Next, the planarization process will be explained with reference to Figure 2. First, the material IM is supplied to the substrate 1 on which the base pattern 1a is formed by the supply unit 17. Figure 2(a) shows the state after the material IM has been placed on the substrate 1 but before the plate 9 is brought into contact with it. Next, as shown in Figure 2(b), the material IM on the substrate 1 is brought into contact with the flat surface 10 of the plate 9. The plate 9 presses against the material IM, causing the material IM to spread across the entire surface of the substrate 1. Figure 2(b) shows the state where the entire flat surface 10 of the plate 9 is in contact with the material IM on the substrate 1, and the flat surface 10 of the plate 9 conforms to the surface shape of the substrate 1. Then, in the state shown in Figure 2(b), light is irradiated from the light source 20 through the plate 9 onto the material IM on the substrate 1, thereby hardening the material IM. After that, the plate 9 is separated from the hardened material IM on the substrate 1. This forms a layer of material IM of uniform thickness (planarization layer) across the entire surface of the substrate 1. Figure 2(c) shows the state in which a planarization layer made of material IM has been formed on the substrate 1. Hereafter, the contact (adhesion) or separation between the flat surface 10 of the plate 9 and the material IM on the substrate 1 will be simply referred to as "contact (adhesion) or separation" between the plate 9 and the material IM on the substrate 1. Also below, the material IM in the state supplied to the substrate 1 will be referred to as a precursor, and the material IM after curing will be referred to as a film.

[0027] Next, a method for manufacturing articles (semiconductor devices, liquid crystal display devices, color filters, MEMS, etc.) using this planarization apparatus 100 will be described. This manufacturing method includes the steps of: planarizing a composition by bringing it into contact with a mold on a substrate (wafer, glass substrate, etc.) using the aforementioned planarization apparatus; curing the composition; and separating the composition from the mold. This forms a planarized film on the substrate. Then, the substrate on which the planarized film has been formed is subjected to processing such as patterning using a lithography apparatus, and the processed substrate is processed in other well-known processing steps to manufacture an article. Other well-known processes include etching, resist stripping, dicing, bonding, packaging, etc. According to this manufacturing method, articles of higher quality than conventional methods can be manufactured.

[0028] The following explanation will use a semiconductor device as a specific example. Let the semiconductor device be, for example, a photoelectric sensor. Figures 3(a) and 3(b) are schematic diagrams illustrating the manufacturing method of the semiconductor device according to this embodiment.

[0029] Figure 3(a) shows a state in which an aperture for a waveguide has been formed after a wiring structure including wiring and an interlayer insulating film has been formed. The semiconductor device 300 has a semiconductor layer 301, a first insulating film 305, a second insulating film 306, and a wiring structure 310. The semiconductor layer 301 is made of, for example, a silicon single crystal substrate and has a first surface P1 and a second surface P2 on the opposite side. The first surface P1 is the upper surface of the semiconductor layer 301, and the second surface P2 is the lower surface of the semiconductor layer 301. The semiconductor layer 301 has a first semiconductor region 302, a second semiconductor region 303, and a third semiconductor region 304. For example, the first semiconductor region 302 is a P-type semiconductor region, and the second semiconductor region 303 is an N-type semiconductor region. The first semiconductor region 302 and the second semiconductor region 303 can constitute a photoelectric conversion element. The third semiconductor region 304 is an N-type region and can constitute a transfer transistor with the gate electrode 307. The photoelectric conversion element generates a charge corresponding to the light incident from the first surface P1, and the transfer transistor transfers the charge from the photoelectric conversion element to a floating diffusion region (not shown). An output circuit having an amplification transistor (not shown) outputs a signal based on the amount of charge transferred to the floating diffusion region to a column circuit (not shown). This column circuit performs various processes, such as AD conversion to convert the input signal into a digital signal and noise reduction. Then, the digital signals are sequentially read out from multiple column circuits. As a result, the semiconductor device of this embodiment can generate a signal based on the charge incident on the photoelectric conversion element. The first insulating film 305 may be a gate insulating film located between the semiconductor layer 301 and the gate electrode 307. The second insulating film 306 may be, for example, a silicon nitride film and may function as an etching stop film during contact formation. The wiring structure 310 includes a third insulating film 311, a fourth insulating film 312, a fifth insulating film 313, a sixth insulating film 314, a contact plug 315, a first wiring 316, and a second wiring 317. The contact plug 315, the first wiring 316, and the second wiring 317 are conductors that constitute an electrical path. For example, the first wiring 316 has a single damascene structure, and the second wiring 317 has a dual damascene structure integrated with the via plug. The shape of the insulating films and wiring is not limited to these shapes.Up to this configuration, it can be formed by applying a manufacturing method for general semiconductor devices. Specifically, a semiconductor layer 301 is prepared, a semiconductor region is formed in the semiconductor layer 301, and a first insulating film 305, a second insulating film 306, a gate electrode 307, etc. are formed on the semiconductor layer 301. Then, conductors such as insulating films and wirings are appropriately formed to form a wiring structure 310.

[0030] Here, the insulating film can be formed of a single layer or a plurality of layers of any insulator material such as silicon oxide, silicon oxynitride, silicon nitride, silicon carbide oxide, spin-on glass (SOG), a low dielectric constant material, etc. The contact plug 315 can be formed of a conductor material including a barrier metal such as titanium or titanium nitride and a buried metal such as tungsten. The first wiring 316 and the second wiring 317 can be formed of a conductor material including aluminum, copper, etc. A wiring layer or a plug can be formed by forming a conductive film made of a conductor material and removing the excess conductive film.

[0031] Thereafter, an opening 320 is formed by removing a part of the third insulating film 311, the fourth insulating film 312, the fifth insulating film 313, and the sixth insulating film 314 by etching. In a plan view with respect to the first surface P1, the opening 320 can be formed at a position overlapping at least a part of the photoelectric conversion element. In a plan view with respect to the first surface P1, the opening 320 can be circular. For example, the opening 320 is circular at the same depth position as the upper surface of the sixth insulating film 314, and the opening 320 can be circular at the same depth position as the upper surface of the second insulating film 306. As shown in FIG. 3(a), the side surface of the opening 320 can have a tapered shape from the upper part of the wiring structure 310 to the semiconductor layer 301. Also, the width L1 at the lower part of the opening 320 and the width L2 at the upper part of the opening 320 satisfy L1 < L2. Note that the width L2 at the upper part of the opening 320 is preferably in the range of 50 nm to 100 nm, and the depth H of the opening 320 is preferably in the range of 100 nm to 200 nm. Also, it is preferable to satisfy H / L2 ≦ 2.

[0032] Next, a waveguide core (high refractive index portion) is formed in the aperture 320. First, as shown in Figure 3(b), a liquid precursor of the material that can become the core (material IM) is applied in predetermined amounts, with more in the area of ​​the aperture 320 and less in the other areas. Then, the flat surface of the plate 9 shown in Figure 2 is pressed against the material IM to cure the material IM. After that, the plate 9 is pulled away from the cured material IM on the semiconductor layer 301. Here, the material IM can be, for example, a precursor of an energy-curable resin or a precursor of SOC (Spin On Carbon).

[0033] Uncured material is applied to the upper part of a pre-formed opening 320 using an inkjet head equipped with a piezoelectric element as an ejection actuator. Specifically, droplets are injected multiple times (N+1 times or more per unit area, where N is a natural number) from the upper part of the opening 320, causing the droplets to enter the interior of the opening 320. This is achieved by injecting N droplets per unit area onto the flat surface of the wiring structure 310 other than the upper part of the opening 320. The number of droplets applied can be determined according to the formation pattern of the opening 320. Specifically, droplets are applied while changing the relative position between the ejection port and the substrate, according to a drawing map that determines the number (or amount) of droplets to be applied to the substrate and the application position within the upper surface, based on the pattern data of the resist mask for forming the opening 320.

[0034] Furthermore, the configuration of the semiconductor device 300 shown in Figure 3(a) may be repeated along the in-plane direction (x-direction or y-direction) of the semiconductor layer 301. In that case, the amount of precursor material above the aperture 320 will be greater than the amount of precursor material above the portion between the multiple apertures 320.

[0035] It is not necessary to fill the entire interior of the opening 320 with these droplets. For example, a portion of the opening 320 on the photoelectric conversion side may be formed with an insulating film using methods such as thermal nitriding, thermal oxidation, sputtering, or CVD, and then droplets may be injected into the remaining portion of the opening 320 multiple times.

[0036] For curing, an exposure apparatus can be used, for example. This could be an ArF immersion exposure apparatus, an ArF dry exposure apparatus, or a KrF exposure apparatus. The exposure amount may be adjusted according to the pattern of the aperture 320.

[0037] By this formation method, a core (first film) is formed as shown in Figure 4(a). The core has a first portion 330 located inside the opening 320 and a second portion 331 located on the sixth insulating film 314. By using the plate 9 of this embodiment, the surfaces of the first portion 330 and the second portion 331 become flat. Furthermore, by using the plate 9 of this embodiment, it is easy to make the film thickness of the second portion 331 constant.

[0038] As shown in Figure 4(b), the second portion 331 may be removed after the process in Figure 4(a).

[0039] As described in detail above, the process for forming the waveguide core can be reduced. Furthermore, since the planarization process does not depend on the arrangement density of the apertures, high flatness can be obtained, and thus, according to the manufacturing method of this embodiment, waveguides can be easily formed.

[0040] Furthermore, the material IM does not necessarily have to be a high refractive index material. This is because a suitable waveguide can be formed by creating an opening that penetrates multiple insulating films and forming a uniform member. In particular, when a low dielectric material is used as the insulating film for the wiring structure 310, problems may arise such as the film having low light transmittance or reflection occurring due to a large difference in refractive index between the insulating films. In such cases, a suitable waveguide can be formed by providing a uniform member. Moreover, it is even more preferable that the member has high light transmittance.

[0041] In this embodiment, when applying material IM, the inkjet head is controlled so that more droplets are ejected from the upper part of the opening 320 than from the upper part of the area other than the area where the opening 320 is provided. However, the embodiment is not limited to this. For example, when applying material IM, droplets are applied uniformly to the opening 320 and the area other than the area where the opening 320 is provided. Then, a flat plate 9 is brought into contact with material IM. This method also makes it possible to have more material IM located at the upper part of the opening 320 than at the upper part of the area other than the area where the opening 320 is provided. Such a method is also included in the step of applying a precursor so that the amount applied at the upper part of the opening 320 is greater than that applied to other parts.

[0042] <Second Embodiment> The method for manufacturing the semiconductor device of this embodiment will now be described. Figure 5 is a schematic diagram illustrating the method for manufacturing the semiconductor device of the second embodiment. Hereafter, the same configurations and processes as in Figures 3 and 4 will not be described in detail.

[0043] As shown in Figure 5, the semiconductor device 300 has a pixel array region 501 (first region) where multiple pixels are arranged and a peripheral region 502 (second region) where no pixels are arranged. Each of the multiple pixels also has a photoelectric conversion element. In the pixel array region 501, in a plan view with respect to the first surface P1, multiple apertures 320 may be formed at positions that overlap with at least some of the multiple photoelectric conversion elements. The peripheral region 502 is located between the pixel array region 501 and the edge of the semiconductor layer 301 (substrate).

[0044] In the pixel array region 501 and the peripheral region 502, the area density distribution of the liquid precursor material (material IM) that can become the core material placed on the wiring structure 310 is adjusted. That is, as shown in Figure 5, the amount of material IM is predetermined and applied so that there is more in the pixel array region 501 where the aperture 320 is formed, and less in the peripheral region 502 where the aperture 320 is not formed. Then, the flat surface of the plate 9 shown in Figure 2 is pressed against the material IM to cure the material IM. After that, the plate 9 is pulled away from the cured material IM on the semiconductor layer 301. Here, the material IM can be, for example, a precursor of an energy-curable resin or a precursor of SOC (Spin On Carbon).

[0045] Uncured material is applied to the upper part of the pixel array region 501 using an inkjet head equipped with a piezoelectric element as an ejection actuator. Specifically, this is achieved by impregnating the upper part of the pixel array region 501 with multiple droplets (N+1 or more times per unit area, where N is a natural number) and the upper part of the peripheral region 502 with N droplets per unit area. The number of droplets to be applied can be determined according to the formation pattern of the aperture 320. Specifically, droplets are applied while changing the relative position between the ejection port and the substrate, according to a drawing map that determines the number (or amount) of droplets to be applied to the substrate and the application position within the upper surface, based on the pattern data of the resist mask for forming the aperture 320.

[0046] For curing, an exposure apparatus can be used, for example. This could be an ArF immersion exposure apparatus, an ArF dry exposure apparatus, or a KrF exposure apparatus. The exposure amount may be adjusted according to the pattern of the aperture 320.

[0047] As described in detail above, the process for forming the waveguide core can be reduced. Furthermore, since the planarization process does not depend on the arrangement density of the apertures, high flatness can be obtained, and thus, according to the manufacturing method of this embodiment, waveguides can be easily formed.

[0048] As described above, the manufacturing method of this embodiment is particularly effective for semiconductor devices in which pattern density can vary between pixel regions and other regions, such as photoelectric conversion sensors. In addition to photoelectric conversion sensors, other devices in which pattern density can vary include display devices and memory devices.

[0049] Furthermore, the material IM does not necessarily have to be a high refractive index material. This is because a suitable waveguide can be formed by creating an opening that penetrates multiple insulating films and forming a uniform member. In particular, when a low dielectric material is used as the insulating film for the wiring structure 310, problems may arise such as the film having low light transmittance or reflection occurring due to a large difference in refractive index between the insulating films. In such cases, a suitable waveguide can be formed by providing a uniform member. Moreover, it is even more preferable that the member has high light transmittance.

[0050] In this embodiment, when applying the material IM, the inkjet head is controlled so that more droplets are ejected from the upper part of the pixel array region 501 than from the upper part of the peripheral region 502. However, the embodiment is not limited to this. For example, when applying the material IM, droplets are applied uniformly to both the pixel array region 501 and the peripheral region 502. Then, a flat plate 9 is brought into contact with the material IM. This method also makes it possible to have more material IM located in the upper part of the pixel array region 501 than in the upper part of the peripheral region 502. Such a method is also included in the step of applying a precursor so that the amount applied in the upper part of the pixel array region 501 is greater than that in the peripheral region 502.

[0051] <Third Embodiment> This embodiment describes application examples using semiconductor devices manufactured by the manufacturing methods of the first and second embodiments. The semiconductor device 910 is, for example, a photoelectric conversion sensor.

[0052] Figure 9(a) is a schematic diagram illustrating an application example, device 9191. Device 9191 has a semiconductor device 930. The semiconductor device 930 includes a semiconductor device 910 and a package 920 that houses the semiconductor device 910. The semiconductor device 910 may be manufactured by a manufacturing method of another embodiment. The package 920 may include a substrate on which the semiconductor device 910 is fixed and a lid, such as glass, facing the semiconductor device 910. The package 920 may further include bonding members such as bonding wires or bumps that connect terminals provided on the substrate and terminals provided on the semiconductor device 910.

[0053] The device 9191 may include at least one of the following: an optical device 940, a control device 950, a processing device 960, a display device 970, a storage device 980, and a mechanical device 990. The optical device 940 corresponds to the semiconductor device 930. The optical device 940 is, for example, a lens, shutter, or mirror, and includes an optical system that directs light to the semiconductor device 930. The control device 950 controls the semiconductor device 930. The control device 950 is, for example, a semiconductor device such as an ASIC.

[0054] The processing unit 960 processes the signals output from the semiconductor device 930. The processing unit 960 is a semiconductor device such as a CPU or ASIC that constitutes an AFE (analog front end) or DFE (digital front end). The display device 970 is an EL display device or liquid crystal display device that displays the information (image) obtained by the semiconductor device 930. The storage device 980 is a magnetic device or semiconductor device that stores the information (image) obtained by the semiconductor device 930. The storage device 980 is a volatile memory such as SRAM or DRAM, or a non-volatile memory such as flash memory or a hard disk drive.

[0055] The mechanical device 990 has movable parts or propulsion parts such as motors and engines. The device 9191 displays signals output from the semiconductor device 930 on the display device 970 or transmits them to the outside using a communication device (not shown) provided in the device 9191. For this purpose, it is preferable that the device 9191 further includes a storage device 980 and a processing device 960, separate from the memory circuits and arithmetic circuits of the semiconductor device 930. The mechanical device 990 may be controlled based on signals output from the semiconductor device 930.

[0056] Furthermore, the device 9191 is suitable for electronic devices such as information terminals with shooting capabilities (e.g., smartphones and wearable devices) and cameras (e.g., interchangeable lens cameras, compact cameras, video cameras, and surveillance cameras). In a camera, the mechanical device 990 can drive components of the optical device 940 for zooming, focusing, and shutter operation. Alternatively, the mechanical device 990 in a camera can move the semiconductor device 930 for vibration damping.

[0057] Furthermore, the device 9191 may be a transport device such as a vehicle, ship, or aircraft. The mechanical device 990 in the transport device may be used as a mobile device. The device 9191 as a transport device is suitable for transporting the semiconductor device 930 or for assisting and / or automating driving (operation) through its imaging function. The processing device 960 for assisting and / or automating driving (operation) can perform processing to operate the mechanical device 990 as a mobile device based on information obtained from the semiconductor device 930. Alternatively, the device 9191 may be a medical device such as an endoscope, a measuring instrument such as a distance sensor, an analytical instrument such as an electron microscope, an office machine such as a copier, or an industrial machine such as a robot.

[0058] According to the embodiments described above, it is possible to obtain good pixel characteristics. Therefore, the value of the semiconductor device can be increased. Increasing value here means at least one of the following: addition of functions, improvement of performance, improvement of characteristics, improvement of reliability, improvement of manufacturing yield, reduction of environmental impact, cost reduction, miniaturization, and weight reduction.

[0059] Therefore, by using the semiconductor device 930 according to this embodiment in the device 9191, the value of the device can also be improved. For example, by mounting the semiconductor device 930 on a transport device, excellent performance can be obtained when taking external images of the transport device or measuring the external environment. Therefore, when manufacturing and selling transport devices, deciding to mount the semiconductor device according to this embodiment on the transport device is advantageous in improving the performance of the transport device itself. In particular, the semiconductor device 930 is suitable for transport devices that use information obtained from the semiconductor device to assist in driving and / or perform automated driving.

[0060] Next, as another application example, we will describe a moving object. Figure 9(b) shows an example of a photoelectric conversion system for an in-vehicle camera. The photoelectric conversion system 80 has a semiconductor device 800. The semiconductor device 800 is, for example, a photoelectric conversion device (imaging device). The photoelectric conversion system 80 has an image processing unit 801 that performs image processing on a plurality of image data acquired by the semiconductor device 800, and a parallax acquisition unit 802 that calculates parallax (phase difference of parallax image) from the plurality of image data acquired by the photoelectric conversion system 80. Here, the photoelectric conversion system 80 may include an optical system (not shown) that guides light to the semiconductor device 800, such as a lens, shutter, or mirror. Also, a plurality of photoelectric conversion units that are substantially conjugate to the pupil of the optical system may be arranged in pixels of the semiconductor device 800. For example, a plurality of photoelectric conversion units substantially conjugate to the pupil may be arranged corresponding to one microlens. Multiple photoelectric conversion units receive light beams that have passed through different positions in the pupil of the optical system, and the semiconductor device 800 outputs image data corresponding to the light beams that have passed through different positions. The parallax acquisition unit 802 may then calculate the parallax using the output image data. The photoelectric conversion system 80 also includes a distance acquisition unit 803 that calculates the distance to an object based on the calculated parallax, and a collision determination unit 804 that determines whether or not there is a possibility of collision based on the calculated distance. Here, the parallax acquisition unit 802 and the distance acquisition unit 803 are examples of distance information acquisition means that acquire distance information to an object. That is, distance information is information related to parallax, defocus amount, distance to an object, etc. The collision determination unit 804 may use any of this distance information to determine the possibility of collision. Note that the distance information may be acquired by ToF (Time of Flight). The distance information acquisition means may be implemented by specially designed hardware or by a software module. Furthermore, it may be implemented using FPGAs (Field Programmable Gate Arrays) or ASICs (Application Specific Integrated Circuits), or a combination thereof.

[0061] The photoelectric conversion system 80 is connected to the vehicle information acquisition device 810 and can acquire vehicle information such as vehicle speed, yaw rate, and steering angle. The photoelectric conversion system 80 is also connected to the control ECU 820, which is a control device that outputs a control signal to generate braking force on the vehicle based on the judgment result of the collision judgment unit 804. The photoelectric conversion system 80 is also connected to the warning device 830, which issues a warning to the driver based on the judgment result of the collision judgment unit 804. For example, if the collision judgment result of the collision judgment unit 804 indicates a high probability of collision, the control ECU 820 performs vehicle control to avoid a collision or mitigate damage by applying the brakes, releasing the accelerator, or suppressing engine output. The warning device 830 warns the user by sounding an alarm, displaying warning information on a screen such as a car navigation system, or vibrating the seat belt or steering wheel.

[0062] In this embodiment, the photoelectric conversion system 80 images the area around the vehicle, for example, in front of or behind it. Figure 9(c) shows the photoelectric conversion system 80 when imaging the area in front of the vehicle (imaging range 850). The vehicle information acquisition device 810 sends instructions to the photoelectric conversion system 80 or the semiconductor device 800. This configuration can further improve the accuracy of distance measurement.

[0063] The above example describes control to prevent collisions with other vehicles, but it can also be applied to control systems that automatically follow other vehicles or control systems that automatically stay within their lanes. Furthermore, the photoelectric conversion system 80 can be applied not only to vehicles such as automobiles, but also to mobile bodies (mobile devices) such as ships, aircraft, or industrial robots. This mobile body mainly includes a drive force generation unit that generates the driving force used for the movement of the mobile body, and one or both of a rotating body mainly used for the movement of the mobile body. The drive force generation unit may be an engine, motor, etc. The rotating body may be a tire, wheel, ship's screw, propeller, etc. In addition, it can be applied not only to mobile bodies, but also to a wide range of devices that utilize object recognition, such as intelligent transportation systems (ITS).

[0064] The equipment of this embodiment may be transportation equipment such as vehicles, ships, or aircraft. Mechanical devices in transportation equipment can be used as mobile devices. Equipment as transportation equipment is suitable for transporting semiconductor devices or for assisting and / or automating driving (piloting) through imaging functions. The processing device for assisting and / or automating driving (piloting) can perform processing to operate the mechanical device as a mobile device based on information obtained from the semiconductor device.

[0065] In this embodiment, a photoelectric conversion device was used as an example of a semiconductor device, but other semiconductor devices may be used, or both may be used.

[0066] Furthermore, the disclosure of this embodiment includes the following configuration.

[0067] (Method 1) A method for manufacturing a semiconductor device comprising: a substrate having a first surface and a second surface opposite to the first surface, and including a photoelectric conversion element that generates an electric charge corresponding to light incident from the first surface; and an insulating film disposed on the first surface, the method comprising: preparing the substrate on which the insulating film is provided, having an opening disposed in a position that overlaps with at least a portion of the photoelectric conversion element in a plan view with respect to the first surface; and applying a precursor to the substrate such that the amount applied to the upper part of the opening is greater than that applied to other parts, thereby forming a first film having a flat upper surface.

[0068] (Method 2) A method for manufacturing a semiconductor device according to Method 1, characterized in that, in the step of forming the first film, the upper surface of the precursor is flattened and cured to have a flat upper surface.

[0069] (Method 3) A method for manufacturing a semiconductor device according to method 1 or 2, characterized in that, in the step of forming the first film, a superstraight is brought into contact with the precursor.

[0070] (Method 4) A method for manufacturing a semiconductor device according to any one of methods 1 to 3, characterized in that, in the step of forming the first film, the superstraight is brought into contact with the precursor and the precursor is cured.

[0071] (Method 5) A method for manufacturing a semiconductor device according to any one of methods 1 to 4, characterized in that, in the step of forming the first film, the precursor is applied such that the amount applied to the upper part of the opening is greater than the amount applied to the upper part of the portion between the multiple openings.

[0072] (Method 6) A method for manufacturing a semiconductor device according to any one of methods 1 to 5, characterized in that the first film has a first portion disposed in the opening and a second portion disposed on the insulating film, and further comprises the step of removing the second portion.

[0073] (Method 7) A method for manufacturing a semiconductor device according to any one of methods 1 to 6, characterized in that, in the step of forming the first film, the first film is formed of a material different from the insulating film.

[0074] (Method 8) A method for manufacturing a semiconductor device according to any one of methods 1 to 7, comprising a transfer transistor for transferring the charge from the photoelectric conversion element, wherein, in a plan view with respect to the first surface, the gate electrode of the transfer transistor is arranged between a plurality of apertures.

[0075] (Method 9) A method for manufacturing a semiconductor device according to any one of methods 1 to 8, comprising a transfer transistor for transferring the charge from the photoelectric conversion element, wherein the first surface is disposed between the gate electrode of the transfer transistor and the second surface.

[0076] (Method 10) A method for manufacturing a semiconductor device according to any one of methods 1 to 9, wherein the substrate has a first region on which a plurality of photoelectric conversion elements are arranged, and a second region arranged between the first region and the edge of the substrate, and in the step of forming the first film, the precursor is applied such that the amount applied in the first region is greater than that applied in the second region.

Claims

1. A method for manufacturing a semiconductor device comprising a substrate having a first surface and a second surface opposite to the first surface, and including a photoelectric conversion element that generates an electric charge corresponding to light incident from the first surface, and an insulating film disposed on the first surface, A step of preparing the substrate on which the insulating film having an opening positioned to overlap with at least a portion of the photoelectric conversion element in a plan view of the first surface is provided; A method for manufacturing a semiconductor device, comprising the steps of: applying a precursor to the substrate such that the amount applied to the upper part of the opening is greater than that applied to other parts, thereby forming a first film having a flat upper surface.

2. The method for manufacturing a semiconductor device according to claim 1, characterized in that, in the step of forming the first film, the upper surface of the precursor is flattened and cured to have a flat upper surface.

3. The method for manufacturing a semiconductor device according to claim 1, characterized in that, in the step of forming the first film, a superstraight is brought into contact with the precursor.

4. The method for manufacturing a semiconductor device according to claim 3, characterized in that, in the step of forming the first film, the precursor is cured while the superstraight is in contact with the precursor.

5. The method for manufacturing a semiconductor device according to claim 1, characterized in that, in the step of forming the first film, the precursor is applied such that the amount applied to the upper part of the opening is greater than the amount applied to the upper part of the portion between the multiple openings.

6. The first film has a first portion disposed in the opening and a second portion disposed on the insulating film. The method for manufacturing a semiconductor device according to claim 1, further comprising the step of removing the second portion.

7. The method for manufacturing a semiconductor device according to claim 1, characterized in that, in the step of forming the first film, the first film is formed of a material different from the insulating film.

8. Includes a transfer transistor that transfers the charge from the photoelectric conversion element, The method for manufacturing a semiconductor device according to claim 1, characterized in that, in a plan view with respect to the first surface, the gate electrode of the transfer transistor is arranged between a plurality of apertures.

9. Includes a transfer transistor that transfers the charge from the photoelectric conversion element, The method for manufacturing a semiconductor device according to claim 1, characterized in that the first surface is disposed between the gate electrode of the transfer transistor and the second surface.

10. The substrate has a first region on which a plurality of photoelectric conversion elements are arranged, and a second region located between the first region and the edge of the substrate. The method for manufacturing a semiconductor device according to claim 1, characterized in that, in the step of forming the first film, the precursor is applied such that the amount applied in the first region is greater than that applied in the second region.

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