Element substrate, recording head, and recording device

Abstract

This suppresses failure or malfunction of elements on the element substrate caused by heat generation. [Solution] The laminated element substrate has, in the stacking direction of the element substrate, from bottom to top, a semiconductor material substrate, a plurality of MOS transistors provided on the semiconductor material substrate, an insulating layer provided on the plurality of MOS transistors, and a plurality of energy generating elements provided on the insulating layer and driven by the plurality of MOS transistors to generate heat for discharging liquid. Each energy generating element and at least one of the plurality of MOS transistors are positioned so that a portion of each overlaps in a plan view. Heat transfer wires made of a material with a higher thermal conductivity than the insulating layer are arranged in the insulating layer, and the heat transfer wires are positioned so that a portion of each energy generating element and a portion of the heat transfer wire overlap in a plan view, and are connected to the semiconductor material substrate.

Claims

1. A multilayer element substrate, In the stacking direction of the element substrate, from bottom to top, A semiconductor material substrate, Multiple MOS transistors (Metal-Oxide Semiconductor Transistors) are provided on the semiconductor material substrate, An insulating layer provided on the plurality of MOS transistors, A plurality of energy generating elements provided on the insulating layer and driven by the plurality of MOS transistors to generate heat for discharging liquid, It has, Each of the energy generating elements and at least one of the plurality of MOS transistors are positioned so that parts of them overlap in a plan view. A heat transfer wire made of a material with a higher thermal conductivity than the material of the insulating layer is arranged within the insulating layer. The heat transfer wire is positioned such that, in a plan view, each energy generating element and a portion of the heat transfer wire overlap each other, and is connected to the substrate of the semiconductor material. A device substrate characterized by the following features.

2. The element substrate according to claim 1, characterized in that the heat transfer wire is connected to the drain of the MOS transistor, which is positioned so that in a plan view, a portion of it overlaps with each of the energy generating elements.

3. The element substrate according to claim 2, characterized in that the MOS transistors, which are positioned in a plan view such that they partially overlap with each of the energy generating elements, have an offset gate structure in which the source, gate, and drain are asymmetrical.

4. The element substrate according to claim 3, wherein the MOS transistor is arranged in a position where a portion of each energy generating element overlaps with the others in a plan view, and the distance between the channel and the drain is longer than the distance between the channel and the source.

5. The element substrate according to claim 1, characterized in that the MOS transistors, which are arranged in a position where they partially overlap with each of the energy generating elements in a plan view, have a DMOS (Double-diffused Metal-Oxide Semiconductor) structure.

6. The element substrate according to claim 1, characterized in that the separation between segments of the MOS transistors, which are arranged in a plan view such that a portion of each energy generating element overlaps with each other, is source isolation performed using the source lines of the MOS transistors.

7. The aforementioned heat transfer wire has a multilayer structure, The element substrate according to claim 1, characterized in that, in a plan view, 50% or more of the area of ​​each energy generating element and the uppermost layer of the heat transfer wire are arranged to overlap with each other.

8. The aforementioned heat transfer wire has a multilayer structure, The element substrate according to claim 1, characterized in that, in a plan view, 10% or more of the area of ​​each energy generating element and the uppermost layer of the heat transfer wire are arranged to overlap with each other.

9. The aforementioned heat transfer wire has a multilayer structure, The element substrate according to claim 1, characterized in that, in a plan view, the center of each energy generating element and the uppermost layer of the heat transfer wire are positioned to overlap each other.

10. A recording head that ejects the liquid using an element substrate according to any one of claims 1 to 9.

11. A recording device that uses the recording head described in claim 10 to discharge the liquid onto a recording medium and record an image.

12. A multilayer element substrate, In the stacking direction of the element substrate, from bottom to top, A semiconductor material substrate, A plurality of first MOS transistors and a plurality of second MOS transistors are provided on the semiconductor material substrate, The semiconductor material substrate and the plurality of first MOS transistors and the plurality of second MOS transistors are provided with insulating layers, A plurality of first energy generating elements provided on the insulating layer and driven by the plurality of first MOS transistors to generate heat for discharging liquid, and a plurality of second energy generating elements driven by the plurality of second MOS transistors to generate heat for flowing the liquid, It has, Each of the first energy generating elements and each of the second energy generating elements, and at least one transistor of the plurality of first MOS transistors or at least one transistor of the plurality of second MOS transistors are arranged in a position where parts of each other overlap in a plan view. A heat transfer wire made of a material with a higher thermal conductivity than the material of the insulating layer is arranged within the insulating layer. The heat transfer wire is positioned such that, in a plan view, at least one of the first energy generating elements and each of the second energy generating elements and a portion of the heat transfer wire overlap each other, and is connected to the substrate of the semiconductor material. A device substrate characterized by the following features.

13. The element substrate according to claim 12, characterized in that the heat transfer wire is connected to the drain of the first MOS transistor or the drain of the second MOS transistor, which are positioned so that in a plan view a portion of each of the first energy generating elements and each of the second energy generating elements overlap each other.

14. The element substrate according to claim 13, characterized in that, in a plan view, at least one of the first energy generating elements and each of the second energy generating elements and the first MOS transistor or the second MOS transistor, which are arranged in a position where a portion of them overlap each other, have an offset gate structure in which the source, gate, and drain are asymmetrical.

15. The element substrate according to claim 14, wherein in a plan view, at least one of the first energy generating elements and each of the second energy generating elements is arranged in a position where a portion of them overlap with the first MOS transistor or the second MOS transistor, the distance between the channel and the drain is longer than the distance between the channel and the source.

16. The element substrate according to claim 12, characterized in that, in a plan view, at least one of the first energy generating elements and each of the second energy generating elements and the first MOS transistor or the second MOS transistor, which are arranged in a position where a portion of them overlap each other, have a DMOS structure.

17. The element substrate according to claim 12, characterized in that, in a plan view, the separation between at least one of the first energy generating elements and the second energy generating elements and the segments of the first MOS transistor or the second MOS transistor, which are arranged in positions where a portion of them overlap each other, is source isolation, which is achieved by separating them using the source lines of the first MOS transistor or the second MOS transistor.

18. The aforementioned heat transfer wire has a multilayer structure, The element substrate according to claim 12, characterized in that, in a plan view, 50% or more of the area of ​​at least one of the first energy generating elements and each of the second energy generating elements and the uppermost layer of the heat transfer wire are arranged to overlap each other.

19. The aforementioned heat transfer wire has a multilayer structure, The element substrate according to claim 12, characterized in that, in a plan view, 10% or more of the area of ​​at least one of the first energy generating elements and each of the second energy generating elements and the uppermost layer of the heat transfer wire are arranged to overlap each other.

20. The aforementioned heat transfer wire has a multilayer structure, The element substrate according to claim 12, characterized in that, in a plan view, the center of at least one of the first energy generating elements and each of the second energy generating elements and the uppermost layer of the heat transfer wire are positioned to overlap each other.

21. A recording head that ejects the liquid using an element substrate according to any one of claims 12 to 20.

22. A recording device that uses the recording head described in claim 21 to discharge the liquid onto a recording medium and record an image.

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