Information processing system and endianness conversion method
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- HITACHI LTD
- Filing Date
- 2024-12-11
- Publication Date
- 2026-06-23
AI Technical Summary
【0010】 本発明によれば、ハードウェアで構成された変換回路が、テーブルを参照して入力データのエンディアン変換の有無を判別して、変換が必要な場合に該当する変換処理を実行する。このため、本発明によると、エンディアン変換のためのソフトウェア処理が削減されるので、高速で適正なバイト順のデータが得られるようになる。 上記した以外の課題、構成及び効果は、以下の実施形態の説明により明らかにされる。
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Figure 2026102354000001_ABST
Abstract
Claims
1. An information processing system having an arithmetic processing unit that performs calculations and a memory that stores data handled by the arithmetic processing unit, A conversion circuit that performs a hardware-based conversion process to change the byte order of input data between big-endian and little-endian, The system includes a table that stores access patterns corresponding to the source and destination of the input data, The conversion circuit refers to the table to determine the access pattern of the input data, and performs either a big-endian conversion or a little-endian conversion according to the determined access pattern. Information processing system.
2. The aforementioned table is the address table of the memory, The conversion circuit determines the access pattern from the address of the memory that stores the data at the destination. The information processing system according to claim 1.
3. As the aforementioned conversion circuit, It comprises a first conversion circuit and a second conversion circuit. Based on the access pattern determined by referring to the table, the first conversion circuit performs a conversion from little-endian data to big-endian data. Furthermore, the second conversion circuit allows the big-endian data to pass through without conversion and be stored in the memory. The information processing system according to claim 1.
4. The memory is a memory element connected to a semiconductor chip that includes the hardware constituting the conversion circuit. The information processing system according to claim 1.
5. Multiple such arithmetic processing units are provided, and at least some of these arithmetic processing units are configured on a semiconductor chip separate from the hardware constituting the conversion circuit. The data supplied from the processing unit of the other semiconductor chip to the conversion circuit is passed through the conversion circuit without being converted and stored in the memory. The information processing system according to claim 1.
6. Multiple such arithmetic processing units are provided, and at least some of these arithmetic processing units are configured on a semiconductor chip separate from the hardware constituting the conversion circuit. When transferring data from the arithmetic processing unit within the semiconductor chip to the arithmetic processing unit of the other semiconductor chip, the conversion circuit performs a conversion from little-endian data to big-endian data. The information processing system according to claim 1.
7. This is an endian conversion method that performs data endian conversion when storing data for calculation processing in memory in an arithmetic processing unit that performs calculation processing. An access pattern determination process that identifies the access pattern from the source and destination of the input data, The process includes a conversion process in which a hardware conversion circuit performs a conversion to either big-endian or little-endian according to the access pattern determined in the access pattern determination process. Endian conversion method.