Liquid dispensing device

Abstract

To provide a liquid dispensing device that can reduce the risk of degrading the image quality formed on the medium and the risk of impairing convenience. [Solution] A liquid dispensing device having a sink circuit that switches the impedance value between a first wiring through which a reference voltage signal supplied to the other end of a first piezoelectric element and the other end of a second piezoelectric element propagates, and a second wiring through which a signal with a lower potential than the reference voltage signal propagates, according to the determination result of the state of a plurality of dispensing units in a state determination circuit, the sink circuit having a first mode in which the impedance value is a first impedance value, a second mode in which the impedance value is a second impedance value smaller than the first impedance value, and a third mode in which the impedance value is a third impedance value smaller than the second impedance value.

Description

Technical Field

[0001] The present invention relates to a liquid ejection device.

Background Art

[0002] A liquid ejection device (liquid injection device) is known that ejects a liquid by driving a piezoelectric element, and forms an image on a medium when the ejected liquid lands on the medium. In such a liquid ejection device, the piezoelectric element is driven by generating a potential difference between both ends of the piezoelectric element, and the liquid is ejected toward the medium by the driving of the piezoelectric element.

[0003] In a liquid ejection device having such a configuration, when an abnormality occurs in the piezoelectric element, the liquid ejection characteristics may deteriorate, and the image quality formed on the medium may deteriorate. In response to such a problem, Patent Document 1 discloses a liquid ejection device (liquid injection device) provided with a piezoelectric element in which the risk of an abnormality occurring in the piezoelectric element that drives the liquid to be ejected is reduced.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] However, with only the technology described in Patent Document 1, the risk of an abnormality occurring in the piezoelectric element cannot be completely suppressed. Therefore, from the perspective of reducing the risk of deterioration of the image quality formed on the medium when an abnormality occurs in the piezoelectric element and reducing the risk of impairing the convenience of the liquid ejection device, only the technology described in Patent Document 1 is not sufficient, and there is room for further improvement.

Means for Solving the Problems

[0006] One embodiment of the liquid dispensing device according to the present invention is: A print head having a plurality of discharge sections, including a first discharge section that discharges liquid by driving a first piezoelectric element, and a second discharge section that discharges liquid by driving a second piezoelectric element, A drive circuit that outputs a drive signal supplied to one end of the first piezoelectric element and one end of the second piezoelectric element, A reference voltage circuit that outputs a reference voltage signal supplied to the other end of the first piezoelectric element and the other end of the second piezoelectric element, A state determination circuit for determining the state of the plurality of discharge units, A sink circuit that switches the impedance value between a first wiring through which the reference voltage signal propagates and a second wiring through which a signal with a lower potential than the reference voltage signal propagates, according to the determination result of the state of the plurality of discharge units in the state determination circuit. Equipped with, The aforementioned sink circuit is A first mode in which the aforementioned impedance value is set to the first impedance value, A second mode in which the impedance value is set to a second impedance value smaller than the first impedance value, A third mode in which the impedance value is set to a third impedance value smaller than the second impedance value, It holds. [Brief explanation of the drawing]

[0007] [Figure 1] This figure shows an example of the functional configuration of a liquid dispensing device. [Figure 2] This figure shows an example of a schematic internal structure of a liquid dispensing device. [Figure 3] This is a diagram showing the schematic structure of the discharge section. [Figure 4] This is a diagram showing an example of nozzle arrangement. [Figure 5] This figure shows an example of the configuration of a drive circuit. [Figure 6] This is a diagram showing an example of a reference voltage circuit configuration. [Figure 7] This is a diagram showing an example of a sink circuit configuration. [Figure 8] It is a diagram showing an example of the functional configuration of the head unit. [Figure 9] It is a diagram for explaining an example of various signals input to the connection state specifying circuit. [Figure 10] It is a diagram showing an example of the configuration of the waveform shaping circuit. [Figure 11] It is a diagram for explaining an example of various signals output by the control unit during the period when the ejection process is being executed. [Figure 12] It is a diagram showing an example of the relationship between the individual specification signal Sd[m] and the connection state specification signals Qc[m], Qs[m] during the period when the ejection process is being executed. [Figure 13] It is a diagram for explaining an example of various signals input to the supply switching circuit of the head unit during the period when the determination process is being executed. [Figure 14] It is a diagram showing an example of the relationship between the individual specification signal Sd[m] and the connection state specification signals Qc[m], Qs[m] during the period when the determination process is being executed. [Figure 15] It is a diagram showing an example of the relationship between the individual specification signal Sd[m] and the connection state specification signals Qf, Q1, Q2 during the period when the determination process is being executed. [Figure 16] It is a diagram for explaining an example of the acquisition operation of the detection potential signal based on the signal corresponding to the residual vibration generated in the ejection part to be inspected. [Figure 17] It is a diagram showing an example of the pump suction process. [Figure 18] It is a diagram showing an example of the wiping process. [Figure 19] It is a diagram for explaining the control of the sink ability in the sink circuit.

Embodiment for Carrying Out the Invention

[0008] Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings. The drawings used are for convenience of explanation. Note that the embodiments described below do not unduly limit the content of the present invention described in the claims. Also, not all of the configurations described below are essential constituent elements of the present invention.

[0009] 1. Overview of the liquid ejection device The liquid ejection device 1 of the present embodiment will be described by exemplifying an inkjet printer that ejects ink as an example of a liquid onto a medium such as recording paper and forms an image on the medium. Note that the liquid ejection device 1 is not limited to an inkjet printer, and may be a colorant ejection device used for manufacturing color filters such as liquid crystal displays, an electrode material ejection device used for forming electrodes such as organic EL displays and FEDs (surface emission displays), a biological organic matter ejection device used for manufacturing biochips, a three-dimensional modeling device, a printing device, and the like.

[0010] FIG. 1 is a diagram showing an example of the functional configuration of the liquid ejection device 1. The liquid ejection device 1 of the present embodiment forms an image corresponding to an image data signal IMG input from an external device such as a computer on a medium. As shown in FIG. 1, the liquid ejection device 1 includes a control unit 2, a head unit 3, a sink unit 4, a drive circuit unit 5, a determination unit 7, a conveyance unit 8, a carriage movement unit 9, and a maintenance unit 10.

[0011] The control unit 2 controls each component of the liquid ejection device 1 including the head unit 3, the sink unit 4, the drive circuit unit 5, the determination unit 7, the conveyance unit 8, the carriage movement unit 9, and the maintenance unit 10. Such a control unit 2 includes one or more CPUs (Central Processing Units) and a storage circuit. Note that the control unit 2 may include a programmable logic device such as an FPGA (Field Programmable Gate Array) instead of or in addition to the CPU.

[0012] The image data signal IMG is input to the control unit 2. In response to the input image data signal IMG, the control unit 2 generates signals to control the operation of each part of the liquid dispensing device 1, such as the transport control signal Ctrl-T, carriage control signal Ctrl-C, maintenance control signal Ctrl-M, clock signal CL, print data signal SI, latch signal LAT, change signal CH, period specification signal Tsig, drive waveform specification signal dCOM, and sink control signal SS, and outputs them to the corresponding configuration.

[0013] The drive circuit unit 5 includes a drive circuit 50. A drive waveform specification signal dCOM is input to the drive circuit 50. The drive circuit 50 generates a drive signal COM by amplifying the signal waveform defined by the input drive waveform specification signal dCOM. The drive circuit 50 also generates a reference voltage signal VBS along with the drive signal COM. The drive signal COM and reference voltage signal VBS generated by the drive circuit 50 are then output from the drive circuit unit 5.

[0014] The sink unit 4 includes a sink circuit 40. The sink circuit 40 is connected to the wiring through which the reference voltage signal VBS propagates and to the wiring with ground potential. A sink control signal SS is also input to the sink circuit 40. Depending on the voltage value of the reference voltage signal VBS, the sink circuit 40 releases the charge from the wiring through which the reference voltage signal VBS propagates to the wiring through which the ground potential propagates, with a sink capability defined by the sink control signal SS.

[0015] The clock signal CL, print data signal SI, latch signal LAT, change signal CH, and period specification signal Tsig are input to the head unit 3. The head unit 3 also receives the drive signal COM and reference voltage signal VBS output by the drive circuit unit 5. The head unit 3 controls the supply of the drive signal COM to the multiple ejector units D included in the recording head 32 (described later) for each period defined by the latch signal LAT, change signal CH, and period specification signal Tsig, in accordance with the print data signal SI propagated in sync with the clock signal CL. This allows for individual control of the operation of the multiple ejector units D during each period defined by the latch signal LAT, change signal CH, and period specification signal Tsig, specifically controlling the ejection of ink from each of the multiple ejector units D.

[0016] Specifically, the head unit 3 includes a supply switching circuit 31, a recording head 32, and a detection circuit 33. The recording head 32 also has multiple discharge sections D. Here, in the following description, the recording head 32 will be described as having M discharge sections D. When the M discharge sections D of the recording head 32 are specified and described individually, they may be referred to as discharge sections D[1] to D[M]. In this case, when any m-th discharge section D among the M discharge sections D of the recording head 32 is specified and described, it may be referred to as discharge section D[m]. M is a natural number satisfying "M≧1", and m is any natural number satisfying "1≦m≦M". Furthermore, in the following description, when indicating that a component of the liquid discharge device 1 or a signal etc. corresponds to discharge section D[m] among the M discharge sections D, the subscript [m] may be added to the symbol representing the component or signal etc.

[0017] The clock signal CL, print data signal SI, latch signal LAT, change signal CH, period specification signal Tsig, and drive signal COM are input to the supply switching circuit 31. At each of the timings defined by the latch signal LAT, change signal CH, and period specification signal Tsig, the supply switching circuit 31 switches whether or not to supply the drive signal COM as a supply drive signal VIN to the corresponding ejection unit D based on the print data signal SI. This supply drive signal VIN is supplied to the piezoelectric element PZ, which will be described later, located in the ejection unit D, and the piezoelectric element PZ The piezoelectric element PZ is driven. Then, an amount of ink corresponding to the amount the piezoelectric element PZ is driven is ejected from the ejection unit D.

[0018] Furthermore, the supply switching circuit 31, at each of the timings defined by the latch signal LAT, the change signal CH, and the period specification signal Tsig, acquires a signal corresponding to the residual vibration generated in the ejection unit D to be inspected, based on the print data signal SI, and switches whether or not to supply it to the detection circuit 33 as a detection potential signal VX.

[0019] The detection circuit 33 generates a detection signal SK based on the detection potential signal VX supplied via the supply switching circuit 31 and outputs it from the head unit 3. Specifically, the detection circuit 33 amplifies the input detection potential signal VX, removes noise components, and then converts the signal into a digital signal to generate the detection signal SK, which is then output from the head unit 3.

[0020] The detection signal SK output from the head unit 3 is input to the determination unit 7. Based on the input detection signal SK, the determination unit 7 determines whether the ink ejection state at the ejection unit D under inspection is normal, and whether the ejection unit D under inspection is in a normal ejection state. Specifically, the determination unit 7 reads predetermined determination threshold information and correction value information from a storage circuit (not shown) including non-volatile memory such as ROM (Read Only Memory) or flash memory. The determination unit 7 corrects the input detection signal SK according to the read correction value information and compares the corrected signal with the predetermined determination threshold information. Then, based on the comparison result, the determination unit 7 determines whether an ejection abnormality has occurred at the ejection unit D under inspection, and whether the ejection unit D under inspection is in a normal ejection state. After that, the determination unit 7 generates a state determination signal JH indicating the determination result and outputs it to the control unit 2.

[0021] In the following explanation, determining whether or not an ejection abnormality has occurred in the ejection unit D under inspection, and determining whether or not the ejection unit D under inspection is in a normal ejection state, may be simply referred to as determining the state of the ejection unit D under inspection. Furthermore, an ejection abnormality is a general term for a state in which there is an abnormality in the ink ejection state from the ejection unit D under inspection, and in which ink cannot be accurately ejected from the ejection unit D under inspection. Such ejection abnormalities include, for example, a state in which ink cannot be ejected from the ejection unit D, a state in which an amount of ink different from the amount of ink ejection specified by the drive signal COM is ejected from the ejection unit D, and a state in which ink is ejected from the ejection unit D at a speed different from the ink ejection speed specified by the drive signal COM.

[0022] The transport control signal Ctrl-T is input to the transport unit 8. The transport unit 8 controls the transport of the medium to which the ink lands, according to the input transport control signal Ctrl-T. The carriage control signal Ctrl-C is input to the carriage movement unit 9. The carriage movement unit 9 controls the movement of the carriage, which will be described later, on which the head unit 3 is mounted. As a result, the control unit 2 controls the relative position between the head unit 3, which ejects the ink, and the medium to which the ink lands.

[0023] The maintenance control signal Ctrl-M is input to the maintenance unit 10. The maintenance unit 10 attempts to restore the state of the discharge unit D where the discharge abnormality occurred by executing maintenance processing in accordance with the input maintenance control signal Ctrl-M.

[0024] In the liquid ejection device 1 described above, when an ejection process is performed to form an image on a medium according to the image data signal IMG by ejecting ink, the control unit 2 generates a signal such as a print data signal SI to control the head unit 3 so that ink is ejected based on the input image data signal IMG, and outputs it to the head unit 3. The control unit 2 generates a drive waveform specification signal dCOM to control the drive circuit unit 5, which outputs a drive signal COM to drive the ejection unit D so that ink is ejected, and outputs it to the drive circuit unit 5. At the same time, the control unit 2 generates and outputs a transport control signal Ctrl-T to control the transport unit 8 and a carriage control signal Ctrl-C to control the carriage movement unit 9. As a result, the ink ejected from the ejection unit D lands at the desired position on the medium, and an image corresponding to the image data signal IMG is formed on the medium.

[0025] Furthermore, when a determination process is performed to determine the state of the ejection unit D, the control unit 2 generates a signal such as a print data signal SI to determine the state of the ejection unit D to be inspected and outputs it to the head unit 3. It also generates a drive waveform specification signal dCOM to control the drive circuit unit 5 to output a drive signal COM to determine the state of the ejection unit D and outputs it to the drive circuit unit 5. As a result, the detection circuit 33 receives a detection potential signal VX corresponding to the ejection unit D to be inspected via the supply switching circuit 31. The detection circuit 33 acquires the input detection potential signal VX, generates a detection signal SK corresponding to the acquired detection potential signal VX, and outputs it to the determination unit 7. Based on the input detection signal SK, the determination unit 7 determines whether the ink ejection state at the ejection unit D to be inspected is normal, and whether the ejection unit D to be inspected is in a normal ejection state. The determination unit 7 then generates a state determination signal JH according to the determination result of the state of the ejection unit D to be inspected and outputs it to the control unit 2. This allows the control unit 2 to acquire the state of the ejection unit D of the object being inspected and correct various signals to be output according to the acquired state of the ejection unit D of the object being inspected. As a result, the quality of the image formed on the medium is improved.

[0026] Furthermore, the control unit 2 outputs a maintenance control signal Ctrl-M to the maintenance unit 10 to perform maintenance processing. The maintenance unit 10 attempts to restore the state of the ejection unit D where the ejection abnormality occurred by performing maintenance processing in accordance with the input maintenance control signal Ctrl-M. This makes it possible to restore the state of the ejection unit D where the ejection abnormality occurred, and as a result, the quality of the image formed on the medium is improved.

[0027] As described above, the liquid dispensing device 1 of this embodiment performs various processes, including a dispensing process that forms an image on a medium corresponding to the image data signal IMG, a determination process that determines the state of the dispensing unit D that dispenses ink onto the medium, and a maintenance process that attempts to restore the state of the dispensing unit D.

[0028] Although Figure 1 illustrates a case where the liquid dispensing device 1 has one head unit 3, the liquid dispensing device 1 may have multiple head units 3. In this case, the liquid dispensing device 1 may have a control unit 2, a sink unit 4, a drive circuit unit 5, and a determination unit 7 corresponding to each of the multiple head units 3.

[0029] Next, an overview of the structure of the liquid ejection device 1 will be described. Figure 2 is a diagram showing an example of the schematic internal structure of the liquid ejection device 1. As shown in Figure 2, the liquid ejection device 1 of this embodiment is assumed to be a serial inkjet printer. That is, when the liquid ejection device 1 performs the ejection process, it transports a medium P such as recording paper along the sub-scanning direction, and while reciprocating a carriage 91 equipped with a head unit 3 along the main scanning direction intersecting the sub-scanning direction, it ejects ink from the head unit 3. At this time, the ink ejected from the head unit 3 lands at a desired position on the medium P, forming dots on the medium P corresponding to the image data signal IMG. Note that the liquid ejection device 1 is not limited to a serial inkjet printer, but may also be a line-type inkjet printer.

[0030] In the following explanation, we will use mutually orthogonal X, Y, and Z axes. In some cases, the starting point of an arrow indicating the direction along the X-axis is referred to as the -X side and the tip as the +X side; the starting point of an arrow indicating the direction along the Y-axis is referred to as the -Y side and the tip as the +Y side; and the starting point of an arrow indicating the direction along the Z-axis is referred to as the -Z side and the tip as the +Z side. In this embodiment, as illustrated in Figure 2, the liquid dispensing device 1 has a sub-scanning direction along the X-axis and a main scanning direction along the Y-axis, and the medium P is transported along the X-axis with the -X side being the upstream side and the +X side being the downstream side, and the carriage 91 is provided to reciprocate along the Y-axis.

[0031] As shown in Figure 2, the liquid ejection device 1 comprises a housing 100 and a carriage 91 that is reciprocally movable in the Y-axis direction within the housing 100 and is equipped with one or more head units 3. The carriage 91 is also equipped with four ink cartridges 120 that correspond one-to-one with four colors of ink: cyan, magenta, yellow, and black. In this embodiment, as an example, the liquid ejection device 1 is assumed to be equipped with four head units 3 that correspond one-to-one with four ink cartridges 120.

[0032] Each of the four head units 3 has M ejection ports D, which are supplied with ink from the corresponding ink cartridge 120. As a result, the inside of the 4M ejection ports D of each of the four head units 3 are filled with ink supplied from the corresponding ink cartridge 120. Each of the 4M ejection ports D of each of the four head units 3 then ejects the filled ink toward the medium P. Note that the ink cartridge 120 may not be mounted on the carriage 91, but may be provided outside the carriage 91.

[0033] Furthermore, the liquid dispensing device 1 of this embodiment includes, as the carriage movement unit 9 described above, a carriage transport mechanism 92 for reciprocating the carriage 91 along the Y axis, and a carriage guide shaft 93 for supporting the carriage 91 so that it can reciprocate in the direction along the Y axis. The transport unit 8 includes a medium transport mechanism 81 for transporting the medium P, and a platen 82 provided on the -Z side of the carriage 91. When the dispensing process is performed, the carriage transport mechanism 92 causes the carriage 91, on which the head unit 3 is mounted, to reciprocate along the Y axis along the carriage guide shaft 93, and the medium transport mechanism 81 transports the medium P on the platen 82 along the X axis from the -X side to the +X side. As a result, the relative position of the medium P with respect to the head unit 3 changes, making it possible for ink to land on the entire medium P.

[0034] Here, we will describe an example of the structure of one of the multiple ejection units D that eject ink onto the medium P. Figure 3 is a schematic diagram of the ejection unit D. As shown in Figure 3, the ejection unit D includes a piezoelectric element PZ, a cavity 322 filled with ink, a nozzle N communicating with the cavity 322, and a diaphragm 321. The ejection unit D is activated when a supply drive signal VIN is supplied to the piezoelectric element PZ, which drives the piezoelectric element PZ, causing the ink stored inside the cavity 322 to be ejected from the nozzle N.

[0035] The cavity 322 is a space partitioned by a cavity plate 324, a nozzle plate 323 on which the nozzle N is formed, and a diaphragm 321. The cavity 322 communicates with a reservoir 325 via an ink supply port 326, and the reservoir 325 communicates with an ink cartridge 120 corresponding to the ejection section D via an ink intake port 327. As a result, ink is supplied to the inside of the cavity 322 from the corresponding ink cartridge 120 via the ink intake port 327, the reservoir 325, and the ink supply port 326. Therefore, the inside of the cavity 322 is filled with ink supplied from the corresponding ink cartridge 120.

[0036] The piezoelectric element PZ has an upper electrode Zu, a lower electrode Zd, and a piezoelectric body Zm. The piezoelectric body Zm is located between the upper electrode Zu and the lower electrode Zd. The upper electrode Zu is supplied with a supply drive signal VIN output by the supply switching circuit 31. The lower electrode Zd is supplied with a reference voltage signal VBS propagating through the wiring Lb. The piezoelectric body Zm is displaced along the Z-axis to the +Z side or the -Z side according to the potential difference between the upper electrode Zu and the lower electrode Zd, which is the potential difference between the voltage value of the supply drive signal VIN supplied to the upper electrode Zu and the voltage value of the reference voltage signal VBS supplied to the lower electrode Zd. In other words, the piezoelectric element PZ is driven to be displaced along the Z-axis to the +Z side or the -Z side according to the potential difference between the voltage value of the supply drive signal VIN and the voltage value of the reference voltage signal VBS. Here, the reference voltage signal VBS supplied to the lower electrode Zd is a signal that serves as the reference potential for driving the piezoelectric element PZ, and its potential is constant, such as 5.5V, 6V, or ground potential.

[0037] The lower electrode Zd is joined to the diaphragm 321. Therefore, when the piezoelectric element PZ is driven to displace along the Z-axis by the supply drive signal VIN, the diaphragm 321 also displaces along the Z-axis. This displacement of the diaphragm 321 changes the internal volume and internal pressure of the cavity 322. Then, in accordance with the changes in the internal volume and internal pressure of the cavity 322, the ink filled inside the cavity 322 is ejected from the nozzle N. That is, an amount of ink corresponding to the amount of drive of the piezoelectric element PZ is ejected from the nozzle N of the ejection unit D. In other words, the piezoelectric element PZ ejects an amount of ink from the ejection unit D corresponding to the displacement caused by the supply drive signal VIN corresponding to the drive signal COM. That is, the ejection unit D includes a piezoelectric element PZ driven by the drive signal COM, and ejects ink by driving the piezoelectric element PZ. In other words, the liquid ejection device 1 has an ejection unit D that ejects ink, which is an example of a liquid.

[0038] Figure 4 shows an example of the arrangement of a total of 4M discharge units D and 4M nozzles N, which are provided on four head units 3. As shown in Figure 4, the four head units 3 are positioned side by side along the Y-axis on the carriage 91. At this time, the M discharge units D and nozzles N of each of the four head units 3 are arranged side by side along the X-axis. Specifically, the M discharge units D[1] to D[M] of the head unit 3 are positioned adjacent to each other along the X-axis from the -X side to the +X side in the order of discharge unit D[1], discharge unit D[2], discharge unit D[3], ..., discharge unit D[M]. That is, the head unit 3 includes a nozzle row NL formed by the arrangement of M nozzles N, which are provided on each of the M discharge units D, side by side along the X-axis from the -X side to the +X side. Therefore, the carriage 91 has four rows of nozzles NL, each containing one of the four head units 3, formed along the Y-axis. Ink is ejected from each of the nozzles N that form the nozzle rows NL contained in each of the four head units 3. Hereinafter, in the following description, the surface on which multiple nozzle rows NL are formed by the multiple head units 3 mounted on the carriage 91, which is located facing the medium P and from which ink is ejected toward the medium P, may be referred to as the ejection surface 115.

[0039] In other words, the liquid ejection device 1 of this embodiment includes a recording head 32 having a plurality of ejection units D, including an ejection unit D[1] that ejects ink by driving a piezoelectric element PZ[1] and an ejection unit D[m] that ejects ink by driving a piezoelectric element PZ[m], and a head unit 3.

[0040] 2. Configuration and Operation of the Drive Circuit Next, the configuration and operation of the drive circuit 50 in the drive circuit unit 5 will be described. As described above, the drive circuit 50 generates and outputs the drive signal COM by amplifying the signal waveform defined by the drive waveform specification signal dCOM.

[0041] Figure 5 shows an example of the configuration of the drive circuit 50. As shown in Figure 5, the drive circuit 50 has an integrated circuit 500, an amplification circuit 550, a demodulation circuit 560, feedback circuits 570, 572, and several other circuit elements. The integrated circuit 500 generates gate signals Hgd and Lgd based on the drive waveform specification signal dCOM and outputs them to the amplification circuit 550. The amplification circuit 550 has transistors M1 and M2, and when transistors M1 and M2 are driven based on the gate signals Hgd and Lgd, it generates amplified modulation signals AMs and outputs them to the demodulation circuit 560. The demodulation circuit 560 demodulates the amplified modulation signals AMs by smoothing them. The signal demodulated by this demodulation circuit 560 is output as a drive signal COM from the drive circuit 50 and the drive circuit unit 5.

[0042] The integrated circuit 500 has multiple terminals, including terminals In, Bst, Hdr, Sw, Gvd, Ldr, Gnd, Ifb, Vfb, and Vbs. The integrated circuit 500 is electrically connected to an external circuit through these multiple terminals. The integrated circuit 500 also includes a DAC (Digital to Analog Converter) 511, a modulation circuit 510, and a gate drive circuit 520.

[0043] The DAC511 converts the drive waveform specification signal dCOM, which is a digital signal that defines the signal waveform of the drive signal COM, into an analog signal, the base drive waveform signal aO, and outputs it to the modulation circuit 510. The amplified signal of the base drive waveform signal aO output by the DAC511 corresponds to the drive signal COM. In other words, the base drive waveform signal aO is the target analog signal before amplification of the drive signal COM, and the drive waveform specification signal dCOM is the target digital signal before amplification of the drive signal COM, and is a digital signal that defines the shape of the signal waveform of the drive signal COM. The voltage amplitude of the base drive waveform signal aO output by the DAC511 is set to, for example, 1V to 2V.

[0044] The modulation circuit 510 generates a modulated signal Ms by modulating the base drive waveform signal aO and outputs it to the gate drive circuit 520. The modulation circuit 510 includes adders 512, 513, a comparator 514, an inverter 515, an integral attenuator 516, and an attenuator 517.

[0045] The integrating attenuator 516 attenuates and integrates the voltage value of the drive signal COM input via terminal Vfb, and outputs the integrated signal to the negative input terminal of adder 512. The base drive waveform signal aO is input to the positive input terminal of adder 512. Adder 512 generates a signal with a voltage value obtained by subtracting the voltage value of the signal input to the negative input terminal from the voltage value of the signal input to the positive input terminal and integrating it, and outputs this signal to the positive input terminal of adder 513. Here, as mentioned above, the maximum voltage amplitude of the base drive waveform signal aO is about 2V, while the voltage value of the drive signal COM can exceed 40V at its maximum value. In order to determine the deviation, the integrating attenuator 516 attenuates the drive signal COM input via terminal Vfb in order to match the range of the voltage amplitude of the base drive waveform signal aO with the range of the voltage value amplitude of the drive signal COM.

[0046] The attenuator 517 supplies a voltage obtained by attenuating the high-frequency component of the drive signal COM input via terminal Ifb to the negative input terminal of the adder 513. The signal output by adder 512 is input to the positive input terminal of adder 513. Adder 513 generates a voltage signal As by subtracting the voltage value of the signal input to the negative input terminal from the voltage value of the signal input to the positive input terminal, and outputs it to comparator 514. The voltage signal As is obtained by subtracting the voltage value of the signal supplied to terminal Vfb from the voltage value of the base drive waveform signal aO, and then further subtracting the voltage value of the signal supplied to terminal Ifb. Therefore, the voltage signal As is a signal in which the deviation obtained by subtracting the attenuated voltage of the drive signal COM from the voltage value of the target base drive waveform signal aO is corrected by the high-frequency component of the drive signal COM.

[0047] Comparator 514 pulse-modulates the voltage signal As and outputs it as the modulated signal Ms. Specifically, the comparator 514 outputs a modulated signal Ms that becomes H level when the voltage value of the voltage signal As rises to or above a predetermined threshold Vth1, and L level when the voltage value of the voltage signal As falls below a predetermined threshold Vth2, during the period when the voltage value of the voltage signal As is falling. Here, the thresholds Vth1 and Vth2 are set such that threshold Vth1 > threshold Vth2. The frequency and duty cycle of this modulated signal Ms change in accordance with the drive waveform specification signal dCOM and the base drive waveform signal aO. That is, the amount of change in the frequency and duty cycle of the modulated signal Ms can be adjusted by adjusting the modulation gain, which corresponds to the sensitivity of the attenuator 517.

[0048] The modulated signal Ms is input to the gate driver 521 included in the gate drive circuit 520. Furthermore, the modulated signal Ms is inverted at a logic level by the inverter 515 and then input to the gate driver 522 also included in the gate drive circuit 520. In other words, signals with mutually exclusive logic levels are input to gate driver 521 and gate driver 522.

[0049] Here, the timing of the signals input to gate drivers 521 and 522 may be controlled so that their logic levels are not simultaneously at a high level. In other words, the "mutually exclusive relationship of logic levels" mentioned above means that the logic level of the signal input to gate driver 521 and the logic level of the signal input to gate driver 522 are not simultaneously at a high level, and this includes the case where the logic level of the signal input to gate driver 521 and the logic level of the signal input to gate driver 522 are simultaneously at a low level.

[0050] The gate drive circuit 520 includes gate driver 521 and gate driver 522.

[0051] The gate driver 521 generates a gate signal Hgd by level-shifting the modulated signal Ms output by the comparator 514, and outputs it from the integrated circuit 500 via terminal Hdr. Of the power supply voltage of the gate driver 521, the high-potential side is supplied via terminal Bst, and the low-potential side is supplied via terminal Sw. Terminal Bst is electrically connected to one end of capacitor C5 and the cathode of diode D1. The other end of capacitor C5 is electrically connected to terminal Sw. The anode of diode D1 is electrically connected to terminal Gvd. In addition, a voltage signal VM, which is a DC voltage of, for example, 7.5V generated by a power supply circuit (not shown), is supplied to terminal Gvd. As a result, the potential difference between terminal Bst and terminal Sw is the potential difference across capacitor C5, which is approximately equal to the voltage value of the voltage signal VM. Therefore, the gate driver 521 generates a gate signal Hgd, which, according to the logic level of the input modulation signal Ms, has a high-level voltage value that is greater than the voltage value of terminal Sw by the voltage value of voltage signal VM, and a low-level voltage value that is the voltage value of terminal Sw, and outputs this signal from terminal Hdr.

[0052] The gate driver 522 operates at a lower potential than the gate driver 521. The gate driver 522 generates a gate signal Lgd by level-shifting the signal obtained by inverting the logic level of the modulated signal Ms output by the comparator 514 with the inverter 515, and outputs it from the integrated circuit 500 via terminal Ldr. Of the power supply voltage of the gate driver 522, the voltage signal VM is supplied to the high potential side, and the ground potential is supplied to the low potential side via terminal Gnd. The gate driver 522 then generates a gate signal Lgd at ground potential, where the H level voltage value is greater than the voltage value of the voltage signal VM relative to terminal Gnd, and the L level voltage value is the voltage value of terminal Gnd, and outputs it from terminal Ldr.

[0053] As described above, the gate signal Hgd is a signal obtained by level-shifting the voltage value of the modulated signal Ms, and the gate signal Lgd is a signal obtained by level-shifting the voltage value of the inverted signal after inverting the logic level of the modulated signal Ms. In light of this, the gate signals Hgd and Lgd output by the gate drive circuit 520 can also be considered to be signals obtained by modulating the drive waveform specification signal dCOM and the base drive waveform signal aO.

[0054] The amplification circuit 550 includes a pair of transistors M1 and M2, which are semiconductor elements such as N-type FETs (Field Effect Transistors).

[0055] A voltage signal VHV, for example, a DC voltage of 42V, is supplied to the drain terminal of transistor M1. The voltage value of the voltage signal VHV is not limited to 42V and only needs to be greater than the maximum voltage value of the drive signal COM output by the drive circuit 50 and the drive circuit unit 5. The gate terminal of transistor M1 is electrically connected to one end of resistor R1. The other end of resistor R1 is electrically connected to terminal Hdr of integrated circuit 500. That is, the gate signal Hgd output by integrated circuit 500 is input to the gate terminal of transistor M1. The source terminal of transistor M1 is electrically connected to terminal Sw of integrated circuit 500. The conduction state between the drain terminal and the source terminal of transistor M1 is controlled by the gate signal Hgd input to the gate terminal.

[0056] The drain terminal of transistor M2 is electrically connected to terminal Sw of integrated circuit 500. That is, the drain terminal of transistor M2 and the source terminal of transistor M1 are electrically connected to each other. The gate terminal of transistor M2 is electrically connected to one end of resistor R2. The other end of resistor R2 is electrically connected to terminal Ldr of integrated circuit 500. That is, the gate signal Lgd output by integrated circuit 500 is input to the gate terminal of transistor M2. Ground potential is supplied to the source terminal of transistor M2. The conduction state between the drain terminal and the source terminal of transistor M2 is controlled by the gate signal Lgd input to the gate terminal.

[0057] In the following explanation, the state in which the drain and source terminals of transistors M1 and M2 are controlled to conduct is referred to as "on," and the state in which the drain and source terminals of transistors M1 and M2 are controlled to not conduct is referred to as "off."

[0058] In the amplifier circuit 550 configured as described above, when transistor M1 is controlled to be off and transistor M2 is controlled to be on, the node to which terminal Sw is connected becomes ground potential. At this time, the voltage signal VM is supplied to terminal Bst. On the other hand, when transistor M1 is controlled to be on and transistor M2 is controlled to be off, the node to which terminal Sw is connected becomes the voltage signal VHV. Therefore, the terminal Bst is supplied with a voltage signal that is the sum of the voltage value of the voltage signal VHV and the voltage value of the voltage signal VM. In other words, the gate driver 521 that drives transistor M1 uses capacitor C5 as a floating power supply, and the potential of terminal Sw at the other end of capacitor C5 changes to ground potential or the voltage value of voltage signal VHV in accordance with the operation of transistors M1 and M2. As a result, the gate driver 521 generates a gate signal Hgd where the L level is the voltage value of voltage signal VHV and the H level is the sum of the voltage value of voltage signal VHV and the voltage value of voltage signal VM, and supplies this to the gate terminal of transistor M1.

[0059] On the other hand, the gate driver 522 that drives transistor M2 generates a gate signal Lgd where the L level is ground potential and the H level is the voltage value of the voltage signal VM, regardless of the operation of transistors M1 and M2, and supplies it to the gate terminal of transistor M2.

[0060] As described above, the amplifier circuit 550 operates transistors M1 and M2 in accordance with the gate signals Hgd and Lgd, thereby amplifying the modulated signal Ms, which is a modulated version of the drive waveform specification signal dCOM and the base drive waveform signal aO, based on the voltage signal VHV. The amplifier circuit 550 then outputs the amplified signal as the amplified modulated signal AMs from the connection point where the source terminal of transistor M1 and the drain terminal of transistor M2 are commonly connected.

[0061] The demodulation circuit 560 demodulates the amplified modulation signal AMs by smoothing them and generates a drive signal COM. The demodulation circuit 560 then outputs the generated drive signal COM from the drive circuit 50.

[0062] The demodulation circuit 560 includes a coil L1 and a capacitor C1. One end of coil L1 is electrically connected to the source terminal of transistor M1 and the drain terminal of transistor M2. As a result, the amplified modulation signal AMs is input to one end of coil L1. The other end of coil L1 is also connected to one end of capacitor C1. The other end of capacitor C1 is supplied with ground potential. In other words, coil L1 and capacitor C1 constitute a low-pass filter. The amplified modulation signal AMs is smoothed by the low-pass filter configured in the demodulation circuit 560, and a drive signal COM is generated at the connection point where the other end of coil L1 and one end of capacitor C1 are electrically connected.

[0063] The feedback circuit 570 includes resistors R3 and R4. A drive signal COM is supplied to one end of resistor R3, and the other end of resistor R3 is connected to terminal Vfb and one end of resistor R4. A voltage signal VHV is supplied to the other end of resistor R4. As a result, the drive signal COM, which has passed through the feedback circuit 570, is fed back to terminal Vfb in a pulled-up state.

[0064] The feedback circuit 572 includes capacitors C2, C3, and C4, and resistors R5 and R6. One end of capacitor C2 is supplied with the drive signal COM, and the other end of capacitor C2 is connected to one end of resistor R5 and one end of resistor R6. The other end of resistor R5 is supplied with ground potential. As a result, capacitor C2 and resistor R5 function as a high-pass filter.

[0065] Furthermore, the other end of resistor R6 is connected to one end of capacitor C4 and one end of capacitor C3. The other end of capacitor C3 is supplied with ground potential. As a result, resistor R6 and capacitor C3 function as a low-pass filter.

[0066] As described above, the feedback circuit 572 is configured with a high-pass filter and a low-pass filter. As a result, the feedback circuit 572 functions as a band-pass filter that allows a predetermined frequency range of the drive signal COM to pass through. The other end of capacitor C4 included in the feedback circuit 572 is connected to terminal Ifb of the integrated circuit 500. As a result, the signal that is fed back to terminal Ifb is the drive signal COM that has passed through the feedback circuit 572, which functions as a band-pass filter that allows predetermined frequency components to pass through, with the DC component of the high-frequency components removed.

[0067] As described above, the drive signal COM output by the drive circuit 50 is a demodulated signal obtained by the demodulation circuit 560 smoothing the amplified modulation signal AMs based on the drive waveform specification signal dCOM. The drive signal COM output by the demodulation circuit 560 is then integrated and attenuated via the feedback circuit 570 and terminal Vfb before being fed back to the adder 512. As a result, the drive circuit 50 self-oscillates at a frequency determined by the feedback delay and the feedback transfer function. However, the delay is large if only the feedback path via terminal Vfb is used, and therefore, the feedback via terminal Vfb However, in some cases, the self-oscillation frequency cannot be increased to a level that sufficiently ensures the accuracy of the drive signal COM.

[0068] In this embodiment, the drive circuit 50 has a separate path for feeding back the high-frequency components of the drive signal COM via the feedback circuit 572 and terminal Ifb, in addition to the path via terminal Vfb. As a result, in the drive circuit 50 of this embodiment, the overall delay of the circuit can be reduced, and the frequency of the voltage signal As can be increased to a level that sufficiently ensures the accuracy of the drive signal COM, compared to the case where there is no path via terminal Ifb. Consequently, the waveform accuracy of the drive signal COM is improved.

[0069] In other words, the drive circuit 50 includes a Class D amplifier circuit and outputs a drive signal COM that is supplied to the upper electrode Zu[1] which is one end of the piezoelectric element PZ[1] and the upper electrode Zu[m] which is one end of the piezoelectric element PZ[m].

[0070] Furthermore, as shown in Figure 5, the integrated circuit 500 of the drive circuit 50 has a reference voltage circuit 530. The reference voltage circuit 530 generates a reference voltage signal VBS by stepping down the voltage value of the voltage signal VM, and outputs it from the drive circuit 50 and the drive circuit unit 5 via the terminal Vbs of the integrated circuit 500.

[0071] Figure 6 shows an example of the configuration of the reference voltage circuit 530. The reference voltage circuit 530 includes a comparator 531, a transistor 532, and resistors 534 and 535. Note that transistor 532 is assumed to be a PMOS transistor for this explanation.

[0072] A reference voltage Vref is supplied to the negative input terminal of comparator 531. The reference voltage Vref can be generated, for example, based on the bandgap reference voltage of integrated circuit 500. The positive input terminal of comparator 531 is electrically connected to one end of resistor 534 and one end of resistor 535. The output terminal of comparator 531 is electrically connected to the gate terminal of transistor 532. A voltage signal VM is supplied to the source terminal of transistor 532. The drain terminal of transistor 532 is electrically connected to the other end of resistor 534. Ground potential is supplied to the other end of resistor 535. The reference voltage circuit 530 outputs a reference voltage signal VBS from the connection point where the drain terminal of transistor 532 and the other end of resistor 534 are electrically connected.

[0073] In the reference voltage circuit 530 configured as described above, if the voltage value supplied to the + input terminal of comparator 531 is greater than the voltage value of the reference voltage Vref supplied to the - input terminal of comparator 531, comparator 531 outputs a high-level signal. At this time, transistor 532 is controlled to be off. Therefore, no voltage signal VM is supplied to the connection point where the drain terminal of transistor 532 and the other end of resistor 534 are electrically connected. On the other hand, if the voltage value supplied to the - input terminal of comparator 531 is less than the voltage value of the reference voltage Vref supplied to the - input terminal of comparator 531, comparator 531 outputs a low-level signal. At this time, transistor 532 is controlled to be on. Therefore, a voltage signal VM is supplied to the connection point where the drain terminal of transistor 532 and the other end of resistor 534 are electrically connected.

[0074] In other words, in the reference voltage circuit 530, the comparator 531 and transistor 532 operate so that the voltage value obtained by dividing the voltage value of the reference voltage signal VBS, which is the voltage value at the connection point where the drain terminal of transistor 532 and the other end of resistor 534 are electrically connected, by resistors 534 and 535, is equal to the voltage value of the reference voltage Vref. In this way, the reference voltage circuit 530 generates and outputs a reference voltage signal VBS with a constant voltage value. In other words, the reference voltage circuit 530 generates and outputs a reference voltage signal VBS with a constant voltage value by stepping down the voltage value of the voltage signal VM. The VBS signal is generated and output from the drive circuit 50 and the drive circuit unit 5 via the Vbs terminal of the integrated circuit 500.

[0075] In other words, the drive circuit unit 5 has a reference voltage circuit 530 that outputs a reference voltage signal VBS supplied to the lower electrode Zd[1], which is the other end of the piezoelectric element PZ[1], and to the lower electrode Zd[m], which is the other end of the piezoelectric element PZ[m].

[0076] The reference voltage circuit 530 may be configured separately from the drive circuit unit 5, and in this case, some or all of the circuit elements that make up the reference voltage circuit 530 may be composed of discrete components outside the integrated circuit 500. However, as shown in Figure 5, it is preferable that all of the circuit elements that make up the reference voltage circuit 530 are configured inside the integrated circuit 500. This makes it possible to miniaturize the drive circuit unit 5, which includes the drive circuit 50 and the reference voltage circuit 530, and the liquid dispensing device 1 having the drive circuit unit 5.

[0077] 3. Configuration and Operation of the Sink Circuit Next, the configuration and operation of the sink circuit 40 of the sink unit 4 will be described. Figure 7 shows an example of the configuration of the sink circuit 40. As described above, the sink circuit 40 releases the charge from the wiring Lb through which the reference voltage signal VBS propagates to the wiring Lg through which the ground potential propagates, with a sink capability defined by the sink control signal SS, according to the voltage value of the reference voltage signal VBS. Here, sink capability is the amount of charge that can be released from the wiring through which the reference voltage signal VBS propagates to the wiring through which the ground potential propagates, and is a capability corresponding to the amount of current that can flow from the wiring through which the reference voltage signal VBS propagates to the wiring through which the ground potential propagates. In the following explanation, high sink capacity means the amount of charge that can be released from the wiring through which the reference voltage signal VBS propagates to the wiring through which the ground potential propagates, and that the amount of current that can flow from the wiring through which the reference voltage signal VBS propagates to the wiring through which the ground potential propagates is large. Low sink capacity means the amount of charge that can be released from the wiring through which the reference voltage signal VBS propagates to the wiring through which the ground potential propagates, and that the amount of current that can flow from the wiring through which the reference voltage signal VBS propagates to the wiring through which the ground potential propagates is small.

[0078] If a short circuit occurs in one of the piezoelectric elements PZ[1] to PZ[M], which are located in each of the discharge sections D[1] to D[M], for example, in piezoelectric element PZ[m], the amount of current flowing into the wiring Lb through the short-circuited piezoelectric element PZ[m] increases. As the amount of current propagating through the wiring Lb increases, the voltage value of the signal propagating through the wiring Lb, which is the voltage value of the reference voltage signal VBS, rises. Subsequently, when this voltage value exceeds a predetermined detection threshold that activates the overvoltage protection function (not shown) of the liquid discharge device 1, the liquid discharge device 1 stops operating.

[0079] On the other hand, the liquid ejection device 1 has a so-called complementary function in which, if ink is not ejected from ejection section D[m], the dots that would normally be formed on the medium P by the ink ejected from ejection section D[m] are filled in with dots formed by the ink ejected from at least one of ejection sections D[m+1] and D[m-1], which are located adjacent to ejection section D[m]. In a liquid ejection device 1 having such a complementary function, if the liquid ejection device 1 stops operating due to a short-circuit abnormality occurring in a small number of piezoelectric elements PZ among the piezoelectric elements PZ[1] to PZ[M], the liquid ejection device 1 will stop operating even though it is possible to form an image on the medium P corresponding to the image data signal IMG, and as a result, the productivity of the liquid ejection device 1 may decrease.

[0080] To address this problem, the sink circuit 40 grounds the charge on the wiring Lb when the voltage value of the reference voltage signal VBS, which is the voltage value of the signal propagating through the wiring Lb, exceeds a predetermined voltage value. The sink circuit 40 has a sink function that releases the potential to the wiring Lg through which the potential propagates. As a result, the sink circuit 40 reduces the risk of the voltage value of the reference voltage signal VBS rising, which is the voltage value of the signal propagating through the wiring Lb, and reduces the risk of the liquid dispensing device 1 stopping due to a short-circuit abnormality occurring in a small number of piezoelectric elements PZ[1] to PZ[M] among the piezoelectric elements PZ[1] to PZ[M] in each of the dispensing sections D[1] to D[M]. As a result, even if a short-circuit abnormality occurs in a small number of piezoelectric elements PZ[m] among the piezoelectric elements PZ[1] to PZ[M] in each of the dispensing sections D[1] to D[M], the risk of a decrease in productivity in the liquid dispensing device 1 can be reduced.

[0081] On the other hand, the voltage value of the reference voltage signal VBS, which is the voltage value of the signal propagating through the wiring Lb, may rise due to factors other than a short-circuit abnormality of the piezoelectric element PZ[m], such as a malfunction of the reference voltage circuit 530, a short-circuit abnormality between multiple wiring patterns including wiring Lb, or interference from external noise. In such cases, it is preferable for the liquid dispensing device 1 to stop from the viewpoint of operational stability, but because the sink function of the sink circuit 40 is activated, the risk of the voltage value of the reference voltage signal VBS, which is the voltage value of the signal propagating through the wiring Lb, rising is reduced, which may mean that the overvoltage protection function of the liquid dispensing device 1 described above may not be able to detect the rise in the voltage value. If the liquid dispensing device 1 continues to operate in such a state, the image quality formed on the medium P by the liquid dispensing device 1 may deteriorate.

[0082] Therefore, the sink circuit 40 is required to operate with an appropriate sink capacity according to the operating status of the liquid dispensing device 1. In response to this, the sink circuit 40 of the liquid dispensing device 1 in this embodiment can control its sink capacity according to the sink control signal SS output by the control unit 2, and thus can operate with an appropriate sink capacity according to the operating status of the liquid dispensing device 1. As a result, the risk of a decrease in the image quality formed on the medium P by the liquid dispensing device 1 is reduced, while the risk of a decrease in the productivity of the liquid dispensing device 1 and a decrease in the convenience of the liquid dispensing device 1 can be reduced.

[0083] An example of the configuration and operation of such a sink circuit 40 will be described. Figure 7 is a diagram showing an example of the configuration of the sink circuit 40. As shown in Figure 7, the sink circuit 40 has a resistor 401, a constant voltage diode 402, a transistor 403, and a variable resistor circuit 410.

[0084] Transistor 403 is a PNP bipolar transistor. The emitter terminal of transistor 403 is electrically connected to the wiring Lb through which the reference voltage signal VBS propagates. The collector terminal of transistor 403 is electrically connected to one end of the variable resistor circuit 410. The base terminal of transistor 403 is electrically connected to one end of resistor 401 and the cathode terminal of the constant voltage diode 402. The other end of resistor 401 is electrically connected to the wiring Lb through which the reference voltage signal VBS propagates, and the anode terminal of the constant voltage diode 402 and the other end of the variable resistor circuit 410 are electrically connected to the wiring Lg at ground potential. In other words, one end of the sink circuit 40 is electrically connected to the wiring Lb through which the reference voltage signal VBS propagates, and the other end is electrically connected to the wiring Lg at ground potential.

[0085] In the sink circuit 40 configured as described above, if the voltage value of the reference voltage signal VBS propagating through the wiring Lb is less than the breakdown voltage vz of the constant voltage diode 402, the voltage value at the cathode terminal of the constant voltage diode 402 is maintained at the voltage value of the reference voltage signal VBS. Therefore, the voltage value at the emitter terminal and the base terminal of transistor 403 are approximately equal. Consequently, if the voltage value of the reference voltage signal VBS propagating through the wiring Lb is less than the breakdown voltage vz of the constant voltage diode 402, the connection between the emitter terminal and the collector terminal of transistor 403 is controlled to be non-conductive. At this time, the charge on the wiring Lb through which the reference voltage signal VBS propagates is not discharged to the wiring Lg through which the ground potential propagates. In other words, If the voltage value of the reference voltage signal VBS propagating through the wiring Lb is less than the breakdown voltage vz of the constant voltage diode 402, the sink circuit 40 does not discharge the charge from the wiring Lb.

[0086] On the other hand, if the voltage value of the reference voltage signal VBS propagating through the wiring Lb is greater than the breakdown voltage vz of the constant voltage diode 402, the voltage value at the cathode terminal of the constant voltage diode 402 is maintained at the breakdown voltage vz. Therefore, a potential difference is generated between the emitter terminal and the base terminal of the transistor 403, corresponding to the difference between the voltage value of the reference voltage signal VBS and the breakdown voltage vz of the constant voltage diode 402. If this potential difference is greater than the threshold voltage of the transistor 403, the connection between the emitter terminal and the collector terminal of the transistor 403 is controlled to conduct. As a result, the charge in the wiring Lb propagating the reference voltage signal VBS is discharged towards the wiring Lg, which is at ground potential, via the transistor 403 and the variable resistor circuit 410. In other words, at least a portion of the current propagating through the wiring Lb flows towards the wiring Lg via the transistor 403 and the variable resistor circuit 410. At this time, the amount of charge released from wiring Lb to wiring Lg, which is the amount of current flowing from wiring Lb to wiring Lg, is controlled by the resistance value between one end and the other end of the variable resistor circuit 410. In other words, the sinking capacity of the sink circuit 40 can be controlled by the resistance value between one end and the other end of the variable resistor circuit 410.

[0087] As shown in Figure 7, the variable resistor circuit 410, which switches the sink capacity of the sink circuit 40, receives sink control signals SS1 to SS4 as sink control signals SS. The resistance value of the variable resistor circuit 410 is then controlled by the sink control signals SS1 to SS4.

[0088] Specifically, the variable resistor circuit 410 includes resistors 411 to 415 and switches 422 to 425.

[0089] One end of resistor 411 is electrically connected to one end of the variable resistor circuit 410, and the other end of resistor 411 is electrically connected to the other end of the variable resistor circuit 410. Also, one end of switch 422 is electrically connected to one end of the variable resistor circuit 410, the other end of switch 422 is electrically connected to one end of resistor 412, and the other end of resistor 412 is electrically connected to the other end of the variable resistor circuit 410. In other words, switch 422 and resistor 412 are connected in series between one end and the other end of the variable resistor circuit 410. Also, one end of switch 423 is electrically connected to one end of the variable resistor circuit 410, the other end of switch 423 is electrically connected to one end of resistor 413, and the other end of resistor 413 is electrically connected to the other end of the variable resistor circuit 410. In other words, switch 423 and resistor 413 are connected in series between one end and the other end of the variable resistor circuit 410. Furthermore, one end of switch 424 is electrically connected to one end of the variable resistor circuit 410, the other end of switch 424 is electrically connected to one end of resistor 414, and the other end of resistor 414 is electrically connected to the other end of the variable resistor circuit 410. In other words, switch 424 and resistor 414 are connected in series between one end and the other end of the variable resistor circuit 410. Also, one end of switch 425 is electrically connected to one end of the variable resistor circuit 410, the other end of switch 425 is electrically connected to one end of resistor 415, and the other end of resistor 415 is electrically connected to the other end of the variable resistor circuit 410. In other words, switch 425 and resistor 415 are connected in series between one end and the other end of the variable resistor circuit 410. Finally, one end of the variable resistor circuit 410 is electrically connected to the collector terminal of transistor 403, and the other end of the variable resistor circuit 410 is electrically connected to wiring Lg.

[0090] Furthermore, a sink control signal SS1 is input to the control terminal of switch 422, a sink control signal SS2 is input to the control terminal of switch 423, a sink control signal SS3 is input to the control terminal of switch 424, and a sink control signal SS4 is input to the control terminal of switch 425. The conduction state of switches 422 to 425 is controlled by the sink control signals SS1 to SS4 input to their control terminals. As such switches 422 to 425 For example, a PMOS transistor can be used. As a result, switch 422 is controlled so that when a high-level sink control signal SS1 is input to the control terminal, one end and the other end are non-conducting, and when a low-level sink control signal SS1 is input to the control terminal, one end and the other end are conductive. Similarly, each of switches 423 to 425 is controlled so that when a high-level sink control signal SS2 to SS4 is input to the control terminal, one end and the other end are non-conducting, and when a low-level sink control signal SS2 to SS4 is input to the control terminal, one end and the other end are conductive.

[0091] In the variable resistor circuit 410 configured as described above, during the period when H-level sink control signals SS1 to SS4 are input, the resistance value between one end and the other becomes the resistance value of resistor 411. During the period when H-level sink control signals SS2 to SS4 and L-level sink control signal SS1 are input, the resistance value between one end and the other becomes the combined resistance value of resistors 411 and 412 connected in parallel. During the period when H-level sink control signals SS3 and SS4 and L-level sink control signals SS1 and SS2 are input, the resistance value between one end and the other becomes the combined resistance value of resistors 411 to 413 connected in parallel. During the period when H-level sink control signal SS4 and L-level sink control signals SS1 to SS3 are input, the resistance value between one end and the other becomes the combined resistance value of resistors 411 to 414 connected in parallel.

[0092] In other words, the sink circuit 40 switches the impedance value between the wiring Lb through which the reference voltage signal VBS propagates and the wiring Lg through which a signal lower in potential than the reference voltage signal VBS and at ground potential propagates. Specifically, the sink circuit 40 operates in three modes: one where the impedance value between wiring Lb and wiring Lg is the resistance value when transistor 403 is non-conducting; another where the impedance value between wiring Lb and wiring Lg is the resistance value of resistor 411 which is smaller than the resistance value of resistor 403 when it is non-conducting; another where the impedance value between wiring Lb and wiring Lg is the combined resistance value of resistors 411 to 412 connected in parallel, which is smaller than the resistance value of resistor 411; and a third where the impedance value between wiring Lb and wiring Lg is the combined resistance value of resistors 411 to 412 connected in parallel. The device has three operating modes: one where the resistance value is smaller than the combined resistance value of resistors 1 to 412 and is the combined resistance value of resistors 411 to 413 connected in parallel; another where the impedance value between wiring Lb and wiring Lg is smaller than the combined resistance value of resistors 411 to 413 connected in parallel and is the combined resistance value of resistors 411 to 414 connected in parallel; and a third where the impedance value between wiring Lb and wiring Lg is smaller than the combined resistance value of resistors 411 to 414 connected in parallel and is the combined resistance value of resistors 411 to 415 connected in parallel.

[0093] In other words, the resistance value between one end and the other end of the variable resistor circuit 410 is controlled by the sink control signals SS1 to SS4. Therefore, the sinking capability of the sink circuit 40 is controlled by the sink control signals SS1 to SS4.

[0094] Furthermore, in the sink circuit 40 including the variable resistor circuit 410 configured as described above, when transistor 403 is controlled to conduct during the period when H-level sink control signals SS1 to SS4 are input, the charge on the wiring Lb through which the reference voltage signal VBS propagates is released to the wiring Lg through which the ground potential propagates, with a sink capability corresponding to the resistance value of resistor 411. When transistor 403 is controlled to conduct during the period when H-level sink control signals SS2 to SS4 and L-level sink control signal SS1 are input, the charge on the wiring Lb through which the reference voltage signal VBS propagates is released to the wiring Lg through which the ground potential propagates, with a sink capability corresponding to the combined resistance value of resistors 411 and 412 connected in parallel. When transistor 403 is controlled to conduct during the period when H-level sink control signals SS3 and SS4 and L-level sink control signals SS1 and SS2 are input, the charge on the wiring Lb through which the reference voltage signal VBS propagates is released to the wiring Lg through which the ground potential propagates, with a sink capability corresponding to the combined resistance value of resistors 411 to 413 connected in parallel. When transistor 403 is controlled to conduct during the period when a high-level sink control signal SS4 and low-level sink control signals SS1 to SS3 are input, it releases the charge from the wiring Lb through which the reference voltage signal VBS propagates to the wiring Lg through which the ground potential propagates, with a sink capability corresponding to the combined resistance value of the parallel-connected resistors 411 to 414. When transistor 403 is controlled to conduct during the period when low-level sink control signals SS1 to SS4 are input, it releases the charge from the wiring Lb through which the reference voltage signal VBS propagates to the wiring Lg through which the ground potential propagates, with a sink capability corresponding to the combined resistance value of the parallel-connected resistors 411 to 415.

[0095] As a result, the sink circuit 40 can release the charge from the wiring Lb through which the reference voltage signal VBS propagates to the wiring Lg through which the ground potential propagates, with a sink capability defined by the sink control signals SS1 to SS4, which are sink control signals SS, depending on the voltage value of the reference voltage signal VBS propagating through the wiring Lb. In other words, the sink capability of the sink circuit 40 is controlled by the sink control signals SS1 to SS4, which are sink control signals SS.

[0096] As described above, the sink circuit 40 of this embodiment includes a transistor 403 and a variable resistor circuit 410. One end of the transistor 403, the emitter terminal, is electrically connected to the wiring Lb. The other end of the transistor 403, the collector terminal, is electrically connected to one end of the variable resistor circuit 410. The other end of the variable resistor circuit 410 is electrically connected to the wiring Lg.

[0097] Here, the variable resistor circuit 410 of the sink circuit 40 is configured to change the resistance value between one end and the other, which is the resistance value between the collector terminal of the transistor 403 and the wiring Lg through which the ground potential propagates, according to the sink control signal SS. For this reason, it may be configured as an integrated circuit such as a digital potentiometer, but it is preferable to be configured as discrete components, and it is even more preferable that the sink circuit 40 is composed of discrete components. This makes it possible to optimally select the component sizes of the transistor 403 and resistors 411 to 415 according to the amount of current discharged from the wiring Lb by the sink circuit 40, which is the sink capability of the sink circuit 40, thereby increasing the versatility of the sink circuit 40 and reducing the amount of heat generated in the transistor 403 and resistors 411 to 415.

[0098] Furthermore, the sink circuit 40 may have a resistive element connected between the anode terminal of the constant voltage diode 402 and the wiring Lg. This makes it possible to control the voltage value held at the cathode terminal of the constant voltage diode 402 and the amount of current flowing through the constant voltage diode 402, and to precisely control the voltage value of the wiring Lb when the transistor 403 is controlled to conduct.

[0099] Furthermore, the sink circuit 40 can achieve a similar effect if it is located between the wiring Lb through which the reference voltage signal VBS propagates and the wiring through which a signal with a lower potential than the voltage value of the reference voltage signal VBS propagates. However, as shown in this embodiment, it is preferable that the sink circuit 40 is located between the wiring Lb through which the reference voltage signal VBS propagates and the wiring Lg at ground potential. This allows the sink circuit 40 to efficiently discharge charge from the wiring Lb.

[0100] 4. Head Unit Configuration Next, the functional configuration of the head unit 3 will be described. Figure 8 is a diagram showing an example of the functional configuration of the head unit 3. As described above, the head unit 3 has a supply switching circuit 31, a recording head 32, and a detection circuit 33. Figure 8 also illustrates the wiring Lc through which the drive signal COM propagates, the wiring Lb through which the reference voltage signal VBS propagates, and the wiring Ls through which the detection potential signal VX propagates to the detection circuit 33 in the head unit 3.

[0101] The supply switching circuit 31 includes switches Wc[1] to Wc[M], switches Ws[1] to Ws[M], switch Wf, resistor Rf, and a connection state specification circuit 310. Switches Wc[1] to Wc[M] and switches Ws[1] to Ws[M] are provided in the supply switching circuit 31 corresponding to the discharge sections D[1] to D[M]. Specifically, in the supply switching circuit 31, switches Wc[m] and Ws[m] are provided corresponding to the discharge section D[m].

[0102] The connection state specification circuit 310 receives a clock signal CL, a print data signal SI, a latch signal LAT, a change signal CH, and a period specification signal Tsig. The connection state specification circuit 310 generates signals that specify the conduction state of switches Wc[1]~Wc[M], switches Ws[1]~Ws[M], and switch Wf, respectively, in accordance with the print data signal SI which propagates in synchronization with the clock signal CL, for a period defined by the input latch signal LAT, change signal CH, and period specification signal Tsig. Subsequently, the connection state designation circuit 310 outputs connection state designation signals Qc[1] to Qc[M] by level-shifting the signals that specify the conduction state of switches Wc[1] to Wc[M] into high-amplitude logic signals, outputs connection state designation signals Qs[1] to Qs[M] by level-shifting the signals that specify the conduction state of switches Ws[1] to Ws[M] into high-amplitude logic signals, and outputs connection state designation signals Qf by level-shifting the signal that specifies the conduction state of switch Wf into a high-amplitude logic signal.

[0103] The connection status designation signals Qc[1]~Qc[M] output by the connection status designation circuit 310 are input to the control terminals of switches Wc[1]~Wc[M], the connection status designation signals Qs[1]~Qs[M] output by the connection status designation circuit 310 are input to the control terminals of switches Ws[1]~Ws[M], and the connection status designation signal Qf output by the connection status designation circuit 310 is input to the control terminal of switch Wf. This controls the conduction state of switches Wc[1]~Wc[M], Ws[1]~Ws[M], and Wf, respectively.

[0104] Such a connection state specification circuit 310 includes, for example, a register that holds print data signals SI propagated in synchronization with a clock signal CL corresponding to the ejection units D[1] to D[M], a decoder that decodes the print data signals SI held in the register to generate signals that specify the conduction state of switches Wc[1] to Wc[M], Ws[1] to Ws[M], and Wf, and a level shift circuit that outputs connection state specification signals Qc[1] to Qc[M], Qs[1] to Qs[M], Qf, etc., obtained by level shifting the logic of the signals generated by the decoder into high-amplitude logic signals.

[0105] Switch Wc[m], one of the switches Wc[1] to Wc[M], has one end electrically connected to the wiring Lc and the other end electrically connected to the upper electrode Zu[m] of the piezoelectric element PZ[m] included in the discharge section D[m]. The connection state designation signal Qc[m], one of the connection state designation signals Qc[1] to Qc[M], is input to the control terminal of switch Wc[m]. Switch Wc[m] switches the conduction state between one end and the other according to the logic level of the connection state designation signal Qc[m] input to the control terminal. As a result, switch Wc[m] switches whether or not to supply the drive signal COM propagating through the wiring Lc as the supply drive signal VIN[m] to the upper electrode Zu[m] of the discharge section D[m], according to the connection state designation signal Qc[m].

[0106] Switch Ws[m], one of the switches Ws[1] to Ws[M], has one end electrically connected to the wiring Ls and the other end electrically connected to the upper electrode Zu[m] of the piezoelectric element PZ[m] included in the discharge section D[m]. The connection status specification signal Qs[m], one of the connection status specification signals Qs[1] to Qs[M], is input to the control terminal of switch Ws[m]. Switch Ws[m] is configured such that one end and the other end are connected according to the logic level of the connection status specification signal Qs[m] input to the control terminal. The conductivity state between them is switched. As a result, the switch Ws[m] switches whether or not to supply the signal generated at the upper electrode Zu[m] of the piezoelectric element PZ[m] to the wiring Ls in response to the residual vibration generated at the discharge section D[m], according to the connection state specification signal Qs[m].

[0107] Switch Wf has one end electrically connected to wiring Lc and the other end electrically connected to one end of resistor Rf. The other end of resistor Rf is electrically connected to wiring Ls. In other words, switch Wf has one end electrically connected to wiring Lc and the other end electrically connected to wiring Ls via resistor Rf. A connection state specification signal Qf is input to the control terminal of switch Wf. The conduction state between one end and the other end of switch Wf is switched according to the logic level of the connection state specification signal Qf input to the control terminal.

[0108] Each of the switches Wc[1]~Wc[M], Ws[1]~Ws[M], and Wf described above can be configured, for example, as a transmission gate.

[0109] Here, an example of various signals input to the connection state specification circuit 310 will be described. Figure 9 is a diagram illustrating an example of various signals input to the connection state specification circuit 310. As shown in Figure 9, the liquid dispensing device 1 of this embodiment defines one or more unit periods TP as the operating period, and controls the driving of the dispensing unit D[m] and the operation of the detection circuit 33 in each of the defined unit periods TP.

[0110] Specifically, the control unit 2 generates a latch signal LAT including a pulse PLL and outputs it to the connection state specification circuit 310. For example, the control unit 2 may generate a latch signal LAT including a pulse PLL by setting the logic level of the latch signal LAT to a high level for a short time at a timing based on at least one of the transport position of the medium P transported along the sub-scanning direction and the scanning position of the carriage 91 that reciprocates along the main scanning direction, and output it to the connection state specification circuit 310. Alternatively, for example, the control unit 2 may generate a latch signal LAT including a pulse PLL by setting the logic level of the latch signal LAT to a high level for a short time at predetermined time intervals, and output it to the connection state specification circuit 310. The period from the rising edge of the pulse PLL included in this latch signal LAT until the next rising edge of the pulse PLL corresponds to the unit period TP described above.

[0111] Furthermore, the control unit 2 generates a change signal CH that includes a pulse PLC and outputs it to the connection state specification circuit 310. For example, the control unit 2 generates a change signal CH that includes a pulse PLC by setting the logic level of the change signal CH to a high level for a short time after a predetermined time has elapsed from the rising edge of the pulse PLL, and outputs it to the connection state specification circuit 310. The pulse PLC included in this change signal CH divides the unit period TP into a control period TQ1 and a control period TQ2. Specifically, the change signal CH divides the unit period TP into a control period TQ1, which is the period from the rising edge of the pulse PLL to the rising edge of the pulse PLC, and a control period TQ2, which is the period from the rising edge of the pulse PLC to the rising edge of the pulse PLL. Note that the number of divisions of the unit period TP by the change signal CH is not limited to two.

[0112] Furthermore, the control unit 2 generates a period specification signal Tsig, which includes pulses PLT1 and PLT2, and outputs it to the connection state specification circuit 310. For example, the control unit 2 generates pulse PLT1 by setting the logic level of the period specification signal Tsig to H level at a predetermined time after the rising edge of the pulse PLL, and then setting the logic level of the period specification signal Tsig to L level, and outputs it to the connection state specification circuit 310. After generating pulse PLT1, the control unit 2 generates pulse PLT2 by setting the logic level of the period specification signal Tsig to H level at a predetermined time after the period specification signal Tsig has elapsed, and then setting the logic level of the period specification signal Tsig to L level, and outputs it to the connection state specification circuit 310. The included pulses PLT1 and PLT2 divide the unit period TP into control periods TT1 to TT5. Specifically, the period designation signal Tsig divides the unit period TP into control period TT1, which is the period from the rising edge of the pulse PLL to the rising edge of pulse PLT1; control period TT2, which is the period from the rising edge of pulse PLT1 to the falling edge of pulse PLT1; control period TT3, which is the period from the falling edge of pulse PLT1 to the rising edge of pulse PLT2; control period TT4, which is the period from the rising edge of pulse PLT2 to the falling edge of pulse PLT2; and control period TT5, which is the period from the falling edge of pulse PLT2 to the rising edge of pulse PLL. Note that the number of divisions of the unit period TP by the period designation signal Tsig is not limited to five.

[0113] Furthermore, the control unit 2 generates a print data signal SI that serially includes the individual designation signals Sd[1] to Sd[M] and outputs it to the connection status designation circuit 310. Each of the individual designation signals Sd[1] to Sd[M] is a signal containing 2 bits of information and defines the driving mode of each of the ejection units D[1] to D[M]. Here, in the following explanation, the 2 bits of information contained in the individual designation signal Sd[m] will be referred to as bits S1 and S2, and the individual designation signal Sd[m] = [S1, S2] will be used. Also, in the following explanation, if bits S1 and S2 contained in the individual designation signal Sd[m] can be either "1" or "0", then "*" will be used to represent it.

[0114] Specifically, the control unit 2 generates a print data signal SI that includes individual designation signals Sd[1] to Sd[M] that define the driving mode of the ejection units D[1] to D[M] and the operation of the detection circuit 33 during the unit period TP to be controlled, prior to the unit period TP to be controlled, and outputs it to the connection state designation circuit 310. The print data signal SI is held in a register (not shown) in the connection state designation circuit 310, with the individual designation signals Sd[1] to Sd[M] corresponding to each of the ejection units D[1] to D[M]. Then, when it becomes the unit period TP to be controlled, the connection state designation circuit 310 simultaneously latches the 2 bits of information contained in each of the individual designation signals Sd[1] to Sd[M] that it holds, and decodes the latched 2 bits of information to generate connection state designation signals Qc[1] to Qc[M], Qs[m] to Qs[M], Qf, Q1, and Q2 at a logic level corresponding to the decoded content for each of the control periods TQ1 and TQ2, or each of the control periods TT1 to TT5, within the unit period TP to be controlled, and outputs them to the respective control terminals of the switches Wc[1] to Wc[M], Ws[1] to Ws[M], Wf, W1, and W2.

[0115] This controls the conduction state of switches Wc[1]~Wc[M], Ws[1]~Ws[M], Wf, W1, and W2 during each of the control periods TQ1 and TQ2, or each of the control periods TT1 to TT5. As a result, the driving mode of the discharge units D[1]~D[M] and the operation of the detection circuit 33 are controlled during each of the control periods TQ1 and TQ2, or each of the control periods TT1 to TT5.

[0116] Returning to Figure 8, the detection circuit 33 receives the detection potential signal VX propagating through the wiring Ls and the connection status specification signals Q1 and Q2 output by the connection status specification circuit 310. The detection circuit 33 also includes a waveform shaping circuit 330 and an AD conversion circuit 331. The waveform shaping circuit 330 acquires the detection potential signal VX according to the connection status specification signals Q1 and Q2. The waveform shaping circuit 330 then removes noise from the acquired detection potential signal VX and amplifies it to shape the signal waveform of the detection potential signal VX, outputting it as the detection signal aSK. The AD conversion circuit 331 converts the analog signal of the detection signal aSK output by the waveform shaping circuit 330 into a digital signal and outputs it as the detection signal SK. This detection signal SK is output from the detection circuit 33 and the head unit 3. In other words, the detection circuit 33 converts the signal corresponding to the residual vibration generated in the ejection section D into a digital signal and outputs it as the detection signal SK.

[0117] Here, an example of the configuration of the waveform shaping circuit 330 included in the detection circuit 33 will be described. Figure 10 is a diagram showing an example of the configuration of the waveform shaping circuit 330. As shown in Figure 10, the waveform shaping circuit 330 includes a capacitor C1, operational amplifiers OP1 and OP2, switches W1 and W2, and resistors R1 to R3.

[0118] A detection potential signal VX output by the supply switching circuit 31 is input to one end of capacitor C1. The other end of capacitor C1 is electrically connected to one end of resistor R1 and one end of switch W1. Analog ground AG, fixed at a constant potential, is supplied to the other end of resistor R1 and the other end of switch W1. In other words, resistor R1 and switch W1 are connected in parallel. A connection state specification signal Q1 is input to the control terminal of switch W1. When a high-level connection state specification signal Q1 is input to the control terminal of switch W1, the connection between one end and the other becomes conductive, and when a low-level connection state specification signal Q1 is input to the control terminal, the connection between one end and the other becomes non-conductive. In other words, switch W1 switches the conduction state between one end of resistor R1 and analog ground AG. The capacitor C1, resistor R1, and switch W1 configured as described above function as a high-pass filter, extracting and outputting a predetermined high-frequency component signal from the detected potential signal VX input during the period when switch W1 is controlled to be non-conductive. Here, switch W1 may be configured as, for example, a transmission gate. Also, the analog ground AG may be, for example, the center potential between the high-potential power supply potential and the low-potential power supply potential supplied to the head unit 3.

[0119] The positive input terminal of operational amplifier OP1 is electrically connected to the connection point where the other end of capacitor C1, one end of resistor R1, and one end of switch W1 are electrically connected. In other words, the signal output by the high-pass filter composed of capacitor C1, resistor R1, and switch W1 is input to the positive input terminal of operational amplifier OP1. The negative input terminal of operational amplifier OP1 is electrically connected to the connection point where one end of resistor R2 and one end of resistor R3 are electrically connected. The output terminal of operational amplifier OP1 is electrically connected to the other end of resistor R2. In addition, analog ground AG is supplied to the other end of resistor R3. In other words, operational amplifier OP1 and resistors R2 and R3 function as a non-inverting amplifier circuit that amplifies the signal input to the positive input terminal of operational amplifier OP1 according to the resistance values ​​of resistors R2 and R3 and outputs it from the output terminal of operational amplifier OP1. Here, the non-inverting amplifier circuit, which includes the operational amplifier OP1 and resistors R2 and R3, may be configured to output an amplified signal after superimposing a predetermined offset voltage onto the signal output by a high-pass filter consisting of capacitor C1, resistor R1, and switch W1.

[0120] The positive input terminal of op-amp OP2 is electrically connected to the output terminal of op-amp OP1. In other words, the signal output by the non-inverting amplifier circuit, which consists of op-amp OP1 and resistors R2 and R3, is input to the positive input terminal of op-amp OP2. The negative input terminal of op-amp OP2 is electrically connected to the output terminal of op-amp OP2. In other words, op-amp OP2 constitutes a voltage follower circuit. As a result, op-amp OP2 converts the impedance of the signal output by the non-inverting amplifier circuit, which consists of op-amp OP1 and resistors R2 and R3, and outputs it.

[0121] One end of switch W2 is electrically connected to the output terminal of operational amplifier OP2. The signal from the other end of switch W2 is output from the waveform shaping circuit 330 as a detection signal aSK. A connection status specification signal Q2 is input to the control end of switch W2. When a high-level connection status specification signal Q2 is input to the control end of switch W2, the two ends become conductive. When a low-level connection status specification signal Q2 is input to the control end of switch W2, the two ends become non-conductive. Switch W2 switches whether or not to output the signal output by operational amplifier OP2 as a detection signal aSK from the waveform shaping circuit 330, depending on the logic level of the connection status specification signal Q2 input to the control end of switch W2.

[0122] As described above, the waveform shaping circuit 330 removes noise components from the detected potential signal VX using a high-pass filter consisting of a capacitor C1, a resistor R1, and a switch W1. The signal from which the noise components have been removed is then amplified by a non-inverting amplifier circuit consisting of an operational amplifier OP1 and resistors R2 and R3. The waveform shaping circuit 330 then performs impedance conversion using a voltage follower circuit consisting of an operational amplifier OP2, and outputs the signal as the detected signal aSK. At this time, switches W1 and W2 switch whether or not the waveform shaping circuit 330 acquires the detected potential signal VX and outputs it as the detected signal aSK.

[0123] The detection signal aSK output by the waveform shaping circuit 330 is then input to the AD conversion circuit 331. The AD conversion circuit 331 converts the detection signal aSK into a digital signal. The signal converted to digital by the AD conversion circuit 331 is then output as the detection signal SK from the detection circuit 33 and the head unit 3.

[0124] In the head unit 3 of this embodiment, configured as described above, the supply switching circuit 31 controls the conduction state of the switch Wc[m] in accordance with the print data signal SI propagated based on the clock signal CL during each of the control periods TQ1, TQ2, or control periods TT1 to TT5 defined by the latch signal LAT, the change signal CH, and the period specification signal Tsig. This switches whether or not to supply the drive signal COM propagating through the wiring Lc as the supply drive signal VIN[m] to the piezoelectric element PZ[m] of the ejection unit D[m]. This controls the driving mode of the ejection unit D[m].

[0125] Furthermore, in this embodiment, the head unit 3 has a supply switching circuit 31 that controls the conduction state of switch Ws[m] in accordance with the print data signal SI propagated based on the clock signal CL during each of the control periods TQ1, TQ2 or control periods TT1 to TT5 defined by the latch signal LAT, the change signal CH, and the period specification signal Tsig. This switches whether or not to acquire a signal corresponding to the residual vibration generated in the ejection section D[m] and output it to the detection circuit 33 as a detected potential signal VX. At this time, the detection circuit 33 amplifies and shapes the signal waveform of the input detected potential signal VX according to the conduction state of switches W1 and W2 and outputs it as a detected signal SK. In other words, the detection circuit 33 acquires the electromotive force generated in the piezoelectric element PZ as a detected potential signal VX when the piezoelectric element PZ is displaced in accordance with the residual vibration generated in the ejection section D, amplifies and shapes the signal waveform of the acquired detected potential signal VX and outputs it as a detected signal SK.

[0126] The detection signal SK output by the detection circuit 33 is then input to the determination unit 7. Based on the input detection signal SK, the determination unit 7 determines the state of the target discharge section D[m].

[0127] As described above, the liquid dispensing device 1 of this embodiment includes a detection circuit 33 that detects signals corresponding to the state of multiple dispensing sections D, and a determination unit 7 that determines the state of multiple dispensing sections D based on the detection signal SK output by the detection circuit 33. The determination unit 7 determines the state of dispensing section D[1] according to the residual vibration generated in dispensing section D[1], and determines the state of dispensing section D[m] according to the residual vibration generated in dispensing section D[m].

[0128] 5. Operation of the liquid dispensing device The operation of the liquid dispensing device 1 configured as described above will now be explained. As previously stated, the liquid dispensing device 1 of this embodiment includes a dispensing process that dispenses ink onto a medium P to form an image corresponding to the image data signal IMG, a determination process that determines the state of the dispensing unit D that dispenses ink onto the medium P, and a maintenance process that attempts to restore the dispensing state of the dispensing unit D where a dispensing abnormality has occurred in the determination process. The maintenance process is performed. The following describes the operation of the discharge process, determination process, and maintenance process performed by the liquid discharge device 1.

[0129] 5.1 Discharge process Figure 11 is a diagram illustrating an example of various signals output by the control unit 2 during the period in which the dispensing process is being performed.

[0130] The control unit 2 generates a drive waveform specification signal dCOM that defines the signal waveform of the drive signal COM output by the drive circuit unit 5 during the period in which the ejection process is being performed, and outputs it to the drive circuit unit 5. The drive circuit 50 of the drive circuit unit 5 generates a drive signal COM with a continuous signal waveform, consisting of a drive waveform PP1 placed in the control period TQ1 and a drive waveform PP2 placed in the control period TQ2, as shown in Figure 11, in response to the input drive waveform specification signal dCOM, and supplies it to the head unit 3.

[0131] The drive waveform PP1 is a signal waveform in which the voltage value starts at a reference potential V0, changes to a potential VL1 which is lower than the reference potential V0, then becomes a potential VH1 which is higher than the reference potential V0, and then ends at the reference potential V0. When this drive waveform PP1 is supplied to the piezoelectric element PZ[m], the piezoelectric element PZ[m] is driven so that a predetermined amount of ink is ejected from the nozzle N[m]. In other words, the drive waveform PP1 is a signal waveform that causes ink to be ejected from the nozzle N[m].

[0132] The drive waveform PP2 is a signal waveform in which the voltage value starts at a reference potential V0, changes to a potential VH2 which is higher than the reference potential V0 and lower than the potential VH1, and then ends at the reference potential V0. When this drive waveform PP2 is supplied to the piezoelectric element PZ[m], the ink near the opening vibrates to the extent that ink is not ejected from the nozzle N[m]. This reduces the risk of an increase in the viscosity of the ink stored in the ejection section D[m] including the nozzle N[m]. Hereinafter, in the following explanation, the operation of supplying the drive waveform PP2 to the piezoelectric element PZ[m] and vibrating the ink near the opening of the nozzle N[m] is referred to as micro-vibration. In other words, the drive waveform PP2 is a signal waveform for performing micro-vibration.

[0133] Furthermore, the liquid dispensing device 1 of this embodiment controls whether to dispense ink from the dispensing device D[m] or perform micro-vibrations, thereby forming dots on the medium P, by selecting whether to supply a drive waveform PP1 or a drive waveform PP2 to the dispensing device D[m] for each unit period TP during the dispensing process.

[0134] Specifically, during the period when the liquid ejection device 1 of this embodiment is performing the ejection process, the connection state specification circuit 310 defines the conduction state of switch Wc[m] in each of the control periods TQ1 and TQ2 according to the individual specification signal Sd[m] included in the input print data signal SI. This controls whether, for each unit period TP during the period when the liquid ejection device 1 is performing the ejection process, the drive waveform PP1 located in the control period TQ1 is supplied to the ejection unit D[m] as a supply drive signal VIN[m], or whether the drive waveform PP2 located in the control period TQ2 is supplied to the ejection unit D[m] as a supply drive signal VIN[m]. In other words, for each unit period TP, it controls whether to eject ink from the ejection unit D[m] or to perform micro-vibrations of the ejection unit D[m].

[0135] Here, during the period in which the liquid dispensing device 1 performs the dispensing process, the relationship between the individual designation signals Sd[1]~Sd[M] included in the print data signal SI input to the connection status designation circuit 310 and the connection status designation signals Qc[1]~Qc[M], Qs[1]~Qs[M] output by the connection status designation circuit 310 is as follows: the individual designation signal Sd executed by the connection status designation circuit 310 [1]~An example of the decoded contents of Sd[M] is described below.

[0136] Figure 12 shows an example of the relationship between the individual designation signal Sd[m] and the connection status designation signals Qc[m] and Qs[m] during the period in which the discharge process is being performed.

[0137] As shown in Figure 12, when the individual designation signal Sd[m]=[1,1] is input to the connection state designation circuit 310, the connection state designation circuit 310 generates a connection state designation signal Qc[m] that is at an H level during control period TQ1 and at an L level during control period TQ2, and outputs it to the control terminal of the switch Wc[m]. As a result, the switch Wc[m] is controlled to conduct during control period TQ1 and to not conduct during control period TQ2. Therefore, the piezoelectric element PZ[m] is supplied with a supply drive signal VIN[m] including the drive waveform PP1 during control period TQ1, and is not supplied with a supply drive signal VIN[m] including the drive waveform PP2 during control period TQ2. Here, during the control period TQ2 in which the supply drive signal VIN[m] including the drive waveform PP2 is not supplied to the piezoelectric element PZ[m], the upper electrode Zu[m] maintains a reference potential V0, which is the voltage value of the signal that was supplied to the upper electrode Zu[m] immediately before, due to the capacitive component of the piezoelectric element PZ[m]. That is, during the control period TQ2 in which the supply drive signal VIN[m] including the drive waveform PP2 is not supplied to the piezoelectric element PZ[m], a constant signal with a reference potential V0 is supplied to the upper electrode Zu[m]. As a result, ink is ejected from the nozzle N[m] during the control period TQ1, and no ink is ejected during the control period TQ2. Then, the ink ejected during the control period TQ1 lands on the medium P, forming a dot on the medium P during the unit period TP.

[0138] Furthermore, when the individual designation signal Sd[m]=[1,0] is input to the connection state designation circuit 310, the connection state designation circuit 310 generates a connection state designation signal Qc[m] that is at an L level during control period TQ1 and at an H level during control period TQ2, and outputs it to the control terminal of the switch Wc[m]. As a result, the switch Wc[m] is controlled to be non-conductive during control period TQ1 and to conduct during control period TQ2. Therefore, the piezoelectric element PZ[m] is not supplied with a supply drive signal VIN[m] including the drive waveform PP1 during control period TQ1, but is supplied with a supply drive signal VIN[m] including the drive waveform PP2 during control period TQ2. Here, during the control period TQ1 in which the supply drive signal VIN[m] including the drive waveform PP1 is not supplied to the piezoelectric element PZ[m], the upper electrode Zu[m] maintains a reference potential V0, which is the voltage value of the signal that was supplied to the upper electrode Zu[m] immediately before, due to the capacitive component of the piezoelectric element PZ[m]. That is, during the control period TQ1 in which the supply drive signal VIN[m] including the drive waveform PP1 is not supplied to the piezoelectric element PZ[m], a constant signal with a reference potential V0 is supplied to the upper electrode Zu[m]. As a result, no ink is ejected from the nozzle N[m] during the control periods TQ1 and TQ2, and micro-vibrations are performed during the control period TQ2. Therefore, no dots are formed on the medium P during the unit period TP.

[0139] As described above, when the liquid dispensing device 1 performs dispensing, the connection state specification circuit 310 outputs logic-level connection state specification signals Qs[1] to Qs[M] based on individual specification signals Sd[1] to Sd[M] during each of the control periods TQ1 and TQ2 within the unit period TP. This controls the conduction state of switches Wc[1] to Wc[m] during each of the control periods TQ1 and TQ2 within the unit period TP, and controls whether or not ink is dispensed from each of the dispensing units D[1] to D[M] during each of the control periods TQ1 and TQ2 within the unit period TP. As a result, the liquid dispensing device 1 can form an image on the medium P corresponding to the image data signal IMG during the period in which the dispensing process is being performed.

[0140] Here, as shown in Figure 11, during the period when the liquid dispensing device 1 is performing the dispensing process, the connection status specification circuit 310 continues to output a connection status specification signal Qs [m] at an L level, regardless of the input individual specification signal Sd [m]. Therefore, during the period when the dispensing process is being performed... During this time, the switch Ws[m] is controlled to be non-conductive. As a result, during the period when the liquid dispensing device 1 is performing the dispensing process, the upper electrode Zu[m] and the wiring Ls are not electrically connected, and therefore, the signal corresponding to the residual vibration generated in the dispensing section D[m] is not supplied to the detection circuit 33. Consequently, the detection circuit 33 does not acquire the detection potential signal VX during the period when the liquid dispensing device 1 is performing the dispensing process. Therefore, although not shown in the diagram, during the period when the liquid dispensing device 1 is performing the dispensing process, the connection state specification circuit 310 continues to output connection state specification signals Qf, Q1, and Q2 at L level.

[0141] 5.2 Judgment Processing Next, we will explain the determination process for determining the state of the ejection unit D that ejects ink onto the medium P. It is known that residual vibration occurs in an ejection unit that ejects liquid such as ink by being driven by a driving element such as a piezoelectric element after the driving element has been driven. This residual vibration that occurs in the ejection unit is a so-called damped vibration in which the amplitude decreases over time, and the waveform information such as the amplitude, the rate of amplitude damping, the period, and the frequency of the damped vibration changes depending on the state of the ejection unit. For example, if the viscosity of the liquid stored in the ejection unit changes, the amplitude and the rate of amplitude damping of the residual vibration that occurs in the ejection unit will change, and if air bubbles are mixed inside the ejection unit, for example, the frequency of the residual vibration that occurs in the ejection unit will increase.

[0142] In the liquid dispensing device 1 of this embodiment, in the determination process for determining the state of the dispensing unit D that dispenses ink onto the medium P, the supply switching circuit 31 of the head unit 3 acquires a signal corresponding to the residual vibration generated in the dispensing unit D[m] to be inspected and outputs it to the detection circuit 33 as a detected potential signal VX. The detection circuit 33 generates a detected signal SK by shaping the signal waveform of the input detected potential signal VX. Then, the determination unit 7 calculates waveform information such as the amplitude, period, and frequency of the residual vibration generated in the dispensing unit D[m] to be inspected, which is the waveform information of the detected potential signal VX based on the input detected signal SK, and determines the state of the dispensing unit D[m] to be inspected based on the calculated waveform information. After that, the determination unit 7 generates a state determination signal JH indicating the determination result and outputs it to the control unit 2. As a result, the control unit 2 acquires the state of the dispensing unit D[m] to be inspected, corrects various signals to be output according to the acquired state of the dispensing unit D[m] to be inspected, or informs the user of the state of the dispensing unit D[m] to be inspected.

[0143] Figure 13 is a diagram illustrating an example of various signals input to the supply switching circuit 31 of the head unit 3 during the period in which the determination process is being executed.

[0144] The control unit 2 generates a drive waveform specification signal dCOM, which defines the signal waveform of the drive signal COM output by the drive circuit unit 5 during the period in which the determination process is being executed, and outputs it to the drive circuit unit 5. The drive circuit 50 of the drive circuit unit 5 generates a drive signal COM, including the drive waveform PS, for each unit period TP as shown in Figure 13, in response to the input drive waveform specification signal dCOM, and supplies it to the head unit 3.

[0145] The drive waveform PS is a signal waveform in which the voltage value starts at a reference potential V0 during the control period TT1, changes to a potential VS1 which is lower than the reference potential V0, then becomes a potential VS2 which is higher than the reference potential V0, maintains the potential VS2 during the control periods TT2, TT3, and TT4, and ends at the reference potential V0 during the control period TT5. When this drive waveform PS is supplied to the piezoelectric element PZ[m], the piezoelectric element PZ[m] is driven so that ink is not ejected from the nozzle N[m], and after the piezoelectric element PZ[m] is driven, a predetermined residual vibration occurs in the ejection section D[m] at the timing when the voltage value of the drive signal COM becomes potential VS2. In other words, the drive waveform PS is a signal waveform that drives the piezoelectric element PZ[m] so that ink is not ejected from the nozzle N[m], and also generates a predetermined residual vibration in the ejection section D[m]. [m] operates in a way that does not eject ink, but generates residual vibration.

[0146] The liquid dispensing device 1 controls the conduction state of switches Wc[1]~Wc[M], Ws[1]~Ws[M], Wf, W1, and W2 during each control period TT1~TT5 for each unit period TP in the period during which the judgment process is executed. This controls the supply drive signal VIN[m] including the drive waveform PS to the dispensing section D[m] to be inspected, and acquires a signal corresponding to the residual vibration generated in the dispensing section D[m] as a result of the supply drive signal VIN[m] including the drive waveform PS being supplied, and outputs this signal to the detection circuit 33 as a detected potential signal VX. The detection circuit 33 then generates a detected signal SK by shaping the signal waveform of the input detected potential signal VX, and the judgment unit 7 determines the state of the dispensing section D[m] to be inspected based on the detected signal SK.

[0147] Here, we will explain an example of the relationship between the individual designation signals Sd[1]~Sd[M] included in the print data signal SI input to the connection status designation circuit 310 during the period when the liquid discharge device 1 performs a determination process, and the connection status designation signals Qc[1]~Qc[M], Qs[1]~Qs[M], Qf, Q1, Q2 output by the connection status designation circuit 310, specifically the decoding content of the individual designation signals Sd[1]~Sd[M] performed by the connection status designation circuit 310 during the period when the determination process is being executed.

[0148] Figure 14 shows an example of the relationship between the individual designation signal Sd[m] and the connection status designation signals Qc[m] and Qs[m] during the period in which the judgment process is being executed. Here, in the liquid dispensing device 1 of this embodiment, the control unit 2 outputs the individual designation signal Sd[m]=[0,0] to the connection status designation circuit 310 when the dispensing unit D[m] is not the object of inspection during the period in which the judgment process is being executed, and outputs the individual designation signal Sd[m]=[0,1] to the connection status designation circuit 310 when the dispensing unit D[m] is the object of inspection.

[0149] As shown in Figure 14, when the individual designation signal Sd[m]=[0,0] is input to the connection state designation circuit 310, the connection state designation circuit 310 generates a connection state designation signal Qc[m] that is at an L level during the control period TT1 to TT5 and outputs it to the control terminal of switch Wc[m], and generates a connection state designation signal Qs[m] that is at an L level during the control period TT1 to TT5 and outputs it to the control terminal of switch Ws[m]. As a result, during the control period TT1 to TT5, switch Wc[m] is controlled to be non-conductive and switch Ws[m] is controlled to be non-conductive. At this time, the piezoelectric element PZ[m] of the discharge section D[m] that is not the subject of inspection is not supplied with the supply drive signal VIN[m] corresponding to the drive signal COM. Therefore, no residual vibration occurs in the discharge section D[m] that is not being inspected. Even if the potential of the upper electrode Zu[m] of the piezoelectric element PZ[m] included in the discharge section D[m] that is not being inspected changes, the signal associated with this change in potential is not supplied to the wiring Ls. Consequently, the state of the discharge section D[m] that is not being inspected is not determined.

[0150] Furthermore, when the individual specification signal Sd[m]=[0,1] is input to the connection state specification circuit 310, the connection state specification circuit 310 generates a connection state specification signal Qc[m] which is at a high level during control periods TT1, TT2, and TT5 and at a low level during control periods TT3 and TT4, and outputs it to the control terminal of switch Wc[m]. It also generates a connection state specification signal Qs[m] which is at a high level during control periods TT2 to TT4 and at a low level during control periods TT1 and TT5, and outputs it to the control terminal of switch Ws[m]. As a result, switch Wc[m] is controlled to conduct during control periods TT1, TT2, and TT5 and to be non-conductive during control periods TT3 and TT4, and switch Ws[m] is controlled to conduct during control periods TT2 to TT4 and to be non-conductive during control periods TT1 and TT5.

[0151] Figure 15 shows the individual designation signal Sd[m] and connection status during the period in which the determination process is being executed. This figure shows an example of the relationship with the designated signals Qf, Q1, and Q2. Here, during the period in which the determination process is executed, the connection state designation circuit 310 outputs connection state designation signals Qf, Q1, and Q2 of the same logic level in each of the control periods TT1 to TT5, depending on whether the individual designation signal Sd[m]=[0,0] or Sd[m]=[0,1] is input. Therefore, in Figure 15, the individual designation signals Sd[m]=[0,0] and Sd[m]=[0,1] are shown together as individual designation signal Sd[m]=[0,*].

[0152] As shown in Figure 15, when the individual specification signal Sd[m]=[0,*] is input to the connection state specification circuit 310, the connection state specification circuit 310 generates a connection state specification signal Qf that is at an H level during control periods TT2 to TT4 and at an L level during control periods TT1 and TT5, and outputs it to the control terminal of switch Wf. It also generates a connection state specification signal Q1 that is at an H level during control periods TT1, TT2, TT4, and TT5 and at an L level during control period TT3, and outputs it to the control terminal of switch W1. Finally, it generates a connection state specification signal Q2 that is at an H level during control period TT3 and at an L level during control periods TT1, TT2, TT4, and TT5, and outputs it to the control terminal of switch W2. As a result, switch Wf is controlled to conduct during control periods TT2 to TT4 and to not conduct during control periods TT1 and TT5; switch W1 is controlled to conduct during control periods TT1, TT2, TT4, and TT5 and to not conduct during control period TT3; and switch W2 is controlled to conduct during control period TT3 and to not conduct during control periods TT1, TT2, TT4, and TT5.

[0153] Here, we will describe an example of the operation of the liquid dispensing device 1 when an individual designation signal Sd[m]=[0,1] corresponding to the dispensing section D[m] to be inspected is input to the connection state designation circuit 310, in which the detection circuit 33 acquires a detection potential signal VX based on a signal corresponding to the residual vibration generated in the dispensing section D[m] to be inspected.

[0154] Figure 16 is a diagram illustrating an example of the operation for acquiring a detection potential signal VX based on a signal corresponding to residual vibration generated in the discharge section D [m] of the object to be inspected. As shown in Figure 16, for each unit period TP during the period in which the determination process is being executed, the connection state designation circuit 310 is supplied with a drive signal COM including a drive waveform PS, the voltage value of which starts at a reference potential V0 in the control period TT1, changes to a potential VS1 which is lower than the reference potential V0, becomes a potential VS2 which is higher than the reference potential V0, maintains the potential VS2 in the control periods TT2 to TT4, and ends at the reference potential V0 in the control period TT5.

[0155] During the period in which the judgment process is being executed, the control unit 2 outputs an individual designation signal Sd[m]=[0,1] corresponding to the discharge section D[m] to be inspected to the connection state designation circuit 310. At this time, discharge sections D[1]~D[m-1] and D[m+1]~D[M] are excluded from inspection. That is, the control unit 2 outputs individual designation signals Sd[1]~Sd[m-1] and Sd[m+1]~Sd[M]=[0,0] to the connection state designation circuit 310.

[0156] When the connection state specification circuit 310 receives a print data signal SI including the individual specification signal Sd[m]=[0,1] and the individual specification signals Sd[1]~Sd[m-1],Sd[m+1]~Sd[M]=[0,0], during the control periods TT1 and TT2, switch Wc[m] is controlled to conduct, and switches Wc[1]~Wc[m-1],Wc[m+1]~Wc[M] are controlled to not conduct. Therefore, during the control periods TT1 and TT2, the upper electrode Zu[m] receives a supply drive signal VIN[m] whose voltage value starts at the reference potential V0, changes to a potential VS1 lower than the reference potential V0, then becomes a potential VS2 higher than the reference potential V0, and maintains the potential VS2, while the upper electrodes Zu[1]~Zu[m-1],Zu[m+1]~Zu[M] maintain the reference potential V0. At this time, the voltage value of the supply drive signal VIN[m] supplied to the discharge unit D[m] under inspection becomes constant at potential VS2. Residual vibration occurs in the discharge section D[m] being inspected. The piezoelectric element Zm[m] deforms in response to the residual vibration in the discharge section D[m] being inspected, and an electromotive force corresponding to the deformation of the piezoelectric element Zm[m] is generated at the upper electrode Zu[m]. In other words, a signal corresponding to the residual vibration in the discharge section D[m] being inspected is generated at the upper electrode Zu[m] of the piezoelectric element PZ[m] included in the discharge section D[m] being inspected.

[0157] During the control period TT2, switch Ws[m] is controlled to conduct, switches Ws[1]~Ws[m-1] and Ws[m+1]~Ws[M] are controlled to be non-conductive, and switch Wf is controlled to conduct. As a result, a signal corresponding to the residual vibration generated in the discharge section D[m] of the object being inspected propagates through the wiring Ls as a detected potential signal VX. At this time, switch W1 is controlled to conduct and switch W2 is controlled to be non-conductive. Therefore, during the control period TT2, the waveform shaping circuit 330 of the detection circuit 33 does not acquire the detected potential signal VX propagating through the wiring Ls, and therefore does not output a detected signal aSK corresponding to the detected potential signal VX.

[0158] Then, during the control period TT3, switch W1 is controlled to be non-conductive and switch W2 is controlled to be conductive, so the waveform shaping circuit 330 of the detection circuit 33 acquires a detection potential signal VX that corresponds to the residual vibration generated in the discharge section D[m] of the object to be inspected and propagates through the wiring Ls, and shapes the signal waveform of the acquired detection potential signal VX and outputs it as a detection signal aSK. This detection signal aSK output by the waveform shaping circuit 330 is converted into a digital signal by the AD conversion circuit 331 and then input to the judgment unit 7 as a detection signal SK.

[0159] The determination unit 7 calculates waveform information such as amplitude, period, and frequency of the detected potential signal VX, which is the waveform information of the residual vibration generated in the discharge section D[m] under inspection, based on the input detection signal SK. Then, the determination unit 7 determines the state of the discharge section D[m] under inspection based on the calculated waveform information and outputs a state determination signal JH indicating the determination result to the control unit 2.

[0160] During the subsequent control period TT4, switch W1 is controlled to conduct and switch W2 is controlled to deconduct, causing the waveform shaping circuit 330 to stop acquiring the detection potential signal VX propagating through the wiring Ls and to stop outputting the detection signal aSK. Then, during the control period TT5, switch Wc[m] is controlled to conduct and switch Ws[m] is controlled to deconduct, stopping the supply of the signal generated at the upper electrode Zu[m] to the wiring Ls, and simultaneously supplying a reference potential V0 drive signal VIN[m] to the upper electrode Zu[m] of the piezoelectric element PZ[m] of the discharge unit D[m] under inspection. As a result, the potential of the upper electrode Zu[m] of the piezoelectric element PZ[m] of the discharge unit D[m] under inspection is controlled to the reference potential V0.

[0161] 5.3 Maintenance Procedures Next, an example of maintenance processing to attempt to restore the discharge state of the discharge unit D, where a discharge abnormality occurred during the judgment process, will be described. The maintenance processing in this embodiment includes pump suction processing, flushing processing, and wiping processing. However, the maintenance processing is not limited to these and includes various processing to restore the discharge state of the discharge unit D.

[0162] Figure 17 shows an example of a pump suction process. As shown in Figure 17, the pump suction process is performed using a cap 351, a tube 352, a pump 353, and a waste liquid tank 354.

[0163] The cap 351 is positioned to cover the multiple head units 3 mounted on the carriage 91 from the discharge surface 115 side. One end of the tube 352 is attached to the cap 351. The other end of tube 352 is connected to waste liquid tank 354 via pump 353.

[0164] Then, when the pump 353 operates, air inside the cap 351 is drawn in. This causes the ink stored in the multiple ejection nozzles D of the head unit 3 to be introduced into the waste liquid tank 354. At this time, ink that has solidified near the nozzles N of the ejection nozzles D and air bubbles that have entered inside the ejection nozzles D are removed.

[0165] Furthermore, as shown in Figure 17, the cap 351 may have an ink absorber 359 inside. The ink absorber 359 absorbs the ink sucked from the nozzle N during the pump suction process and temporarily stores it. This reduces the risk of the sucked ink splashing back and adhering to the discharge surface 115 during the period in which the pump suction process is being performed.

[0166] Figure 18 shows an example of a wiping process. As shown in Figure 18, the wiping process is performed by a wiper 360 including a wiping member 361. As shown in Figure 18(a), the wiper 360 is provided so as to be movable in the vertical direction of Figure 18, including a range in which the wiping member 361 can contact the discharge surface 115. When the wiping process is performed, the wiper 360 moves so that at least a portion of the wiping member 361 is above the discharge surface 115 in Figure 18. Subsequently, the carriage 91 on which the head unit 3 is mounted moves in the direction along the arrow shown in Figure 18 due to the operation of the carriage movement unit 9. As a result, the wiping member 361 contacts the discharge surface 115, as shown in Figure 18(b).

[0167] Here, the wiping member 361 is made of a plastic rubber or the like. Therefore, when the wiping member 361 comes into contact with the dispensing surface 115, the tip of the wiping member 361 flexes. This allows the wiping member 361 to wipe the surface of the dispensing surface 115, removing any paper fragments or other materials adhering to the dispensing surface 115.

[0168] The flushing process involves, for example, with the cap 351 shown in Figure 17 attached, simultaneously ejecting ink from multiple nozzles N included in the multiple ejection sections D of the target head unit 3. This flushing process refreshes the ink stored in the multiple ejection sections D of the head unit 3. As a result, the viscosity of the ink stored in the multiple ejection sections D of the head unit 3 is maintained within an appropriate range, and the viscosity of the ink is restored to an appropriate range. The flushing process only needs to be configured to simultaneously eject ink from multiple nozzles N included in the multiple ejection sections D of the head unit 3. Therefore, the flushing process may also be configured to simultaneously eject ink from multiple nozzles N included in the multiple ejection sections D by inputting a predetermined print data signal SI to the head unit 3 with the cap 351 attached.

[0169] Here, the control unit 2 may, based on the status determination signal JH output by the determination unit 7 described above, select one of the above-described pump suction processing, flushing processing, and wiping processing as maintenance processing and have the maintenance unit 10 execute it. For example, if the control unit 2 determines, based on the status determination signal JH, that the cause of the discharge abnormality occurring in the discharge unit D is the mixing of air bubbles into the discharge unit D, it will have the maintenance unit 10 execute pump suction processing; if the control unit 2 determines, based on the status determination signal JH, that the cause of the discharge abnormality occurring in the discharge unit D is increased ink viscosity, it will have the maintenance unit 10 execute flushing processing or pump suction processing; if the control unit 2 determines, based on the status determination signal JH, that the cause of the discharge abnormality occurring in the discharge unit D is the adhesion of paper fragments to the discharge surface 115, it will have the maintenance unit The maintenance unit 10 may be instructed to perform a wiping process. This will cause the maintenance unit 10 to attempt to restore the state of the discharge section D where the discharge abnormality occurred.

[0170] Furthermore, if a discharge abnormality occurs in any of the multiple discharge sections D of the head unit 3, the maintenance unit 10 may perform all of the following: pump suction, flushing, and wiping.

[0171] In other words, the liquid dispensing device 1 of this embodiment includes a maintenance unit 10 that performs maintenance on the dispensing unit D in order to attempt to restore the state of the dispensing unit D. The maintenance unit 10 performs a wiping process to wipe the dispensing surface 115 from which ink is dispensed from the head unit 3 and the recording head 32, and a flushing process to dispense liquid from multiple dispensing units D in order to restore the viscosity of the stored ink.

[0172] 6. Operation of the liquid dispensing device and control of sink capacity Here, we will explain the relationship between the operation of the liquid dispensing device 1 and the control of the sink capacity in the sink circuit 40 of the sink unit 4.

[0173] Figure 19 is a diagram illustrating the control of the sink capacity in the sink circuit 40. As shown in Figure 19, when the liquid dispensing device 1 starts operation, the control unit 2 reads out dispensing unit status information from a memory circuit (not shown) (step S10) and holds it. Here, the dispensing unit status information read out and held by the control unit 2 is information regarding the dispensing status of dispensing units D[1] to D[M] stored in the memory circuit of the control unit 2 in accordance with the status determination signal JH input to the control unit 2 in the determination process. For example, it includes information on whether or not a dispensing abnormality has occurred in each of the dispensing units D[1] to D[M], and information on the number of dispensing units D[1] to D[M] of the head unit 3 in which a dispensing abnormality has occurred.

[0174] Subsequently, the liquid dispensing device 1 performs the determination process described using Figures 13 to 16 (step S20). Specifically, when the determination process starts, the control unit 2 generates a clock signal CL, a print data signal SI, a latch signal LAT, a change signal CH, a period specification signal Tsig, and a drive waveform specification signal dCOM, designating the dispensing unit D[1] as the dispensing unit D to be inspected, and outputs them to the corresponding configuration. As a result, the control unit 2 receives a state determination signal JH corresponding to the dispensing unit D[1]. In other words, the control unit 2 obtains information on the determination result of whether or not a dispensing abnormality has occurred in the dispensing unit D[1].

[0175] Similarly, the control unit 2 generates a clock signal CL, a print data signal SI, a latch signal LAT, a change signal CH, a period specification signal Tsig, and a drive waveform specification signal dCOM, which sequentially designate the ejection units D[2] to D[M] as the ejection units D to be inspected, and outputs them to the corresponding configurations. As a result, the control unit 2 receives sequential status determination signals JH corresponding to each of the ejection units D[2] to D[M]. In other words, the control unit 2 sequentially acquires information on the determination results of whether or not an ejection abnormality has occurred in each of the ejection units D[2] to D[M].

[0176] In the following explanation, we will assume that the control unit 2 obtains all the determination results regarding whether or not a discharge abnormality has occurred in each of the discharge sections D[1] to D[M] in a single determination process. However, the control unit 2 may be configured to obtain the determination results regarding whether or not a discharge abnormality has occurred in each of the discharge sections D[1] to D[M] in multiple determination processes. For example, the control unit 2 may obtain the determination results regarding whether or not a discharge abnormality has occurred in each of the discharge sections D[1] to D[m] within the discharge sections D[1] to D[M] in the first determination process, and then obtain the determination results regarding whether or not a discharge abnormality has occurred in each of the discharge sections D[m+1] to D[M] within the discharge sections D[1] to D[M] in the second determination process.

[0177] Then, after the determination process in step S20 is completed, the control unit 2 updates the stored discharge unit status information according to the determination result of whether or not a discharge abnormality has occurred in each of the acquired discharge units D[1] to D[M] (step S30). That is, the control unit 2 updates the information on whether or not a discharge abnormality has occurred in each of the stored discharge units D[1] to D[M], and the number of discharge units D that have a discharge abnormality among the discharge units D[1] to D[M] that the head unit 3 has, based on the determination result of the determination process in step S20.

[0178] Then, the control unit 2 determines whether or not the discharge process can be executed based on the updated discharge unit status information it holds (step S40). Specifically, the control unit 2 determines whether or not a discharge abnormality has occurred in each of the discharge units D[1] to D[M] included in the discharge unit status information it holds, and whether or not it is possible to compensate for the discharge unit D experiencing a discharge abnormality through a compensation process. The control unit 2 may then determine that the discharge process can be executed if a compensation process is possible, and that the discharge process cannot be executed if a compensation process is not possible. The control unit 2 also determines whether or not the number of discharge units D[1] to D[M] included in the discharge unit status information it holds that are experiencing a discharge abnormality exceeds a predetermined number. The control unit 2 may then determine that the discharge process can be executed if the number of discharge units D experiencing a discharge abnormality is less than or equal to the predetermined number, and that the discharge process cannot be executed if the number of discharge units D experiencing a discharge abnormality exceeds the predetermined number. If the control unit 2 determines that it is not possible to perform the dispensing process (N in step S40), the control unit 2 terminates the process and the liquid dispensing device 1 stops operating. At this time, the control unit 2 may notify the user that it is not possible to perform the dispensing process via a notification mechanism (not shown).

[0179] When the control unit 2 determines that the execution of the ejection process is possible (Y in step S40), the control unit 2 determines whether an image data signal IMG has been input (step S50). If the image data signal IMG has not been input (N in step S50), it waits for the period until the image data signal IMG is input.

[0180] After that, when an image data signal IMG is input to the control unit 2 (Y in step S50), the control unit 2 outputs sink control signals SS1 to SS4 for controlling the sink capacity in the sink circuit 40 according to the information on the number of ejection units D in which ejection abnormalities have occurred among the held ejection unit state information. That is, the control unit 2 switches the sink control signals SS1 to SS4 according to the held ejection unit state information (step S60).

[0181] Specifically, when there is no ejection unit D in which an ejection abnormality has occurred, the control unit 2 outputs sink control signals SS1 to SS4 at the H level. When the number of ejection units D in which an ejection abnormality has occurred is a, it outputs a sink control signal SS1 at the L level and sink control signals SS2 to SS4 at the H level. When the number of ejection units D in which an ejection abnormality has occurred is b, which is more than a, it outputs sink control signals SS1 and SS2 at the L level and sink control signals SS3 and SS4 at the H level. When the number of ejection units D in which an ejection abnormality has occurred is c, which is more than b, it outputs sink control signals SS1 to SS3 at the L level and a sink control signal SS4 at the H level. When the number of ejection units D in which an ejection abnormality has occurred is d, which is more than c, it outputs sink control signals SS1 to SS4 at the L level. That is, when the number of ejection units D in which an ejection abnormality has occurred increases, the control unit 2 outputs the sink control signals SS1 to SS4 so that the resistance value of the variable resistance circuit 410 included in the sink circuit 40 becomes smaller, thereby controlling the sink circuit 40 so that the sink capacity increases when the number of ejection units D in which an ejection abnormality has occurred increases. Here, a is an arbitrary natural number satisfying "1≦a", b is an arbitrary natural number satisfying "a < b", c is an arbitrary natural number satisfying "b < c", and d is an arbitrary natural number satisfying "c < d".

[0182] In other words, the sink circuit 40 has three operating modes: one in which the impedance value between wiring Lb and wiring Lg is such that transistor 403 is in a non-conducting state; another in which the impedance value between wiring Lb and wiring Lg is such that resistor 411 has a resistance value smaller than that of resistor 411 and is the combined resistance value of resistors 411 to 412 connected in parallel; and a third in which the impedance value between wiring Lb and wiring Lg is such that resistors 411 to 412 connected in parallel have a resistance value smaller than the combined resistance value of resistors 411 to 412 and are connected in parallel. The system has three operating modes: one where the combined resistance value of resistors 411 to 413 is used; another where the impedance value between wiring Lb and wiring Lg is set to a resistance value smaller than the combined resistance value of resistors 411 to 413 connected in parallel, and is set to the combined resistance value of resistors 411 to 414 connected in parallel; and a third where the impedance value between wiring Lb and wiring Lg is set to a resistance value smaller than the combined resistance value of resistors 411 to 414 connected in parallel, and is set to the combined resistance value of resistors 411 to 415 connected in parallel. The operating modes are switched according to the number of discharge units D that the determination unit 7 has determined to be abnormal.

[0183] Subsequently, the liquid ejection device 1 performs the ejection process described using Figures 11 to 12 (step S70). Specifically, when the ejection process starts, the control unit 2 generates individual designation signals Sd[1] to Sd[M] corresponding to the input image data signal IMG. The control unit 2 then generates a print data signal SI by performing interpolation processing on the generated individual designation signals Sd[1] to Sd[M] based on information about whether or not an ejection abnormality has occurred in each of the ejection units D[1] to D[M] included in the retained ejection unit state information. Subsequently, the control unit 2 outputs the generated print data signal SI, along with the clock signal CL, latch signal LAT, change signal CH, period designation signal Tsig, and drive waveform designation signal dCOM, in the corresponding configuration. As a result, the head unit 3 ejects ink according to the print data signal SI, clock signal CL, latch signal LAT, change signal CH, period designation signal Tsig, and drive waveform designation signal dCOM.

[0184] At this time, as a complementary process as described above, the control unit 2, among the multiple ejection units D, determines that ejection unit D[m] is abnormal and does not eject ink during the ejection period TP in which the ejection process is being executed, and at least one of the multiple ejection units D[m+1] and D[m-1], which are located adjacent to ejection unit D[m] and in which the determination unit 7 determines that no abnormality has occurred, ejects ink to complement ejection unit D[m] during the ejection period TP in which the ejection process is being executed.

[0185] Furthermore, the control unit 2 determines whether or not a request to execute a judgment process has occurred (step S80). Such a request to execute a judgment process may occur, for example, when the operating direction of the carriage 91 on which the head unit 3 is mounted changes, or between sheets of paper of the conveyed medium P.

[0186] Then, if the control unit 2 determines that a request to execute a determination process has occurred (Y in step S80), the liquid dispensing device 1 executes the same determination process as in step S20 (step S81), and the control unit 2 updates the stored dispensing unit state information according to the determination result in the determination process in step S81, as in step S30 (step S82). Then, as in step S40, the control unit 2 determines whether or not it is possible to execute the dispensing process based on the updated dispensing unit state information stored in step S82 (step S83). Then, if the control unit 2 determines that it is not possible to execute the dispensing process (N in step S83), the control unit 2 terminates the process, and the liquid dispensing device 1 If the operation stops and the control unit 2 determines that it is possible to perform the dispensing process (Y in step S83), the control unit 2 switches the sink control signals SS1 to SS4 according to the dispensing unit status information it holds, as in step S60 (step S84). As a result, the sink capacity of the sink circuit 40 is updated according to the status of the most recent dispensing units D[1] to D[M].

[0187] Then, if the control unit 2 determines that no request for execution of the determination process has occurred (N in step S80), or if, in step S84, the control unit 2 switches the sink control signals SS1 to SS4 according to the discharge unit status information it holds, the control unit 2 then determines whether or not a request for execution of maintenance processing has occurred (step S90). Such a request for execution of maintenance processing may occur, for example, after the determination process determines that a new discharge abnormality has occurred in the discharge units D[1] to D[M], at the timing when the operating direction of the carriage 91 equipped with the head unit 3 is switched, or between sheets of paper of the transported medium P. Alternatively, it may occur after the cumulative operating time or continuous operating time of the liquid discharge device 1, or after the number of sheets of medium P from which ink has been discharged has reached a predetermined threshold, at the timing when the operating direction of the carriage 91 equipped with the head unit 3 is switched, between sheets of paper of the transported medium P, or at the timing when the formation of an image corresponding to the image data signal IMG is completed.

[0188] If the control unit 2 determines that a request to perform maintenance processing has occurred (Y in step S90), the control unit 2 instructs the maintenance unit 10 to perform the maintenance processing described above, such as the pump suction processing, flushing processing, and wiping processing (step S91). After the maintenance processing in the maintenance unit 10 is completed, the liquid discharge device 1 performs the same determination process as in step S20 (step S92), and the control unit 2 updates the discharge unit status information it holds according to the determination result in the determination process in step S92, as in step S30 (step S93). Then, as in step S40, the control unit 2 determines whether or not it is possible to perform the discharge processing based on the discharge unit status information updated in step S93 (step S94). Then, if the control unit 2 determines that it is not possible to perform the discharge process (N in step S94), the control unit 2 terminates the process and the liquid discharge device 1 stops operating. If the control unit 2 determines that it is possible to perform the discharge process (Y in step S94), the control unit 2 switches the sink control signals SS1 to SS4 according to the discharge unit status information it holds, similar to step S60 (step S95). As a result, the sink capacity of the sink circuit 40 is updated according to the status of the most recent discharge units D[1] to D[M]. That is, if the state of the discharge unit D where the discharge abnormality occurred is restored by the maintenance process, the control unit 2 controls the sink circuit 40 so that the sink capacity is reduced.

[0189] Then, if the control unit 2 determines that no request for maintenance processing has been made (N in step S90), or if, in step S95, the control unit 2 switches the sink control signals SS1 to SS4 according to the discharge unit status information it holds, the control unit 2 then determines whether the discharge processing corresponding to the image data signal IMG, which involves forming the image on the medium P, has been completed (step S100). If the control unit 2 determines that the discharge processing corresponding to the image data signal IMG has not been completed (N in step S100), the processes in steps S70 to S90 described above are repeatedly executed.

[0190] On the other hand, if the control unit 2 determines that the dispensing process corresponding to the image data signal IMG is complete (Y in step S100), or if the control unit 2 determines that it is not possible to perform the dispensing process (N in step S40, N in step S83, N in step S94), before the liquid dispensing device 1 stops operating, the control unit 2 stores the dispensing unit state information it holds in a memory circuit (not shown) of the control unit 2 (step S110), and then the liquid Discharge device 1 stops operating.

[0191] The head unit 3 and the recording head 32 of the head unit 3 are examples of print heads, and the ejection units D[1] to D[M] are examples of multiple ejection units, and any one of the ejection units D[1] to D[M] is, for example, ejection unit D[1] is an example of a first ejection unit, in which case the piezoelectric element PZ[1] included in ejection unit D[1] is an example of a first piezoelectric element, and any one of the ejection units D[1] to D[M] is, for example, ejection unit D[m] is an example of a second ejection unit, in which case the piezoelectric element PZ[m] included in ejection unit D[m] is an example of a second piezoelectric element, and any one of the ejection units D[1] to D[M] is, for example, ejection unit D[m] is an example of a third ejection unit, in which case at least one of the ejection units D[m-1] and D[m+1] located adjacent to ejection unit D[m] is an example of a fourth ejection unit. Furthermore, the determination unit 7 is an example of a state determination circuit, the maintenance unit 10 is an example of a maintenance section, the transistor 403 is an example of a switch circuit, the wiring Lb is an example of a first wiring, and the wiring Lg is an example of a second wiring. In addition, among the ejection sections D[1] to D[M] of the head unit 3 included in the ejection section state information, the information on the number of ejection sections D in which an ejection abnormality is occurring is an example of the number of abnormal ejection sections, and the ejection period TP, which is the period during which the ejection process in which ink is ejected from the head unit 3 is executed, is an example of the ejection period.In the sink circuit 40, an example of the first mode is an operating mode in which transistor 403 is controlled to be non-conductive, and an example of the first impedance value is the impedance value between wiring Lb and wiring Lg when transistor 403 is non-conductive. An example of the second mode is an operating mode in which transistor 403 is controlled to be conductive and switches 422 to 425 are controlled to be non-conductive, and an example of the second impedance value is the impedance value between wiring Lb and wiring Lg in this case, where the resistance value of resistor 411 is an example of the second impedance value. An example of the third mode is an operating mode in which transistor 403 is controlled to be conductive, switch 422 is controlled to be conductive, and switches 423 to 425 are controlled to be non-conductive, and an example of the third impedance value is the impedance value between wiring Lb and wiring Lg in this case, where the combined resistance value of resistors 411 and 412 connected in parallel is an example of the third impedance value.

[0192] 7. Effects As described above, the liquid ejection device 1 of this embodiment includes a head unit 3 having ejection sections D[1] to D[M], which include an ejection section D[1] that ejects ink by driving a piezoelectric element PZ[1] and an ejection section D[m] that ejects ink by driving a piezoelectric element PZ[m], a drive circuit 50 that outputs a drive signal COM supplied to the upper electrode Zu[1] which is one end of the piezoelectric element PZ[1] and the upper electrode Zu[m] which is one end of the piezoelectric element PZ[m], and the other end of the piezoelectric element PZ[1] The system includes a reference voltage circuit 530 that outputs a reference voltage signal VBS supplied to the lower electrode Zd[1] and the other end of the piezoelectric element PZ[m], a determination unit 7 that determines the state of each of the discharge sections D[1] to D[M], and a sink circuit 40 that switches the impedance value between the wiring Lb through which the reference voltage signal VBS propagates and the wiring Lg through which a signal with a ground potential lower than the reference voltage signal VBS propagates, according to the determination result of the determination unit 7. At this time, the sink circuit 40 switches the impedance value between the wiring Lb and the wiring Lg according to the judgment result of the judgment unit 7 to the resistance value when transistor 403 is non-conducting, the resistance value of resistor 411 which is smaller than the resistance value when transistor 403 is non-conducting, the combined resistance value of parallel connected resistors 411 to 412 which is smaller than the resistance value of resistor 411, the combined resistance value of parallel connected resistors 411 to 413 which is smaller than the combined resistance value of parallel connected resistors 411 to 413 which is smaller than the combined resistance value of parallel connected resistors 411 to 413 which is smaller than the combined resistance value of parallel connected resistors 411 to 414 which is smaller than the combined resistance value of parallel connected resistors 411 to 414 which is smaller than the combined resistance value of parallel connected resistors 411 to 415 which is smaller than the combined resistance value of parallel connected resistors 411 to 414 which is smaller.

[0193] In other words, in the liquid dispensing device 1 of this embodiment, the impedance value between the wiring Lb through which the reference voltage signal VBS propagates and the wiring Lg through which the ground potential signal propagates can be switched according to the state of each of the dispensing units D[1] to D[M]. In other words, the sink circuit 40 can switch its sink capacity, which is the amount of current that can flow from the wiring through which the reference voltage signal VBS propagates to the wiring through which the ground potential propagates, to the optimal state according to the state of each of the dispensing units D[1] to D[M].

[0194] Therefore, if an abnormality occurs in the discharge section D including the piezoelectric element PZ, and an image can be formed on the medium P in the discharge section D that is not abnormal, the liquid discharge device 1 can continue forming an image on the medium P without a decrease in image quality. Furthermore, if an abnormality occurs in the discharge section D including the piezoelectric element PZ, and it is difficult to form an image on the medium P using the discharge section D that is not abnormal, or if the voltage value of the wiring Lb increases due to factors other than an abnormality in the discharge section D including the piezoelectric element PZ, the liquid discharge device 1 can stop forming an image on the medium P. Thus, the risk of the discharge process continuing with a reduced image quality on the medium P is reduced.

[0195] As described above, the liquid dispensing device 1 of this embodiment can appropriately switch between continuing and stopping image formation on the medium P. Therefore, the liquid dispensing device 1 of this embodiment can reduce the risk of decreased productivity and convenience in the liquid dispensing device 1, and can also reduce the risk of decreased image quality formed on the medium P in the liquid dispensing device 1.

[0196] Furthermore, the liquid dispensing device 1 of this embodiment has a maintenance unit 10 that performs maintenance processing to restore the state of the dispensing unit D. As part of the maintenance processing, it performs a wiping process to wipe the dispensing surface 115 from which ink is dispensed from the head unit 3, and a flushing process to simultaneously dispense ink from multiple dispensing units D in order to restore the viscosity of the stored ink. Even if the state of the dispensing unit D is restored by such maintenance processing, the sink circuit 40 switches the sink capacity according to the determination result of the determination unit 7. Therefore, in the liquid dispensing device 1 of this embodiment, the risk of decreased productivity and convenience can be further reduced, as can the risk of decreased image quality formed on the medium P.

[0197] Furthermore, in the liquid dispensing device 1 of this embodiment, the determination unit 7 determines the state of the multiple dispensing units D in accordance with the residual vibration generated in the multiple dispensing units D, and therefore can determine the state of each dispensing unit D[1] to D[M] with high accuracy. Consequently, the determination accuracy of the state of the multiple dispensing units D in the determination unit 7 is improved, and the switching accuracy of the sink capacity in the sink circuit 40 is also improved. Thus, in the liquid dispensing device 1 of this embodiment, the risk of decreased productivity and convenience can be further reduced, and the risk of decreased image quality formed on the medium P can also be further reduced.

[0198] In particular, in the liquid dispensing device 1 of this embodiment, even if the amount of current propagating through the wiring Lb increases depending on the state of each of the dispensing sections D[1] to D[M], the risk of a decrease in productivity and convenience in the liquid dispensing device 1 can be reduced, and the risk of a decrease in image quality formed on the medium P in the liquid dispensing device 1 can also be reduced. Therefore, it is highly effective against short-circuit abnormalities that occur in any of the piezoelectric elements PZ[1] to PZ[M] in each of the dispensing sections D[1] to D[M] and cannot be recovered by maintenance processing.

[0199] Although embodiments and modifications have been described above, the present invention is not limited to these embodiments and can be implemented in various forms without departing from its essence. For example, the above embodiments can be combined as appropriate.

[0200] The present invention includes configurations that are substantially identical to those described in the embodiments (for example, configurations with the same function, method, and result, or configurations with the same purpose and effect). Furthermore, the present invention includes configurations in which non-essential parts of the configurations described in the embodiments are replaced. Furthermore, the present invention includes configurations that produce the same effects or achieve the same purpose as those described in the embodiments. Furthermore, the present invention includes configurations that add known technology to the configurations described in the embodiments.

[0201] The following conclusions can be drawn from the embodiments described above.

[0202] One embodiment of a liquid dispensing device is: A print head having a plurality of discharge sections, including a first discharge section that discharges liquid by driving a first piezoelectric element, and a second discharge section that discharges liquid by driving a second piezoelectric element, A drive circuit that outputs a drive signal supplied to one end of the first piezoelectric element and one end of the second piezoelectric element, A reference voltage circuit that outputs a reference voltage signal supplied to the other end of the first piezoelectric element and the other end of the second piezoelectric element, A state determination circuit for determining the state of the plurality of discharge units, A sink circuit that switches the impedance value between a first wiring through which the reference voltage signal propagates and a second wiring through which a signal with a lower potential than the reference voltage signal propagates, according to the determination result of the state of the plurality of discharge units in the state determination circuit. Equipped with, The aforementioned sink circuit is A first mode in which the aforementioned impedance value is set to the first impedance value, A second mode in which the impedance value is set to a second impedance value smaller than the first impedance value, A third mode in which the impedance value is set to a third impedance value smaller than the second impedance value, It holds.

[0203] In this liquid dispensing device, the sink circuit switches the impedance value between the first wiring through which a reference voltage signal propagates and the second wiring through which a signal with a lower potential than the reference voltage signal propagates, according to the state determination result of the state of multiple dispensing units in the state determination circuit, between a first impedance value, a second impedance value smaller than the first impedance value, and a third impedance value smaller than the second impedance value. This allows the amount of current that can flow from the first wiring to the second wiring to be switched to an optimal state according to the state of each of the multiple dispensing units.

[0204] Therefore, if an abnormality occurs in any of the multiple dispensing sections, and an image can be formed on the medium in the other dispensing sections that are not affected, the liquid dispensing device can continue forming an image on the medium without a decrease in image quality. Furthermore, if an abnormality occurs in any of the multiple dispensing sections, and it is difficult for the other dispensing sections that are not affected to form an image on the medium, or if the voltage value of the first wiring increases due to factors other than an abnormality in the dispensing section including the piezoelectric element, the device can stop forming an image on the medium. Consequently, this liquid dispensing device reduces the risk of the dispensing process continuing with a reduced image quality on the medium.

[0205] In other words, this liquid dispensing device can appropriately switch between continuing and stopping image formation on the medium. Therefore, in the liquid dispensing device of this embodiment, the liquid dispensing device This reduces the risk of decreased productivity and convenience, and also reduces the risk of decreased image quality formed on the medium in the liquid dispensing device.

[0206] In one embodiment of the liquid dispensing device, The first mode, the second mode, and the third mode may be switched depending on the number of abnormal discharge units among the plurality of discharge units that the state determination circuit has determined to be abnormal.

[0207] In this liquid dispensing device, the operation of the sink circuit is switched to a first mode, a second mode, and a third mode depending on the number of abnormal dispensing units that the state determination circuit has determined to be malfunctioning among the multiple dispensing units. This allows the amount of current that the sink circuit can supply from the first wiring to the second wiring to be switched to a more optimal state. Therefore, this liquid dispensing device can more appropriately switch between continuing and stopping image formation on the medium, further reducing the risk of decreased productivity and convenience in the liquid dispensing device, as well as further reducing the risk of decreased image quality formed on the medium in the liquid dispensing device.

[0208] In one embodiment of the liquid dispensing device, The system may further include a maintenance unit for performing maintenance on the discharge unit.

[0209] In one embodiment of the liquid dispensing device, The maintenance unit may perform a wiping process as part of the maintenance process, which involves wiping the ejection surface from which liquid is ejected from the print head.

[0210] In one embodiment of the liquid dispensing device, The maintenance unit may perform a flushing process as part of the maintenance process, in which it discharges liquid from the plurality of discharge ports in order to restore the viscosity of the stored liquid.

[0211] These liquid ejection devices have a maintenance unit that performs maintenance processing to restore the state of the ejection unit. As part of the maintenance processing, a wiping process is performed to wipe the ejection surface from which ink is ejected from the print head, and a flushing process is performed to simultaneously eject liquid from multiple ejection units to restore the viscosity of the stored liquid. Even if the state of the ejection unit is restored, the sink circuit switches between a first impedance value, a second impedance value smaller than the first impedance value, and a third impedance value smaller than the second impedance value, according to the state determination result of the state of the multiple ejection units in the state determination circuit. As a result, the amount of current that can be flowed from the first wiring to the second wiring by the sink circuit is switched to the optimal state based on the state of the most recent multiple ejection units. Therefore, the risk of a decrease in the productivity and convenience of the liquid ejection device can be further reduced, as can the risk of a decrease in the image quality formed on the medium.

[0212] In one embodiment of the liquid dispensing device, The aforementioned drive circuit may include a Class D amplifier circuit.

[0213] In one embodiment of the liquid dispensing device, The sink circuit may be configured to include discrete components.

[0214] In one embodiment of the liquid dispensing device, Of the multiple ejection units, the third ejection unit, which the state determination circuit has determined to be abnormal, will not eject liquid during the ejection period in which liquid is ejected from the print head. Of the plurality of discharge units, the fourth discharge unit, which is located adjacent to the third discharge unit and which the state determination circuit has determined is not abnormal, during the discharge period, Liquid may be dispensed to complement it.

[0215] In one embodiment of the liquid dispensing device, The state determination circuit may determine the state of the first discharge section in accordance with the residual vibration generated in the first discharge section, and determine the state of the second discharge section in accordance with the residual vibration generated in the second discharge section.

[0216] In this liquid dispensing device, the state determination circuit determines the state of the first dispensing section in accordance with the residual vibration generated in the first dispensing section, and determines the state of the second dispensing section in accordance with the residual vibration generated in the second dispensing section, thereby enabling high-precision individual determination of the states of multiple dispensing sections. Consequently, the accuracy of the state determination circuit's determination of the states of multiple dispensing sections is improved, and the accuracy of switching the amount of current that can be flowed from the first wiring to the second wiring by the sink circuit is improved. Therefore, the risk of a decrease in the productivity and convenience of the liquid dispensing device can be further reduced, as can the risk of a decrease in the image quality formed on the medium.

[0217] In one embodiment of the liquid dispensing device, The sink circuit includes a switch circuit and a variable resistor circuit. One end of the switch circuit is electrically connected to the first wiring, The other end of the switch circuit is electrically connected to one end of the variable resistor circuit. The other end of the variable resistor circuit is electrically connected to the second wiring. One end and the other end of the switch circuit are controlled to be non-conductive in the first mode and to be conductive in the second and third modes. The resistance value between one end and the other end of the variable resistor circuit in the second mode may be greater than the resistance value between one end and the other end of the variable resistor circuit in the third mode. [Explanation of Symbols]

[0218] 1…Liquid dispensing device, 2…Control unit, 3…Head unit, 4…Sink unit, 5…Drive circuit unit, 7…Determination unit, 8…Transport unit, 9…Carriage movement unit, 10…Maintenance unit, 31…Supply switching circuit, 32…Recording head, 33…Detection circuit, 40…Sink circuit, 50…Drive circuit, 81…Media transport mechanism, 82…Platen, 91…Carriage, 92…Carriage transport mechanism, 93…Carriage guide shaft, 100…Housing, 115… Discharge surface, 120... Ink cartridge, 310... Connection status specification circuit, 321... Diaphragm, 322... Cavity, 323... Nozzle plate, 324... Cavity plate, 325... Reservoir, 326... Ink supply port, 327... Ink intake, 330... Waveform shaping circuit, 331... AD conversion circuit, 351... Cap, 352... Tube, 353... Pump, 354... Waste liquid tank, 359... Ink absorber, 360... Wiper, 361... Wiping member, 401... Resistance Resistor, 402... Constant voltage diode, 403... Transistor, 410... Variable resistor circuit, 411~415... Resistor, 422~425... Switch, 500... Integrated circuit, 510... Modulation circuit, 512, 513... Adder, 514... Comparator, 515... Inverter, 516... Integral attenuator, 517... Attenuator, 520... Gate drive circuit, 521, 522... Gate driver, 530... Reference voltage circuit, 531... Comparator, 532... Transistor, 534, 5 35…Resistor, 550…Amplifier circuit, 560…Demodulation circuit, 570, 572…Feedback circuit, C1~C5…Capacitor, D…Output section, D1…Diode, L1…Inductor, Lb, Lc, Lg, Ls…Wiring, M1, M2…Transistor, Ms…Modulation signal, N…Nozzle, NL…Nozzle row, OP1, OP2…Operational amplifier, P…Media, PZ…Piezoelectric element, R1~R6, Rf…Resistor, W1, W2, Wc, Wf, Ws…Switch, Zd…Lower electrode, Zm…Piezoelectric material, Zu…Upper electrode

Claims

1. A print head having a plurality of discharge sections, including a first discharge section that discharges liquid by driving a first piezoelectric element, and a second discharge section that discharges liquid by driving a second piezoelectric element, A drive circuit that outputs a drive signal supplied to one end of the first piezoelectric element and one end of the second piezoelectric element, A reference voltage circuit that outputs a reference voltage signal supplied to the other end of the first piezoelectric element and the other end of the second piezoelectric element, A state determination circuit for determining the state of the plurality of discharge units, A sink circuit that switches the impedance value between a first wiring through which the reference voltage signal propagates and a second wiring through which a signal with a lower potential than the reference voltage signal propagates, according to the determination result of the state of the plurality of discharge units in the state determination circuit. Equipped with, The aforementioned sink circuit is A first mode in which the aforementioned impedance value is set to the first impedance value, A second mode in which the impedance value is set to a second impedance value smaller than the first impedance value, A third mode in which the impedance value is set to a third impedance value smaller than the second impedance value, Having, A liquid dispensing device characterized by the following features.

2. The first mode, the second mode, and the third mode are switched according to the number of abnormal dispensing units among the plurality of dispensing units that the state determination circuit has determined to be abnormal. The liquid dispensing device according to feature 1.

3. The system further includes a maintenance unit that performs maintenance processing on the discharge unit. The liquid dispensing device according to feature 1.

4. The maintenance unit performs a wiping process as part of the maintenance process, which involves wiping the ejection surface from which liquid is ejected from the print head. The liquid dispensing device according to feature 3.

5. The maintenance unit performs a flushing process as part of the maintenance process, in which it discharges liquid from the plurality of discharge units in order to restore the viscosity of the stored liquid. The liquid dispensing device according to feature 3.

6. The aforementioned drive circuit includes a Class D amplifier circuit. The liquid dispensing device according to feature 1.

7. The sink circuit is composed of discrete components, The liquid dispensing device according to feature 1.

8. Of the multiple ejection units, the third ejection unit, which the state determination circuit has determined to be abnormal, will not eject liquid during the ejection period in which liquid is ejected from the print head. Of the plurality of discharge units, the fourth discharge unit, which is located adjacent to the third discharge unit and which the state determination circuit has determined is not abnormal, will discharge liquid during the discharge period in a manner that complements the third discharge unit. The liquid dispensing device according to feature 1.

9. The state determination circuit determines the state of the first discharge unit according to the residual vibration generated in the first discharge unit, and determines the state of the second discharge unit according to the residual vibration generated in the second discharge unit. The liquid dispensing device according to feature 1.

10. The sink circuit includes a switch circuit and a variable resistor circuit. One end of the switch circuit is electrically connected to the first wiring, The other end of the switch circuit is electrically connected to one end of the variable resistor circuit. The other end of the variable resistor circuit is electrically connected to the second wiring. One end and the other end of the switch circuit are controlled to be non-conductive in the first mode and to be conductive in the second and third modes. The resistance value between one end and the other end of the variable resistor circuit in the second mode is greater than the resistance value between one end and the other end of the variable resistor circuit in the third mode. A liquid dispensing device according to any one of claims 1 to 9.

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