Gaming machine, control method, program, and information processing device
By adopting a synchronous communication solution of the main control device and performance control device in the game console, the problem of difficulty in quickly restoring normal operations under external interference is solved, and rapid recovery and normal operation is achieved, improving the user experience.
Patent Information
- Application Number
- JP2023142228
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2023-09-01
- Publication Date
- 2025-03-28
- Estimated Expiration
- 2043-09-01
AI Technical Summary
When existing gaming machines are disturbed externally, it is difficult to quickly resume normal operation, especially under the influence of electrostatic noise and other gaming console noise, the operation of performance control equipment and storage equipment is disturbed.
The game machine adopts a master control device and a performance control device. The performance control device includes the first and second control units, which reads data with the external storage device through synchronous communication, specifies the data address and quantity using read requests, and reads data or outputs virtual data within a specified time to ensure the normal operation of the system.
Through this solution, the game console can quickly resume normal operation when it is disturbed by external interference, avoiding the need for system restart, reducing recovery time, and improving user experience.
Smart Images

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Abstract
Description
[Technical field]
[0001] The present invention relates to a gaming machine that uses a gaming medium, such as a pachinko gaming machine. [Background technology]
[0002] 2. Description of the Related Art Gaming machines such as pachinko machines in which a game is played using a gaming ball as a gaming medium are known. In an amusement hall, game balls are supplied to the game machines from the island equipment, but as the game balls circulate between the island equipment and the game machines, they rub against each other and become charged with static electricity. This static electricity can cause static noise that can affect the operation of the performance control device and its external storage device. Furthermore, noise generated by other gaming machines placed opposite one another can become a disturbance and affect the operation of the presentation control device and storage device placed behind the gaming machine. For this reason, various technologies are used in gaming machines to reduce the effects of electrostatic noise. As a related technique, for example, electromagnetic noise that has entered a control board such as a peripheral control board, a peripheral data ROM board, or a liquid crystal output board flows from the ground (GND) line of the control board such as the peripheral control board, the peripheral data ROM board, or the liquid crystal output board to the GND line of the power supply board. A technique has been disclosed in which this electromagnetic noise is removed by flowing it to the earth of the island equipment of the game hall via a frame earth board (for example, Patent Document 1). [Prior art documents] [Patent documents]
[0003] [Patent Document 1] JP 2018-42588 A Summary of the Invention [Problem to be solved by the invention]
[0004] However, even if measures are taken to reduce the effects of noise, it is difficult to completely eliminate the effects of disturbances on the performance control device and memory device equipped in the gaming machine. One aspect of the present invention is to quickly restore a gaming machine affected by a disturbance and enable it to operate normally. [Means for solving the problem]
[0005] According to one aspect of the present invention, there is provided a gaming machine including a main control device and a performance control device that controls performance, the performance control device includes a first control unit and a second control unit, and performs synchronous communication with a storage device that is externally connected to the performance control device, the first control unit outputs a read request that specifies read data to be read from the storage device to the second control unit, and executes a process of controlling the performance based on the read data, the read request output by the first control unit includes a designation of the number of pieces of the read data, The second control unit outputs the read request input from the first control unit to the storage device, and The number of pieces of data corresponds to the number of pieces. when the data is read from the storage device within a certain period of time, the read data is output to the first control unit which output the read request; In the read request To be specified The number of pieces of data corresponds to the number of pieces. , From the storage device If the data is not read within the specified time , dummy data in a number corresponding to the number to the first control unit which output the read request. Effect of the Invention
[0006] According to one aspect of the present invention, a gaming machine affected by a disturbance can be quickly restored to normal operation. [Brief description of the drawings]
[0007] [Figure 1] 1 is a diagram showing a schematic configuration of a gaming machine according to an embodiment of the present invention; [Diagram 2] A figure showing an example of the hardware configuration of a gaming machine including a performance control device of this embodiment. [Diagram 3] A diagram showing the functional configuration of the performance control device of this embodiment. [Figure 4] 13 is a diagram illustrating communication between the performance control device and an external storage device when there is no influence of external disturbance. FIG. [Diagram 5] 13 is a diagram illustrating communication between the performance control device and an external storage device when there is an influence of a disturbance. FIG. [Figure 6] 13 is a diagram illustrating the processing performed by the performance control device of this embodiment when there is an influence of external disturbance. FIG. [Figure 7] 4 is a flowchart showing a process performed by an input / output control unit of the present embodiment. [Figure 8] FIG. 1 is a block diagram illustrating an embodiment of a computing device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0008] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. FIG. 1 is a diagram showing a schematic configuration of a gaming machine according to this embodiment. As shown in FIG. 1, the gaming machine 100 includes a main control board 1, a performance control board 2A, an external storage device 3, a display device 4, a sound emitting device 5, and a lighting device 6. The main control board 1 is equipped with a main control device (main CPU). The performance control board (sub-board) 2A is equipped with a performance control device 2 (sub-CPU). The gaming machine 100 is, for example, a pachinko gaming machine in which a game is played using gaming balls as a gaming medium. In this embodiment, the performance control device 2 and the external storage device 3 are collectively referred to as a performance control system. The main control board 1 and the performance control board 2A, the performance control board 2A and the external storage device 3, and the performance control board 2A, the display device 4, the sound emission device 5, and the lighting device 6 are each connected so that they can communicate with each other. However, the communication between the main control board 1 and the performance control board 2A is a one-way communication in which only input of commands from the main control board 1 to the performance control device 2 is permitted. Data or commands cannot be input from the performance control device 2 to the main control board 1.
[0009] In the case where the gaming machine 100 is a pachinko gaming machine, when the gaming medium shot out into the gaming area by the launching device enters a start winning hole provided in the gaming area, the main control device performs a lottery for a pattern using random numbers and determines whether or not there is a jackpot based on the result of this lottery. The main control board 1 outputs a command to the performance control device 2 to specify the time and pattern of symbol variation based on the result of the jackpot determination. Alternatively, if no start winning occurs for a certain period of time, the main control board 1 puts the gaming machine 100 into a customer waiting state (standby state) and inputs a command to the performance control device 2 indicating that the gaming machine has entered the customer waiting state. If a jackpot is determined to have been won in the jackpot determination, after the pattern change has ended, the game medium enters the opened attacker, and the jackpot is awarded by paying out prize balls. The performance control device 2 selects a performance to be performed using performance devices such as a display device 4, a sound emitting device 5, and a lighting device 6 based on a command input from the main control board 1, and controls the execution of the selected performance during a specified variable time or a performance while waiting for customers. The display device 4 is, for example, a display device such as an LCD (Liquid Crystal Display), a PDP (Plasma Display Panel), or an OLED (Organic Light Emitting Diode). The sound emitting device 5 is, for example, a speaker. The lighting device 6 is, for example, a light-emitting device such as an LED (Light Emitting Diode). The external storage device 3 stores image data, sound data, and lighting data used for game effects, customer waiting effects (standby effects), and effects during a big win. The image data includes moving image data.
[0010] The performance control device 2 reads data from the external storage device 3 based on commands input from the main control board 1, and performs various processes on the read data. The performance control device 2 performs drawing processing on the read image data and outputs the data to the display device 4 to display the image (image processing). The performance control device 2 also performs playback processing on the read audio data and outputs the data to the sound emitting device 5 to output the audio (audio processing). Furthermore, the performance control device 2 outputs the read lighting data to the lighting device 6 to light the lamp (lighting processing). In this embodiment, a read request for performance data made by each performance control circuit 201, which is provided in the performance control device 2 and will be described later in Fig. 2, to the external storage device 3 is particularly referred to as a "request." A read request for performance data made by an input / output control circuit 202, which will be described later in Fig. 2, to the external storage device 3 is simply referred to as a read request. In addition to specifying the data to be read, the request also includes the address of the data to be read and the size of the data to be read. The size of the data to be read is expressed as a burst size and a burst length in the AXI (Advanced eXtensible Interface) bus specification. The burst size is the number of bytes output during one burst transfer process. The burst length is the number of burst transfer processes required to be executed in a read process. In other words, the burst length is the number of burst-sized data (unit data) to be read. Therefore, the size of the data to be read is specifically the burst size x burst length. The size of the data to be read is information for transmitting and receiving data via the AXI bus included in the performance control device 2. That is, the request includes a read request and the number of unit data. The data to be read can be specified by the address at which the desired data is located in the storage area of the external storage device 3.
[0011] The performance control device 2 is a sub-CPU for the main CPU of the main control board 1, and has the functions of a VDP (Video Display Processor). The term VDP originally refers to a processor that controls video output. However, the performance control device 2 of this embodiment is an SoC (System on Chip) that integrates the image control circuit, audio control circuit, lamp control circuit, and control device (performance control CPU) shown in Figure 2. The external storage device 3 is an external storage device that is provided in the performance control device 2 and is connected to a memory I / F 204, which will be described later in FIG. The external storage device 3 has a large capacity, unlike the storage device mounted on the performance control board 2A or the storage device built into the performance control device 2, and can store a lot of performance data. Therefore, the performance control board 2A can output a rich performance using images and sounds by reading the performance data from the external storage device 3 according to the progress of the game. On the other hand, the external storage device 3 has a long signal line between it and the performance control device 2 on the performance control board 2A, and is connected to the performance control board 2A via a connector. As a result, data transfer between the performance control board 2A and the external storage device 3 is more susceptible to disturbances such as electrostatic noise than data transfer inside the performance control board 2A.
[0012] FIG. 2 is a diagram showing an example of the hardware configuration of a gaming machine including the performance control device of this embodiment, and is a diagram showing the performance control device of FIG. 1 in detail. 2, the performance control device 2 includes an image control circuit 201a, an audio control circuit 201b, a lamp control circuit 201c, an input / output control circuit 202, a storage device 203, a memory I / F 204, and a general control device 205. The memory I / F 204 is an input / output interface used when communicating data between the performance control device 2 and the external storage device 3. The image control circuit 201 a , the audio control circuit 201 b , the lamp control circuit 201 c , the input / output control circuit 202 , and the general control circuit 205 are connected by a bus 206 . In the following description, when there is no particular distinction between the image control circuit 201a, the sound control circuit 201b, and the lamp control circuit 201c, they are also simply referred to as the performance control circuit 201. The image control circuit 201a is a circuit that executes image processing using data acquired from the external storage device 3, and is connected to the display device 4. The image control circuit 201a functions as the image control unit 10a in FIG. The audio control circuit 201b is a circuit that executes audio processing using data acquired from the external storage device 3, and is connected to the sound emitting device 5. The audio control circuit 201b functions as the audio control unit 10b in FIG. The lamp control circuit 201c is a circuit that executes lighting processing using data acquired from the external storage device 3, and is connected to the lighting device 6. The lamp control circuit 201c functions as the lamp control unit 10c in FIG. The performance control device 2 may also include a motor control circuit as the performance control circuit 201 that controls the motors that drive the movable props, attackers, electric tulips, etc. used in the performance. In this case, the motor control circuit is connected to the bus 206 and performs the drive process of the motor using the data acquired from the external storage device 3. The input / output control circuit 202 is a circuit that controls the transfer of data to and from the external storage device 3. The input / output control circuit 202 functions as the input / output unit 21 and the clock unit 22 in FIG. The storage device 203 stores various data used for data transfer between the storage device 203 and the external storage device 3. The storage device 203 functions as the storage unit 23 in FIG. The memory I / F 204 is an interface that connects the performance control device 2 with an external device. In this embodiment, the performance control device 2 is connected to the external storage device 3 via the memory I / F 204. The memory I / F 204 is also connected to the bus 206 via an input / output control circuit 202. The memory I / F 204 then executes initialization of communication with the external storage device 3 to perform link-up processing, and controls communication between the performance control device 2 and the external storage device 3. The memory I / F 204 functions as the input / output unit 21 in FIG. 3.
[0013] The overall control device 205 is a processor that controls the entire performance control device 2. The overall control device 205 functions as the overall control unit 40 in Fig. 3. The overall control device 205 may also function as the input / output unit 21 and the timing unit 22 in Fig. 3. In the following description, it is assumed that the performance control circuit 201 that transmits a request to the external storage device 3 is the image control circuit 201a. However, the same control can also be performed for the sound control circuit 201b and the lamp control circuit 201c. The bus 206 is an AXI bus conforming to the AXI specifications, and within the performance control device 2, connects each component such as the performance control circuit 201, the input / output control circuit 202, and the overall control device 205 so that they can communicate with each other.
[0014] FIG. 3 is a diagram showing the functional configuration of the performance control device of the present embodiment. FIG. 3 shows the functional configuration of a performance control device corresponding to the hardware configuration of FIG. As shown in Fig. 3, the performance control device 2 includes an image control unit 10a, an audio control unit 10b, a lamp control unit 10c, an input / output control unit 20, and a general control unit 40. In the following description, when there is no particular distinction between the image control unit 10a, the audio control unit 10b, and the lamp control unit 10c, they are also simply referred to as the performance control unit 10. The performance control unit 10 is an example of a first control unit. Also, the input / output control unit 20 and the general control unit 40 are an example of a second control unit.
[0015] The input / output control unit 20 controls the input / output of data between the performance control device 2 and the external storage device 3. The input / output control unit 20 has a characteristic configuration in the performance control device 2 of this embodiment. The general control unit 40 determines the performance in response to commands input from the main control board 1, and requests each performance control unit 10 to carry out the necessary control. A part of the processing of the input / output control unit 20 may be performed as processing of the overall control unit 40. That is, the overall control unit 40 may control communication with the external storage device 3. In the following description, it is assumed that the input / output control unit 20 controls communication with the external storage device 3.
[0016] The image control unit 10a includes a request unit 11a and an image processing unit 12a. The image control unit 10a controls image processing in the performance control device 2 in response to a request from the general control unit 40. The request unit 11a outputs to the input / output control unit 20 a request for requesting the external storage device 3 to send image data for performance. The image processing unit 12a uses image data acquired from the external storage device 3 via the input / output control unit 20 to execute image processing for drawing an image. The audio control unit 10b includes a request unit 11b and an audio processing unit 12b. The audio control unit 10b controls audio processing in the performance control device 2 in response to a request from the general control unit 40. The request unit 11b outputs to the input / output control unit 20 a request for requesting the external storage device 3 to provide sound data for effect. The audio processing unit 12b uses audio data acquired from the external storage device 3 via the input / output control unit 20 to execute image processing for reproducing audio. The lamp control unit 10c includes a request unit 11c and a lighting processing unit 12c. The lamp control unit 10c controls the lighting processing in the performance control device 2 in response to a request from the general control unit 40. The request unit 11c outputs to the input / output control unit 20 a request for requesting the external storage device 3 to provide lighting data for performance. The lighting processing unit 12c uses the lighting data acquired from the external storage device 3 via the input / output control unit 20 to execute lighting processing for lighting the lamp. In the following description, it is assumed that the performance control unit 10 that sends a request to the external storage device 3 is the image control unit 10a. However, the sound control unit 10b and the lamp control unit 10c can also perform similar control.
[0017] The following will provide a more detailed explanation using Figures 2 and 3, but the explanation will basically be based on the configuration of the functional parts shown in Figure 3, except when referring to the circuit configuration of the performance control device. [Communication method between the production control device and external storage device] The communication method between the performance control device 2 and the external storage device 3 shown in Figs. 2 and 3 will be described. The performance control device 2 includes an input / output control unit 20 that controls communication between the performance control device 2 and the external storage device 3 and relays communication between each performance control unit 10 and the external storage device 3 . The external storage device 3 is a storage device that performs synchronous communication with the performance control device 2, and is, for example, an SSD (Solid State Drive). In the following description, it is assumed that the external storage device 3 is an SSD. The external storage device 3 includes a storage area 3a formed of, for example, a NAND flash memory, and a controller 3b that controls reading and writing from and to the storage area 3a, as well as communication between the performance control device 2 and the external storage device 3. The external storage device 3 employs SATA (Serial ATA) as a communication interface. Like other high-speed serial communications, SATA requires communication negotiation to establish communication. Communication negotiation is a process to ensure the reliability of communication.
[0018] Here, in this embodiment, communication negotiation is executed between the performance control device 2 and the external storage device 3. The communication negotiation is a process that includes initialization of communication and adjustment of communication speed. The communication initialization is a process for establishing communication between the performance control device 2 and the external storage device 3. The communication initialization is executed when the power of the gaming machine 100 is turned on or when at least one of the performance control device 2 and the external storage device 3 is restarted. In the communication initialization process, the performance control device 2 and the external storage device 3 each independently start sending an initialization signal. Then, when the performance control device 2 and the external storage device 3 receive each other's initialization signal, they transition to the next state and establish communication by repeating the process of sending another signal multiple times (for example, the OOB sequence of SATA communication). The initialization signal is, for example, the COMINIT, COMORESET, COMWAKE, etc. of the OOB sequence used to establish communication. The adjustment of the communication speed is a process of adjusting the communication speed between the performance control device 2 and the external storage device 3 after communication is established (for example, speed negotiation of SATA communication).
[0019] The gaming machine 100 of this embodiment also performs SATA communication between the performance control device 2 and the external storage device 3. Therefore, the gaming machine 100 executes communication negotiation between the performance control device 2 and the external storage device 3 after the power is turned on or when at least one of the performance control device 2 and the external storage device 3 is restarted. It should be noted that the input / output unit 21 of the performance control device 2 and the controller 3b of the external storage device 3 control communications, including communications negotiation, between the performance control device 2 and the external storage device 3.
[0020] The communication negotiation that is carried out when the gaming machine 100 is powered on or when at least one of the performance control device 2 and the external storage device 3 is restarted will be described. When the gaming machine 100 is powered on or the performance control device 2 is restarted, the voltage input to the performance control device 2 rises and operation stabilizes, and the performance control device 2 executes a reset process. Then, when the reset of the performance control device 2 is released, the performance control device 2 starts an initialization process for communication with the external storage device 3. Resetting the performance control device 2 includes, for example, initialization of flip-flops (FFs), registers, and the like. In addition, when the power supply of the gaming machine 100 is turned on or the external storage device 3 is restarted, the voltage input to the external storage device 3 rises and the operation becomes stable, and the external storage device 3 executes a reset process. Then, when the reset of the external storage device 3 is released, the external storage device 3 starts an initialization process of the communication with the performance control device 2. In the initialization process, the input / output control unit 20 of the performance control device 2 transmits a COMRESET signal to the external storage device 3. When the external storage device 3 receives this COMREST signal, it transmits a COMINIT signal to the performance control device 2. When the performance control device 2 receives the COMINIT signal, it transmits a COMWAKE signal to the external storage device 3. When the performance control device 2 receives the COMWAKE signal, it transmits the COMWAKE signal to the external storage device 3. If these negotiations are performed normally, the initialization of communication is completed, communication is established between the performance control device 2 and the external storage device 3, and communication between the two devices becomes possible. After that, the performance control device 2 and the external storage device 3 perform speed negotiation to adjust their communication speeds.
[0021] After the gaming machine 100 is powered on or the performance control device 2 is restarted, when communication negotiation with the external storage device 3 is completed, the performance control device 2 reads out the performance control program from the external storage device 3. The performance control device 2 completes startup by executing the read program. As a result, the performance control device 2 finishes initialization for receiving commands from the main control board 1, and goes into a standby state in which it can receive commands from the main control board 1. The performance control device 2 starts performance control in response to commands from the main control board 1. In this embodiment, the series of processes in which the performance control device 2 starts performance control after it has restarted is called a system reset.
[0022] [Data transfer method within the performance control device] The communication method between the performance control unit 10 and the input / output control unit 20 using the AXI bus 206 in the performance control device 2 shown in Figs. The AXI bus 206 employs the AXI protocol as a communication protocol. The AXI protocol is based on handshaking between devices. The AXI protocol defines five channels between a master and a slave: two channels for read transactions (read address and read data), and three channels for write transactions (write address, write data, and write response). In this embodiment, the performance control unit 10 of the performance control device 2 only reads performance data from the external storage device 3 via the input / output control unit 20, so in the following explanation, only two channels of the read transaction are considered. In a read transaction, the master transmits a read address and a burst length (LENGTH) to the slave. This is the "request" in this embodiment.
[0023] The burst length is a value that indicates how many unit data transfers are requested of the slave when data of the burst size specified in the AXI protocol is regarded as one unit data. For example, when the master requests 128-bit data from the slave, if the unit data is 32 bits, it requests the reading of four unit data since 128 / 32=4. In this case, the requested data is transferred when four unit data are transferred from the slave to the master. For example, when the master requests 140-bit data from the slave, if the unit data is 32 bits, it requests five unit data pieces, including four unit data pieces corresponding to 128 bits, plus one unit data piece containing 18 bits as a remainder. In this case, the requested data is considered to have been transferred when the five unit data pieces are transferred from the slave to the master. The number of data units is specified in the request by a value called LENGTH. LENGTH is set to the burst length minus 1. Therefore, when requesting four data units, LENGTH = 3 is specified. When the master receives the number of unit data specified by the request, it determines that the requested data has been received normally.
[0024] In the AXI protocol, a read transaction is performed in the following steps (1) to (5). (1) The master outputs a VALID signal indicating that it is making a read request to the slave (sets the signal to HIGH). (2) The slave outputs a READY signal to the master (sets the signal to LOW) to indicate that it is ready to accept a read request. (3) While the slave is outputting a VALID signal to the master indicating that the read data is valid (turning the signal ON), the target data is sent to the master. (4) The master can accept data while the master keeps the READY signal, which indicates that it is ready to accept data, ON. (5) The slave outputs a signal to the master indicating that the read requested data has been sent. In the AXI protocol, the master reads data from the slave through this handshake procedure using the READY and VALID signals.
[0025] In FIG. 3, the performance control unit 10 corresponds to the master of the AXI protocol, and the input / output control unit 20 corresponds to the slave, and the performance control unit 10 and the input / output control unit 20 communicate with each other via an AXI bus 206 according to the AXI protocol. 2 shows a one-to-many configuration in which multiple masters are connected to one slave via the AXI bus 206. However, the present invention is not limited to this, and may be a many-to-many configuration having multiple slaves. When the overall control device 205 functions as the input / output control unit 20, the overall control device 205 also operates as a slave on the AXI protocol.
[0026] The basic configuration of the performance control device 2 of this embodiment has been described above, and will be explained in more detail below. As described above, the external memory device 3 and the presentation control device 2 of the gaming machine 100 may be affected by electrostatic noise caused by static electricity generated on the gaming ball, noise generated by other gaming machines placed opposite, and other disturbances. As a result, the performance control device 2 may not be able to properly communicate with the external storage device 3. In that case, each performance control circuit 201 (performance control unit 10) of the performance control device 2 cannot receive the performance data requested from the external storage device 3.
[0027] FIG. 4 is a diagram illustrating communication between the performance control device and the external storage device when there is no effect of disturbance. The input / output control unit 20 acts as a host in SATA communication with the external storage device 3, and acts as a slave in AXI protocol communication with the performance control unit 10. The following description will be given with reference to FIG. When the gaming machine 100 is powered on and communication negotiation between the performance control device 2 and the external storage device 3 is completed, the performance control device 2 reads out the performance control program from the external storage device 3. The performance control device 2 then executes the read program to complete startup and enters a standby state in which it can receive commands from the main control board 1. When the performance control device 2 receives a command from the main control board 1, it makes a request for performance data to the input / output control unit 20 in accordance with the AXI protocol (S11). When a request is received from the performance control device 10, the input / output control unit 20 requests the external storage device 3 to transmit the requested data (S12). At this time, the input / output control unit 20 requests the external storage device 3 to read the number of pieces of data specified from the address specified in the request. Note that the input / output control unit 20 may request the external storage device 3 to read a larger number of pieces of data than the number of pieces of unit data specified from the address specified in the request. If the handshake is successful, the controller 3b of the external storage device 3 reads the data requested by the input / output control unit 20 from the storage area 3a and transfers it to the input / output control unit 20 (S13). Here, the handshake communication between the input / output control unit 20 and the external storage device 3 will be described. If there is no disturbance and the handshake is successful, the input / output control unit 20 can receive the requested data normally. If the handshake fails due to the disturbance or the like, the input / output control unit 20 cannot receive the requested data normally. A successful handshake means that the receiving side has successfully received a signal from the sending side indicating that data is being sent, and that the sending side has successfully received a signal from the receiving side indicating that data sent by the sending side has been received. A handshake failure, as described below, occurs when the sender and receiver are unable to receive either the signal indicating that data is being sent, the signal indicating that data has been received, or the data itself. Returning to the explanation of Figure 4. The input / output control unit 20 transfers the data transferred from the external storage device 3 to the performance control unit 10 (S14). If more data than the specified number of unit data items are read from the external storage device 3 from the address specified in the request, the input / output control unit 20 transfers the number of unit data items specified in the request to the performance control unit 10. This allows the AXI protocol to end normally, and the performance control unit 10 can execute the processes of steps S11-S14 again.
[0028] FIG. 5 is a diagram illustrating communication between the performance control device and the external storage device when there is an influence of a disturbance. In the following explanation, it is assumed that there is no disturbance inside the performance control device 2. Also, it is assumed that communication between the performance control device 2 and the external storage device 3 is affected by the disturbance and data is not transferred normally. As in FIG. 4, the input / output control unit 20 acts as a host in SATA communication with the external storage device 3, and acts as a slave in AXI protocol communication with the performance control circuit 10. Description will be given with reference to FIG. When the gaming machine 100 is powered on and the communication negotiation between the performance control device 2 and the external storage device 3 is completed, the performance control device 2 reads out the performance control program from the external storage device 3. Then, the performance control device 2 completes its startup by executing the read program, and goes into a standby state in which it can receive commands from the main control board 1. When the performance control unit 10 receives a command from the main control board 1, it requests performance data according to the AXI protocol from the input / output control unit 20 (S21). Since there is no influence of disturbance inside the performance control device 2, the performance control unit 10 can make a request to the input / output control unit 20. When a request is received from the performance control device 10, the input / output control unit 20 requests the external storage device 3 for the requested data (S22). At this time, the input / output control unit 20 requests the external storage device 3 to read the number of pieces of data specified from the address specified in the request. Note that the input / output control unit 20 may request the external storage device 3 to read a larger number of pieces of data than the number of pieces of unit data specified from the address specified in the request. Due to the influence of the disturbance, the controller 3b of the external storage device 3 is unable to transfer the number of unit data items corresponding to the request from the input / output control unit 20 (S23). Therefore, the input / output control unit 20 is unable to properly receive the data requested to be read by the request. In this case, the input / output control unit 20 cannot transfer the number of unit data requested to be read by the request to the performance control unit 10 (S24).
[0029] As a result, the handshake in the AXI protocol between the performance control device 10 and the input / output control device 20 (the above read transaction (1) to (5)) is not completed. In the AXI protocol, the master continues to wait until the slave has transferred all of the requested number of unit data and the handshakes (1) to (5) are complete. In the AXI protocol, the transfer cannot be aborted before the specified number of unit data has been transferred. Therefore, when there is a problem with the data transfer between the external storage device 3 and the performance control device 2, the data transfer between the performance control unit 10 and the input / output control device 20 does not end normally, and the performance control unit 10 continues to occupy the AXI bus 206 during the data transfer. As a result, all the performance control units 10 (image control unit 10a, audio control unit 10b, lamp control unit 10c) that attempt to read data from the external storage device 3 are similarly unable to read the data, and are unable to execute the next process. As a result, all communication on the AXI bus 206 stops, and the performance control device 2 can no longer operate normally. The signal lines connecting each component used for communication inside the performance control device 2 are short, so they are less susceptible to noise and data transfer problems are unlikely to occur. However, the signal lines connecting the performance control device 2 and the external storage device 3 are longer than the signal lines used for communication inside the performance control device 2, so they are more susceptible to noise.
[0030] When such a malfunction occurs, conventionally, it has been necessary to perform a process of restarting the entire performance control system (the performance control device 2 and the external storage device 3). Restarting the performance control system involves restarting the external storage device 3, restarting the performance control device 2, and then negotiating communications between the performance control device 2 and external storage device 3 after the restart. After that, the performance control device 2 reads out the performance control program from the external storage device 3. The performance control device 2 then executes the read program to complete startup, and goes into a standby state in which it can receive commands from the main control board 1. This completes the restart of the performance control system. During the restart of the performance control system, no performance image is displayed on the display device 4, and a blackout or blank screen occurs. No sound is output from the sound emitting device 5, and the LED of the lighting device 6 does not light up. As described above, restarting the performance control system takes a relatively long time because it includes, in addition to restarting the external storage device 3 and communication negotiation, the processing until the performance control device 2 enters a reception standby state in which it can receive commands from the main control board 1. Therefore, when the performance control system is restarted, it takes time to restore the performance control system and resume screen display and audio output. In the gaming machine 100, there are cases where impressive effects are performed on the player by going dark on the screen or muting the sound effects, and a blackout caused by restarting the effect control system is undesirable as it may give the player erroneous information.
[0031] Gaming machines that use gaming media are easily affected by external disturbances, and if the screen goes black or there is a long period of silence, it can cause anxiety to the player even if it is not a fatal malfunction. In the present embodiment, when communication with the external storage device 3 is unable to function normally due to an external disturbance, the presentation control device 2 controls the input / output control unit 20 to quickly recover and resume presentation, thereby providing the player with a sense of security. The performance control device 2 controls the performance based on commands from the main control board 1. Therefore, in order to avoid missing any commands from the main control board 1, it is necessary to be able to execute the performance promptly according to the commands from the main control board 1 without restarting the performance control device 2. The configuration of the input / output control unit 20 of this embodiment is suitable for the case of using storage that requires a handshake (performs synchronous communication) with the host, such as an SSD.
[0032] If the storage provided in the external storage device 3 is an SRAM (Static RAM) that transmits data asynchronously at regular intervals, there is no need for a handshake between the external storage device 3 and the performance control device 2. Since no handshake is required, even if there is an effect of noise or the like, the received data is simply corrupted, and there is no problem that the performance control unit 10 that made the request is unable to execute the next process.
[0033] 6 is a diagram for explaining the process performed by the performance control device of this embodiment when there is an influence of a disturbance. FIG. 6 shows control for solving the problem explained in FIG. In the following explanation, it is assumed that there is no disturbance inside the performance control device 2. Also, it is assumed that communication between the performance control device 2 and the external storage device 3 is affected by the disturbance and data is not transferred normally. As in FIG. 4, the input / output control unit 20 acts as a host in SATA communication with the external storage device 3, and acts as a slave in AXI protocol communication with the performance control unit 10. The following description will be given with reference to FIG. When the gaming machine 100 is powered on and communication negotiation between the performance control device 2 and the external storage device 3 is completed, the performance control device 2 reads out the performance control program from the external storage device 3. The performance control device 2 then executes the read program to complete startup and enters a standby state in which it can receive commands from the main control board 1. When the performance control unit 10 receives a command from the main control board 1, it requests performance data according to the AXI protocol from the input / output control unit 20 (S31). Since there is no influence of external disturbance inside the performance control device 2, the performance control unit 10 can make a request to the input / output control unit 20. When a request is received from the performance control device 10, the input / output control unit 20 requests the external storage device 3 to transmit the requested data (S32). At this time, the input / output control unit 20 requests the external storage device 3 to read data for the specified number of unit data from the address specified in the request. Note that the input / output control unit 20 may also request the external storage device 3 to read data for a number of units greater than the specified number of unit data from the address specified in the request. 。 Due to the influence of the disturbance, the controller 3b of the external storage device 3 is unable to transfer the number of unit data items corresponding to the request from the input / output control unit 20 (S33). Therefore, the input / output control unit 20 is unable to properly receive the data requested to be read by the request. The input / output control unit 20 transfers the dummy data of the number of unit data specified in the request to the performance control unit 10 (S34). Entering and exiting The force control unit 20 adjusts the AXI protocol. The size of the dummy data may be, for example, the burst size. However, the size of the dummy data may be any size as long as the performance control unit 10 can recognize that one unit data has been input when one dummy data is input. When the dummy data is input from the input / output control unit 20, the performance control unit 10 discards the dummy data (S35). Then, when the external storage device 3 is restarted, the input / output control unit 20 executes communication negotiation with the external storage device 3 and establishes communication with the external storage device 3 (S36). Note that the order of the processes of S35 and S36 may be in any order. After that, the performance control unit 10 executes the next request to the external storage device 3 again in step S31. Through the above processing, the performance control device 2 of the embodiment enables the performance control unit 10 to execute the next process without rebooting the entire performance control device 2, that is, without executing a system reset.
[0034] The control of the input / output control unit 20 in FIG. 4 and FIG. 6 will be described. As shown in Figure 3, the input / output control unit 20 includes an input / output unit 21, a timing unit 22, and a memory unit 23, and controls monitoring of data input / output between the performance control device 2 and the external memory device 3, and output of dummy data described later. The timer unit 22 measures the time that has elapsed since the input / output unit 21 outputted a data read request to the external storage device 3 . The storage unit 23 has a storage area 23a and a storage area 23b. The memory area 23a stores dummy data, and the memory area 23b stores a request input from the performance control unit 10. When a data request to the external storage device 3 is input from the performance control unit 10, the input / output unit 21 stores the input request in the memory area 23b. Then, the input / output unit 21 outputs a read request for the requested data to the external storage device 3.
[0035] When there is no influence of external disturbance and a specified number of data are read from the external storage device 3 within a certain time after outputting a read request, the input / output unit 21 outputs the read data to the performance control unit 10 that made the data request. For example, if the request was made by the image control unit 10a, the read data is output to the image control unit 10a. If the specified number of data items are not read from the external storage device 3 within a certain time after the read request is output due to the influence of an external disturbance, the input / output unit 21 reads dummy data from the memory area 23a and outputs the specified number of dummy data items and an error notification to the performance control unit 10 that made the data request. For example, if the image control unit 10a has made a data request, dummy data and an error notification are output to the image control unit 10a. The production control unit 10 discards the input dummy data due to the error notification being input, and the production control unit 10 does not use the dummy data for production.
[0036] The dummy data may be any data, such as a random value or a fixed value, as long as the data can be identified as dummy data by the performance control unit 10, and the performance control unit 10 does not care about the contents of the data. Notification of an error is not required. The dummy data may be, for example, all-zero data. What is important is the number of dummy data items returned to the performance control unit 10 in order to establish the AXI protocol. If the required number of tummy data are generated randomly, the storage unit 23 does not need to have the storage area 23a.
[0037] FIG. 7 is a flowchart showing the process performed by the input / output control unit of this embodiment. The processing of the input / output control unit can be executed by the input / output control circuit 202 or the general control device 205. In the following explanation with reference to Fig. 7, it is assumed that a read request for image data is made from the image control unit 10a. In step S101, the input / output unit 21 of the input / output control unit 20 determines whether or not a request for image data has been input from, for example, the request unit 11a of the image control unit 10a. When the input / output unit 21 determines that a request has been input from the request unit 11a (Yes in step S101), the input / output unit 21 stores the input request in the storage unit 23 in step S102. In step S103, the input / output unit 21 outputs a read request to the external storage device 3 via the memory I / F 204.
[0038] After outputting the read request to the external storage device 3, the timer section 22 of the input / output control section 20 starts timing in step S104. In step S105, the timer unit 22 determines whether a certain time has elapsed since the start of timing. If it is determined that the certain time has not elapsed (No in step S105), the input / output unit 21 of the input / output control unit 20 determines in step S106 whether a response has been received from the external storage device 3, i.e., whether the number of data items specified in the request have been read from the external storage device 3. If it is determined that the number of data items specified in the request has not been read out (No in step S106), the input / output control unit 20 returns the process to step S105 and determines whether or not a certain period of time has elapsed. If it is determined that the specified number of data items have been read out (Yes in step S106), input / output unit 21 outputs the read out data items to image control unit 10a in step S107, ends the time measurement in step S109, and ends the current process. The image control unit 10a renders an image using the image data acquired from the external storage device 3, and displays the image on the display device 4.
[0039] If it is determined that a certain amount of time has elapsed without the specified number of data being read out (Yes in step S106), the input / output unit 21 outputs the same number of dummy data as the specified number to the image control unit 10a in step S108, ends the timing in step S109, and ends the current processing. The image control unit 10a discards the acquired dummy data, and outputs to the display device 4, for example, an image that has been previously drawn (for example, a previous frame) and that is stored in a frame buffer.
[0040] As explained above, there was a problem in that data was not transferred normally due to disturbances such as electrostatic noise, and data requested by each performance control unit 10 of the performance control device 2 was not transmitted from the external storage device 3, and the performance control unit 10 that made the request continued to wait for the data. This was because, under the AXI protocol, a request once made cannot be canceled. When this happened, it was necessary to restart the entire performance control system, which includes the performance control device 2 and the external storage device 3 (a system reset). In contrast, according to this embodiment, the request is completed without any problem in terms of the protocol by inputting and outputting dummy data. Therefore, the performance control unit 10 that made the request does not continue to wait for data. By simply restarting the external storage device 3 and negotiating communication between the performance control device 2 and the external storage device 3, the performance control system can be restored and the performance requested by the main control board 1 can be performed. There is no need to restart the entire performance control device 2, and each performance control section can continue processing. If necessary, only the performance control section that made the request may be partially restarted. The time required to restart the entire performance control device 2 is no longer necessary, and the time it takes for the performance control system to restore normal operation can be reduced.
[0041] Also, in this embodiment, for example, in the case of the image control unit 10a, in order to recover from a malfunction, the drawn image remaining in the frame buffer may be output to the display device 4 while the external storage device 3 is being restarted and communication negotiation is being performed between the performance control device 2 and the external storage device 3. To the player, the game screen or the standby screen appears to freeze for a short time, but this reduces the sense of incongruity felt by the player compared to when no image is displayed on the display device 4. The same applies to the processing of the sound control unit 10b and the lamp control unit 10c. In particular, in the case of the audio control unit 10b, while the external storage device 3 is being restarted and communication negotiation is being performed between the performance control device 2 and the external storage device 3, the audio data that has been processed for playback and remains in the cache memory may be output to the sound emission device 5. Although the player will hear the same sound continuously, this reduces the sense of discomfort felt by the player compared to when no sound is output from the sound emitting device 5 and there is silence.
[0042] FIG. 8 is a block diagram illustrating an embodiment of a computing device. The configuration of the computer device 300 will be described with reference to FIG. 8, computer device 300 includes a control circuit 301, a storage device 302, a reading / writing device 303, a recording medium 304, a communication interface 305, an input / output interface 306, an input device 307, and a display device 308. The communication interface 305 is connected to a network 309. The components are connected by a bus 310. The main control board 1, the performance control device 2, and the external storage device 3 can be configured by appropriately selecting some or all of the components described in computer device 300. The control circuit 301 controls the entire computer device 300. The control circuit 301 is a processor such as a central processing unit (CPU), a multi-core CPU, a field programmable gate array (FPGA), or a programmable logic device (PLD). And the control circuit 301 functions as, for example, the performance control unit 10 and the input / output control unit 20 in FIG.
[0043] The storage device 302 stores various data. The storage device 302 is, for example, a memory such as a Read Only Memory (ROM) and a Random Access Memory (RAM), or a non-temporary recording medium such as a Hard Disk (HD) and a Solid State Drive (SSD). The storage device 302 functions as, for example, the storage unit 23 in FIG. 3. The ROM also stores programs such as a boot program. The RAM is used as a work area for the control circuit 301. The HD stores programs such as the OS, application programs, and firmware, as well as various data. When performing various processes, the performance control device 2 reads out the performance control program stored in the storage device 302 into the RAM. By executing the performance control program read out into the RAM in the control circuit 301, the performance control device 2 executes processes including one or more of request processing, image processing, audio processing, lighting processing, input / output processing, and timing processing. Note that the performance control device 2 may also execute processes including one or more of request processing, image processing, audio processing, lighting processing, input / output processing, and timing processing by reading out the performance control program from the external storage device 3 and executing it. Each of the above-mentioned programs may be stored in a storage device of a server on the network 309 as long as the control circuit 301 can access the programs via the communication interface 305 .
[0044] The reading / writing device 303 is controlled by the control circuit 301 and reads / writes data from / to a removable recording medium 304. The reading / writing device 303, for example, communicatively connects the performance control device 2 and the storage device 3. The reading / writing device 303 is, for example, a FDD (Floppy Disk Drive), a CDD (Compact Disc Drive), a DVDD (Digital Versatile Disk Drive), a BDD (Blu-ray (registered trademark) Disk Drive), a USB (Universal Serial Bus), a SATA, or the like. Various data is stored in the recording medium 304. The recording medium 304 may store, for example, a processing program for a performance control device. The performance control program includes one or more of input / output processing and timing processing. The recording medium 304 is connected to the bus 310 via the reading / writing device 303, and the control circuit 301 controls the reading / writing device 303 to read / write data. Furthermore, the recording medium 304 is a non-transitory recording medium such as, for example, an SD memory card, a floppy disk (FD), a compact disc (CD), a digital versatile disk (DVD), a Blu-ray (registered trademark) disk (BD), or a flash memory.
[0045] The communication interface 305 connects the computer device 300 to other devices via the network 309 so that they can communicate with each other. The communication interface 305 may also include an interface having a wireless LAN function and an interface having a short-range wireless communication function. The wireless LAN interface may support, for example, Wi-Fi (registered trademark) as a wireless LAN standard. The short-range wireless interface may support, for example, Bluetooth (registered trademark) as a short-range wireless communication standard. LAN is an abbreviation for Local Area Network.
[0046] The input / output interface 306 is connected to, for example, an input device 307, and when a signal indicating various information is input from the connected input device 307, the input / output interface 306 outputs the input signal via a bus 310 to the control circuit 301. Furthermore, when a signal indicating various information output from the control circuit 301 is input via the bus 310, the input / output interface 306 outputs the signal to various devices connected thereto. The input device 307 is, for example, a keyboard, a mouse, or a touch panel. The display device 308 displays various information. For example, the display device 308 displays an image drawn by the performance control device 2. The display device 308 may display information for receiving input from a touch panel. The display device 308 functions as the display device 4 in FIG. 1, for example. The input / output interface 306, the input device 307, and the display device 308 may function as a GUI (Graphical User Interface), which allows the computer device 300 to receive intuitive operations using a touch panel, a mouse, or the like. The network 309 may be, for example, a LAN, wireless communication, or the Internet, and communicatively connects the computer device 300 to other devices.
[0047] This embodiment is not limited to the embodiment described above, and various configurations or embodiments can be adopted without departing from the gist of this embodiment. [Explanation of symbols]
[0048] 1 main control board, 2 performance control device, 3 storage device, 4 display device, 5 sound emission device, 6 lighting device, 10 performance control unit, 20 input / output control unit, 21 input / output unit, 22 timing unit, 23 storage unit, 40 overall control unit, 100 gaming machine, 201 performance control circuit, 202 input / output control circuit, 203 storage device, 204 memory interface, 205 overall control device, 206 AXI bus
Claims
1. In a gaming machine having a main control device and a performance control device that controls performance, The performance control device includes: A first control unit and a second control unit are included, and the performance control device performs synchronous communication with a storage device externally connected to the performance control device, The first control unit is A read request that specifies read data to be read from the storage device is output to the second control unit, and a process of controlling the performance based on the read data is executed; the read request output by the first control unit includes a designation of the number of pieces of the read data, The second control unit is outputting the read request input from the first control unit to the storage device; When a number of data items corresponding to the number specified in the read request have been read from the storage device within a certain period of time, the read data items are output to the first control unit that output the read request; when the number of data items specified in the read request is not read from the storage device within the certain period of time, outputting dummy data items corresponding to the number of data items to the first control unit which has output the read request; A gaming machine characterized by:
2. 2. The gaming machine according to claim 1, The number is information indicating how many bus widths connecting the first control unit and the second control unit the read data corresponds to. A gaming machine characterized by:
3. 2. The gaming machine according to claim 1, When the first control unit receives the dummy data from the second control unit, the first control unit discards the dummy data. A gaming machine characterized by:
4. 2. The gaming machine according to claim 1, The second control unit stores the read request input from the first control unit in a storage unit. A gaming machine characterized by:
5. 2. The gaming machine according to claim 1, The second control unit stores pre-created dummy data in a storage unit, outputting the dummy data stored in the storage unit to the first control unit; A gaming machine characterized by:
6. 2. The gaming machine according to claim 1, the second control unit outputs, together with the dummy data, information indicating that an error has occurred in reading the data from the storage device to the first control unit; A gaming machine characterized by:
7. A control method for a performance control device that controls a performance, The performance control device performs synchronous communication with a storage device externally connected to the performance control device, storing in a storage unit a read request that specifies the data to be read from the storage device and also specifies the number of the data to be read; outputting the read request to the storage device; When the number of data items specified in the read request is read from the storage device within a certain period of time, outputting the read data items; when the data corresponding to the number specified in the read request is not read from the storage device within the certain period of time, outputting dummy data corresponding to the number. A control method comprising:
8. A program for causing a processor to execute a control method for a performance control device, The performance control device performs synchronous communication with a storage device externally connected to the performance control device, The processor, storing in a storage unit a read request that specifies the data to be read from the storage device and also specifies the number of the data to be read; outputting the read request to the storage device; When the number of data items specified in the read request is read from the storage device within a certain period of time, outputting the read data items; when the data corresponding to the number specified in the read request is not read from the storage device within the certain period of time, outputting dummy data corresponding to the number. A program characterized by:
9. An information processing device including a control device, the control device includes a first control unit and a second control unit, and performs synchronous communication with a storage device externally connected to the control device; The first control unit is outputting a read request specifying read data to be read from the storage device to the second control unit, and executing information processing based on the read data; the read request output by the first control unit includes a designation of the number of pieces of the read data, The second control unit is outputting the read request input from the first control unit to the storage device; When a number of data items corresponding to the number specified in the read request have been read from the storage device within a certain period of time, the read data items are output to the first control unit that output the read request; when the number of data items specified in the read request is not read from the storage device within the certain period of time, outputting dummy data items corresponding to the number of data items to the first control unit which has output the read request; 23. An information processing apparatus comprising:
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