Information processing device, information processing method, and program

Abstract

[Problem] To obtain a good solution at high speed. [Solution] This information processing device is provided with a storage circuit and a processing circuit. The processing circuit transforms, into a first logical model, a first input model that is an optimization target, and transforms the first logical model into a first physical model that is a format executable in hardware for executing optimization.

Description

[Technical field]

[0001] The present disclosure relates to an information processing device, an information processing method, and a program. [Background technology]

[0002] In recent years, research and development of quantum computing has become active. In the field of quantum computing, the development of an optimization solver called a quantum annealing Ising machine has been remarkable. This optimization solver is being developed in both hardware and software. For example, optimization hardware based on quantum characteristics and optimization software that mimics quantum characteristics are being developed widely. Each quantum annealing Ising machine has a set format of optimization problems that it can handle, and in order to use the solver, it is necessary to formulate the objective function as an optimization problem in the QUBO (Quadratic Unconstrained binary Optimization) format or the Ising format. This format depends on the hardware and software.

[0003] For this reason, currently, in order to use these quantum annealing Ising machines, users must take the following steps. First, a model (input model) must be constructed. For example, the construction of a model is realized by assembling a formula for a cost function and organizing constraints between variables. Next, the input model must be converted into a format (physical model) that can be executed by the Ising machine. This conversion requires that an execution machine is determined and then the input model is converted based on the use of the execution machine. In practice, by embedding a state into a graph, a process to accommodate the physical graph constraints is executed, and at the same time, a correspondence relationship between the input variables of the input model and the physical variables of the physical model must be constructed. Then, the results output from the Ising machine must be analyzed. Since the Ising machine outputs physical variables that are the results of the physical model, it is necessary to perform an inverse conversion of the correspondence relationship between the physical variables and the input variables. At this time, work such as checking whether the constraint equation is satisfied and discarding solutions that do not satisfy the constraint equation occurs.

[0004] Thus, Ising machines have been widely studied, but in order to execute optimization realized by general-purpose machines on an Ising machine, specialized and deep knowledge is required, such as encoding to QUBO variables, embedding constraints in the input model into the QUBO format, and interpreting the results of the QUBO format output from the Ising machine. Today, optimization solvers are provided by various companies and research institutes, but each has its own unique usage method such as an interface, the problem scale that can be solved, the need for unique graph embedding, etc., and each requires specialized knowledge. For example, if you want to compare the performance of an optimization problem on Ising machines provided by multiple companies, you need to generate models separately for all the hardware, and the cost of this conversion is very high. In addition, there is also the problem that it is difficult to commonize improvements to programs and algorithms, such as when creating individual programs or making improvements closed to each hardware, which cannot be applied to other hardware. Summary of the Invention [Problem to be solved by the invention]

[0005] The present disclosure provides an information processing device for appropriately utilizing various optimization solvers without requiring specialized knowledge. [Means for solving the problem]

[0006] According to one embodiment, an information processing apparatus includes a storage circuit and a processing circuit that converts a first input model to be optimized into a first logical model, and converts the first logical model into a first physical model that is executable on hardware that performs the optimization. [Brief description of the drawings]

[0007] [Figure 1] FIG. 1 is a block diagram of an information processing apparatus according to an embodiment. [Diagram 2]FIG. 13 is a diagram showing an example of converting the connections of a graph in the QUBO format into a physical model according to an embodiment. [Diagram 3] 10 is a flowchart showing an example of processing of an information processing device according to an embodiment. [Figure 4] FIG. 1 is a diagram showing an example of implementation of an information processing device according to an embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] The contents of some embodiments will be described below with reference to the drawings. Note that the embodiments shown below are shown as non-limiting examples, and the configurations and the like are not limited to these. In this disclosure, terms such as "greater than" and "less than" are sometimes used, but these are not strictly limited to these terms, and may be appropriately read as "greater than" and "less than", or vice versa. In addition, as an embodiment, conversion of data in QUBO format will be described as an unlimited example, but the contents of this disclosure also include realizing similar processing for data in other formats such as Ising format.

[0009] FIG. 1 is a block diagram of an information processing device according to an embodiment. The information processing device 1 includes an input / output interface 100, a storage unit 102, a first conversion unit 104, a second conversion unit 106, a second inverse conversion unit 108, and a first inverse conversion unit 110. The information processing device 1 converts an input model to be optimized into a physical model in a format applicable to a solver (hardware) that performs optimization. However, depending on the Ising machine, the format of the logical model may be applicable as is, and conversion to a physical model may not be necessary. In that case, the logical model and the physical model are considered to be the same. In addition, the physical model optimized by the solver (hardware) is converted into an input model in a format understandable by the user. That is, the information processing device 1 according to an embodiment operates as middleware that converts an input model in the format of a problem described by a user into a physical model corresponding to various Ising machines, and converts a physical model output from the Ising machine into a format of an input model understandable by a user and outputs the input model.

[0010] The storage unit 102 stores various data necessary for the operation of the information processing device 1. The storage unit 102 may include a non-temporary and / or temporary device. When software-based information processing is specifically realized using hardware resources in the information processing device 1, the storage unit 102 may store programs and the like necessary for this realization. Even if not explicitly stated in the following description, writing of data to the storage unit 102 and reading of data from the storage unit 102 are appropriately performed in each process of the information processing device 1.

[0011] The first conversion unit 104 converts the input model input via the input / output interface 100 into a logical model, which is a description format common to various Ising machines.

[0012] The second conversion unit 106 converts the logical model into a physical model in a format that allows the optimization to be performed by an Ising machine on which the optimization is performed.

[0013] The physical model converted by the second conversion unit 106 is input to an Ising machine 2 provided outside or inside the information processing device 1, quantum annealing and the like is executed in the Ising machine 2, and the physical model optimized by the Ising machine 2 is output to the second inverse conversion unit 108. Various types of Ising machines are envisioned as this Ising machine 2. If the Ising machine describes a method of converting a logical model to a physical model, it is envisioned that the type of Ising machine to be used can be stored in the storage unit 102, allowing the user to freely switch the Ising machine 2 that performs optimization.

[0014] The second inverse conversion unit 108 converts the optimized physical model into a logical model.

[0015] The first inverse conversion unit 110 converts the logical model into an input model, and outputs the result to the outside via the input / output interface 100 or to the storage unit 102.

[0016] The input model is a format in which the user optimizes the problem. This input model is a problem representation that is easy for the user to handle. The input model is expressed in a format such as a high-order polynomial, a constraint equation, a matrix, or a logical formula. By using the input model, the user can intuitively formulate the problem that he or she wants to solve. Note that the input model is not limited to the above, and is not limited to the format such as the polynomial given as an example, as long as the conversion to the QUBO format and the inverse conversion are appropriately defined.

[0017] The logical model is, for example, an expression of an objective function and constraints in the QUBO format, which is a problem format that can be handled by a quantum annealing Ising machine. The objective function and one or more constraints are each expressed as a combination of QUBO expressions. This logical model is a format that does not take into account limitations such as hardware resources, and can be executed on ideal hardware with no input limitations, execution speed limitations, etc.

[0018] A physical model is a problem representation that can actually be executed on various hardware. When executing quantum annealing, hardware-dependent constraints may be required. These constraints include, for example, the range of coefficient parameters, resolution, and interaction relationships between variables, such as special graph names (e.g., Chimera graph, Pegasus graph). When such constraints exist, it is necessary to further convert the optimization problem from the QUBO format of the logical model.

[0019] The information processing device 1 makes it easy for the user to define the optimization problem by using this input model as the user's input. Furthermore, the information processing device 1 makes it possible to convert the optimization problem into an appropriate physical model that depends on hardware by passing through a logical model in the conversion from the input model to a physical model.

[0020] Next, the conversion in each conversion unit will be described in detail using non-limiting specific examples.

[0021] First, the user codes the problem to be optimized using an input model. This input model can be in any format that can be appropriately described for conversion to and from the QUBO format described above.

[0022] The first conversion unit 104 converts this input model into a QUBO format that is used as a logical model.

number

[0023] In this disclosure, the QUBO format is used as the format for the logical model, but the Ising format shown below can also be used in the same way.

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[0024] The first conversion unit 104 generates a logical model based on the conversion rules from the input model to the QUBO format. This conversion is called the first conversion. In other words, the first conversion represents the conversion from the input model to the logical model.

[0025] The correspondence between the input model and the logical model can be expressed by making the index correspondence between variables correspond to the keys and values ​​in a dictionary format. Below are some concrete examples of the first transformation method and the first dictionary that is the dictionary in the first transformation.

[0026] A case where the input model is expressed by a quadratic polynomial will be described.

number

number

[0027] Considering the convenience of the user, it is desirable to leave the user-defined variables as they are. On the other hand, internally, they can be defined as two variables. To simplify the implementation, such an input model is transformed using variables q'1 and q'2 of the logical model as shown below, taking into consideration the possibility of reassigning the index of the logical model from 0.

number

number

[0028] A case where the input model is expressed by a high-order polynomial will be described.

number

[0029] Therefore, after associating q1 with q'0, q2 with q'1, and q3 with q'2, the following transformation is performed using the auxiliary variable q'3 = q'0q'1 in the logical model and the function f'2 of the logical model.

number

number

[0030] By performing such a formula transformation involving the introduction of q'3, it is possible to transform an input model containing third-order or higher terms into the QUBO format, which is a representation of a second-order polynomial.

number

[0031] The dictionary can be expressed as equation (10), where q'3 is a binary variable that does not appear in the input model, and is therefore not included in the transformation dictionary.

[0032] The case where there is an equality constraint will be described.

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[0033] This constraint by equality cannot be clearly handled in the QUBO format. Therefore, we correspond q1 to q'0 and q2 to q'1, and transform the function that gives a penalty when the equality condition is not satisfied into the penalty function g' of the logical model.

number

number

[0034] In this case, the conversion dictionary between the input model and the logical model can be expressed as in formula (13). Although the contents related to the conversion between g'1 and g1 are not included in the dictionary, the above formula can be used to express constraints.

[0035] The case where there is an inequality constraint will be described.

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[0036] This inequality constraint cannot be clearly handled in the QUBO format. Therefore, after mapping q1 to q'0, q2 to q'1, and q3 to q'2, we define a function that gives a penalty when the equality conditions are not satisfied using the auxiliary variables q'3 and q'4 of the logical model. For example, we define the penalty function g'2 of the following logical model to transform the above inequality constraint.

number

[0037] When formula (14) is satisfied, by appropriately defining q'3 and q'4, the value of g'2 can be made 0. On the other hand, when formula (14) is not satisfied, the value of g'2 cannot be made 0 no matter how q'3 and q'4 are defined, and therefore g'2 can be treated as a penalty function in the logical model for expressing formula (14).

number

[0038] The conversion dictionary between input models and logical models can be expressed as in formula (16). The contents related to the conversion of g'2 and g2 are not included in the dictionary, as in the case of equality constraints.

[0039] By following the above formulas (3) to (16), the input model defined by the user can be appropriately converted into a logical model. Even if the input model is expressed in other formats such as a matrix or a logical formula, it is possible to convert it into a logical model by appropriately defining a conversion dictionary using the same method as above.

[0040] By defining such conversion rules and applying them to the input model, the first conversion unit 104 can appropriately convert the input model into a logical model. This first conversion unit 104 also makes it possible to apply formulation techniques specific to the kernel problem format of the input model without the user being aware of them. Generally, this conversion into a logical model incurs a large cost for the user, so the user will benefit greatly from the viewpoint of reducing this cost.

[0041] Next, the first inverse transformation, which is the inverse transformation of the first transformation, will be described. This first inverse transformation is executed by the first inverse transformation unit 110. Basically, the first inverse transformation is performed by creating a dictionary in which the keys and values ​​of the above dictionary are inverted, so that the variable q' i and the value of the input model variable q i For example, the inverse transformation of {2: 0, 3: 1} shown in the quadratic polynomial example is

number

[0042] The functions used in the inverse transformation between the input model and the logical model other than the variable transformation will be explained.

[0043] In the QUBO format, the objective function and constraints must be combined into a single function. On the other hand, the logical model is expressed by separating the objective function and constraints. By explicitly dividing the constraint portion, it becomes possible to determine after optimization whether the variables of the logical model obtained by executing optimization satisfy the constraints. Solutions that violate the constraints are generally unnecessary. For this reason, from the perspective of user convenience, it is very meaningful to be able to obtain only solutions that satisfy the constraints.

[0044] The first inverse conversion unit 110 corrects the solution as necessary by removing solutions that violate the constraint conditions or by performing post-processing using a different technique to obtain an appropriate solution.

[0045] For the variables of the logical model for which optimization has been completed, post-processing may be performed for the purpose of further improving performance and correcting solutions that violate constraints. This performance improvement may be realized based on a commonly realized method.

[0046] In this way, a dictionary for the first inverse transformation can be generated by performing transformation using a dictionary in which the keys and values ​​of the dictionary generated in the first transformation are swapped. Furthermore, since the constraint expressions transformed in the first transformation are stored in a state separated from the function to be optimized, it becomes possible to determine whether the constraints are satisfied in the logical model.

[0047] Next, the conversion from a logical model to a physical model will be described using a non-limiting concrete example.

[0048] The second conversion unit 106 executes conversion from the logical model, which is a common format of the optimization target, to a physical model specific to each Ising machine based on resource limitations of various hardware. This conversion is referred to as the second conversion. That is, the second conversion represents conversion from the logical model to a physical model. Similar to the conversion between the input model and the logical model in the first conversion unit 104, the second conversion unit 106 can be expressed using a second dictionary, which is a dictionary describing the correspondence between variables in the logical model and the physical model.

[0049] Even if the problem of the logical model is larger than the problem size that can be handled by the physical model, the second conversion unit 106 converts the problem so that it can be executed by the physical model.

[0050] For example, a logical model problem of size 10000 bits can be expressed as follows:

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[0051] On the other hand, suppose that on some hardware the physical model can only operate up to a size of 2000 bits. In this case, for example, q' 2000 From q' 3999Consider a function in which the above remains a variable and the other 8,000 bits are fixed as constants.

number

[0052] In this example, the variable q' in the logical model i+2000 is the variable p' of the physical model i (0 <= i <= 1999), and the remaining variables are constants, so no correspondence exists. By repeating the optimization while changing the assignment of variables between the logical model and the physical model, it becomes possible to handle problems that go beyond the constraints of the physical model. In this example, the dictionary representing the conversion from the logical model to the physical model can be written as follows:

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[0053] Of course, the dictionary used in the second conversion is different from the dictionary used in the first conversion. For convenience, the first conversion unit 104 executes the first conversion using the first dictionary, and the second conversion unit 106 executes the second conversion using the second dictionary. Also, the first inverse conversion unit 110 executes the first inverse conversion, which is the inverse conversion of the first dictionary, using the first dictionary, and the second inverse conversion unit 108 described below executes the second inverse conversion, which is the inverse conversion of the second dictionary, using the second dictionary.

[0054] Note that each of these conversions may be designed so that conversion and inverse conversion can be appropriately defined, and the form of the dictionary is not important. For example, one dictionary may contain elements of the first dictionary and the second dictionary. Also, as long as conversion and inverse conversion can be appropriately performed, the form is not limited to one that clearly uses a dictionary.

[0055] Next, a case where a graph transformation is executed as the second transformation will be described. In an Ising machine, it is common to express the relationship between variables with non-zero coefficients in a graph in the formulation of the QUBO format. A variable with a non-zero coefficient is, in formula (1), J ij It refers to a combination of variables that is ≠ 0.

[0056] FIG. 2 is a diagram showing a non-limiting example of converting the connection relationship of a graph in the QUBO format to a physical model. The graph shown in the upper figure shows the relationship of variables in the logical model, and the graph shown in the figure shows the relationship of variables in the physical model after conversion. In the graph of the logical model, the vertices are q' i In the graph of the physical model, the vertex is p' i Represents.

[0057] A logical model does not need to impose any particular constraints on the graph. On the other hand, some physical models require that only a special graph format be accepted as the input format for the problem. As an example, the graph conversion shown in FIG. 2 will be described, but other graph formats can also be appropriately converted by the second conversion unit 106 in the same manner.

[0058] In Fig. 2, the logical model has five variables q'1, q'2, q'3, q'4, and q'5. The physical model has a unique 5 × 5 graph format, for example, as shown by the dotted circle (including the solid circle), and each node is represented by p'0, p'1, ​​..., p' 24 For example, it is assumed that the physical model needs to construct a graph using only the nodes and edges indicated by the dotted circles. On the other hand, it is assumed that it is possible to associate multiple physical model nodes with a single logical model node.

[0059] In this example, the graph of the logical model shown in the figure above may be placed at the node indicated by the solid circle in the figure below. This type of conversion is a conversion that creates a one-to-many correspondence between the nodes of the logical model and the nodes of the physical model. More specifically, q'1 and p'6, q'2 and p'7, q'3 and {p' 11 , p' 12 , p' 13}, q'4 and p' 17 , q'5 and p' 18 These transformations can be summarized as the second dictionary shown in equation (21).

number

[0060] In addition, in graph transformation, the interactions of logical models are treated as if they were variables. ij Since there is a one-to-many correspondence between the interactions of the logical model and the corresponding physical model, a dictionary is also prepared for this. In the example of Figure 2, the dictionary for the interactions between the logical model and the physical model can be expressed as follows:

number

[0061] The second conversion unit 106 may further perform parameter tuning specific to the hardware in addition to the conversion according to the hardware resources as described above. For example, optimization for improving the accuracy and speed of calculations differs for each piece of hardware. The second conversion unit 106 may convert the logical model to generate a physical model that improves the accuracy and speed of calculations for each piece of hardware.

[0062] The inverse conversion process for converting a physical model into a logical model can be realized by creating a dictionary in which the keys and values ​​of each of the second dictionaries exemplified above are inverted. The second inverse conversion unit 108 uses this dictionary for inverse conversion to convert the variable p' i and the variable q' in the logical model i Match the following.

[0063] The second inverse conversion unit 108 can also check constraint conditions specific to the physical model and execute correction operations such as post-processing of the obtained solution, in the same manner as described for the first inverse conversion unit 110 .

[0064] In this way, the second conversion unit 106 and the second inverse conversion unit 108 can realize the conversion between the logical model and the physical model.

[0065] As described above, according to the information processing device 1 of this embodiment, by inputting an optimization problem as an input model that is easy for a user to input, a logical model described in a QUBO format or the like, which is a format common to various Ising machines, is automatically generated, and this logical model is converted into a physical model specific to the hardware on which the optimization is performed. Since this conversion is automatically performed by the information processing device 1, even if a user does not have specialized knowledge of individual Ising machines, it is possible to convert into an appropriate optimization model and realize optimization in a quantum annealing Ising machine.

[0066] When an input model is input, the information processing device 1 can operate as middleware that executes optimization in a target Ising machine. In addition, by generating a logical model that is a common description in Ising machines, it becomes possible to generate a physical model appropriate for each Ising machine. Of course, this conversion does not require the user to have specialized knowledge.

[0067] If a user were to use various Ising machines according to the scale and nature of the problem, the user would need to provide a method for connecting to each Ising machine on his or her own. This information processing device 1 greatly benefits the user in that it allows the user to use each Ising machine selectively simply by selecting a physical model for actually optimizing an abstracted logical model.

[0068] The information processing device 1 may be configured to output not only the optimization result but also a logical model and a physical model in, for example, a binary format. For example, by outputting a logical model, it is possible to generate a physical model in a different device based on this logical model. This logical model may be considered to correspond to, for example, an intermediate language. Also, by outputting a physical model, it is possible to perform optimization in an Ising machine at a timing different from the generation of the model, rather than directly performing optimization in the information processing device 1. This physical model may be considered to correspond to, for example, an executable file, etc.

[0069] The following describes the process flow of the information processing device 1 using a flowchart. Each process may be executed according to the non-limiting example described above.

[0070] FIG. 3 is a flowchart showing the process of the information processing device 1 according to an embodiment.

[0071] First, the information processing device 1 acquires an optimization problem that the user wishes to solve in the form of an input model via the input / output interface 100 (S100). The acquired input model may be stored in the storage unit 102 as necessary. In addition, the input model is not limited to being acquired via the input / output interface 100, and an input model previously stored in the storage unit 102 may be used as a target for the optimization problem. This input model representing the optimization problem that the user wishes to solve is referred to as a first input model.

[0072] Next, the first conversion unit 104 converts the first input model into a first logical model by performing the above-mentioned first conversion on the first input model (S102). As described above, the first conversion is performed based on the first dictionary. The information processing device 1 may store the first logical model in the storage unit 102 or output it to the outside via the input / output interface 100 as necessary. This storage and output may be performed when specified by the user, or may be performed automatically.

[0073] Next, the second conversion unit 106 performs a second conversion of the first logical model into a first physical model that is in a format that can be executed by the Ising machine that performs the optimization (S104), with the Ising machine being the target. As described above, this second conversion is performed based on the second dictionary. As with the first logical model, the information processing device 1 may store this first logical model in the storage unit 102 or output it to the outside via the input / output interface 100, as necessary.

[0074] Next, the information processing device 1 transfers the first physical model to the Ising machine 2 (S106). Then, optimization is performed in the Ising machine 2 to which the first physical model, which is in a format that can be calculated, has been input (S200). When the optimization is completed, the Ising machine 2 outputs the second physical model, which is the physical model that has been optimized, to the information processing device 1 (S202).

[0075] When the second physical model is output from the Ising machine 2, the information processing device 1 acquires the second physical model (S108). The information processing device 1 may store this second physical model in the storage unit 102 or output it to the outside via the input / output interface 100, as necessary.

[0076] Next, the second inverse conversion unit 108 acquires a second logical model by performing a second inverse conversion on the acquired second physical model (S110). This second inverse conversion is executed by inverse conversion of the second conversion based on the second dictionary. As with the second physical model, the information processing device 1 may store this second logical model in the storage unit 102 or output it to the outside via the input / output interface 100 as necessary.

[0077] Next, the first inverse conversion unit 110 converts the second logical model into a second input model in a format to be output to a user (S112). This first inverse conversion is performed by inverse conversion of the first conversion based on the first dictionary. The converted second input model is appropriately stored in the storage unit 102 or output to the outside via the input / output interface 100.

[0078] The function of the information processing device 1 may be to execute either a series of processes from S100 to S106 or a series of processes from S108 to S112. In other words, the information processing device 1 may be capable of realizing only one of the following processes: an operation of converting a first input model representing an optimization problem input by a user into a first physical model in a format that can be executed by a target Ising machine, or an operation of converting a second physical model in a format output from an arbitrary Ising machine into a second input model in a format that can be understood by a user.

[0079] In addition, although one Ising machine 2 is connected in the above embodiment, the present invention is not limited to this. For example, a plurality of Ising machines 2 capable of performing optimization using the same physical model may be connected to perform optimization in parallel.

[0080] As another example, for two or more Ising machines 2 requiring different physical models, a first physical model appropriate for each Ising machine 2 may be generated from the first logical model, and the appropriate first physical model may be output to each Ising machine 2. In this case, the information processing device 1 acquires a second physical model optimized in each Ising machine 2, converts the second physical model according to each format into a second input model understandable to a user, and outputs it.

[0081] In this way, the information processing device 1 in the present disclosure operates as middleware that outputs an appropriate physical model to one or more types of one or more Ising machines 2. In addition, the information processing device 1 operates as middleware that appropriately converts an optimized physical model acquired from the Ising machine 2 into an input model and outputs the input model.

[0082] (Hardware implementation example) 4 is a diagram illustrating an overview of an information processing system 3 according to an embodiment. The information processing system 3 includes, for example, an information processing device 1, external devices 90 and 94, and a network 92. The information processing system 3 is a system that performs optimization using an Ising machine.

[0083] The information processing device 1 includes a processing circuit 10, a memory circuit 12, and an input / output interface 100. These components are connected by a bus 14 that appropriately transmits and receives data between the components.

[0084] The processing circuit 10 is a circuit that executes processing such as arithmetic operations in the information processing device 1. The processing circuit 10 is configured to include a general-purpose processor such as a CPU (Central Processing Unit). Furthermore, the processing circuit 10 may include a processor that operates as a general-purpose accelerator such as a GPU (Graphics Processing Unit). The processing circuit 10 may also be a circuit that executes dedicated processing such as an ASIC (Application Specified Integrated Circuit), or may be a programmable circuit such as an FPGA (Field Programmable Gate Array). These circuits may be configured as digital or analog circuits. The processing circuit 10 may also be a circuit that includes at least two of the above, as long as it is configured to execute information processing appropriately.

[0085] The memory circuit 12 is a circuit that stores data and the like necessary for calculations and the like in the information processing device 1. When the information processing by software is specifically realized using hardware resources by using the processing circuit 10 in the information processing device 1, the memory circuit 12 may store programs, executable files, and the like necessary for executing the software. The memory circuit 12 may include, for example, a main storage device and an auxiliary storage device. In this way, the memory circuit 12 in FIG. 4 may include a storage or the like that stores non-temporary data, and a cache memory such as an SRAM (Static Random Access Memory) that stores temporary data. At least a part of the memory circuit 12 may operate as the above-mentioned memory unit 102.

[0086] As described above, the input / output interface 100 realizes input / output of data to and from the outside of the information processing device 1. For example, the interface 100 may be a device interface connected to an external device 90, or a network interface connected to a network 92. Information received from the interface 100 may be stored in the storage circuitry 12 non-temporarily or temporarily.

[0087] The external device 90 may be, for example, an input user interface such as a mouse or a keyboard, or an output user interface such as a display. The external device 90 may also be a storage device such as a storage connected to the information processing device 1. Furthermore, the external device 90 may be a server, a computer, or the like equipped with a processor that executes part of the processing of the information processing device 1. In this case, the external device 90 may be equipped with a processing circuit such as a CPU or a GPU separate from the information processing device 1, and an appropriate storage circuit, and may be implemented to realize processing independently of or in cooperation with the information processing device 1.

[0088] The network 92 is a wired or wireless network. The information processing device 1 may be connected to an external device 90 via the network 92.

[0089] The external device 94 basically has the same configuration as the external device 90 .

[0090] In the present disclosure, the external devices 90 and 94 may be quantum annealing Ising machines. Although only one each of the external devices 90 and 94 is shown in the figure, the external devices 90 and 94 may include multiple types of multiple quantum annealing Ising machines.

[0091] In the information processing system 3, processing is executed by the information processing device 1, but as described above, processing may be executed in cooperation with external devices 90, 94 in addition to the information processing device 1. For example, processing may be realized by a cluster or the like via a network 92. The above-mentioned embodiment may be realized by the information processing device 1 alone, or may be realized by the information processing system 3 alone including a configuration such as a cluster. In other words, it should be noted that in each of the above explanations, the information processing device 1 may be replaced with the information processing system 3.

[0092] The aspects of the present disclosure are not limited to the above-described embodiments, but include various conceivable modifications, and the effects of the present disclosure are not limited to the above-described contents. The components in each embodiment may be appropriately combined and applied. In other words, various additions, modifications, and partial deletions are possible within the scope of the conceptual idea and intent of the present disclosure derived from the contents defined in the claims and their equivalents. [Explanation of symbols]

[0093] 1: Information processing device; 100: Input / Output interface, 102: Memory section, 104: First conversion unit, 106: Second conversion unit, 108: second inverse transform unit; 110: a first inverse transform unit; 2: Ising machine, 3: Information processing system, 10: Processing circuit, 12: Memory circuit, 14: Bus, 90, 94: external device, 92: Network

Claims

1. An information processing apparatus comprising: a memory circuit; and a processing circuit; and causing at least one target machine among a plurality of target machines to perform optimization by selectively using the plurality of target machines, the processing circuitry is operable to generate a physical model for each of the plurality of target machines; automatically converting a first input model input by a user, which is an object of optimization, into a first logical model having a format common to the plurality of target machines; automatically converting the first logical model into a first physical model that is in a form executable on the hardware of the at least one target machine on which optimization is to be performed; outputting the first physical model for performing an optimization operation on the at least one target machine; Information processing device.

2. The processing circuitry further comprises: outputting the first physical model to the at least one target machine; receiving a second physical model from the at least one target machine on which an optimization operation has been performed using the first physical model; converting the second physical model into a second logical model that is in a format common to the plurality of target machines; converting the second logical model into a second input model for output to a user; The information processing device according to claim 1.

3. The first logical model and the second logical model are hardware-independent models of the multiple target machines generated based on the QUBO format or the Ising format. The information processing device according to claim 2.

4. the first physical model is in a format that performs optimization based on the hardware of the at least one target machine; 4. An information processing device according to claim 1.

5. the conversion of the first input model to the first logical model is performed based on a first dictionary; the transformation from the second logical model to the second input model is performed based on an inverse transformation of the first dictionary.

10. An information processing device according to claim 2, or claim 3 or claim 4 which cites claim 2.

6. the transformation from the first logical model to the first physical model is performed based on a second dictionary; the transformation from the second physical model to the second logical model is performed based on an inverse transformation of the second dictionary. An information processing device according to claim 2 or any one of claims 3 to 5 which cite claim 2.

7. An information processing device according to any one of claims 1 to 6; At least one target machine, an Ising machine; Equipped with the information processing device performs a conversion from the first logical model to the first physical model based on the Ising machine. Information processing system.

8. 1. An information processing method for performing optimization by selectively using a plurality of target machines using a processing circuit capable of generating a physical model for each of the plurality of target machines, the method comprising: automatically converting an input model to be optimized into a logical model having a format common to the plurality of target machines; automatically converting the logical model into a physical model that is in a form executable on hardware of at least one of the target machines that performs the optimization; outputting the logic model for executing an optimization operation on the at least one target machine; Information processing methods.

9. 1. A method for performing optimization using multiple target machines when executed by a processing circuit capable of generating a physical model for each of a plurality of target machines, the method comprising: automatically converting an input model to be optimized into a logical model having a format common to the plurality of target machines; automatically converting the logical model into a physical model that is in a form executable on hardware of at least one of the target machines that performs the optimization; outputting the logic model for executing an optimization operation on the at least one target machine; A program that executes a method.

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