Gaming Machines

Abstract

To provide a game machine in which a factor of abnormality occurrence can be easily identified.SOLUTION: A game machine that performs a lottery on the basis of the satisfaction of a predetermined lottery condition and imparts a game profit on the basis of a result of the lottery includes: specific function activation means that activates a specific function that stops the progress of the game including the lottery when a predetermined count value that can be counted on the basis of the satisfaction of a predetermined counting condition reaches a specific value; and game information output means that can output information related to the game. The game information output means can output information related to the specific function on the basis of the count value. The information related to the specific function includes pre-activation information that is transmitted when the count value reaches a predetermined value smaller than the specific value. The game information output means starts outputting the pre-activation information when the count value reaches the predetermined value.SELECTED DRAWING: Figure 635

Description

[Technical field]

[0001] The present invention relates to gaming machines such as pachinko gaming machines (commonly referred to as "pachinko machines") and slot machine gaming machines (commonly referred to as "pachislot machines"). [Background technology]

[0002] Among gaming machines, typified by pachinko machines, there are those that determine whether or not the player has been excessively supplied with prize media obtained in comparison with the gaming media consumed in a game (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2023-7364 A Summary of the Invention [Problem to be solved by the invention]

[0004] The gaming machine disclosed in Patent Document 1 counts the difference (count value) between the gaming media consumed in the game and the prize media obtained by the player, and determines whether or not there is an oversupply of prize media based on this count value.However, if an abnormality occurs in the gaming machine at the timing when game play is stopped due to an oversupply, there was a risk that problems would arise such as the cause of the gaming machine stopping not being able to be identified.

[0005] The present invention has been made in consideration of the above circumstances, and has an object to provide a gaming machine in which the cause of an abnormality can be easily identified. [Means for solving the problem]

[0006] A gaming machine that draws a lottery based on the establishment of a predetermined lottery condition and awards a gaming profit based on the result of the lottery, A storage means for providing a first storage area used by a first program that controls the progress of a game, and a second storage area used by a second program that performs control not directly related to the progress of a game; A specific function activation means for activating a specific function for stopping the progress of the game including the lottery when a specific count value that can be counted based on the establishment of a specific counting condition reaches a specific value; Gaming Information The external signal is output to the outside of the gaming machine. Can be output to External Signal An output means; Equipped with the specific function activation means executes the second program to enable settings related to activation of the specific function; The above External Signal The output means executes the second program to output information related to the specific function based on the count value. External Signal of external It allows you to set the output to Regarding the specific function External Signal The pre-operation notification is sent when the count value reaches a predetermined value that is smaller than the specific value. signal Includes: The above External Signal The output means is When the count value reaches the predetermined value, signal While starting to output The count value is continuously output until it reaches the specific value, When the count value reaches the specific value, signal Stop the output of Before the operation signal Even if an abnormality is detected in the gaming machine while the signal The output of A gaming machine characterized by: Effect of the Invention

[0008] According to one aspect of the present invention, it is possible to solve the above problem and make it easier to identify the cause of an abnormality occurring in a gaming machine. [Brief description of the drawings]

[0009] [Figure 1] 1 is a front view of a pachinko machine according to one embodiment of the present invention. [Diagram 2] FIG. [Diagram 3] FIG. 1 is a plan view of a pachinko machine. [Figure 4] FIG. 2 is a rear view of the pachinko machine. [Diagram 5] This is a front perspective view of a pachinko machine. [Figure 6] This is a perspective view of a pachinko machine seen from behind. [Figure 7] This is an oblique view of a pachinko machine viewed from the front with the door frame open from the main frame and the main frame open from the outer frame. [Figure 8] This is an exploded oblique view of a pachinko machine viewed from the front, disassembled into a door frame, a game board, a main frame, and an outer frame. [Figure 9] This is an exploded oblique view of a pachinko machine disassembled into a door frame, a game board, a main body frame, and an outer frame, viewed from the rear. [Figure 10] FIG. 2 is a front view showing an example of a game board. [Figure 11] This is an oblique view of the game board from the front right. [Figure 12] This is an oblique view of the game board from the front left. [Figure 13] This is an oblique view of the game board from behind. [Figure 14] This is an exploded perspective view of the game board, broken down into its main components, as seen from the front. [Figure 15] This is an exploded perspective view of the game board disassembled into its main components and viewed from behind. [Figure 16] This is a front view of the game board with the front components and front unit cut at approximately the center in the front-to-back direction within the game area. [Figure 17] 1 is a block diagram showing an outline of the control configuration of a pachinko machine. [Figure 18] FIG. 2 is a diagram showing the internal configuration of the main control MPU. [Figure 19] FIG. 2 is a diagram showing the configuration of an arithmetic circuit in the main control MPU. [Figure 20] FIG. 2 is a diagram illustrating a configuration of a serial communication circuit. [Figure 21] 13 is a flowchart illustrating an example of an initialization process. [Figure 22] 22 is a flowchart showing a continuation of the initialization process in FIG. 21. [Figure 23] 13 is a flowchart illustrating an example of a timer interrupt process. [Figure 24] 13 is a flowchart showing an example of a role object ratio calculation and display process. [Diagram 25] 25 is a flowchart showing the continuation of the role object ratio calculation and display process of FIG. 24. [Figure 26] 2 is a diagram showing an example of the arrangement of programs (codes) and data stored in a ROM and RAM built into the main control MPU. FIG. [Figure 27] A diagram showing the structure of data stored in the reel ratio calculation area. [Figure 28] A diagram showing the configuration of a role ratio display device. [Figure 29] FIG. 2 is a diagram illustrating a configuration of a driver circuit. [Diagram 30] FIG. 4 is a timing diagram of data input to a driver circuit. [Diagram 31] FIG. 2 is a diagram showing an example of a main control board implementation. [Diagram 32] This is a diagram showing the positional relationship between the main control MPU and the reel ratio display. [Diagram 33] FIG. 13 is a diagram showing a load register selection table. [Diagram 34] FIG. 13 is a diagram showing a character generator decode table. [Diagram 35] FIG. 4 is a state transition diagram of a driver circuit. [Diagram 36] FIG. 13 is a diagram showing an example of the display of the role ratio. [Figure 37] FIG. 13 is a diagram showing an example of the display of the role ratio. [Figure 38] 1 is a block diagram showing an outline of the control configuration of a pachinko machine. [Figure 39] 13 is a flowchart showing an example of a base calculation area update process. [Diagram 40]13 is a flowchart showing an example of a base calculation / display process. [Diagram 41] A figure showing an example of the timing of updating the number of prize balls and the timing of calculating the base value. [Diagram 42] A figure showing another example of the timing of updating the number of prize balls and the timing of calculating the base value. [Diagram 43] A figure showing another example of the timing of updating the number of prize balls and the timing of calculating the base value. [Diagram 44] A figure showing another example of the timing of updating the number of prize balls and the timing of calculating the base value. [Diagram 45] A figure showing another example of the timing of updating the number of prize balls and the timing of calculating the base value. [Diagram 46] 13 is a flowchart showing another example of the base calculation area update process. [Figure 47] 13 is a flowchart showing another example of the base calculation and display process. [Figure 48] 13 is a flowchart showing another example of the base calculation area update process. [Figure 49] 13 is a flowchart showing another example of the base calculation and display process. [Figure 50] 13 is a flowchart showing another example of the base calculation area update process. [Figure 51] 13 is a flowchart showing another example of the base calculation and display process. [Figure 52] 13 is a diagram showing a structure of data stored in a base calculation area. FIG. [Figure 53] FIG. 11 is a front view showing another example of a game board. [Figure 54] 13 is a flowchart showing another example of the base calculation area update process. [Figure 55] 13 is a flowchart showing another example of the base calculation area update process. [Figure 56] 13 is a flowchart showing another example of the base calculation and display process. [Figure 57] 13 is a flowchart showing another example of the base calculation and display process. [Figure 58] 13 is a flowchart showing another example of the base calculation and display process. [Figure 59] 13 is a flowchart showing another example of the base calculation and display process. [Figure 60] 10 is a flowchart showing an example of a peripheral control unit power-on process; [Figure 61] 13 is a flowchart showing an example of a peripheral control unit V blank interrupt process. [Figure 62] 13 is a flowchart showing an example of a peripheral control unit 1 ms timer interrupt process. [Figure 63] 13 is a flowchart illustrating an example of a display selection process. [Figure 64] FIG. 11 is a diagram illustrating an example of a display selection table. [Figure 65] FIG. 11 is a diagram illustrating an example of a display selection table. [Figure 66] FIG. 11 is a diagram illustrating an example of a display selection table. [Figure 67] FIG. 11 is a diagram illustrating an example of a display selection table. [Figure 68] FIG. 11 is a diagram illustrating an example of a display selection table. [Figure 69] FIG. 4 is a diagram showing an example of a display screen. [Figure 70] 13 is a flowchart showing another example of the base calculation area update process. [Figure 71] 13 is a flowchart showing another example of the base calculation area update process. [Figure 72] 13 is a flowchart showing another example of the base calculation and display process. [Figure 73] 13 is a flowchart showing an example of a base calculation area update process. [Figure 74] 13 is a flowchart showing another example of the base calculation area update process. [Figure 75] 13 is a flowchart illustrating an example of a timer interrupt process. [Figure 76] 13 is a flowchart showing an example of a base calculation process 1. [Figure 77] 13 is a flowchart showing an example of a base calculation process 2. [Figure 78] 13 is a flowchart showing another example of the base calculation process 1. [Figure 79] 13 is a flowchart showing another example of the base calculation process 2. [Figure 80] 13 is a flowchart showing another example of the timer interrupt process. [Figure 81] 13 is a flowchart showing an example of a base calculation process 3. [Figure 82] 13 is a flowchart showing an example of a base calculation process 4. [Figure 83] 13 is a flowchart illustrating an example of a base display process. [Figure 84] 13 is a flowchart showing another example of the base calculation process 3. [Figure 85] 13 is a flowchart showing another example of the base calculation process 4. [Figure 86] 13 is a flowchart showing another example of the base display process. [Figure 87] 1 is a block diagram showing an outline of the control configuration of a pachinko machine. [Figure 88] A diagram showing the arrangement of the frame side discharged ball sensor. [Figure 89] A diagram showing the arrangement of the frame side discharged ball sensor. [Figure 90] A diagram showing an example of connection between the discharged ball sensor and the main control board. [Figure 91] FIG. 2 is a front view showing an example of a game board. [Figure 92] FIG. 2 is a diagram showing a configuration of a main control input circuit. [Figure 93] FIG. 2 is a diagram showing an example of a main control board implementation. [Figure 94] FIG. 2 is a diagram showing an example of a main control board implementation. [Figure 95] FIG. 2 is a diagram showing an example of a main control board implementation. [Figure 96] FIG. 2 is a diagram illustrating an example of the configuration of a main control I / O port. [Figure 97]FIG. 2 is a diagram illustrating an example of the configuration of a main control I / O port. [Figure 98] FIG. 98 is a timing diagram of an example of the main control I / O port configuration shown in FIG. 97. [Figure 99] FIG. 13 is a diagram showing changes in state (section) for calculating a base value. [Figure 100] 13A and 13B are diagrams illustrating examples of characters displayed on a base display. [Figure 101] 13 is a flowchart illustrating an example of an initialization process. [Figure 102] 102 is a flowchart showing the continuation of the initialization process in FIG. 101. [Figure 103] FIG. 13 is a diagram showing a configuration of a base calculation area. [Figure 104] 13 is a flowchart illustrating an example of a timer interrupt process. [Figure 105] 13 is a flowchart illustrating an example of a base calculation process. [Figure 106] 106 is a flowchart showing the continuation of the base calculation process in FIG. 105. [Figure 107] 13 is a flowchart illustrating an example of a base display data generation process. [Figure 108] 13 is a flowchart showing a modified example of the base calculation process. [Fig. 109] FIG. 13 is a diagram showing the calculation of the base when the game state is switched. [Figure 110] FIG. 13 is a diagram showing the internal configuration of a main control MPU 1311 with respect to a storage area. [Figure 111] FIG. 13 is a diagram illustrating an example of a program for timer interrupt processing and base calculation processing. [Figure 112] FIG. 13 is a diagram illustrating an example of a program for timer interrupt processing and base calculation processing. [Figure 113] 2 is a diagram showing an example of the arrangement of programs (codes) and data stored in a ROM and RAM built into the main control MPU. FIG. [Fig. 114] FIG. 2 is a diagram showing an example of a gaming history recorded in a gaming machine. [Figure 115] FIG. 13 is a diagram illustrating an example of an error screen. [Fig. 116] FIG. 13 is a diagram illustrating an example of an error signal. [Figure 117] FIG. 13 illustrates an example of an error. [Fig. 118] FIG. 13 illustrates an example of an error. [Figure 119] FIG. 13 illustrates an example of an error. [Figure 120] 10 is a flowchart showing an example of a peripheral control unit power-on process; [Figure 121] FIG. 13 is a diagram showing an example of a game history recording condition setting table. [Figure 122] FIG. 2 is a diagram showing an example of a gaming history. [Figure 123] 2 is a block diagram showing the configuration of a peripheral control board and its surroundings. FIG. [Figure 124] FIG. 2 is a block diagram showing the peripheral configuration of a peripheral control SRAM. [Fig. 125] FIG. 13 is a diagram showing a modified example of the game history recording condition setting table. [Fig. 126] FIG. 13 is a diagram showing a modified example of the game history. [Figure 127] FIG. 13 is a diagram showing a modified example of the game history. [Figure 128] FIG. 13 is a diagram showing a modified example of the game history. [Figure 129] A block diagram showing an outline of the control configuration of a pachinko machine having a setting unit. [Fig. 130] This is an oblique view of a pachinko machine having a setting unit, seen from behind with the door open. [Fig. 131] This is an oblique view of the pachinko machine shown in Figure 130 when viewed from behind with the doors closed. [Fig. 132] FIG. 131 is a diagram showing a setting section of the pachinko machine shown in FIG. 130. [Fig. 133] FIG. 13 is a diagram showing a modified example of the setting unit. [Fig. 134] A block diagram showing an outline of the control configuration of a pachinko machine having a setting unit. [Fig. 135] This is an oblique view of a game board having a setting section seen from behind. [Fig. 136]This is an oblique view from behind of a pachinko machine equipped with the game board shown in Figure 135. [Fig. 137] 13 is a flowchart illustrating an example of an initialization process. [Figure 138] 11 is a flowchart showing an example of a setting change process and a setting display process. [Figure 139] 11 is a flowchart showing an example of a setting change process and a setting display process. [Fig. 140] 13 is a flowchart showing an example of a procedure for special symbol and special electric device control processing. [Fig. 141] 13 is a flowchart showing an example of a procedure for waiting for a special pattern change. [Fig. 142] 13 is a flowchart showing an example of a procedure for setting a special symbol variation pattern. [Fig. 143] 13 is a flowchart showing an example of a procedure for a variation pattern selection determination process. [Fig. 144] (A) is an example of a variation pattern table selected when the game state is normal and the result of the special lottery is a miss. (B) is an example of a variation pattern table selected when the game state is normal and the result of the special lottery is a jackpot. [Fig. 145] This is a schematic diagram showing an example of a presentation executed in miss variation patterns 20 and 24 to 29 in the variation pattern table of Figure 144 (A). [Fig. 146] This is an overview diagram showing an example of a presentation executed in miss variation patterns 1, 2, and 30 in the variation pattern table of Figure 144 (A). [Fig. 147] This is an overview diagram showing an example of a presentation executed in miss fluctuation pattern 31 and win fluctuation pattern 34 in the fluctuation pattern table of Figure 144 (A). [Fig. 148] This is an overview diagram showing an example of a presentation executed in miss fluctuation pattern 32 and hit fluctuation pattern 35 in the fluctuation pattern table of Figure 144 (A). [Figure 149](A) is an example of a variation pattern table selected when the game state is in the time-saving state and the result of the special lottery is a miss. (B) is an example of a variation pattern table selected when the game state is in the time-saving state and the result of the special lottery is a jackpot. [Fig. 150] FIG. 2 is a diagram showing an example of a main control board implementation. [Fig. 151] FIG. 13 is a diagram showing another implementation example of the main control board. [Fig. 152] This is a cross-sectional view taken along line A-A' in Figure 151(B). [Fig. 153] FIG. 13 is a diagram showing another implementation example of the main control board. [Fig. 154] 13 is a flowchart illustrating an example of an initialization process. [Fig. 155] 13 is a flowchart illustrating an example of a timer interrupt process. [Fig. 156] 13 is a flowchart illustrating an example of a setting confirmation process. [Fig. 157] FIG. 4 is a timing diagram of a security signal. [Fig. 158] 13 is a flowchart showing another example 4942 of the initialization process. [Fig. 159] 13 is a flowchart showing another example of the setting confirmation process. [Fig. 160] 13 is another example of a fluctuation pattern table. [Fig. 161] 13 is an example of a final reserved color table. [Fig. 162] This is an example of a table showing the appearance rate of each final reserved color for each fluctuation pattern of setting 1 when the fluctuation pattern is determined by the fluctuation pattern table of Figure 160 and the final reserved color is determined by the final reserved color table of Figure 161. [Fig. 163] This is an example of a table showing the appearance rate of each final reserved color for each fluctuation pattern of setting 3 when the fluctuation pattern is determined by the fluctuation pattern table of Figure 160 and the final reserved color is determined by the final reserved color table of Figure 161. [Fig. 164]This is an example of a table showing the appearance rate of each final reserved color for each fluctuation pattern of setting 5 when the fluctuation pattern is determined by the fluctuation pattern table of Figure 160 and the final reserved color is determined by the final reserved color table of Figure 161. [Fig. 165] 13 is an example of a preview performance table. [Fig. 166] 13 is an example of a dialogue production table. [Fig. 167] This is another example of a preview performance table. [Fig. 168] This is an example of a setting suggestion performance table. [Fig. 169] An explanatory diagram showing an example of an overview of the setting suggestion presentation. [Fig. 170] An explanatory diagram showing an example of an outline of a setting suggestion effect as a pre-reading effect. [Fig. 171] (A) is an example of a performance restriction table in the setting confirmation mode, and (B) is an example of a performance restriction table when an error occurs. [Fig. 172] 13 is an example of a new start winning performance restriction table. [Fig. 173] 2 is an example of a processing table 1. [Fig. 174] 2 is an example of a processing table 2. [Fig. 175] 2 is an example of a processing table 3. [Fig. 176] 2 is an example of a processing table 4. [Fig. 177] 2 is an example of a processing table 5. [Fig. 178] 2 is an example of a processing table 6. [Fig. 179] 13 is a flowchart of a power-on process in the first modification. [Fig. 180] 13 is a flowchart of a power-on process in the first modification. [Fig. 181] 13 is a flowchart of a timer interrupt process according to a first modification; [Fig. 182] 13 is a flowchart of a timer interrupt process according to a first modification; [Fig. 183] 13 is a flowchart of a performance display process according to a first modified example. [Fig. 184] FIG. 13 is a diagram showing a notification mode of the first modified example. [Fig. 185] FIG. 11 is a diagram showing notification priorities in a first modified example. [Fig. 186] 13 is a flowchart of a power-on process in the first modification. [Fig. 187] 13 is a flowchart of a power-on process in the first modification. [Fig. 188] 13 is a flowchart of the main processing on the main control side in the first modified example. [Fig. 189] 13 is a flowchart of an initialization process when a RAM abnormality occurs in the first modification. [Fig. 190] 13 is a flowchart of a timer interrupt process according to a first modification; [Fig. 191] 13 is a flowchart of a timer interrupt process according to a first modification; [Fig. 192] 13 is a flowchart of a setting process in the first modified example. [Fig. 193] 13 is a flowchart of a setting display process of the first modified example. [Fig. 194] 13 is a flowchart of a power-on setting process in a first modified example. [Fig. 195] 13 is a flowchart of a random number update process 2 in the modified example 1. [Fig. 196] 13 is a flowchart of a timer interrupt process according to a first modification; [Figure 197] 13 is a flowchart of a switch input process 1 according to a first modified example. [Figure 198] FIG. 198(A) is a diagram showing an example of the configuration of a switch winning information data table of the modified example 1, and FIG. 198(B) is a diagram showing an example of the configuration of a switch input level / edge data area of ​​the modified example 1. [Figure 199] FIG. 199(A) is a diagram showing another example of the configuration of the switch winning information data table of variant 1, and FIG. 199(B) is a diagram showing another example of the configuration of the switch input level / edge data area of ​​variant 1. [Figure 200] 13 is a flowchart of a setting change / confirmation process in the modified example 1. [Figure 201]FIG. 201(A) is a diagram showing a configuration example of a switch input port 2 of the modified example 1, and FIG. 201(B) is a diagram showing a configuration example of a setting state management area of ​​the modified example 1. [Fig. 202] Figure 202(A) is a diagram showing an example of the configuration of a power-on operation command of alternative example 1, Figure 202(B) is a diagram showing an example of the configuration of a power-on state command of alternative example 1, Figure 202(C) is a diagram showing an example of the configuration of a power-on return destination command of alternative example 1, and Figure 202(D) is a diagram showing an example of the configuration of a setting value command of alternative example 1. [Fig. 203] FIG. 11 is a diagram showing a command transmission order in the first modified example. [Fig. 204] FIG. 13 is a diagram showing state transitions of a setting state management area in Modified Example 1. [Fig. 205] 13 is a time chart from the start to the end of a setting change mode in Modified Example 1. [Fig. 206] 13 is a time chart from the start to the end of a setting confirmation mode in Modified Example 1. [Fig. 207] 13 is a time chart from the start to the end of a setting change mode in Modified Example 1. [Fig. 208] 13 is a time chart from the start to the end of a setting change mode in Modified Example 1. [Fig. 209] 13 is a time chart from the start to the end of a setting change mode in Modified Example 1. [Fig. 210] A figure showing an example of the configuration of a jackpot determination threshold table for variant 1. [Fig. 211] A figure showing an example of the configuration of a jackpot determination threshold table for variant 1. [Fig. 212] A figure showing an example of the configuration of a jackpot determination threshold table for variant 1. [Fig. 213] 13 is a flowchart of a power-on process in a second modification. [Fig. 214] 13 is a flowchart of a power-on process in a second modification. [Fig. 215] 13 is a flowchart of a setting value confirmation process of a second modification. [Fig. 216] 13 is a flowchart of the RAM outside the game area confirmation process when the power is turned on in Alternative Example 2. [Fig. 217] 13 is a flowchart of processing when an abnormality occurs in the RAM outside the game area in Example 2. [Fig. 218] 13 is a flowchart of an out-of-use area RWM initialization process according to a second modification; [Fig. 219] 13 is a flowchart of a power-on setting process in a second modification. [Fig. 220] Figure 220(A) is a diagram showing an example of the configuration of a setting status management area in variant 2, Figure 220(B) is a diagram showing an example of the configuration of a power-on operation command in variant 2, and Figure 220(C) is a diagram showing an example of the configuration of a power-on status command in variant 2. [Fig. 221] 13 is a flowchart of the main processing on the main control side in the second modified example. [Fig. 222] 13 is a flowchart of a power-off process in the second modification. [Fig. 223] 13 is a flowchart of a timer interrupt process according to a second modification. [Fig. 224] 13 is a flowchart of a setting process in a second modified example. [Fig. 225] 13 is a flowchart of a setting display process of a second modified example. [Fig. 226] 13 is a flowchart of a power-on process in a third modified example. [Fig. 227] 13 is a flowchart of a power-on process in a third modified example. [Fig. 228] 13 is a flowchart of the main processing on the main control side in the third modified example. [Fig. 229] 13 is a flowchart of a timer interrupt process for a setting change process of Modified Example 3. [Fig. 230] 13 is a flowchart of a timer interrupt process for normal play in Alternative Example 3. [Fig. 231] 13 is a flowchart of the main processing on the main control side in the fourth modified example. [Fig. 232] 13 is a flowchart of a timer interrupt process for a setting change process in the fourth modification example. [Fig. 233] This is an exploded oblique view of the center gimmick and front performance unit of the front unit of the game board, viewed from the front. [Fig. 234]This is a front view showing the first image being illuminated on the front performance unit. [Fig. 235] This is a front view showing the second image being illuminated on the front performance unit. [Fig. 236] 1A and 1B are diagrams illustrating a structure of a light guide plate. [Fig. 237] 5A and 5B are diagrams illustrating a structure of a reflecting portion provided on a light guide plate. [Fig. 238] 5A and 5B are diagrams illustrating a structure of a reflecting portion provided on a light guide plate. [Fig. 239] 1A and 1B are diagrams illustrating a structure of a light guide plate. [Fig. 240] 11A and 11B are diagrams showing examples of images projected onto a light guide plate. [Fig. 241] 11A and 11B are diagrams showing examples of images projected onto a light guide plate. [Fig. 242] 11A and 11B are diagrams showing examples of images projected onto a light guide plate. [Fig. 243] 1A and 1B are diagrams illustrating a structure of a light guide plate. [Fig. 244] 11A and 11B are diagrams showing examples of images projected onto a light guide plate. [Fig. 245] 11 is a diagram illustrating a state in which a picture is displayed by a light guide plate in a plan view. FIG. [Fig. 246] 11 is a diagram illustrating a state in which a picture is displayed by a light guide plate in a plan view. FIG. [Fig. 247] 11A and 11B are diagrams illustrating how a picture that is stereoscopically viewed is displayed by a light guide plate. [Fig. 248] 11A and 11B are diagrams illustrating how a picture that is stereoscopically viewed is displayed by a light guide plate. [Fig. 249] 1A to 1C are diagrams illustrating an example of a display effect using a light guide plate. [Fig. 250] 1A to 1C are diagrams illustrating an example of a display effect using a light guide plate. [Fig. 251] 1A to 1C are diagrams illustrating an example of a display effect using a light guide plate. [Fig. 252] 1A to 1C are diagrams illustrating an example of a display effect using a light guide plate. [Fig. 253] 1A to 1C are diagrams illustrating an example of a display effect using a light guide plate. [Fig. 254] 1A to 1C are diagrams illustrating an example of a display effect using a light guide plate. [Figure 255] 1A to 1C are diagrams illustrating an example of a display effect using a light guide plate. [Fig. 256] 1A to 1C are diagrams illustrating an example of a display effect using a light guide plate. [Fig. 257] FIG. 11 is a circuit diagram of the periphery of the synchronous serial interface of the main control board. [Fig. 258] FIG. 1 is a circuit diagram showing the connection between a serial-parallel conversion circuit and an LED. [Fig. 259] FIG. 2 is a diagram showing the layout of the main control MPU and peripheral components on the main control board. [Fig. 260] FIG. 2 is a diagram showing the arrangement of ports in the main control MPU. [Fig. 261] FIG. 2 is a diagram showing the timing of data output and capture by a synchronous serial signal. [Fig. 262] A diagram showing another arrangement of the main control board in the main control board box. [Fig. 263] A diagram showing another arrangement of the main control board in the main control board box. [Fig. 264] FIG. 1 is a perspective view of a slot machine. [Fig. 265] 1 is an oblique view of the slot machine with the front member open. [Fig. 266] A block diagram showing the configuration of various mechanical elements, electronic devices, operating members, etc. equipped in the slot machine. [Fig. 267] 2 is a diagram showing details of storage areas provided by a ROM, a RAM, etc., and a ROM area in this embodiment. FIG. [Fig. 268] FIG. 2 is a diagram showing details of a RAM area in this embodiment. [Fig. 269] A diagram showing the structure of data stored in the reel ratio calculation area. [Fig. 270] 4 is a diagram showing details of a parameter information setting area in the present embodiment. FIG. [Fig. 271]13 is a flowchart illustrating a procedure of a system reset start-up process executed when the slot machine is reset. [Fig. 272] 13 is a flowchart showing a procedure of a periodic process. [Fig. 273] 13 is a flowchart showing a procedure for an information signal N output process. [Fig. 274] 13 is a flowchart of an initialization process according to a fifth modified example. [Fig. 275] 275 is a flowchart showing the continuation of the initialization process of Alternative Example 5 of FIG. 274. [Fig. 276] 13 is a flowchart showing a timer interrupt process according to a fifth modified example. [Fig. 277] A diagram illustrating an example of winning information transmitted from the main control board to the ball information control board. [Fig. 278] A diagram illustrating an example of a table that defines the number of winning balls corresponding to each winning slot. [Fig. 279] This figure shows an example of when the number of winning balls is included in the winning information, where (A) is the case where the number of winning prizes is tallied for each general winning slot, and (B) is the case where the number of winning prizes is tallied by aggregating all general winning slots. [Fig. 280] FIG. 13 is a diagram showing an example in which winning information is stored in order of winning. [Fig. 281] 13A and 13B show an example of game information transmitted from the main control board to the ball information control board, where (A) is an example of winning information, and (B) is an example of main control recognition information. [Fig. 282] A figure showing another example of game information transmitted from the main control board to the ball information control board. [Fig. 283] A diagram explaining the communication between the main control board and the ball information control board when the gaming machine is started. [Fig. 284] This figure shows a case in which there is no response from the ball information control board to a notification from the main control board in communication between the main control board and the ball information control board. [Fig. 285] This figure shows another example of communication between the main control board and the ball information control board, in which there is no response from the ball information control board to a notification from the main control board. [Fig. 286]A figure showing an example of a memory area allocated to the main control built-in RAM in game control. [Fig. 287] A figure showing an example of a data area included in the input information storage area, where (A) shows the input edge data 1 area (INPUT_EDG1) and (B) shows the prize ball determination area (PAY_JDG_AR). [Fig. 288] 11 is a flowchart showing an example of a procedure for a switch input process for acquiring information detected by a sensor or the like provided in the gaming machine. [Fig. 289] 13 is a flowchart explaining the steps of the process for opening the large prize opening. [Fig. 290] 13 is a timing chart explaining the processing of each component when a gaming ball enters a large prize opening. [Fig. 291] 13 is a timing chart explaining the processing of each component when a gaming ball enters the second starting hole. [Fig. 292] This is a timing chart that explains the processing of each component when a gaming ball enters a variable probability area (V-AT area). [Fig. 293] FIG. 1 is a diagram for explaining an outline of a bit transfer procedure. [Fig. 294] FIG. 13 is a diagram showing an example of the configuration of an instruction code for executing a bit transfer instruction. [Fig. 295] FIG. 11 is a diagram illustrating an example of a type of bit transfer instruction. [Fig. 296] FIG. 13 is a diagram illustrating an example of a flowchart of a process using a bit transfer instruction “RBT.” [Fig. 297] FIG. 296 is a diagram showing an example of a program corresponding to the flowchart of a process using the bit transfer instruction "RBT" (FIG. 296). [Fig. 298] 1 is an example of a flowchart in which the index creation process is made into a subroutine, in which (A) is the process that calls the index creation process, and (B) is the subroutine index creation process. [Figure 299] FIG. 2 is a diagram illustrating an example of a table structure. [Figure 300]FIG. 13 is a diagram for explaining the detailed procedure of a bit transfer command, and is a diagram for explaining a case where a single piece of data is read out from a reference table. [Fig. 301] FIG. 13 is a diagram for explaining the detailed procedure of a bit transfer instruction, and is a diagram for explaining a case where data is continuously read out from a reference table. [Fig. 302] 1A and 1B are diagrams for explaining a bit transfer command for data larger than 1 byte in size, where (A) shows a table to be referenced and (B) explains the procedure. [Fig. 303] 1A and 1B are diagrams illustrating an example of application of a bit transfer command, in which (A) is a diagram illustrating the relationship between a fluctuation pattern and a corresponding range, (B) is program code showing a fluctuation pattern table, and (C) is a diagram illustrating an example of the structure of the table before and after compression for the fluctuation pattern table corresponding to (B). [Fig. 304] 13 is a flowchart showing an example of a procedure for selecting a variation pattern. [Fig. 305] A figure showing an example of a program for selecting a variation pattern. [Fig. 306] A figure showing an example of an address map showing the configuration of the memory area of ​​the main control board of the gaming machine. [Fig. 307] FIG. 13 is a diagram showing an example of a program implementation of a processing address table in which addresses of processes (subroutines) are stored. [Fig. 308] FIG. 13 is a diagram illustrating an example of program code that defines an index for identifying a process stored at an address stored in a process address table. [Fig. 309] FIG. 13 is a diagram for explaining an operation when an INVD command is executed. [Fig. 310] FIG. 13 is a diagram for explaining a procedure for identifying a process to be called by an INVD command. [Fig. 311] FIG. 13 is a diagram illustrating an example of a program for a port read process (PORT_RD). [Fig. 312] FIG. 13 is a diagram illustrating an example of a program for data setting processing (DAT_SET). [Fig. 313]FIG. 13 is a diagram illustrating an example program of work area setting process 1 (WORK_AD). [Fig. 314] FIG. 13 is a diagram illustrating an example program of work area setting process 2 (WORK_AD_INC_HL). [Fig. 315] FIG. 13 is a diagram showing an example of a program for 2-byte data search processing (LD_HLA_HL). [Fig. 316] A figure showing example programs for the jackpot information command setting process (TDINF_CMBF_SET), the command buffer setting process 1 (CMBF_SET1), and the command storage process (COM_SET). [Fig. 317] FIG. 13 is a diagram illustrating an example of a program for output determination common process 1 (OHAN_SUB1). [Fig. 318] FIG. 13 is a diagram illustrating an example of a program for output determination common process 2 (OHAN_SUB2). [Fig. 319] FIG. 13 is a diagram illustrating an example of a program for output port data setting processing (PORT_DAT_SET). [Fig. 320] A figure showing an example program for variable information number search processing (TI_SRCH). [Fig. 321] FIG. 13 is a diagram illustrating an example program of the fraud notification setting process (ILG_OUTSET). [Fig. 322] FIG. 13 is a diagram illustrating an example of a program for data search processing (HLA_SRCH). [Figure 323] FIG. 13 is a diagram illustrating an example of a program for a multiplication value addition address acquisition process (MUL_WA_HL). [Fig. 324] FIG. 13 is a diagram illustrating an example of a program for SPI 2-byte output processing (SPI_TX_WA). [Fig. 325] FIG. 11 shows excerpts of a program that calls processes using the INVS command. (A) shows an excerpt of the program that calls the solenoid drive process and the motor drive process. (B) shows an example program (part) of the solenoid drive process. (C) shows an example program (part) of the motor drive process. [Fig. 326] FIG. 13 is a diagram for explaining the procedure of the INVI command. [Fig. 327]FIG. 1 shows an example of a PSW, where (A) shows the configuration of the PSW and (B) explains each configuration. [Fig. 328] 1A and 1B show example programs for explaining the arrangement of processes called by the INVI command, in which (A) shows an example program of an area from which the processes are read, and (B) shows an example program of the actual processes. [Fig. 329] 11 is a flowchart showing an example of a timer interrupt process using various process calling instructions. [Fig. 330] 13 is a flowchart showing the procedure for processing when a game is stopped during timer interrupt processing. [Fig. 331] 13 is an example of program code for processing when game play stops during timer interrupt processing. [Fig. 332] A figure showing an example of a memory map of an area relating to programs / data in the ROM area of ​​the main control board of a gaming machine. [Figure 333] A figure showing an example of program code for the variation pattern selection process (Hp_select). [Fig. 334] FIG. 2 is a diagram showing an example of a mounting diagram of a main control board of the gaming machine of the present embodiment. [Figure 335] A block diagram of a configuration for performing SPI communication with the main control MPU 1311 of the gaming machine of this embodiment. [Fig. 336] A diagram explaining the operating mode of SPI communication in the gaming machine of this embodiment. [Figure 337] This figure explains the configuration of various registers for setting up SPI communication in the gaming machine of this embodiment, where (A) is control register 1 (SPICNA0), (B) is control register 2 (SPICNA1), and (C) is prescaler registers (SPICPSA0, SPICPSA1, SPICPSA2, SPICPSA3). [Figure 338] 1 is a time chart showing the state from when the gaming machine of this embodiment is initialized to when SPI communication can be started. [Figure 339] 10 is a diagram illustrating a configuration of an SPI communication B buffer register in this embodiment. FIG. [Fig. 340] 13 is a diagram showing an example of SPI common output setting data (SPI_COMTX_B) of the present embodiment. FIG. [Fig. 341] This is a circuit diagram focusing on the configuration for receiving signals via SPI communication in the gaming machine of this embodiment. [Fig. 342] 11 is a flowchart showing an example of a procedure for a switch input process for acquiring information detected by a sensor or the like provided in the gaming machine of the present embodiment. [Figure 343] A figure showing an example of program code for switch input processing in this embodiment, which corresponds to the flowchart in Figure 342. [Fig. 344] 13 is an example of a program code of setting data (SPI input time setting data; SPI_SWRX_B) when starting reception of an input signal through SPI communication in this embodiment. [Figure 345] 13 is an example of a program code of setting data (SPI restart setting data; SPI_RESTART_B) when initializing a communication circuit for SPI communication in this embodiment. [Fig. 346] 4 is a diagram illustrating an example of SPI switch input information data according to the embodiment. FIG. [Figure 347] 4 is a diagram showing an example of the configuration of an area for storing level data and edge data according to the embodiment; FIG. [Fig. 348] 11 is a flowchart illustrating an example of a procedure for SPI twice read processing (TWICE_SPI) according to the present embodiment. [Figure 349] A diagram showing an example of program code for the SPI twice read processing (TWICE_SPI) of this embodiment, which corresponds to the flowchart in Figure 348. [Fig. 350] 5 is a flowchart showing the steps of a level / edge data creation process according to the embodiment. [Fig. 351] A figure showing an example of program code for the level / edge data creation process of this embodiment, which corresponds to the flowchart of Figure 350. [Fig. 352]4 is a time chart showing a process from the start of a switch input process to the completion of data transmission by SPI communication in chronological order according to the present embodiment. [Figure 353] 11 is a time chart showing a process in chronological order from the completion of data transmission by SPI communication to the start of the switch input processing by the next timer interrupt in the switch input processing of this embodiment. [Fig. 354] 13 is a flowchart showing the procedure of a game-playable time process executed in the timer interrupt process of this embodiment. [Figure 355] A figure showing an example of program code for processing when play is possible in this embodiment, and corresponds to the flowchart in Figure 354. [Figure 356] This is a diagram showing an example of a circuit diagram that excerpts the configuration in the gaming machine of this embodiment, from the contact detection sensor (touch sensor) and the firing stop switch (firing stop button) to inputting the signals to the main control MPU. [Figure 357] 5 is a flowchart showing a procedure of a switch-related control process according to the embodiment; [Figure 358] 4 is a diagram illustrating a data structure of history area creation data according to the embodiment. FIG. [Figure 359] FIG. 11 is a diagram showing an example of history area creation data according to the embodiment; [Figure 360] 11 is a diagram showing the configuration of an area (data area) for storing signals input to a main control MPU 1311 in this embodiment. FIG. [Fig. 361] 10 is a flowchart showing a procedure for a history monitoring switch data creation process according to the embodiment; [Fig. 362] This is an example of program code for the history monitoring switch data creation process of this embodiment, and corresponds to the flowchart of Figure 361. [Figure 363] 11 is a diagram illustrating a flow of creating history monitoring switch data according to the present embodiment. FIG. [Fig. 364] 11 is a diagram illustrating a data structure of switch history command transmission determination data according to the embodiment. FIG. [Figure 365]13 is a diagram illustrating an example of switch history command transmission determination data according to the embodiment. FIG. [Fig. 366] 11 is a diagram illustrating an example of switch history command transmission determination data corresponding to input edge data according to the embodiment. FIG. [Figure 367] 11 is a flowchart showing a procedure for a switch history command transmission determination process according to the present embodiment. [Figure 368] This is an example of program code for the switch history command transmission determination process of this embodiment, and corresponds to the flowchart of Figure 367. [Figure 369] FIG. 2 is a diagram illustrating an example of the configuration of an internal function register of a main control MPU of the present embodiment. [Figure 370] A figure showing an example of history area creation data for random number clock errors stored in an internal function register of the main control MPU of this embodiment. [Fig. 371] FIG. 13 is a diagram illustrating an example of applying the switch history command transmission determination data of the present embodiment to an internal function register (random number clock error); [Fig. 372] 4 is a diagram illustrating a data structure of switch passing command data according to the present embodiment. FIG. [Fig. 373] 11 is a diagram illustrating an example of switch passing command data according to the embodiment. FIG. [Fig. 374] FIG. 4 is a diagram illustrating an example of switch address data according to the embodiment. [Figure 375] 13 is a diagram showing another example of switch passing command data according to the embodiment; FIG. [Figure 376] 10 is a flowchart showing a procedure of a switch passing command transmission process according to the present embodiment. [Figure 377] 377 is an example of program code for a switch passing command transmission process according to this embodiment, and corresponds to the flowchart in FIG. 376. [Figure 378] 5 is a flowchart showing the procedure of a safe switch abnormality determination process according to the present embodiment. [Figure 379] This is an example of program code for the safe switch abnormality determination processing of this embodiment, and corresponds to the flowchart of Figure 378. [Figure 380] 4 is a block diagram showing an example of a connection form of connection lines that supply power to various boards that control the gaming machine of the present embodiment. FIG. [Figure 381] 11A to 11C are diagrams showing an example of an operation for executing a setting function of the gaming machine of the present embodiment. [Figure 382] 4 is a flowchart of the processing performed when the gaming machine of this embodiment is turned on. [Figure 383] 6 is a flowchart showing a procedure for a power-on startup confirmation process according to the embodiment; [Figure 384] 11 is a flowchart showing the procedure of a RAM clear determination process according to the present embodiment. [Figure 385] This is an example of program code for the RAM clear determination process of this embodiment, and corresponds to the flowchart in Figure 384. [Figure 386] 5 is a flowchart showing the procedure of a setting value confirmation process according to the present embodiment. [Figure 387] This is an example of program code for the setting value confirmation processing of this embodiment, and corresponds to the flowchart in Figure 386. [Figure 388] 13 is an example of program code corresponding to the definition of a memory area related to a power interruption flag in this embodiment. [Figure 389] 13 is an example of program code corresponding to the definition of setting values ​​related to settings of the gaming machine of this embodiment. [Figure 390] 5 is a flowchart showing the procedure of a setting operation determination process according to the present embodiment. [Figure 391] This is an example of program code for the setting operation determination process of this embodiment, and corresponds to the flowchart of Figure 390. [Figure 392] 5 is a flowchart showing the procedure of a process for determining a disconnection / short circuit anomaly according to the present embodiment. [Figure 393] This is a timing chart that explains the control that occurs when the power supply is cut off by disconnecting the wiring connected to the main control board of this embodiment, and the power supply is resumed after the wiring is reconnected, resulting in an unauthorized act of performing a setting confirmation operation. [Figure 394]This is a timing chart that explains the control that occurs when the power supply is cut off by disconnecting the wiring connected to the main control board of this embodiment, and the power supply is resumed after the wiring is reconnected, resulting in an unauthorized act of performing a setting change operation. [Figure 395] This is a timing chart that explains the control when the wiring connected to the main control board in this embodiment is disconnected but the power supply is not cut off, the wiring is reconnected, and when the power is turned back on, a setting change operation is performed to resume play. [Figure 396] 13 is a timing chart explaining the control when wiring connected to the main control board is disconnected and then reconnected during the occurrence of a weak error in the gaming machine of this embodiment. [Figure 397] 13 is a timing chart explaining the control of transitioning to a time-saving state due to special condition time-saving in the gaming machine of this embodiment. [Figure 398] 10 is a timing chart illustrating an example of control when the gaming machine of this embodiment is powered on by executing a first operation. [Figure 399] 10 is a timing chart illustrating an example of control when the gaming machine of this embodiment is powered on by executing a second operation. [Figure 400] A figure showing an example of a command transmitted from the main control board to the peripheral control board in the gaming machine of this embodiment. [Fig. 401] A figure showing an example of a screen transition when transitioning to a time-saving state due to a special condition time-saving in the gaming machine of this embodiment. [Fig. 402] A figure showing an example of a screen transition when the time-saving state ends in the gaming machine of this embodiment. [Fig. 403] FIG. 13 is a diagram showing a modified example of the game board of the gaming machine of the present embodiment. [Fig. 404] 2 is a diagram showing an example of a ball counting hole arranged on a game board 5 of the gaming machine of this embodiment. FIG. [Fig. 405] A figure showing a cross-sectional view of an example of a counting ball entrance unit arranged on a modified version of the game board of the gaming machine of this embodiment. [Fig. 406]13A and 13B are diagrams showing the movement path of game balls when the counting ball entrance unit of a modified example of this embodiment is in a ball entrance permission state, where (A) is a cross-sectional oblique view and (B) is a cross-sectional view. [Fig. 407] 13A and 13B are diagrams showing the movement path of game balls when the counting ball entry unit of a modified example of this embodiment is in a state in which entry is not permitted, where (A) is a cross-sectional oblique view and (B) is a cross-sectional view. [Fig. 408] 13 is a timing chart showing changes in the time-saving transition count in a modified example of the gaming machine of the present embodiment. [Fig. 409] This is a timing chart when the second starting winning port functions as a counting ball winning port in a modified example of the gaming machine of this embodiment. [Fig. 410] 11 is a flowchart illustrating the steps of a state transition determination process for determining whether or not to transition to another gaming state in the gaming machine of this embodiment. [Fig. 411] 4 is a flowchart showing the procedure of a state transition process according to the present embodiment. [Fig. 412] FIG. 4 is a diagram illustrating an example of state transition data according to the present embodiment. [Fig. 413] 4 is a diagram illustrating an example of the configuration of a work area for storing state transition data according to the present embodiment; FIG. [Fig. 414] FIG. 13 is a diagram showing a modified example of state transition data according to the embodiment. [Fig. 415] 13 is a timing chart explaining the control of transitioning to a time-saving state due to special condition time-saving in the gaming machine of this embodiment. [Fig. 416] A figure showing an example of the arrangement of values ​​stored in a memory area provided by the main control RAM of the gaming machine of this embodiment. [Fig. 417] 11 is a diagram illustrating the operation of the RAM clear switch and the memory area that is cleared when a RAM abnormality occurs in the gaming machine of this embodiment. FIG. [Fig. 418] A figure showing an example of setting data at the time of transition to the first interval before a jackpot, which is set when transitioning to a jackpot gaming state upon winning a special lottery in the gaming machine of this embodiment. [Fig. 419]A figure showing an example of large prize opening closure setting data that is set when closing the large prize opening during a large prize game state of the gaming machine of this embodiment. [Fig. 420] This is a sample module that performs initial settings based on the special prize opening closure setting data in the gaming machine of this embodiment. [Fig. 421] FIG. 13 is a diagram illustrating an example of a program for data initialization processing (DAT_SET_CLR) in this embodiment. [Fig. 422] This is a sample module that performs initial settings in the conventional procedure based on the special prize opening closure setting data in the gaming machine of this embodiment. [Fig. 423] A figure showing an example of a setting state management area in the gaming machine of this embodiment and values ​​set in the setting state management area. [Fig. 424] A figure showing an example of a table for selecting initialization setting data when initializing the gaming machine of this embodiment. [Fig. 425] 11 is a time chart showing the output timing of an external output signal related to a time-saving state due to a special condition time-saving in the gaming machine of this embodiment. [Fig. 426] 13 is a modified example of a time chart showing the output timing of an external output signal related to a time-saving state due to a special condition time-saving in the gaming machine of this embodiment. [Fig. 427] FIG. 4 is a block diagram showing a control configuration of a peripheral control board. [Fig. 428A] 1 is an example of a memory map of storage areas accessed by a VDP. [Fig. 428B] 13 is a diagram illustrating the allocation of memory areas provided by the performance data ROM. FIG. [Fig. 429] 6 is a flowchart showing a process executed when the peripheral control board is powered on. [Fig. 430] A figure showing an example of the configuration of modules etc. used in presentation control by the peripheral control board of the gaming machine of this embodiment. [Fig. 431] This is a diagram explaining an overview of the presentation control of the first half of the fluctuation pattern "10H03H" (normal fluctuation 12 seconds). [Fig. 432] A figure showing an example of a function in the presentation control of the gaming machine of this embodiment. [Fig. 433] FIG. 1 is a diagram explaining the mechanism of lenticular 3D display, where (A) shows the area viewed by the left eye (L) and (B) shows the area viewed by the right eye (R). [Fig. 434] A figure showing an example of a lenticular image in the gaming machine of the present embodiment. [Fig. 435] 1A and 1B are diagrams for explaining the arrangement of images stored in an image data area, in which (A) shows the arrangement of the entire image data area, and (B) shows the details of the arrangement of an area for storing 3D images. [Fig. 436] A figure explaining the arrangement of layers on which images displayed on the performance display device of the gaming machine of this embodiment are drawn. [Fig. 437] A figure explaining the procedure for writing an image to be displayed on the performance display device of the gaming machine of this embodiment into a frame buffer. [Fig. 438] FIG. 13 is a diagram illustrating a procedure for synthesizing a 3D image in which a left-eye image and a right-eye image are arranged side-by-side with a side-by-side 2D image (such as a background image) to generate a 3D display image (lenticular image). [Fig. 439] 10A to 10C are diagrams illustrating the procedure for creating image data for a 3D display presentation in the gaming machine of this embodiment. [Fig. 440] FIG. 1 is a diagram illustrating a first method for generating a side-by-side image. [Fig. 441] FIG. 13 is a diagram illustrating a second method for generating a side-by-side image. [Fig. 442] FIG. 13 is a diagram illustrating a third method for generating a side-by-side image. [Figure 443] FIG. 13 is a diagram illustrating a procedure for synthesizing a full-screen image from a side-by-side image. [Figure 444] FIG. 13 is a diagram showing an example of a layer structure when there is a single 3D layer. [Figure 445] 44 is a flowchart for explaining the procedure for drawing on each layer in the layer structure of FIG. [Fig. 446] FIG. 13 is a diagram showing an example of a layer structure in the case where there are multiple 3D layers. [Figure 447] 447 is a flowchart for explaining the procedure for drawing on each layer in the layer structure of FIG. 446. [Figure 448] A figure showing an example of a screen in the effect selection mode of the gaming machine of this embodiment. [Figure 449] 11A to 11C are diagrams illustrating the procedure for using images for a 3D display presentation in a 2D display presentation mode in the gaming machine of this embodiment. [Fig. 450] A flowchart showing the procedure for using images for 3D display presentation in the 2D display presentation mode shown in Figure 449. [Fig. 451] FIG. 13 is a diagram showing an example of an abnormality notification screen that is displayed when an abnormality occurs during execution of a 3D display performance. [Fig. 452] 13 is a timing chart showing the state of each component when the power supply to the main control board is cut off during a 3D display performance. [Fig. 453] A figure showing an example of a screen transition when the power supply to the main control board is cut off during a 3D display performance. [Fig. 454] This is a timing chart showing the state of each component when the power supply to the peripheral control board is cut off during 3D display performance during a jackpot game state. [Fig. 455] This figure shows an example of a screen transition when the power supply to the peripheral control board is cut off during a 3D display presentation during a jackpot game state. [Fig. 456] FIG. 2 is a diagram showing an example of a structure for storing frame data for generating a moving image. [Fig. 457] 11 is a graph showing the relationship between the interval at which one reference frame data is arranged and the amount of data. [Fig. 458] FIG. 13 is a diagram showing an example of the arrangement of areas displaying images. [Fig. 459] 13 is a diagram for explaining images corresponding to each region, with the upper part showing images corresponding to each region, and the lower part showing a display image generated as a result of drawing images corresponding to all regions. [Fig. 460] 1 is a table showing configuration information of each area. [Fig. 461] FIG. 2 is a diagram for explaining the chronological relationship of each layer. [Fig. 462] FIG. 2 is a diagram illustrating a first procedure for generating a moving image. [Fig. 463] FIG. 11 is a diagram for explaining the capacity of a decode buffer required when a moving image is generated in the first procedure. [Fig. 464] 13 is a diagram showing an example of the arrangement intervals of the reference frame data when generating a moving image in the second procedure. FIG. [Fig. 465] FIG. 11 is a diagram illustrating a second procedure for generating a moving image. [Fig. 466] FIG. 11 is a diagram for explaining the capacity of a decode buffer required when a moving image is generated in the second procedure. [Fig. 467] FIG. 13 is a diagram for explaining the capacity of a decode buffer required when a moving image is generated by combining the first and second procedures. [Fig. 468] FIG. 4 is a diagram showing an example of image management information. [Fig. 469] FIG. 1 is a block diagram illustrating a configuration for testing an external RAM. [Fig. 470] FIG. 13 is a diagram illustrating an example of a command for testing an external RAM. [Fig. 471] FIG. 2 is a diagram illustrating registers that are set in order for the RAM diagnostic circuit to perform a test on an external RAM. [Fig. 472] 13 is a flowchart showing a procedure for an external RAM inspection process (glitch margin check) in a boot program. [Fig. 473] 11 is a flowchart showing a procedure for testing an external RAM (R / W test) in the peripheral control program. [Fig. 474] 11 is a flowchart showing a procedure for an external RAM inspection process (glitch margin check and R / W test) executed after power-on. [Fig. 475] 10 is a diagram illustrating the types of winnings of the gaming machine of this embodiment. FIG. [Fig. 476]13 is a diagram explaining the random numbers for determining a win in the gaming machine of this embodiment, where (A) is pattern 1 and (B) is pattern 2. [Fig. 477] 11 is a flowchart showing the procedure of a fraud detection process in the gaming machine of the present embodiment. [Fig. 478] 13 is a flowchart showing the steps of the processing for detecting irregularities at a large prize opening in the gaming machine of this embodiment. [Fig. 479] 13 is a flowchart showing the procedure for a fraud notification setting process in the gaming machine of this embodiment. [Fig. 480] FIG. 13 is a diagram showing a timing chart when the first jackpot is won in the gaming machine of this embodiment. [Figure 481] FIG. 13 is a timing chart showing a case where a second win is won before the number of consecutive first wins reaches an upper limit in the gaming machine of this embodiment. [Figure 482] FIG. 13 is a diagram showing a timing chart when a second jackpot is won in the gaming machine of this embodiment. [Figure 483] This is a timing chart that explains the operation of a gaming machine that is designed to maintain the gaming state when a small jackpot is won, when a gaming ball passes through a specific area when a small jackpot is won. [Figure 484] This is a timing chart explaining the timing for updating the number of consecutive time-saving plays in a gaming machine that transitions to a non-time-saving state (normal gaming state) when a small jackpot is won, and also shows a case where the gaming ball does not pass through a specific area when a small jackpot is won. [Figure 485] This is a timing chart explaining the timing for updating the number of consecutive time-saving plays in a gaming machine that transitions to a non-time-saving state when a small jackpot is won, and shows a case where the gaming ball passes through a specific area after a small jackpot is won. [Figure 486] This is a timing chart that improves the timing of updating the number of consecutive time-saving plays in a gaming machine that transitions to a non-time-saving state when a small jackpot is won, and shows a case where the gaming ball passes through a specific area when a small jackpot is won. [Figure 487]This is a timing chart that explains the operation of a gaming machine that transitions to a non-time-saving state when a small win is won, and starts a special game state due to a big win after the special game state due to the small win ends, when a gaming ball passes through a specific area when a small win is won. [Figure 488] 13 is a diagram explaining the types of variation pattern tables that are set when the special pattern variation display of the gaming machine of this embodiment is performed. FIG. [Figure 489] A figure showing an example of a pattern in which a variation pattern table is selected depending on the remaining number of times up to the upper limit at which the time-saving state can occur consecutively. [Fig. 490] A figure showing an example of the type of random numbers and the range of random number values ​​obtained when a gaming ball enters a starting hole. [Figure 491] A figure showing an example of the range in which the result of a special lottery for each setting value of a gaming machine will be a jackpot. [Fig. 492] 11 is a flowchart showing the procedure for special symbol / special electric device control processing in the gaming machine of this embodiment. [Figure 493] 13 is a flowchart showing the procedure for waiting for a special pattern change in the gaming machine of this embodiment. [Figure 494] 11 is a flowchart showing the procedure of special symbol / flag setting processing in the gaming machine of this embodiment. [Fig. 495] 11 is a flowchart showing the procedure for a special symbol determination process of the gaming machine of this embodiment. [Fig. 496] This is a diagram for explaining the means of determining the lottery results, where (A) is a table for determining the result of the variable display of special pattern 2 (special lottery) when the gaming machine is set to 6 in a high probability state, (B) is a table for determining the result of the variable display of special pattern 2 (special lottery) when the gaming machine is set to 1 in a high probability state, (C) is a table for determining the result of the variable display of special pattern 1 (special lottery) when the gaming machine is set to 6 in a high probability state, (D) is a table for determining the result of the variable display of special pattern 2 (special lottery) when the gaming machine is set to 6 in a low probability state, and (E) is a table for determining the result of the variable display of special pattern 2 (special lottery) when the gaming machine is set to 1 in a low probability state. [Figure 497] This is a diagram that explains the process by which some bits of the random number used to determine a jackpot are changed due to factors such as noise, causing the value to change outside the range. [Figure 498] FIG. 13 shows an example of data for determining a special symbol, where (A) shows the case of special symbol 1 and (B) shows the case of special symbol 2. [Figure 499] This is a diagram explaining the pattern types corresponding to the special pattern random numbers, where (A) shows the case of special pattern 1 and (B) shows the case of special pattern 2. [Figure 500] 13 is a flowchart showing an example of a procedure for setting a special symbol variation pattern. [Fig. 501] 13 is a flowchart showing an example of a procedure for a variation pattern selection determination process. [Figure 502] A figure showing an example of reach fluctuation pattern selection data. [Figure 503] A diagram to explain the comparison value for activating the excessive winning ball suppression means. [Figure 504] FIG. 13 is a diagram illustrating an example of a table showing the relationship between commands and the remaining number. [Figure 505] 13 is a timing chart illustrating a flow of releasing a game stop by a first game stop release means. [Figure 506] 13 is a timing chart illustrating a flow of releasing a game stop by a second game stop release means. [Figure 507] 13 is a timing chart showing an example of control for releasing a game stop by turning the power back on when the door is opened. [Figure 508] 13 is a timing chart showing an example of control in which the game stop is not lifted by turning the power back on when the door is closed. [Figure 509] 13 is a timing chart showing an example of control for executing a setting change while opening a door after a game is stopped. [Fig. 510] 11 is a timing chart showing an example of control in which a setting change is executed while the door is open after a game is stopped, and the door is closed after the gaming machine is started. [Figure 511]13 is a timing chart showing an example of control for executing a setting change while closing the door after a game is stopped. [Figure 512] 13 is a timing chart showing an example of control for performing setting check while opening the door after game play has stopped. [Figure 513] 13 is a timing chart showing an example of control for performing setting check while closing the door after game play has stopped. [Figure 514] 11 is a timing chart showing an example of control in which the opening of the door is a condition for canceling a game stop and a condition for starting a setting change. [Figure 515] A figure showing an example of the configuration for executing a bell-striking effect in the gaming machine of this embodiment. [Fig. 516] 1 is a front view (surface view of the door frame) of a pachinko machine according to one embodiment of the present invention. [Figure 517] This is a diagram showing a plate unit including a performance operation unit, where (A) is a front view of the plate unit in its normal state, (B) is a front view of the plate unit when the pressing operation unit is in the raised position, and (C) is a front view of the plate unit when the central pressing operation unit of the pressing operation unit is pressed. [Figure 518] 13A and 13B are diagrams showing the initial position of the performance operation unit, where (A) is a plan view and (B) is a cross-sectional view cut along a plane including the center. [Figure 519] 13A and 13B are diagrams showing the raised position of the performance control unit, where (A) is a plan view and (B) is a cross-sectional view taken along a plane including the center. [Fig. 520] 11A and 11B are diagrams explaining the operation of the rotating operation part by lifting the pressing operation part, in which (A) shows the state in which the pressing operation part is lifted, and (B) shows the state in which the rotating operation part is rotated by lifting the pressing operation part. [Fig. 521] FIG. 13 is a diagram showing an example of the screen transition when a worshipper strikes the bell once and is successful. [Figure 522] FIG. 13 is a diagram showing an example of the screen transition when a worshipper strikes the bell once and fails. [Figure 523]This is a diagram explaining the amount of rotation of the rotary control part and the movement of the bell corresponding to the strength of striking the bell in a bell-striking performance, where (A) is a "strong" strength, (B) is a "medium" strength, (C) is a "weak" strength, and (D) is a case where the bell fails to be struck because the strength is below a certain level. [Figure 524] FIG. 13 is a diagram showing an example of a screen transition when the strength of the bell striking is specified in a bell striking performance in which each worshipper strikes the bell once. [Figure 525] FIG. 13 is a diagram showing an example of a screen transition in a bell-striking performance in which a number of worshippers strike the bell in succession. [Fig. 526] 13 is a diagram showing an example of a configuration for executing a point effect of a bell striking effect in the gaming machine of this embodiment. FIG. [Figure 527] FIG. 13 is a diagram illustrating the setting of the point effect. [Figure 528] 13 is a diagram illustrating the progress of points acquired from the start of the point presentation. FIG. [Figure 529] FIG. 13 is a diagram showing an example of a screen transition for a point presentation. [Fig. 530] This figure shows an example of a preview performance that is executed based on the total points earned in the point performance, where (A) is when the total points are 0, (B) is when the total points are 20, and (C) is when the total points are 50. [Fig. 531] FIG. 13 is a diagram showing an example of bell striking strength according to the attributes of worshippers. [Figure 532] 13 is a diagram illustrating the progress of points acquired from the start of the point production when the bell striking strength is specified according to the attributes of the worshipper. FIG. [Figure 533] This is a flowchart showing the first half of the procedure for processing the dispensing control unit when it is powered on. [Fig. 534] This is a flowchart showing the second half of the procedure for processing the dispensing control unit when it is turned on. [Fig. 535] A flowchart showing the steps of the prize ball control processing. [Fig. 536] 13 is a flowchart illustrating an example of a procedure for a reference value counter updating process. [Figure 537]13 is a flowchart showing the procedure of a RAM clear determination process corresponding to the initialization of a reference value (comparison value) based on a game stop error flag. [Figure 538] A figure showing an example of advance notification of the excessive winning ball suppression means (complete function). [Figure 539] A figure showing an example of an operation notification of the excessive winning ball suppression means. [Fig. 540] A figure showing an example of a screen transition when an excess prize ball suppression means is activated after the end of a jackpot game state. [Figure 541] This figure shows an example of a screen transition when the pre-notification condition and the activation condition are met during a jackpot game state, and the excess prize ball suppression means is activated after the jackpot game state ends. [Fig. 542] This figure shows an example of a screen when an abnormality occurs in the gaming machine while the advance warning of the excessive winning ball suppression means is being executed, where (A) shows the time when the abnormality occurs, and (B) shows the state after recovery by cutting off and re-applying the power. [Figure 543] 10 is a flowchart showing the procedure for processing when the power is turned on in the gaming machine of the present embodiment. [Fig. 544] The diagram shows an overview of the memory area layout, where (A) is a schematic diagram of the memory area layout, (B) is a dump list when the starting address outside the game area is "5060h", and (C) is a dump list when the starting address outside the game area is "5065h". [Figure 545] 13 is a flowchart showing the procedure for processing at the start of a game. [Figure 546] 13 is a flowchart showing the steps of processing when setting up the start of a game. [Figure 547] A flowchart showing the steps of the excessive prize ball suppression setting process. [Figure 548] 13 is a flowchart showing the steps of a game stop determination process. [Figure 549] A figure showing an example of program code for a game stop determination process. [Fig. 550] A diagram explaining whether the excess prize ball suppression means is operable depending on the progress of the game. [Fig. 551]13 is a flowchart showing a procedure for a timer interrupt process. [Figure 552] 13 is a flowchart showing the procedure of a game-playable time process executed in the timer interrupt process of this embodiment. [Figure 553] 10 is a flowchart showing the procedure of a performance display monitor process executed in the timer interrupt process of the present embodiment. [Fig. 554] A flowchart showing the steps of the excessive prize ball suppression process. [Figure 555] FIG. 13 illustrates an example of a target switch information data table. [Fig. 556] 13 is a flowchart showing a procedure for a reference value addition process. [Figure 557] 13 is a flowchart showing a procedure for a reference value subtraction process. [Figure 558] FIG. 13 is a diagram illustrating an example of skipping a specific effect by operating the operating means when the effect is executed after a reach occurs. [Figure 559] This is a timing chart corresponding to the example performance shown in FIG. 558. [Fig. 560] FIG. 13 is a diagram illustrating another example in which a specific effect is skipped by operating the operating means when the effect is executed after a reach occurs. [Fig. 561] This is a timing chart corresponding to the example performance shown in FIG. 560. [Fig. 562] A figure showing an example in which an operation prompt display is displayed after a reach occurs, and the presentation is switched depending on whether or not an operation input is performed. [Fig. 563] This is a timing chart corresponding to the example presentation shown in FIG. 562. [Fig. 564] A figure showing an example of a penalty effect being executed when operation input is not accepted in a configuration that requires operation using a single operating means. [Fig. 565] This is a timing chart corresponding to the example performance shown in FIG. 564. [Fig. 566] A figure showing an example of a penalty effect being executed when operation input is not accepted in a configuration that requires operation of multiple types of operating means. [Figure 567] This is a timing chart corresponding to the example performance shown in Figure 566. [Figure 568] A figure showing an example (first half) of a presentation including a configuration requiring the operation of a single type of operating means and the operation of multiple types of operating means. [Fig. 569] A figure showing an example (second half) of a presentation including a configuration requiring the operation of a single type of operating means and the operation of multiple types of operating means. [Fig. 570] This is a timing chart corresponding to the presentation examples shown in Figures 568 and 569. [Fig. 571] A figure showing an example of the relationship between the pattern change pattern and the presentation. [Fig. 572] FIG. 13 is a diagram showing an example of a screen configuration for a long jump performance. [Fig. 573] 13A to 13C are diagrams illustrating an example of character movement in a long jump performance. [Figure 574] FIG. 13 is a diagram showing an example of a display mode corresponding to the expectation level of a character in a long jump performance. [Figure 575] FIG. 13 is a diagram showing an example of a layer configuration for a long jump performance. [Fig. 576] FIG. 13 is a diagram showing an example of information for defining layers when displaying images in a long jump performance. [Figure 577] 2 is a diagram illustrating the arrangement of layers (display hierarchy) in the gaming machine of the present embodiment. FIG. [Figure 578] FIG. 2 is a diagram showing an example of image data stored in an image ROM. [Fig. 579] 11A to 11C are diagrams illustrating a procedure for synthesizing layers and creating a display screen. [Fig. 580] FIG. 13 is a diagram showing an example of a screen transition in which the layer on which an object is displayed is not changed from when the object is displayed until when it is hidden. [Fig. 581] A diagram explaining the layer switching timing of the performance shown in Figure 580. [Fig. 582]A figure showing an example of a screen transition in which the layer on which an object is displayed is changed from when the object is displayed until when it is hidden. [Fig. 583] A figure explaining the layer switching timing of the performance shown in Figure 582. [Fig. 584] 13 is a diagram illustrating a presentation pattern in which a special presentation is executed after transitioning to a specific state. FIG. [Figure 585] A diagram showing the screen transition when an effect is executed across the varying display of multiple patterns. [Fig. 586] 13 is a diagram illustrating the probability of a character appearing when the Chinese zodiac appearance effect is executed. FIG. [Figure 587] This figure explains the procedure for displaying the presentation change menu screen in the gaming machine of this embodiment, where (A) is the state before the presentation change menu screen is displayed, (B) is the state after the presentation change menu screen is displayed, (C) is the state after the favorite zodiac animal has been set as a presentation setting and then the presentation change menu screen is closed and the favorite zodiac animal has been set, and (D) is the state after a predetermined time has passed from the state of (C) and the presentation change menu screen can be displayed. [Figure 588] This is a setting screen for seasonal settings. [Figure 589] This is the setting screen for setting your favorite zodiac sign. [Fig. 590] This is a screen for adjusting the brightness of the liquid crystal display device. [Fig. 591] A diagram explaining a means for changing settings of the presentation while the pattern is being displayed in a changing manner. [Fig. 592] 13 is a diagram illustrating the procedure for setting a new season during the changing display of patterns. FIG. [Fig. 593] This is a diagram explaining the procedure for setting a new favorite zodiac sign while the pattern is being displayed in a changing manner. [Figure 594] This figure explains an example of setting a new zodiac sign while the pattern is changing and being displayed when the pattern change ends without a reach occurring. [Fig. 595] 594, and is a timing chart for explaining the timing at which the favorite zodiac sign is set. [Fig. 596]This figure explains an example of setting a new zodiac sign while the pattern is changing when a normal reach occurs and the pattern change results in a miss. [Figure 597] 596, and is a timing chart for explaining the timing at which the favorite zodiac sign is set. [Figure 598] This figure explains an example of setting a new favorite zodiac sign while the pattern is changing and being displayed when an SP reach occurs and the pattern change results in a miss. [Figure 599] 598 corresponds to a timing chart for explaining the timing at which the favorite zodiac sign is set. [Figure 600] FIG. 13 is a diagram illustrating an example (first half) of setting a new favorite zodiac sign during the changing display of the patterns when an SP reach occurs and the result of the changing display of the patterns is a jackpot. [Fig. 601] FIG. 13 is a diagram illustrating an example (second half) of setting a new favorite zodiac sign during the changing display of the patterns when an SP reach occurs and the result of the changing display of the patterns is a jackpot. [Fig. 602] 599 and 600, is a timing chart for explaining the timing at which the favorite zodiac sign is set. [Figure 603] The figures show examples of when an upper tray full error message appears while setting up the effects during the changing display of symbols. (A) is when setting the season, and (B) is when setting the favorite zodiac sign. [Figure 604] A diagram showing light-emitting objects arranged around the performance screen. [Fig. 605] FIG. 13 is a diagram showing an example (first presentation pattern) of the appearance of the Chinese zodiac sign of the Rat (mouse). [Fig. 606] This is a figure explaining another example (second presentation pattern) of the Rat (Rat) zodiac appearance presentation, in which (A) is a list of cheese collected by the Rat (Rat) character, (B) and (C) are the mini-game presentation execution screens, and (B) shows the case where the Rat (Rat) is not set as the favorite zodiac sign, and (C) shows the case where the Rat (Rat) is set as the favorite zodiac sign. [Fig. 607]This is an example of a special effect that is executed when the points earned in the Rat (zodiac sign) appearance effect reach a certain threshold. (A) shows the state when a jackpot is announced, and (B) shows the state when the middle symbol stops after the announcement. [Figure 608] FIG. 13 is a diagram showing an example of the appearance of the Chinese zodiac sign of Sheep. [Figure 609] FIG. 13 is a diagram showing an example of points that can be acquired when the Chinese zodiac sign of Sheep appears. [Figure 610] A diagram showing the screen transitions when the zodiac sign of the Sheep appears. [Figure 611] This is an example of a special presentation that is executed when the points gained in the zodiac animal of the sheep appearance presentation reach a predetermined achievement value. [Figure 612] A figure showing an example of a light-emitting mode in a performance in which an illuminating section provided on the pressing section of a pressing operation section is illuminated. [Figure 613] FIG. 13 is a diagram showing an example of the appearance of the boar zodiac sign when the boar is not set as the preferred zodiac sign. [Figure 614] FIG. 11 shows an example of the result display of the boar zodiac sign appearance when the boar is not set as the preferred zodiac sign, where (A) shows the result when the mini-game is unsuccessful and (B) shows the result when the mini-game is successful. [Fig. 615] FIG. 13 is a diagram showing an example of the appearance of the boar zodiac sign when the boar is set as the recommended zodiac sign. [Fig. 616] This figure shows an example of the result display of the boar zodiac sign appearance when the boar is set as the favorite zodiac sign, where (A) shows the result when the mini-game fails and (B) shows the result when the mini-game is successful. [Fig. 617] A figure showing an example of points acquired in a challenge performance in the zodiac sign of the tiger appearance performance. [Fig. 618] This shows the state before the start of the challenge performance of the tiger zodiac sign appearance performance. [Fig. 619] This is a diagram showing what happens when the challenge performance fails in the zodiac sign of the tiger appearance performance. [Fig. 620]This is a diagram showing what happens when the challenge performance is successful in the zodiac sign of the tiger appearance performance. [Fig. 621] FIG. 13 is a diagram showing an example of the screen transition for the appearance of the zodiac signs of the Snake and Dragon when neither the Snake nor the Dragon is set as the favorite zodiac sign. [Fig. 622] A figure showing an example of the correspondence between the points earned and the light emission mode of the light-emitting element in a performance in which the zodiac signs of Snake and Dragon appear as the favorite zodiac signs. [Fig. 623] This is a diagram explaining the evolution effect in the appearance of the zodiac signs of Snake and Dragon. [Fig. 624] FIG. 13 is a diagram showing points corresponding to egg types when the Snake and Dragon are not set as the preferred Chinese zodiac signs. [Fig. 625] This is a diagram showing an example of the hatching result display for the Snake and Dragon zodiac appearance effects when the Snake is set as the favorite zodiac sign. [Fig. 626] 13 is a diagram illustrating an example of changing the season setting while the zodiac sign of the monkey is appearing. FIG. [Figure 627] 1 is a diagram showing an example of the configuration of a memory area provided by a ROM 1313 of the gaming machine of this embodiment. FIG. [Fig. 628] A figure showing an example of the configuration of a memory area provided by a RAM 1312 of the gaming machine of this embodiment. [Figure 629] 8 is a diagram for explaining access to a sending area 8721 and a receiving area 8722. FIG. [Fig. 630] A figure showing an example of the configuration of a calculation device for configuring a memory area in the gaming machine of the present embodiment. [Fig. 631] This figure shows alternative configurations of the arithmetic device for configuring the memory area in the gaming machine of this embodiment, where (A) is alternative configuration 1 equipped with multiple memory means, and (B) is alternative configuration 2 equipped with multiple CPU cores and multiple memory means. [Figure 632] FIG. 13 is a diagram illustrating an example of a module configuration of a complete function execution means. [Figure 633]10 is a flowchart showing the procedure for processing when the power is turned on in the gaming machine of the present embodiment. [Figure 634] 11 is a flowchart showing the procedure of a game start determination process in the gaming machine of this embodiment. [Fig. 635] 13 is a flowchart showing the procedure for timer interrupt processing in the gaming machine of the present embodiment. [Fig. 636] 5 is a flowchart showing a procedure of a setting operation process according to the present embodiment. [Figure 637] 13 is a flowchart showing the procedure for setting confirmation / change processing in the gaming machine of this embodiment. [Fig. 638] 13 is a flowchart showing an example of a timer interrupt process of a gaming machine that does not have a setting-related function. [Figure 639] 13 is a flowchart showing the steps of a complete function initialization setting process in the gaming machine of this embodiment. [Fig. 640] 13 is a program code for a complete function initialization setting process in the gaming machine of this embodiment. [Fig. 641] 13 is a flowchart showing a procedure for a complete function process. [Fig. 642] 13 is a program code for a complete function process. [Fig. 643] 13 is a flowchart showing a procedure for a complete function control process. [Fig. 644] 13 is a program code for a complete function control process. [Fig. 645] 13 is a flowchart showing a procedure for a MY value calculation process. [Fig. 646] This is program code for the MY value calculation process. [Fig. 647] FIG. 13 is a diagram illustrating an example of an outside-area switch information data table. [Fig. 648] FIG. 4 is a diagram illustrating an example of the configuration of input information. [Fig. 649] 10 is a flowchart showing a procedure for an actuation determination value calculation process for calculating an actuation determination value. [Fig. 650]13 is a flowchart showing a procedure for a complete function command transmission process. [Fig. 651] 13 is a program code for a complete function command transmission process. [Fig. 652] FIG. 13 is a diagram showing an example of a screen displaying the number of balls remaining until the complete function is activated. [Fig. 653] This figure shows an example of a screen in which a complete function activation notice command is received during a jackpot game state and a notice of the activation of the complete function is displayed. [Fig. 654] FIG. 13 is a diagram showing an example of a screen displayed when a complete function is activated. [Fig. 655] 13 is a flowchart of an MY value subtraction process in which the MY value is not subtracted when the MY value is 0. [Fig. 656] 13 is a flowchart of an MY value subtraction process for separately calculating a value to be subtracted from the MY value. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] A pachinko machine 1 according to an embodiment of the present invention will be described in detail with reference to the drawings. First, the overall configuration of the pachinko machine 1 according to this embodiment will be described with reference to Figs. 1 to 9. Fig. 1 is a front view of a pachinko machine according to an embodiment of the present invention. Fig. 2 is a right side view of the pachinko machine, Fig. 3 is a plan view of the pachinko machine, and Fig. 4 is a rear view of the pachinko machine. Fig. 5 is a perspective view of the pachinko machine as seen from the front, and Fig. 6 is a perspective view of the pachinko machine as seen from the rear. Fig. 7 is a perspective view of the pachinko machine as seen from the front with the door frame 3 opened from the main body frame and the main body frame 4 opened from the outer frame 2. Fig. 8 is an exploded perspective view of the pachinko machine disassembled into the door frame 3, the game board 5, the main body frame 4, and the outer frame 2 as seen from the front, and Fig. 9 is an exploded perspective view of the pachinko machine disassembled into the door frame 3, the game board 5, the main body frame 4, and the outer frame 2 as seen from the rear.

[0011] The pachinko machine 1 of this embodiment comprises a frame-shaped outer frame 2 installed in an island facility (not shown) of a gaming hall, a door frame 3 which closes the front of the outer frame 2 in an openable and closable manner, a main frame 4 which supports the door frame 3 in an openable and closable manner and is attached to the outer frame 2 in an openable and closable manner, and a game board 5 which is detachably attached to the main frame 4 from the front and is visible from the player's side through the door frame 3, and has a game area 5a into which game balls are shot by the player.

[0012] As shown in Figures 8 and 9, the outer frame 2 of the pachinko machine 1 comprises an upper frame member 10 and a lower frame member 20 that are vertically spaced apart and extend horizontally, and a left frame member 30 and a right frame member 40 that connect both ends of the upper frame member 10 and the lower frame member 20 and extend vertically. The upper frame member 10, the lower frame member 20, the left frame member 30, and the right frame member 40 are formed to have the same front-to-back width. Furthermore, the vertical length of the left frame member 30 and the right frame member 40 is formed to be longer than the horizontal length of the upper frame member 10 and the lower frame member 20.

[0013] The outer frame 2 also includes a panel member 50 that connects the lower ends of the left and right frame members 30 and 40 and is attached to the front side of the lower frame member 20, an outer frame upper hinge member 60 that is attached to the left end side of the upper frame member 10 when viewed from the front, and an outer frame lower hinge member 70 that is attached to the upper part of the left end side of the panel member 50 when viewed from the front and to the left frame member 30. The main frame 4 and the door frame 3 are attached so as to be able to open and close by the outer frame upper hinge member 60 and the outer frame lower hinge member 70 of the outer frame 2.

[0014] The door frame 3 of the pachinko machine 1 comprises a frame-shaped door frame base unit 100 having a rectangular external shape when viewed from the front and a through hole 111 penetrating from front to back, a tray unit 200 attached to the lower front part of the door frame base unit 100 and having an upper tray 201 and a lower tray 202 capable of storing game balls, a top unit 350 attached to the upper front part of the door frame base unit 100, a left side unit 400 attached to the left front part of the door frame base unit 100, a right side unit 450 attached to the right front part of the door frame base unit 100, and an upper tray 201 attached to the lower right front part of the door frame base unit 100 by penetrating the tray unit 200. The door frame base unit 100 is equipped with a handle unit 500 that can be operated by a player to shoot the game balls stored in 201 into the game area of ​​the game board 5, a foul cover unit 520 that is attached to the lower rear surface of the door frame base unit 100 and receives game balls that have failed to be shot into the game area and discharges them onto the lower tray 202 of the tray unit 200, a ball feeding unit 540 that is attached to the lower rear surface of the door frame base unit 100 and sends the game balls on the upper tray 201 to the ball launching device 680, a glass unit 560 that is attached to the rear surface of the door frame base unit 100 and closes the through hole 111, and a security cover 580 that covers the lower rear surface of the glass unit 560.

[0015] The main body frame 4 of the pachinko machine 1 comprises a frame-shaped main body frame base 600, a part of which can be inserted into the frame of the outer frame 2 and which can support the outer periphery of the game board 5; a main body frame side upper hinge member 620 and a main body frame side lower hinge member 640 which are attached to both upper and lower ends of the main body frame base 600 on the left side as viewed from the front and which are rotatably attached to the outer frame side upper hinge member 60 and the outer frame side lower hinge member 70 of the outer frame 2, respectively, and to which the door frame side upper hinge member 140 and the door frame side lower hinge member 150 of the door frame 3 are rotatably attached, respectively; a reinforcing frame 660 attached to the left side as viewed from the front of the main body frame base 600; the ball launching device 680 attached to the right side of the main frame base when viewed from the front, for locking the spaces between the outer frame 2 and the main frame 4, and between the door frame 3 and the main frame 4; an inverted L-shaped payout unit 800 attached to the rear side along the top and left sides of the main frame base 600 when viewed from the front, for paying out game balls to the player; a base unit 900 attached to the lower rear surface of the main frame base 600; and a back cover 980 attached to the rear side of the main frame base 600 so as to be able to open and close, and covering the rear side of the game board 5 attached to the main frame base 600.

[0016] Inside the back cover 980, a main control unit 1300 is provided for controlling the progress of the game played on the pachinko machine 1. The main control unit 1300 is provided with a bonus feature ratio display. The bonus feature ratio display 1317 is configured, for example, with a four-digit seven-segment LED. The bonus feature ratio display 1317 may also be configured with a liquid crystal display device. The bonus feature ratio display 1317 may also be provided in the payout control board unit 950, instead of in the main control unit 1300.

[0017] Also, instead of providing a separate display device for displaying the bonus ratio, the bonus ratio may be displayed on the liquid crystal display device 1600, 3114, or 244. In this case, if the bonus ratio is constantly displayed on one of the liquid crystal display devices 1600, 3114, or 244, the bonus ratio can be notified to the player, and the player may be able to check the condition of the pachinko machine.

[0018] As described below, the bonus ratio can be calculated by dividing the number of bonus balls obtained by the total number of balls obtained. For example, a pachinko machine with a high bonus ratio (e.g., 90%) can be said to be in good condition because it has obtained many prize balls from jackpots. On the other hand, a pachinko machine with a low bonus ratio (e.g., 10%) can be said to be in bad condition because it has few jackpots and few prize balls during jackpots. Therefore, players can select a pachinko machine to play by taking into consideration the bonus ratio.

[0019] As a mode for notifying the player of the role ratio, the value of the role ratio may be displayed on the main liquid crystal display device 1600. For example, when the role ratio is 70% or more, the value is displayed in red and the frame lamp is turned on red or flashes, and when it is 69% to 30%, the value is displayed in green and the frame lamp is turned on green or flashes. The value of the role ratio may be displayed in a manner that is not mistaken for a decorative pattern. For example, it may be displayed in a position that does not overlap with the display position of the decorative pattern when it is not fluctuating, or the size of the number indicating the role ratio may be made smaller than that of the decorative pattern. The display mode may be divided into any number of stages.

[0020] Also, the aspect of the decorative symbols displayed on the main liquid crystal display device 1600 may be changed according to the value of the bonus ratio to inform the player of the bonus ratio. For example, when the bonus ratio is 70% or more, the decorative symbols are displayed in red and the frame lamp is turned on red or blinks, and when it is 69% to 30%, the decorative symbols are displayed in green and the frame lamp is turned on green or blinks. The display aspect may be divided into any number of stages.

[0021] It may also be displayed on the liquid crystal display device 244 provided on the door frame 3. In this case, the above-mentioned display mode may be changed, and other information may be displayed in addition to the ratio of the bonus items. The other information may be the number of jackpots, the number of consecutive jackpots (so-called consecutive wins), the number of balls held, the remaining balance, etc.

[0022] In addition to the role ratio, the consecutive role ratio and the base value described later may be displayed in a different manner as described above. The role ratio, the consecutive role ratio, and the base value may each be displayed in a different manner.

[0023] As shown in Fig. 13, the main control unit 1300 is enclosed in a transparent resin main control board box 1320 sealed in a structure that cannot be opened without destruction once closed, and the components arranged on the printed board can be seen from the outside. Furthermore, for example, if the back cover 980 is formed of a transparent resin, the main control unit 1300 can be seen from the back side of the pachinko machine 1, and the role ratio indicator 1317 provided on the main control unit 1300 can be seen from the back side of the pachinko machine 1. By enclosing the role ratio indicator 1317 in the main control board box 1320, it is possible to prevent unauthorized modification of the role ratio indicator 1317 to make the gambling property of the pachinko machine 1 look low, and it is possible to display the accurate gambling property of the pachinko machine 1.

[0024] In addition, if the back cover 980 is formed of an opaque resin, it is possible to make the reel ratio display 1317 visible from the back side of the pachinko machine 1 by drilling a hole in the back cover 980 at the position of the reel ratio display 1317 or by making the position of the reel ratio display 1317 transparent.

[0025] Furthermore, even if the back cover 980 is formed from a transparent resin, the surface of the back cover 980 at the position of the reel ratio display 1317 may be made flat, or the back cover 980 may be made thin, so that the reel ratio display 1317 can be easily seen from the back side of the pachinko machine 1.

[0026] At the bottom of the back surface of the pachinko machine 1, there is provided a discharge port that collects game balls that have flowed out of the game area 5a via the outlet 1111 and the winning ports 2001, 2005, 2006, etc., and discharges them to the outside of the pachinko machine 1. The game balls discharged from the discharge port are supplied to the ball tank 802 through the island equipment. The pachinko machine 1 of this embodiment is provided with a discharge ball sensor 3060 that detects game balls discharged from the discharge port.

[0027] As shown in FIG. 13, the main control unit 1300 is provided with a display switch 1318. The main control board box 1320 is provided with a hole through which the display switch 1318 can be operated. It is preferable to indicate (by printing, engraving, seal, etc.) that the display switch 1318 is a switch for operating the display of the role ratio on the printed circuit board near the display switch 1318 or on the main control board box 1320. The display switch 1318 is preferably provided near the role ratio display device 1317, but it may be provided on other boards (for example, the performance control board 4700, the power supply device 4112), the housing 4100, or the front member 4200, even if it is not on the main control unit 1300, as long as it is in a place where it is easy to operate. It may be provided on the peripheral control unit 1500, a relay board provided separately from the main control unit 1300, a power supply board in the power supply board box 930 on the frame side, or the payout control board unit 950. In addition, as described later, the display switch 1318 may also be used as a RAM clear switch. By providing the display switch 1318 in a position where it cannot be operated by the player, it is possible to prevent the player from operating it by mistake.

[0028] The payout unit 800 of the main frame 4 comprises an inverted L-shaped payout unit base 801 attached to the rear of the main frame base 600, a ball tank 802 attached to the top of the payout unit base 801, which is a box-shaped tank that is open upward and extends to the left and right, and which stores game balls supplied from an island facility (not shown), a tank rail 803 that is attached to the payout unit base 801 below the ball tank 802 and extends to the left and right to guide the game balls in the ball tank 802 to the left when viewed from the front, a ball guide unit 820 attached to the rear surface of the upper left side of the payout unit base 801 when viewed from the front, which guides the game balls from the tank rail 803 downward in a serpentine shape, and a payout control board unit 9 that is detachably attached to the payout unit base 801 below the ball guide unit 820 and controls the game balls guided by the ball guide unit 820. 50, an upper full ball path unit 850 is attached to the rear surface of the payout unit base 801 and guides the game balls paid out by the payout device 830 downward and releases the game balls from either the normal release port or the full release port depending on the storage state of the game balls on the upper tray 201 of the tray unit 200, and a lower full ball path unit 860 is attached to the lower end of the payout unit base 801 and has a normal guide path that guides the game balls released from the normal release port of the upper full ball path unit 850 forward and from the front end to the through ball passage 526 of the door frame 3, and a full guide path that guides the game balls released from the full release port forward and from the front end to the full ball receiving port 530 of the door frame 3.

[0029] The board unit 900 of the main body frame 4 comprises a board unit base 910 attached to the rear side of the main body frame base 600, a speaker unit 920 attached to the rear side of the main body frame base 600 on the left side of the board unit base 910 when viewed from the front, and having a low-frequency speaker 921 inside, a power supply board box 930 attached to the rear side of the board unit base 910 on the right side when viewed from the front, and housing a power supply board inside, an interface control board box 940 attached to the rear of the speaker unit 920 and housing an interface control board inside, and a payout control board unit 950 attached across the power supply board box 930 and the interface control board box 940, and housing a payout control board 951 that controls the payout of game balls inside.

[0030] As shown in Figs. 8 and 9, the game board 5 of the pachinko machine 1 comprises a front component 1000 having an outer rail 1001 and an inner rail 1002 that define the outer periphery of a game area 5a into which game balls are shot and guides game balls shot from a ball launcher 680 to the upper part of the game area 5a, a flat game panel 1100 that is attached to the rear side of the front component 1000 and defines the rear end of the game area 5a, and a box-shaped game panel 1100 that is attached to the lower part of the rear side of the game panel 1100 and is open upward. The pachinko machine 1 comprises a board holder 1200, a main control unit 1300 attached to the rear of the board holder 1200 and having a main control board 1310 for controlling game operation of the pachinko machine 1, a front unit (not shown) attached within the game area 5a on the front side of the game panel 1100 and having a plurality of winning ports capable of receiving game balls shot into the game area 5a, and a back unit 3000 attached to the rear side of the game panel 1100 above the board holder 1200.

[0031] In the pachinko machine 1 of this embodiment, when the player rotates the handle lever 504 while game balls are stored in the upper tray 201, the ball launching device 680 shoots the game balls into the game area 5a of the game board 5 with a strength corresponding to the rotation angle of the handle lever 504. When the game balls shot into the game area 5a are received in a winning hole (not shown), a predetermined number of game balls are paid out to the upper tray 201 by the payout device 830 according to the winning hole into which the game ball was received. This payout of game balls can increase the player's interest, so that the game balls in the upper tray 201 can be shot into the game area 5a, allowing the player to enjoy the game.

[0032] [2. Overall composition of the game board] Next, the overall structure of the game board 5 of the pachinko machine 1 will be described in detail with reference to Figs. 10 to 16. Fig. 10 is a front view of the game board. Fig. 11 is a perspective view of the game board seen from the right front, Fig. 12 is a perspective view of the game board seen from the left front, and Fig. 13 is a perspective view of the game board seen from the back. Fig. 14 is an exploded perspective view of the game board disassembled into its main components and seen from the front, and Fig. 15 is an exploded perspective view of the game board disassembled into its main components and seen from the back. Furthermore, Fig. 16 is a front view of the front components and the front unit of the game board cut at approximately the center in the front-rear direction within the play area.

[0033] The game board 5 of this embodiment has a game area 5a into which game balls are inserted by a player operating the handle lever 504 of the handle unit 500. The game board 5 also includes a front component 1000 that defines the outer periphery of the game area 5a and has a generally rectangular shape when viewed from the front, a plate-shaped game panel 1100 that is attached to the rear side of the front component 1000 and defines the rear end of the game area 5a, a board holder 1200 that is attached to the rear lower part of the game panel 1100, and a main control unit 1300 that is attached to the rear surface of the board holder 1200 and has a main control board 1310 (see FIG. 17) that controls the game content performed by inserting game balls into the game area 5a. A plurality of obstacle nails that come into contact with the game balls are planted in a predetermined gauge arrangement in a portion of the front of the game panel 1100 that is within the game area 5a (not shown).

[0034] The game board 5 further includes a function display unit 1400 that displays the game status based on a control signal from the main control board 1310 and is attached to the lower left corner of the front component 1000 so as to be visible to the player, a peripheral control unit 1500 attached to the rear side of the game panel 1100, a main liquid crystal display device 1600 that is located in the center of the game area 5a when viewed from the front and is capable of displaying a predetermined performance image, a front unit 2000 attached to the front of the game panel 1100, and a rear unit 3000 attached to the rear side of the game panel 1100. The main liquid crystal display device 1600 is attached to the rear side of the rear unit 3000, and the peripheral control unit 1500 is attached to the rear side of the main liquid crystal display device 1600.

[0035] The game panel 1100 comprises a transparent, flat panel plate 1110 whose outer periphery is formed slightly larger than the inner periphery of the frame-shaped front component 1000, and a frame-shaped panel holder 1120 which holds the outer periphery of the panel plate 1110, is attached to the rear side of the front component 1000, and has a rear unit 3000 attached to its rear surface.

[0036] The front unit 2000 is equipped with a plurality of general winning openings 2001 that are always open so as to be able to accept game balls dropped into the game area 5a, a first starting opening 2002 that is always open so as to be able to accept game balls at a different position in the game area 5a from the plurality of general winning openings 2001, a gate unit 2003 that is attached to a predetermined position in the game area 5a and detects the passage of the game ball, a second starting opening 2004 that is able to accept the game ball depending on the result of a normal lottery that is drawn when the game ball passes through the gate unit 2003, and a first large winning opening 2005 and a second large winning opening 2006 that are able to accept the game ball either depending on the result of a first special lottery or a second special lottery that is drawn when the game ball is accepted into the first starting opening 2002 or the second starting opening 2004. The second large prize opening 2006 is composed of two large prize openings, a second upper large prize opening 2006a and a second lower large prize opening 2006b, which are arranged in a single flow path through which the game balls circulate (see Figure 16).

[0037] The front unit 2000 also includes a start port unit 2100 which is attached directly above the out port 1111 in the left-right center of the game area 5a and has a first start port 2002 and a first large prize port 2005, a lower side unit 2200 which is attached along the inner rail 1002 to the left of the start port unit 2100 when viewed from the front and has three general prize ports 2001, an upper side unit 2300 which is attached to the upper left end of the lower side unit 2200 when viewed from the front, and a frame-shaped center device 2500 which is attached approximately in the center of the game area 5a and has one general prize port 2001, a gate portion 2003, a second start port 2004, and a second large prize port 2006.

[0038] The rear unit 3000 is attached to the rear surface of the panel holder 1120, and is box-shaped with an open front and a square opening 3010a in the rear wall of the rear box 3010, a plurality of general winning port sensors 3015 that are arranged at predetermined positions within the rear box 3010 and detect game balls received in the general winning port 2001 of the front unit 2000, and a locking mechanism that is attached to the rear surface of the rear box 3010 and allows the main liquid crystal display device 1600 to be detachably attached. 3020, a right ball passage unit 3030 attached to the right end of the rear box 3010 when viewed from the front, for discharging game balls received in the general winning port 2001 and the second starting port 2004 of the center device 2500, and a lower right ball passage unit 3035 attached near the front end of the lower right corner when viewed from the front, for discharging game balls received in the second large winning port 2006 and the second out port 2543c of the center device 2500.

[0039] The rear unit 3000 also includes an upper relay board 3040 attached to the rear surface of the rear box 3010, an upper relay board cover 3041 covering the rear side of the upper relay board 3040, a box-shaped performance drive board box 3042 rotatably attached to the rear surface of the rear box 3010, a performance drive board 3043 housed within the performance drive board box 3042, a panel relay board 3044 attached to the rear surface of the rear box 3010, and a panel relay board cover 3045 covering the rear side of the panel relay board 3044.

[0040] Furthermore, the rear unit 3000 is equipped with a rear left middle decorative unit 3050 which is attached at the front end of the rear box 3010, from the center in the vertical direction toward the top on the left side when viewed from the front, a rear bottom rear movable performance unit 3100 which is attached below the opening 3010a inside the rear box 3010 and near the rear wall of the rear box 3010, a rear top left movable performance unit 3200 which is attached above the opening 3010a inside the rear box 3010 and on the left side when viewed from the front, a rear left movable performance unit 3300 which is attached to the left side of the opening 3010a inside the rear box 3010 when viewed from the front, a rear top middle movable performance unit 3400 which is attached above the opening 3010a inside the rear box 3010 from the center in the horizontal direction to the right edge when viewed from the front, and a rear bottom front movable performance unit 3500 which is attached below the opening 3010a inside the rear box 3010 in front of the rear bottom rear movable performance unit 3100.

[0041] [2-1. Front components] Next, the front component 1000 will be described mainly with reference to Fig. 14 and Fig. 15. The front component 1000 has an outer shape of a substantially square in front view, an inner shape of a substantially circular shape penetrating in the front-rear direction, and the inner circumference of the inner shape defines the outer circumference of the play area 5a. The front component 1000 includes an outer rail 1001 that extends in an arc shape from the lower end on the left side of the center in the front view to the upper right diagonal direction in the clockwise circumferential direction, passing the upper end of the center in the front view to the upper right diagonal direction, an inner rail 1002 that is disposed inside the front component 1000 along the outer rail 1001 and extends in an arc shape from the lower center in the front view to the upper left diagonal direction in the front view, and an out guide portion 1003 that is formed at the lowest position of the play area 5a on the right side of the lower end of the inner rail 1002 in the front view and is inclined so as to become lower toward the rear.

[0042] In addition, the front component 1000 is equipped with a lower right rail 1004 that slopes linearly from the right end of the out guiding section 1003 when viewed from the front to near the right edge of the front component 1000, with the right end being slightly higher, a right rail 1005 that extends from the right end of the lower right rail 1004 along the right edge of the front component 1000 to the underside of the upper end of the outer rail 1001, with the upper part curved inward of the front component 1000, and a collision stop section 1006 that connects the upper end of the right rail 1005 to the upper end of the outer rail 1001 and is brought into contact with a game ball rolling along the outer rail 1001.

[0043] In addition, the front component 1000 is rotatably supported on the upper end of the inner rail 1002, and is equipped with a backflow prevention member 1007 which is rotatable only between a closed position in which it extends upward from the upper end of the inner rail 1002 to close the gap with the outer rail 1001, and an open position in which it rotates clockwise when viewed from the front to open the gap with the outer rail 1001, and which is biased by a spring (not shown) to return to the closed position.

[0044] A fired ball sensor 1020 is provided on the back side of the game board 5 near the exit of the rails 1001, 1002 (preferably immediately after passing through the backflow prevention member 1007) to detect a game ball shot into the game area 5a. For example, the fired ball sensor 1020 is configured with a magnetic sensor, and outputs a signal when it detects a game ball that has passed through the backflow prevention member 1007 and flowed into the game area 5a. The fired ball sensor 1020 may be provided at a position in the game area through which the game ball always passes. By fixing the position of the fired ball sensor 1020 on the game board 5, specifications can be standardized among multiple models, facilitating inspection at the manufacturing site and inspection after installation in the hall.

[0045] In addition, the shot ball sensor 1020 installed upstream of the game area 5a, such as near the exit of the rails 1001 and 1002, detects the out ball before the winning hole sensor detects the winning of the game ball. In other words, since the game balls are detected in the order of the out ball and the prize ball, the prize ball resulting from the game ball not counted as the out ball is not detected, and the base value can be calculated accurately.

[0046] [2-2. Game Panel] Next, the gaming panel 1100 will be described mainly with reference to Fig. 14 and Fig. 15. The gaming panel 1100 includes a flat panel plate 1110 whose outer circumference is formed slightly larger than the inner circumference of the frame-shaped front component member 1000 and formed of transparent synthetic resin, and a frame-shaped panel holder 1120 which holds the outer circumference of the panel plate 1110 and is attached to the rear side of the front component member 1000 and has a rear unit 3000 attached to its rear surface. The panel plate 1110 of the gaming panel 1100 has an outlet 1111 penetrating from front to rear at a portion which is the lowest position in the playing area 5a. The panel plate 1110 also has a plurality of openings 1112 penetrating from front to rear for mounting the front unit 2000.

[0047] The panel holder 1120 of the game panel 1100 detachably holds the panel board 1110 from the rear side. The panel holder 1120 has a plurality of mounting holes for mounting the rear unit 3000 and a plurality of positioning holes formed on the rear surface.

[0048] When the game panel 1100 is attached to the rear side of the front component 1000, the outlet 1111 of the panel board 1110 opens to the rear side of the out guide portion 1003 of the front component 1000. As a result, game balls that have flowed down to the bottom end of the game area 5a are guided by the out guide portion 1003 to the rear outlet 1111, and are discharged through the outlet 1111 to the rear side of the game panel 1100.

[0049] [2-3. Substrate holder] Next, the board holder 1200 will be described with reference to Figs. 11 to 15. The board holder 1200 is formed in a horizontally long box shape with the top and front open, and the bottom surface is inclined so that it becomes lower toward the center in the left-right direction. When assembled to the game board 5, this board holder 1200 can cover the lower part of the back unit 3000 attached to the rear side of the game panel 1100 from the bottom side. This allows the board holder 1200 to receive all game balls discharged to the rear side of the game panel 1100 through the outlet 1111 and game balls discharged downward from the front unit 2000 and the back unit 3000, and to discharge them downward from the discharge part 1201 (see Fig. 14) formed on the bottom surface.

[0050] [2-4. Main control board unit] Next, the main control unit 1300 will be described with reference to Figures 11 to 15 and 17. The main control unit 1300 is detachably attached to the rear surface of the board holder 1200. This main control unit 1300 includes a main control board 1310 that controls the game content and the payout of game balls, and a main control board box 1320 that houses the main control board 1310 and is attached to the board holder 1200.

[0051] Main control board box 1320 is equipped with multiple sealing mechanisms, and when main control board box 1320 is closed using one sealing mechanism, that sealing mechanism must be destroyed in order to open main control board box 1320 next, leaving traces of the opening and closing of main control board box 1320. Therefore, by looking at the traces of opening and closing, unauthorized opening and closing of main control board box 1320 can be discovered, and the deterrent effect against unauthorized acts on main control board 1310 is enhanced.

[0052] [2-5. Function display unit] Next, the function display unit 1400 will be described with reference to Figs. 10 to 12. As shown in the figures, the function display unit 1400 is attached to the lower left corner of the front component 1000 outside the game area 5a. This function display unit 1400 can be seen from the front (player side) through the through hole 111 of the door frame 3 when the game board 5 is assembled to the pachinko machine 1 (see Fig. 1). This function display unit 1400 uses multiple LEDs based on control signals from the main control board 1310 to display the game status (game situation), normal lottery results, special lottery results, etc.

[0053] The function display unit 1400, although not shown in detail, comprises a status indicator consisting of one LED for displaying the game status, a normal pattern display which displays normal patterns by controlling the blinking of two LEDs based on the result of a normal lottery drawn by the passage of a gaming ball through the gate unit 2003, and then displays these two LEDs in a lighting mode corresponding to the result of the normal lottery, a normal hold display consisting of two LEDs for displaying the number of reserved patterns, which is the number of variable displays of normal patterns relating to the passage of a gaming ball through the gate unit 2003 for which the start condition for the variable display has not yet been met, a first special pattern display which displays a first special pattern by controlling the blinking of eight LEDs based on the result of a first special lottery drawn by the acceptance of a gaming ball through the first start opening 2002 (occurrence of a start winning), and a normal hold display which displays the number of variable displays of normal patterns relating to the passage of a gaming ball through the gate unit 2003 for which the start condition for the variable display has not yet been met, The machine mainly comprises a first special reserved number display consisting of two LEDs for displaying the reserved number, which is the number of variable displays of the first special pattern for which the start condition for the variable display has not yet been met, a second special pattern display which displays the second special pattern by controlling the blinking of the eight LEDs based on the result of a second special lottery drawn upon the acceptance of a game ball into the second starting port 2004 (occurrence of a start winning), and then displays these eight LEDs in a lighting mode according to the result of the second special lottery, a second special reserved number display consisting of two LEDs for displaying the reserved number, which is the number of variable displays of the second special pattern related to the acceptance of a game ball into the second starting port 2004, for which the start condition for the variable display has not yet been met, and a round display consisting of two LEDs for displaying the number of times (number of rounds) the opening and closing pattern of the first large winning port 2005 and the second large winning port 2006 is repeated when the result of the first special lottery or the result of the second special lottery is a "jackpot" or the like. In addition, some of the displays of the function display unit 1400 (for example, the first special symbol display) may be configured with a 7-segment LED.

[0054] This functional display unit 1400 can display the number of reserved items, designs, etc., by appropriately turning on, off, blinking, etc. the LEDs provided therein.

[0055] [2-6. Peripheral control unit] Next, the peripheral control unit 1500 will be described with reference to Fig. 13 and Fig. 15. The peripheral control unit 1500 is attached to the rear surface of the rear box 3010 of the rear unit 3000. The peripheral control unit 1500 comprises a peripheral control board 1510 (see Fig. 17) that controls the effects presented to the player based on control signals from the main control board 1310, and a peripheral control board box 1520 that houses the peripheral control board 1510. The peripheral control board 1510 comprises a peripheral control unit 1511 for controlling light emission effects, sound effects, moving effects, etc., and a liquid crystal display control unit 1512 for controlling effect images (see Fig. 17).

[0056] [2-7. Main LCD display] Next, the main liquid crystal display device 1600 will be described with reference to Figs. 10 to 16. The main liquid crystal display device 1600 is disposed in the center of the game area 5a in a front view, and is attached to the rear side of the game panel 1100 via the rear box 3010 of the rear unit 3000. More specifically, the main liquid crystal display device 1600 is detachably attached to the rear surface at the approximate center of the rear wall of the rear box 3010. This main liquid crystal display device 1600 can be viewed from the front side (player side) through the inside of the frame of the frame-shaped center role 2500 when the game board 5 is assembled. This main liquid crystal display device 1600 is a full-color display device backlit by white LEDs, and can display still images and moving images.

[0057] 14 and 15, the main liquid crystal display device 1600 includes two left fixing pieces 1601 protruding outward from the left side as viewed from the front, and a right fixing piece 1602 protruding outward from the right side as viewed from the front. With the liquid crystal screen facing forward, the main liquid crystal display device 1600 is attached to the rear box 3010 by inserting the two left fixing pieces 1601 from the diagonal rear of the rear box 3010 into two fixing grooves 3010c opening into the left inner peripheral surface as viewed from the front in a frame-shaped liquid crystal mounting portion of the rear box 3010 described later, and then moving the right fixing piece 1602 side forward to insert the right fixing piece 1602 into the opening of the locking mechanism 3020 and sliding the locking mechanism 3020 downward.

[0058] [2-8. Overall composition of the table unit] Next, the front unit 2000 will be described mainly with reference to Figures 10 to 12 and 14 to 16. The front unit 2000 of the game board 5 is attached to the panel plate 1110 of the game panel 1100 from the front, with the front end protruding forward from the front surface of the panel plate 1110 and the rear end penetrating the opening 1112 and protruding rearward from the rear surface of the panel plate 1110. The front unit 2000 of this embodiment is equipped with a plurality of general winning openings 2001 which are always open and capable of accepting game balls dropped into the game area 5a, a first starting opening 2002 which is always open and capable of accepting game balls at a different position in the game area 5a from the plurality of general winning openings 2001, a gate unit 2003 which is attached to a predetermined position in the game area 5a and detects the passage of the game ball, a second starting opening 2004 which is capable of accepting the game ball depending on the result of a normal lottery which is drawn when the game ball passes through the gate unit 2003, and a first large winning opening 2005 and a second large winning opening 2006 which are capable of accepting the game ball depending on the result of a first special lottery or a second special lottery which is drawn when the game ball is accepted into the first starting opening 2002 or the second starting opening 2004.

[0059] Of the multiple (four here) general winning openings 2001, three are located at the bottom of the play area 5a, and the remaining one is located near the upper right in the play area 5a when viewed from the front. The first starting opening 2002 is located directly above the out opening 1111 in the center of the left-right direction in the play area 5a. The gate section 2003 is located approximately directly below the collision stopper section 1006 at the upper right when viewed from the front in the play area 5a. The second starting opening 2004 is located from directly below the gate section 2003 to the right when viewed from the front. Of the multiple general winning openings 2001 described above, the general winning opening 2001 located near the upper right when viewed from the front in the play area 5a is located directly above the second starting opening 2004. The first large winning opening 2005 is located between the first starting opening 2002 and the out opening 1111. The second large prize opening 2006 is located to the right of the first starting opening 2002 when viewed from the front, and above the first large prize opening 2005.

[0060] The second large prize opening 2006 in the front unit 2000 is composed of a second upper large prize opening 2006a and a second lower large prize opening 2006b arranged along one flow path through which game balls circulate, as shown in Fig. 16. The second large prize opening 2006 is arranged such that the second upper large prize opening 2006a is located near the lower right side in a front view within the game area 5a, and the second lower large prize opening 2006b is located below and to the left of the second upper large prize opening 2006a in a front view.

[0061] The front unit 2000 also includes a start port unit 2100 which is attached directly above the out port 1111 in the left-right center of the game area 5a and has a first start port 2002 and a first large prize port 2005, a lower side unit 2200 which is attached along the inner rail 1002 to the left of the start port unit 2100 when viewed from the front and has three general prize ports 2001, an upper side unit 2300 which is attached to the upper left end of the lower side unit 2200 when viewed from the front, and a frame-shaped center device 2500 which is attached approximately in the center of the game area 5a and has one general prize port 2001, a gate portion 2003, a second start port 2004, and a second large prize port 2006.

[0062] [2-8a. Starting unit] Next, the start hole unit 2100 of the front unit 2000 will be described. The start hole unit 2100 is disposed immediately above the outlet 1111 near the lower end of the center in the left-right direction in the game area 5a, and is attached to the panel board 1110 from the front. The start hole unit 2100 has a first start hole 2002 and a first big winning hole 2005.

[0063] The starting hole unit 2100 comprises a flat unit base 2101 attached to the front of the panel plate 1110 and having a first large prize opening 2005 that is rectangular and extends from left to right and penetrates from front to back, a ball receiving portion 2102 that protrudes forward from the upper part of the unit base 2101, approximately in the center in the left-right direction, above the first large prize opening 2005, and forms a first starting hole 2002, a ball guiding portion 2103 attached to the rear of the unit base 2101 and guides downward a game ball received in the first starting hole 2002, a first starting hole sensor 2104 attached to the ball guiding portion 2103 and detects the game ball received in the first starting hole 2002, and a first attacker unit 2110 attached to the rear of the unit base 2101 to close the first large prize opening 2005.

[0064] The first attacker unit 2110 of the starting opening unit 2100 comprises a box-shaped unit case 2111 attached to the rear surface of the unit base 2101 so as to close the first large winning opening 2005 from the rear, the front end of which is approximately the same size as the first large winning opening 2005 and is open forward, a horizontally elongated rectangular flat first large winning opening door member 2112 whose lower side is rotatably supported at the front end of the unit case 2111 so as to open and close the first large winning opening 2005, and a first attacker sole member attached within the unit case 2111 for driving the first large winning opening door member 2112 to open and close. The unit case 2111 is equipped with a first start port sensor 2104, a first large prize port sensor 2114 which is mounted within the unit case 2111 and detects a game ball received in the first large prize port 2005, a start port unit relay board 2115 which is mounted on the top surface of the unit case 2111 and relays the connections between the first start port sensor 2104, the first attacca solenoid, and the first large prize port sensor 2114 and the main control board 1310, and a start port unit decorative board (not shown) which is mounted on the bottom of the unit case 2111 and decorates the first large prize port 2005 with light.

[0065] The ball receiving portion 2102 forming the first starting opening 2002 opens upward and is large enough to receive only one game ball at a time. The first big winning opening 2005 penetrating the unit base 2101 opens forward and is large enough to receive multiple game balls (for example, 4 to 6 balls) at a time.

[0066] The start port unit 2100 has a first start port 2002 formed by a ball receiving portion 2102 that opens upward, and the game ball received in the first start port 2002 is guided downward at the rear side of the unit base 2101 by the ball guide portion 2103, and after being detected by the first start port sensor 2104, it can be discharged downward through the first attacker unit 2110. In this embodiment, two first start port sensors 2104 are provided, and when the two first start port sensors 2104 detect game balls within a predetermined time range, the main control board 1310 determines that the game ball has been received in the first start port 2002. This makes it possible to detect fraudulent acts due to the insertion of fraudulent tools into the first start port 2002.

[0067] In the starting port unit 2100, by attaching the first attacka unit 2110 to the rear surface of the unit base 2101, the first major prize opening door member 2112 of the first attacka unit 2110 is inserted from the rear into the first major prize opening 2005 opening in the unit base 2101, closing the first major prize opening 2005. In an upright state in which the first major prize opening door member 2112 closes the first major prize opening 2005, both left and right ends of the lower side of the first major prize opening door member 2112 are rotatably attached by the unit case 2111, and the first major prize opening 2005 can be changed from a closed state to an open state by rotating the upper side so as to move forward and downward.

[0068] The first large prize opening door member 2112 of the first attacca unit 2110 stands upright in the normal state (when the first attacca solenoid 2113 is not energized) and closes the first large prize opening 2005. When the first attacca solenoid 2113 is energized according to the game state, the first large prize opening door member 2112 rotates so that the upper edge moves forward and downward, and the upper edge is positioned slightly higher than the lower edge. In other words, the first large prize opening door member 2112 is inclined so that it becomes higher from the lower edge of the first large prize opening 2005 toward the front.

[0069] In this state, when a gaming ball flows down in front of the first major winning opening 2005 and abuts against the first major winning opening door member 2112, the inclination of the first major winning opening door member 2112 changes the flow direction of the gaming ball from downward to backward, and the gaming ball is received by the first major winning opening 2005 and enters the unit case 2111. Then, the gaming ball received by the first major winning opening 2005 is detected by the first major winning opening sensor 2114, and then discharged downward from the bottom surface of the unit case 2111.

[0070] [3. Control configuration] Next, the control configuration for performing various controls of the pachinko machine 1 will be described with reference to FIG. 17. FIG. 17 is a block diagram showing the control configuration of the pachinko machine. As shown in the figure, the main control configuration of the pachinko machine 1 is composed of a main control board 1310 and a peripheral control board 1510 attached to the game board 5, and a payout control board 951 attached to the main body frame 4, and each control is shared. The main control board 1310 controls the game operation (progress of the game). The peripheral control board 1510 includes a peripheral control unit 1511 that controls various performance devices during the game based on commands from the main control board 1310, and a liquid crystal display control unit 1512 that controls the display of performance images on the main liquid crystal display device 1600, the upper tray liquid crystal display device 244, etc. based on commands from the peripheral control unit 1511. The payout control board 951 is equipped with a payout control unit 952 that controls the payout of game balls, and a launch control unit 953 that controls the launch of game balls by rotating the handle lever 504.

[0071] [3-1. Main control board] A main control board 1310 that controls the progress of the game includes a main control MPU 1311, which is a microprocessor incorporating a ROM 1313 that stores various processing programs and various commands, a RAM 1312 that temporarily stores data, and the like, a main control I / O port 1314 as an input / output device (I / O device), a main control input circuit 1315 to which detection signals from various detection switches are input, a main control solenoid drive circuit 1316 for driving various solenoids, and a RAM clear switch for completely erasing information stored in the RAM incorporated in the main control MPU 1311. In addition to the incorporated ROM and RAM, the main control MPU 1311 also incorporates a watchdog timer that monitors its operation (system), a function for preventing fraud, and the like.

[0072] The main control MPU 1311 of the main control board 1310 detects a game ball received in the first start opening 2002, a second start opening sensor 2551 detects a game ball received in the second start opening 2004, a general winning opening sensor 3015 detects a game ball received in the general winning opening 2001, a gate sensor 2547 detects a game ball that has passed through the gate portion 2003, a game ball that has passed through the first large winning opening 2005, and a game ball that has passed through the first large winning opening 2006. Detection signals from the first large prize opening sensor 2114 which detects the game balls accepted by the second upper large prize opening 2006a and the second lower large prize opening 2006b as the second large prize opening 2006, the second upper large prize opening sensor 2554 and the second lower large prize opening sensor 2557 which detect game balls accepted by the second upper large prize opening 2006a and the second lower large prize opening 2006b as the second large prize opening 2006, the ejected ball sensor 3060, the fired ball sensor 1020, and a magnetic detection sensor which detects illegal magnetism within the game area 5a, are each input via the main control I / O port 1314.

[0073] Based on these detection signals, the main control MPU 1311 outputs control signals from the main control I / O port 1314 to the main control solenoid drive circuit, thereby outputting drive signals to the start port solenoid 2550, the first attacca solenoid 2113, the second upper attacca solenoid 2553, and the second lower attacca solenoid 2556, and outputs drive signals from the main control I / O port 1314 to the first special pattern display, the second special pattern display, the first special pattern memory display, the second special pattern memory display, the normal pattern display, the normal pattern memory display, the game status display, the round display, etc. of the function display unit 1400.

[0074] In this embodiment, the first start hole sensor 2104, the second start hole sensor 2551, the gate sensor 2547, the first large winning hole sensor 2114, the second upper large winning hole sensor 2554, and the second lower large winning hole sensor 2557 use non-contact type electromagnetic proximity switches, whereas the general winning hole sensor 3015 uses a contact type ON / OFF operation mechanical switch. This is because game balls frequently enter the first start hole 2002 and the second start hole 2004 and frequently pass through the gate section 2003, so that the first start hole sensor 2104, the second start hole sensor 2551, and the gate sensor 2547 frequently detect game balls. For this reason, the first start hole sensor 2104, the second start hole sensor 2551, and the gate sensor 2547 use proximity switches that are highly durable and have a long life. In addition, when an advantageous game state (such as a "jackpot" game) occurs that is advantageous to the player, the first large prize opening 2005 and the second large prize opening 2006 are opened (or enlarged) and game balls enter the opening frequently, so that the first large prize opening sensor 2114, the second upper large prize opening sensor 2554, and the second lower large prize opening sensor 2557 also frequently detect game balls. For this reason, the first large prize opening sensor 2114, the second upper large prize opening sensor 2554, and the second lower large prize opening sensor 2557 also use proximity switches that are highly durable and have a long life. In contrast, the general prize opening 2001, which does not receive game balls frequently, does not frequently receive detection by the general prize opening sensor 3015. For this reason, the general prize opening sensor 3015 uses a mechanical switch that has a shorter life than a proximity switch.

[0075] The main control MPU 1311 also transmits various information related to the game (game information) and various commands related to payouts to the payout control board 951, and receives various commands related to the state of the pachinko machine 1 from the payout control board 951. Furthermore, the main control MPU 1311 transmits various commands related to the control of game presentations executed by the main liquid crystal display device 1600 and the like, and various commands related to the state of the pachinko machine 1, to the peripheral control unit 1511 of the peripheral control board 1510 via the main control I / O port 1314. When the main control MPU 1311 receives various commands related to the state of the pachinko machine 1 from the payout control board 951, it formats these various commands and transmits them to the peripheral control unit 1511.

[0076] Various voltages are supplied to the main control board 1310 from the power supply board in the power supply board box 930. The power supply board that supplies various voltages to the main control board 1310 is equipped with an electric double layer capacitor (hereinafter simply referred to as "capacitor") as a backup power source for supplying power to the main control board 1310 for a predetermined period of time even when the power is cut off. This capacitor allows the main control MPU 1311 to store various information in the RAM 1312 during power cut processing even when the power is cut off. This stored information is completely erased (cleared) from the RAM 1312 when the RAM clear switch of the main control board 1310 is operated when the power is turned on. The operation signal (detection signal) of this RAM clear switch is also output to the dispensing control board 951.

[0077] In addition, the main control board 1310 is provided with a power failure monitoring circuit. This power failure monitoring circuit monitors the drop in various voltages supplied from the power supply board, and when those voltages fall below the power failure warning voltage, it outputs a power failure warning signal as a power failure warning. This power failure warning signal is input to the main control MPU 1311 via the main control I / O port 1314, and is also output to the dispensing control board 951, etc.

[0078] A role ratio display 1317 is attached to the main control board 1310 at a position visible from the back side of the pachinko machine 1. The role ratio display 1317 displays the role ratio calculated by the main control MPU 1311.

[0079] In addition, the main control board 1310 is provided with a display switch 1318. The display switch 1318 is preferably configured as a push button switch that performs a momentary operation, but may be another type of switch. When the display switch 1318 is operated, the reel ratio is displayed on the reel ratio display 1317. Note that the reel ratio display 1317 may always display the reel ratio, and the display content may be switched by operating the display switch 1318.

[0080] FIG. 18 is a diagram showing the internal configuration of the main control MPU 1311.

[0081] The main control MPU 1311 has a CPU 13111, a RAM 1312, a ROM 1313, a random number generation circuit 13112, a parallel input port 13113, a serial communication circuit 13114, a timer circuit 13115, an interrupt controller 13116, an external bus interface 13117, a clock circuit 13118, a matching block 13119, unique information 13120, an arithmetic circuit 13121 and a reset circuit 13122.

[0082] The CPU 13111 executes a program stored in the ROM 1313. The RAM 1312 stores data required when executing the program.

[0083] The main control MPU 1311 is provided with one or more random number generating circuits 13112. The random number generating circuit 13112 provides random numbers for determining the lottery results of the variable display game (first special lottery result, second special lottery result) and the presentation contents of the variable display game. The random number generating circuit 13112 is a so-called hard random number generating means that outputs random numbers updated at the timing of a clock cycle (or a signal obtained by dividing the clock cycle) supplied to the main control MPU 1311, for example. The hard random numbers generated by the random number generating circuit 13112 are used for the lottery of a winning special symbol, the lottery of a winning symbol of the special symbol variable display game, and the lottery of a winning normal symbol.

[0084] The parallel input port 13113 is a port to which detection signals from various detection switches are input via a main control input circuit 1315 .

[0085] The serial communication circuit 13114 transmits and receives various commands related to the control of game performances and various commands related to the state of the pachinko machine 1 to and from the peripheral control unit 1511 of the peripheral control board 1510 via the main control I / O port 1314. Also, the serial communication circuit 13114 transmits and receives various information related to games (game information) and various commands related to the payout of game balls to the payout control board 951 via the main control I / O port 1314. Furthermore, the serial communication circuit 13114 transmits data for displaying the bonus ratio to the bonus ratio display 1317. A detailed configuration of the serial communication circuit 13114 will be described later with reference to FIG. 20.

[0086] The timer circuit 13115 is a timer for timer interrupts and various time controls. The interrupt controller 13116 controls various interrupts (general interrupts, NMI that cannot be masked by software) to the CPU 13111. That is, when the interrupt controller 13116 detects an interrupt, it refers to a processing address table defined for each type of interrupt, and jumps to an address set in the processing address table.

[0087] The external bus interface 13117 is an interface for connecting the internal bus of the main control MPU 1311 to an external device. The external bus interface 13117 can input and output an I / O request (IORQ), a read (RD), a write (WR), a 16-bit address (A0 to A15), and 8-bit data (D0 to D7).

[0088] The clock circuit 13118 generates an internal clock for the main control MPU 1311 from an input external clock signal (e.g., 32 MHz). The clock circuit 13118 also divides the input clock signal by a set number and outputs the result to the outside from the CLKO terminal. For example, the clock circuit 13118 may output a clock signal to be supplied to the driver circuit 13171 (see FIG. 28) of the role ratio display 1317.

[0089] The verification block 13119 is a functional block that verifies whether the ROM 1313 has been illegally modified by using a predetermined code. The unique information 13120 is an ID unique to the main control MPU 1311, and is written in a non-rewritable manner when the chip is manufactured.

[0090] The arithmetic circuit 13121 provides an arithmetic function that is not dependent on the programs recorded in the ROM 1313. This arithmetic function is written in a fixed manner when the chip is manufactured.

[0091] The reset circuit 13122 has an undesignated running prohibition circuit, a watchdog timer, and a user reset function. When the CPU 13111 accesses an address other than a specified address in the ROM 1313, the undesignated running prohibition circuit assumes that the access is due to an unauthorized program, and resets the operation of the main control MPU 1311. The watchdog timer outputs a timeout signal when a specified timer time has elapsed, and resets the operation of the main control MPU 1311. The user reset function resets the operation of the main control MPU 1311 by a reset signal input to the SRST terminal.

[0092] FIG. 19 is a block diagram showing a detailed configuration of the arithmetic circuit 13121.

[0093] The arithmetic circuit 13121 provides an arithmetic function for the calculation result independent of a program, and includes a multiplication circuit 131211 and a division circuit 131215 .

[0094] The multiplication circuit 131211 is an arithmetic circuit that multiplies two values ​​of a predetermined number of bits (for example, 16 bits) and outputs a 32-bit product, and functions as a conversion circuit that converts input values ​​(multiplier, multiplicand) into a product using a multiplication function and outputs it.

[0095] The CPU 13111 of the main control MPU 1311 stores a multiplier and a multiplicand of 16 bits or less in the multiplication input register A 131212 and the multiplication input register B 131213. The multiplication circuit 131211 reads out the values ​​stored in the two 16-bit multiplication input registers 131212 and 131213 at a predetermined timing, and stores the result of multiplying the two values ​​in the multiplication result register 131214. The CPU 13111 obtains the multiplication result from the multiplication result register 131214. The process from writing the values ​​to the multiplication input registers 131212 and 131213 to storing the calculation result in the multiplication result register 131214 is configured to be completed in a predetermined time (for example, one clock), and the CPU 13111 can obtain the multiplication result by referring to the multiplication result register 131214 after a predetermined number of clocks have elapsed after storing the values ​​in the multiplication input registers 131212 and 131213.

[0096] The division circuit 131215 is an arithmetic circuit that divides a dividend of a predetermined number of bits (e.g., 32 bits) by a divisor of a predetermined number of bits (e.g., 32 bits) to output a 32-bit quotient and a 32-bit remainder, and functions as a conversion circuit that converts the input values ​​(divisor, dividend) into a quotient and remainder using a division function and outputs them.

[0097] The CPU 13111 of the main control MPU 1311 stores a dividend of 32 bits or less in the division input register A 131216, and stores a divisor of 32 bits or less in the division input register B 131217. When the division circuit 131215 detects that values ​​are stored in both of the two 32-bit division input registers 131216 and 131217, it reads out the stored values ​​at a predetermined timing, stores a quotient, which is a result of dividing the dividend by the divisor, in the division result register A 131218, and stores the remainder in the division result register B 131219. When the division circuit 131215 reads in the values ​​stored in the division input registers 131216 and 131217, it may erase the read values ​​and clear the registers. Furthermore, the division circuit 131215 may read out the values ​​stored in the division input registers 131216 and 131217 at the timing when a start command is input, and store the division results in the division result registers 131218 and 131219. In this case, the values ​​stored in the division input registers 131216 and 131217 do not need to be erased at the timing of reading them in. Furthermore, the division input registers 131216 and 131217 may already have values ​​stored therein (without clearing the stored values), and may further be able to overwrite the values.

[0098] The CPU 13111 obtains the division result from the division result registers 131218, 131219. The process from writing values ​​to the division input registers 131216, 131217 to storing the calculation result in the division result registers 131218, 131219 is configured to be completed in a predetermined time (e.g., 32 clocks), and the CPU 13111 can obtain the quotient and remainder by referring to the division result registers 131218, 131219, respectively, after storing values ​​in the division input registers 131216, 131217 and a predetermined number of clocks has elapsed.

[0099] In the pachinko machine 1 of this embodiment, as described later, a division process is required to calculate the base value, and the division program executed by the CPU 13111 is executed by multiple multiplications and subtractions, so it takes a considerable amount of time. For this reason, it is difficult to execute the base calculation process for each timer interrupt process, and it is difficult to display the base value without delay. In contrast, by executing the division process using the arithmetic circuit 13121, the time required to calculate the base value can be shortened, and the base value can be calculated multiple times in one timer interrupt process (see Figures 75 and 80). In addition, the CPU 13111 is not occupied by the division process during the period from writing values ​​to the division input registers 131216 and 131217 of the arithmetic circuit 13121 to reading the calculation result from the division result register A 131218, so that other processes can be executed, and the base calculation process during the timer interrupt process can be executed efficiently.

[0100] FIG. 20 is a diagram showing the configuration of the serial communication circuit 13114.

[0101] The serial communication circuit 13114 has four data transmission / reception circuits, and each data transmission / reception circuit transmits / receives one channel's worth of data to / from a predetermined device. Note that in Fig. 20, only the data transmission circuits are illustrated, and a description of the data reception circuits (for example, one channel's worth of implementation) is omitted.

[0102] In the gaming machine of this embodiment, as described above, the serial communication circuit 13114 uses three channels: channel 0 used for communication with the peripheral control board 1510, channel 1 used for communication with the payout control board 951, and channel 2 used for communication with the driver circuit 13171 of the bonus ratio display 1317, and channel 3 is unused.

[0103] The serial communication circuit 13114 has a data register 3141 , a transmission data register 3142 , a parity generation circuit 3143 , a transmission shift register 3144 , a command status register 3145 , a communication setting register 3146 , a transmission trigger setting level register 3147 , a baud rate register 3148 and a baud rate generation circuit 3149 .

[0104] Data input from the CPU 13111 is stored in a data register 3141, and then stored in a transmission data register 3142. The transmission data register 3142 is configured with a FIFO of a predetermined capacity (for example, 64 bytes). The transmission data register 3142 adds an error detection code generated by a parity generation circuit 3143 for each transmission unit of data to the data to be transmitted, and stores the data in a transmission shift register 3144.

[0105] The baud rate generation circuit 3149 generates a transmission clock signal for transmitting data at a rate set in the baud rate register 3148, from the clock signal supplied from the clock circuit 13118. Then, the transmission shift register 3144 transmits data in accordance with the transmission clock signal.

[0106] The command status register 3145 is a register that is referenced to check the transmission status.

[0107] The communication setting register 3146 stores a command for controlling data transmission. The transmission trigger setting level register 3147 stores a threshold for controlling the amount of data at which the FIFO of the transmission data register 3142 generates an interrupt. The baud rate register 3148 stores a baud rate setting for defining the data transmission rate. The communication setting register 3146, the transmission trigger setting level register 3147, and the baud rate register 3148 are set for each of the four channels as initial settings in step S28 of FIG. 21.

[0108] These settings will be explained in detail below. The communication setting register is set with the communication format of each channel. Specifically, the use of FIFO (FIFO mode, normal mode), the number of stop bits, and parity (whether parity is used, even parity, or odd parity) are set. For example, in channel 0 used for communication with the peripheral control board 1510 and channel 1 used for communication with the payout control board 951, 1XXX1010B meaning FIFO mode, stop bit=1 bit, and even parity is set, and in channel 2 used for communication with the driver circuit 13171 of the role ratio display 1317, 1XXX1000B meaning FIFO mode, stop bit=1 bit, and no parity is set.

[0109] In the FIFO mode, data is transmitted using the FIFO of the transmission data register 3142. In addition, since the gaming machine is in a noisy environment, it is desirable to set parity when transmitting data to the outside of the main control board 1310 at high speed.

[0110] Since the role ratio display 1317 is mounted on the main control board 1310, it is less affected by noise compared to communication with other boards via communication wires. Also, since the amount of data sent and received is small, the communication speed can be low and there is little need to use parity. Note that a ground pattern can be provided along the pattern that transmits signals between the driver circuit 13171 of the role ratio display 1317 and the main control MPU 1311 (for example, on a layer adjacent to the left and right and / or thickness direction of a signal line provided on the surface or inner layer of a printed circuit board), and the shielding effect of the ground pattern can reduce noise superimposed on the signal transmission pattern.

[0111] The transmission trigger setting level register 3147 determines the amount of data at which the FIFO of the transmission data register 3142 generates an interrupt. Specifically, when the amount of transmission data stored in the FIFO of the transmission data register 3142 is smaller than the set number of bytes, a predetermined bit of a status register corresponding to each channel is set. By checking the corresponding bit of the status register, it is possible to confirm whether or not there is free space in the FIFO of the transmission data register 3142, and to determine the transmission timing of the data stored in the FIFO of the transmission data register 3142.

[0112] In order to determine whether there is an abnormality in the transmission FIFO, the relevant bit of the status register can be used. For example, even if data is not written to the FIFO of the transmission data register 3142 for a predetermined period of time, if the relevant bit of the status register is not set, it is possible to determine that no data is being transmitted from the FIFO of the transmission data register 3142 because there is no free space in the FIFO of the transmission data register 3142, and to execute error processing (for example, an error notification).

[0113] The baud rate register 3148 determines the data transmission rate. For example, 19200 bps is set for channel 0 used for communication with the peripheral control board 1510, 1200 bps is set for channel 1 used for communication with the payout control board 951, and 1200 bps is set for channel 2 used for communication with the driver circuit 13171 of the role ratio display 1317.

[0114] In this way, the transmission rate is changed depending on the data transmitted through each channel. This is because game balls roll inside the gaming machine, and the electronic circuit of the gaming machine is in an environment that is easily affected by noise. For this reason, data for controlling the ball output, which is directly related to the profit given to the player, is transmitted to the payout control board 951 at a low speed so that the data is transmitted reliably. On the other hand, the peripheral control board 1510 transmits data at a high rate because the amount of data transmitted is large and is not related to the ball output. In addition, the peripheral control board 1510 verifies whether the received command is abnormal, and if it is determined to be abnormal, it does not operate the peripheral control board 1510 or executes abnormal processing (for example, communication error notification) and requests retransmission of the command. Then, if it is determined that the retransmitted command is normal, the state of the peripheral control board 1510 is restored using the normal command. For this reason, communication with the peripheral control board 1510 can transmit data at a high rate. Furthermore, if the communication rate with the peripheral control board 1510 is reduced, the player may become aware of the delay between the winning of the starting gate and the start of the pattern change, which may reduce interest.

[0115] The communication with the driver circuit 13171 of the role ratio display 1317 may be at a high rate (19200 bps, which is the data transmission rate with the peripheral control board 1510) or at a low rate (1200 bps, which is the data transmission rate with the payout control board 951). In addition, the communication with the driver circuit 13171 of the role ratio display 1317 may adopt a rate between the high rate (19200 bps, which is the data transmission rate with the peripheral control board 1510) and the low rate (1200 bps, which is the data transmission rate with the payout control board 951). This is because if the data transmission rate is increased, there is a possibility that other circuits may malfunction due to switching noise of the transistors of the driver circuit 13171 of the role ratio display 1317. On the other hand, even if an abnormality occurs in the transmitted data due to noise, the same data is resent at each timer interrupt unless the transmitted data is updated, and if the resent command is normal, the display content of the reel ratio display 1317 returns to normal, so there is no need to make the transmission rate extremely slow.

[0116] The command status register 3145 is a register referenced to check the transmission status, and for example, each bit is defined as follows: Bit 7: SnTC A flag indicating completion of transmission, where 0 indicates transmission in progress and 1 indicates completion of transmission. Bit 6: SnTDBE In normal mode (communication mode not using FIFO), this is a flag indicating that the transmission data is empty, where 0 indicates that the data has not been transferred to the transmission shift register and 1 indicates that the data has been transferred to the transmission shift register. In other words, this is set when data is transferred from the transmission data register 3142 to the transmission shift register 3144 and no transmission data is stored in the transmission data register 3142.

[0117] In the SnTFTL FIFO mode, this is a flag indicating the transmission FIFO trigger level, with 0 indicating that the amount of transmission data stored in the FIFO of the transmission data register 3142 is equal to or greater than the trigger level, and 1 indicating that the amount of transmission data stored in the FIFO of the transmission data register 3142 is less than the trigger level. In other words, this bit is set when the amount of transmission data stored in the FIFO of the transmission data register 3142 is less than the number of bytes set in the transmission trigger level setting register. Therefore, during communication in the FIFO mode, data is written to the FIFO of the transmission data register 3142 after confirming that the bit is 1. Bits 5-2: Unused (fixed to 0) Bit 1: SnTCL This bit is written from outside to clear the transmit buffer and break code transmission, empty the transmit data, or set the transmit FIFO trigger level (SnTFL). For example, to forcibly clear the buffer contents, set this bit to 1. More specifically, this is used when a command has been written to the FIFO, but transmission of the written command is cancelled due to some circumstances (for example, an abnormality has occurred). Note that even if bit 1 is set, the data in the transmit shift register is not cleared.

[0118] In the configuration described above, the serial communication circuit 13114 is capable of start-stop synchronous communication (asynchronous communication), but outputs a clock signal for synchronous communication (not shown). In this case, the clock signal supplied to the communication partner (driver circuit 13171 of the role ratio display 1317) is output from the serial communication circuit 13114, not from the clock circuit 13118. At least one channel of each transmitting / receiving circuit of the serial communication circuit 13114 may be capable of synchronous communication by setting, or a serial communication circuit for start-stop synchronous communication and a serial communication circuit for synchronous communication may be provided separately.

[0119] Although not shown, the serial communication circuit 13114 outputs a signal (LOAD) indicating the data loading timing used during synchronous communication.

[0120] [3-2. Dispense control board] Returning to Fig. 17, the explanation of the control configuration of the pachinko machine will be continued. Although detailed illustration is omitted, the payout control board 951 that controls the payout of game balls, etc., includes a payout control unit 952 that performs various controls related to payout, a launch control unit 953 that performs launch control by the launch solenoid 682 and ball feed control by the ball feed solenoid 551, an error LED indicator that displays the status of the pachinko machine 1, an error release switch for releasing the error displayed on the error LED indicator, and a ball removal switch for discharging the game balls in the ball tank 802, tank rail 803, ball guide unit 820, and payout device 830 to the outside of the pachinko machine 1 and starting the ball removal operation.

[0121] [3-2a. Dispatch control unit] The dispensing control unit 952, which performs various controls related to dispensing in the dispensing control board 951, is equipped with a dispensing control MPU, which is a microprocessor with built-in ROM for storing various processing programs and various commands and RAM for temporarily storing data, a dispensing control I / O port as an I / O device, an external WDT (external watchdog timer) for monitoring whether the dispensing control MPU is operating normally, a dispensing motor drive circuit for outputting a drive signal to the dispensing motor 834 of the dispensing device 830, and a dispensing control input circuit to which detection signals from various detection switches related to dispensing are input. In addition to its built-in ROM and RAM, the dispensing control MPU also has built-in functions for preventing fraud.

[0122] The payout control MPU of the payout control unit 952 receives various information regarding the game (game information) and various commands regarding payout from the main control board 1310 in a serial manner via the payout control I / O port, and inputs the operation signal (detection signal) of the RAM clear switch from the main control board 1310 via the payout control I / O port.In addition, it inputs detection signals from the full tank detection sensor 535, as well as detection signals from the ball out detection sensor 827, the payout detection sensor 842, and the blade rotation detection sensor 840.

[0123] Detection signals from the ball out detection sensor 827, dispensing detection sensor 842, and blade rotation detection sensor 840 of the dispensing device 830 are input to the dispensing control input circuit and input to the dispensing control MPU via the dispensing control I / O port.

[0124] In addition, detection signals from the door frame opening switch, which detects the opening of the door frame 3 relative to the main frame 4, and the main frame opening switch, which detects the opening of the main frame 4 relative to the outer frame 2, are input to the dispensing control input circuit and input to the dispensing control MPU via the dispensing control I / O port.

[0125] In addition, the detection signal from the full tank detection sensor 535 of the fall cover unit 520 is input to the dispensing control input circuit and input to the dispensing control MPU via the dispensing control I / O port.

[0126] The payout control MPU outputs a drive signal for driving the payout motor 834 to the payout motor 834 via the payout control I / O, outputs a signal for displaying the status of the pachinko machine 1 on the error LED indicator to the error LED indicator via the payout control I / O port, transmits a command for indicating the status of the pachinko machine 1 to the main control board 1310 via the payout control I / O port in a serial manner, and outputs the number of game balls actually paid out to the external terminal board 784 via the payout control I / O port. This external terminal board 784 is connected to a hall computer installed on the gaming hall side. This hall computer monitors the game of the player by grasping the number of game balls paid out by the pachinko machine 1 and game information of the pachinko machine 1. Among the signals output from the external terminal board 784, the signals generated by the main control board 1310 are output from the external terminal board 784 via the payout control board 951 from the main control board 1310. In addition, the signal generated by the main control board 1310 may be output from the external terminal board 784 without passing through the dispensing control board 951.

[0127] The error LED indicator is a segment indicator that displays alphanumeric characters, figures, etc. to indicate the status of the pachinko machine 1. The error LED indicator displays and notifies the following: For example, when the figure "-" is displayed, it indicates "normal", when the number "0" is displayed, it indicates "connection abnormality" (specifically, that there is an abnormality in the electrical connection between the main control board 1310 and the payout control board 951), when the number "1" is displayed, it indicates "ball out" (specifically, that there are no game balls in the payout device 830 based on the detection signal from the ball out detection sensor 827), when the number "2" is displayed, it indicates "ball stuck" (specifically, that the payout blade and the game ball are engaged in the payout passage of the payout device 830 based on the detection signal from the blade rotation detection sensor 840, making it difficult for the payout blade to rotate), and when the number "3" is displayed, it indicates a "counting switch error" (specifically, that there is no game ball in the payout device 830 based on the detection signal from the blade rotation detection sensor 842). When the number "5" is displayed, it notifies that there is a "retry error" (specifically, that the number of retries of the payout operation has reached a preset upper limit value); when the number "6" is displayed, it notifies that it is "full" (specifically, that the tank is full with the game balls stored in the fault cover unit 520 based on the detection signal from the full tank detection sensor 535); when the number "7" is displayed, it notifies that "CR not connected" (that the electrical connection has been cut somewhere from the payout control board 951 to the CR unit); and when the number "9" is displayed, it notifies that it is "stocking" (specifically, that the number of game balls that have not yet been paid out has reached a preset number).

[0128] A ball loan request signal from the ball loan button and a prepaid card return request signal from the return button are input to the CR unit. The CR unit serially transmits a signal specifying the number of balls to be loaned in accordance with the ball loan request signal to the payout control board 951, and this signal is received by the payout control I / O port and input to the payout control MPU. The CR unit also updates the remaining balance of the inserted prepaid card according to the number of loaned balls, and outputs a signal to display the remaining balance on the display unit, and this signal is input to the display unit and displayed.

[0129] [3-2b. Launch control section] The launch control unit 953, which controls launch by the launch solenoid 682 and ball delivery by the ball delivery solenoid 551, includes a launch control input circuit to which detection signals from various launch-related detection switches are input, an oscillation circuit that outputs a clock signal at regular intervals, a launch timing control circuit that outputs a launch reference pulse for launching game balls toward the game area 5a based on this clock signal, a launch solenoid drive circuit that outputs a drive signal to the launch solenoid 682 based on this launch reference pulse, and a ball delivery solenoid drive circuit that outputs a drive signal to the ball delivery solenoid 551 based on the launch reference pulse. The launch timing control circuit generates a launch reference pulse based on the clock signal from the oscillation circuit so that 100 game balls are launched per minute toward the game area 5a and outputs it to the launch solenoid drive circuit, and also generates a ball delivery reference pulse that is a predetermined number of times the launch reference pulse and outputs it to the ball delivery solenoid drive circuit.

[0130] In the handle unit 500, the detection signals from the contact detection sensor 509, which detects whether the palm or fingers are touching the handle lever 504, and the stop button, which detects whether the player will forcibly stop shooting the game balls, are input to the launch control input circuit and then to the launch timing control circuit. When the CR unit and the CR unit connection terminal board are electrically connected, the signal is input to the launch control input circuit as a CR connection signal and then to the launch timing control circuit. A signal from the handle operation sensor 507, which electrically adjusts the strength with which the game balls are shot toward the play area 5a according to the rotation position of the handle lever 504, is input to the launch solenoid drive circuit.

[0131] The launch solenoid drive circuit outputs a drive current to the launch solenoid 682 to launch the game ball with a launch strength corresponding to the rotation position of the handle lever 504 based on a signal from the handle operation sensor 507, when the launch reference pulse is input. On the other hand, the ball feed solenoid drive circuit outputs a constant current to the ball feed solenoid 551 when the ball feed reference pulse is input, so that one game ball stored in the upper tray 201 of the tray unit 200 is received in the ball feed unit 540, and when the input of the ball feed reference pulse is completed, the output of the constant current is stopped to send the received game ball to the ball launch device 680. In this way, the drive current output from the launch solenoid drive circuit to the launch solenoid 682 is variably controlled, whereas the drive current output from the ball feed solenoid drive circuit to the ball feed solenoid 551 is constantly controlled.

[0132] In addition, the power supply board that supplies various voltages to the dispensing control board 951 is equipped with a capacitor as a backup power supply to supply power to the main control board 1310 for a predetermined period of time even when the power is cut off. This capacitor allows the dispensing control MPU to store various information in the RAM of the dispensing control board 951 during power off processing even when the power is cut off. This stored information is completely erased (cleared) from the RAM of the dispensing control board 951 when the RAM clear switch of the main control board 1310 is operated when the power is turned on.

[0133] [3-3. Peripheral control board] As shown in FIG. 17, the peripheral control board 1510 is equipped with a peripheral control unit 1511 that controls the performance based on commands from the main control board 1310, and an LCD display control unit 1512 that controls the drawing of the main LCD display device 1600, the sub LCD display device 3114, and the upper tray LCD display device 244 based on control data from this peripheral control unit 1511.

[0134] [3-3a. Peripheral control unit] The peripheral control unit 1511, which controls the performance on the peripheral control board 1510, is equipped with a peripheral control MPU as a microprocessor (not shown in detail), a peripheral control ROM that stores various processing programs and various commands, a sound source IC that performs high-quality sound performance, and a sound ROM that stores sound information such as music and sound effects referenced by this sound source IC.

[0135] The peripheral control MPU has multiple built-in parallel I / O ports, serial I / O ports, etc., and when it receives various commands from the main control board 1310, it transmits game board side light emission data for outputting a lighting signal, a blinking signal, or a gradation lighting signal to the color LEDs, etc., provided on each decorative board of the game board 5 from the serial I / O port for the lamp drive board to the performance drive board 3043 based on these various commands, transmits game board side drive data for outputting a drive signal to a drive motor that operates various performance units provided on the game board 5 from the serial I / O port for the game board decoration drive board to the performance drive board 3043, and transmits a vibration device 24 provided on the door frame 3 to the serial I / O port for the game board decoration drive board to the performance drive board 3043. The serial I / O port for the frame decoration drive board transmits door side drive light-emitting data, which is composed of door side drive data for outputting drive signals to electrical drive sources such as the door right bottom drive motor 272 and the door side light-emitting data for outputting lighting signals, flashing signals or gradation lighting signals to the color LEDs etc. provided on each decorative board of the door frame 3, to the door frame 3 side, and control data (display commands) indicating the screen to be displayed on the main LCD display device 1600 and the upper tray LCD display device 244 is transmitted from the serial I / O port for the LCD control unit to the LCD display control unit 1512, and a control signal (sound command) for extracting sound information from the sound ROM is output to the sound source IC.

[0136] Detection signals from various position detection sensors for detecting the positions of various performance units provided on the game board 5 are input to the peripheral control MPU via a performance drive board 3043 attached to the rear surface of the back box. In addition, detection signals from the touch panel 246 and performance button press sensor 258 of the performance operation unit 220 provided on the door frame 3 are input to the peripheral control MPU.

[0137] In addition, the peripheral control MPU receives a signal (operation signal) from the liquid crystal display control unit 1512 indicating that the liquid crystal display control unit 1512 is operating normally, and monitors the operation of the liquid crystal display control unit 1512 based on this operation signal.

[0138] The sound source IC extracts sound information from the sound ROM based on control data (sound commands) from the peripheral control MPU, and controls the speakers 921 and the like provided on the door frame 3 and the main body frame 4 to play music and sound effects according to various performances. The volume can be adjusted by rotating a volume protruding backward from the peripheral control board box 1520 in which the peripheral control board 1510 is housed. In this embodiment, sound signals (e.g., 2ch stereo signals, 4ch stereo signals, 2.1ch surround signals, or 4.1ch surround signals) as sound information are sent to the multiple speakers on the door frame 3 side and the bass speaker 921 on the main body frame 4, so that a more realistic sound effect (sound performance) can be presented than in the past.

[0139] In addition to the built-in WDT (watchdog timer) built into the peripheral control MPU, the peripheral control unit 1511 also has an external WDT (watchdog timer) (not shown), and the peripheral control MPU uses both the built-in WDT and the external WDT to diagnose whether its own system is running out of control.

[0140] The display commands output from the peripheral control MPU to the liquid crystal display control unit 1512 are carried out through a serial input / output port, and in this embodiment, the bit rate (the size of data that can be transmitted per unit time) is set to 19.2 kilobits per second (Kbps). On the other hand, the initial data, door frame side lighting and blinking commands, game board side lighting and blinking commands, movable body driving commands, and display commands are output from the peripheral control MPU to the performance driving board 3043 attached to the rear surface of the rear box through a plurality of different serial input / output ports, and in this embodiment, the bit rate is set to 250 Kbps.

[0141] This performance driving board 3043 outputs a lighting signal or a flashing signal based on the received door frame side lighting and flashing command to the LEDs of each decorative board provided on the door frame 3, and outputs a lighting signal or a flashing signal based on the received game board side lighting and flashing command to the LEDs of each decorative board provided on the game board 5.

[0142] In addition, the performance drive board 3043 outputs a drive signal based on the received drive command to the vibration device 242 and the lower right door drive motor 272 provided on the door frame 3, and to each drive motor provided on the game board 5, etc.

[0143] [3-3b. Various control processes of peripheral control units] First, the peripheral control unit power-on process will be described with reference to FIG. 60. When the power is turned on to the pachinko machine 1, the peripheral control MPU (not shown) of the peripheral control unit 1511 shown in FIG. 17 performs the peripheral control unit power-on process as shown in FIG. 60. When this peripheral control unit power-on process starts, the performance control program performs an initial setting process under the control of the peripheral control MPU (step S1000). In this initial setting process, the performance control program performs a process of initializing the peripheral control MPU itself, a process of determining whether it is a hot start or a cold start, and a process of setting a wait timer after reset. The peripheral control MPU first performs a process of initializing itself, and the time required for the process of initializing the peripheral control MPU is on the order of microseconds (μs), so that the peripheral control MPU can be initialized in an extremely short time. As a result, the peripheral control MPU is in a state where interrupt permission is set, and is in a state where it can receive various commands, such as commands related to the control of game performances and commands related to the state of the pachinko machine 1, output from the main control board 1310 in the peripheral control unit command reception interrupt process described later.

[0144] Following step S1000, the performance control program performs a current time information acquisition process (step S1002). In this current time information acquisition process, calendar information specifying the date and time information specifying the hour, minute, and second are acquired from the RTC control unit, and are set in the calendar information storage unit as the current calendar information in the peripheral control RAM, and are also set in the time information storage unit as the current time information.

[0145] Following step S1002, the performance control program sets the V blank signal detection flag VB-FLG to a value of 0 (step S1006). This V blank signal detection flag VB-FLG is a flag for determining whether or not to execute the peripheral control unit regular processing described later, and is set to a value of 1 when the peripheral control unit regular processing is executed, and to a value of 0 when the peripheral control unit regular processing is not executed. The V blank signal detection flag VB-FLG is set to a value of 1 in the peripheral control unit V blank signal interrupt processing described later, which is executed in response to the input of a V blank signal that indicates that the peripheral control MPU is in a state where it is possible to accept screen data. In this step S1006, the V blank signal detection flag VB-FLG is initialized once by setting the V blank signal detection flag VB-FLG to a value of 0.

[0146] Following step S1006, the performance control program determines whether or not the V blank signal detection flag VB-FLG is equal to the value 1 (step S1008). If the V blank signal detection flag VB-FLG is not equal to the value 1 (it is equal to the value 0), the program returns to step S1008 and repeatedly determines whether or not the V blank signal detection flag VB-FLG is equal to the value 1. By repeating such determinations, the program enters a standby state until the peripheral control unit executes normal processing.

[0147] When the V blank signal detection flag VB-FLG is set to 1 in step S1008, that is, when the peripheral control unit steady-state processing is to be executed, the steady-state processing in progress flag SP-FLG is first set to 1 (step S1009). This steady-state processing in progress flag SP-FLG is set to 1 when the peripheral control unit steady-state processing is being executed, and is set to 0 when the peripheral control unit steady-state processing has been executed.

[0148] Following step S1009, the performance control program performs a 1 ms interrupt timer start process (step S1010). In this 1 ms interrupt timer start process, a 1 ms interrupt timer for executing a peripheral control unit 1 ms timer interrupt process, which will be described later, is started, and the 1 ms timer interrupt execution count STN for counting the number of times the 1 ms interrupt timer is started and the peripheral control unit 1 ms timer interrupt process is executed is set to a value of 1, thereby initializing the 1 ms timer interrupt execution count STN. This 1 ms timer interrupt execution count STN is updated by the peripheral control unit 1 ms timer interrupt process.

[0149] Following step S1010, the performance control program performs lamp data output processing (step S1012). In this lamp data output processing, the performance control program performs DMA serial continuous transmission to the lamp drive board 4170 shown in Fig. 119. Here, the peripheral control DMA controller of the peripheral control MPU is used to perform serial I / O port continuous transmission for the lamp drive board.

[0150] Following step S1012, the performance control program performs a performance operation unit monitoring process (step S1014). In this performance operation unit monitoring process, in a performance operation unit information acquisition process in a peripheral control unit 1 ms timer interrupt process described later, the operation of the operation button 220C is monitored based on various information acquired based on detection signals from various detection switches provided in the performance operation unit 220, and whether or not the operation state of the operation button 220C is reflected in the game performance is appropriately determined.

[0151] Following step S1014, the performance control program performs a display data output process (step S1016). In this display data output process, the sound source VDP outputs one screen's worth of drawing data (one frame's worth) generated on the built-in VRAM of the sound source VDP in the display data creation process described below to the game board side decorative board 3053 and the door frame side decorative board 233. As a result, various screens are drawn on the game board side decorative board 3053 and the door frame side decorative board 233.

[0152] Following step S1016, the performance control program performs a sound data output process (step S1018). In this sound data output process, the performance control program outputs to the speaker 921 sound data such as music and sound effects set in the sound source built-in VDP in the sound data creation process described later, and also outputs to the speaker 921 sound data such as notification sounds and announcement sounds in addition to music and sound effects.

[0153] Following step S1018, the performance control program performs a scheduler update process (step S1020). In this scheduler update process, the performance control program updates various schedule data set in the peripheral control RAM. For example, in the scheduler update process, a pointer is updated to indicate which screen data, from the first screen data, among the screen data arranged in chronological order that constitutes the schedule data for screen generation, is to be output to the VDP with built-in sound source.

[0154] In addition, in the scheduler update process, a pointer is updated to indicate which light emission data from the first light emission data should be set as the light emission mode of each LED among the light emission data arranged in chronological order that constitutes the schedule data for generating light emission modes.

[0155] In addition, in the scheduler update process, a pointer is updated to indicate which sound command data, starting from the first sound command data, should be output to the VDP with built-in sound source among the sound command data indicating sound data such as music, sound effects, and alarm and notification sounds, which are arranged in chronological order to make up the sound generation schedule data.

[0156] In addition, in the scheduler update process, a pointer is updated to indicate which drive data from the first drive data is to be output among the drive data for electric drive sources such as motors and solenoids arranged in chronological order that constitutes the electric drive source schedule data.

[0157] Following step S1020, the performance control program performs a received command analysis process (step S1022). In this received command analysis process, the performance control program analyzes (command analysis means) various commands received in the peripheral control unit command reception interrupt process (command reception means) described later, which are information transmitted from the game board side decoration board 3053 and various commands transmitted from the main control board 1310.

[0158] Following step S1022, the performance control program performs a warning process (step S1024). In this warning process, when the commands analyzed in the received command analysis process in step S1022 include various commands classified as a predetermined notification display, the performance control program extracts schedule data for generating a screen, schedule data for generating a light emission mode, schedule data for generating a sound, and schedule data for an electrical drive source, which are set in the abnormality display mode for executing various abnormality notifications, from the peripheral control ROM or peripheral control RAM of the peripheral control unit 1511 and sets them in the peripheral control RAM. In addition, in the warning process, if multiple abnormalities occur simultaneously, abnormality notifications are performed in the order of the highest priority registered in advance, and the abnormality is resolved and automatically transitions to other remaining abnormality notifications. This allows multiple abnormalities to be monitored simultaneously without losing information that one abnormality has occurred because another abnormality has occurred after the occurrence of one abnormality but before the abnormality has been resolved.

[0159] Furthermore, in this warning process, after a predetermined time has elapsed since the power was turned on, if the command analyzed by the performance control program in the above-mentioned received command analysis process (step S1022) is one of various commands classified as status display, such as an error release navigation command (second error release command), the performance control program controls the command to a different mode from the normal performance mode associated with the performance operation, for example, visually alerting the outside using the game board side decorative board 3053 (performance device), the door frame side decorative board 233 (performance device), and a lamp (performance device), or audibly alerting the outside using a speaker (error notification means). In this way, when a malicious player attempts to input an error release navigation command to the main control board 1310 by operating the operation switch of the payout control board 951 even though the game is in progress, the pachinko machine 1 is configured to issue a warning to the outside, so that fraudulent acts against the main control board 1310 that may affect the progress of the game are suppressed.

[0160] Next, following step S1024 described above, the performance control program performs an RCT acquisition information update process (step S1026). In this RTC acquisition information update process, the performance control program updates the calendar information stored in the calendar information storage unit and the time information stored in the time information storage unit, which were acquired in the current time information acquisition process in step S1002 and set in the peripheral control RAM. This RCT acquisition information update process updates the time information stored in the time information storage unit, which is the hour, minute, and second, and updates the calendar information stored in the calendar information storage unit, which is the year, month, and date, based on the updated time information.

[0161] Following step S1026, the performance control program performs lamp data creation processing (step S1028). In this lamp data creation processing, the performance control program extracts and creates game board side light emission data SL-DAT for outputting a lighting signal, a blinking signal, or a gradation lighting signal to a plurality of LEDs of various decorative boards provided on the game board 5 based on the light emission data indicated by the pointer among the light emission data arranged in time series that constitute the schedule data for generating light emission modes, from the peripheral control ROM or peripheral control RAM of the peripheral control unit 1511, and sets it in the peripheral control RAM, and also extracts and creates door side light emission data STL-DAT for outputting a lighting signal, a blinking signal, or a gradation lighting signal to a plurality of LEDs of various decorative boards provided on the door frame 3 from the peripheral control ROM or peripheral control RAM of the peripheral control unit 1511, and sets it in the peripheral control RAM.

[0162] Following step S1028, the performance control program performs a display data creation process (step S1030). In this display data creation process, the performance control program updates the pointer in the scheduler update process in step S1020, and extracts the screen data indicated by the pointer from the peripheral control ROM or peripheral control RAM of the peripheral control unit 1511 among the screen data arranged in time series that constitute the schedule data for screen generation, and outputs it to the sound source built-in VDP. When the sound source built-in VDP receives screen data from the peripheral control MPU, it extracts character data from the liquid crystal and sound control ROM 1512b based on the input screen data, creates sprite data, and generates drawing data for one screen (one frame) to be displayed on the game board side decorative board 3053 and the door frame side decorative board 233 on the built-in VRAM.

[0163] Following step S1030, the performance control program performs a sound data creation process (step S1032). In this sound data creation process, the performance control program extracts the sound command data pointed to by the pointer from the peripheral control ROM or peripheral control RAM of the peripheral control unit 1511 among the sound command data arranged in time series that constitute the sound generation schedule data, after the pointer has been updated in the scheduler update process in step S1020, and outputs it to the sound source built-in VDP. When sound command data is input from the peripheral control MPU, the sound source built-in VDP extracts sound data such as music and sound effects stored in the liquid crystal and sound control ROM and controls the built-in sound source, incorporating the sound data such as music and sound effects according to the track number specified in the sound command data, and setting the output channel to be used according to the output channel number.

[0164] Following step S1032, the performance control program performs a backup process (step S1034). In this backup process, the performance control program copies and backs up the contents stored in the peripheral control MPU and the external peripheral control RAM to the first backup area and the second backup area, respectively, and also copies and backs up the contents stored in the peripheral control MPU and the external peripheral control SRAM to the first backup area and the second backup area, respectively.

[0165] Following step S1034, a WDT clear process is performed (step S1036). In this WDT clear process, a clear signal is output to the peripheral control built-in WDT 1511af and the peripheral control external WDT 1511e to prevent the peripheral control MPU from being reset.

[0166] Following step S1036, the performance control program sets the value of the steady-state processing in progress flag SP-FLG to 0 as the execution of the peripheral control unit steady-state processing is completed (step S1038), returns to step S1006 again, sets the value of the V blank signal detection flag VB-FLG to 0 for initialization, and repeats the judgment of step S1008 until the value of the V blank signal detection flag VB-FLG is set to 1 in the peripheral control unit V blank signal interrupt processing described later. That is, in step S1008, the program waits until the value of the V blank signal detection flag VB-FLG is set to 1, and when it is determined in step S1008 that the V blank signal detection flag VB-FLG is 1, it performs the processing of steps S1009 to S1038, and returns to step S1006 again. In this way, when it is determined in step S1008 that the V blank signal detection flag VB-FLG is 1, it performs the processing of steps S1009 to S1038. The processes in steps S1009 to S1038 are referred to as "peripheral control unit regular processes."

[0167] This peripheral control unit steady-state processing starts with the performance control program first setting the steady-state processing in progress flag SP-FLG to a value of 1 in step S1009, indicating that the peripheral control unit steady-state processing is being executed, then performing a 1 ms interrupt timer start process in step S1010, and performing the processes of steps S1012, S1014, . . . , and S1036, and finally completing the peripheral control unit steady-state processing by setting the steady-state processing in progress flag SP-FLG to a value of 0 in step S1038. The peripheral control unit steady-state processing is executed when the V blank signal detection flag VB-FLG is a value of 1 in step S1008. As described above, this V blank signal detection flag VB-FLG is set to a value of 1 in the peripheral control unit V blank signal interrupt process described later, which is executed when a V blank signal, which indicates that the peripheral control unit is in a state where it can accept screen data from the peripheral control MPU, is input from the sound source built-in VDP. In this embodiment, the frame frequency (number of screen updates per second) of the game board side decorative board 3053 and the door frame side decorative board 233 is set to about 30 fps per second as described above, so the interval at which the V blank signal is input is about 33.3 ms (=1000 ms÷30 fps). In other words, the peripheral control unit regular processing is repeatedly executed every about 33.3 ms.

[0168] Next, a description will be given of peripheral control unit V blank signal interrupt processing, which is executed when a V blank signal, which indicates that the screen data from the peripheral control MPU of the peripheral control unit 1511 is ready to be received, is input from the sound source built-in VDP of the liquid crystal display control unit 1512, as shown in Fig. 61. When this peripheral control unit V blank signal interrupt processing is started, the peripheral control MPU of the peripheral control unit 1511 judges whether the steady processing in progress flag SP-FLG is a value of 0, as shown in Fig. 61 (step S1045). As described above, this steady processing in progress flag SP-FLG is set to a value of 1 when the peripheral control unit steady processing of steps S1009 to S1038 in the peripheral control unit power-on processing of Fig. 60 is being executed, and to a value of 0 when the peripheral control unit steady processing has been executed.

[0169] When the steady-state processing flag SP-FLG is not 0 (is 1) in step S1045, that is, when the peripheral control unit steady-state processing is being executed, this routine is terminated. On the other hand, when the steady-state processing flag SP-FLG is 0 in step S1045, that is, when the peripheral control unit steady-state processing is completed, the V blank signal detection flag VB-FLG is set to 1 (step S1050), and this routine is terminated. As described above, this V blank signal detection flag VB-FLG is a flag for determining whether or not to execute the peripheral control unit steady-state processing, and is set to 1 when the peripheral control unit steady-state processing is executed, and to 0 when the peripheral control unit steady-state processing is not executed.

[0170] Next, the peripheral control unit 1 ms timer interrupt processing that is repeatedly executed every time the 1 ms interrupt timer occurs due to the activation of the 1 ms interrupt timer in step S1010 in the peripheral control unit regular processing of the peripheral control unit power-on processing in Fig. 60 will be described. When this peripheral control unit 1 ms timer interrupt processing is started, the peripheral control MPU of the peripheral control unit 1511 judges whether the 1 ms timer interrupt execution count STN is smaller than 33 times (step S1100) as shown in Fig. 62. As described above, this 1 ms timer interrupt execution count STN is a counter that counts the number of times the 1 ms interrupt timer is activated in the 1 ms interrupt timer activation processing in step S1010 in the peripheral control unit regular processing of the peripheral control unit power-on processing in Fig. 60 and the peripheral control unit 1 ms timer interrupt processing, which is this routine, is executed. In this embodiment, the frame frequency (number of screen updates per second) of the game board side decorative board 3053 and the door frame side decorative board 233 is set to approximately 30 fps per second as described above, so the interval at which the V blank signal is input is approximately 33.3 ms (=1000 ms÷30 fps). In other words, the peripheral control unit regular processing is repeatedly executed every approximately 33.3 ms, so after starting the 1 ms interrupt timer in step S1010 in the peripheral control unit regular processing, the peripheral control unit 1 ms timer interrupt processing is executed only 32 times before the next peripheral control unit regular processing is executed. Specifically, when the 1 ms interrupt timer is started in step S1010 in the peripheral control unit regular processing, the first 1 ms timer interrupt occurs, followed by the second, ..., and 32nd 1 ms timer interrupts in sequence.

[0171] When the 1 ms timer interrupt execution count STN is not less than 33 in step S1100, that is, when the 33rd 1 ms timer interrupt occurs and the peripheral control unit 1 ms timer interrupt process is started, this routine is terminated. In the case where the 33rd 1 ms timer interrupt occurs by chance before the next V blank signal occurs, the peripheral control unit 1 ms timer interrupt process is set to have a higher priority than the peripheral control unit V blank interrupt process in the interrupt process priority order in this embodiment, but the start of the peripheral control unit 1 ms timer interrupt process by the 33rd 1 ms timer interrupt is forcibly canceled. In other words, in this embodiment, since the V blank signal is a signal that controls the entire system of the peripheral control board 1510, when the 33rd 1 ms timer interrupt occurs by chance before the next V blank signal occurs, the start of the peripheral control unit 1 ms timer interrupt process by the 33rd 1 ms timer interrupt is forcibly canceled in order to execute the peripheral control unit V blank interrupt process. Then, after the 1 ms interrupt timer is started again in step S1010 in the peripheral control unit regular processing in response to the generation of the V blank signal, the peripheral control unit 1 ms timer interrupt processing is started in response to the generation of a new 1 ms timer interrupt.

[0172] On the other hand, when the 1 ms timer interrupt execution count STN is smaller than 33 in step S1100, the 1 ms timer interrupt execution count STN is incremented by a value of 1 (step S1102). By adding the value of 1 to the 1 ms timer interrupt execution count STN, the number of times the 1 ms interrupt timer is started in the 1 ms interrupt timer start process in step S1010 in the peripheral control unit steady-state processing of the peripheral control unit power-on processing in Fig. 60 and the peripheral control unit 1 ms timer interrupt processing, which is this routine, is executed, is increased by one.

[0173] Following step S1102, motor and solenoid drive processing is performed (step S1104). In this motor and solenoid drive processing, the electric drive sources such as various motors and solenoids are driven according to the drive data indicated by the pointer among the drive data of the electric drive sources such as motors and solenoids arranged in time series constituting the electric drive source schedule data set in the peripheral control MPU and the peripheral control RAM, and the pointer is updated to the next drive data specified in the time series, and the pointer is updated every time this motor and solenoid drive processing is performed.

[0174] Following step S1104, a movable body information acquisition process is performed (step S1106). In this movable body information acquisition process, by determining whether or not detection signals are input from the various detection switches provided on the game board 5, history information of the detection signals from the various detection switches (for example, original position history information, movable position history information, etc.) is created and set in the peripheral control RAM. From the history information of the detection signals from the various detection switches set in this peripheral control RAM, the original positions, movable positions, etc. of the various movable bodies provided on the game board 5 can be acquired.

[0175] Following step S1106, a production operation unit information acquisition process is performed (step S1108). In this production operation unit information acquisition process, by determining whether or not a detection signal is input from various detection switches provided in the production operation unit 220, history information of the detection signals from the various detection switches (for example, operation history information of the operation button 220C, etc.) is created and set in the peripheral control RAM. Whether or not the operation button 220C is operated can be obtained from the history information of the detection signals from the various detection switches set in this peripheral control RAM.

[0176] Following step S1108, a drawing status information acquisition process is performed (step S1110). In this drawing status information acquisition process, history information of the LOCKN signal output from the door frame side performance receiver IC of the door frame side decorative board 233 is created and set in the peripheral control RAM. As described above, the LOCKN signal is a signal that the door frame side performance receiver ICSDIC0 of the door frame side decorative board 233 outputs to inform the user that the drawing data received from the door frame side performance transmitter IC1512d provided on the peripheral control board 1510 is abnormal data.

[0177] Following step S1110, a backup process is performed (step S1112), and this routine ends. In this backup process, the contents stored in the peripheral control RAM are copied and backed up to the first backup area and the second backup area, respectively, and the contents stored in the peripheral control SRAM are copied and backed up to the first backup area and the second backup area, respectively.

[0178] In this way, in the peripheral control unit 1 ms timer interrupt process, various processes related to the performance described above in steps S1104 to S1108 are executed as the performance progresses within a period of 1 ms. In contrast, in the peripheral control unit normal process in the peripheral control unit power-on process in Fig. 60, various processes related to the performance described above in steps S1012 to S1032 are executed as the performance progresses within a period of about 33.3 ms. In the peripheral control unit 1 ms timer interrupt processing, when the 1 ms timer interrupt execution count STN is not smaller than the value 33 in step S1100, that is, when the 33rd 1 ms timer interrupt occurs and the peripheral control unit 1 ms timer interrupt processing is started, this routine is terminated as it is. Therefore, even if the 33rd 1 ms timer interrupt occurs by chance before the next V blank signal occurs, the start of the peripheral control unit 1 ms timer interrupt processing by the 33rd 1 ms timer interrupt is forcibly canceled, and the 1 ms interrupt timer is started again in step S1010 in the peripheral control unit regular processing by the occurrence of the V blank signal, and then the peripheral control unit 1 ms timer interrupt processing is newly started by the occurrence of the first 1 ms timer interrupt. In other words, the consistency between the progress state of the performance by the peripheral control unit regular processing and the progress state of the performance by the peripheral control unit 1 ms timer interrupt processing, which is the timer interrupt control, is not lost. Therefore, the progress state of the performance can be reliably matched.

[0179] As described above, the interval at which the V blank signal is output varies slightly depending on the liquid crystal size of the game board side decorative board 3053 and the door frame side decorative board 233, and the interval at which the V blank signal is output may also vary slightly depending on the manufacturing lot of the peripheral control board 1510 on which the peripheral control MPU and the sound source built-in VDP are mounted. In this embodiment, since the V blank signal is a signal that controls the entire system of the peripheral control board 1510, if the occurrence of the 33rd 1 ms timer interruption happens to precede the occurrence of the next V blank signal, the start of the peripheral control unit 1 ms timer interruption process due to the 33rd 1 ms timer interruption is forcibly canceled in order to execute the peripheral control unit V blank interruption process. In other words, in this embodiment, even if the interval at which the V blank signal is output varies slightly, the time lag caused by the slight change in the interval at which the V blank signal is output can be absorbed by forcibly canceling the start of the peripheral control unit 1 ms timer interruption process due to the 33rd 1 ms timer interruption.

[0180] [3-4. Liquid crystal display control unit] Next, the LCD display control unit 1512 in the peripheral control board 1510, which controls the drawing of the main LCD display device 1600, the sub LCD display device 3114, and the upper tray LCD display device 244, is equipped with a display control MPU as a microprocessor (not shown in detail), a display control ROM for storing various processing programs, various commands, and various data, a VDP (short for Video Display Processor) for display control of the main LCD display device 1600 and the upper tray LCD display device 244, an image ROM (performance data ROM) for storing various data for the screens displayed on the main LCD display device 1600, the sub LCD display device 3114, and the upper tray LCD display device 244, and an image RAM to which the various data stored in this image ROM (performance data ROM) is transferred and copied.

[0181] This display control MPU has a built-in parallel I / O port, serial I / O port, etc., and controls the VDP based on control data (display commands) from the peripheral control unit 1511 to control drawing on the main LCD display unit 1600, sub LCD display unit 3114, and upper tray LCD display unit 244. When the display control MPU is operating normally, it outputs an operation signal to that effect to the peripheral control unit 1511. The display control MPU also receives an execution signal from the VDP, and performs interrupt processing when the output of this execution signal is stopped every 16 ms.

[0182] The display control ROM stores a variety of programs for generating screens to be drawn on the main LCD display 1600, the sub LCD display 3114, and the top tray LCD display 244, as well as a plurality of schedule data corresponding to control data (display commands) from the peripheral control unit 1511, and non-resident area transfer schedule data corresponding to the control data (display commands). The schedule data is configured by chronologically arranged screen data that specifies the screen configuration, and specifies the order in which screens are drawn on the main LCD display 1600, the sub LCD display 3114, and the top tray LCD display 244. The non-resident area transfer schedule data is configured by chronologically arranged non-resident area transfer data that specifies the order in which various data stored in the image ROM (performance data ROM) is transferred to the non-resident area of ​​the image RAM. This non-resident area transfer data specifies the order in which various types of screen data to be drawn on the main LCD display 1600, sub LCD display 3114, and upper tray LCD display 244 in accordance with the progression of the schedule data are transferred in advance from the image ROM (performance data ROM) to the non-resident area of ​​the image RAM.

[0183] The display control MPU extracts from the display control ROM the first screen data of the schedule data corresponding to the control data (display command) from the peripheral control unit 1511 and outputs it to the VDP, and then extracts from the display control ROM the screen data following the first screen data and outputs it to the VDP. In this way, the display control MPU extracts screen data arranged in chronological order in the schedule data one by one from the display control ROM, starting from the first screen data, and outputs it to the VDP.

[0184] When the VDP receives screen data output from the display control MPU, it extracts sprite data from the image RAM based on this input screen data, generates drawing data to be displayed on the main LCD display 1600, sub LCD display 3114, and top tray LCD display 244, and outputs this generated drawing data to the main LCD display 1600, sub LCD display 3114, and top tray LCD display 244. When the main LCD display 1600, sub LCD display 3114, or top tray LCD display 244 does not accept screen data from the display control MPU, the VDP outputs an execution signal to that effect to the display control MPU. The VDP uses a line buffer system. This "line buffer method" is a method in which one line's worth of drawing data for drawing to the left and right of the main LCD display 1600, the sub LCD display 3114, or the top tray LCD display 244 is stored in a line buffer, and the one line's worth of drawing data stored in the line buffer is output to the main LCD display 1600, the sub LCD display 3114, or the top tray LCD display 244.

[0185] The image ROM (performance data ROM) stores a large amount of sprite data, and the capacity of the image ROM (performance data ROM) is large. When the capacity of the image ROM (performance data ROM) becomes large, that is, when the number of sprites to be drawn on the main LCD display 1600, the sub LCD display 3114, and the upper tray LCD display 244 increases, the access speed of the image ROM (performance data ROM) cannot be ignored, and this affects the speed of drawing on the main LCD display 1600, the sub LCD display 3114, and the upper tray LCD display 244. Therefore, in this embodiment, the sprite data stored in the image ROM (performance data ROM) is transferred and copied to the image RAM, which has a fast access speed, and the sprite data is extracted from this image RAM. Note that the sprite data is base data, which is data before the sprite is expanded into a bitmap format, and is stored in the image ROM (performance data ROM) in a compressed state.

[0186] Here, the "sprite" is explained. A "sprite" is an image displayed as a group on the main LCD display 1600 or the top tray LCD display 244. For example, when various people (characters) are displayed on the main LCD display 1600, the sub LCD display 3114, or the top tray LCD display 244, data for drawing each person is called a "sprite". Thus, when multiple people are displayed on the main LCD display 1600, the sub LCD display 3114, or the top tray LCD display 244, multiple sprites are used. In addition to people, houses, mountains, roads, etc. that make up the background are also sprites, and the entire background can be treated as one sprite. These sprites are drawn on the main LCD display 1600, the sub LCD display 3114, or the top tray LCD display 244 after their positions on the screen and their hierarchical relationship when sprites overlap (hereinafter referred to as "overlapping order of sprites") are set.

[0187] A sprite is made up of multiple rectangular areas of 64 pixels each. The data used to draw these rectangular areas is called a "sprite character." Small sprites can be represented using one sprite character, while relatively large sprites such as people can be represented using a total of six sprite characters arranged, for example, 2 x 3. Even larger sprites such as backgrounds can be represented using even more sprite characters. In this way, the number and arrangement of sprite characters can be specified arbitrarily for each sprite.

[0188] The main LCD display 1600, the sub LCD display 3114, and the top tray LCD display 244 are driven by main scanning, which sets the display state of each pixel in one direction along the pixels, from left to right when viewed from the front, and sub-scanning, which repeats main scanning in a direction intersecting the one direction. When drawing data for one line output from the LCD display control unit 1512 is input to the main LCD display 1600, the sub LCD display 3114, and the top tray LCD display 244, the main scanning is used to output the data to one line of pixels in the order from left to right when viewed from the front of the main LCD display 1600, the sub LCD display 3114, and the top tray LCD display 244. Once the output of one line is completed, the main LCD display 1600, sub LCD display 3114, and top tray LCD display 244 move on to the line directly below as a sub-scan, and when drawing data for the next line is input, they output one line's worth of pixels sequentially from left to right as a main scan based on the drawing data for the next line, when viewed from the front of the main LCD display 1600, sub LCD display 3114, and top tray LCD display 244.

[0189] [4. Game Contents] Next, the game contents of the pachinko machine 1 of this embodiment will be described mainly with reference to Figs. 10, 16, 17, etc. In the pachinko machine 1 of this embodiment, the game balls stored in the upper tray 201 of the tray unit 200 are shot into the upper part of the game area 5a through between the outer rail 1001 and the inner rail 1002 of the game board 5 by the player rotating the handle lever 504 of the handle unit 500 arranged in the front lower right corner of the door frame 3, and a game using the game balls is started. The game balls shot into the upper part of the game area 5a flow down either the left side or the right side of the center role 2500 depending on the shooting strength. The shooting strength of the game balls can be adjusted by the rotation amount of the handle lever 504, and the more it is rotated in the clockwise direction, the stronger the balls can be shot, and up to 100 game balls can be shot continuously in one minute, that is, at intervals of 0.6 seconds.

[0190] In addition, within the game area 5a, a plurality of obstacle nails (not shown) are planted in a predetermined gauge arrangement at appropriate positions on the front of the game panel 1100 (panel board 1110), and when the game ball hits the obstacle nails, the flow speed of the game ball is suppressed and various movements are imparted to the game ball, so that the movement can be enjoyed. In addition to the obstacle nails, a windmill (not shown) that rotates when the game ball hits it is provided at an appropriate position within the game area 5a.

[0191] When a game ball shot into the upper part of the center role 2500 enters the left side of the highest part of the outer circumferential surface of the front peripheral wall part 2512 of the center role 2500 as viewed from the front, it comes into contact with multiple obstacle nails (not shown) and flows down the area to the left of the center role 2500. Then, when the game ball flowing down the area to the left of the center role 2500 enters the warp entrance 2520 opening on the outer circumferential surface of the front peripheral wall part 2512 of the center role 2500, it passes through the warp passage 2521, and is supplied to the stage 2530 through the guideway 2523 from the warp exit 2522 opening inside the frame of the center role 2500.

[0192] The game balls supplied to the stage 2530 from the warp exit 2522 roll back and forth on the stage 2530 and are released backward from either the central guiding section 2531 in the center of the left-right direction or the side guiding section 2532 on the left and right of the central guiding section 2531. When the game balls are released into the game area 5a from the central guiding section 2531 of the stage 2530, the game balls released from the central guiding section 2531 are received by the first starting opening 2002 with a high probability because the central guiding section 2531 is located directly above the first starting opening 2002. When the game balls are received by the first starting opening 2002, a predetermined number (for example, three) of game balls are paid out from the payout device 830 to the upper tray 201 via the main control board 1310 and the payout control board 951.

[0193] When the game ball rolling on the stage 2530 is released from the side guide portion 2532 into the game area 5a, it flows down toward the start opening unit 2100. The game ball released from the stage 2530 of the center role 2500 into the game area 5a may be received by the first start opening 2002 of the start opening unit 2100 or the first large winning opening 2005 in an open state.

[0194] Incidentally, if a gaming ball that has flowed down to the left side of the center role 2500 does not enter the warp entrance 2520, it may be pulled toward the center in the left-right direction by the shelf 2302 on the upper side unit 2300, and may be received by the general winning opening 2001 or the first starting opening 2002 on the lower side unit 2200. Then, when a gaming ball is received by the general winning opening 2001, a predetermined number (for example, 10 balls) of gaming balls are paid out from the payout device 830 to the upper tray 201 via the main control board 1310 and the payout control board 951.

[0195] On the other hand, when a game ball that is shot into the upper part of the center role 2500 in the game area 5a enters (is shot into) the right side of the highest part of the outer circumferential surface of the front peripheral wall part 2512 of the center role 2500, it enters the upper right circulation space 2541 of the right hitting game area 2540. Although not shown, a plurality of obstacle nails are planted in this upper right circulation space 2541, and the game ball comes into contact with the obstacle nails and flows while changing its flow direction in various ways. In this upper right circulation space 3541, a gate part 2003 is provided at the top, and a general winning port 2001 and a second starting port 2004 that is usually closed by a second starting port door member 2549 are provided at the bottom.

[0196] The game balls that flow down in the upper right circulation space 2541 pass through the downstream right circulation passage 2542 and enter the lower right circulation space 2543. The game balls that enter the lower right circulation space 2543 pass through the second attacca passage 2543a, the bottom surface of which is formed by the upper surfaces of the second upper large prize opening door member 2552 and the second lower large prize opening door member 2555 that close the second upper large prize opening 2006a and the second lower large prize opening 2006b that are arranged on the left and right as the second large prize opening 2006, and are released into the game area 5a from the left end of the lowered release plate portion 2559 on the left side as viewed from the front. The downstream end (release plate portion 2559) of the second attacca passage 2543a is open so that the game ball is directed toward the first large prize opening 2005 of the starting port unit 2100, and when the first large prize opening 2005 is in the open state, when a game ball is released from the second attacca passage 2543a into the game area 5a, there is a high probability that the game ball will be accepted by the first large prize opening 2005.

[0197] The game balls flowing through the right flow passage 2542 and the lower right flow space 2543 flow down while the increase in flow speed is suppressed by a plurality of deceleration ribs 2546. In addition, in very rare cases, in the lower right flow space 2543, the game balls may enter the discharge passage 2543b branching off near the upstream end of the second attacca passage 2543a, and the game balls that have entered the discharge passage 2543b are discharged outside the game board 5 from the second outlet 2543c without being returned to the game area 5a.

[0198] When a game ball that has been hit to the right and entered the upper right circulation space 2541 passes through the gate section 2003 and is detected by the gate sensor 2547, one normal random number is obtained from the normal random numbers updated in a predetermined numerical range in the main control board 1310, and the obtained normal random number is compared with a predetermined normal win judgment table to perform a normal lottery. When the time-saving control described later is not being executed, if the result of this normal lottery is a "normal win", the second start port door member 2549 rotates once in a counterclockwise direction as seen from the front to open the second start port 2004, and the second start port 2004 can receive game balls for a predetermined time (0.5 seconds in this example). On the other hand, when the time-saving control is being executed, a lottery is performed to determine whether the "normal win" is a "first normal win", a "second normal win", or a "third normal win" in the normal lottery. Then, when the time-saving control is being executed, if the result of the normal lottery is either a "first normal hit," "second normal hit," or "third normal hit," the second starting port door member 2549 rotates counterclockwise when viewed from the front to open the second starting port 2004, thereby enabling the second starting port 2004 to receive game balls for a predetermined period of time, and then rotates counterclockwise when viewed from the front to close the second starting port 2004, thereby preventing the second starting port 2004 from receiving game balls. This opening and closing control is repeated a predetermined number of times (five times in this example). In addition, when the result of the regular lottery is the "first regular win", the five periods during which the second starting port 2004 is in a state in which it can receive game balls are "0.3 seconds", "0.28 seconds", "0.3 seconds", "0.28 seconds", and "0.3 seconds", respectively, and when the result of the regular lottery is the "second regular win", the five periods during which the second starting port 2004 is in a state in which it can receive game balls are "0.3 seconds", "0.28 seconds", and "1.1 seconds", respectively. When the result of the regular lottery is the "third regular win", the five periods during which the second starting hole 2004 is in a state in which it is possible to receive a game ball are set to "0.3 seconds", "0.28 seconds", "0.3 seconds", "0.28 seconds", and "1.1 seconds", respectively, and the "second regular win" and the "third regular win" are more advantageous to the player (it is easier to receive a game ball into the second starting hole 2004) than the "first regular win".In addition, when game balls are received in the second starting port 2004, a predetermined number (for example, three) of game balls are paid out from the payout device 830 via the main control board 1310 and the payout control board 951 onto the upper tray 201.

[0199] In this embodiment, in the variable display of the normal symbol performed by the normal symbol display of the function display unit 1400 based on the passage of the game ball through the gate portion 2003, a certain amount of time is set from the start of the variable display of the normal symbol to the stop display of the normal symbol (until the normal lottery result is suggested) (for example, 0.01 to 60 seconds, also referred to as the normal variable time). In the second start port 2004, after the normal variable time has elapsed, the second start port door member 2549 rotates to an open state. Note that, during the execution of the time-saving control described later, control is executed to shorten the normal variable time more than in normal (a state in which the time-saving control is not executed). In addition, the opening time for rotating the second start port door member 2549 to open the second start port 2004 may be changed according to the game state. For example, when the time-saving control is not executed, the opening time of the second start port 2004 may be changed to a longer time than when the time-saving control is executed.

[0200] In addition, if a new game ball passes through the gate unit 2003 during the period from when the game ball passes through the gate unit 2003 until the normal pattern displayed on the normal pattern display is stopped (until the normal lottery result is suggested), the normal pattern display cannot start displaying the normal pattern again, so the start of the normal pattern display is suspended until the previous normal pattern display is completed (until the indication of the normal lottery result is completed). Specifically, the normal random number acquired by the main control board 1310 based on the detection of the game ball passing through the gate unit 2003 by the gate sensor 2547 is stored, and the start of the normal pattern display is suspended until the normal pattern display can be started. Note that the number of reserved normal random numbers that can be stored in the main control board 1310 is limited to four, and any more than this are discarded without being reserved even if the game ball passes through the gate unit 2003. This suppresses the increase in the burden on the game hall side due to the accumulation of reserved numbers.

[0201] In the pachinko machine 1 of this embodiment, when a game ball received in the first start hole 2002 is detected by the first start hole sensor 2104, one first special random number is acquired from the first special random numbers updated in a predetermined numerical range in the main control board 1310, and the acquired first special random number is compared with a predetermined big win determination table to draw a first special lottery result that generates an advantageous game state (e.g., "big win", "small win", etc.) advantageous to the player. Then, based on the first special lottery result, the eight LEDs of the first special symbol display are blinked for a predetermined variable time (e.g., 0.1 to 360 seconds) and then displayed in a lighting mode corresponding to the first special lottery result (the first special symbol is variably displayed and then a stop symbol corresponding to the first special lottery result is displayed), thereby suggesting the first special lottery result to the player. In addition, the first special lottery results that are drawn when a game ball is accepted into the first starting port 2002 include "miss," "small hit," "2R jackpot," "8R jackpot," and "10R jackpot." The obtained first special random number is compared with a jackpot determination table to determine which of these results it is. Furthermore, it is also possible to determine whether or not to execute probability improvement control (high probability state (also called special probability state): in this example, the jackpot is won with a probability of approximately 1 in 44) that improves the probability of winning a jackpot (winning probability) compared to normal (low probability state: in this example, the jackpot is won with a probability of approximately 1 in 395) after a jackpot game (whether or not it is a special probability jackpot), whether or not to execute time-saving control (time-saving state) that shortens the fluctuation time more than normal at least when the first special lottery result is a miss (whether or not it is a time-saving jackpot), and the period for which time-saving control is executed (number of time-saving times: number of times the special patterns (number of times the first special hitting pattern and the second special pattern fluctuate)). The probability of winning a "small win" is always constant regardless of the game status (in this example, approximately 1 in 300).

[0202] In addition, when the game ball received in the second start hole 2004 is detected by the second start hole sensor 2551, one second special random number is obtained from the second special random numbers updated in a predetermined numerical range in the main control board 1310, and the obtained second special random number is compared with a predetermined big win determination table to draw a second special lottery result that generates a favorable game state (for example, "big win", "small win", etc.) favorable to the player. Then, based on the drawn second special lottery result, the eight LEDs of the second special symbol display are blinked for a predetermined variable time (for example, 0.1 to 360 seconds) and then displayed in a lighting mode corresponding to the second special lottery result (the second special symbol is variably displayed and then a stop symbol corresponding to the second special lottery result is displayed), thereby suggesting the second special lottery result to the player. In addition, the second special lottery results that are drawn when a game ball is received by the second starting port 2004 include "miss," "2R jackpot," "4R jackpot," "5R jackpot," "6R jackpot," "7R jackpot," "8R jackpot," and "16R jackpot." The obtained second special random number is compared with a jackpot determination table to determine which of these results it is, and further, after playing a jackpot, it is determined that the jackpot is won more likely than usual (low probability state: in this example, the jackpot is won with a probability of about 1 in 395). It is also possible to determine whether or not to execute probability improvement control (high probability state (also called special probability state): in this example, there is a 1 in 44 chance of winning the jackpot) to improve the probability of winning (probability of winning) (whether or not it is a special probability jackpot), whether or not to execute time-saving control (time-saving state) to shorten the fluctuation time more than usual when at least the second special lottery result is a miss (whether or not it is a time-saving jackpot), and the period for which time-saving control is executed (number of times the time-saving control is executed: number of times the special patterns (number of times the first special hitting pattern and the second special pattern fluctuate)).

[0203] If the special lottery result (first special lottery result and second special lottery result) drawn by the acceptance of game balls into the first starting opening 2002 and the second starting opening 2004 is a special lottery result that generates a favorable game state, after a predetermined fluctuation time has elapsed, the eight LEDs of the special pattern display devices (first special pattern display device, second special pattern display device) are displayed in a lighting mode corresponding to the special lottery result, and then either the first large winning opening 2005 or the second large winning opening 2006 becomes able to accept game balls in a predetermined opening and closing pattern. When the first large prize opening 2005 or the second large prize opening 2006 is open and game balls are received in the first large prize opening 2005 or the second large prize opening 2006, a predetermined number of game balls (for example, 11 balls when a game ball is received in the first large prize opening 2005, or 15 balls when a game ball is received in the second large prize opening 2006) are paid out from the payout device 830 to the upper tray 201 by the main control board 1310 and the payout control board 951. Therefore, when the first large prize opening 2005 or the second large prize opening 2006 is capable of receiving game balls, by having the first large prize opening 2005 or the second large prize opening 2006 receive game balls, a large number of game balls can be paid out, which can entertain the player.

[0204] If the special lottery result is a "small win" or a "2R big win," the first large prize opening 2005 repeats an opening and closing pattern multiple times (e.g., twice) of opening and closing so as to be able to receive a game ball for a predetermined short period of time (e.g., between 0.2 and 0.6 seconds). On the other hand, if the special lottery result is a "4R jackpot," "5R jackpot," "6R jackpot," "7R jackpot," "8R jackpot," "10R jackpot," or "16R jackpot," then when either of the following conditions is met: a predetermined time (e.g., about 30 seconds) has elapsed after the first large prize opening 2005 or the second large prize opening 2006 has become open and capable of receiving game balls, or a predetermined number of game balls (e.g., 7 balls) have been received into the first large prize opening 2005, or a predetermined number of game balls (e.g., 10 balls) have been received into the second large prize opening 2006, then an opening and closing pattern (one opening and closing pattern is referred to as one round) that brings the opening and closing into a closed state in which game balls cannot be received is repeated a predetermined number of times (predetermined number of rounds). For example, a "4R jackpot" is repeated 4 rounds, a "5R jackpot" is repeated 5 rounds, and a "16R jackpot" is repeated 16 rounds, thereby generating an advantageous gaming state for the player. In addition, in the case where the special lottery result is a "small jackpot" or a "2R jackpot", it is practically difficult to allow a gaming ball to enter the first large winning opening 2005 in the opening / closing pattern (where the first large winning opening 2005 is in an open state capable of receiving a gaming ball for a predetermined short time (for example, 0.2 to 0.6 seconds) and then closes). In contrast, in the opening / closing pattern executed when the special lottery result is a "4R jackpot," "5R jackpot," "6R jackpot," "7R jackpot," "8R jackpot," "10R jackpot," or "16R jackpot" (an opening / closing pattern which switches to a closed state in which game balls cannot be received when either of the following conditions is satisfied: a predetermined time (e.g., about 30 seconds) has elapsed after the first large prize opening 2005 or the second large prize opening 2006 has been opened to receive game balls, or a predetermined number (e.g., 7 balls) of game balls has been received into the first large prize opening 2005 or a predetermined number (e.g., 10 balls) of game balls has been received into the second large prize opening 2006), it is easy to insert a game ball into the first large prize opening 2005 or the second large prize opening 2006.In addition, in the case where the result of the special lottery is a "4R jackpot," "5R jackpot," "6R jackpot," "7R jackpot," "8R jackpot," "10R jackpot," or "16R jackpot," when either of the following conditions is satisfied after the first major winning port 2005 or the second major winning port 2006 becomes an open state capable of receiving game balls, a predetermined time (e.g., about 30 seconds) has elapsed, or a predetermined number of game balls (e.g., 7 balls) have been received into the first major winning port 2005 or a predetermined number of game balls (e.g., 10 balls) have been received into the second major winning port 2006, the number of rounds in which an opening and closing pattern is executed to close the state in which game balls cannot be received is substantially determined. It may be a special lottery result such as a predetermined number of game balls (e.g., 7 balls) being received into the first large winning opening 2005 or a predetermined number of game balls (e.g., 10 balls) being received into the second large winning opening 2006, and when either of these conditions is met as the special lottery result, a pattern that executes multiple rounds including an opening / closing pattern that closes the opening and closing so as to be unable to receive game balls and an opening / closing pattern that is executed when the special lottery result is a "small win" or a "2R jackpot" (an opening / closing pattern in which the first large winning opening 2005 is in an open state capable of receiving game balls for a predetermined short period of time (e.g., 0.2 to 0.6 seconds) and then closes). For example, a "8R jackpot which is effectively 4R" may be set as the special lottery result, and when either of the conditions of a predetermined number (e.g., 7) of game balls being received into the first large prize opening 2005 or a predetermined number (e.g., 10) of game balls being received into the second large prize opening 2006 is met, an opening / closing pattern which brings the opening / closing port into a closed state in which game balls cannot be received may be repeated four times, and then an opening / closing pattern which is executed when the special lottery result is a "small win" or a "2R jackpot" (an opening / closing pattern in which the first large prize opening 2005 is in an open state in which it can receive game balls for a predetermined short period of time (e.g., 0.2 to 0.6 seconds) and then closed) may be repeated four times.

[0205] In this embodiment, the second large prize opening 2006 is composed of a second upper large prize opening 2006a and a second lower large prize opening 2006b arranged side by side, and in the case of a "jackpot" using the second large prize opening 2006, for example, in the first round (1R), the second upper large prize opening 2006a opens and can receive game balls, and is closed when the condition that makes it unacceptable is satisfied, and during the interval until it is next acceptable, the second lower large prize opening 2006b opens and can receive game balls to start the next round (2R), and when the second lower large prize opening 2006b becomes unacceptable, the interval period has elapsed, so the second upper large prize opening 2006a opens again and can receive game balls. Then, the second upper large prize opening 2006a and the second lower large prize opening 2006b are alternately opened and closed until a predetermined number of rounds are consumed. As a result, within the second attacca passage 2543a, during a "jackpot", either the second upper large prize opening 2006a or the second lower large prize opening 2006b is in a state where it can accept a game ball, so that if a game ball is circulated within the second attacca passage 2543a by hitting to the right in this state, the game ball will always be accepted by the second large prize opening 2006, eliminating the risk of missing out on a game ball and allowing the player to enjoy the game.

[0206] In addition, in this embodiment, in some of the above-mentioned multiple types of jackpots, whether or not the time-saving control is executed after the end of the jackpot game is different depending on the game state at the time of winning the jackpot. For example, in the non-time-saving state (state in which the time-saving control is not executed) when the first special lottery result is an 8R normal jackpot in which the probability improvement control is not executed after the jackpot game, the time-saving control is not executed after the jackpot game. On the other hand, in the time-saving state (state in which the time-saving control is executed), when the first special lottery result is an 8R normal jackpot, the time-saving control is executed after the jackpot game. Also, in the non-time-saving state (state in which the time-saving control is not executed), when the second special lottery result is a 2R normal jackpot in which the probability improvement control is not executed after the jackpot game, the time-saving control is not executed after the jackpot game. On the other hand, in the time-saving state (state in which the time-saving control is executed), when the second special lottery result is a 2R normal jackpot in which the probability improvement control is not executed after the jackpot game, the time-saving control is executed after the jackpot game. Also, in a low probability non-time-saving state (a state where neither probability improvement control nor time-saving control is being executed: also called a normal state), if the first special lottery result and the second special lottery result are a 2R variable probability jackpot in which probability improvement control is executed after a jackpot game, time-saving control is not executed after the jackpot game. On the other hand, in a state where probability improvement control or time-saving control is being executed, that is, in a state other than the normal state, if the first special lottery result and the second special lottery result are a 2R variable probability jackpot in which probability improvement control is executed after a jackpot game, time-saving control is executed after the jackpot game.

[0207] In this embodiment, the display of the first special pattern change executed by the first special pattern display device upon receipt of a gaming ball into the first starting port 2002 and the display of the second special pattern change executed by the second special pattern display device upon receipt of a gaming ball into the second starting port 2004 are not executed simultaneously, but only one of them is executed. Therefore, if a new game ball is received into the first starting port 2002 or the second starting port 2004 during the period between when a game ball is received into the first starting port 2002 and the first special pattern displayed in a variable manner on the first special pattern display device is stopped (until the result of the first special lottery is suggested) and when a game ball is received into the second starting port 2004 and the second special pattern displayed in a variable manner on the second special pattern display device is stopped (until the result of the second special lottery is suggested), it is not possible to start a new display of the first special pattern or the second special pattern on the first special pattern display device or the second special pattern display device, so the start of the display of the variable special patterns (first special pattern, second special pattern) is suspended until the display of the previous special pattern (first special pattern, second special pattern) has ended (until the indication of the result of the first special lottery or the result of the second special lottery is completed). Specifically, the first special random number acquired by the main control board 1310 based on the detection of a game ball received in the first start hole 2002 by the first start hole sensor 2104 and the second special random number acquired by the main control board 1310 based on the detection of a game ball received in the second start hole 2004 by the second start hole sensor 2551 are stored, and the start of the variable display of the special symbols (first special symbol, second special symbol) is suspended until the variable display of the special symbols (first special symbol, second special symbol) can be started. The number of reserved first special random numbers and second special random numbers that can be stored in the main control board 1310 is limited to four each, and any number greater than this is discarded without being reserved even if a game ball is received in the first start hole 2002 and the second start hole 2004. This suppresses an increase in the burden on the game hall side due to the accumulation of reserved numbers. In addition, of the first special random numbers and the second special random numbers stored in the main control board 1310, the second special random numbers are consumed with priority.In other words, regardless of the timing of receipt of the game ball into the first starting port 2002 and the second starting port 2004, if the second special random number is stored and the start of the variable display of the second special pattern is put on hold, the variable display of the second special pattern is executed with priority over the first special pattern.

[0208] The special lottery result is suggested by the function display unit 1400 (first special pattern display device, second special pattern display device) and the main LCD display device 1600 (the sub LCD display device 3114 may also be used). The function display unit 1400 suggests the special lottery result by directly controlling the main control board 1310. The function display unit 1400 suggests the special lottery result by repeatedly turning on and off the eight LEDs that make up the special pattern display device (first special pattern display device, second special pattern display device) for a predetermined period of time, and then stopping them in a predetermined lighting pattern, and the special lottery result is suggested by the combination of LEDs that are lit at the time of stopping.

[0209] On the other hand, the main liquid crystal display device 1600 is indirectly controlled by the peripheral control board 1510 based on control signals (variable pattern commands, judgment result notification commands, etc.) from the main control board 1310, and the special lottery result is suggested by the performance image. Specifically, in the main liquid crystal display device 1600, a series of decorative pattern rows consisting of a plurality of different patterns is displayed in multiple rows (for example, three rows of left decorative pattern, center decorative pattern, and right decorative pattern), and then, the decorative pattern rows are displayed one by one (in this example, the left decorative pattern, right decorative pattern, and center decorative pattern are displayed in this order), and when all the decorative pattern rows are finally displayed, the lottery result of the special random numbers (first special random number, second special random number) extracted by the combination of the patterns displayed is suggested to the player. In other words, according to the special lottery result (first special lottery result, second special lottery result) based on the special random number (first special random number, second special random number) obtained at the time of the start winning, a performance image is displayed in which a plurality of decorative pattern rows are variably displayed and then a stationary display is displayed to suggest the special lottery result (first special lottery result, second special lottery result). Note that since the decorative patterns displayed on the main liquid crystal display device 1600 are larger and easier to see than the first special pattern variably displayed on the first special pattern display device and the second special pattern variably displayed on the second special pattern display device, players generally pay attention to the decorative patterns displayed on the main liquid crystal display device 1600.

[0210] In addition, the time indicating the special lottery result on the function display unit 1400 (the LED blinking time (variation time)) is different from the time indicating the special lottery result on the main LCD display device 1600 (the time until the pattern row changes and the final image is displayed), and the time on the function display unit 1400 is set to a shorter time.

[0211] In addition, in the peripheral control board 1510, in addition to displaying performance images to indicate the results of the special lottery by the main LCD display device 1600, it is possible to perform light-emitting performances, movable performances, display performances, etc. by appropriately using the decorative body of the center role piece 2500, the back left center decorative unit 3050, the back bottom rear movable performance unit 3100, the back top left movable performance unit 3200, the back left movable performance unit 3300, the back top center movable performance unit 3400, and the back bottom front movable performance unit 3500, etc., depending on the special lottery result drawn.The player can be entertained by various types of performances, and a decrease in the player's interest in the game can be prevented.

[0212] [5. Various control processes on the main control board] Next, we will explain the processes executed by the main control board 1310 according to the progress of the game on the pachinko machine 1. Specifically, we will explain the system / user reset process executed when the power of the game machine is turned on, and the timer interrupt process executed at a predetermined period (4 ms in this embodiment) by a timer started by the system / user reset process.

[0213] [5-1. Initialization process] 21 and 22 are flowcharts showing the procedure of the initialization process of the main control board in the embodiment of the present invention.

[0214] When the power is turned on to the pachinko machine 1, the main control MPU 1311 of the main control board 1310 executes the main control program to perform initialization processing. When the initialization processing starts, the main control MPU 1311 first sets the protection of the RAM 1312 built into the main control MPU 1311 to write permission, making it possible to write to the RAM 1312 (step S10). Specifically, it outputs "00H" indicating write permission to the RAM protection register.

[0215] Next, the main control MPU 1311 starts the built-in watchdog timer (step S12). Specifically, first, it writes "03H" indicating a mode setting to the watchdog timer control register, and then writes "03H" indicating the start of the watchdog timer. Furthermore, it clears and resets the watchdog timer (step S14).

[0216] Next, it is determined whether a predetermined wait time has elapsed (step S16). Since the voltage does not rise immediately after the power supply of the pachinko machine 1 is turned on until it reaches the predetermined voltage, if the voltage becomes smaller than the power failure warning voltage during the period from when the power supply is turned on until it reaches the predetermined voltage, a power failure warning signal is input from the power failure monitoring circuit. In the wait process, a predetermined monitoring wait value is set, and the process is put on hold for a predetermined time (e.g., 200 milliseconds) while the watchdog timer is activated.

[0217] If the predetermined wait time has elapsed, the time required for starting the sub-board (such as the peripheral control board 1510) has elapsed, so it is determined whether the RAM clear switch has been operated (step S18). If the RAM clear switch has been operated, data in an area other than the work area for calculating the ratio of features (area for calculating the ratio of features 13128) among the data backed up in the work area of ​​the built-in RAM 1312 is erased (step S30), and the process proceeds to step S24. On the other hand, if the RAM clear switch has not been operated, the data backed up in the built-in RAM 1312 is not erased, and it is determined whether a power outage flag has been set (step S20). The power outage flag is a flag that is set when the power supply of the pachinko machine 1 is cut off through normal processing, such as when a power outage occurs (see step S56 in FIG. 22).

[0218] As a result, if the power failure flag is not set, the data in the work area of ​​the internal RAM 1312 may be incorrect, so the data backed up in the work area (other than the role ratio calculation area 13128) is erased (step S30), and the process proceeds to step S24. On the other hand, if the power failure flag is set, the power failure flag is cleared, and the checksum calculated from the data backed up in the work area of ​​the internal RAM 1312 using the checksum calculated at the time of the previous power outage is compared (verified) with the checksum stored in step S48 (step S22).

[0219] As a result, if the checksum calculated from the backup data does not match the checksum stored in step S48, the data in the work area of ​​the built-in RAM 1312 may not be correct, so the data backed up in the work area (other than the reel ratio calculation area 13128) is erased (step S30) and the process proceeds to step S24. On the other hand, if the checksum calculated from the backup data matches the checksum stored in step S48, the data in the work area of ​​the built-in RAM 1312 is correct, so the data backed up in the work area is not erased and the process proceeds to step S24.

[0220] Next, the check code is used to determine whether the work area for calculating the ratio of features (area for calculating the ratio of features 13128 of features) is normal (step S24). If it is determined to be abnormal, the data in the work area for calculating the ratio of features may be incorrect, so the data stored in the work area for calculating the ratio of features is erased (step S26).

[0221] In addition, when one or more backup areas are provided in the role ratio calculation area 13128, the main area is first judged using a check code, and if the main area is judged to be abnormal, backup areas 1, 2, and N are judged in that order, and the data of the backup area that is first judged to be normal is copied to the main area. After that, the data of the backup area may be erased or left as it is. If the main area is judged to be normal, the data of the backup area may be erased or left as it is.

[0222] Regarding the area for calculating the ratio of the prizes, the data in the area for calculating the ratio of the prizes 13128 may be erased at predetermined time intervals, separately from the result of the check code when the power is turned on. Also, the data in the area for calculating the ratio of the prizes 13128 may be erased at predetermined operation intervals (for example, at predetermined number of shot balls, at predetermined number of winning balls, at predetermined number of games showing special symbols, at predetermined number of jackpots of games showing special symbols).

[0223] In this way, in the pachinko machine of this embodiment, the data backed up in the work area of ​​the built-in RAM 1312 is erased under different conditions for each type of data (game control data 13132 and bonus feature ratio calculation and display data 13136). That is, by operating the RAM clear switch, the backed up game control data 13132 is erased, but the backed up bonus feature ratio calculation and display data 13136 is not erased. If the bonus feature ratio calculation and display data 13136 can be erased by operating the RAM clear switch, the bonus feature ratio calculated by the pachinko machine 1 can be erased at any timing. Therefore, by preventing the backed up bonus feature ratio calculation and display data 13136 from being erased by the operation of the RAM clear switch, it is possible to prevent the bonus feature ratio calculation and display data 13136 from being erased by the operation of the game center staff, and to prevent concealment of an abnormal bonus feature ratio state. Therefore, it is possible to easily detect a gaming machine that has been modified to have a high or low bonus feature ratio.

[0224] When the power recovery setting of the RAM work area or the RAM initialization process is executed, the main control MPU 1311 executes the initial setting for setting various setting registers of the main control MPU 1311 (CPU 13111) (step S28). In the initial setting of the main control MPU 1311, first, the initial setting of the CTC (Counter / Timer Circuit) is performed to allow interrupts. Furthermore, the initial setting of the serial communication port and the test signal output port is performed. A hardware random number generating circuit is started. Then, the serial communication circuit 13114 used for communication with the peripheral control board 1510, the payout control board 951, and the reel ratio display 1317 is set. Furthermore, after the serial communication circuit 13114 starts operating, the initial setting of the driver circuit 13171 of the reel ratio display 1317 is performed.

[0225] Next, the main control MPU 1311 executes a process for setting a power-on command to be transmitted to the peripheral control board 1510 (step S32). In the power-on command creation process, game information is read from the game backup information, and various commands corresponding to the game information are stored in a predetermined storage area of ​​the main control built-in RAM 1312. The power-on command is generated by setting the power-on state reference command as reference command data, and adding command addition data corresponding to the command to be generated.

[0226] The power-on commands include the power-on status buffer command and the special symbol / electric device operation number command. The power-on status buffer command is a command that notifies the game status when the power is restored after a power outage, and notifies the probability of winning the special lottery and the operation mode of the normal electric device. On the other hand, the special symbol / electric device operation number command notifies the execution status of the variable display of the special symbol.

[0227] Thereafter, the main control MPU 1311 permits execution of interrupt processes, including timer interrupt processes (step S34). The processes from powering on the pachinko machine 1 to step S34 complete the initial settings of the pachinko machine 1 (initial settings means).

[0228] Next, the main control MPU 1311 acquires a power outage warning signal (step S36) and determines whether the power outage warning signal is ON or not (step S38). If the power outage warning signal is not ON (the result of step S38 is "No"), that is, a random number update process is executed (step S40). In the random number update process of step S46, random numbers other than the random numbers used to determine whether a special lottery or a normal lottery has been won are mainly updated. Note that the update process of the random numbers used to determine whether a special lottery or a normal lottery has been won is executed by a timer interrupt process described later. The processes from step S36 to step S40 are executed until the power outage warning signal is detected, and these processes are set as the main process on the main control side (normal means after initial setting).

[0229] On the other hand, when the power failure warning signal is detected (the result of step S38 is "Yes"), the main control MPU 1311 executes the power failure processing (power failure setting means). In the power failure processing, a process is executed to back up data for restoring the state before the power failure. Specifically, first, the interrupt processing is prohibited (step S42). This prevents the timer interrupt processing described later from being executed, prevents writing to the main control built-in RAM 1312, and protects the game information from being rewritten. Furthermore, the main control MPU 1311 clears the output ports to stop the operation of the devices controlled by the output from each port (step S44). Specifically, the power failure clear signal OFF bit data is set to the solenoid, power failure clear, and ACK output ports. It is not necessary to clear all the output ports. For example, it is sufficient to clear the output ports for controlling solenoids and motors that consume a large amount of power. By clearing these output ports, the power consumption during the time until the main board side power failure processing is completed can be reduced, and the main board side power failure processing can be completed reliably.

[0230] Next, the main control MPU 1311 calculates a checksum to determine whether the data stored in the work area to be backed up is held correctly (step S46). Furthermore, the main control MPU 1311 stores the checksum calculation result in the checksum area of ​​the RAM 1312 (step S48). This checksum is used to determine whether the data backed up in the work area is correct.

[0231] Next, a check code (e.g., a checksum) is calculated from the data in the work area for calculating the ratio of features (area 13128 for calculating the ratio of features) (step S50). If the check code is a fixed value, it is not necessary to calculate the check code in step S50. Note that the check code may be calculated and stored each time data is updated in the feature ratio calculation and display process, rather than in the process when the main board is turned off.

[0232] Next, the calculated check code (or a predetermined value used as the check code) is stored in a predetermined area of ​​the role ratio calculation area 13128 (step S52).

[0233] Next, the data in the main area of ​​the work for calculating the ratio of features (area 13128 for calculating the ratio of features) is copied to each backup area (step S54). At this time, the calculated check code is also copied. The backup may be executed appropriately (for example, each time the data is updated) in the calculation and display process of the ratio of features, instead of in the process when the power is turned off on the main board.

[0234] In this way, by storing the data used to calculate the reel ratio in a backup area together with a calculated (or predetermined) check code, the data for calculating the reel ratio can be retained even when the power is cut off, making it possible to calculate the reel ratio over a long period of operation.

[0235] Furthermore, a value indicating that the backup has been successfully completed is stored in the backup flag area as a power failure flag (step S56). This completes the storage of the game backup information. Finally, writing to the RAM 1312 is prohibited by outputting "01H" indicating write prohibition to the RAM protect register (step S58), and the system waits until recovery from the power failure (infinite loop).

[0236] [5-2. Timer interrupt processing] Next, the timer interrupt process will be described. The timer interrupt process is repeatedly performed at an interrupt period (4 ms in this embodiment) set in the initialization process shown in Fig. 21 and Fig. 22. Fig. 23 is a flowchart showing an example of the timer interrupt process.

[0237] When timer interrupt processing is started, the main control MPU 1311 executes the main control program to first set the RBS (register bank selection flag) of the program status word to 1 and switch the register (step S70). In this embodiment, the main control board 1310 has a bank 0 and a bank 1, which are switched and used every time the timer interrupt processing is executed.

[0238] Next, the main control MPU 1311 executes switch input processing (step S74). In the switch input processing, various signals input to the input terminals of various input ports of the main control MPU 1311 are read, and stored as input information in the input information storage area of ​​the main control built-in RAM 1312. Specifically, the detection signals from various sensors that detect game balls that have entered winning holes such as a general winning hole, the detection signal from the magnetic detection switch 3024 that detects fraudulent acts using magnets, and the payer ACK signal from the payout control board 951 that informs the payout control board 951 that the payout ball command transmitted in the prize ball control processing has been normally received are read, and stored as input information in the input information storage area. In addition, in the switch input processing, the detection signals from the discharged ball sensor 3060 and the shot ball sensor 1020 are read, and the number of out balls is counted.

[0239] Next, the main control MPU 1311 performs a timer update process (step S76). In the timer update process, for example, in addition to the time during which the special symbol display 1185 is lit according to the variable display pattern determined by the special symbol and special electric role control process described later, and the time during which the normal symbol display 1189 is lit according to the normal symbol variable display pattern determined by the normal symbol and normal electric role control process, the ACK signal input determination time set as a determination condition when determining whether or not a payer ACK signal that conveys that the payout control board 951 has normally received various commands transmitted by the main control board 1310 (main control MPU 1311) is input is performed. Specifically, when the variable display pattern or normal symbol variable display pattern has a variable display time of 5 seconds, the timer interrupt period is set to 4 ms, so that the variable display time is subtracted by 4 ms each time this timer subtraction process is performed, and the subtraction result becomes a value of 0, thereby accurately measuring the variable display pattern or normal symbol variable display pattern.

[0240] Next, the main control MPU 1311 executes random number update process 1 (step S78). In the random number update process 1, the random numbers for jackpot determination, the random numbers for jackpot symbols, and the random numbers for small jackpot symbols are updated. In addition to these random numbers, the random numbers for jackpot symbol initial value determination and the random numbers for small jackpot symbol initial value determination, which are updated in the non-win / lose random number update process in step S40 in the system / user reset process (main process on the main control side) shown in the figure, are also updated.

[0241] Next, the main control MPU 1311 executes a prize ball control process (step S80). In the prize ball control process, input information is read from the input information storage area, the number of game balls (prize balls) to be paid out is calculated based on the read input information, and the calculated number is written to the main control built-in RAM 1312. Also, based on the calculation result of the number of prize balls, a prize ball command for paying out game balls is created, and a self-check command for checking the connection status between the main control board 1310 and the payout control board 951 is created. The main control MPU 1311 transmits the created prize ball command and self-check command to the payout control board 951 as main payout serial data.

[0242] Next, the main control MPU 1311 judges the current game state, adds the number of prize balls to be paid out as the game value to an area corresponding to the current game state, and updates the area 13128 (see FIG. 26) for calculating the ratio of prize balls in the main control internal RAM 1312 (step S81). The process of step S81 can be skipped if there are no prize balls to be paid out in step S80, and the load on the pachinko machine 1 can be reduced.

[0243] Next, the main control MPU 1311 executes the frame command reception process (step S82). In the dispensing control board 951, the dispensing control program transmits various 1-byte (8-bit) commands classified as status display (for example, the frame status 1 command, the error release navigation command, and the frame status 2 command). On the other hand, as described later, the dispensing control program outputs an error occurrence command when an error occurs in the dispensing operation, and outputs an error release notification command based on the detection signal of the operation switch. In the frame command reception process, when various commands are normally received as the payer serial data, information to inform the payer control board 951 of the fact is stored as output information in the output information storage area of ​​the main control built-in RAM 1312. In addition, the main control MPU 1311 formats the command normally received as the payer serial data into a 2-byte (16-bit) command (for example, the frame status display command, the error release notification command, etc.), and stores it as transmission information in the transmission information storage area described above. In addition, in the prize ball discharge process, the number of prize balls discharged is recorded in a memory area (see Figure 27) determined by the game status of the device ratio calculation area 13128.

[0244] The feature ratio calculation area update process (step S81) may be executed in any order as long as it is executed after the prize ball control process (step S80) and before the feature ratio calculation and display process (step S89).

[0245] Next, the main control MPU 1311 executes a fraud detection process (step S84). In the fraud detection process, an abnormal state related to the winning ball is confirmed. For example, when the input information is read from the above-mentioned input information storage area, and the count switch detects that the game ball has entered the big winning hole 2005, 2006 when the big winning game state is not in progress, the main control program creates a winning abnormality display command classified as a notification display as an abnormal state, and stores it in the above-mentioned transmission information storage area as transmission information.

[0246] Next, the main control MPU 1311 executes the special symbol and special electric device control process (step S86). In the special symbol and special electric device control process, it is determined whether or not the random number value for the big win matches the winning determination value previously stored in the main control built-in ROM. Furthermore, it is determined whether or not to transition to a probability variable state based on the random number value of the big win symbol. Then, if the probability variable transition condition is established, the state is subsequently transitioned to the probability variable state, whereas if the probability variable transition condition is not established, the state is transitioned to a game state other than the probability variable state. Here, the "probability variable state" refers to a state (high probability state) in which the probability of winning the special lottery described above is set relatively high compared to the normal game state (low probability state).

[0247] Next, the main control MPU 1311 executes the normal symbol and normal electric accessory control process (step S88). In the normal symbol and normal electric accessory control process, the input information is read from the above-mentioned input information storage area, and it is determined whether or not the detection signal from the gate switch 2352 has been input to the input terminal. If the detection signal has been input to the input terminal, a random number for determining whether or not the normal symbol has won is extracted, and it is determined whether or not it matches the normal symbol winning determination value pre-stored in the main control built-in ROM (called "normal lottery"). Then, it is determined whether or not to open and close the second start opening door member 2549 according to the lottery result of the normal lottery. If the opening and closing operation is performed according to this determination, the second start opening door member 2549 is opened (or expanded), and the game state becomes one in which the game ball can be received by the start opening 2004, and the game state is shifted to one advantageous to the player.

[0248] Next, the main control MPU 1311 judges whether the display switch 1318 is operated, and if the display switch 1318 is operated, it calls the feature ratio calculation and display process (FIGS. 24 and 25) and calculates the feature ratio by referring to the number of winning balls stored in the feature ratio calculation area 13128. Then, it displays the calculated feature ratio on the feature ratio display 1317 (step S89). In this way, by calling the feature ratio calculation and display process in the timer interrupt process and calculating the feature ratio, it is possible to check the feature ratio (the gambling nature of the pachinko machine 1) based on the most recent data.

[0249] Regardless of whether the display switch 1318 is operated, if the main frame opening switch (not shown) detects that the main frame 4 has been released from the outer frame 2, the bonus ratio may be displayed. Also, if the display switch 1318 is operated while the main frame opening switch (not shown) is detecting that the main frame 4 has been released from the outer frame 2, the bonus ratio may be displayed on the bonus ratio display 1317. Since the display switch 1318 is provided on the back side of the game board, if the display switch 1318 is displayed, the main frame 4 is usually opened and the progress of the game has stopped. In this way, if the bonus ratio is calculated at the timing when the progress of the game has stopped, CPU resources are not consumed by division or subtraction for calculating the bonus ratio during the game, and the load on the CPU can be reduced.

[0250] Details of the role ratio calculation and display process will be described later with reference to Figs. 24 and 25. A specific example of a role ratio display method will be described later. When the display switch 1318 is operated, all types of values ​​(role ratio, consecutive role ratio, cumulative total, total cumulative total) may be calculated, but only the value to be displayed may be calculated each time the display switch 1318 is operated. Furthermore, the role ratio may be calculated regardless of whether the display switch 1318 is operated, and the calculated role ratio may be displayed on the role ratio display 1317 if the display switch 1318 is operated.

[0251] Even if the pachinko machine 1 detects fraud and stops the game, it executes the reel ratio calculation area update process (step S81) and the reel ratio calculation and display process (step S89). By executing these processes, regardless of whether fraud is detected or not, the reel ratio can be confirmed even during the fraud notification.

[0252] Next, the main control MPU 1311 executes an output data setting process (step S90). In the output data setting process, various signals are output from the output terminals of the various output ports of the main control MPU 1311. For example, when various commands from the payout control board 951 are normally received based on the output information, a main payout ACK signal is output to the payout control board 951 from the output terminal of a specified output port of the main control MPU 1311, and when a jackpot game state is reached, a drive signal is output to the attacca solenoids (first attacca solenoid 2113, second upper attacca solenoid 2553, second lower attacca solenoid 2556) which open and close the opening and closing member 2107 of the large prize winning openings 2005, 2006, and a drive signal is output to the start port solenoid 2550 which opens and closes the start port (second start port door member 2549).In addition, various information (game information) signals related to the game, such as a probability fluctuation information output signal, a special pattern display information output signal, a normal pattern display information output signal, time-saving information output information output information, and a start port winning information output signal, as well as security signals are output to the payout control board 951.

[0253] In the output data setting process, a signal corresponding to the number of out balls counted in the switch input process (step S74) is output from the external terminal board 784. For example, a pulse signal of a predetermined length may be output from the external terminal board 784 for every predetermined number of out balls (e.g., 10 balls).

[0254] In addition, the output data setting process sets test signals to be output to an inspection device connected to the pachinko machine 1. The test signals include, for example, signals indicating the game status and signals indicating the stopped symbols of normal symbols and special symbols (information signal output means).

[0255] Next, the main control MPU 1311 executes a peripheral control board command transmission process (step S92). In the peripheral control board command transmission process, transmission information such as commands and data is read from the transmission information storage area described above, and the transmission information is transmitted to the peripheral control board 1510 as main serial data. Various commands created in the timer interrupt process, which is this routine, are stored in the transmission information. One packet of the main serial data is composed of 3 bytes. Specifically, the main serial data is composed of a status indicating the type of command having a storage capacity of 1 byte (8 bits), a mode indicating a variation of the performance having a storage capacity of 1 byte (8 bits), and a sum value calculated by treating the status and the mode as numerical values, and this sum value is generated at the time of transmission.

[0256] Finally, the main control MPU 1311 sets a predetermined value (18H) in the watchdog timer clear register WCL (step S96). By setting a predetermined value in the watchdog timer clear register WCL, the watchdog timer clear register WCL is cleared. And finally, the main control MPU 1311 switches (restores) the register bank. When the above processing is completed, the timer interrupt processing is terminated and the processing before the interrupt is restored.

[0257] In the pachinko machine 1 of this embodiment, the main control MPU 1311 executes the calculation process of the role ratio and the consecutive role ratio in the timer interrupt process, but the payout control MPU of the payout control unit 952 may execute the calculation process of the role ratio and the consecutive role ratio. In this case, the main control board 1310 may send a command to the peripheral control unit 1511 of the peripheral control board 1510 to display the role ratio and the consecutive role ratio, or the payout control unit 952 may send a command to the peripheral control unit 1511 to display the role ratio and the consecutive role ratio.

[0258] [5-3. Calculation and display processing of the role ratio] 24 and 25 are flow charts showing an example of the role ratio calculation and display process. The role ratio calculation and display process is executed by the main control MPU 1311. The peripheral control unit 1511 of the peripheral control board 1510 may execute the role ratio calculation and display process. When the peripheral control unit 1511 calculates the role ratio, the calculated role ratio may be displayed on the main liquid crystal display device 1600. For example, when the calculated role ratio is within a predetermined range (or outside the range), the performance in the game may be changed. Specifically, when the role ratio exceeds a predetermined threshold value (a threshold value smaller than a reference value), the preview performance may be changed to provide a preview performance that is more interesting than a normal preview performance.

[0259] First, a check code is calculated from the main area of ​​the area 13128 for calculating the ratio of the role of the main control MPU 1311 in the RAM 1312 (step S140), and it is judged whether the calculated check code matches the check code stored in the area 13128 for calculating the ratio of the role of the main control MPU 1311 (step S142). If the calculated check code matches the check code stored in the area 13128 for calculating the ratio of the role of the main control MPU 1311, the data in the main area is normal, so a role ratio calculation process is executed, and the role ratio and the consecutive role ratio are calculated from the data in the main area and stored in the area 13128 for calculating the ratio of the role of the main control MPU 1311 (step S1...

Claims

【Claim 1】 In a gaming machine that conducts a lottery based on the fulfillment of predetermined lottery conditions and awards a gaming profit based on the result of the lottery, storage means for providing a first storage area used by a first program that controls the progress of the game and a second storage area used by a second program that performs control not directly related to the progress of the game; specific function activation means for activating a specific function that stops the progress of the game including the lottery when a predetermined count value that can be counted based on the fulfillment of predetermined counting conditions reaches a specific value; external signal output means capable of outputting an external signal, which is information related to the game, to the outside of the gaming machine; comprising: the specific function activation means enables settings related to the activation of the specific function by executing the second program; the external signal output means enables settings for outputting an external signal related to the specific function to the outside based on the count value by executing the second program; the external signal related to the specific function includes a pre-operation signal transmitted when the count value reaches a predetermined value smaller than the specific value; the external signal output means starts outputting the pre-operation signal when the count value reaches the predetermined value, continues to output it until the count value reaches the specific value, and stops outputting the pre-operation signal when the count value reaches the specific value; is capable of maintaining the output of the pre-operation signal even when an abnormality of the gaming machine is detected while the pre-operation signal is being output. A gaming machine characterized by the above.

Images