Pixel circuit, driving method, electroluminescent display panel, and display device

The pixel circuit addresses brightness non-uniformity in OLEDs by resetting and compensating the driving transistor's voltages within the pixel circuit, ensuring consistent light emission and improved display uniformity.

JP7693740B2Active Publication Date: 2025-06-17BOE TECHNOLOGY GROUP CO LTD
View PDF 4 Cites 0 Cited by

Patent Information

Application Number
JP2023067448
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2018-01-11
Filing Date
2023-04-17
Publication Date
2025-06-17
Estimated Expiration
2038-11-27

AI Technical Summary

Technical Problem

Current pixel circuits driving Organic Light Emitting Diodes (OLEDs) face issues with brightness non-uniformity due to residual voltages from previous frames affecting the light emission of subsequent frames.

Method used

The proposed pixel circuit includes a light-emitting device, a driving transistor, a capacitor circuit, a data writing circuit, and a reset circuit. The reset circuit resets the driving transistor's poles and gate, and the capacitor circuit accumulates voltage to generate a driving current, ensuring consistent light emission by setting voltages to fixed values before each data signal write.

Benefits of technology

This solution improves light emission uniformity by eliminating the influence of residual voltages from previous frames, thereby enhancing the display's brightness consistency and reducing short-term afterimages caused by hysteresis effects.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 0007693740000029
    Figure 0007693740000029
  • Figure 0007693740000030
    Figure 0007693740000030
  • Figure 0007693740000031
    Figure 0007693740000031
Patent Text Reader

Abstract

To provide a pixel circuit, a drive method, an electroluminescent light emitting display panel, and a display apparatus.SOLUTION: The pixel circuit comprises: a light-emitting device; a drive transistor, which is configured to generate a drive current during a light emitting phase to drive the light-emitting device to emit light, of which a gate is coupled to a capacitor circuit and a data write circuit respectively, in which a first electrode is coupled to a reset circuit, and which a second electrode is coupled to the reset circuit and a first electrode of the light-emitting device respectively; a capacitor circuit configured to accumulate voltage of the gate of the drive transistor; a data write circuit configured to supply a data signal to the gate of the drive transistor during a data write phase; and a reset circuit configured to reset the first electrode and the second electrode of the drive transistor during a reset phase.SELECTED DRAWING: Figure 1
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This application claims the priority of the Chinese patent application with the application number 201810026813.6 and the disclosure title of "Pixel Circuit, Driving Method, Electroluminescent Display Panel and Display Device" filed with the China National Intellectual Property Administration on January 11, 2018, and the entire content thereof is incorporated herein by reference.

[0002] The present disclosure relates to the field of display technologies, and particularly to pixel circuits, driving methods, electroluminescent display panels, and display devices.

Background Art

[0003] Organic Light Emitting Diode (OLED) is one of the focuses in the current research field of flat panel displays. Compared with Liquid Crystal Display (LCD), OLED displays have advantages such as low energy consumption, low production cost, self-luminescence, wide viewing angle, and high-speed response. Currently, in the display fields such as mobile phones, tablets, and digital cameras, OLED displays have been used as a replacement for conventional LCD displays. Different from LCDs that control brightness with a stable voltage, OLEDs are current-driven types, and a stable current is required to control their light emission. Generally, an OLED is driven to emit light by installing a pixel circuit. Currently, when a pixel circuit drives an OLED to emit light, the voltages of the first and second electrodes of the driving transistor are affected by the voltages when the previous frame is displayed, so there is a problem of brightness non-uniformity.

Summary of the Invention

[0004] The pixel circuit according to an embodiment of the present disclosure includes a light-emitting device, and configured to generate a driving current in a light emitting stage to drive the light emitting device to emit light, with a gate coupled to each of a capacitor circuit and a data writing circuit, a first pole coupled to a reset circuit, and a second pole coupled to each of the reset circuit and a first electrode of the light emitting device; a capacitor circuit configured to accumulate a voltage of the gate of the driving transistor; a data writing circuit configured to supply a data signal to the gate of the driving transistor in a data writing stage; a reset circuit configured to reset a first pole and a second pole of the driving transistor in a reset stage, and comprising:

[0005] In an embodiment of the present disclosure, the reset circuit may be further coupled to the gate of the driving transistor, and configured to reset the gate of the driving transistor in the reset stage and compensate for a threshold voltage of the driving transistor in a threshold compensation stage.

[0006] In an embodiment of the present disclosure, the reset circuit includes a first switching transistor, a second switching transistor, and a third switching transistor, wherein a gate of the first switching transistor is coupled to a first scanning signal line, a first pole of the first switching transistor is coupled to a first reference signal line, and a second pole of the first switching transistor is coupled to the second pole of the driving transistor; a gate of the second switching transistor is coupled to a second scanning signal line, a first pole of the second switching transistor is coupled to a second reference signal line, and a second pole of the second switching transistor is coupled to the first pole of the driving transistor; a gate of the third switching transistor is coupled to a third scanning signal line, a first pole of the third switching transistor is coupled to a third reference signal line, and a second pole of the third switching transistor is coupled to the gate of the driving transistor.

[0007] In an embodiment of the present disclosure, the materials of the active layers of the first switching transistor and the third switching transistor include a metal oxide semiconductor material, The material of the active layer of the second switching transistor may include a low-temperature polysilicon material.

[0008] In an embodiment of the present disclosure, the signals of the first scanning signal line and the signals of the third scanning signal line may be the same.

[0009] In an embodiment of the present disclosure, the signals of the first reference signal line and the signals of the third reference signal line may be the same.

[0010] In an embodiment of the present disclosure, the capacitor circuit includes a storage capacitor and a voltage-dividing capacitor, The storage capacitor is coupled between the gate and the first pole of the driving transistor, The voltage-dividing capacitor may be coupled between the first pole of the driving transistor and the second reference signal line.

[0011] In an embodiment of the present disclosure, the data writing circuit includes a fourth switching transistor, The gate of the fourth switching transistor is coupled to the fourth scanning signal line, the first pole of the fourth switching transistor is coupled to the data signal line to receive the data signal, and the second pole of the fourth switching transistor may be coupled to the gate of the driving transistor.

[0012] In an embodiment of the present disclosure, the material of the active layer of the fourth switching transistor may include a metal oxide semiconductor material.

[0013] In an embodiment of the present disclosure, the pixel circuit further includes a light emission control circuit, and a second electrode of the driving transistor and the reset circuit are respectively coupled to a first electrode of the light emitting device via the light emission control circuit, and the light emission control circuit may be configured to control on or off between the second electrode of the driving transistor and the first electrode of the light emitting device.

[0014] In an embodiment of the present disclosure, the light emission control circuit includes a fifth switching transistor. A gate of the fifth switching transistor is coupled to a light emission control signal line, a first electrode of the fifth switching transistor is coupled to a second electrode of the driving transistor, and a second electrode of the fifth switching transistor is coupled to a first electrode of the light emitting device.

[0015] In an embodiment of the present disclosure, a material of an active layer of the fifth switching transistor may include a low-temperature polysilicon material.

[0016] In an embodiment of the present disclosure, a signal of the light emission control signal line and a signal of a second scanning signal line may be the same.

[0017] In an embodiment of the present disclosure, a material of an active layer of the driving transistor may include a low-temperature polysilicon material.

[0018] Correspondingly, an embodiment of the present disclosure further provides a pixel circuit, and the pixel circuit includes a light emitting device, a first switching transistor having a gate coupled to a first scanning signal line, a first electrode coupled to a first reference signal line, and a second electrode coupled to a second electrode of the driving transistor, a second switching transistor having a gate coupled to a second scanning signal line, a first electrode coupled to a second reference signal line, and a second electrode coupled to a first electrode of the driving transistor, A third switching transistor having a gate coupled to a third scanning signal line, a first pole coupled to a third reference signal line, and a second pole coupled to the gate of the driving transistor; A fourth switching transistor having a gate coupled to a fourth scanning signal line, a first pole coupled to a data signal line, and a second pole coupled to the gate of the driving transistor; A fifth switching transistor having a gate coupled to a light emission control signal line, a first pole coupled to the second pole of the driving transistor and the second pole of the first switching transistor respectively, and a second pole coupled to the first electrode of the light emitting device; A storage capacitor coupled between the gate and the first pole of the driving transistor; A pixel circuit comprising a voltage dividing capacitor coupled between the first pole of the driving transistor and a second reference signal line.

[0019] In an embodiment of the present disclosure, the material of the active layer of the first switching transistor, the third switching transistor, and the fourth switching transistor includes a metal oxide semiconductor material. The material of the active layer of the second switching transistor, the fifth switching transistor, and the driving transistor may include a low-temperature polysilicon material.

[0020] In an embodiment of the present disclosure, the signals of the first scanning signal line and the third scanning signal line may be the same.

[0021] In an embodiment of the present disclosure, the signals of the first reference signal line and the third reference signal line may be the same.

[0022] In an embodiment of the present disclosure, the signals of the light emission control signal line and the second scanning signal line may be the same.

[0023] Correspondingly, the electroluminescent display panel according to the embodiment of the present disclosure includes a pixel circuit, a data signal line, a first scan signal line, a second scan signal line, a third scan signal line, a fourth scan signal line, a light emission control signal line, a first reference voltage line, a second reference voltage line, and a third reference voltage line. The pixel circuit includes a first switching transistor, a second switching transistor, a third switching transistor, a fourth switching transistor, a fifth switching transistor, a driving transistor, a storage capacitor, a voltage dividing capacitor, and a light emitting device. The gate of the first switching transistor is coupled to the first scan signal line to which a current corresponding signal is applied, the first pole of the first switching transistor is coupled to the first reference signal line, and the second pole of the first switching transistor is coupled to the second pole of the driving transistor. The gate of the second switching transistor is coupled to the second scan signal line to which a current corresponding signal is applied, the first pole of the second switching transistor is coupled to the second reference signal line, and the second pole of the second switching transistor is coupled to the first pole of the driving transistor. The gate of the third switching transistor is coupled to the third scan signal line to which a current corresponding signal is applied, the first pole of the third switching transistor is coupled to the third reference signal line, and the second pole of the third switching transistor is coupled to the gate of the driving transistor. The gate of the fourth switching transistor is coupled to the fourth scan signal line to which a current corresponding signal is applied, the first pole of the fourth switching transistor is coupled to the data signal line to which a current corresponding signal is applied, and the second pole of the fourth switching transistor is coupled to the gate of the driving transistor. The gate of the fifth switching transistor is coupled to a light emission control signal line to which a current corresponding signal is currently applied, the first pole of the fifth switching transistor is coupled to each of the second pole of the driving transistor and the second pole of the first switching transistor, and the second pole of the fifth switching transistor is coupled to the first electrode of the light emitting device. The storage capacitor is coupled between the gate and the first pole of the driving transistor. The voltage dividing capacitor may be coupled between the first pole of the driving transistor and the second reference signal line.

[0024] In an embodiment of the present disclosure, the signals of the first scanning signal line and the third scanning signal line coupled to the same pixel circuit may be the same.

[0025] In an embodiment of the present disclosure, the signals of the first reference signal line and the third reference signal line may be the same.

[0026] In an embodiment of the present disclosure, the signals of the light emission control signal line and the second scanning signal line coupled to the same pixel circuit may be the same.

[0027] Correspondingly, the display device according to an embodiment of the present disclosure includes an electroluminescent display panel according to any one of claims 20 to 23.

[0028] Correspondingly, the driving method of the pixel circuit according to an embodiment of the present disclosure is as follows. The reset circuit includes a reset stage of resetting the first pole and the second pole of the driving transistor. The data writing circuit includes a data writing stage of supplying the data signal to the gate of the driving transistor. The capacitor circuit includes a light emission stage of accumulating the voltage of the gate of the driving transistor, so that the driving transistor generates a driving current to drive the light emitting device to emit light.

[0029] In an embodiment of the present disclosure, in the reset stage, the reset circuit further includes a step of resetting the gate of the driving transistor. Before the data writing stage and after the reset stage, the method may further include a threshold compensation stage in which the reset circuit compensates the threshold voltage of the driving transistor.

[0030] In an embodiment of the present disclosure, in the reset stage, the first switching transistor in the reset circuit is turned on to supply the signal of the first reference signal line to the second pole of the driving transistor, the second switching transistor is turned on to supply the signal of the second reference signal line to the first pole of the driving transistor, and the third switching transistor is turned on to supply the signal of the third reference signal line to the gate of the driving transistor, respectively, for control. In the threshold compensation stage, the second switching transistor in the reset circuit is turned off, the first switching transistor is turned on to supply the signal of the first reference signal line to the second pole of the driving transistor, the third switching transistor is turned on to supply the signal of the third reference signal line to the gate of the driving transistor, and the driving transistor is turned on to perform threshold compensation, respectively, for control.

[0031] In an embodiment of the present disclosure, in the reset stage and the light emitting stage, the method may further include a step of turning on the second pole of the driving transistor and the first electrode of the light emitting device by the light emitting control circuit.

Brief Description of the Drawings

[0032]

Figure 1

Figure 2

Figure 3a

Figure 3b

Figure 4a

Figure 4b

Figure 5a

Figure 5b

Figure 5c

Figure 5d

Figure 6

Figure 7

Figure 8

Embodiments for Carrying Out the Invention

[0033] To make the objectives, technical solutions, and advantages of the present disclosure clearer, specific embodiments of the pixel circuit, driving method, electroluminescent display panel, and display device according to the embodiments of the present disclosure will be described in detail below with reference to the drawings. It should be understood that the preferred embodiments described below are only for explaining and interpreting the present disclosure and do not limit the present disclosure. Also, unless there is a contradiction, the embodiments of the present application and the features in the embodiments can be combined with each other.

[0034] As shown in FIG. 1, the pixel circuit according to an embodiment of the present disclosure A light-emitting device L, and configured to generate a drive current in a light emission stage to drive a light emitting device L to emit light, where a gate G is coupled to a capacitor circuit 3 and a data writing circuit 2, a first pole S is coupled to a reset circuit 1, and a second pole D is coupled to each of the reset circuit 1 and a first electrode of the light emitting device L; a driving transistor M0, a capacitor circuit 3 configured to accumulate a voltage of a gate G of the driving transistor M0; a data writing circuit 2 configured to supply a data signal (Data) to the gate G of the driving transistor M0 in a data writing stage; a reset circuit 1 configured to reset a first pole S and a second pole D of the driving transistor M0 in a reset stage.

[0035] The pixel circuit according to an embodiment of the present disclosure can reset the first pole and the second pole of the driving transistor in a reset stage by the reset circuit, and then write a data signal to the gate of the driving transistor by the data writing circuit, and generate a drive current by the driving transistor to drive the light emitting device to emit light. Thereby, before writing the data signal each time, the voltage of the first pole of the driving transistor is set to a fixed voltage, and the voltage of the second pole of the driving transistor is set to a fixed voltage, so as to avoid the influence of the residual voltage of the previous frame on the light emission of the current frame, and further improve the light emission uniformity of the display panel.

[0036] Generally, after driving a light-emitting device to emit light for a certain period of time in a certain grayscale, the driving transistor causes an offset in the characteristics of the driving transistor, such as the threshold voltage and mobility, due to bias stress. However, since the bias stress when the driving transistor drives the light-emitting device to emit light in different grayscales is different, the offsets in the characteristics of the driving transistor in different grayscales are also different. As a result, when switching between high and low grayscales for display, a problem of short-term afterimage occurs due to the hysteresis effect. When specifically implemented, in the above pixel circuit according to the embodiment of the present disclosure, as shown in FIG. 2, the reset circuit 1 is further coupled to the gate G of the driving transistor M0, and is configured to reset the gate G of the driving transistor M0 in the reset stage and compensate for the threshold voltage of the driving transistor M0 in the threshold compensation stage. Thereby, before writing the data signal of each frame, the voltage of the gate G of the driving transistor M0 is reset, that is, the voltage of the gate G is set to a fixed voltage, and the voltage of the first pole S of the driving transistor M0 is set to a fixed voltage, and the voltage of the second pole D of the driving transistor M0 is set to a fixed voltage. By doing so, each time the data signal Data is written, the gate G of the driving transistor M0 jumps at the same voltage, and the voltage of the first pole S thereof jumps at the same voltage, thereby improving the problem of short-term afterimage due to the hysteresis effect.

[0037] Hereinafter, the present disclosure will be described in detail with specific examples. It should be noted that this embodiment is only for further interpreting the present disclosure and does not limit the present disclosure.

[0038] Generally, a transistor using a low temperature poly-silicon (LTPS) material as an active layer has high mobility and can achieve thinner, smaller, and lower power consumption. When specifically implemented, the material of the active layer of the driving transistor may include a low temperature poly-silicon material.

[0039] When specifically implemented, in the pixel circuit according to the embodiment of the present disclosure, as shown in FIGS. 1 to 4b, the driving transistor M0 may be a P-type transistor, and the first pole S of the driving transistor M0 may be its source, and the second pole D of the driving transistor M0 may be its drain. When the driving transistor M0 is in a saturation state, current flows from the source of the driving transistor M0 to its drain.

[0040] When specifically implemented, in the pixel circuit according to the embodiment of the present disclosure, as shown in FIGS. 1 to 4b, the second electrode of the light-emitting device L is coupled to the low-voltage power supply terminal (ELVSS). The voltage of the low-voltage power supply terminal ELVSS is generally grounded or negative, and its specific voltage value needs to be determined according to the actual usage environment and is not limited here.

[0041] When specifically implemented, in the pixel circuit according to the embodiment of the present disclosure, the light-emitting device may be an electroluminescent diode, the anode of the electroluminescent diode is the first electrode of the light-emitting device, the cathode of the electroluminescent diode is the second electrode of the light-emitting device, and the light-emitting device realizes light emission by the action of the current generated when the driving transistor is in a saturation state. Also, generally, the light-emitting device has a light-emitting threshold voltage V L and emits light when the voltage difference between the two electrodes of the light-emitting device is equal to or greater than the light-emitting threshold voltage V L The electroluminescent diode may include an organic light-emitting diode or a quantum dot light-emitting diode, but is not limited here.

[0042] When specifically implemented, in the pixel circuit according to the embodiment of the present disclosure, as shown in FIGS. 3a to 4b, the data writing circuit 2 includes a fourth switching transistor M4, the gate of the fourth switching transistor M4 is coupled to the fourth scan signal line (Scan4), the first pole of the fourth switching transistor M4 is coupled to the data signal line (DATA) and used to receive a data signal, and the second pole of the fourth switching transistor M4 may be coupled to the gate G of the driving transistor M0.

[0043] When specifically implemented, in the pixel circuit according to the embodiment of the present disclosure, the fourth switching transistor is in an on state under the control of the signal of the fourth scanning signal line in the data writing stage, and can write the data signal of the data signal line to the gate of the driving transistor.

[0044] Generally, since the leakage current of a transistor using a metal oxide semiconductor material as the active layer is small, in order to reduce the leakage current, when specifically implemented, in the pixel circuit according to the embodiment of the present disclosure, the material of the active layer of the fourth switching transistor may include a metal oxide semiconductor material, for example, IGZO (Indium Gallium Zinc Oxide), and of course, other metal oxide semiconductor materials may also be used, and are not limited here. Thereby, it is advantageous to reduce the leakage current when the fourth switching transistor M4 is off and reduce the interference of the leakage current of the fourth switching transistor M4 on the driving transistor M0 when the light emitting device L emits light, and further eliminate the influence on the driving current for driving the light emitting device by the driving transistor M0.

[0045] The above is only an exemplary description of the specific structure of the data writing circuit of the pixel circuit according to the embodiment of the present disclosure. When specifically implemented, the specific structure of the data writing circuit is not limited to the above structure according to the embodiment of the present disclosure, and may be other structures known to those skilled in the art, and are not limited here.

[0046] When specifically implemented, in the pixel circuit according to the embodiment of the present disclosure, as shown in FIGS. 3a to 4b, the reset circuit 1 includes a first switching transistor M1, a second switching transistor M2, and a third switching transistor M3. The gate of the first switching transistor M1 is coupled to the first scan signal line (Scan1), the first pole of the first switching transistor M1 is coupled to the first reference signal line (Vref1), and the second pole of the first switching transistor M1 is coupled to the second pole D of the driving transistor M0. The gate of the second switching transistor M2 is coupled to the second scan signal line (Scan2), the first pole of the second switching transistor M2 is coupled to the second reference signal line (Vref2), and the second pole of the second switching transistor M2 is coupled to the first pole S of the driving transistor M0. The gate of the third switching transistor M3 may be coupled to the third scan signal line (Scan3), the first pole of the third switching transistor M3 may be coupled to the third reference signal line (Vref3), and the second pole of the third switching transistor M3 may be coupled to the gate G of the driving transistor M0.

[0047] When specifically implemented, in the pixel circuit according to the embodiment of the present disclosure, the first switching transistor is in an on state under the control of the signal of the first scanning signal line in the reset stage, and supplies the signal of the first reference signal line to the second pole of the driving transistor, so that the second pole of the driving transistor can be reset in the reset stage. The second switching transistor is in an on state under the control of the signal of the second scanning signal line in the reset stage, and supplies the signal of the second reference signal line to the first pole of the driving transistor, so that the first pole of the driving transistor can be reset in the reset stage. The third switching transistor is in an on state under the control of the signal of the third scanning signal line in the reset stage, and supplies the signal of the third reference signal line to the gate of the driving transistor, so that the gate of the driving transistor can be reset in the reset stage. The third switching transistor is in an on state under the control of the signal of the third scanning signal line in the threshold compensation stage, and can supply the signal of the third reference signal line to the gate of the driving transistor. The first switching transistor is in an on state under the control of the signal of the first scanning signal line in the threshold compensation stage, and can supply the signal of the first reference signal line to the second pole of the driving transistor. The driving transistor is turned on in the threshold compensation stage to achieve threshold compensation.

[0048] When specifically implemented, in the pixel circuit according to the embodiment of the present disclosure, the material of the active layer of the first switching transistor may include a metal oxide semiconductor material. Thereby, it is advantageous to reduce the leakage current when the first switching transistor is off, reduce the interference of the leakage current of the first switching transistor to the driving transistor when the light-emitting device emits light, and further eliminate the influence on the driving current for driving the light-emitting device to emit light by the driving transistor.

[0049] When specifically implemented, in the pixel circuit according to the embodiment of the present disclosure, the material of the active layer of the third switching transistor may include a metal oxide semiconductor material. Thereby, the leakage current when the third switching transistor is off can be reduced, which is advantageous for reducing the interference of the leakage current of the third switching transistor on the driving transistor when the light-emitting device emits light, and further eliminating the influence on the driving current for the driving transistor to drive the light-emitting device to emit light.

[0050] When specifically implemented, in the pixel circuit according to the embodiment of the present disclosure, the material of the active layer of the second switching transistor may include a low-temperature poly-silicon material, thereby increasing the mobility of the second switching transistor and realizing thinner, smaller size, lower power consumption, etc.

[0051] In order to reduce the setting of signal lines, reduce the number of signal lines, and save wiring space, when specifically implemented, in the pixel circuit according to the embodiment of the present disclosure, the signals of the first reference signal line and the third reference signal line can be set to be the same. The first reference signal line and the third reference signal line may be made the same signal line. Specifically, as shown in FIGS. 3b and 4b, the first poles of the first switching transistor M1 and the third switching transistor M3 may all be coupled to the first reference signal line Vref1. Of course, the first poles of the first switching transistor and the third switching transistor may all be coupled to the third reference signal line, and are not limited here.

[0052] When specifically implemented to reduce the settings of signal lines, reduce the number of signal lines, and save wiring space, in the pixel circuit according to the embodiments of the present disclosure, the signals of the first scanning signal line and the third scanning signal line can be set to be the same. The first scanning signal line and the third scanning signal line may be made into the same signal line. Specifically, as shown in FIGS. 3b and 4b, the gates of the first switching transistor M1 and the third switching transistor M3 may all be coupled to the first scanning signal line Scan1. In this case, the first switching transistor M1 and the third switching transistor M3 are transistors of the same type, that is, both may be N-type transistors, and are not limited here. Of course, the gates of the first switching transistor and the third switching transistor may all be coupled to the third scanning signal line, and are not limited here.

[0053] Furthermore, when specifically implemented to reduce the settings of signal lines, reduce the number of signal lines, and save wiring space, in the pixel circuit according to the embodiments of the present disclosure, the signals of the first scanning signal line and the third scanning signal line can be set to be the same, and the signals of the first reference signal line and the third reference signal line can be set to be the same. Specifically, as shown in FIGS. 3b and 4b, the first poles of the first switching transistor M1 and the third switching transistor M3 are all coupled to the first reference signal line Vref1, and the gates of the first switching transistor M1 and the third switching transistor M3 may all be coupled to the first scanning signal line Scan1.

[0054] When specifically implemented, in the above pixel circuit according to the embodiments of the present disclosure, the voltage V of the signal of the second reference signal line ref2 is generally a positive value. For example, the signal of the second reference signal line is the signal of the high voltage power supply terminal ELVDD. The voltage V of the signal of the first reference signal line ref1 is preferably a negative value, and the voltage V of the signal of the third reference signal line ref3is generally a negative value, where the voltage V of the first reference signal line ref1 and the voltage V of the low voltage power supply terminal ss generally satisfy the formula V ref1 -V ss <V L . However, the specific voltage value of the signal on the above signal line needs to be determined according to the actual usage environment and is not limited here.

[0055] The above is only an exemplary description of the specific structure of the reset circuit of the pixel circuit according to the embodiments of the present disclosure. When specifically implemented, the specific structure of the reset circuit is not limited to the above structure according to the embodiments of the present disclosure, and other structures known to those skilled in the art may also be used and are not limited here.

[0056] When specifically implemented, in the pixel circuit according to the embodiments of the present disclosure, as shown in FIGS. 3a to 4b, the capacitor circuit 3 includes an accumulation capacitor C1 and a voltage dividing capacitor C2. The accumulation capacitor C1 is coupled between the gate G and the first pole S of the driving transistor M0. The voltage dividing capacitor C2 may also be coupled between the first pole S of the driving transistor M0 and the second reference signal line Vref2.

[0057] When specifically implemented, in the pixel circuit according to the embodiments of the present disclosure, the accumulation capacitor stably holds the voltage between the gate of the driving transistor and the first pole of the driving transistor, can be charged and discharged by the action of the signal input to the gate of the driving transistor and the first pole of the driving transistor, and when the first pole of the driving transistor is in a floating state, the changed voltage difference of the gate of the driving transistor can be coupled to the first pole of the driving transistor.

[0058] The above is only an exemplary description of the specific structure of the capacitor circuit of the pixel circuit according to the embodiments of the present disclosure. When specifically implemented, the specific structure of the capacitor circuit is not limited to the above structure according to the embodiments of the present disclosure, and other structures known to those skilled in the art may also be used and are not limited here.

[0059] To avoid the influence on the performance of the light-emitting device in the threshold compensation stage, when specifically implemented, in the pixel circuit according to the embodiment of the present disclosure, as shown in FIG. 2, the pixel circuit further includes a light-emitting control circuit 4, and the second pole D of the driving transistor M0 and the reset circuit 1 are respectively coupled to the first electrode of the light-emitting device L through the light-emitting control circuit 4. The light-emitting control circuit 4 may be configured to control the on or off of the second pole D of the driving transistor M0 and the first electrode of the light-emitting device L. Thereby, in the reset stage, the light-emitting device L can be reset, and in the light-emitting stage, the driving current by the driving transistor M0 can be passed to the light-emitting device L to drive the light-emitting device L to emit light.

[0060] When specifically implemented, in the pixel circuit according to the embodiment of the present disclosure, as shown in FIGS. 4a and 4b, the light-emitting control circuit 4 includes a fifth switching transistor M5. The gate of the fifth switching transistor M5 is coupled to the light-emitting control signal line (EMIT), the first pole of the fifth switching transistor M5 is coupled to the second pole D of the driving transistor M0 and the first pole of the first switching transistor respectively, and the second pole of the fifth switching transistor M5 may be coupled to the first electrode of the light-emitting device L.

[0061] When specifically implemented, in the pixel circuit according to the embodiment of the present disclosure, the fifth switching transistor is in an on state under the control of the signal on the light-emitting control signal line in the reset stage, and the second pole of the driving transistor and the first electrode of the light-emitting device can be turned on to reset the light-emitting device. The fifth switching transistor is in an on state under the control of the signal on the light-emitting control signal line in the light-emitting stage, and the second pole of the driving transistor and the first electrode of the light-emitting device can be turned on to output the driving current by the driving transistor to the light-emitting device to drive the light-emitting device to emit light.

[0062] When specifically implemented, in the pixel circuit according to the embodiment of the present disclosure, the material of the active layer of the fifth switching transistor may include a low-temperature polysilicon material, thereby realizing further thinning, miniaturization, and low power consumption of the fifth switching transistor.

[0063] Furthermore, in order to reduce the setting of signal lines, reduce the number of signal lines, and save wiring space, when specifically implemented, in the pixel circuit according to the embodiment of the present disclosure, the signal of the light emission control signal line and the signal of the second scanning signal line can be set to be the same. The light emission control signal line and the second scanning signal line may be made the same signal line. Specifically, as shown in FIG. 4b, the gates of the second switching transistor M2 and the fifth switching transistor M5 are all coupled to the light emission control signal line EMIT. Of course, the gates of the second switching transistor and the fifth switching transistor may all be coupled to the second scanning signal line, and are not limited herein.

[0064] The above is only an exemplary description of the specific structure of the light emission control circuit of the pixel circuit according to the embodiment of the present disclosure. When specifically implemented, the specific structure of the light emission control circuit is not limited to the above structure according to the embodiment of the present disclosure, and may be other structures known to those skilled in the art, and is not limited herein.

[0065] Generally, when a metal oxide semiconductor material or a low-temperature polysilicon material is used as the active layer, in order to make the type of the formed transistor P-type or N-type, ion doping can be performed on the active layer by a doping process. When specifically implemented, in the pixel circuit according to the embodiment of the present disclosure, each of the above switching transistors can be set to a P-type transistor or an N-type transistor according to the actual use environment, and is not limited herein.

[0066] When specifically implemented, in the pixel circuit according to the embodiment of the present disclosure, as shown in FIGS. 3A to 4B, the first switching transistor M1, the third switching transistor M3, and the fourth switching transistor M4 may be set as N-type transistors, and the second switching transistor M2 and the fifth switching transistor M5 may be set as P-type transistors.

[0067] In order to further reduce the leakage current, a double-gate structure may be used for the switching transistor. When specifically implemented, it is preferable that the first switching transistor, the third switching transistor, and the fourth switching transistor have a double-gate structure. Thereby, when the light-emitting device emits light, the interference to the driving transistor can be reduced, and further the influence on the driving current for driving the light-emitting device to emit light by the driving transistor can be avoided. And in the pixel circuit according to the embodiment of the present disclosure, from the perspective of reducing the leakage current, any of the switching transistors may have a double-gate structure, and it is not limited here.

[0068] Specifically, in the pixel circuit according to the embodiment of the present disclosure, the P-type transistor is turned on by the action of a low-potential signal and turned off by the action of a high-potential signal, and the N-type transistor is turned on by the action of a high-potential signal and turned off by the action of a low-potential signal.

[0069] Specifically, in the pixel circuit according to the embodiment of the present disclosure, the first pole of each of the above switching transistors can be its source, the second pole can be its drain, or the first pole of each of the above switching transistors can be its drain, and the second pole can be its source, and there is no particular distinction here.

[0070] Furthermore, when specifically implemented, in the pixel circuit according to the embodiments of the present disclosure, the materials of the active layers of the first switching transistor, the third switching transistor, and the fourth switching transistor are all metal oxide semiconductor materials. That is, the first switching transistor, the third switching transistor, and the fourth switching transistor can all be oxide-type transistors, whereby the leakage currents of the first switching transistor, the third switching transistor, and the fourth switching transistor can be reduced. Further, as a process of manufacturing a transistor using a metal oxide semiconductor material as the active layer, it may be the same as the process of the prior art for manufacturing an oxide thin film transistor (Oxide Thin Film Transistor), which will not be described in detail here. Also, the materials of the active layers of the second switching transistor, the fifth switching transistor, and the driving transistor are low-temperature polysilicon materials. That is, the driving transistor, the second switching transistor, and the fifth switching transistor can all be LTPS-type transistors, whereby the mobilities of the second switching transistor, the fifth switching transistor, and the driving transistor can be increased, and thinner, smaller, and lower power consumption can be achieved. Further, as a process of manufacturing a transistor using low-temperature polysilicon as the active layer, it may be the same as the process of the prior art for manufacturing an LTPS-type transistor, which will not be described in detail here. By combining the manufacturing processes of these two types of transistors, namely LTPS-type transistors and oxide-type transistors, to manufacture an LTPO pixel circuit of low-temperature polysilicon oxide, the leakage current of the gate of the driving transistor can be reduced, and the power consumption can be decreased. Thereby, when the pixel circuit is applied to an electroluminescent display panel, the uniformity of the display can be ensured when the display panel reduces the refresh rate for display.

[0071] Hereinafter, the operation process of the pixel circuit according to the embodiment of the present disclosure will be described with reference to the circuit timing diagram. In the following description, 1 indicates a high potential and 0 indicates a low potential. Note that 1 and 0 are only logic potentials and are not specific voltage values for the purpose of better interpreting the specific operation process of the embodiment of the present disclosure.

[0072] In some embodiments, taking the pixel circuit shown in FIG. 3b as an example, the corresponding input timing diagram is shown in FIG. 5a. Specifically, mainly three stages of the reset stage T1, the data writing stage T2, and the light emitting stage T3 in the input timing diagram shown in FIG. 5a are selected.

[0073] In the reset stage T1, the first scan signal Scan1 = 1, the second scan signal Scan2 = 0, and the fourth scan signal Scan4 = 0.

[0074] Since Scan1 = 1, the first switching transistor M1 and the third switching transistor M3 are all turned on. The turned-on first switching transistor M1 supplies the signal of the first reference signal line Vref1 to the second pole D of the driving transistor M0, thereby resetting the second pole D of the driving transistor M0 and the light emitting device L, and thereby avoiding the interference of light emission between two adjacent display frames. The turned-on third switching transistor M3 supplies the signal of the first reference signal line Vref1 to the gate G of the driving transistor M0, thereby resetting the gate G of the driving transistor M0. Since Scan2 = 0, the second switching transistor M2 is turned on and supplies the signal of the second reference signal line Vref2 to the first pole S of the driving transistor M0, thereby resetting the first pole S of the driving transistor M0. Of course, when the reset circuit only resets the first pole S and the second pole D of the driving transistor M0, the third switching transistor M3 may not be provided. Since Scan4 = 0, the fourth switching transistor M4 is turned off.

[0075] In the data writing stage T2, Scan1 = 0, Scan2 = 1, and Scan4 = 1.

[0076] Since Scan4 = 1, the fourth switching transistor M4 turns on, writes the data signal on the data signal line DATA to the gate G of the driving transistor M0, and sets the voltage of the gate G of the driving transistor M0 to the voltage V of the data signal data and stores it in the storage capacitor C1. Since Scan1 = 0, the first switching transistor M1 and the third switching transistor M3 both turn off. Since Scan2 = 1, the second switching transistor M2 turns off.

[0077] In the light emission stage T3, Scan1 = 0, Scan2 = 0, and Scan4 = 0.

[0078] Since Scan2 = 0, the second switching transistor M2 turns on, supplies the signal on the second reference signal line Vref2 to the first pole S of the driving transistor M0, and sets the voltage of the first pole S to V ref2 of the driving transistor M0. The driving transistor M0 generates a driving current I ref2 under the control of the voltage V data of its first pole S and the voltage V L of its gate G, and

[0079]

Number

[0080] By setting it as such, the driving current I L drives the light emitting device L to emit light. Here, V th is the threshold voltage of the driving transistor M0, K is a structural parameter, and

[0081]

Number

[0082] where μ n represents the mobility of the driving transistor M0, and C ox is the capacitance of the gate oxide layer per unit area.

[0083] [Number]

[0084] is the width-to-length ratio of the driving transistor M0. Since these values are relatively stable in the same structure, they can be regarded as constants.

[0085] By resetting the first and second poles of the driving transistor in the reset stage, a data signal is written to the gate of the driving transistor in the data writing stage, and the driving transistor drives the light-emitting device to emit light in the light-emitting stage. Thereby, before writing the data signal each time, the voltage of the first pole of the driving transistor can be set to a fixed voltage, and the voltage of the second pole of the driving transistor can be set to a fixed voltage, thereby reducing the influence of the residual voltage of the previous frame on the light emission of the current frame, and further improving the light emission uniformity of the display panel.

[0086] Due to reasons such as the manufacturing process and device aging, the threshold voltage V th of the driving transistor may drift. As a result, the driving current flowing through each light-emitting device changes under the influence of the drift of V th , causing non-uniformity in display brightness and impairing the display effect of the entire image. Furthermore, since the driving current flowing through each light-emitting device is related to the voltage V ref2 of the second reference voltage signal line connected to the first pole of the driving transistor, the driving current is also affected by the IR Drop (voltage drop) of the second reference signal line, causing non-uniformity in the brightness of the light-emitting devices in different regions.

[0087] The following will explain, with examples, a specific implementation method for improving the influence of the threshold voltage V th of the driving transistor and the IR Drop. Note that the specific implementation method is not limited thereto.

[0088] In some other embodiments, taking the pixel circuit shown in FIG. 3b as an example, its operation process will be described, and the corresponding input timing diagram is shown in FIG. 5b. Specifically, mainly four stages of the reset stage T1, the threshold compensation stage T2, the data writing stage T3, and the light emitting stage T4 in the input timing diagram shown in FIG. 5b are selected.

[0089] In the reset stage T1, Scan1 = 1, Scan2 = 0, and Scan4 = 0.

[0090] Since Scan1 = 1, the first switching transistor M1 and the third switching transistor M3 are all turned on. The turned-on first switching transistor M1 supplies the signal of the first reference signal line Vref1 to the second pole D of the driving transistor M0, thereby resetting the second pole D of the driving transistor M0 and the light emitting device L, and thus avoiding the interference of light emission between two adjacent display frames. The turned-on third switching transistor M3 supplies the signal of the first reference signal line Vref1 to the gate G of the driving transistor M0, thereby resetting the gate G of the driving transistor M0. Since Scan2 = 0, the second switching transistor M2 is turned on and supplies the signal of the second reference signal line Vref2 to the first pole S of the driving transistor M0, thereby resetting the first pole S of the driving transistor M0 and accumulating the voltage V of the signal of the second reference signal line Vref2 in the storage capacitor C1. ref2 Since Scan4 = 0, the fourth switching transistor M4 is turned off.

[0091] In the threshold compensation stage T2, Scan1 = 1, Scan2 = 1, and Scan4 = 0.

[0092] Since Scan1 = 1, the first switching transistor M1 and the third switching transistor M3 are all turned on. The turned-on third switching transistor M3 supplies the signal of the first reference signal line Vref1 to the gate of the driving transistor M0, and the gate voltage of the driving transistor M0 is V. ref1to do so. The turned-on first switching transistor M1 supplies the signal of the first reference signal line Vref1 to the second pole D of the driving transistor M0, and the voltage of the second pole D of the driving transistor M0 is V ref1 to do so. Since Scan2 = 1, the second switching transistor M2 turns off. The accumulation capacitor C1 instantaneously holds the voltage V ref2 of the first pole of the driving transistor M0. As a result, the driving transistor M0 turns on due to V ref1 and V ref2 . The voltage of the first pole S of the driving transistor M0 discharges due to the turned-on driving transistor M0, and when the voltage of the first pole S of the driving transistor M0 becomes

[0093]

Number

[0094] , the driving transistor M0 turns off, and the threshold voltage V th of the driving transistor M0 is written into the accumulation capacitor C1. Thereby, the threshold voltage V th of the driving transistor M0 is compensated, and this compensation process does not affect the light-emitting device L. Since Scan4 = 0, the fourth switching transistor M4 turns off.

[0095] In the data writing stage T3, Scan1 = 0, Scan2 = 1, and Scan4 = 1.

[0096] Since Scan4 = 1, the fourth switching transistor M4 turns on and supplies the voltage V data of the data signal to the gate G of the driving transistor M0, and the voltage of the gate G of the driving transistor M0 is V data to do so. Since Scan2 = 1, the second switching transistor M2 turns off. Therefore, the first pole S of the driving transistor M0 is in a floating state, and due to the coupling action of the accumulation capacitor C1 and the voltage division action of the voltage division capacitor C2, the voltage of the first pole S of the driving transistor M0 is

[0097]

Number

[0098] where c1 represents the capacitance value of the storage capacitor C1, and c2 represents the capacitance value of the voltage dividing capacitor C2. Since Scan1 = 0, all of the first switching transistor M1 and the third switching transistor M3 are turned off.

[0099] In the light emitting stage T4, Scan1 = 0, Scan2 = 0, and Scan4 = 0.

[0100] Since Scan2 = 0, the second switching transistor M2 is turned on to supply the voltage V of the second reference signal line Vref2 to the first pole S of the driving transistor M0, and the voltage of the first pole S of the driving transistor M0 is set to V ref2 According to the charge conservation law before and after the charge jump of the storage capacitor C, the voltage of the gate G of the driving transistor M0 is ref2 and so on. Therefore, the driving transistor M0 is in the saturation state, and according to the current characteristics in the saturation state, the driving current I for driving the light emitting device L by the driving transistor M0 to emit light is

[0101]

Number

[0102] and so on. Thus, the driving transistor M0 satisfies the equation L where V

[0103]

Number

[0104] where V gs is the gate-source voltage of the driving transistor M0, that is,

[0105]

Number

[0106] It is. Further, K is a structural parameter, and

[0107]

Number

[0108] is, μ n represents the mobility of the driving transistor M0, and C ox is the capacitance of the gate oxide layer per unit area,

[0109]

Number

[0110] is the width-to-length ratio of the driving transistor M0. Since these values are relatively stable in the same structure, they can be regarded as constants. The driving current I L supplied by the driving transistor M0 drives the light-emitting device L to emit light. As can be seen from the equation satisfied by the above driving current I L the driving current I L with which the driving transistor M0 drives the light-emitting device L to emit light is related only to the voltage V data of the data signal Data and the voltage V ref1 of the first reference signal line Vref1, and is independent of the threshold voltage V th of the driving transistor M0 and the voltage V ref2 of the second reference signal line Vref2. Thereby, the drift of the threshold voltage V th due to the manufacturing process of the driving transistor M0 and the long-term operation and the influence on the driving current I L for driving the light-emitting device L caused by IR Drop are solved, and thereby, the driving current I L of the light-emitting device L is stably maintained to ensure the normal operation of the light-emitting device L.

[0111] Regarding the operation process of the pixel circuit shown in FIG. 3a, since it can be referred to the operation process of the pixel circuit shown in FIG. 3b, it will not be described in detail here.

[0112] In some other embodiments, taking the pixel circuit shown in FIG. 4a as an example, its operation process will be described, and its corresponding input timing diagram is shown in FIG. 5c. Specifically, mainly four stages of the reset stage T1, threshold compensation stage T2, data writing stage T3, and light emitting stage T4 in the input timing diagram shown in FIG. 5c are selected.

[0113] In the reset stage T1, Scan1 = 1, Scan2 = 0, the third scanning signal Scan3 = 0, Scan4 = 0, and the light emission control signal EM = 0.

[0114] Since Scan1 = 1, the first switching transistor M1 is turned on, and the signal of the first reference signal line Vref1 is supplied to the second pole D of the driving transistor M0, thereby resetting the second pole D of the driving transistor M0. Since Scan2 = 0, the second switching transistor M2 is turned on, and the signal of the second reference signal line Vref2 is supplied to the first pole S of the driving transistor M0, thereby resetting the first pole S of the driving transistor M0 and accumulating the voltage V of the signal of the second reference signal line Vref2 in the storage capacitor C1. ref2 Since EM = 0, the fifth switching transistor M5 is turned on, and the second pole D of the driving transistor M0 and the first electrode of the light emitting device L are turned on, thereby supplying the signal of the first reference signal line Vref1 to the light emitting device L to reset the light emitting device L, thereby avoiding the interference of light emission between two adjacent display frames. Since Scan4 = 0, the fourth switching transistor M4 is turned off. Since Scan3 = 0, the third switching transistor M3 is turned off.

[0115] In the threshold compensation stage T2, Scan1 = 1, Scan2 = 1, Scan3 = 1, Scan4 = 0, and EM = 1.

[0116] Since Scan3 = 1, the third switching transistor M3 turns on and supplies the signal of the third reference signal line Vref3 to the gate G of the driving transistor M0, setting the gate voltage of the driving transistor M0 to V ref3 Since Scan1 = 1, the first switching transistor M1 turns on and supplies the signal of the first reference signal line Vref1 to the second pole D of the driving transistor M0, setting the voltage of the second pole D of the driving transistor M0 to V ref1 Since Scan2 = 1, the second switching transistor M2 turns off. Since EM = 1, the fifth switching transistor M5 turns off. By instantaneously holding the voltage V ref2 at the first pole of the driving transistor M0 by the storage capacitor C1, the driving transistor M0 turns on due to the effects of V ref3 and V ref2 The voltage at the first pole S of the driving transistor M0 is discharged by the turned-on driving transistor M0, and when the voltage change at the first pole S of the driving transistor M0 becomes

[0117]

Number

[0118] the driving transistor M0 turns off, and the threshold voltage V th of the driving transistor M0 is written into the storage capacitor C1. Thereby, the threshold voltage V th of the driving transistor M0 is compensated, and this compensation process does not affect the light-emitting device L. Since Scan4 = 0, the fourth switching transistor M4 turns off.

[0119] In the data writing stage T3, Scan1 = 0, Scan2 = 1, Scan3 = 0, Scan4 = 1, and EM = 1.

[0120] Since Scan4 = 1, the fourth switching transistor M4 turns on and supplies the voltage V data of the data signal to the gate G of the driving transistor M0, setting the voltage of the gate G of the driving transistor M0 to V dataMake it so. Since Scan2 = 1, the second switching transistor M2 turns off. Since Scan3 = 0, the third switching transistor M3 turns off. The first pole S of the driving transistor M0 is in a floating state, and due to the coupling action of the storage capacitor C1 and the voltage division action of the voltage division capacitor C2, the voltage of the first pole S of the driving transistor M0 is

[0121] [Number]

[0122] becomes, where c1 represents the capacitance value of the storage capacitor C1 and c2 represents the capacitance value of the voltage division capacitor C2. Since Scan1 = 0, the first switching transistor M1 turns off. Since EM = 1, the fifth switching transistor M5 turns off.

[0123] In the light emission stage T4, Scan1 = 0, Scan2 = 0, Scan3 = 0, Scan4 = 0, and EM = 0.

[0124] Since Scan2 = 0, the second switching transistor M2 turns on and supplies the voltage V of the second reference signal line Vref2 to the first pole S of the driving transistor M0, making the voltage of the first pole S of the driving transistor M0 V ref2 and making the voltage of the first pole S of the driving transistor M0 V ref2 According to the charge conservation law before and after the charge jump of the storage capacitor C, the voltage of the gate G of the driving transistor M0 is

[0125] [Number]

[0126] becomes. Therefore, the driving transistor M0 is in a saturated state, and due to the current characteristics in the saturated state, the driving current I that drives the light emitting device L by the driving transistor M0 to emit light is L is given by the formula

[0127] [Number]

[0128] satisfies, V gs is the gate-source of the driving transistor M0, that is,

[0129]

Number

[0130] is. Further, K is a structural parameter, and

[0131]

Number

[0132] is, μ n represents the mobility of the driving transistor M0, C ox is the capacitance of the gate oxide layer per unit area,

[0133]

Number

[0134] is the width-to-length ratio of the driving transistor M0. Since these values are relatively stable in the same structure, they can be regarded as constants. Since EM = 0, the fifth switching transistor M5 turns on and turns on the second pole D of the driving transistor M0 and the light-emitting device L, so that the driving current I L is supplied to the light-emitting device L to drive the light-emitting device L to emit light. As can be seen from the equation satisfied by the above driving current I L the driving current I L with which the driving transistor M0 drives the light-emitting device L to emit light is the voltage V data of the data signal Data and the voltage V ref1 of the first reference signal line Vref1, and is only related to the threshold voltage V th of the driving transistor M0 and the voltage V ref2It is irrelevant to that, thereby solving the influence on the manufacturing process of the driving transistor M0 and the driving current I for driving the light-emitting device L due to the threshold voltage V th drift and IR Drop, and stably maintaining the driving current I L of the light-emitting device L to ensure the normal operation of the light-emitting device L. L Of course, in the reset stage, by changing the signal of the third scanning signal line and controlling the third switching transistor to turn on, the gate of the driving transistor can be reset so that the voltage change of the gate becomes V

[0135] ref3 It may also be set like this. Thereby, in the reset stage, the voltage of the gate of the driving transistor is V ref3 , the voltage of the second pole is V ref1 , and the voltage of the first pole is V ref2 , so that the three poles of the driving transistor can be reset simultaneously. In the threshold compensation stage, the voltage of the gate of the driving transistor is V ref3 , the voltage of its second pole is V ref1 , and the voltage of the first pole of the driving transistor is

[0136]

Number

[0137] ref3 , that is, before writing the data of each frame, the gate of the driving transistor is fixed at the voltage V ref3 , the first pole of the driving transistor is fixed at the voltage

[0138]

Number

[0139] ref1It can be achieved. By doing so, every time a data signal is written, the gate of the driving transistor jumps to the same fixed voltage, and the voltage of its first pole jumps to the same fixed voltage, thereby improving the problem of short-term residual image caused by the hysteresis effect.

[0140] In some other embodiments, taking the pixel circuit shown in FIG. 4b as an example, its operation process is described, and the corresponding input timing diagram is shown in FIG. 5d. Specifically, mainly four stages are selected, namely the reset stage T1, the threshold compensation stage T2, the data writing stage T3, and the light emitting stage T4 in the input timing diagram shown in FIG. 5d.

[0141] In the reset stage T1, Scan1 = 1, Scan4 = 0, and EM = 0.

[0142] Since Scan1 = 1, the first switching transistor M1 and the third switching transistor M3 are all turned on. The turned-on first switching transistor M1 supplies the signal of the first reference signal line Vref1 to the second pole D of the driving transistor M0, thereby resetting the second pole D of the driving transistor M0. The turned-on third switching transistor M3 supplies the signal of the first reference signal line Vref1 to the gate G of the driving transistor M0, thereby resetting the gate G of the driving transistor M0. Since EM = 0, the second switching transistor M2 and the fifth switching transistor M5 are all turned on. The turned-on second switching transistor M2 supplies the signal of the second reference signal line Vref2 to the first pole S of the driving transistor M0, thereby resetting the first pole S of the driving transistor M0 and accumulating the voltage V of the signal of the second reference signal line Vref2 in the capacitor C1. ref2Accumulate. The turned-on fifth switching transistor M5 turns on the second pole D of the driving transistor M0 and the first electrode of the light-emitting device L, thereby supplying the signal of the first reference signal line Vref1 to the light-emitting device L and resetting the light-emitting device L, thereby avoiding light emission interference between two adjacent display frames. Since Scan4 = 0, the fourth switching transistor M4 turns off.

[0143] In the threshold compensation stage T2, Scan1 = 1, Scan4 = 0, and EM = 1.

[0144] Since Scan1 = 1, all of the first switching transistor M1 and the third switching transistor M3 turn on. The turned-on third switching transistor M3 supplies the signal of the first reference signal line Vref1 to the gate of the driving transistor M0, and the gate voltage of the driving transistor M0 becomes V ref1 Thereby. The turned-on first switching transistor M1 supplies the signal of the first reference signal line Vref1 to the second pole D of the driving transistor M0, and the voltage of the second pole D of the driving transistor M0 becomes V ref1 Thereby. Since EM = 1, all of the second switching transistor M2 and the fifth switching transistor M5 turn on. By instantaneously holding the voltage V ref2 of the first pole of the driving transistor M0 by the storage capacitor C1, the driving transistor M0 turns on by the action of V ref1 and V ref2 and the voltage of the first pole S of the driving transistor M0 is discharged by the turned-on driving transistor M0, and when the voltage of the first pole S of the driving transistor M0 becomes

[0145]

Number

[0146] Thereafter, the driving transistor M0 turns off, and the threshold voltage V th of the driving transistor M0 is written into the storage capacitor C1. Thereby, the threshold voltage V thCompensate and ensure that this compensation process does not affect the light-emitting device L. Since Scan4 = 0, the fourth switching transistor M4 is turned off.

[0147] In the data writing stage T3, Scan1 = 0, Scan4 = 1, and EM = 1.

[0148] Since Scan4 = 1, the fourth switching transistor M4 is turned on to supply the voltage V of the data signal Data to the gate G of the driving transistor M0, making the voltage of the gate G of the driving transistor M0 V. data Since EM = 1, both the second switching transistor M2 and the fifth switching transistor M5 are turned off. Therefore, the first pole S of the driving transistor M0 is in a floating state, and due to the coupling action of the storage capacitor C1 and the voltage division action of the voltage division capacitor C2, the voltage of the first pole S of the driving transistor M0 is data

Number

[0149] becomes, where c1 represents the capacitance value of the storage capacitor C1 and c2 represents the capacitance value of the voltage division capacitor C2. Since Scan1 = 0, both the first switching transistor M1 and the third switching transistor M3 are turned off.

[0150] In the light-emitting stage T4, Scan1 = 0, Scan4 = 0, and EM = 0.

[0151] Since EM = 0, both the second switching transistor M2 and the fifth switching transistor M5 are turned on. The turned-on second switching transistor M2 supplies the voltage V of the second reference signal line Vref2 to the first pole S of the driving transistor M0, making the voltage of the first pole S of the driving transistor M0 V.

[0152] ref2 ref2 ​​Make it so. According to the charge conservation law before and after the charge jump of the storage capacitor C, the voltage of the gate G of the driving transistor M0 is

[0153]

Number

[0154] becomes. Therefore, the driving transistor M0 is in the saturation state, and according to the current characteristics in the saturation state, the driving current I that drives the light-emitting device L by the driving transistor M0 to emit light L is given by the formula

[0155]

Number

[0156] satisfies, where V gs is the gate-source voltage of the driving transistor M0, that is,

[0157]

Number

[0158] is. Furthermore, K is a structural parameter and

[0159]

Number

[0160] is, μ n represents the mobility of the driving transistor M0, C ox is the capacitance of the gate oxide layer per unit area,

[0161]

Number

[0162] is the width-to-length ratio of the driving transistor M0. Since these values are relatively stable in the same structure, they can be regarded as constants. The turned-on fifth switching transistor M5 turns on the second pole D of the driving transistor M0 and the light-emitting device L, so that the driving current I L is supplied to the light-emitting device L to drive the light-emitting device L to emit light. As can be seen from the formula satisfied by the above driving current I L , the driving current I L with which the driving transistor M0 drives the light-emitting device L to emit light is related only to the voltage V data of the data signal Data and the voltage V ref1 of the first reference signal line Vref1, and is independent of the threshold voltage V th of the driving transistor M0 and the voltage V ref2 of the second reference signal line Vref2. It can solve the influence of the drift of the threshold voltage V th of the driving transistor M0 due to the manufacturing process and long-term operation and the IR Drop on the driving current I L for driving the light-emitting device L, and stably hold the driving current I L of the light-emitting device L to ensure the normal operation of the light-emitting device L.

[0163] In the reset stage, by setting the voltages of the gate and the second pole of the driving transistor to V ref1 and the voltage of the first pole of the driving transistor to V ref2 respectively, the three poles of the driving transistor can be reset simultaneously. In the threshold compensation stage, the voltages of the gate and the second pole of the driving transistor are set to V ref1 respectively, and the voltage of the first pole of the driving transistor is

[0164]

Number

[0165] That is, before the stage of writing the data of each frame, the gate of the driving transistor is set to the fixed voltage V ref1 , and the first pole of the driving transistor is set to the fixed voltage

[0166] [Number]

[0167] and fixing the second pole of the driving transistor to a fixed voltage V ref1 can be achieved. Thereby, each time a data signal is written, the gate of the driving transistor jumps at the same fixed voltage, and the voltage of its first pole jumps at the same fixed voltage, thereby improving the problem of short-term afterimage due to the hysteresis effect.

[0168] Based on the same inventive concept, embodiments of the present disclosure further provide a driving method for the pixel circuit according to the embodiments of the present disclosure. As shown in FIG. 6, In the reset stage, the reset circuit includes step S601 of resetting the first pole and the second pole of the driving transistor, In the data writing stage, the data writing circuit includes step S602 of supplying a data signal to the gate of the driving transistor, In the light emitting stage, the capacitor circuit includes step S603 of accumulating the voltage of the gate of the driving transistor, and the driving transistor generates a driving current to drive the light emitting device to emit light.

[0169] In the driving method according to the embodiments of the present disclosure, the reset circuit resets the first pole and the second pole of the driving transistor in the reset stage. Next, the data writing circuit writes a data signal to the gate of the driving transistor, and the driving transistor can generate a driving current to drive the light emitting device to emit light. Thereby, before each data signal is written, by setting the voltage of the first pole of the driving transistor to a fixed voltage and setting the voltage of the second pole of the driving transistor to a fixed voltage, the influence of the residual voltage of the previous frame on the light emission of the current frame can be avoided, and the light emission uniformity of the display panel can be further improved.

[0170] When specifically implemented, in the driving method according to the embodiment of the present disclosure, in the reset stage, the reset circuit may further include a step of resetting the gate of the driving transistor.

[0171] And, before the data writing stage and after the reset stage, in the driving method according to the embodiment of the present disclosure, in the threshold compensation stage, the reset circuit may further include a step of compensating the threshold voltage of the driving transistor.

[0172] When specifically implemented, when the reset circuit includes a first switching transistor, a second switching transistor, and a third switching transistor, in the driving method according to the embodiment of the present disclosure, in the reset stage, the first switching transistor of the reset circuit is turned on to supply the signal on the first reference signal line to the second pole of the driving transistor, the second switching transistor is turned on to supply the signal on the second reference signal line to the first pole of the driving transistor, and the third switching transistor is turned on to supply the signal on the third reference signal line to the gate of the driving transistor, and respective controls are performed accordingly.

[0173] And, in the threshold compensation stage, the second switching transistor of the reset circuit is turned off, the first switching transistor is turned on to supply the signal on the first reference signal line to the second pole of the driving transistor, the third switching transistor is turned on to supply the signal on the third reference signal line to the gate of the driving transistor, and the driving transistor is turned on to perform threshold compensation, and respective controls are performed accordingly.

[0174] When specifically implemented, in the driving method according to the embodiment of the present disclosure, in the reset stage and the light emitting stage, the light emitting control circuit may further include a step of turning on the second pole of the driving transistor and the first electrode of the light emitting device.

[0175] When specifically implemented, by the actions of the reset stage, the threshold compensation stage, the data writing stage, and the light emitting stage, the driving current for driving the light emitting device by the driving transistor is related only to the voltage of the data signal and the voltage of the signal on the first reference signal line, and can be made independent of the threshold voltage of the driving transistor and the voltage of the signal on the second reference signal line. Thereby, the influence of the threshold voltage of the driving transistor and the IR Drop of the signal on the second reference signal line on the driving current flowing through the light emitting device is avoided, the operating current for driving the light emitting device to emit light is stably maintained, and the uniformity of the brightness of the display screen of the display panel can be improved.

[0176] Based on the same inventive concept, an embodiment of the present disclosure further provides an electroluminescent display panel. As shown in FIG. 7, it includes a pixel circuit (PX), a data signal line DATA, a first scan signal line Scan1, a second scan signal line Scan2, a third scan signal line Scan3, a fourth scan signal line Scan4, a light emission control signal line EMIT, a first reference voltage line Vref1, a second reference voltage line Vref2, and a third reference voltage line Vref3. The pixel circuit PX includes a first switching transistor M1, a second switching transistor M2, a third switching transistor M3, a fourth switching transistor M4, a fifth switching transistor M5, a driving transistor M0, a storage capacitor C1, a voltage dividing capacitor C2, and a light emitting device L. The gate of the first switching transistor M1 is coupled to the first scan signal line Scan1 to which the current corresponding signal is applied. The first pole of the first switching transistor M1 is coupled to the first reference signal line Vref1. The second pole of the first switching transistor M1 is coupled to the second pole D of the driving transistor M0. The gate of the second switching transistor M2 is coupled to the second scan signal line Scan2 to which the current corresponding signal is applied. The first pole of the second switching transistor M2 is coupled to the second reference signal line Vref2. The second pole of the second switching transistor M2 is coupled to the first pole S of the driving transistor M0. The gate of the third switching transistor M3 is coupled to a third scan signal line Scan3 to which a current corresponding signal is applied thereto, a first pole of the third switching transistor M3 is coupled to a third reference signal line Vref3, and a second pole of the third switching transistor M3 is coupled to the gate G of the driving transistor M0. The gate of the fourth switching transistor M4 is coupled to a fourth scan signal line Scan4 to which a current corresponding signal is applied thereto, a first pole of the fourth switching transistor M4 is coupled to a data signal line DATA to which a current corresponding signal is applied thereto, and a second pole of the fourth switching transistor M4 is coupled to the gate G of the driving transistor M0. The gate of the fifth switching transistor M5 is coupled to a light emission control signal line EMIT to which a current corresponding signal is applied thereto, a first pole of the fifth switching transistor M5 is coupled to the second pole D of the driving transistor M0 and the second pole of the first switching transistor M1, respectively, and a second pole of the fifth switching transistor M5 is coupled to a first electrode of the light emitting device L. The storage capacitor C1 is coupled between the gate G and the first pole S of the driving transistor M0. The voltage dividing capacitor C2 may be coupled between the first pole S of the driving transistor M0 and the second reference signal line Vref2.

[0177] The field emission display panel according to the embodiment of the present disclosure controls the first switching transistor, the second switching transistor, the third switching transistor, the fourth switching transistor, the fifth switching transistor, the driving transistor, the storage capacitor, the voltage dividing capacitor, and the light emitting device of the pixel circuit to operate in conjunction with each other by inputting corresponding signals via respective signal lines, thereby realizing the light emission display of the field emission display panel.

[0178] When specifically implemented, the electroluminescent display panel according to the embodiments of the present disclosure may further include a gate driving circuit, and the gate driving circuit may supply gate scanning signals corresponding to the first scanning signal line, the second scanning signal line, the third scanning signal line, and the fourth scanning signal line.

[0179] When specifically implemented, the electroluminescent display panel according to the embodiments of the present disclosure may further include a light emission control circuit, and the light emission control circuit may supply a light emission control signal corresponding to the light emission control signal line.

[0180] When specifically implemented, the electroluminescent display panel according to the embodiments of the present disclosure may further include a source driving circuit, and the source driving circuit may supply a data signal corresponding to the data signal line.

[0181] When specifically implemented, for the operation process of the pixel circuit in the electroluminescent display panel according to the embodiments of the present disclosure, reference may be made to the implementation of the foregoing pixel circuit, and repeated description is omitted here.

[0182] When specifically implemented, the electroluminescent display panel according to the embodiments of the present disclosure can ensure the uniformity of display when reducing the refresh rate by combining the manufacturing processes of two types of transistors, namely LTPS-type transistors and oxide-type transistors.

[0183] When specifically implemented, in the electroluminescent display panel according to the embodiments of the present disclosure, the data signal line and the second reference signal line may each have the same material as the first and second electrodes of the switching transistor of the pixel circuit and be disposed in the same layer. Further, the first to fourth scanning signal lines, the light emission control signal line, and the first and third reference signal lines may each have the same material as the gate of the switching transistor of the pixel circuit and be disposed in the same layer. Thereby, in one patterning process, the patterns of the data signal line, the second reference signal line, and the first and second electrodes of the switching transistor of the pixel circuit can be simultaneously formed, and in another patterning process, the patterns of each scanning signal line, the first and third reference signal lines, the light emission control signal line, and the gate of the switching transistor of the pixel circuit can be formed. Therefore, the manufacturing process can be simplified and the thickness of the electroluminescent display panel can be reduced.

[0184] When specifically implemented, when the data signal line, the second reference signal line, and the first and second electrodes of the switching transistor of the pixel circuit have the same material and are disposed in the same layer, in the electroluminescent display panel according to the embodiments of the present disclosure, the data signal line extends along the column direction of the pixel unit formed by the pixel circuit, and the second reference signal line may extend along the column direction of the pixel unit. Of course, the second reference signal line may be disposed in the electroluminescent display panel as a grid structure.

[0185] When specifically implemented, when each scanning signal line, each reference signal line, the light emission control signal line, and the gate of the switching transistor of the pixel circuit have the same material and are disposed in the same layer, in the electroluminescent display panel according to the embodiments of the present disclosure, each scanning signal line, the first and third reference signal lines, and the light emission control signal line may extend along the row direction of the pixel unit. Further, since the gap between two adjacent rows of pixel units is generally larger than the gap between two adjacent columns of pixel units, if each reference signal line extends along the row direction of the pixel unit, the layout design of the electroluminescent display panel can be further optimized.

[0186] Furthermore, when specifically implemented to reduce the setting of signal lines and save wiring space, in the electroluminescent display panel according to the embodiments of the present disclosure, the signals of the first scanning signal line and the third scanning signal line coupled to the same pixel circuit can be set to be the same. The first scanning signal line and the third scanning signal line coupled to the same pixel circuit may be made into the same signal line. Thereby, the layout design of the electroluminescent display panel can be further optimized. Specifically, as shown in FIG. 8, the gates of the first switching transistor M1 and the third switching transistor M3 are all coupled to the first scanning signal line Scan1.

[0187] Furthermore, when specifically implemented to reduce the setting of signal lines and save wiring space, in the electroluminescent display panel according to the embodiments of the present disclosure, the signals of the light emission control signal line and the second scanning signal line coupled to the same pixel circuit can be set to be the same. The light emission control signal line and the second scanning signal line coupled to the same pixel circuit may be made into the same signal line. Thereby, the layout design of the electroluminescent display panel can be further optimized. Specifically, as shown in FIG. 8, the second switching transistor M2 and the fifth switching transistor M5 are all coupled to the light emission control signal line EMIT.

[0188] Furthermore, when specifically implemented to reduce the setting of signal lines and save wiring space, in the electroluminescent display panel according to the embodiments of the present disclosure, the signals of the first reference signal line and the third reference signal line can be set to be the same. The first reference signal line and the third reference signal line may also be made into the same signal line. Thereby, the layout design of the electroluminescent display panel can be further optimized. Specifically, as shown in FIG. 8, the first switching transistor M1 and the third switching transistor M3 are all coupled to the first reference signal line Vref1.

[0189] The cathode of the light-emitting device in the electroluminescent display panel according to the embodiment of the present disclosure may be the same as the design in the prior art. For example, a design of a cathode layer covering one surface may be adopted, which will not be described in detail here.

[0190] When specifically implemented, the electroluminescent display panel according to the embodiment of the present disclosure may be an organic light-emitting display panel or a quantum dot light-emitting display panel, which is not limited here.

[0191] Based on the same inventive concept, the embodiment of the present disclosure further provides a display device including the above-mentioned electroluminescent display panel according to the embodiment of the present disclosure. The display device may be any product or component having a display function, such as a mobile phone, a tablet, a television, a display, a node-type computer, a digital photo frame, a navigator, etc. Other essential components of the display device are all understandable by those skilled in the art to include these, so they will not be described in detail here and do not limit the present disclosure. For the implementation of the display device, reference may be made to the embodiment of the above pixel circuit, and duplicate descriptions are omitted.

[0192] The pixel circuit, driving method, electroluminescent display panel and display device according to the embodiment of the present disclosure can reset the first pole and the second pole of the driving transistor in the reset stage by a reset circuit, and then write a data signal to the gate of the driving transistor by a data writing circuit, and generate a driving current by the driving transistor to drive the light-emitting device to emit light. Thereby, the voltage of the first pole of the driving transistor can be set to a fixed voltage and the voltage of the second pole of the driving transistor can be set to a fixed voltage before writing the data signal each time, thereby reducing the influence of the residual voltage of the previous frame on the light emission of the current frame and improving the light emission uniformity of the display panel.

[0193] Although the preferred embodiments of the present disclosure have been described, those skilled in the art can make other changes and modifications to these embodiments on the basis of grasping the basic inventive concept. Therefore, the appended claims are intended to cover the preferred embodiments and all changes and modifications belonging to the scope of the present disclosure.

[0194] Of course, those skilled in the art can make various changes and deformations to the embodiments of the present disclosure without departing from the spirit and scope of the embodiments of the present disclosure. Accordingly, if these modifications and deformations of the embodiments of the present disclosure belong to the scope of the claims of the present disclosure and the equivalent technical scope thereof, the present disclosure is intended to include these changes and deformations.

Claims

A driving method for a pixel circuit, wherein the pixel circuit comprises: a light-emitting device; configured to generate a driving current in a light-emitting stage to drive the light-emitting device to emit light, a driving transistor having a gate coupled to each of a capacitor circuit and a data writing circuit, a first pole coupled to a reset circuit, and a second pole coupled to each of the reset circuit and a first electrode of the light-emitting device; a capacitor circuit configured to accumulate a voltage of the gate of the driving transistor; a data writing circuit configured to supply a data signal to the gate of the driving transistor in a data writing stage; a reset circuit configured to reset a first pole and a second pole of the driving transistor in a reset stage, and comprising: further coupled to the gate of the driving transistor, configured to reset the gate of the driving transistor in the reset stage and compensate for a threshold voltage of the driving transistor in a threshold compensation stage; the reset circuit includes a first switching transistor, a second switching transistor and a third switching transistor; a gate of the first switching transistor is coupled to a first scanning signal line, a first pole of the first switching transistor is coupled to a first reference signal line, and a second pole of the first switching transistor is coupled to the second pole of the driving transistor; a gate of the second switching transistor is coupled to a second scanning signal line, a first pole of the second switching transistor is coupled to a second reference signal line, and a second pole of the second switching transistor is coupled to the first pole of the driving transistor; a gate of the third switching transistor is coupled to a third scanning signal line, a first pole of the third switching transistor is coupled to a third reference signal line, and a second pole of the third switching transistor is coupled to the gate of the driving transistor; The data writing circuit further includes a fourth switching transistor, The gate of the fourth switching transistor is coupled to a fourth scanning signal line, the first pole of the fourth switching transistor is coupled to a data signal line to receive the data signal, and the second pole of the fourth switching transistor is coupled to the gate of the driving transistor, The pixel circuit further includes a light emission control circuit, the second pole of the driving transistor and the reset circuit are respectively coupled to the first electrode of the light emitting device via the light emission control circuit, and the light emission control circuit is configured to control on or off between the second pole of the driving transistor and the first electrode of the light emitting device, The light emission control circuit includes a fifth switching transistor, The gate of the fifth switching transistor is coupled to a light emission control signal line, the first pole of the fifth switching transistor is coupled to the second pole of the driving transistor, and the second pole of the fifth switching transistor is coupled to the first electrode of the light emitting device, The third switching transistor and the fourth switching transistor are oxide type transistors, and the material of the active layer of the first switching transistor, the third switching transistor and the fourth switching transistor includes a metal oxide semiconductor material, The second switching transistor, the fifth switching transistor and the driving transistor are low temperature poly-silicon type transistors, the material of the active layer of the second switching transistor, the fifth switching transistor and the driving transistor includes a low temperature poly-silicon material, and the driving method is as follows: A reset stage in which the reset circuit resets the first and second poles of the driving transistor, the reset circuit resets the gate of the driving transistor, and the light emission control circuit turns on the second pole of the driving transistor and the first electrode of the light emitting device; A threshold compensation stage in which the reset circuit compensates the threshold voltage of the driving transistor. A data writing step in which the data writing circuit supplies the data signal to the gate of the driving transistor; A light emitting step in which the light emission control circuit turns on the second electrode of the driving transistor and the first electrode of the light emitting device, and the capacitor circuit accumulates the voltage of the gate of the driving transistor, so that the driving transistor generates a driving current to drive the light emitting device to emit light. The driving method includes the above steps.

2. In the reset step, the first switching transistor in the reset circuit is turned on to supply the signal of the first reference signal line to the second electrode of the driving transistor, the second switching transistor is turned on to supply the signal of the second reference signal line to the first electrode of the driving transistor, and the third switching transistor is turned on to supply the signal of the third reference signal line to the gate of the driving transistor, respectively. Control is performed as follows: In the threshold compensation step, the second switching transistor in the reset circuit is turned off, the first switching transistor is turned on to supply the signal of the first reference signal line to the second electrode of the driving transistor, the third switching transistor is turned on to supply the signal of the third reference signal line to the gate of the driving transistor, and the driving transistor is turned on to perform threshold compensation. The method according to claim 1, wherein control is performed as follows.

Citation Information

Patent Citations

  • Pixel driving circuit, driving method thereof, display panel and display device

    CN105427803A

  • Pixel circuit, method for driving the pixel circuit, and display device

    JP2016075836A

  • Organic Light Emitting Diode Display Device

    US20130043802A1

  • Pixel and organic light emitting display device using the same

    US20150371590A1