Short-circuit fault detection device and power conversion device

Abstract

To provide a short-cut failure detection device and a power conversion device that detect short-circuit failures in the power conversion device while avoiding enlargement and complication of the entire power conversion device.SOLUTION: In a power conversion device 100, a short-cut failure detection device 50 is provided in a first arm 110 and a second arm 120 among two or more arms. The short-cut failure detection device 50 includes: a Rogowski coil 40 that is inserted into both current paths of a first current path 103P through which a first current commonly flowing to the first arm 110 and a load passes and a second current path 103N through which a second current commonly flowing to the second arm 120 and the load passes; and a short-cut determination circuit 30 that detects a short-cut failure in the arms or load of the power conversion device 100, based on a detection signal Vm obtained from the Rogowski coil 40.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a short-circuit fault detection device and a power conversion device including the same. [Background technology]

[0002] In a power conversion device that drives a load such as a motor, an excessive current may flow through the semiconductor switching elements that make up the power conversion device. If such an excessive current flows for a long period of time, the semiconductor switching elements may be destroyed. Therefore, a short-circuit fault detection device is provided in the power conversion device to detect the excessive current flowing through the semiconductor switching elements and shut down the power conversion device.

[0003] In this type of short circuit fault detection device, a shunt resistor, a CT (Current Transformer), a Rogowski coil, etc. are used to detect the current flowing through the semiconductor switching element. Among these, a Rogowski coil has the advantage that it has no core, making it possible to make the short circuit fault detection device compact, and also being able to measure large currents.

[0004] In the technology disclosed in Patent Document 1, in a power conversion device having multiple arms each including a semiconductor switching element and supplying power to a load through the multiple arms, a Rogowski coil and a short-circuit determination circuit based on the output voltage of the Rogowski coil are provided for each of the multiple arms to detect short-circuit faults in the power conversion device. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Publication No. 2019-216540 Summary of the Invention [Problem to be solved by the invention]

[0006] The technology disclosed in the aforementioned Patent Document 1 requires a Rogowski coil and a short-circuit detection circuit for each of the multiple arms, which increases costs and leads to an increase in the size of the entire power conversion device. Furthermore, in a power conversion device equipped with high-speed semiconductor switching elements such as SiC, the time gradient di / dt of the short-circuit current during a load short circuit is on the order of μs, while the time gradient di / dt of the short-circuit current during an arm short circuit is on the order of ns. This means that the number of turns of the Rogowski coil optimal for detecting a load short circuit and an arm short circuit is significantly different. This requires a design that can detect both load short circuits and arm short circuits, which leads to an increase in the size of the Rogowski coil and the size and complexity of the short-circuit detection circuit.

[0007] The present invention has been made in consideration of the above-described problems, and aims to provide a technical means for detecting a short-circuit fault in a power conversion device while avoiding the entire power conversion device becoming larger and more complex. [Means for solving the problem]

[0008] One aspect of the present invention is a short-circuit fault detection device, which is a short-circuit fault detection device for a power conversion device that supplies power to a load through two or more arms, each of which includes a semiconductor switching element, and is characterized in that it comprises a Rogowski coil inserted in both current paths: a first current path through which a first current flows commonly to a first arm of the two or more arms and the load, and a second current path through which a second current flows commonly to a second arm of the two or more arms and the load, and detects a short-circuit fault in an arm of the power conversion device or the load based on a detection signal obtained from the Rogowski coil.

[0009] Another aspect of the power conversion device of the present invention is a power conversion device that supplies power to a load via two or more arms, each of which includes a semiconductor switching element, and is characterized in that a short-circuit fault detection device is provided in a first arm and a second arm of the two or more arms, and the short-circuit fault detection device comprises: a Rogowski coil inserted in both current paths: a first current path through which a first current flowing commonly to the first arm and the load passes; and a second current path through which a second current flowing commonly to the second arm and the load passes; and a short-circuit judgment circuit that detects a short-circuit fault in an arm of the power conversion device or the load based on a detection signal obtained from the Rogowski coil. [Effects of the Invention]

[0010] According to this invention, short-circuit faults are detected using a Rogowski coil and a short-circuit judgment circuit provided in the first arm and the second arm, so that short-circuit faults in the power conversion device can be detected while avoiding the entire power conversion device from becoming larger and more complex. [Brief explanation of the drawings]

[0011] [Figure 1] 1 is a circuit diagram showing the configuration of a power conversion device including a short-circuit fault detection device according to an embodiment of the present invention. [Figure 2] FIG. 2 is a circuit diagram showing the operation of the power conversion device. [Figure 3] FIG. 4 is a waveform diagram showing the operation at normal turn-on in the embodiment. [Figure 4] FIG. 2 is a circuit diagram showing the operation of the embodiment at normal turn-on. [Figure 5] FIG. 4 is a waveform diagram showing the operation when an arm short circuit occurs in the embodiment. [Figure 6] FIG. 4 is a circuit diagram showing the operation of the embodiment when an arm short circuit occurs. [Figure 7] 4 is a waveform diagram showing the operation of the embodiment when a load short circuit occurs. FIG. [Figure 8] FIG. 2 is a circuit diagram showing the operation of the embodiment when a load short circuit occurs. [Figure 9] FIG. 10 is a circuit diagram showing the configuration of a power conversion device including a short-circuit fault detection device according to another embodiment of the present invention. [Figure 10] 2 is a side view showing an example of mounting the power conversion device shown in FIG. 1. FIG. [Figure 11] FIG. [Figure 12] 10 is a side view showing an example of mounting the power converter shown in FIG. 9. FIG. [Figure 13] FIG. [Figure 14] 10 is a plan view showing another implementation example of the power conversion device shown in FIG. [Figure 15] FIG. [Figure 16] FIG. 16 is a side view showing a modification of the mounting example of FIGS. 14 and 15. DETAILED DESCRIPTION OF THE INVENTION

[0012] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram showing the configuration of a power conversion device 100 including a short-circuit fault detection device 50 according to an embodiment of the present invention. The power conversion device 100 corresponds to one phase of an inverter and includes an upper arm 110, which is a first arm, and a lower arm 120, which is a second arm. The upper arm 110 and the lower arm 120 are connected in series between a high-potential power supply line 101P connected to the positive electrode of a power supply (not shown) and a low-potential power supply line 101N connected to the negative electrode of the power supply, with their common connection point serving as an AC output terminal 102 of the power conversion device 100. A load Z, such as a motor winding, is connected to the AC output terminal 102. The power conversion device 100 configures an inverter by connecting the upper arms 110 and the lower arms 120 for multiple phases in parallel between the high-potential power supply line 101P and the low-potential power supply line 101N.

[0013] The upper arm 110 is composed of a semiconductor switching element Q1 and a diode D1 connected in anti-parallel to the semiconductor switching element Q1. Similarly, the lower arm 120 is composed of a semiconductor switching element Q2 and a diode D2 connected in anti-parallel to the semiconductor switching element Q2. The semiconductor switching elements Q1 and Q2 are transistors such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), and are composed of wide bandgap semiconductor elements whose main material is at least one of silicon carbide, gallium nitride, gallium oxide, and diamond.

[0014] The power conversion device 100 also has an upper-arm gate drive circuit 10 that drives the semiconductor switching element Q1 of the upper arm 110 on / off based on an upper-arm control signal supplied from a control unit (not shown), and a lower-arm gate drive circuit 20 that drives the semiconductor switching element Q2 of the lower arm 120 on / off based on a lower-arm control signal supplied from the control unit. The power conversion device 100 supplies AC power to a load Z via the upper arm 110 and the lower arm 120, which include the semiconductor switching elements Q1 and Q2 that are driven on / off by the upper arm gate drive circuit 10 and the lower arm gate drive circuit 20.

[0015] 1, for example, if a short-circuit fault occurs in the upper arm 110, an arm short-circuit current flows in both the upper arm 110 and the lower arm 120 when the lower arm 120 is turned on. Also, if a short-circuit fault occurs in the lower arm 120, an arm short-circuit current flows in both the upper arm 110 and the lower arm 120 when the upper arm 110 is turned on. Also, in the power conversion device 100, if a short-circuit fault occurs in the load Z, a load short-circuit current flows in the upper arm 110 or the lower arm 120.

[0016] If such an arm short-circuit current or load short-circuit current flows through the upper arm 110 or the lower arm 120 for a long period of time, there is a risk of damage to the semiconductor switching element Q1 of the upper arm 110 or the semiconductor switching element Q2 of the lower arm 120. Therefore, the power conversion device 100 is provided with a short-circuit fault detection device 50 that detects the occurrence of an arm short-circuit or a load short-circuit and stops the driving of the semiconductor switching element Q1 by the upper arm gate drive circuit 10 and the driving of the semiconductor switching element Q2 by the lower arm gate drive circuit 20.

[0017] The short circuit fault detection device 50 has a Rogowski coil 40 provided for the upper arm 110, which is a first arm, and a lower arm 120, which is a second arm, and a short circuit judgment circuit 30 that detects a short circuit fault in the power conversion device 100 based on an induced voltage Vm, which is a detection signal obtained from the Rogowski coil 40.

[0018] In this embodiment, the Rogowski coil 40 is inserted into both a first current path 103P through which a first current flows commonly to the upper arm 110 and the load Z, and a second current path 103N through which a second current flows commonly to the lower arm 120 and the load Z. Specifically, as described above, the upper arm 110 and the lower arm 120 are connected in series between the high-potential power supply line 101P and the low-potential power supply line 101N, and the load Z is connected to the AC output terminal 102, which is a common connection point of the upper arm 110 and the lower arm 120. The first current path 103P is a current path between the upper arm 110 and the AC output terminal 102, and the second current path 103N is a current path between the lower arm 120 and the AC output terminal 102. The first current path 103P and the second current path 103N are inserted into the Rogowski coil 40 so that the direction from the upper arm 110 of the first current path 103P to the load Z and the direction from the lower arm 120 of the second current path 103N to the load Z are the same direction within the Rogowski coil 40.

[0019] In this configuration, when a current flows through the first current path 103P or the second current path 103N, a circular magnetic field is generated with the current path as its center. When the current flowing through the current path changes, an induced voltage Vm proportional to the time gradient di / dt of the current is output from the Rogowski coil 40. This induced voltage Vm is the detection signal obtained from the Rogowski coil 40.

[0020] The short circuit determination circuit 30 includes an induced voltage detection circuit 31, a zero voltage period determination circuit 32, a voltage value comparison circuit 33, and an OR gate .

[0021] The induced voltage detection circuit 31 detects the induced voltage value Vm, which is a detection signal obtained from the Rogowski coil 40, and outputs it to the voltage value comparison circuit 33. The induced voltage detection circuit 31 also outputs a zero voltage period signal E0 during the period when the induced voltage value Vm is zero voltage, specifically, while the absolute value of the induced voltage value Vm is less than a small threshold value.

[0022] The zero voltage period determination circuit 32 is a circuit that detects an arm short-circuit based on the zero voltage period signal E0. More specifically, in this embodiment, if an abnormality such as a short circuit or false turn-on occurs in one of the upper arm 110 or the lower arm 120, causing an arm short-circuit, when the other arm is turned on, currents of the same magnitude but opposite polarity continue to flow through the first current path 103P and the second current path 103N for a long period of time, causing the induced voltage Vm obtained from the Rogowski coil 40 to remain at zero voltage for a long period of time. Therefore, the zero voltage period determination circuit 32 outputs an arm short-circuit detection signal E1 indicating the occurrence of an arm short-circuit when the zero voltage period signal E0 continues for a predetermined reference time Δt0 or longer from the start of turn-on of the upper arm 110 or the lower arm 120.

[0023] The voltage value comparison circuit 33 is a circuit that detects a load short-circuit based on the induced voltage value Vm. More specifically, in this embodiment, when a short circuit occurs in the load Z, a current larger than normal flows through the first current path 103P or the second current path 103N, and the current value increases over time, causing an induced voltage Vm larger than normal to be output from the Rogowski coil 40. Therefore, the voltage value comparison circuit 33 outputs a load short-circuit detection signal E2 when the absolute value of the induced voltage Vm detected by the induced voltage detection circuit 31 becomes equal to or greater than a reference value V0, which is a second threshold value.

[0024] When an arm short-circuit detection signal E1 or a load short-circuit detection signal E2 is output, the OR gate 34 outputs a short-circuit detection signal E to the upper arm gate drive circuit 10 and the lower arm gate drive circuit 20, thereby stopping the driving of the semiconductor switching element Q1 by the upper arm gate drive circuit 10 and the driving of the semiconductor switching element Q2 by the lower arm gate drive circuit 20.

[0025] The upper arm gate drive circuit 10 includes a drive circuit 11, a short-circuit current interruption circuit 12, and a switching circuit 13. An upper arm control signal is supplied to the drive circuit 11 to instruct the semiconductor switching element Q1 to be on or off. When an upper arm control signal instructing the semiconductor switching element Q1 to be on is supplied, the drive circuit 11 outputs a gate-source voltage VGS(Q1) that turns on the semiconductor switching element Q1. When an upper arm control signal instructing the semiconductor switching element Q1 to be off is supplied, the drive circuit 11 outputs a gate-source voltage VGS(Q1) that turns off the semiconductor switching element Q1. The short-circuit current interruption circuit 12 outputs a gate-source voltage VGS(Q1) that can interrupt the flow of a short-circuit current through the semiconductor switching element Q1. When the short-circuit detection signal E is not output, the switching circuit 13 supplies the gate-source voltage VGS(Q1) output from the drive circuit 11 between the gate and source of the semiconductor switching element Q1. Furthermore, when the short circuit detection signal E is output, the switching circuit 13 supplies the gate-source voltage VGS(Q1) output from the short circuit current interruption circuit 12 between the gate and source of the semiconductor switching element Q1.

[0026] The lower-arm gate drive circuit 20 includes a drive circuit 21 similar to those provided in the upper-arm gate drive circuit 10, a short-circuit current interruption circuit 22, and a switching circuit 23. When a short-circuit detection signal E is not output, the switching circuit 23 supplies the gate-source voltage VGS(Q2) output from the drive circuit 21 between the gate and source of the semiconductor switching element Q2. When a short-circuit detection signal E is output, the switching circuit 23 supplies the gate-source voltage VGS(Q2) output from the short-circuit current interruption circuit 22 between the gate and source of the semiconductor switching element Q1.

[0027] Next, the operation of this embodiment will be described. Fig. 2 is a circuit diagram showing a general operation example of the power conversion device 100. In the example shown in Fig. 2, power is supplied to the load Z through an upper-arm-on operation in which the upper arm 110 and a lower arm of another phase (not shown) are turned on while the lower arm 120 is off, followed by an upper-arm-off operation (freewheel mode) in which the upper arm 110 and a lower arm of another phase (not shown) are turned off, and a lower-arm-on operation in which the lower arm 120 and an upper arm of another phase (not shown) are turned on, followed by a lower-arm-off operation (freewheel mode) in which the lower arm 120 and an upper arm of another phase (not shown) are turned off.

[0028] During the upper-arm ON operation, a gate-source voltage VGS(Q1) that turns on the semiconductor switching element Q1 is output from the upper-arm gate drive circuit 10. At this time, a semiconductor switching element of a lower arm (not shown) of another phase is simultaneously turned on with the semiconductor switching element Q1. When the semiconductor switching element Q1 and the lower arm of the other phase are turned on, an upper-arm current I110, which is a drain current, flows from the high-potential power supply line 101P through the semiconductor switching element Q1. This upper-arm current I110 flows to the load Z via the first current path 103P in the Rogowski coil 40 (solid line arrow). During this upper-arm ON operation, the upper-arm current I110, which increases over time, flows through the first current path 103P from the upper arm 110 side to the load Z side. In this embodiment, the Rogowski coil 40 is arranged so that the Rogowski coil 40 outputs a positive induced voltage Vm when the current flowing to the load Z via the semiconductor switching element Q1 increases.

[0029] During the subsequent upper-arm off operation, the upper-arm gate drive circuit 10 outputs a gate-source voltage VGS(Q1) that turns off the semiconductor switching element Q1, turning the semiconductor switching element Q1 off. At the same time, the lower arm (not shown) of the other phase that was on is also turned off. As a result, an electromotive force is generated in the load Z, maintaining the current that had been flowing through the load Z up to that point. A lower-arm current I120, which is a reflux current, flows from the low-potential power supply line 101N through the diode D2 and the second current path 103N in the Rogowski coil 40 to the load Z (broken-circuit current) (indicated by the dashed arrow). During this upper-arm off operation, the lower-arm current I120 (reflux current), which decreases over time, flows through the second current path 103N from the lower arm 120 side to the load Z. In other words, during the upper-arm off operation, the direction of the current passing through the Rogowski coil 40 is the same as during the upper-arm on operation, but the current change rate is negative. Therefore, the Rogowski coil 40 outputs a negative induced voltage Vm.

[0030] During the subsequent lower-arm ON operation, the gate-source voltage VGS(Q2) that turns on the semiconductor switching element Q2 is output from the lower-arm gate drive circuit 20. At this time, the semiconductor switching element of the upper arm of the other phase (not shown) is turned on simultaneously with the semiconductor switching element Q2. When the semiconductor switching element Q2 and the upper arm of the other phase are turned on, a drain current, i.e., a lower-arm current I120, flows from the load Z to the low-potential power supply line 101N via the second current path 103N in the Rogowski coil 40 and the semiconductor switching element Q2 (solid arrow). During this lower-arm ON operation, the lower-arm current I120, which increases over time, flows from the load Z side to the lower arm 120 side through the second current path 103N. That is, during the lower-arm ON operation, the rate of change of the current passing through the Rogowski coil 40 has the same polarity as during the upper-arm ON operation, but the direction of the current passing through the Rogowski coil 40 is opposite. Therefore, the Rogowski coil 40 outputs a negative induced voltage Vm.

[0031] During the subsequent lower-arm off operation, the gate-source voltage VGS(Q2) that turns off the semiconductor switching element Q2 is output from the lower-arm gate drive circuit 20, turning off the semiconductor switching element Q2. At the same time, the upper arm (not shown) of the other phase that was on is also turned off. As a result, an electromotive force is generated in the load Z that maintains the current that had been flowing through the load Z until that point. A return current, the upper-arm current I110, flows from the load Z to the high-potential power supply line 101P via the first current path 103P and diode D1 in the Rogowski coil 40 (broken arrow). During this lower-arm off operation, the upper-arm current I110, which decreases over time, flows from the load Z side to the upper arm 110 side through the first current path 103P. In other words, during the lower-arm off operation, the direction of the current passing through the Rogowski coil 40 is opposite to that during the upper-arm on operation, and the current change rate is also negative. Therefore, the Rogowski coil 40 outputs a positive induced voltage Vm. The above is a typical operation example of the power conversion device 100 shown in FIG. 2.

[0032] Fig. 3 is a waveform diagram showing waveforms at various parts in an operation example in which normal turn-on without short-circuit fault is performed during switching of upper arm 110. Fig. 4 is a circuit diagram showing the operating states of power conversion device 100 during periods A, B, and C in Fig. 3.

[0033] In the operation examples shown in Figures 3 and 4, switching of the upper arm 110, that is, the upper arm ON operation and the upper arm OFF operation (freewheel mode) shown in Figure 2 are alternately repeated. Figures 3 and 4 show the upper arm OFF operation and the subsequent upper arm ON operation out of the series of operations repeated in this way.

[0034] The boundary between period A and period B in Fig. 3 is the timing at which the upper arm 110 starts to turn on. During period A before the upper arm 110 starts to turn on, as shown in Fig. 4, a lower arm current I120, which is a reflux current, flows from the low potential power supply line 101N to the load Z via the diode D2 and the second current path 103N in the Rogowski coil 40. Since this operation mode is an upper arm off operation, as shown in Fig. 3, a negative induced voltage Vm is output from the Rogowski coil 40 during period A.

[0035] When the upper arm 110 starts to turn on and period B begins, as shown in FIG. 4, an upper arm current I110, which is a drain current, flows from the high potential power line 101P through the semiconductor switching element Q1. During period B, the drain-source voltage VDS(Q1) of the switching element Q1 decreases over time, and the upper arm current I110, which is a drain current, increases. At the start of period B, a reflux current flows through the diode D2 in the lower arm 120. During period B, the upper arm current I110 passes through the first current path 103P in the Rogowski coil 40, then the second current path 103N, and flows toward the lower arm 120, reducing the reflux current of the diode D2. Therefore, during period B, the negative lower arm current I120, which is a reflux current, approaches zero over time. Then, as the upper arm current I110 increases, the lower arm current (freewheeling current) 120 flowing through diode D2 becomes zero. The upper arm current I110 then becomes a reverse recovery current that eliminates the minority carriers accumulated in diode D2 during forward bias. After this reverse recovery current flows, the lower arm current 120 reaches a positive peak and begins to decrease. In this way, diode D2 turns off, and the drain-source voltage VDS(Q2) of semiconductor switching element Q2 in the lower arm 120 increases.

[0036] During the period until diode D2 is turned off, the upper arm current I110 that has passed through the first current path 103P passes through the second current path 103N toward the lower arm 120. That is, currents of opposite polarity and the same rate of change flow through the first current path 103P and the second current path 103N. In this case, magnetic fluxes cancel each other out within the Rogowski coil 40, causing the Rogowski coil 40 to output zero voltage as the induced voltage Vm. After diode D2 is turned off, the upper arm current I110 that has passed through the first current path 103P flows to the load Z instead of the second current path 103N. This period is period C shown in FIG. 3. During this period C, the upper arm is turned on, causing the Rogowski coil 40 to output a positive induced voltage Vm.

[0037] When there is no arm short circuit, the period during which zero voltage occurs as the induced voltage Vm is a short time determined by the characteristics of diode D2. In the example shown in Fig. 3, the period during which zero voltage occurs as the induced voltage Vm is shorter than the predetermined reference time Δt0, so the arm short circuit detection signal E1 is not output.

[0038] Furthermore, when there is no load short circuit, excessive upper arm current I110 or lower arm current I120 does not flow, and therefore the induced voltage Vm obtained from the Rogowski coil 40 does not become large. In the example shown in Fig. 3, the induced voltage Vm obtained from the Rogowski coil 40 does not deviate from the range of a predetermined reference value ±V0, so the voltage value comparison signal E2 is not output. Therefore, in the example shown in Fig. 3, the short circuit detection signal E is not output.

[0039] Fig. 5 is a waveform diagram showing waveforms at various parts in an operation example in which a short-circuit fault occurs in lower arm 120 during switching of upper arm 110. Fig. 6 is a circuit diagram showing the operating state of power conversion device 100 during periods A, B, and D in Fig. 5.

[0040] 3 and 4, in the operation examples shown in FIGS. 5 and 6, the upper arm 110 is switched, that is, the upper arm ON operation and the upper arm OFF operation (freewheel mode) shown in FIG. 2 are alternately repeated.

[0041] 5, the boundary between period A and period B is the timing at which the upper arm 110 starts to turn on. The operation during period A is the same as the operation during normal turn-on described above (FIGS. 3 and 4).

[0042] When the upper arm 110 starts to turn on and period B begins, an upper arm current I110, which is a drain current, flows from the high potential power supply line 101P through the semiconductor switching element Q1, as shown in Fig. 6. Similar to the operation during normal turn-on described above, during period B, the upper arm current I110 flows through the first current path 103P and the second current path 103N to the lower arm 120, reducing the reflux current of the diode D2 and then becoming the reverse recovery current of the diode D2.

[0043] On the other hand, if a short-circuit fault occurs in semiconductor switching element Q2 of lower arm 120, upper arm current I110 flows to semiconductor switching element Q2 via first current path 103P and second current path 103N during period B. Here, the short-circuit fault of semiconductor switching element Q2 includes faults such as breakdown of semiconductor switching element Q2, as well as faults such as erroneous on-state due to the influence of noise, etc.

[0044] When an arm short circuit occurs in the lower arm 120 in this way, during period B, the process of reducing the return current of diode D2, followed by the process of flowing a reverse recovery current through diode D2 and the process of flowing an upper arm current I110 through semiconductor switching element Q2 of the lower arm 120 proceed simultaneously in parallel. As a result, currents of opposite polarity and the same rate of change continue to flow through first current path 103P and second current path 103N for a long period of time, the period during which induced voltage Vm of Rogowski coil 40 maintains zero voltage exceeds reference time Δt0, and arm short circuit detection signal E1 is output. As a result, short circuit detection signal E is output.

[0045] When the short-circuit detection signal E is output, in the upper-arm gate drive circuit 10, the switching circuit 13 switches the supply source of the gate-source voltage VGS(Q1) from the drive circuit 11 to the short-circuit current interruption circuit 12, and the gate-source voltage VGS(Q1) that turns off the semiconductor switching element Q1 is output from the upper-arm gate drive circuit 10. Furthermore, when the short-circuit detection signal E is output, in the lower-arm gate drive circuit 20, the switching circuit 23 switches the supply source of the gate-source voltage VGS(Q2) from the drive circuit 21 to the short-circuit current interruption circuit 22, and the gate-source voltage VGS(Q2) that turns off the semiconductor switching element Q2 is output from the lower-arm gate drive circuit 20.

[0046] As a result, a period D begins in which both the upper arm current I110 and the lower arm current I120 decrease. In this manner, in this embodiment, the arm short-circuit current is interrupted upon detection of an arm short-circuit fault.

[0047] Although the operation of arm short-circuit detection has been described above using an example in which a short circuit occurs in the lower arm during upper arm switching, a similar operation is performed to detect an arm short circuit when a short circuit occurs in the upper arm during lower arm switching. That is, even if a short circuit occurs in the upper arm during lower arm switching, after the lower arm starts to turn on, currents of the same magnitude but opposite polarity flow through the first current path 103P and the second current path 103N, and the induced voltage Vm of the Rogowski coil 40 becomes zero voltage for a reference time Δt0 or more, and an arm short circuit is detected based on the duration of this zero voltage.

[0048] 7 is a waveform diagram showing waveforms at various parts in an operation example in which a short-circuit fault occurs in the load Z during switching of the upper arm 110. FIG. 8 is a circuit diagram showing the operating state of the power conversion device 100 during periods A, B, C, and E in FIG.

[0049] Similar to the operation during normal turn-on shown in Figures 3 and 4, in the operation examples shown in Figures 7 and 8, the upper arm 110 is switched alternately between the upper arm on operation and the upper arm off operation (freewheel mode) shown in Figure 2.

[0050] 7 is the timing at which the upper arm 110 starts to turn on. The operations during periods A, B, and C are the same as those during periods A, B, and C during normal turn-on (FIGS. 3 and 4) described above.

[0051] When a short-circuit fault occurs in the load Z, the upper arm current I110, which increases over time, becomes excessive during period C, and the time gradient di / dt of the upper arm current I110 flowing through the first current path 103P also becomes excessive. As a result, the induced voltage Vm of the Rogowski coil 40 exceeds the threshold value +V0. As a result, the load short-circuit detection signal E2 and the short-circuit detection signal E are output, and period E begins.

[0052] During period E, in response to short-circuit detection signal E, the upper-arm gate drive circuit 10 outputs a gate-source voltage VGS(Q1) that turns off semiconductor switching element Q1, and the lower-arm gate drive circuit 20 outputs a gate-source voltage VGS(Q2) that turns off semiconductor switching element Q2, thereby interrupting the load short-circuit current.

[0053] As described above, according to this embodiment, it is possible to detect an arm short circuit and a load short circuit in the power conversion device 100 and to cut off the short-circuit current by using one Rogowski coil 40 and one short-circuit determination circuit 30 provided for both the upper arm 110 and the lower arm 120. Therefore, according to this embodiment, it is possible to detect a short-circuit fault in the power conversion device 100 while avoiding an increase in the size and complexity of the entire power conversion device 100.

[0054] <Other embodiments> Although one embodiment of the present invention has been described above, other embodiments of the present invention are also possible, for example as follows.

[0055] (1) Fig. 9 is a circuit diagram showing the configuration of a power conversion device 100 including a short-circuit fault detection device 50' according to another embodiment of the present invention. In the above embodiment (Fig. 1), a first current path 103P between the upper arm 110 and the common connection point of the upper arm 110 and the lower arm 120, and a second current path 103N between the lower arm 120 and the common connection point of the upper arm 110 and the lower arm 120 are inserted through the Rogowski coil 40'. In contrast, in the short-circuit fault detection device 50' shown in Fig. 9, a first current path 103P' between the upper arm 110 and the high-potential power supply line 101P and a second current path 103N' between the lower arm 120 and the low-potential power supply line 101N are inserted through the Rogowski coil 40'. In this embodiment as well, when an arm short circuit occurs, currents of the same magnitude but opposite polarities flow through the first current path 103P' and the second current path 103N', making it possible to detect the arm short circuit.Furthermore, in this embodiment as well, when a load short circuit occurs, an excessive current that increases over time flows through the first current path 103P' or the second current path 103N', making it possible to detect the load short circuit.

[0056] (2) The present invention may be applied to power conversion devices other than inverters that convert DC power to AC power, such as DC / DC converters and AC / AC converters.

[0057] (3) In the above embodiment, a MOSFET is given as an example of a semiconductor switching element, but the semiconductor switching element is not limited to this and may be other semiconductor switching elements such as an IGBT (Insulated Gate Bipolar Transistor).

[0058] (4) In the above embodiment, the reference time Δt0 and the reference value ±V0 may be adjusted by operating the controls.

[0059] (5) A control signal that is at an active level while the upper arm control signal and the lower arm control signal are being supplied and is at an inactive level otherwise may be received from a host device that controls the power conversion device 100, and the logical product of this control signal and the short-circuit detection signal E may be supplied to the switching circuits 13, 23. By taking the logical product of this control signal and the short-circuit detection signal E, it is possible to prevent the switching circuits 13, 23 from switching the drive unit of the semiconductor switching elements Q1, Q2 from the drive circuits 11, 21 to the short-circuit current interruption circuits 12, 22 if the output voltage Vm of the Rogowski coil 40 remains at zero voltage for more than the reference time Δt0 while the semiconductor switching elements Q1, Q2 are not operating.

[0060] (6) FIG. 10 is a side view showing an example of mounting the power conversion device of FIG. 1 described above. In FIG. 10, semiconductor module 210 has package 210p and three terminals 211-213 protruding from the bottom surface of package 210p. Semiconductor module 220 has package 220p and three terminals 221-223 protruding from the bottom surface of package 220p. Package 210p accommodates semiconductor switching element Q1 and diode D1 connected in anti-parallel to semiconductor switching element Q1, which constitute upper arm 110 shown in FIG. 1. Terminal 211 is connected to the gate of semiconductor switching element Q1, terminal 212 is connected to the drain of semiconductor switching element Q1, and terminal 213 is connected to the source of semiconductor switching element Q1. Package 220p accommodates semiconductor switching element Q2 and diode D2 connected in anti-parallel to semiconductor switching element Q1, which constitute lower arm 120 shown in FIG. 1. Here, terminal 221 is connected to the gate of semiconductor switching element Q2, terminal 222 is connected to the drain of semiconductor switching element Q2, and terminal 223 is connected to the source of semiconductor switching element Q2.

[0061] Terminals 211 to 213 of semiconductor module 210 and terminals 221 to 223 of semiconductor module 220 are aligned in a straight line with a gap between them, and each of these terminals penetrates gate wiring board 230, Rogowski wiring board 240, and main circuit wiring board 250.

[0062] 1 are formed on gate wiring board 230. A conductor pattern to which an output signal from upper arm gate drive circuit 10 is applied is also formed on gate wiring board 230, and terminal 211 is connected to this conductor pattern. A conductor pattern to which an output signal from lower arm gate drive circuit 20 is applied is also formed on gate wiring board 230, and terminal 221 is connected to this conductor pattern.

[0063] A conductor pattern corresponding to the high-potential power line 101P shown in Fig. 1 is formed on the main circuit wiring board 250, and a terminal 212 is connected to this conductor pattern. A conductor pattern corresponding to the low-potential power line 101N shown in Fig. 1 is also formed on the main circuit wiring board 250, and a terminal 223 is connected to this conductor pattern. A conductor pattern corresponding to the output terminal 102 shown in Fig. 1 is also formed on the main circuit wiring board 250, and terminals 213 and 222 are connected to this conductor pattern. That is, in this example, the terminals 213 and 222 correspond to the first current path 103P and the second current path 103N in Fig. 1.

[0064] A Rogowski coil 243 corresponding to the Rogowski coil 40 shown in FIG. 1 is formed on the Rogowski wiring board 240. FIG. 11 is a plan view of the Rogowski wiring board 240 as seen from the semiconductor modules 210 and 220 side. As shown in FIG. 11, the Rogowski coil 243 is composed of a spiral coil 241 and a return wire 242 that runs from the end point of the coil 241 to the start point within the coil 241. The Rogowski coil 243 surrounds the terminals 213 and 222 (i.e., the first current path 103P and the second current path 103N in FIG. 1), and the end of the coil 241 and the end of the return wire 242 of the Rogowski coil 243 are connected to the short-circuit determination circuit 30 on the gate wiring board 230 via through-hole wiring (not shown).

[0065] Therefore, this embodiment can achieve the same effects as the embodiment of Fig. 1. In this embodiment, the Rogowski wiring board 240 on which the Rogowski coil 243 is mounted and the gate wiring board 230 are separate boards, but they may be the same board. The same applies to the mounting examples of Figs. 12 and 13 described below.

[0066] (7) Fig. 12 is a side view showing an example of the implementation of the power conversion device shown in Fig. 9. Similar to the implementation examples shown in Figs. 10 and 11, the power conversion device has semiconductor modules 210 and 220, a gate wiring board 230, a Rogowski wiring board 240, and a main circuit wiring board 250. Fig. 13 is a plan view of the Rogowski wiring board 240 as seen from the semiconductor modules 210 and 220 side.

[0067] 10 and 11 only in the following respect. In the implementation examples of FIGS. 10 and 11, Rogowski coil 243 on Rogowski wiring board 240 collectively surrounds terminals 213 and 222 (i.e., first current path 103P and second current path 103N in FIG. 1). In contrast, in the implementation examples of FIGS. 12 and 13, Rogowski coil 243 on Rogowski wiring board 240 collectively surrounds terminals 212 and 223 (i.e., first current path 103P' and second current path 103N' in FIG. 9).

[0068] Therefore, according to this aspect, the same effects as those of the embodiment of FIG. 9 described above can be obtained.

[0069] (8) FIG. 14 is a plan view showing another implementation example of the power conversion device of FIG. 9 described above. FIG. 15 is a side view of the same implementation example. In FIGS. 14 and 15, semiconductor module 300 is a 2-in-1 type semiconductor module and houses the elements constituting upper arm 110 and lower arm 120 of FIG. 9. Spacers 311, 312, and 313 made of an insulator are provided on the upper surface of semiconductor module 300. Terminal portions 361, 362, and 363 are formed on the upper portions of spacers 311, 312, and 313, respectively. In addition, circuit board 320 is disposed so as to surround spacers 312 and 313. A drive control circuit unit 330 is mounted on circuit board 320. Drive control circuit unit 330 includes upper arm gate drive circuit 10, lower arm gate drive circuit 20, and short-circuit determination circuit 30 shown in FIG. 9.

[0070] In the semiconductor module 300, the source of the semiconductor switching element Q1 of the upper arm 110 and the drain of the semiconductor switching element Q2 of the lower arm 120 are commonly connected, and this common connection point is connected to a terminal 361. That is, the terminal 361 corresponds to the output terminal 102 in FIG. 9 and is connected to a load (not shown).

[0071] In addition, in the semiconductor module 300, the drain of the semiconductor switching element Q1 of the upper arm 110 is connected to a terminal portion 362. This terminal portion 362 corresponds to the high potential power supply line 101P in Fig. 9. That is, in this example, the wiring connecting the terminal portion 362 and the drain of the semiconductor switching element Q1 of the upper arm 110 included in the semiconductor module 300 becomes the first current path 103P' in Fig. 9.

[0072] In addition, in the semiconductor module 300, the source of the semiconductor switching element Q2 of the lower arm 120 is connected to a terminal portion 363. This terminal portion 363 corresponds to the low potential power supply line 101N in Fig. 9. That is, in this example, the wiring connecting the terminal portion 363 and the source of the semiconductor switching element Q2 included in the semiconductor module 300 becomes the second current path 103N' in Fig. 9.

[0073] 14, a Rogowski coil 340 is formed on the circuit board 320, circulating around a first current path 103P' extending from the semiconductor module 300 to the terminal 362 and a second current path 103N' extending from the semiconductor module 300 to the terminal 363. The Rogowski coil 340 is made up of a spiral coil 341 and a return wire 342 that runs from the end point of the coil 341 back to the start point. An end of the coil 341 and an end of the return wire 342 of the Rogowski coil 340 are connected to the short-circuit determination circuit 30 in the drive control circuit section 330.

[0074] Therefore, this aspect provides the same effects as the embodiment in Fig. 9. Furthermore, this aspect has the advantage that the terminal portion 362 corresponding to the high potential power supply line 101P and the terminal portion 363 corresponding to the low potential power supply line 101N are adjacent to each other as shown in Fig. 14, and the Rogowski coil 340 collectively surrounds the first current path 103P' and the second current path 103N' connected to the adjacent terminal portions 362 and 363, thereby simplifying the configuration.

[0075] (9) In the above mounting example, the Rogowski coil is provided outside the semiconductor module. However, the Rogowski coil may be embedded in the semiconductor module.

[0076] Figure 16 is a side view showing a modification of the implementation example of Figures 14 and 15. In Figure 16, parts corresponding to those shown in Figures 14 and 15 are designated by the same reference numerals, and description thereof will be omitted.

[0077] In the mounting example shown in Fig. 16, circuit board 320a corresponds to circuit board 320 in Fig. 14, but does not have Rogowski coil 340 in Fig. 14. Instead, in the mounting example shown in Fig. 16, Rogowski coil 340a is embedded in semiconductor module 320a, and Rogowski coil 340a is connected to drive control circuit section 330 (see Fig. 14) of circuit board 320a.

[0078] 16, the elements constituting the upper arm 110 and the lower arm 120 in FIG. 9 are formed in an element formation region 370 in the semiconductor module 300a. In the element formation region 370, the source of the semiconductor switching element Q1 of the upper arm 110 and the drain of the semiconductor switching element Q2 of the lower arm 120 are commonly connected, and this common connection point is connected to the terminal portion 361 via the conductor layer 361a.

[0079] In the element formation region 370, the drain of the semiconductor switching element Q1 of the upper arm 110 is connected to the terminal portion 362 via the conductor layer 362a. That is, in this example, the conductor layer 362a connecting the terminal portion 362 and the drain of the semiconductor switching element Q1 of the upper arm 110 included in the semiconductor module 300a serves as the first current path 103P' in FIG.

[0080] In the element formation region 370, the source of the semiconductor switching element Q2 of the lower arm 120 is connected to the terminal portion 363 via the conductor layer 363a. That is, in this example, the conductor layer 363a connecting the terminal portion 363 and the source of the semiconductor switching element Q2 included in the semiconductor module 300a corresponds to the second current path 103N' in Fig. 9. In this manner, in the mounting example shown in Fig. 16, in addition to the upper arm 110 and the lower arm 120, the first current path 103P' and the second current path 103N' are housed in the semiconductor module 300.

[0081] 16, a Rogowski coil 340a is embedded in the semiconductor module 300a, the Rogowski coil 340a looping around the conductor layers 362a and 363a, i.e., the first current path 103P' and the second current path 103N'. Various methods are conceivable for embedding the Rogowski coil 340a in the semiconductor module 300a. For example, a space may be formed in the semiconductor module that loops around the first current path 103P' and the second current path 103N', and the Rogowski coil 340a may be inserted into this space. Alternatively, the Rogowski coil 340a may be formed in the semiconductor module 300a that loops around the first current path 103P' and the second current path 103N', and then sealed with an insulating material such as resin.

[0082] The mounting example of Fig. 16 provides the same effects as the mounting examples of Fig. 14 and Fig. 15. Moreover, according to the mounting example of Fig. 16, since Rogowski coil 340a is embedded in semiconductor module 300a, mounting can be made simpler than the mounting examples of Fig. 14 and Fig. 15. Furthermore, compared to the mounting examples of Fig. 14 and Fig. 15, it is possible to suppress a decrease in the creepage distance between spacers 311 and 312 and between spacers 312 and 313. [Explanation of symbols]

[0083] 100...power conversion device, 101P...high-potential power supply line, 101N...low-potential power supply line, 110...upper arm, 120...lower arm, Q1, Q2...semiconductor switching element, D1, D2...diode, 10...upper arm gate drive circuit, 20...lower arm gate drive circuit, 11, 21...drive circuit, 21, 22...short-circuit current interruption circuit, 13, 23...switching circuit, 50, 50'...short-circuit fault detection device, 40, 40'...Rogowski coil, 102...AC output terminal, 103P, 103P'...first current path, 103N, 103N'...second current path, 30...short-circuit determination circuit, 31...induced voltage detection circuit, 32...zero current Voltage period determination circuit, 33...voltage value comparison circuit, 34...OR gate, 210, 220, 300, 300a...semiconductor module, 210p, 220p...package, 211-213, 221-223...terminal, 240, 320, 320a...circuit board, 243, 340, 340a...Rogowski coil, 241, 341...coil, 242, 342...return line, 311-313...spacer, 320...circuit board, 330...drive control circuit section, 361-363...terminal section, 361a-363a...conductor layer, 370...element formation region, 230...gate wiring board, 240...Rogowski wiring board, 250...main circuit wiring board.

Claims

1. 1. A short-circuit fault detection device for a power conversion device that supplies power to a load via two or more arms each including a semiconductor switching element, a Rogowski coil inserted in both a first current path through which a first current flows commonly to a first arm of the two or more arms and the load, and a second current path through which a second current flows commonly to a second arm of the two or more arms and the load, detecting a short-circuit fault in an arm of the power conversion device and the load based on a detection signal obtained from the Rogowski coil; A short-circuit fault detection device, characterized in that a short-circuit fault in the arm is detected based on the duration of a state in which the absolute value of the detection signal is within a first threshold value.

2. the first arm and the second arm are connected in series between a high potential power supply line and a low potential power supply line, and the load is connected to a common connection point of the first arm and the second arm; the first current path is a current path between the first arm and the common connection point; The second current path is a current path between the second arm and the common connection point. The short circuit fault detection device according to claim 1 .

3. the first arm is housed in a first semiconductor module and is connected to the high-potential power supply line by a terminal of the first semiconductor module; the second arm is housed in a second semiconductor module and is connected to the low-potential power supply line by a terminal of the second semiconductor module; The Rogowski coil collectively surrounds the terminals of the first semiconductor module and the terminals of the second semiconductor module. The short circuit fault detection device according to claim 2 .

4. the first arm and the second arm are connected in series between a high potential power supply line and a low potential power supply line, and the load is connected to a common connection point of the first arm and the second arm; the first current path is a current path between the first arm and the high potential power supply line, The second current path is a current path between the second arm and the low potential power supply line. The short circuit fault detection device according to claim 1 .

5. the first arm is housed in a first semiconductor module and connected to the common connection point by a terminal of the first semiconductor module; the second arm is housed in a second semiconductor module and is connected to the common connection point by a terminal of the second semiconductor module; The Rogowski coil collectively surrounds the terminals of the first semiconductor module and the terminals of the second semiconductor module. The short circuit fault detection device according to claim 4 .

6. the first arm and the second arm are housed in a semiconductor module, the first arm is connected to the high potential power supply line outside the semiconductor module via the first current path, and the second arm is connected to the low potential power supply line outside the semiconductor module via the second current path; the high potential power supply line and the low potential power supply line are adjacent to each other outside the semiconductor module; The Rogowski coil surrounds the first current path and the second current path together. The short circuit fault detection device according to claim 4 .

7. the first arm and the second arm, and the first current path and the second current path are housed in a semiconductor module, the first arm is connected to the high potential power supply line outside the semiconductor module via the first current path, and the second arm is connected to the low potential power supply line outside the semiconductor module via the second current path; The Rogowski coil is embedded in the semiconductor module and surrounds the first current path and the second current path. The short circuit fault detection device according to claim 4 .

8. A short-circuit fault detection device described in any one of claims 1 to 7, which detects a short-circuit fault in the load when the absolute value of the detection signal is greater than or equal to a second threshold value.

9. A short-circuit fault detection device as described in any one of claims 1 to 8, characterized in that when a short-circuit fault is detected, the driving of each semiconductor switching element of the first arm and the second arm is stopped.

10. A power conversion device that supplies power to a load via two or more arms each including a semiconductor switching element, a short-circuit fault detection device is provided in a first arm and a second arm of the two or more arms; The short circuit fault detection device includes: a Rogowski coil inserted in both a first current path through which a first current flows commonly to the first arm and the load and a second current path through which a second current flows commonly to the second arm and the load; a short-circuit determination circuit that detects a short-circuit fault in an arm of the power conversion device and the load based on a detection signal obtained from the Rogowski coil, The power conversion device according to claim 1, wherein the short-circuit determination circuit detects a short-circuit fault in the arm based on a duration of a state in which the absolute value of the detection signal is within a first threshold value.

Images