Radiation detectors and radiation imaging systems

By arranging signal processing circuits in a specific configuration to minimize overlapping wiring and crosstalk, the radiation detector addresses image quality degradation issues, achieving faster and clearer image capture.

JP7864750B2Active Publication Date: 2026-05-25CANON KK
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
CANON KK
Filing Date
2024-01-22
Publication Date
2026-05-25

AI Technical Summary

Technical Problem

Existing radiation detectors suffer from image quality degradation due to crosstalk caused by shared control signal wiring across AD conversion units, necessitating a solution to reduce this degradation.

Method used

The detector design includes a pixel region with multiple signal processing circuits arranged in a specific configuration, where each pixel is connected to separate output lines and signal processing circuits, with the first signal processing circuit located between the pixel region and the second signal processing circuit, and the horizontal scanning circuit positioned to avoid overlapping wiring, thereby reducing crosstalk.

Benefits of technology

This configuration effectively minimizes crosstalk, enhancing image quality by ensuring uniform wiring lengths and reducing signal overlap, allowing for faster signal readout and improved image clarity.

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Abstract

To provide a radiation detector capable of reducing image quality degradation.SOLUTION: A radiation detector includes: a pixel region in which a plurality of pixels are arranged; a first output line connected to a first pixel; a second output line connected to a second pixel; a first signal processing circuit connected to the first output line; and a second signal processing circuit connected to the second output line. The first signal processing circuit includes: a first driving circuit connected to the first output line; a first AD conversion circuit; a first holding circuit; and a first horizontal scanning circuit, and includes a second driving circuit connected to the second output line; a second AD conversion circuit; and a second holding circuit. The first signal processing circuit is disposed between the pixel region and the second signal processing circuit in plan view, and the first horizontal scanning circuit is disposed between the pixel region and the second AD conversion circuit in plan view.SELECTED DRAWING: Figure 2
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