Transmitter and program

Abstract

To achieve a further low latency of LLchs.SOLUTION: A transmitting device 1 includes: a null insertion unit 17 that generates null packets with payloads null-filled when no data packets are input, an LDPC coding unit 18 that performs LDPC coding on the data packets and the null packets to generate fixed-length blocks, and an OFDM frame composition unit 19 that assigns the blocks to low latency channel carriers and modulates them using a predetermined modulation scheme to form an OFDM frame. The null packets are shorter in a size than the data packets.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a transmission device and a program.

Background Art

[0002] In the next-generation advanced terrestrial television broadcasting system (hereinafter referred to as the "advanced system"), similar to the AC (Auxiliary Channel) of the current ISDB-T (Integrated Services Digital Broadcasting-Terrestrial), dedicated sub-carriers that are not used for data transmission such as video and audio are randomly arranged within the signal band (see, for example, Non-Patent Document 1). In this specification, this sub-carrier is referred to as Lch, and a channel that transmits information such as emergency information with low latency and high resilience using Lch is called a low-latency channel (LLch: Low-Latency Channel). In LLch, differential BPSK (Differential Binary Phase Shift Keying) is adopted for carrier modulation, and among error correction codes, the inner code LDPC (Low Density Parity Check) code is also set to a low coding rate dedicated to LLch, and high resilience is realized by these. Furthermore, in LLch, low latency is realized by not performing time interleaving.

Prior Art Documents

Non-Patent Documents

[0003]

Non-Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] Generally, the transmission of emergency information should be as fast as possible, i.e., with low latency. For example, in an emergency situation such as a tsunami, where every second counts for evacuation, it is easy to imagine that low latency is extremely beneficial. However, because LLch packets flow to the transmitting device at irregular intervals, instantaneous encoding processing may not be possible, which can cause delays.

[0005] In view of these circumstances, the object of the present invention is to provide a transmitting device and program that can achieve further reduction in the latency of the LLch. [Means for solving the problem]

[0006] To solve the above problems, a transmitting device according to one embodiment is a transmitting device that encodes and transmits data packets on a low-latency channel, and comprises: a null insertion unit that generates a null packet with a null-filled payload when no data packet is input; an LDPC encoding unit that performs LDPC encoding on the data packet and the null packet to generate a fixed-length block; and an OFDM frame constructing unit that assigns the block to a low-latency channel carrier and modulates it with a predetermined modulation scheme to constitute an OFDM (Orthogonal Frequency Division Multiplexing) frame, wherein the size of the null packet is shorter than that of the data packet.

[0007] Furthermore, in one embodiment, the size of the null packet may be 1 / n of the size of the data packet, and greater than or equal to the size of the header of the data packet, where n is an integer of 2 or more.

[0008] Furthermore, in one embodiment, the size of the data area of ​​the block and the size of the data packet are the same in kilobytes, and the LDPC encoding unit inserts the data packet and the null packet into the data area constituting the block in the order of input. If an L-byte null packet has already been inserted into the data area constituting the block, the LDPC encoding unit may insert (KL) bytes of data from the data packet into the data area and insert the remaining L bytes of data from the data packet into the beginning of the data area constituting the next block.

[0009] Furthermore, the program according to one embodiment causes the computer to function as the above-mentioned transmission device. [Effects of the Invention]

[0010] According to the present invention, it is possible to achieve even lower latency for the LLch. [Brief explanation of the drawing]

[0011] [Figure 1] This is a block diagram showing an example configuration of a transmitting device according to one embodiment. [Figure 2] This figure shows an example of the structure of a TLV packet and an FEC block. [Figure 3] This is a flowchart showing the processing procedure of the LDPC encoding unit in a transmitting device according to one embodiment. [Figure 4] This figure shows the first example comparing the processing when the null packet size is 18 bytes and when it is 6 bytes. [Figure 5] This figure shows a second example comparing the processing when the null packet size is 18 bytes and when it is 6 bytes. [Modes for carrying out the invention]

[0012] One embodiment will be described in detail below with reference to the drawings.

[0013] Figure 1 is a block diagram showing an example configuration of a transmitting device when the number of layers is 3. Transmitting device 1 receives packets from a remultiplexing device (not shown). The format of the received packets may be TLV (Type Length Value) / IP (Internet Protocol) packet format, XMI (eXtensible Modulator Interface) / IP packet format, or STLP (Studio To Transmitter Link Protocol) packet format, which is a program transmission signal protocol for terrestrial advanced systems. In this embodiment, an example of the TLV / IP packet format will be explained.

[0014] The transmitting device 1 shown in Figure 1 comprises a hierarchical separation unit 11, a hierarchical processing unit 12, a hierarchical synthesis unit 13, a time-frequency interleaving unit 14, a pilot signal generation unit 15, a TMCC (Transmission and Multiplexing Configuration Control) signal generation unit 16, a null insertion unit 17, an LDPC encoding unit 18, an OFDM frame configuration unit 19, and an OFDM modulation unit 20. The hierarchical processing unit 12 also comprises an error correction encoding unit 121, a bit interleaving unit 122, and a mapping unit 123.

[0015] The hierarchical separation unit 11 receives TLV / IP packets, separates TLV packets belonging to each hierarchical layer, and distributes them to the respective hierarchical processing units 12. It also outputs LLch TLV packets to the LDPC encoding unit 18. Furthermore, the hierarchical separation unit 11 outputs synchronization control information to the pilot signal generation unit 15 and the TMCC signal generation unit 16.

[0016] The error correction coding unit 121 performs error correction coding (for example, LDPC coding) on ​​the signal input from the hierarchical separation unit 11 to generate an encoded signal, enabling the OFDM signal receiver to correct transmission errors. The error correction coding unit 121 then outputs the generated encoded signal to the bit interleave unit 122.

[0017] The bit interleaving section 122 performs interleaving processing on the encoded signal input from the error correction encoding section 121 on a bit-by-bit basis to generate bit data in order to improve the performance of the error correction code. Then, the bit interleaving section 122 outputs the generated bit data to the mapping section 123.

[0018] The mapping section 123 maps the bit data input from the bit interleaving section 122 onto the IQ plane (complex plane) to generate carrier symbols subjected to carrier modulation according to the modulation method. Then, the mapping section 123 outputs the generated carrier symbols to the hierarchical synthesis section 13.

[0019] The hierarchical synthesis section 13 synthesizes the carrier symbols input from the mapping section 123 of each layer and outputs them to the time-frequency interleaving section 14.

[0020] The time-frequency interleaving section 14 rearranges the order of the carrier symbols input from the hierarchical synthesis section 13 in the time direction and the frequency direction to generate an interleaved signal subjected to interleaving processing. Then, the time-frequency interleaving section 14 outputs the generated interleaved signal to the OFDM frame configuration section 19.

[0021] The pilot signal generation section 15 generates pilot signals (SP signal and CP signal) from the synchronization control information input from the hierarchical separation section 11. Then, the pilot signal generation section 15 outputs the generated pilot signals to the OFDM frame configuration section 19.

[0022] The TMCC signal generation section 16 generates a TMCC signal from the synchronization control information input from the hierarchical separation section 11 and outputs it to the OFDM frame configuration section 19.

[0023] The null insertion unit 17 monitors the LLch and, if no TLV packet (hereinafter referred to as "data packet") is input for the LLch, generates a TLV packet with the payload null-filled (hereinafter referred to as "null packet"). The null insertion unit 17 then outputs the generated null packet to the LDPC encoding unit 18.

[0024] The size of the null packet generated by the null insertion unit 17 is shorter than that of the data packet. More preferably, the size of the null packet is 1 / n of the size of the data packet, where n is an integer of 2 or more, and is greater than or equal to the size of the data packet header (hereinafter referred to as the "TLV header"). This makes it possible to simplify processing.

[0025] Figure 2 shows an example of the structure of a TLV packet and an FEC (Forward Error Correction) block. The TLV header includes a reserved area, a packet type, and a data length. The packet type indicates the packet type that identifies whether the TLV packet is IPv4, IPv6, compressed IP, etc. The data length indicates the size of the data stored in the payload. For the reserved area, for example, all bits may be set to "1". For the specifications of TLV packets, please refer to the following references, for example. [References] Association of Radio Industries and Businesses, "Video Coding, Audio Coding, and Multiplexing Methods in Digital Broadcasting," ARIB STD-B32 v3.11, July 2018.

[0026] The 14-byte payload contains emergency information such as earthquake information (Earthquake Early Warning EEW), disaster information, and emergency information. This emergency information includes, for example, start / end flags, update flags, signal identification, current time, page type, prefecture information (regional code), detailed information, and parity bits for error detection. If no input data is available, a null value is inserted into the payload.

[0027] In this embodiment, as shown in Figure 2, the size of the data packet is fixed at 18 bytes. On the other hand, the size of the null packet is 6 bytes, which is one-third the size of the data packet. However, the size of the null packet is not limited to this, and for example, it may be 9 bytes, which is half the size of the data packet.

[0028] The LDPC encoding unit 18 performs LDPC encoding on the data packets input from the hierarchical separation unit 11 and the null packets input from the null insertion unit 17, and generates fixed-length FEC blocks (as shown in Figure 2, with a code length of 153 bytes and a data length of 18 bytes). The LDPC encoding unit 18 then outputs the generated FEC blocks to the OFDM frame constructor 19.

[0029] The size of the data area of ​​an FEC block and the size of a data packet are the same, in kilobytes (18 bytes in this embodiment). The LDPC encoding unit 18 inserts data packets and null packets into the data areas constituting the FEC block in the order they are received. If a null packet of L bytes (6 or 12 bytes in this embodiment) has already been inserted into the data area, the LDPC encoding unit 18 inserts (KL) bytes of data from the data packet into that data area and inserts the remaining L bytes of data from the data packet into the beginning of the data area constituting the next FEC block.

[0030] The OFDM frame constructor 19 inserts the pilot signal input from the pilot signal generation unit 15 and the TMCC signal input from the TMCC signal generation unit 16 into the interleaved signal input from the time-frequency interleaving unit 14. The OFDM frame constructor 19 also assigns the FEC block input from the LDPC encoding unit 18 to the Lch carrier, which is a subcarrier for the LLch, and modulates it using a predetermined modulation scheme (for example, DBPSK (differential binary phase shift keying)) to construct an OFDM frame. The OFDM frame constructor 19 then outputs the generated OFDM frame to the OFDM modulation unit 20.

[0031] The OFDM modulation unit 20 generates an OFDM signal by performing OFDM modulation processing on the OFDM frame input from the OFDM frame constructor 19. More specifically, the OFDM modulation unit 20 generates a time-domain active symbol signal by performing IFFT (Inverse Fast Fourier Transform) processing on the OFDM symbols of the OFDM frame input from the OFDM frame constructor 19. Then, the OFDM modulation unit 20 inserts a guard interval at the beginning of the active symbol signal, and then performs quadrature modulation processing and D / A conversion processing to generate an OFDM signal. Finally, the OFDM modulation unit 20 transmits the generated OFDM signal to a receiving device (not shown).

[0032] Next, the processing of the LDPC encoding unit 18 will be explained with reference to Figure 3. Figure 3 is a flowchart showing the processing procedure by the LDPC encoding unit 18. The LDPC encoding unit 18 determines whether a data packet has been input in three stages. If no data packet has been input, it sequentially inserts 6-byte null packets into the data area that constitutes the FEC block. If a data packet has been input, it begins inserting packets in 6-byte increments, and generates an FEC block when 18 bytes have been accumulated.

[0033] In step S101, it is determined whether or not a data packet has been input. If a data packet has been input, the process proceeds to step S102; otherwise, the process proceeds to step S104.

[0034] In step S102, it is determined whether the size of the data packet is 18 bytes. If the data packet is 18 bytes, the process proceeds to step S103; otherwise, the process proceeds to step S106.

[0035] In step S103, since 18 bytes have been stored in the data area, LDPC encoding is performed to generate an FEC block, which is then output. Then, the process returns to step S101.

[0036] In step S104, the 6-byte null packet input from the null insertion unit 17 is inserted into the data area that constitutes the FEC block. Then, the process proceeds to step S105.

[0037] In step S105, it is determined whether or not a data packet has been input. If a data packet has been input, the process proceeds to step S103; otherwise, the process proceeds to step S108. At this point, a null packet has been inserted into the data area (18 bytes) that constitutes the FEC block, so in the next step S103, a portion (the beginning) of the data packet (18 bytes) is inserted into the remaining area. The excess portion of the data packet will be inserted into the data area that constitutes the next FEC block.

[0038] In step S106, it is determined whether the size of the data packet is 12 bytes or 6 bytes. Part of this data packet (the front) has already been inserted into the data area that constitutes the previous FEC block. If the size of the data packet is 6 bytes, the process proceeds to step S107; if the size of the data packet is 12 bytes, the process proceeds to step S109.

[0039] In step S107, the last 6 bytes of a portion of the data packet are inserted into the data area that constitutes the FEC block. Then, the process proceeds to step S105.

[0040] In step S108, the 6-byte null packet input from the null insertion unit 17 is inserted into the data area that constitutes the FEC block. Then, the process proceeds to step S110.

[0041] In step S109, the last 12 bytes of a portion of the data packet are inserted into the data area that constitutes the FEC block. Then, the process proceeds to step S110.

[0042] In step S110, it is determined whether or not a data packet has been input. If a data packet has been input, the process proceeds to step S103; otherwise, the process proceeds to step S111.

[0043] In step S111, the 6-byte null packet input from the null insertion unit 17 is inserted into the data area constituting the FEC block. Then, the process proceeds to step S103.

[0044] Since LLch data packets do not flow to the transmitting device 1 at regular intervals, an extra delay equal to the transmission time of null packets may occur depending on the data arrival time. This delay will be explained with reference to Figures 4 and 5.

[0045] Figure 4 shows the FEC blocks when the LDPC encoding unit 18 acquires packets in the order of null packet, data packet 1, null packet, etc., in cases where the size of the null packet is 18 bytes and when the size of the null packet is 6 bytes. The numbers written below the arrows in the figure indicate the length of the packets, and the unit is bytes. Figure 4(a) shows the FEC blocks when the size of the null packet is the same as the data packet, 18 bytes, and Figure 4(b) shows the FEC blocks when the size of the null packet is 6 bytes, which is 1 / 3 of the size of the data packet. The LDPC encoding unit 18 sequentially performs LDPC encoding and generates FEC block 1, FEC block 2, FEC block 3, etc. If the LDPC encoding unit 18 acquires data packet 1 immediately after the null packet, in Figure 4(a) data packet 1 is stored in FEC block 2, and in Figure 4(b) a portion of data packet 1 is stored in FEC block 1.

[0046] Figure 5 shows the FEC blocks when the LDPC encoding unit 18 acquires packets in the order of null packet, data packet 1, data packet 2, null packet, etc., in cases where the size of the null packet is 18 bytes and when the size of the null packet is 6 bytes. The numbers written below the arrows in the figure indicate the length of the packets, and the unit is bytes. Figure 5(a) shows the FEC blocks when the size of the null packet is the same as the data packet, 18 bytes, and Figure 5(b) shows the FEC blocks when the size of the null packet is 6 bytes, which is 1 / 3 of the size of the data packet. The LDPC encoding unit 18 sequentially performs LDPC encoding and generates FEC block 1, FEC block 2, FEC block 3, etc. If the LDPC encoding unit 18 acquires data packet 1 and data packet 2 immediately after the null packet, in Figure 5(a) data packet 2 is stored in FEC block 3, and in Figure 5(b) a portion of data packet 2 is stored in FEC block 2.

[0047] Next, the effects of the present invention will be explained. As shown in Figures 4(a) and 5(a), if the size of the null packet is the same as the size of the data packet, a delay of 1 FEC block occurs when the LDPC encoding unit 18 acquires the data packet immediately after the null packet. Therefore, the transmitting device 1 according to the present invention uses a null insertion unit 17 to make the size of the null packet shorter than the size of the data packet. By introducing a null packet shorter than 18 bytes, as shown in Figures 4(b) and 5(b), a portion of the data packet can be inserted even during the generation of the FEC block, and a delay of 1 FEC block can be prevented for that portion of the data packet. In other words, the time required from when the data packet is input until it is converted into an FEC block can be shortened.

[0048] For example, with transmission parameters of FFT size 16k and guard interval length 126μs, the OFDM symbol length (including guard interval) is 2718μs. Therefore, it takes approximately 46ms to generate one LLch FEC block transmitted by 17 OFDM symbols. By introducing a 6-byte null packet, the maximum delay time can be reduced to approximately 15ms, which is one-third of the original delay time, resulting in a maximum delay reduction of approximately 31ms. In the examples shown in Figures 4(b) and 5(b), the delay time is reduced for the first 12 bytes of the data packet.

[0049] In ISDB-T, the AC (Account Code) uses the bit assignments shown in Table 1, starting from the beginning. For details, please refer to the following references, for example. Information with higher priority is assigned bits further forward in the code; for example, the start flag (start / end flag) corresponds to B17 and B18. [References] "Transmission Methods for Terrestrial Digital Broadcasting", ARIB STD-B31, version 2.2, Association of Radio Industries and Businesses, 2014

[0050] [Table 1]

[0051] In the advanced method, it is expected that the bit allocation shown in Table 1 will be followed, but even if high-priority information is bit-assigned to the beginning of the code, conventional methods could not transmit only that information first. On the other hand, since the present invention uses null packets, which are shorter in size than data packets, by bit-assigning high-priority information such as a startup flag (a signal indicating an emergency) to the beginning of the data packet, it becomes possible to transmit high-priority information to the receiving device immediately. The receiving device can prepare accordingly earlier, leading to the rapid provision of information.

[0052] (program) Furthermore, a computer can be suitably used to function as the transmitting device 1 described above. Such a computer can be realized by storing a program in its memory that describes the processing content for realizing each function of the transmitting device 1, and by having the computer's CPU read and execute this program. This program can be recorded on a computer-readable recording medium.

[0053] Furthermore, the program may be recorded on a computer-readable medium. Using a computer-readable medium, it is possible to install the program on a computer. Here, the computer-readable medium on which the program is recorded may be a non-transient recording medium. A non-transient recording medium is not particularly limited, but may be a recording medium such as a CD-ROM or DVD-ROM.

[0054] Furthermore, the transmitting device 1 described above may be composed of one or more semiconductor chips. This semiconductor chip may be equipped with a CPU that executes a program describing the processing content that realizes each function of the transmitting device 1.

[0055] Thus, in this invention, when the LLch input is null, the null packet inserted takes advantage of the fact that the data packet has a fixed length, and introduces a null packet that is shorter than the data packet, such that it is 1 / (integer) of the data packet length. This makes it possible to control the generation of FEC blocks more precisely than in the conventional method, and reduces the delay during FEC block generation.

[0056] Although the embodiments described above are representative examples, it will be apparent to those skilled in the art that many modifications and substitutions are possible within the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited by the embodiments described above, and various modifications and changes are possible without departing from the scope of the claims. [Explanation of symbols]

[0057] 1. Transmitter 11 Hierarchical separation section 12-tier processing unit 13 Layered Synthesis Unit 14-hour frequency interleaved section 15 Pilot signal generation unit 16 TMCC signal generation section 17. Null insertion part 18 LDPC encoding section 19 OFDM Frame Components 20 OFDM Modulation Section 121 Error Correction Encoding Unit 122-bit interleaved section 123 Mapping section

Claims

1. A transmitting device that encodes and transmits data packets on a low-latency channel, If the aforementioned data packet is not input, a null insertion unit generates a null packet with the payload filled with nulls, An LDPC encoding unit performs LDPC encoding on the data packets and the null packets to generate fixed-length blocks, The system includes an OFDM frame constructor that assigns the aforementioned block to a low-latency channel carrier and modulates it using a predetermined modulation scheme to construct an OFDM frame, A transmitting device in which the size of the null packet is shorter than that of the data packet.

2. The transmitting device according to claim 1, wherein the size of the null packet is 1 / n of the size of the data packet, and is greater than or equal to the size of the header of the data packet, where n is an integer of 2 or more.

3. The size of the data area of ​​the aforementioned block and the size of the aforementioned data packet are the same in kilobytes. The LDPC encoding unit inserts the data packets and the null packets into the data areas constituting the block in the order of input, and if an L-byte null packet has already been inserted into the data area constituting the block, it inserts (K-L) bytes of data from the data packet into the data area, and inserts the remaining L bytes of data from the data packet into the beginning of the data area constituting the next block, as described in claim 1 or 2.

4. A program for causing a computer to function as the transmitting device described in claim 1.

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