Network Interface Device

JP7880357B2Active Publication Date: 2026-06-25XILINX INC

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
XILINX INC
Filing Date
2022-04-26
Publication Date
2026-06-25

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Abstract

The network interface device includes a data source, a data sink, and an interconnect configured to receive data from the data source and output data to the data sink. The interconnect includes a memory having memory cells, each memory cell having a width that matches a width of a bus segment. The memory is configured to receive a first write output having a width that corresponds to the width of the bus segment. The write output includes first data to be written to a first memory cell of the memory, the first data being from the data source.
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Claims

1. A network interface device, wherein the network interface device is Data source and Data sink and An interconnect configured to receive data from the data source and output data to the data sink, wherein the interconnect is An interconnect including a memory having memory cells, each memory cell having a width matching the width of a bus segment coupled to the memory cell, the memory being configured to receive a first write output having a width corresponding to the width of the bus segment, the first write output including first data to be written to a first memory cell of the memory, and the first data being from a data source, A network interface device comprising an interface having a width equal to the width of the bus segment, wherein the interface is configured to simultaneously receive data from multiple different data sources.

2. The network interface device according to claim 1, comprising one or more segmented buses connecting the data source and the data sink to the interconnect, wherein the segmented bus includes bus segments having the width of the bus segments.

3. The network interface device according to claim 1, wherein the memory is configured to output the first data in response to a read request from the data sink, and the output has the width of the bus segment.

4. The network interface device according to claim 1, wherein the interconnect includes a memory multiplexer configured to receive a plurality of requests, the plurality of requests including a plurality of read requests from a plurality of data sinks and a plurality of write requests from a plurality of data sinks, and the memory multiplexer is configured to determine which one or more of the requests to advance and which one or more of the requests to backpress.

5. The network interface device according to claim 4, wherein the memory multiplexer is configured to determine that two requests are for the same memory cell of the memory, and to determine which of the two requests to proceed based on which request is part of a larger set of requests.

6. The network interface device according to claim 1, wherein the interconnect includes a configurable interface for connecting the data source and the data sink to the interconnect, the configurable interface is configurable to provide one or more interfaces configured by a segmented bus, the size of each individual interface being equal to an integer multiple of the width of the bus segment, and the integer multiple being one or more.

7. The network interface device according to claim 6, wherein different of the individual interfaces of the configurable interface are configured to receive data for different data sinks.

8. The network interface device according to claim 6, wherein the total width of the configurable interface is equal to the total width of all bus segments of the bus.

9. The network interface device according to claim 1, comprising a write pipe configured to receive a first write request for the first data from the data source, associate the address of the first memory cell with the first data of the first write request, and provide the first write output.

10. The network interface device according to claim 9, wherein the write pipe includes a buffer for storing the first write output before the first write output is output by the write pipe.

11. The network interface device according to claim 1, comprising a read request pipe configured to receive a read request from the data sink and to associate the address of the memory cell of the memory from which the data is read with the read request.

12. The network interface device according to claim 1, wherein the data source is configured to output a capsule, the data sink is configured to receive a capsule, and the capsule includes data and routing information.

13. The network interface device according to claim 1, wherein each memory cell includes a random access memory having a port width that is the width of the bus segment.

14. A method in a network interface device, wherein the method is Receiving a first write output from the data source of the network interface device to the memory of the network interface device, the first write output having a width corresponding to the width of the bus segment, wherein the write output includes first data. Writing the first data to the first memory cell of the memory, wherein the first memory cell has a width that matches the width of the bus segment, A method wherein the network interface device comprises an interface having a width equal to the width of the bus segment, and the interface is configured to simultaneously receive data from multiple different data sources.