Post-polishing topography generation system and method for enhanced wafer manufacturing

Abstract

The computing device is programmed to store a model for transforming the shape map to simulate a portion of an assembly line, receive scan data of a first inspection of a product being assembled, generate a shape map from the scan data of the first inspection, run the model using the shape map as an input to generate a final shape map of the product, compare the final shape map to one or more thresholds, determine whether the final shape map exceeds at least one of the one or more thresholds, and cause the first machine to adjust if it is determined that the final shape map exceeds at least one of the one or more thresholds.

Description

Cross - reference to related applications

[0001] This application claims the priority of U.S. Provisional Patent Application No. 17 / 652,571, filed on February 25, 2022, the entire disclosure of which is incorporated herein by reference in its entirety.

Technical Field

[0002] This technical field generally relates to enhanced wafer manufacturing, and more specifically to enhanced wafer analysis using nanotopography.

Background Art

[0003] Semiconductor wafers, such as silicon wafers, are generally used as substrates in the manufacture of integrated circuit (IC) chips. Chip manufacturers require wafers with extremely flat and parallel surfaces so that they can manufacture the maximum number of chips from a single wafer. After being sliced from an ingot, wafers typically undergo grinding and polishing processes to improve specific surface characteristics such as flatness and parallelism.

[0004] To identify and address concerns regarding topology degradation, equipment and semiconductor material manufacturers consider the nanotopography of the wafer surface. For example, SEMI (Semiconductor Equipment and Materials International), an international industry group in the semiconductor industry, defines nanotopography as the deviation of the wafer surface at spatial wavelengths from approximately 0.2 mm to approximately 20 mm (SEMI Document 3089). This spatial wavelength is a value very close to the nanometer - scale surface features of a processed semiconductor wafer. Nanotopography measures the height deviation of the wafer surface and does not consider the thickness variation of the wafer as in conventional flatness measurements. Generally, two techniques, the light scattering method and the interference method, are used for nanotopography measurement. In these techniques, light reflected from the surface of a polished wafer is used to detect very small surface variations.

[0005] In the semiconductor industry, companies are competing to manufacture high-quality silicon wafers at low cost. Therefore, having a highly efficient manufacturing process that minimizes losses is crucial for competitive advantage. Manufacturing processes such as wire saw slicing and grinding create topographic features on the wafer, potentially leading to topographic degradation. Furthermore, common measurement tools used after these processes tend to be noisy. Additionally, the resulting surface roughness is often too high to use post-polishing tools. To avoid these problems, it is essential to closely monitor post-polishing maps (in-plane strain (IPD), nanotopography (NT), post-polishing shape maps, etc.) at each stage of silicon wafer manufacturing. However, since most post-polishing maps are only available at the final stage of manufacturing, the feedback process becomes highly inefficient.

[0006] In some systems, many wafers may be processed after grinding before problems are detected during the grinding process. Furthermore, each production line and grinder may have specific characteristics that differ from piece to piece. Therefore, a system is needed to analyze wafers to quickly and efficiently detect potential problems, thereby increasing efficiency while reducing material loss.

[0007] This background section aims to introduce readers to various aspects of the technology that may be relevant to the various aspects of this disclosure described and / or claimed below. This discussion is intended to provide readers with background information to better understand the various aspects of this disclosure. Therefore, these disclosures should be read in this context and should be understood as not being an endorsement of prior art. [Overview of the project]

[0008] In one embodiment, the computer device includes at least one processor (or "processor") that communicates with at least one memory device. The processor is programmed to store a shape map transformation model for simulating a portion of an assembly line in at least one memory device. The processor is also programmed to receive scan data of a first inspection of a product under assembly. The first inspection is performed at a first inspection station of the assembly line, following the first device of the assembly line. The processor is further programmed to generate a shape map from the scan data of the first inspection. Furthermore, the processor is programmed to run a model using the shape map as input to generate a final shape map of the product. Furthermore, the processor is programmed to compare the final shape map with one or more thresholds. Furthermore, the processor is programmed to determine whether the final shape map exceeds at least one of the one or more thresholds. If it is determined that the final shape map exceeds at least one of the one or more thresholds, the processor is programmed to adjust the first device.

[0009] In another embodiment, a method for analyzing an assembly line is performed by an arithmetic unit including at least one processor communicating with at least one memory device. This method includes storing a shape map transformation model for simulating a portion of the assembly line in at least one memory device. The method also includes receiving scan data of a first inspection of a product under assembly. The first inspection is performed at a first inspection station of the assembly line, following a first device on the assembly line. Furthermore, the method includes generating a shape map from the scan data of the first inspection. Furthermore, the method includes running a model using the shape map as input to generate a final shape map of the product. Furthermore, the method includes comparing the final shape map with one or more thresholds. Furthermore, the method includes determining whether the final shape map exceeds at least one of the one or more thresholds. If it is determined that the final shape map exceeds at least one of the one or more thresholds, the method includes adjusting the first device.

[0010] Various improvements exist to the features described in relation to the above embodiments. Furthermore, additional features can be incorporated into the above features. These improvements and additional features can exist individually or in any combination. For example, the various features described below in relation to any of the illustrated embodiments can be incorporated into any of the above features individually or in any combination. [Brief explanation of the drawing]

[0011] [Figure 1] This is a block diagram showing a semiconductor wafer processing system according to one embodiment. [Figure 2] Figure 1 shows a flowchart illustrating an example of the process of evaluating a wafer using the system shown in Figure 1. [Figure 3] This is a simplified block diagram of an example of a system for evaluating wafers using the process shown in Figure 2, according to the system shown in Figure 1. [Figure 4]This figure shows an example configuration of a client computer device as shown in Figure 3. [Figure 5] This figure shows an example of the configuration of the server system shown in Figure 3. [Figure 6] This figure shows an example of a line scan process performed by a measuring device. [Figure 7A] This figure further illustrates an example of the line scan process shown in Figure 6. [Figure 7B] This figure further illustrates an example of the line scan process shown in Figure 6. [Figure 8A] This is a side view of the wafer. [Figure 8B] This is a side view of the wafer. [Figure 9A] This is a top view of a wafer showing the scan lines obtained on the wafer. [Figure 9B] This is a top view of a wafer showing the scan lines obtained on the wafer. [Figure 10A] This paper demonstrates the use of a trained neural network model to convert the shape map after grinding into a predicted post-polishing NT map. [Figure 10B] This demonstrates the use of a trained neural network model to convert a GAPI RMS map into a predicted IPD map. [Figure 11A] An image of the wafer shape map is shown. [Figure 11B] Figure 11A shows an example of a graph comparing the predicted NT map with the actual image after grinding. [Figure 12A] An image of the wafer shape map is shown. [Figure 12B] Figure 12A shows an example of a graph comparing the predicted NT map with the actual image after grinding. [Figure 13A] An image of the wafer shape map is shown. [Figure 13B] Figure 13A shows an example of a graph comparing the predicted IPD map with the actual image after grinding.

[0012] Corresponding reference characters indicate corresponding parts throughout the several views of the drawings.

Best Mode for Carrying Out the Invention

[0013] The described embodiments relate to systems and methods for analyzing wafer data, and more particularly to analyzing the post - processed surface of a wafer to predict the post - processed surface of the wafer. More specifically, a wafer surface analysis model executed by a computing device: (1) determines the current state of the wafer, (2) predicts the post - processed state of the wafer based on the current state and the model, and (3) determines whether an adjustment to the grinder is necessary based on the post - processed state of the wafer and one or more predetermined thresholds. This system and method enable feedback of nanotopography in a shorter time and with higher accuracy compared to previous processes, recognize adjustments made to improve nanotopography, and enable implementation with a shorter delay time, thereby improving quality control and / or wafer yield.

[0014] Computer systems, such as wafer surface analysis computer devices and related computer systems, include a processor and a memory. However, the processor within the computer device referred to herein may refer to one or more processors, whether the processor is within one computing device or within multiple computing devices operating in parallel. Further, the memory within the computer device referred to herein may refer to one or more memories, whether the memory is within one computing device or within multiple computing devices operating in parallel.

[0015] The processor may include any programmable system, including a microcontroller, a reduced instruction set circuit (RISC), an application - specific integrated circuit (ASIC), a logic circuit, and other circuits or systems using a processor capable of performing the functions described herein. The above examples are merely illustrative and are not intended to limit the definition and / or meaning of the term "processor".

[0016] The term “database” may refer to a collection of data, a relational database management system (RDBMS), or both. As used herein, a database may include any collection of data, including hierarchical databases, relational databases, flat-file databases, object-relational databases, object-oriented databases, and any other structured collection of records or data stored in a computer system. The examples above are illustrative only and are not intended to limit the definition and / or meaning of the term database. Examples of RDBMS include, but are not limited to, Oracle® Database, MySQL, IBM® DB2, Microsoft® SQL Server, Sybase®, and PostgreSQL. However, any database that can use the systems and methods described herein may be used (Oracle is a registered trademark of Oracle Corporation, Redwood Shores, California; IBM is a registered trademark of International Business Machines Corporation, Armonk, New York; Microsoft is a registered trademark of Microsoft Corporation, Redmond, Washington; and Sybase is a registered trademark of Sybase, Dublin, California).

[0017] In one embodiment, the computer program is embodied on a computer-readable medium. In one example, the system runs on a single computer system without requiring a connection to a server computer. In a further embodiment, the system runs in a Windows® environment (Windows is a registered trademark of Microsoft Corporation in Redmond, Washington). In yet another embodiment, the system runs in a mainframe environment and a UNIX® server environment (UNIX is a registered trademark of X / Open Company Limited in Reading, Berkshire, UK). In yet another embodiment, the system runs in an iOS® environment (iOS is a registered trademark of Cisco Systems, Inc. in San Jose, California, USA). In yet another embodiment, the system runs in a Mac OS® environment (Mac OS is a registered trademark of Apple Inc. in Cupertino, California). In yet another embodiment, the system runs on the Android® OS (Android is a registered trademark of Google, Inc. in Mountain View, California). In yet another embodiment, the system runs on the Linux® OS (Linux is a registered trademark of Linus Torvalds in Boston, Massachusetts). This application is flexible and designed to run in a variety of different environments without compromising its core functionality. In some embodiments, the system includes multiple components distributed across multiple computing devices. One or more components are embodied in a computer-readable medium in the form of computer-executable instructions. The system and processes are not limited to the specific embodiments described herein. Furthermore, each system and each process component can be implemented separately and independently of the other components and processes described herein. Also, each component and process can be used in combination with other assembly packages and processes.

[0018] Any element or step described in the singular and proceeding with the words "a" or "an" should be understood not to exclude multiple elements or steps unless an exclusion is explicitly stated. Furthermore, any reference in this disclosure to "exemplary embodiments" or "one embodiment" is not intended to be construed as excluding the existence of additional embodiments that also incorporate the described features.

[0019] The terms “software” and “firmware” are interchangeable and include any computer program stored in memory for execution by a processor, including RAM memory, ROM memory, EPROM memory, EEPROM memory, and non-volatile RAM (NVRAM) memory. The memory types listed above are illustrative and therefore do not limit the types of memory that can be used to store computer programs.

[0020] The term "real-time" refers to at least one of the time a relevant event occurs, the time it takes to measure and collect given data, the time it takes to process the data, and the time it takes for the system to respond to an event and its environment. These activities and events occur virtually instantaneously.

[0021] The systems and processes are not limited to the specific embodiments described herein. Furthermore, each system and each process component can be implemented separately and independently of the other components and processes described herein. Also, each component and process can be used in combination with other assembly packages and processes.

[0022] Figure 1 shows a block diagram of a system 100 for processing semiconductor wafers. System 100 begins with a slicer 105 in the silicon wafer manufacturing process. In an exemplary embodiment, the slicer 105 is a wire saw that cuts a disc of silicon material.

[0023] After the slicer 105 slices the wafer, the wafer is analyzed by a first measuring device 110 that measures data to generate a wafer profile. At this point, the wafer has not been ground, etched, or polished. The first measuring device 110 provides measurement data from the ground wafer to a wafer surface analysis (WSA) computer device 115. In some embodiments, the first measuring device 110 uses a capacitance probe or a laser-based distance sensor to measure the wafer. In particular, the WAS computer device 115 uses the post-slicing shape data and GAPI RMS data to generate in-plane strain (IPD), nanotopography (NT), and shape distribution maps of the silicon wafer. As used herein, GAPI RMS refers to a shape-based matrix that is an index representing the smoothness of the wafer substrate.

[0024] GAPI RMS can be calculated by the WSA computer unit 115. First, the WSA computer unit 115 reads raw measurement data from a first measuring device 110 or the like. The raw measurement data includes thickness and bottom (or front) profile. The WSA computer unit 115 converts this raw data into multiple diameter line scan profiles. The number of diameter scan profiles can be 2, 4, 8, or more. The WSA computer unit 115 calculates the one that best fits the thickness plane using the least squares method. The WSA computer unit 115 calculates the raw shape diameter scan profile by adding half the thickness of the thickness best fit plane to the low profile. The WSA computer unit 115 smooths the raw shape diameter scan profiles by a moving average with a defined window size. The WSA computer unit 115 calculates the ideal shape diameter scan profile for each raw shape diameter scan profile by one-dimensional polynomial fitting. The WSA computer device 115 determines that the delta of the shape diameter scan profile is equal to the difference between the raw shape diameter scan profile and the ideal shape diameter scan profile.

[0025] The WSA computer device 115 calculates a weighted profile based on delta shape variation and slope change within a moving window defined along the diametrical direction. A threshold is also defined to detect high variation and slope change. Delta shape variation can be standard variation, variance, or range. Slope change means, for example, that the product of the left slope and the right slope is negative. GAPI represents the gap between the raw shape and the ideal shape, which is equal to the diameter of the delta shape multiplied by the weighted profile. GAPI RMS is the root mean square of the GAPI.

[0026] The WSA computer system 115 analyzes the wafer measurement data to determine the profile of the wafer after slicing. If the determined profile exceeds any of the quality thresholds, the WSA computer system 115 may determine that the slicer 105 or other equipment needs to be adjusted.

[0027] The next piece of equipment in system 100 is a grinder 120, which may be single-sided or double-sided. Simultaneous double-sided grinding grinds both sides of a wafer at the same time, producing a wafer with a highly planar surface. These grinders 120 use a wafer clamping device to hold the semiconductor wafer during grinding. This clamping device typically includes one set each of hydrostatic pads and grinding wheels. The pads and wheels are positioned opposite each other, holding the semiconductor wafer vertically between them. The hydrostatic pads form a fluid barrier between each pad and the wafer surface, holding the wafer without the hard pads physically contacting the wafer during grinding. This reduces the damage to the wafer that could be caused by physical clamping, and the wafer moves (rotates) tangentially to the pad surface, reducing friction. While this grinding process improves the flatness and / or parallelism of the ground wafer surface, it can degrade the topology of the wafer surface. Specifically, misalignment of the clamping surfaces of the hydrostatic pads and grinding wheels is known to cause such degradation. Polishing after grinding creates a highly reflective, mirror-like surface on the ground wafer, but it does not improve the degradation of the topology.

[0028] After the grinder 120 grinds the wafer, the wafer is analyzed by a second measuring device 125 to generate a profile of the ground wafer. At this point, the wafer has not been etched or polished. The second measuring device 125 provides the measuring data from the ground wafer to a wafer surface analysis (WSA) computer device 115. In some embodiments, the second measuring device 125 measures the wafer using a capacitance probe or a laser-based distance sensor. In particular, the WAS computer device 115 uses the post-ground shape and GAPI (gap between raw shape and ideal shape) RMS (root mean square) data to generate in-plane strain (IPD), nanotopography (NT), and shape distribution maps of the silicon wafer.

[0029] The WSA computer system 115 analyzes the wafer measurement data to determine the profile of the wafer after grinding. If the determined profile exceeds the quality threshold, the WSA computer system 115 may determine that the grinder 120 or other equipment needs to be adjusted.

[0030] The system 100 may include multiple grinders 120, each grinder 120 grinding a wafer, but each wafer is ground only once. In these embodiments, the WSA computer device 115 tracks the grinding results of each of the multiple grinders 120.

[0031] System 100 includes several post-grinding devices, such as an etching device 130 for etching the ground wafer, a surface measuring device 135 for measuring the flatness of the surface of the etched wafer, a polishing device 140 for polishing the etched wafer, and a nanotopography measuring device 145 for measuring the nanotopography of the polished wafer. In other embodiments, other devices may be included in System 100.

[0032] The WSA computer apparatus 115 includes a model of the apparatus in system 100, which simulates wafer etching, polishing, and possibly grinding based on wafer measurements, and predicts the wafer surface after polishing. The surface after polishing is similar to the surface measured by the nanotopography apparatus 145. As further described herein, the WSA computer apparatus 115 generates a model based on multiple historical data for multiple manufactured wafers. The historical data is based on comparisons of wafers with at least a first measurement apparatus 110 (after slicing) or a second measurement apparatus 125 (after grinding) and a nanotopography apparatus 145 (after polishing).

[0033] The WSA computer device 115 creates a model for each system 100 to be analyzed. For example, a factory may have multiple production lines for manufacturing wafers. For each production line, the WSA computer device 115 generates a separate model. In some embodiments, where multiple slicers 105 or grinders 120 use the same grinder post-processing, the WSA computer device 115 may use the same model.

[0034] Figure 2 is a flowchart illustrating an exemplary process 200 for evaluating a wafer using system 100 (shown in Figure 1). In the exemplary embodiment, the steps of process 200 are performed by a WSA computer device 115 (shown in Figure 1).

[0035] Prior to process 200, at least one neural network model is constructed. The neural network model is trained using multiple historical images. The first neural network model is trained to receive a post-grind or post-slice wafer shape map and determine a post-polishing NT map from the input shape map. The second neural network model is trained to receive a post-grind or post-slice wafer GAPI RMS map and determine the wafer IPD map. Both of these neural network models are trained using multiple historical images and a generative adversarial network (GAN).

[0036] The GAN architecture consists of a generative model for outputting novel, plausible synthetic images and a discriminative model for classifying images as either real (from the dataset) or fake (generated). The discriminative model is updated directly, while the generative model is updated via the discriminative model. Thus, the two models are trained simultaneously in an adversarial process in which the generator aims to deceive the discriminative, and the discriminative aims to more accurately identify fake images.

[0037] In the GAN models described herein, the generation of the output image is input-dependent, in this case the input is the source image. The discriminator includes both the source and target images and must determine whether the target is a reasonable transformation of the source image. The generator is trained by an adversarial loss that prompts it to produce a reasonable image in the target domain. The generator is also updated by an L1 loss measured between the generated image and the expected output image. This additional loss prompts the generative model to create a reasonable transformation of the source image. The input to the model is either 4-line scan data or 8-line scan data. Further discussion regarding model training is provided below.

[0038] The wafer processing 205 may include slicing by a slicer 105 and / or grinding by a grinder 120 (both shown in Figure 2). After processing 205, at least one of the first measuring device 110 and the second measuring device 125 (both shown in Figure 1) measures the ground wafer 210 and transmits the current post-processing measurement to the WSA computer device 115. The WSA computer device 115 calculates a GAPI RMS map from the current measurement and calculates a GAPI RMS map using a predefined algorithm.

[0039] The WSA computer device 115 executes the aforementioned neural network model to generate shape maps such as a post-polished NT map and / or IPD map. For the purposes of this disclosure, the neural network model can convert the shape map to a post-polished NT map, or the GAPI RMS map to an IPD map. Next, the WSA computer device 115 calculates predicted wafer attributes based on the shape map. These wafer attributes include, but are not limited to, the mean IPD, THA1010, and THA2525. THA1010 and THA2525 are nanotopography parameters calculated based on the nanotopography map. THA1010 records the difference between peaks and valleys in a 10 mm × 10 mm moving window, moves this across the entire wafer, and considers a specific percentile value of the recorded value as the THA1010 value. Percentile values ​​may vary and are usually specified by the end user. The THA2525 is similar to the THA1010, except that the window is a 25mm x 25mm square or a 25mm diameter circle. Wafer attributes predict the state of the wafer at the end of processing, as measured by the nanotopography measuring device 145.

[0040] The WSA computer device 115 compares wafer attributes to one or more predetermined thresholds. In an exemplary embodiment, the predetermined thresholds are requirements for a suitable surface of the wafer after polishing. In an exemplary embodiment, some of the predetermined thresholds and / or requirements are based on the preferences of one or more users from the wafer manufacturer and / or the customer purchasing the wafer.

[0041] If the wafer attributes are within acceptable limits, the WSA computer device 115 saves the data and moves on to the analysis of the next wafer. The saved wafer attributes can be used to improve the neural network and / or to detect one or more trends. If the wafer attributes are not within acceptable limits, the WSA computer device 115 issues a warning and may adjust one or more devices, such as the slicer 105, grinder 120, etching device 130, and polishing device 140. In some embodiments, the WSA computer device 115 adjusts the device directly. In other embodiments, the WSA computer device 115 instructs another device to adjust the device. In yet another embodiment, the WSA computer device 115 instructs the user to adjust the device.

[0042] The WSA computer system 115 determines that the wafer is within acceptable limits, but at the same time determines that one or more of the devices are no longer properly calibrated. In these embodiments, the WSA computer system 115 may determine, based on the current trend of post-processing inspections of multiple wafers, that a device is deviating from proper calibration. The WSA computer system 115 may recognize this trend and determine that calibration will be required after a certain number of uses or a certain period of time. In these embodiments, the WSA computer system 115 may determine the next planned downtime for the system 100. If the planned downtime is before the device is expected to deviate from proper calibration, the WSA computer system 115 may schedule the device calibration to occur during the planned downtime. The WSA computer system 115 may determine when the device is expected to produce wafers outside acceptable limits based on one or more predetermined thresholds, the amount of change in the post-processing results for each wafer, and a model.

[0043] The WSA computer system 115 generates a model based on multiple historical data, including past post-slicing measurements by the first measuring device 110, past post-grinding measurements by the second measuring device 125, and past post-polishing measurements by the nanotopography measuring device 145. In an exemplary embodiment, the WSA computer system 115 generates a model by comparing post-slicing / post-grinding wafer images with post-polishing wafer images to determine how the wafer changes as the system 100 processes it. In some embodiments, the WSA computer system 115 stores a trained general-purpose model for a specific production line (system 100) using historical inspection data from that production line. In other embodiments, the WSA computer system 115 generates a model entirely from the historical data of that production line. In yet another embodiment, the model is continuously updated based on measurement data from the nanotopography measuring device 145 of the production line in production. This allows the model to most accurately model the current production line (system 100). In other embodiments, the model is updated or calibrated only every six months or at other predetermined intervals. This embodiment is ideal when other devices in system 100 are not regularly changed or require recalibration. In some embodiments, whenever a device is replaced, calibrated, or otherwise modified, the model is updated and calibrated to match the current state of the production line.

[0044] System 100 and process 200 are described in the context of a semiconductor wafer manufacturing assembly line, but those skilled in the art will understand that this disclosure can also be used in other assembly lines. In these other embodiments, System 100 is considered an assembly line 100 for manufacturing a product. The assembly line includes a first apparatus 105, a first inspection station 110, a computer apparatus 115, a second apparatus 140, a second inspection station 145, and optionally a third apparatus 120, a third inspection station 125. In these other embodiments, the computer apparatus 115 stores a model for simulating a portion of the assembly line 100 in at least one memory device. The computer apparatus 115 receives scan data of a first inspection of the product being assembled. The first inspection is performed at the first inspection station 110 (or 125) in the assembly line 100, following the first apparatus 105 (or 120) in the assembly line 100. The computer device 115 uses the scan data as input to run the model and generate the final product profile and / or attributes.

[0045] The computer device 115 compares the final profile with one or more thresholds. The computer device 115 determines whether the final profile exceeds one or more tolerances by exceeding at least one of the thresholds. If it is determined that the final profile exceeds at least one of the thresholds, the computer device 115 causes the first device 105 (or 120) to adjust 240.

[0046] The computer device 115 may generate a model to simulate a portion of the assembly line 100 based on multiple inspection data from the assembly line 100. This model generates a final product profile that simulates the actual product profile when it reaches the second inspection station 145. In some further embodiments, the second inspection station 145 is located after the completion of the assembly line 100. In some embodiments, the multiple inspection data includes first multiple scan data of multiple individual products at the first inspection station 110 and second multiple scan data of multiple individual products at the second inspection station 145. In some further embodiments, the computer device 115 receives scan data of a second inspection of the product being assembled at the second inspection station 145. The computer device 115 compares the scan data of the second inspection with the final profile. The computer device 115 adjusts the model based on the comparison.

[0047] In another embodiment, the computer device 115 generates a model for simulating a portion of the assembly line 100. This model generates a final product profile and attributes that simulate the actual profile when the product reaches the final inspection station 145. The model can receive scan data from the first inspection station 110 after the first processing station 105, and / or scan data from the second inspection station 125 after the second processing station 120. The computer device 115 then generates a product profile based on the inputs from both inspection stations 110 and 125.

[0048] If the final profile is determined to exceed at least one of one or more thresholds, the computer device 115 analyzes multiple past inspections to determine a trend. Based on that trend, the computer device 115 predicts the likelihood that subsequent inspections of the product will exceed at least one of one or more thresholds. Based on that trend, the computer device 115 adjusts the first device 105 or the second device 120.

[0049] Figure 3 is a simplified block diagram of an example of a system 300 for evaluating a wafer using the process 200 shown in Figure 2, according to the system 100 shown in Figure 1. In an exemplary embodiment, system 300 is used to analyze a wafer after grinding to determine whether it will be within acceptable limits after polishing. Furthermore, system 300 is a real-time data analysis and classification computer system that includes a wafer surface analysis (WSA) computer device 310 (also called a WSA server). The WSA computer device 310 is configured to analyze the wafer and predict its future state based on the analysis.

[0050] The measuring device 305 is configured to scan the surface of a wafer and generate a profile of that wafer. More specifically, the measuring device 305 scans the nanotopography of the wafer and communicates with the WSA computer device 310. The measuring device 305 connects to the WSA computer device 310 via a variety of wired or wireless interfaces, such as networks like local area networks (LANs) and wide area networks (WANs), dial-in connections, cable modems, internet connections, wireless, and special high-speed integrated digital communication network (ISDN) lines. The measuring device 305 receives data about the wafer surface and reports that data to the WSA computer device 310. In other embodiments, the measuring device 305 communicates with one or more client systems 325, which transfer the measurement data to the WSA computer device 310 in real time or near real time. In some embodiments, the first measuring device 305 measures one side of the wafer and the second measuring device 305 measures the other side of the wafer. In exemplary embodiments, the measuring device 305 is similar to the first measuring device 110 (shown in Figure 1), the second measuring device 125 (shown in Figure 1), and the nanotopography measuring device 145 (shown in Figure 1).

[0051] As described in more detail above, the WSA server 310 is programmed to analyze the wafer to predict the nanotopography of the wafer surface after polishing, so that the system 300 can quickly respond to changes that would cause the wafer to go outside the acceptable range. The WSA server 310 is programmed to (1) determine the current state of the wafer, (2) predict the post-processing state of the wafer based on the current state and model, and (3) determine whether adjustments are needed to the wafer processing apparatus based on the post-processing state of the wafer and one or more predetermined thresholds. In an exemplary embodiment, the WSA server 310 is analogous to the wafer surface analysis computer apparatus 115 (shown in Figure 1).

[0052] The client system 325 is a computer including a web browser or software application, which enables the client system 325 to communicate with the WSA server 310 using the Internet, a local area network (LAN), or a wide area network (WAN). In some embodiments, the client system 325 is connected to the Internet via many interfaces, including, but not limited to, the Internet, LAN, WAN, Integrated Digital Networking (ISDN), dial-up connection, DSL (Digital Subscriber Line), cellular connection, satellite connection, and cable modem. The client system 325 is any device that can access a network such as the Internet, and includes, but is not limited to, a desktop computer, laptop computer, personal digital assistant (PDA), mobile phone, smartphone, tablet, phablet, or other web-based connectable device.

[0053] The database server 315 is communicatively coupled to the database 320, which stores data. In one embodiment, the database 320 is a database containing historical data and models. In some embodiments, the database 320 is stored remotely from the WSA server 310. In some embodiments, the database 320 is distributed. In an exemplary embodiment, a person can access the database 320 via the client system 325 by logging on to the WSA server 310.

[0054] Figure 4 shows an example configuration of client system 325 (shown in Figure 3). User computer device 402 is operated by user 401. User computer device 402 includes, but is not limited to, a first measuring device 110, a second measuring device 125, a wafer surface analysis computer device 115, a nanotopography measuring device 145 (all shown in Figure 1), a measuring device 305, a WSA computer device 310, and client system 325 (all shown in Figure 3). User computer device 402 includes a processor 405 for executing instructions. In some embodiments, executable instructions are stored in a memory area 410. The processor 405 may include one or more processing units (e.g., a multi-core configuration). The memory area 410 is any device capable of storing and retrieving information such as executable instructions and / or transaction data. The memory area 410 may include one or more computer-readable media.

[0055] The user computer device 402 also includes at least one media output component 415 for presenting information to the user 401. The media output component 415 is any component capable of transmitting information to the user 401. In some embodiments, the media output component 415 includes an output adapter (not shown), such as a video adapter and / or an audio adapter. The output adapter is operably coupled to the processor 405 and can be operably coupled to an output device, such as a display device (e.g., a cathode ray tube (CRT), liquid crystal display (LCD), light-emitting diode (LED) display, or "electronic ink" display) or an audio output device (e.g., a speaker or headphones). In some embodiments, the media output component 415 is configured to present a graphical user interface (e.g., a web browser and / or a client application) to the user 401. The graphical user interface may include, for example, an interface for displaying the results of analysis of one or more wafers. In some embodiments, the user computer device 402 includes an input device 420 for receiving input from the user 401. User 401 can use the input device 420 to select, for example, a wafer on which to display analysis results. The input device 420 may include, for example, a keyboard, pointing device, mouse, stylus, touch-sensitive panel (e.g., touchpad or touchscreen), gyroscope, accelerometer, position detector, biometric input device, and / or audio input device. A single component, such as a touchscreen, may function as both an output device and an input device 420 for the media output component 415.

[0056] The user computer device 402 also includes a communication interface 425 and may be coupled to a remote device such as a WSA server 310 (shown in Figure 3) for communication. The communication interface 425 may include, for example, a wired or wireless network adapter and / or a wireless data transceiver for use in a mobile communication network.

[0057] The memory area 410 stores computer-readable instructions, for example, to provide a user interface to user 401 via media output component 415 and optionally to receive and process input from input device 420. The user interface may include, for example, a web browser and / or a client application. The web browser allows users, such as user 401, to view and interact with media and other information typically embedded in web pages or websites from the WSA server 310. The client application allows user 401 to interact with, for example, the WSA server 310. For example, instructions may be stored by a cloud service, and the output of executing those instructions may be sent to media output component 415.

[0058] The processor 405 executes computer-executable instructions for carrying out aspects of the present disclosure. In some embodiments, the processor 405 is converted into a special-purpose microprocessor by executing computer-executable instructions or by being programmed in any other way.

[0059] Figure 5 shows an example configuration of the server system 310 shown in Figure 3. The server computer device 501 includes, but is not limited to, the WSA computer device 115 (shown in Figure 1), the database server 315, and the WSA server 310 (both shown in Figure 3). The server computer device 501 also includes a processor 505 for executing instructions. Instructions may be stored in the memory area 510. The processor 505 may include one or more processing units (e.g., a multi-core configuration).

[0060] The processor 505 is operably coupled with a communication interface 515 so that the server computer device 501 can communicate with remote devices such as another server computer device 501, another WSA server 310, or a client system 325 (shown in Figure 3). For example, as shown in Figure 3, the communication interface 515 may receive requests from the client system 325 over the internet.

[0061] The processor 505 may also be operably coupled to a storage device 534. The storage device 534 is any computer-operated hardware suitable for storing and / or retrieving data, such as data related to the database 320 (shown in Figure 3). In some embodiments, the storage device 534 is integrated into a server computer device 501. For example, the server computer device 501 may include one or more hard disk drives as the storage device 534. In other embodiments, the storage device 534 is external to the server computer device 501 and may be accessed by multiple server computer devices 501. For example, the storage device 534 may include a storage area network (SAN), a network-attached storage (NAS) system, and / or multiple storage units such as hard disks and / or solid-state disks in a redundant array (RAID) configuration of low-cost disks.

[0062] The processor 505 may be operably coupled to the storage device 534 via a storage interface 520. The storage interface 520 is any component that provides the processor 505 with access to the storage device 534. The storage interface 520 may include, for example, an Advanced Technology Attachment (ATA) adapter, a Serial ATA (SATA) adapter, a Small Computer System Interface (SCSI) adapter, a RAID controller, a SAN adapter, a network adapter, and / or any other component that provides the processor 505 with access to the storage device 534.

[0063] The processor 505 executes computer-executable instructions for carrying out aspects of the present disclosure. In some embodiments, the processor 505 is converted into a special-purpose microprocessor by executing computer-executable instructions or by being programmed in any other way. For example, the processor 505 is programmed with instructions as illustrated in Figure 2.

[0064] Figure 6 shows an example of a line scan process 600 performed by a measuring device 305 (shown in Figure 3). In an exemplary embodiment, process 600 is performed by a first measuring device 110, a second measuring device 125, and a nanotopography measuring device 145 as part of a system 100 (all shown in Figure 1), and process 200 (shown in Figure 2) is performed.

[0065] According to the line scan process 600, the wafer W is supported by one or more support pins 603 that contact a first surface 605A of the wafer. As shown in the comparison between the shape of the wafer in a weightless state (shown in reference no. 607) and the shape of the wafer in a supported state (shown in reference no. 609), the shape of the supported wafer 609 is deflected as a function of gravity and the mass of the wafer W. The measuring device 305 includes a first capacitance sensor 621A for measuring multiple distances (e.g., "distance-B") between a first sensor 621A and a first surface 605A (e.g., the front surface) along the diameter of the supported wafer 609. Similarly, the measuring device 305 includes a second capacitance sensor 621B for measuring multiple distances (e.g., "distance-F") between a second sensor 621B and a second surface 605B (e.g., the back surface) along the diameter of the supported wafer 609. The obtained data includes a line scan dataset corresponding to the diameter. The line scan dataset consists of multiple distances measured by a first sensor 621A along the diameter of the supported wafer 609 and multiple distances measured by a second sensor 621B along the diameter of the supported wafer 609. The line scan dataset shows the wafer profile along the diameter.

[0066] Figures 7A and 7B further illustrate an exemplary line scan process 600 (shown in Figure 6). Figures 7A and 7B show the line scan process 600 performed by the measuring device 305 to acquire multiple line scan datasets showing a profile of a wafer along a particular diameter. As shown in Figure 7A, a first line scan (indicated by arrow 701) is performed along a first diameter of the wafer. In particular, the first sensor 621A is moved in a plane above the first surface 605A in a first direction along the first diameter of the wafer. The first sensor 621A measures the distance between the first sensor 621A and the first surface 605A of the wafer at predetermined intervals (i.e., pitch R, measurement frequency). The predetermined intervals are indicated by hatching marks on the surface of the wafer W in Figure 7A. For example, the first sensor 621A may measure the distance at intervals of 1 or 2 mm along the first diameter of the wafer. The second sensor 621B similarly moves in the plane beneath the second surface 605B in the first direction and measures the distance between the second sensor 621B and the second surface 605B along the first diameter of the wafer. The first diameter of the wafer may be defined as a function of a reference point. For example, in the illustrated process, the first diameter passes through a notch N located on the outer circumference of the wafer.

[0067] As illustrated in Figure 7B, after the first line scan 701 is completed, the wafer W rotates (indicated by arrow 709). Specifically, the rotating stage 705, located below the support pin 603, rises and lifts the wafer W to a position above the support pin 603 (indicated by reference numeral 707). The rotating stage rotates while supporting the wafer in the raised position 707. As a result, the wafer rotates by several degrees (θ). The rotating stage 705 descends, and the rotated wafer is repositioned on the support pin 603. The position of the support pin 603 relative to the second surface of the wafer is shown by dashed lines in Figures 7A and 7B. Next, a line scan along the second diameter of the wafer (indicated by arrow 715) is performed. According to the illustrated process, the first and second sensors 621A and 621B are moved in the planes corresponding to the first and second surfaces 605A and 605B, respectively, in the second direction opposite to the first direction along the second diameter of the wafer. As described above in relation to the first line scan 701, the first and second sensors 621A and 621B measure the distance between the sensors 621A and 621B and the first and second surfaces 605A and 605B of the wafer at predetermined intervals along the second diameter of the wafer, respectively. The rotation 709 and line scan operations 701 and 705 are repeated to acquire each of the multiple line scan data sets.

[0068] The measuring device 305 preferably uses a self-mass compensation algorithm to determine the wafer shape in a weightless state 607. Self-mass compensation determines the wafer shape as a function of line scan data set, wafer density, elastic constants, wafer diameter, and the position of the support pins 603. In one embodiment, the measuring device 305 measures one or more wafer parameters based on the wafer shape. The wafer parameters may include one or more of warp, waviness, TTV (Total Thickness Variation), and / or GBIR (Global Backside Ideal Range).

[0069] Referring to Figure 8A, warp and waviness are generally determined with respect to a reference plane. The reference plane is defined as a function of the contact points between the support pins 603 and the wafer surface 605A. Specifically, warp is defined as the absolute value of the difference between the maximum and minimum deviations of the central region from the reference plane. The central region is the locus of points equidistant from the front 605B and back 605A of the wafer. Warp is defined as the amount of deviation from the reference plane at the center of the wafer. Referring to Figure 8B, GBIR and TTV reflect the linear thickness variation of the wafer and can be calculated based on the difference between the maximum and minimum distances from the wafer surface to the reference plane. For example, the measuring device 305 can acquire four line scan data sets as illustrated in Figure 9A, or eight line scan data sets as illustrated in Figure 9B. Each line scan data set shows the diametrical profile of the wafer.

[0070] Referring to the system 100 shown in Figure 1, data acquired by measuring devices 110, 125, and 145 to measure the nanotopography of a wafer ground by grinder 120 is transmitted to WSA computer device 115. For example, line scan data sets and / or determined wafer shapes may be transmitted to WSA computer device 115. WSA computer device 115 receives the scan data and executes computer executable instructions to perform a number of operations for processing the received scan data, as described herein. In particular, WSA computer device 115 predicts the nanotopography of the wafer after grinding based on the received scan data. In some embodiments, WSA computer device 115 determines grind parameters based on the predicted nanotopography of the wafer. The operation of grinder 120 is adjusted accordingly.

[0071] The WSA computer device 115 may access a feedback program for processing the received scan data. The received scan data may include line scan data sets and / or the determined wafer shape of the polished wafer. In particular, the WSA computer device 115 predicts the nanotopography of the wafer after polishing based on the received warpage data. When the first measuring device 110 or the second measuring device 125 measures the wafer, the wafer has not yet been polished, so the nanotopography of the wafer is predicted rather than actually measured. Based on the predicted nanotopography of the wafer, the WSA computer device 115 determines one or more grind parameters. In one embodiment, the WSA computer device 115 determines a shift parameter. The shift parameter indicates the magnitude and direction of movement of a pair of grind wheels to reduce the degradation of the nanotopography caused by misalignment of the grind wheels. In another embodiment, the WSA computer device 115 additionally or alternatively determines a tilt parameter. The tilt parameter indicates the alignment angle of a pair of grind wheels relative to the wafer, in order to reduce the degradation of nanotopography caused by misalignment of the grind wheels.

[0072] Based on the determined parameters, the operation of the grinder 120 or other station is adjusted. For example, in the case of the grinder 120, the grind wheel may be adjusted as specified by the determined shift and / or tilt parameters. In one embodiment, the grind wheel is adjusted as a function of the determined shift and / or tilt parameters and a predefined compensation amount. In one embodiment, the grinder 120 is configured to receive the determined grind parameters and adjust one or more components of the grinder 120 as a function of the determined grind parameters. In another embodiment, the determined grind parameters are provided to the operator, and the operator configures the grinder 120 to adjust one or more components of the grinder 120 as a function of the determined grind parameters.

[0073] Figure 10A shows the use of a trained neural network model to convert a grinded shape map to a predicted polished NT map. Figure 10B shows the use of a trained neural network model to convert a GAPI RMS map to a predicted IPD map. A GAN AI model 1005, which is a neural network or other artificial intelligence or machine learning-based model, receives an input image 1010 and outputs a predicted output image 1015. The input image 1010 may include a shape map as shown in Figure 10A, or a GAPI RMS map as shown in Figure 10B.

[0074] The GAN AI model 1005 is trained on a large dataset to correlate input data 1010 to an output map 1015. In the first example shown in Figure 10A, post-grind (or post-slice) column data, such as a 4-line scan or an 8-line scan, is acquired by a first measuring device 110 or a second measuring device 125 (both shown in Figure 1). The line data is used to create a shape map. The shape map is used as the input image 1010 to the model 1005. The model 1005 outputs a predicted post-polishing nanotopography (NT) map as the output image 1015. In some embodiments, the trained model 1005 provides a correlation between the post-grind 4-line scan data or 8-line scan data 1010 and the NT map 1015 with an R² of approximately 80%.

[0075] In the second example shown in Figure 10B, the GAPI RMS map is acquired by either the first measuring device 110 or the second measuring device 125 (both shown in Figure 1). The GAPI RMS map is used as the input image 1010 to the model 1005. The model 1005 outputs an in-plane distortion (IPD) map based on the predicted shape as the output image 1015. In some embodiments, the trained model 1005 provides a correlation between the GAPI RMS map 1010 and the IPD map 1015 with R² of approximately 90%.

[0076] Once both the NT map and the IPD map are available, the WSA computer apparatus 310 can calculate various parameters, including (but not limited to) THA1010, THA2525, and average IPD. Using these parameters, the WSA computer apparatus 310 can optimize the grinding, slicing, and polishing processes during silicon wafer manufacturing.

[0077] Figure 11A shows images of wafer shape maps. The first image is the input image 1105, specifically the smooth dataset map after grinding. The second image is the actual image (real picture) 1110, which is the actual measurement wafer after grinding. The ground actual image 1110 may be measured by a nanotopography measurement device 145 (shown in Figure 1). The third image is the predicted NT map 1115.

[0078] Figure 11B shows an example graph comparing the actual image 1110 and the predicted NT map 1115 after grinding (both shown in Figure 11A). In this example, TH2525 is calculated for both the actual image 1110 and the predicted NT map 1115 after grinding. The graph in Figure 11B shows the correlation between the actual image 1110 and the predicted NT map 1115 after grinding, based on the calculated TH2525. The correlation plot shows that the R-squared value is approximately 0.788.

[0079] Figure 12A shows images of wafer shape maps. The first image is the input image 1205, specifically the filtered post-grind dataset map. The second image is the actual post-grind image 1210, which is the actual measurement wafer after polishing. The actual post-grind image 1210 may be measured by a nanotopography measurement device 145 (shown in Figure 1). The third image is the predicted NT map 1215.

[0080] Figure 12B shows an example graph comparing the actual image 1210 and the predicted NT map 1215 after grinding (both shown in Figure 12A). In this example, TH2525 is calculated for both the actual image 1210 and the predicted NT map 1215 after grinding. The graph in Figure 12B shows the correlation between the actual image 1210 and the predicted NT map 1215 after grinding based on the calculated TH2525. The correlation plot shows that the R-squared value is approximately 0.829.

[0081] Figure 13A shows images of wafer shape maps. The first image is the input image 1305, specifically the GAPI RMS map. The second image is the actual image after grinding 1310, which is the actual measurement wafer after polishing. The actual image after grinding 1210 may be measured by a nanotopography measurement device 145 (shown in Figure 1). The third image is the predicted IPD map 1315.

[0082] Figure 13B shows an example graph comparing the actual image 1210 and the predicted IPD map 1315 after grinding (both shown in Figure 13A). In this example, TH2525 is calculated for both the actual image 1310 and the predicted IPD map 1315 after grinding. The graph in Figure 13B shows the correlation between the actual image 1310 and the predicted IPD map 1315 after grinding based on the calculated IPD. The correlation plot shows that the R-squared value is approximately 0.930.

[0083] A computer device such as the wafer surface analysis computer device 115 (shown in Figure 1) is configured to communicate with at least one processor 505 and at least one memory device 510 (both shown in Figure 50). The WSA computer device 115 is programmed to store a model for converting shape maps to simulate a portion of the assembly line 100 (shown in Figure 1) in at least one memory device 510. The WSA computer device 115 receives scan data of the first inspection of the product under assembly. The first inspection is performed at a first inspection station (also called the first measuring device 110; this may be the first measuring device 110 or the second measuring device 125 (both shown in Figure 1)). The first inspection station is located in the assembly line 100, following the first device 105 or 120 (both shown in Figure 1) in the assembly line 100.

[0084] The WSA computer device 115 also generates a shape map from the scan data of the first inspection, runs a model using the shape map as input, and generates a final shape map of the product. The WSA computer device 115 compares the final shape map with one or more thresholds to determine whether the final shape map exceeds at least one of the one or more thresholds. If it is determined that the final shape map exceeds at least one of the one or more thresholds, the WSA computer device 115 adjusts the first device.

[0085] The WSA computer device 115 can also calculate one or more product attributes from the final shape map. The WSA computer device 115 compares one or more product attributes to one or more thresholds. If one or more product attributes exceed one or more thresholds, the WSA computer device 115 adjusts the first device.

[0086] The shape map is preferably one of the post-grind shape map and the GAPI RMS (root mean square) map. The final shape map is then one of the post-polishing nanotopography map and the in-plane strain (IPD) map, respectively. The model is a generative adversarial network (GAN) artificial intelligence model trained on historical images of partially processed and fully processed products. This model converts the input shape map into a simulation of the final product shape map.

[0087] The first shape map is the first shape map, and the final shape map is the first final shape map. In these embodiments, the WSA computer device 115 generates a second shape map from scan data. The second shape map is generated in a different way than the first shape map. The WSA computer device 115 runs the model using the second shape map as input to generate a second final shape map of the product. The WSA computer device 115 calculates one or more product attributes from the first final shape map and the second final shape map. The WSA computer device 115 compares one or more product attributes to one or more thresholds. If one or more product attributes exceed one or more thresholds, the WSA computer device 115 causes the first device to adjust. In these embodiments, the first shape map is the shape map after grinding, the first final shape map is the nanotopography map after polishing, the second shape map is the GAPI RMS (root mean square) map, and the second final shape map is the in-plane strain (IPD) map.

[0088] The scan data is one of either four-line scan data or eight-line scan data of the product. The product is the semiconductor wafer described above, and the first device is either a grinder or a slicer. The first inspection station includes a nanotopography measuring device.

[0089] The WSA computer device 115 generates one or more adjustments for the first device based on comparing the final shape map with one or more thresholds and models. The WSA computer device 115 sends one or more adjustments to the user and at least one of the first device.

[0090] If the final shape map is determined to exceed at least one of one or more thresholds, the WSA computer device 115 analyzes multiple past inspections to determine a trend. Then, based on that trend, the WSA computer device 115 predicts whether subsequent inspections of the product are likely to exceed at least one of one or more thresholds. Furthermore, the WSA computer device 115 adjusts the first device based on the trend.

[0091] At least one of the technical solutions that this system enables to address technical problems may include: (i) improved wafer surface analysis, (ii) reduced material loss due to malfunction or improper alignment, (iii) increased wafer analysis speed, (iv) increased wafer analysis accuracy, (v) reduced unnecessary adjustments to the grinder, (vi) reduced false positives and false negatives, and (vii) state-of-the-art analysis calibrated to each individual production line.

[0092] The methods performed by a computer may include additional, fewer, or alternative actions, including those described elsewhere in this Specified

[0093] Furthermore, the computer system may include additional, fewer, or alternative functions, including those described elsewhere in this specification. The computer system may include or be implemented by or through non-temporary computer-readable media or computer-executable instructions stored on such media.

[0094] The processor or processing element may be trained using supervised or unsupervised machine learning, and the machine learning program may employ a neural network which is a convolutional neural network, a deep learning neural network, a reinforcement or reinforcement learning module or program, or a combined learning module or program which learns in two or more areas of interest or domains. Machine learning may include identifying and recognizing patterns in existing data to facilitate prediction of subsequent data. A model may be built on example inputs to make effective and reliable predictions for novel inputs.

[0095] Furthermore, or alternatively, machine learning programs may be trained by inputting sample datasets or specific data, such as images, statistics and information on the subject, historical estimates, and / or actual repair costs. Machine learning programs may utilize deep learning algorithms, primarily focused on pattern recognition, and may be trained after processing multiple examples. Machine learning programs may include, individually or in combination, Bayesian program learning (BPL), speech recognition and synthesis, image or object recognition, optical character recognition, and / or natural language processing. Machine learning programs may also include natural language processing, semantic analysis, automated reasoning, and / or machine learning.

[0096] Supervised and unsupervised machine learning techniques may be used. In supervised machine learning, a processing element may take input examples and their associated outputs and attempt to discover general rules that map inputs to outputs, so that when new inputs are subsequently provided, the processing element can accurately predict the exact output based on the discovered rules. In unsupervised machine learning, a processing element may be required to find its own structure from unlabeled input examples. In one embodiment, machine learning techniques may be used to extract data about the nanotopography of a wafer surface to predict future states.

[0097] Based on these analyses, processing elements may learn how to identify characteristics and patterns that can be applied to the analysis of image data, model data, and / or other data. For example, processing elements may learn how to identify trends that appear before a grinder becomes misaligned, based on a comparison of measurements after grinding and polishing. Processing elements may also learn how to identify less obvious trends, such as trends that appear before a grinder becomes misaligned, based on collected scan data.

[0098] The methods and systems can be implemented using engineering techniques including computer programming or computer software, firmware, hardware, or any combination or subset thereof. As disclosed above, at least one technical problem in prior systems is the need for a cost-effective and reliable system for analyzing data to predict nanotopography. The systems and methods described herein address this technical problem. Furthermore, at least one technical solution that overcomes the technical problem with this system may include: (i) improved wafer surface analysis, (ii) reduced material loss due to malfunction or improper alignment, (iii) increased wafer analysis speed, (iv) increased wafer analysis accuracy, and (v) state-of-the-art analysis calibrated for each individual production line.

[0099] The above-described method and system can be implemented using engineering techniques including computer programming or computer software, firmware, hardware, or any combination or subset thereof, in which case the technical effect is achieved by performing at least one of the following steps: (a) Store a model for simulating a portion of an assembly line in at least one memory device. b) Receive scan data of the first inspection of a product under assembly. The first inspection is positioned at the first inspection station of the assembly line, following the first device of the assembly line. c) Run the model using the scan data as input to generate a final profile of the product. d) Compare the final profile with one or more thresholds. e) Determine whether the final profile exceeds at least one of the one or more thresholds. f) If it is determined that the final profile exceeds at least one of the one or more thresholds, adjust the first device. g) Generate a model for simulating a portion of an assembly line based on multiple inspection data from that assembly line. h) receive scan data of the second inspection of the product being assembled at the second inspection station. i) compare the scan data of the second inspection with the final profile. j) adjust the model based on the comparison. k) generate one or more adjustments to the first device based on the comparison of the final profile with one or more thresholds and the model. l) send one or more adjustments to the user and at least one of the first device.m) If it is determined that the final profile exceeds at least one of one or more thresholds, at least one of the following steps is performed: i) Analyze multiple past inspections to determine the trend. ii) Predict whether subsequent inspections of the product are likely to exceed at least one of one or more thresholds based on that trend. iii) Adjust the first device based on that trend.

[0100] These methods can be implemented via one or more local or remote processors, transceivers, servers, and / or sensors (such as processors, transceivers, servers, and / or sensors mounted on a vehicle or mobile device, or associated with a smart infrastructure or remote server), and / or via non-temporary computer-readable media or computer-executable instructions stored on media. Furthermore, the computer systems described herein may include additional, reduced, or alternative functions, including those described elsewhere herein. The computer systems described herein may include, or be implemented via, non-temporary computer-readable media or computer-executable instructions stored on media.

[0101] As used herein, the term “non-temporary computer-readable medium” is intended to represent any tangible computer-based device implemented in any way or technique for the short-term and long-term storage of information, such as computer-readable instructions, data structures, program modules and submodules, or other data within any device. Accordingly, the methods described herein can be encoded as executable instructions into tangible, non-temporary computer-readable medium (including, but not limited to, storage devices and / or memory devices). When such instructions are executed by a processor, they cause the processor to execute at least a portion of the methods described herein. Furthermore, as used herein, the term “non-permanent computer-readable medium” includes volatile and non-volatile media, and removable and firmware, physical and virtual storage, CD-ROMs, DVDs, other digital sources such as networks and the internet, and digital means not yet developed (with the sole exception of temporary propagated signals).

[0102] This specification uses examples to disclose various embodiments, including the best mode, and to enable those skilled in the art to implement various embodiments, including the creation and use of any device or system and the execution of the incorporated methods. The patentable scope of the disclosure is defined by the claims and may include other examples that are conceivable to those skilled in the art. Such other examples are intended to be within the scope of the claims if they have structural elements that are not different from the language of the claims, or if they contain equivalent structural elements that are not substantially different from the language of the claims.

[0103] When introducing elements of this disclosure or its embodiments, the articles “a,” “an,” “the,” and “said” mean that there is one or more of those elements. The terms “comprising,” “including,” “containing,” and “having” are comprehensive and mean that there may be additional elements other than those listed. The use of terms indicating a particular direction (e.g., “top,” “bottom,” “side,” etc.) is for explanatory convenience and does not require a particular orientation of the article being described.

[0104] Because various modifications can be made to the above structure and method without departing from the scope of disclosure, all matters described above and shown in the attached drawings should be construed as illustrative and not limiting.

Claims

1. A computer device including at least one processor that communicates with at least one memory device, the at least one processor is At least one memory device stores a shape map transformation model for simulating a portion of an assembly line, where the model is a generative adversarial network (GAN) artificial intelligence model; Scan data of the first inspection of the product under assembly is received, where the first inspection is performed at a first inspection station on the assembly line, following a first piece of equipment on the assembly line, and the first piece of equipment is a grinder; A shape map is generated from the scan data of the first inspection; Run the model with the shape map as input to generate the final shape map of the product; Compare the final shape map to one or more thresholds; Determine whether the final shape map exceeds at least one of one or more thresholds; and, If the final shape map is determined to exceed at least one of one or more thresholds, the grinder will be adjusted; A computer device programmed in such a way.

2. At least one processor, further, Calculate one or more product attributes from the final shape map; Compare one or more product attributes with one or more thresholds; and, If one or more product attributes exceed one or more thresholds, the first device is adjusted; A computer device according to claim 1, programmed in such a manner.

3. The shape map is the shape map after grinding. The computer apparatus according to claim 1, wherein the final shape map is a nanotopography map after polishing.

4. The shape map is a GAPI RMS (Root Mean Square) map. The computer apparatus according to claim 1, wherein the final shape map is an in-plane distortion (IPD) map.

5. The computer device according to claim 1, wherein the model converts an input shape map into a simulation of the shape map of the final product.

6. The shape map is the first shape map, The final shape map is the first final shape map, At least one processor, further, A second shape map is generated from the scan data, and the second shape map is generated in a different way from the first shape map; and, The computer device according to claim 1, which is programmed to run a model with a second shape map as input and generate a second final shape map of the product.

7. At least one processor, further, Calculate one or more product attributes from the first final shape map and the second final shape map; Compare one or more product attributes with one or more thresholds; and, The computer device according to claim 6, which is programmed to adjust the first device if one or more product attributes exceed one or more thresholds.

8. The first shape map is the shape map after grinding. The first final shape map is the nanotopography map after polishing. The second shape map is the GAPI RMS (Root Mean Square) map. The computer apparatus according to claim 6, wherein the second final shape map is an in-plane distortion (IPD) map.

9. The computer device according to claim 1, wherein the scan data is one of four line scan data or eight line scan data of the product.

10. The computer device according to claim 1, wherein the product is a semiconductor wafer.

11. The first device is one of a grinder or a slicer, The first inspection station is a computer device according to claim 10, which includes a nanotopography measuring device.

12. At least one processor, further, Based on comparing the final shape map with one or more thresholds and models, one or more adjustments are generated for the first apparatus; and, A computer device according to claim 1, programmed to transmit one or more adjustments to a user and at least one of the first devices.

13. If the final shape map is determined to exceed at least one of one or more thresholds, at least one processor further: Analyze multiple past tests to determine trends; Based on that trend, we predict that subsequent inspections of the product will likely exceed at least one of one or more thresholds; and, A computer device according to claim 1, programmed to adjust the first device based on that trend.

14. At least one processor further, Determine the planned future downtime period; and, A computer device according to claim 13, programmed to schedule adjustments to the first device for planned future downtime periods.

15. A method for analyzing an assembly line, which is carried out by a computing device including at least one processor that communicates with at least one memory device, A step of storing a model for simulating a portion of an assembly line in at least one memory device, wherein the model is a generative adversarial network (GAN) artificial intelligence model; A step of converting a shape map and storing a model for simulating a portion of an assembly line in at least one memory device; A step of receiving scan data of a first inspection of a product under assembly, wherein the first inspection is performed at a first inspection station in the assembly line, which is a grinder, and the first device is a grinder; A process of generating a shape map from the scan data of the first inspection; The process of running a model using a shape map as input to generate the final shape map of the product; A step of comparing the final shape map with one or more thresholds; A step of determining whether the final shape map exceeds at least one threshold; and, A method comprising the step of adjusting the grinder if it is determined that the final shape map exceeds at least one threshold.

16. The process of calculating one or more product attributes from the final shape map; A process of comparing one or more product attributes with one or more thresholds; and, The method according to claim 15, further comprising the step of adjusting the first device if one or more product attributes exceed one or more thresholds.

17. The shape map is either the shape map after grinding or the GAPI RMS (root mean square) map. The method according to claim 15, wherein the final shape map is one of the nanotopography maps after polishing of the in-plane distortion (IPD) map.

18. The shape map is the first shape map, The final shape map is the first final shape map, and furthermore, A step of generating a second shape map from scan data, wherein the second shape map is generated in a manner different from that of the first shape map; and, The method according to claim 15, further comprising the step of running a model with a second shape map as input to generate a second final shape map of the product.

19. A step of calculating one or more product attributes from a first final shape map and a second final shape map; A process of comparing one or more product attributes with one or more thresholds; and, The method according to claim 18, further comprising the step of adjusting the first device if one or more product attributes exceed one or more thresholds.

20. The first shape map is the shape map after grinding. The first final shape map is the nanotopography map after polishing. The second shape map is the GAPI RMS (Root Mean Square) map, and, The method according to claim 18, wherein the second final shape map is an in-plane distortion (IPD) map.

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