Display device

Abstract

Provided is a display device having high luminance and a long service life. A display apparatus having a first layer and a second layer that is positioned above the first layer. The first layer has a substrate and a plurality of driving circuit regions, and the second layer has a plurality of display regions. In addition, the substrate is a glass substrate. Each of the plurality of driving circuit regions has a driving circuit, the driving circuit having a transistor that includes silicon in a channel-forming region. Each of the plurality of display regions has a pixel, the pixel having a light-emitting diode and a transistor that includes a metal oxide in a channel-forming region. In particular, the light-emitting diode is preferably a micro light-emitting diode. The driving circuit included in one of the plurality of driving circuit regions has a function for driving the display pixel included in one of the plurality of display regions.

Description

Display device and electronic device

[0001] One embodiment of the present invention relates to a display device and an electronic device.

[0002] Note that one embodiment of the present invention is not limited to the above technical field. The technical field of the invention disclosed in this specification and the like relates to an object, a driving method, or a manufacturing method. Alternatively, one embodiment of the present invention relates to a process, a machine, manufacture, or a composition of matter. Therefore, specific examples of the technical field of one embodiment of the present invention disclosed in this specification include a semiconductor device, a display device, a liquid crystal display device, a light-emitting device, a power storage device, an imaging device, a memory device, a signal processing device, a processor, an electronic device, a system, a driving method thereof, a manufacturing method thereof, or an inspection method thereof.

[0003] In recent years, improvements have been made in various aspects of display devices included in electronic devices for XR (Extended Reality or Cross Reality), such as VR (Virtual Reality) and AR (Augmented Reality), mobile phones such as smartphones, tablet information terminals, notebook PCs (Personal Computers), etc. For example, display devices have been developed to increase pixel density, improve color reproducibility (NTSC ratio), reduce the size of driving circuits, and reduce power consumption.

[0004] One way to increase the area of ​​the display unit of a display device is, for example, to reduce the frame area around the display unit. Since the frame area of ​​the display unit of a display device may include a driving circuit, the frame area can be reduced or eliminated by locating the driving circuit in a separate area instead of the frame area. For example, Patent Document 1 discloses a configuration for reducing the frame area by dividing the display unit of a display device and overlapping one of the multiple display units with the driving circuit corresponding to that display unit.

[0005] International Publication No. 2021 / 191721

[0006] As described above, in a display device having a divided display portion, a driver circuit corresponding to one display area may be arranged so as to overlap the display area in a plan view. In this case, the display device can be manufactured by, for example, providing the driver circuit on a semiconductor substrate and providing display pixels above the driver circuit.

[0007] However, the diagonal size of such a display device is limited by the size of the semiconductor substrate. When a wafer made of silicon (hereinafter referred to as a silicon wafer) is used as the semiconductor substrate, for example, to manufacture a display device with a diagonal size of more than 20 inches, a silicon wafer with a diameter of more than 20 inches is required. Since the diameter of silicon wafers used in current semiconductor manufacturing lines is generally up to 300 mm (approximately 12 inches), it can be said that it is difficult to prepare a silicon wafer with a diameter of more than 300 mm.

[0008] Furthermore, by improving the color reproducibility of a display device, the image displayed on the display device can be made clearer, and the sense of reality can be enhanced. For example, by applying display pixels having a light-emitting device containing an organic EL material (sometimes called an OLED (Organic Light Emitting Diode)) to the pixels of the display device, color reproducibility can be improved compared to display devices that use liquid crystals as display elements. On the other hand, light-emitting devices containing organic EL materials are prone to deterioration due to factors such as ultraviolet rays, atmospheric components, and the usage environment, and therefore display devices using light-emitting devices containing organic EL materials may have a shorter lifespan.

[0009] An object of one embodiment of the present invention is to provide a display device with high resolution and a large diagonal size.An object of one embodiment of the present invention is to provide a display device with high luminance and a long lifetime.An object of one embodiment of the present invention is to provide an electronic device including the display device.An object of one embodiment of the present invention is to provide a novel display device or a novel electronic device.

[0010] Note that the problems of one embodiment of the present invention are not limited to the problems listed above. The problems listed above do not preclude the existence of other problems. Note that the other problems are problems not mentioned in this section, which will be described below. Problems not mentioned in this section can be derived by a person skilled in the art from the description in the specification or drawings, and can be appropriately extracted from these descriptions. Note that one embodiment of the present invention solves at least one of the problems listed above and other problems. Note that one embodiment of the present invention does not necessarily solve all of the problems listed above and other problems.

[0011] (1) One embodiment of the present invention is a display device including a first layer and a second layer located above the first layer. The first layer includes a substrate and a plurality of driver circuit regions located on the substrate, and the second layer includes a plurality of display regions. Each of the plurality of driver circuit regions includes a driver circuit. Each of the plurality of display regions includes a pixel, and the pixel includes a light-emitting diode. Furthermore, a driver circuit included in one of the plurality of driver circuit regions has a function of driving a pixel included in one of the plurality of display regions. The display device has a function of displaying images in at least two of the plurality of display regions at frame frequencies different from each other.

[0012] (2) Alternatively, in one embodiment of the present invention, in the above-described (1), each of the plurality of display regions may include a sensor portion. In particular, the sensor portion is preferably located above the light-emitting diode.

[0013] (3) Alternatively, according to one embodiment of the present invention, in the above (2), the frame frequency of an image displayed in a display area including a sensor unit that has detected a touch may be set lower than the frame frequency of an image displayed in a display area including a sensor unit that has not detected a touch.

[0014] (4) Alternatively, one embodiment of the present invention may be configured such that in any one of the above (1) to (3), the driver circuit includes a transistor including silicon in a channel formation region, and the pixel includes a transistor including metal oxide in a channel formation region.

[0015] (5) Alternatively, in one aspect of the present invention, in the above (4), the substrate may be a glass substrate, and the silicon may be low-temperature polysilicon.

[0016] (6) Alternatively, in one embodiment of the present invention, in any one of (1) to (5) above, one of the plurality of driver circuit regions and one of the plurality of display regions may be located in regions that overlap each other in a plan view.

[0017] (7) Alternatively, according to one embodiment of the present invention, in any one of the above (1) to (6), a wiring may be provided between the first layer and the second layer in a direction perpendicular or substantially perpendicular to the substrate, and the wiring may be electrically connected to the pixel and the driver circuit.

[0018] (8) Another embodiment of the present invention is an electronic device including the display device according to any one of (1) to (7) above and a housing.

[0019] According to one embodiment of the present invention, a display device with high resolution and a large diagonal size can be provided. Alternatively, according to one embodiment of the present invention, a display device with high luminance and a long lifetime can be provided. Alternatively, according to one embodiment of the present invention, an electronic device including the display device can be provided. Alternatively, according to one embodiment of the present invention, a novel display device or a novel electronic device can be provided.

[0020] The effects of one embodiment of the present invention are not limited to the effects listed above. The effects listed above do not preclude the existence of other effects. The other effects are described below and are not mentioned in this section. Effects not mentioned in this section can be derived by a person skilled in the art from the description in the specification or drawings, and can be extracted as appropriate from these descriptions. One embodiment of the present invention has at least one of the effects listed above and other effects. Therefore, one embodiment of the present invention may not have the effects listed above in some cases.

[0021] FIGS. 1A and 1B are cross-sectional schematic diagrams showing an example of a configuration of a display device. FIG. 2A is a plan view schematic diagram showing an example of a display unit of a display device, and FIG. 2B is a plan view schematic diagram showing an example of a drive circuit region of the display device. FIG. 3 is a block diagram showing an example of a configuration of a display device. FIG. 4 is a plan view schematic diagram showing an example of a configuration of a display device. FIG. 5 is a block diagram showing an example of a configuration of a display device. FIGS. 6A and 6B are diagrams showing an example of a display unit in which the display unit is divided into multiple regions. FIG. 7A is a diagram showing an example of a display unit in which the plane of the display unit is divided into multiple regions, and FIG. 7B is a diagram showing an example of a display unit in which the plane of the display unit is divided into multiple regions. FIG. 8 is a diagram showing an example of a display unit in which the display unit is divided into multiple regions. FIG. 9 is a cross-sectional schematic diagram showing an example of a configuration of a display device. FIGS. 10A and 10B are cross-sectional views showing an example of a transistor. FIGS. 11A to 11D are cross-sectional schematic diagrams showing an example of a configuration of an LED package. FIGS. 12A and 12B are plan views schematic diagrams showing an example of a configuration of an LED package. FIG. 13A is a cross-sectional view showing an example of the configuration of a display device, and FIG. 13B is a cross-sectional view showing an example of the configuration of a substrate provided in the display device and light-emitting diodes on the substrate. FIG. 14 is a cross-sectional view showing an example of the configuration of a display device. FIG. 15 is a cross-sectional view showing an example of the configuration of a display device. FIG. 16 is a cross-sectional view showing an example of the configuration of a display device. FIG. 17A is a circuit diagram showing an example of the configuration of a pixel circuit included in the display device, and FIG. 17B is a perspective view showing an example of the configuration of a pixel circuit included in the display device. FIGS. 18A to 18G are plan views showing an example of a pixel. FIGS. 19A to 19F are plan views showing an example of a pixel. FIGS. 20A to 20H are plan views showing an example of a pixel. FIGS. 21A to 21D are plan views showing an example of a pixel. FIGS. 22A to 22G are plan views showing an example of a pixel. FIGS. 23A and 23B are diagrams showing an example of the configuration of a display module. FIGS. 24A to 24F are diagrams showing an example of the configuration of an electronic device. 25A to 25D are diagrams showing configuration examples of electronic devices. FIGS. 26A to 26C are diagrams showing configuration examples of electronic devices. FIGS. 27A to 27H are diagrams showing configuration examples of electronic devices. FIG. 28 is a diagram showing a configuration example of a system.

[0022] In this specification, a semiconductor device is a device that utilizes semiconductor characteristics, and refers to a circuit including a semiconductor element (for example, a transistor, a diode, and a photodiode), a device having such a circuit, etc. It also refers to any device that can function by utilizing semiconductor characteristics. For example, an integrated circuit, a chip including an integrated circuit, or an electronic component in which a chip is housed in a package are examples of a semiconductor device. Furthermore, for example, a memory device, a display device, a light-emitting device, a lighting device, and an electronic device may themselves be a semiconductor device or may include a semiconductor device.

[0023] Furthermore, when it is stated in this specification that X and Y are connected, it is understood that the following cases are disclosed in this specification: when X and Y are electrically connected, when X and Y are functionally connected, and when X and Y are directly connected. Therefore, it is not limited to a predetermined connection relationship, for example, a connection relationship shown in a figure or text, and it is understood that connections other than those shown in a figure or text are also disclosed in a figure or text. X and Y are understood to be objects (e.g., a device, an element, a circuit, wiring, an electrode, a terminal, a conductive film, a layer, etc.).

[0024] As an example of a case where X and Y are electrically connected, one or more elements (e.g., a switch, a transistor, a capacitance element, an inductor, a resistance element, a diode, a display device, a light-emitting device, a load, etc.) that enable the electrical connection between X and Y can be connected between X and Y. The switch has a function of controlling on / off. In other words, the switch has a function of being in a conductive state (on state) or a non-conductive state (off state) and controlling whether or not a current flows.

[0025] As an example of a case where X and Y are functionally connected, one or more circuits that enable the functional connection between X and Y (for example, a logic circuit (for example, an inverter, a NAND circuit, or a NOR circuit), a signal conversion circuit (for example, a digital-analog conversion circuit, an analog-digital conversion circuit, or a gamma correction circuit), a potential level conversion circuit (for example, a power supply circuit called a step-up circuit or a step-down circuit, or a level shifter circuit that changes the potential level of a signal), a voltage source, a current source, a switching circuit, an amplifier circuit (for example, a circuit that can increase the signal amplitude or current amount, an operational amplifier, a differential amplifier circuit, a source follower circuit, or a buffer circuit), a signal generation circuit, a memory circuit, or a control circuit) can be connected between X and Y. As an example, even if another circuit is sandwiched between X and Y, if a signal output from X is transmitted to Y, X and Y are considered to be functionally connected.

[0026] It should be noted that when it is explicitly stated that X and Y are electrically connected, this includes the case where X and Y are electrically connected (i.e., the case where X and Y are connected with another element or another circuit sandwiched between them) and the case where X and Y are directly connected (i.e., the case where X and Y are connected without another element or another circuit sandwiched between them).

[0027] Furthermore, for example, it can be expressed as follows: "X, Y, the source (sometimes referred to as either the first terminal or the second terminal) and the drain (sometimes referred to as the other of the first terminal or the second terminal) of the transistor are electrically connected to each other, and are electrically connected in the order of X, the source of the transistor, the drain of the transistor, and Y." Or, it can be expressed as follows: "The source of the transistor is electrically connected to X, the drain of the transistor is electrically connected to Y, and X, the source of the transistor, the drain of the transistor, and Y are electrically connected in this order." Or, it can be expressed as follows: "X is electrically connected to Y through the source and drain of the transistor, and X, the source of the transistor, the drain of the transistor, and Y are provided in this connection order." By using expressions similar to these examples to specify the order of connections in the circuit configuration, it is possible to distinguish between the source and drain of the transistor and determine the technical scope. Note that these expressions are merely examples and are not limiting. Here, X and Y are assumed to be objects (for example, a device, an element, a circuit, a wiring, an electrode, a terminal, a conductive film, or a layer).

[0028] Note that even when independent components are shown electrically connected to each other in a circuit diagram, one component may have the functions of multiple components. For example, if part of a wiring also functions as an electrode, one conductive film has the functions of both a wiring and an electrode. Therefore, the term "electrically connected" in this specification also includes such cases where one conductive film has the functions of multiple components.

[0029] Furthermore, in this specification, a "resistance element" can be, for example, a circuit element having a resistance value higher than 0Ω, or a wiring having a resistance value higher than 0Ω. Therefore, in this specification, a "resistance element" includes a wiring having a resistance value, a transistor in which a current flows between a source and a drain, a diode, or a coil. Therefore, the term "resistance element" can sometimes be replaced with terms such as "resistance," "load," or "region having a resistance value." Conversely, terms such as "resistance," "load," or "region having a resistance value" can sometimes be replaced with the term "resistance element." The resistance value can be, for example, preferably 1 mΩ or more and 10 Ω or less, more preferably 5 mΩ or more and 5 Ω or less, and even more preferably 10 mΩ or more and 1 Ω or less. Furthermore, for example, a resistance value can be replaced with a resistance value of 1 Ω or more and 1×10 ９ It may be set to Ω or less.

[0030] Furthermore, in this specification, a "capacitive element" can refer to, for example, a circuit element having a capacitance value higher than 0 F, a region of wiring having a capacitance value higher than 0 F, a parasitic capacitance, or the gate capacitance of a transistor. Furthermore, terms such as "capacitive element," "parasitic capacitance," or "gate capacitance" can sometimes be replaced with the term "capacitance." Conversely, the term "capacitance" can sometimes be replaced with the terms "capacitive element," "parasitic capacitance," or "gate capacitance." Furthermore, a "capacitance" (including a "capacitance" with three or more terminals) includes an insulator and a pair of conductors sandwiching the insulator. Therefore, the term "pair of conductors" in "capacitance" can be replaced with terms such as "pair of electrodes," "pair of conductive regions," "pair of regions," or "pair of terminals." Furthermore, terms such as "one of a pair of terminals" and "the other of a pair of terminals" may be referred to as a first terminal and a second terminal, respectively. The capacitance value can be, for example, 0.05 fF to 10 pF. It can also be, for example, 1 pF to 10 μF.

[0031] In this specification, a transistor has three terminals called a gate, a source, and a drain. The gate is a control terminal that controls the conduction state of the transistor. The two terminals that function as a source or a drain are input / output terminals of the transistor. One of the two input / output terminals serves as a source and the other as a drain depending on the conductivity type (n-channel or p-channel) of the transistor and the level of the potential applied to the three terminals of the transistor. Therefore, in this specification, the terms "source" and "drain" may be interchangeable. In addition, when describing the connection relationship of a transistor, the terms "one of the source or drain" (or first electrode or first terminal) and "the other of the source or drain" (or second electrode or second terminal) are used. Note that, depending on the structure of a transistor, a backgate may be included in addition to the three terminals described above. In this specification, one of the gate or backgate of the transistor may be referred to as a first gate, and the other of the gate or backgate of the transistor may be referred to as a second gate. Furthermore, for the same transistor, the terms "gate" and "backgate" may be interchangeable. Furthermore, when a transistor has three or more gates, the gates may be referred to as a first gate, a second gate, a third gate, and so on in this specification and the like.

[0032] For example, in this specification, a transistor having a multi-gate structure with two or more gate electrodes can be used as an example of a transistor. With a multi-gate structure, the channel formation regions are connected in series, resulting in a structure in which multiple transistors are connected in series. Therefore, the multi-gate structure can reduce the off-state current and improve the breakdown voltage (reliability) of the transistor. Alternatively, when operating in the saturation region, the multi-gate structure can provide voltage-current characteristics with a flat slope, such that the current between the drain and source does not change significantly even when the voltage between the drain and source changes. By utilizing voltage-current characteristics with a flat slope, an ideal current source circuit or an active load with a very high resistance value can be realized. As a result, a differential circuit or a current mirror circuit with excellent characteristics can be realized.

[0033] Furthermore, in this specification, circuit elements such as a "light-emitting device" and a "light-receiving device" may have polarities referred to as an "anode" and a "cathode." In the case of a "light-emitting device," applying a forward bias (applying a positive potential relative to the "cathode" to the "anode") may cause the "light-emitting device" to emit light. In the case of a "light-receiving device," applying a zero bias or a reverse bias (applying a negative potential relative to the "cathode" to the "anode") and irradiating the "light-receiving device" with light may generate a current between the "anode" and the "cathode." As described above, the "anode" and the "cathode" may be treated as input / output terminals in circuit elements such as a "light-emitting device" and a "light-receiving device." In this specification, the "anode" and the "cathode" in circuit elements such as a "light-emitting device" and a "light-receiving device" may be referred to as terminals (first terminal, second terminal, etc.). For example, one of the "anode" or the "cathode" may be referred to as a first terminal, and the other of the "anode" or the "cathode" may be referred to as a second terminal.

[0034] Furthermore, even when a single circuit element is shown on a circuit diagram, the circuit element may include multiple circuit elements. For example, when a single resistor is shown on a circuit diagram, this includes two or more resistors electrically connected in series. For example, when a single capacitor is shown on a circuit diagram, this includes two or more capacitors electrically connected in parallel. For example, when a single transistor is shown on a circuit diagram, this includes two or more transistors electrically connected in series, with the gates of the respective transistors electrically connected to each other. Similarly, when a single switch is shown on a circuit diagram, this includes two or more transistors, with the switch including two or more transistors electrically connected in series or parallel, and the gates of the respective transistors electrically connected to each other.

[0035] In this specification and the like, a node can be referred to as a terminal, a wiring, an electrode, a conductive layer, a conductor, or an impurity region depending on the circuit configuration and device structure. A terminal, a wiring, or the like can also be referred to as a node.

[0036] Furthermore, in this specification and the like, the terms "voltage" and "potential" can be interchanged as appropriate. "Voltage" refers to the potential difference from a reference potential. For example, if the reference potential is the ground potential (earth potential), then "voltage" can be interchanged with "potential." Note that ground potential does not necessarily mean 0 V. Furthermore, potential is relative, and as the reference potential changes, the potential applied to wiring, the potential applied to a circuit, etc., the potential output from a circuit, etc. also changes.

[0037] Furthermore, in this specification and the like, the terms "high-level potential" and "low-level potential" do not mean specific potentials. For example, when two wirings are both described as "functioning as wirings that supply a high-level potential," the high-level potentials provided by both wirings do not have to be equal to each other. Similarly, when two wirings are both described as "functioning as wirings that supply a low-level potential," the low-level potentials provided by both wirings do not have to be equal to each other.

[0038] Furthermore, "current" refers to the phenomenon of charge transfer (electrical conduction). For example, the statement "electrical conduction of a positively charged body is occurring" can be rephrased as "electrical conduction of a negatively charged body is occurring in the opposite direction." Therefore, in this specification, unless otherwise specified, "current" refers to the phenomenon of charge transfer (electrical conduction) associated with the movement of carriers. The carriers referred to here include, for example, electrons, holes, anions, cations, or complex ions, and the carriers differ depending on the system through which the current flows (e.g., semiconductor, metal, electrolyte, or vacuum). Furthermore, the "direction of current" in wiring, etc., refers to the direction in which positively charged carriers move and is expressed as a positive current amount. In other words, the direction in which negatively charged carriers move is opposite to the direction of current and is expressed as a negative current amount. Therefore, in this specification, unless otherwise specified regarding the positive / negative sign of the current (or the direction of current), the statement "current flows from element A to element B" can be rephrased as "current flows from element B to element A." Furthermore, the statement "current is input to element A" can be rephrased as "current is output from element A."

[0039] Furthermore, in this specification, the ordinal numbers "first," "second," and "third" are used to avoid confusion between components. Therefore, they do not limit the number of components. Furthermore, they do not limit the order of the components. For example, a component referred to as "first" in one embodiment of this specification may be a component referred to as "second" in another embodiment or in the claims. Furthermore, for example, a component referred to as "first" in one embodiment of this specification may be omitted in another embodiment or in the claims.

[0040] Furthermore, in this specification, terms indicating arrangement such as "above" and "below" may be used for convenience in describing the positional relationship between components with reference to the drawings. Furthermore, the positional relationship between components changes as appropriate depending on the direction in which each component is depicted. Therefore, the terms are not limited to those described in the specification, and can be rephrased appropriately depending on the situation. For example, the expression "insulator located on the upper surface of a conductor" can be rephrased as "insulator located on the lower surface of a conductor" by rotating the orientation of the drawing 180 degrees.

[0041] Furthermore, the terms "above" and "below" do not limit the positional relationship of components to being directly above or below and in direct contact with each other. For example, the expression "electrode B on insulating layer A" does not require that electrode B be formed in direct contact with insulating layer A, and does not exclude the inclusion of other components between insulating layer A and electrode B. Similarly, the expression "electrode B above insulating layer A" does not require that electrode B be formed in direct contact with insulating layer A, and does not exclude the inclusion of other components between insulating layer A and electrode B. Similarly, the expression "electrode B below insulating layer A" does not require that electrode B be formed in direct contact below insulating layer A, and does not exclude the inclusion of other components between insulating layer A and electrode B.

[0042] Furthermore, in this specification, terms such as "row" and "column" may be used to describe components arranged in a matrix and their positional relationships. Furthermore, the positional relationships between components change as appropriate depending on the direction in which each component is depicted. Therefore, the terms are not limited to those used in the specification, and may be rephrased appropriately depending on the situation. For example, the expression "row direction" may be rephrased as "column direction" by rotating the orientation of the drawing by 90 degrees.

[0043] Furthermore, in this specification, wiring electrically connecting components arranged in a matrix can extend in the row direction or the column direction. For example, when this specification describes that "wiring A extends in the row direction," wiring A may also extend in the column direction. Similarly, when it describes that "wiring A extends in the column direction," wiring A may also extend in the row direction. In other words, the direction in which wiring electrically connecting components arranged in a matrix extends is not limited to the directions described in this specification, and may be the row direction or the column direction.

[0044] Furthermore, in this specification and the like, the terms "film" and "layer" can be interchanged depending on the situation. For example, the term "conductive layer" may be changed to the term "conductive film". Or, for example, the term "insulating film" may be changed to the term "insulating layer". Or, in some cases or depending on the situation, the terms "film" and "layer" may not be used and may be replaced with other terms. For example, the terms "conductive layer" or "conductive film" may be changed to the term "conductor". Or, for example, the terms "insulating layer" or "insulating film" may be changed to the term "insulator".

[0045] Furthermore, in this specification and the like, terms such as "electrode," "wiring," and "terminal" do not limit the functionality of these components. For example, an "electrode" may be used as part of a "wiring," and vice versa. Furthermore, terms such as "electrode" or "wiring" include cases where multiple "electrodes" or "wirings" are integrally formed. Furthermore, for example, a "terminal" may be used as part of a "wiring" or "electrode," and vice versa. Furthermore, the term "terminal" includes cases where multiple "electrodes," "wirings," or "terminals" are integrally formed. Therefore, for example, an "electrode" can be part of a "wiring" or "terminal," and a "terminal" can be part of a "wiring" or "electrode." Furthermore, terms such as "electrode," "wiring," and "terminal" may be replaced with the term "region" in some cases.

[0046] Furthermore, in this specification and the like, terms such as "wiring," "signal line," and "power line" may be interchangeable depending on the circumstances. For example, the term "wiring" may be changed to the term "signal line." For example, the term "wiring" may be changed to the term "power line." Vice versa, terms such as "signal line" or "power line" may be changed to the term "wiring." The term "power line" may be changed to the term "signal line." Vice versa, the term "signal line" may be changed to the term "power line." Furthermore, the term "potential" applied to a wiring may be changed to the term "signal" depending on the circumstances. Vice versa, the term "signal" may be changed to the term "potential."

[0047] In this specification and the like, a metal oxide refers to an oxide of a metal in a broad sense. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also referred to as oxide semiconductors or simply as OSs), and the like. For example, when a metal oxide is contained in a channel formation region of a transistor, the metal oxide may be referred to as an oxide semiconductor. In other words, when a metal oxide can form a channel formation region of a transistor having at least one of an amplifying function, a rectifying function, and a switching function, the metal oxide can be referred to as a metal oxide semiconductor. Furthermore, an OS transistor can be referred to as a transistor including a metal oxide or an oxide semiconductor.

[0048] In this specification and the like, nitrogen-containing metal oxides may also be collectively referred to as metal oxides. Nitrogen-containing metal oxides may also be referred to as metal oxynitrides.

[0049] In this specification and the like, the term "semiconductor impurities" refers to, for example, elements other than the main component constituting the semiconductor layer. For example, an element with a concentration of less than 0.1 atomic % is an impurity. The presence of impurities may cause one or more of the following: an increase in defect level density in the semiconductor, a decrease in carrier mobility, and a decrease in crystallinity. When the semiconductor is an oxide semiconductor, impurities that change the semiconductor characteristics include, for example, Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, and transition metals other than the main component, particularly, for example, hydrogen (also included in water), lithium, sodium, silicon, boron, phosphorus, carbon, and nitrogen. When the semiconductor is a silicon layer, impurities that change the semiconductor characteristics include, for example, Group 1 elements, Group 2 elements, Group 13 elements, and Group 15 elements (excluding oxygen and hydrogen).

[0050] In this specification, a switch refers to a device that can be in a conductive state (on state) or a non-conductive state (off state) and has the function of controlling whether or not a current flows. Alternatively, a switch refers to a device that has the function of selecting and switching a path through which a current flows. Therefore, a switch may have two or more terminals through which a current flows, in addition to a control terminal. As an example, an electrical switch, a mechanical switch, or the like can be used. In other words, the switch is not limited to a specific type as long as it can control a current.

[0051] Examples of electrical switches include transistors (e.g., bipolar transistors, MOS transistors, etc.), diodes (e.g., PN diodes, PIN diodes, Schottky diodes, MIM (Metal Insulator Metal) diodes, MIS (Metal Insulator Semiconductor) diodes, and diode-connected transistors), or logic circuits combining these. When a transistor is used as a switch, the "conductive state" of the transistor refers to, for example, a state in which the source electrode and drain electrode of the transistor can be considered to be electrically short-circuited, or a state in which current can flow between the source electrode and drain electrode. The "non-conductive state" of the transistor refers to a state in which the source electrode and drain electrode of the transistor can be considered to be electrically disconnected. When a transistor is operated simply as a switch, the polarity (conductivity type) of the transistor is not particularly limited.

[0052] An example of a mechanical switch is a switch that uses MEMS (microelectromechanical systems) technology. This switch has a mechanically movable electrode, and the movement of the electrode controls conduction and non-conduction.

[0053] In this specification, "parallel" refers to a state in which two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, it also includes cases where the angle is -5° or more and 5° or less. Furthermore, "substantially parallel" or "roughly parallel" refers to a state in which two straight lines are arranged at an angle of -30° or more and 30° or less. Furthermore, "perpendicular" refers to a state in which two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it also includes cases where the angle is 85° or more and 95° or less. Furthermore, "substantially perpendicular" or "approximately perpendicular" refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0054] In this specification and the like, the configurations shown in each embodiment can be appropriately combined with the configurations shown in other embodiments to form one aspect of the present invention. In addition, when multiple configuration examples are shown in one embodiment, the configuration examples can be appropriately combined with each other.

[0055] In addition, the content (or even a part of the content) described in one embodiment can be applied, combined, or replaced with at least one of another content (or even a part of the content) described in that embodiment and one or more other content (or even a part of the content) described in another embodiment.

[0056] The contents described in the embodiments refer to the contents described in each embodiment using various figures or the contents described using text in the specification.

[0057] Furthermore, a figure (or even a part thereof) described in one embodiment can be combined with another part of that figure, another figure (or even a part thereof) described in that embodiment, and at least one figure (or even a part thereof) described in one or more other embodiments to form even more figures.

[0058] The embodiments described in this specification are described with reference to the drawings. However, it will be readily understood by those skilled in the art that the embodiments can be implemented in many different ways, and that various changes in form and details can be made without departing from the spirit and scope of the invention. Therefore, the present invention should not be interpreted as being limited to the description of the embodiments. Note that in the configuration of the invention of the embodiments, the same reference numerals are used in different drawings for the same parts or parts having similar functions, and repeated description thereof may be omitted. Also, in perspective views and the like, the description of some components may be omitted to ensure clarity of the drawings.

[0059] In addition, in the drawings of this specification, plan views may be used to explain the configuration of each embodiment. A plan view, for example, may be a view showing a configuration viewed from a direction perpendicular to a horizontal plane, or a view showing a horizontally cut surface (cut surface) of the configuration (either view direction may be referred to as a plan view). Hidden lines (e.g., dashed lines) may be included in the plan view to indicate the relative positions of multiple elements included in the configuration or the overlapping relationship of the multiple elements. Note that, in this specification, the term "plan view" may be interchangeable with the terms "projection view," "top view," or "bottom view." Depending on the situation, a plan view may refer to a cut surface (cut surface) of a configuration cut in a direction other than the horizontal direction, rather than a horizontally cut surface (cut surface).

[0060] In addition, in the drawings of this specification, cross-sectional views may be used to explain the configuration of each embodiment. A cross-sectional view, for example, is a view showing a surface of a configuration viewed from a direction perpendicular to a horizontal plane, or a view showing a surface (cut) of a configuration cut in a direction perpendicular to a horizontal plane (either direction may be referred to as a cross-sectional view). Note that in this specification, the term "cross-sectional view" may be replaced with the terms "front view" or "side view." Depending on the situation, a cross-sectional view may refer to a surface (cut) of a configuration cut in a direction other than the perpendicular direction, rather than a surface (cut) cut in a direction perpendicular to a horizontal plane.

[0061] In this specification, when the same reference numeral is used for multiple elements, and particularly when it is necessary to distinguish between them, an identification symbol such as "_1", "[n]", "[m, n]" may be added to the reference numeral. Also, when an identification symbol such as "_1", "[n]", "[m, n]" is added to the reference numeral in the drawings, etc., the identification symbol may not be added if it is not necessary to distinguish between them in this specification.

[0062] In addition, in the drawings of this specification, the size, layer thickness, or region may be exaggerated for clarity. Therefore, the drawings are not necessarily limited to the scale. Note that the drawings are schematic illustrations of ideal examples, and are not limited to the shapes or values ​​shown in the drawings. For example, variations in signals, voltages, or currents due to noise, or variations in signals, voltages, or currents due to timing differences may be included.

[0063] Embodiment 1 In this embodiment, a display device according to one embodiment of the present invention will be described.

[0064] 1A is a schematic cross-sectional view of a display device according to one embodiment of the present invention. The display device DSP shown in FIG. 1A includes, for example, a pixel layer PXAL and a circuit layer SICL.

[0065] The pixel layer PXAL is provided on the circuit layer SICL. The pixel layer PXAL overlaps a region including a drive circuit region DRV, which will be described later.

[0066] The circuit layer SICL has a substrate BS and a drive circuit region DRV.

[0067] The substrate BS can be, for example, a glass substrate, a quartz substrate, a plastic substrate, a sapphire glass substrate, a metal substrate, a stainless steel substrate, a substrate with stainless steel foil, a tungsten substrate, a substrate with tungsten foil, a flexible substrate, a laminated film, paper containing a fibrous material, or a base film. Examples of glass substrates include barium borosilicate glass, aluminoborosilicate glass, and soda-lime glass. Examples of flexible substrates, laminated films, and base films include plastics such as polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), and polytetrafluoroethylene (PTFE). Another example is a synthetic resin such as an acrylic resin. Another example is polypropylene, polyester, polyvinyl fluoride, or polyvinyl chloride. Another example is polyamide, polyimide, aramid, epoxy resin, inorganic vapor deposition film, or paper. When a heat treatment is included in the manufacturing process of the display device DSP, it is preferable to select a material with high heat resistance for the substrate BS.

[0068] In this embodiment, the substrate BS is described as a substrate made of a material with high heat resistance, such as a glass substrate.

[0069] The drive circuit region DRV is provided on the substrate BS.

[0070] The drive circuit region DRV has, as an example, a drive circuit for driving pixels included in a pixel layer PXAL, which will be described later. Note that a specific configuration example of the drive circuit region DRV will be described later.

[0071] The pixel layer PXAL has, for example, a plurality of pixels. The plurality of pixels may be arranged in a matrix in the pixel layer PXAL.

[0072] Each of the multiple pixels can express one or more colors. In particular, the multiple colors can be, for example, three colors: red (R), green (G), and blue (B). Alternatively, the multiple colors can be, for example, red (R), green (G), and blue (B) plus one or more colors selected from cyan (C), magenta (M), yellow (Y), and white (W). Each pixel expressing a different color is referred to as a subpixel, and when white is expressed by multiple subpixels of different colors, the multiple subpixels may be collectively referred to as a pixel. For convenience, in this specification and other descriptions, a subpixel may be referred to as a pixel.

[0073] 2A is an example of a plan view of the display device DSP, and shows only the display section DIS. Note that the display section DIS can be a plan view of the pixel layer PXAL.

[0074] 2A, the display unit DIS is divided into, for example, m rows and n columns (m is an integer greater than or equal to 1, and n is an integer greater than or equal to 1) of regions. Therefore, the display unit DIS has display areas ARA[1,1] to ARA[m,n]. In addition, in Figure 2A, as an example, display area ARA[1,1], display area ARA[2,1], display area ARA[m-1,1], display area ARA[m,1], display area ARA[1,2], display area ARA[2,2], display area ARA[m-1,2], display area ARA[m,2], display area ARA[1,n-1], display area ARA[2,n-1], display area ARA[m-1,n-1], display area ARA[m,n-1], display area ARA[1,n], display area ARA[2,n], display area ARA[m-1,n], and display area ARA[m,n] are each shown in excerpt form.

[0075] For example, if it is desired to divide the display unit DIS into 32 regions, m = 4 and n = 8, and the configuration shown in FIG. 2A can be applied. If the display device DSP has a screen resolution of 8K4K, the number of pixels is 7680 x 4320 pixels. If the sub-pixels of the display unit DIS are of three colors, red (R), green (G), and blue (B), the total number of sub-pixels is 7680 x 4320 x 3. Here, if the pixel array of the display unit DIS with a screen resolution of 8K4K is divided into 32 regions, the number of pixels per region is 960 x 1080 pixels. If the sub-pixels of the display device DSP are of three colors, red (R), green (G), and blue (B), the number of sub-pixels per region is 960 x 1080 x 3.

[0076] Here, in the display device DSP of FIG. 2A, a drive circuit region DRV included in the circuit layer SICL will be considered in the case where the display section DIS is divided into regions of m rows and n columns.

[0077] FIG. 2B is an example of a plan view of the display device DSP, showing a drive circuit region DRV included in the circuit layer SICL.

[0078] 2A, the display unit DIS is divided into m rows and n columns, and therefore a corresponding drive circuit is required for each of the divided display areas ARA[1,1] to ARA[m,n]. Specifically, the drive circuit area DRV may also be divided into m rows and n columns, and a drive circuit may be provided in each divided area.

[0079] 2B shows a configuration in which the driver circuit region DRV is divided into regions with m rows and n columns, and therefore the driver circuit region DRV has circuit regions ARD[1,1] to ARD[m,n]. In addition, in Figure 2B, as an example, circuit area ARD[1,1], circuit area ARD[2,1], circuit area ARD[m-1,1], circuit area ARD[m,1], circuit area ARD[1,2], circuit area ARD[2,2], circuit area ARD[m-1,2], circuit area ARD[m,2], circuit area ARD[1,n-1], circuit area ARD[2,n-1], circuit area ARD[m-1,n-1], circuit area ARD[m,n-1], circuit area ARD[1,n], circuit area ARD[2,n], circuit area ARD[m-1,n], and circuit area ARD[m,n] are each shown in excerpt form.

[0080] Each of the circuit areas ARD[1,1] to ARD[m,n] includes a driver circuit SD and a driver circuit GD. For example, the driver circuit SD and the driver circuit GD included in the circuit area ARD[i,j] (not shown in FIG. 2B ) located in the i-th row and j-th column (i is an integer of 1 to m, and j is an integer of 1 to n) can drive a plurality of pixels included in the display area ARA[i,j] (not shown in FIG. 2A ) located in the i-th row and j-th column of the display unit DIS.

[0081] The drive circuit SD functions as, for example, a source driver circuit that transmits image signals to a plurality of pixels included in the corresponding circuit area ARD. The drive circuit SD may also include a digital-to-analog conversion circuit that converts the digital image signal into analog data.

[0082] The drive circuit GD functions as, for example, a gate driver circuit for selecting a plurality of pixels to which an image signal is to be sent in the corresponding circuit area ARD.

[0083] 2A and 2B, the display area ARA[i,j] and the circuit area ARD[i,j] are located in areas that overlap each other in a plan view. The overlapping of the display area ARA[i,j] and the circuit area ARD[i,j] allows the wiring electrically connecting the display area ARA[i,j] and the circuit area ARD[i,j] to be shortened, thereby reducing the parasitic resistance of the wiring. Furthermore, shortening the wiring reduces the parasitic capacitance of the wiring, thereby reducing the time constant of the wiring. Reducing the time constant of the wiring shortens the time required to write an image to the display area ARA[i,j], thereby increasing the frame frequency.

[0084] Fig. 3 is a perspective view of the display device DSP shown in Fig. 2A and Fig. 2B. Fig. 3 also shows display areas ARA[1,1], ARA[m,1], ARA[1,n], and ARA[m,n] as display areas ARA, and circuit areas ARD[1,1], ARD[m,1], ARD[1,n], and ARD[m,n] as circuit areas ARD.

[0085] 3, each of the plurality of display areas ARA includes, for example, a plurality of pixels PX. In the display area ARA, the plurality of pixels PX are arranged in a matrix.

[0086] In each of the display areas ARA, a plurality of lines GL extend in the row direction, and a plurality of lines SL extend in the column direction.

[0087] Each of the pixels PX arranged in a matrix in the display area ARA is electrically connected to the wiring GL of the corresponding row, and similarly, each of the pixels PX is electrically connected to the wiring SL of the corresponding column.

[0088] Furthermore, in the display device DSP of FIG. 3, each of the plurality of circuit areas ARD has a drive circuit SD and a drive circuit GD, similar to the display device DSP shown in FIG. 2B.

[0089] 2A and 2B, the drive circuit SD and drive circuit GD included in the circuit area ARD[i,j] have the function of driving the multiple pixels included in the display area ARA[i,j]. For this reason, the drive circuit SD included in the circuit area ARD[i,j] is electrically connected to multiple wirings SL extending into the display area ARA[i,j]. Furthermore, the drive circuit GD included in the circuit area ARD[i,j] is electrically connected to multiple wirings GL extending into the display area ARA[i,j].

[0090] In addition, in order to electrically connect the display area ARA[i,j] and the circuit area ARD[i,j], a plurality of wirings SL and a plurality of wirings GL are provided between the display section DIS and the drive circuit area DRV.

[0091] Furthermore, by arranging the display area ARA[i,j] and the circuit area ARD[i,j] so that they overlap, the wiring electrically connecting the display area ARA[i,j] and the circuit area ARD[i,j] can be extended, for example, in a direction perpendicular to or approximately perpendicular to the substrate BS. By extending the wiring in a perpendicular or approximately perpendicular direction, the length of the wiring can be shortened, thereby reducing the parasitic resistance associated with the wiring, as described above. Furthermore, the parasitic capacitance associated with the wiring can be reduced. This allows the voltage required to pass current through the wiring to be kept low, thereby reducing power consumption.

[0092] 1A, 2A, 2B, and 3 have a configuration in which the display region ARA[i,j] and the circuit region ARD[i,j] of the display unit DIS overlap each other, but the display device of one embodiment of the present invention is not limited to this. In the configuration of the display device of one embodiment of the present invention, the display region ARA[i,j] and the circuit region ARD[i,j] do not necessarily overlap each other.

[0093] For example, as shown in FIG. 1B, the display device DSP may have a configuration in which not only the drive circuit region DRV but also the region LIA is provided on the substrate BS.

[0094] As an example, wiring is provided in the region LIA. In this case, the display device DSP may be configured such that the circuit included in the drive circuit region DRV and the circuit included in the pixel layer PXAL are electrically connected by the wiring included in the region LIA.

[0095] 4 is an example of a plan view of the display device DSP shown in FIG. 1B , showing a drive circuit region DRV indicated by a solid line and a display unit DIS indicated by a dotted line. The display device DSP in FIG. 4 also shows, as an example, a configuration in which the drive circuit region DRV is surrounded by a region LIA. Therefore, as shown in FIG. 4 , the drive circuit region DRV is arranged so as to overlap the inside of the display unit DIS in a plan view.

[0096] In addition, the display device DSP shown in Figure 4 is assumed to have a display unit DIS divided into display areas ARA[1,1] to ARA[m,n], as in Figure 2A, and a drive circuit area DRV divided into circuit areas ARD[1,1] to ARD[m,n].

[0097] 4, as an example, the correspondence between the display area ARA and the circuit area ARD including the drive circuits that drive the pixels included in the display area ARA is illustrated by thick arrows. Specifically, the drive circuits included in the circuit area ARD[1,1] drive the pixels included in the display area ARA[1,1], and the drive circuits included in the circuit area ARD[2,1] drive the pixels included in the display area ARA[2,1]. Furthermore, the drive circuits included in the circuit area ARD[m-1,1] drive the pixels included in the display area ARA[m-1,1], and the drive circuits included in the circuit area ARD[m,1] drive the pixels included in the display area ARA[m,1]. Furthermore, the drive circuits included in the circuit area ARD[1,n] drive the pixels included in the display area ARA[1,n], and the drive circuits included in the circuit area ARD[2,n] drive the pixels included in the display area ARA[2,n]. Furthermore, the drive circuit included in the circuit area ARD[m-1,n] drives the pixels included in the display area ARA[m-1,n], and the drive circuit included in the circuit area ARD[m,n] drives the pixels included in the display area ARA[m,n]. In other words, although not shown in Figure 4, the drive circuit included in the circuit area ARD[i,j] located in the i-th row and j-th column drives the pixels included in the display area ARA[i,j].

[0098] 1B, by electrically connecting the driving circuit included in the circuit region ARD in the circuit layer SICL and the pixels included in the display region ARA in the pixel layer PXAL by wiring, the display device DSP can be configured so that the display region ARA[i,j] and the circuit region ARD[i,j] do not necessarily overlap each other. Therefore, the positional relationship between the driving circuit region DRV and the display unit DIS is not limited to the plan view of the display device DSP shown in FIG. 4, and the arrangement of the driving circuit region DRV can be freely determined.

[0099] 2B and 4, the driver circuits SD and GD are arranged in a cross shape in each of the circuit regions ARD[1,1] to ARD[m,n]. However, the arrangement of the driver circuits SD and GD is not limited to the configuration of the display device of one embodiment of the present invention. For example, the driver circuits SD and GD may be arranged in an L-shape within one circuit region ARD of the driver circuit region DRV as shown in FIG. 3. Alternatively, one of the driver circuits SD and GD may be arranged vertically in a plan view, and the other of the driver circuits SD and GD may be arranged horizontally in a plan view.

[0100] 2A to 4, the display unit DIS of the display device DSP is divided into display areas ARA[1,1] to ARA[m,n], and a driving circuit SD and a driving circuit GD are provided in the circuit area ARD corresponding to each display area ARA, so that each of the display areas ARA[1,1] to ARA[m,n] can be driven independently. For example, in a display area ARA where image data is frequently rewritten, the driving circuits SD and GD provided in the corresponding circuit area ARD can be driven at a high frame frequency, and in a display area ARA where image data is not frequently rewritten, the driving circuits SD and GD provided in the corresponding circuit area ARD can be driven at a low frame frequency. For example, the driving circuits SD and GD corresponding to a display area ARA where image data, such as moving images, are frequently rewritten can operate at a high frame frequency of 60 Hz or more, 120 Hz or more, 165 Hz or more, or 240 Hz or more. Furthermore, for example, the drive circuits SD and GD corresponding to the display area ARA, where image data such as still images is not frequently rewritten, may operate at a low frame frequency of 5 Hz or less, 1 Hz or less, 0.5 Hz or less, or 0.1 Hz or less. By dividing the display unit DIS of the display device DSP into display areas ARA[1,1] to ARA[m,n], the rewriting frequency (frame frequency) can be changed depending on the image displayed in the display area ARA. In other words, the display device DSP can display images at different frame frequencies in two selected from the display areas ARA[1,1] to ARA[m,n] in the display unit DIS.

[0101] Furthermore, by using any of a glass substrate, a metal substrate, and a base film for the substrate BS, the diagonal size of the display device DSP can be made larger more easily than with a semiconductor substrate made of silicon, etc. In particular, by selecting, as the glass substrate, for example, a second-generation substrate size (approximately 370 mm × 470 mm), a third-generation substrate size (approximately 550 mm × 650 mm), a fourth-generation substrate size (approximately 680 mm × 880 mm), or a substrate size beyond the fourth generation, it is possible to manufacture a display device DSP with a diagonal size larger than the diameter (approximately 12 inches) of the main silicon wafers used in current semiconductor processes.

[0102] <Configuration Example of Control Circuit> Next, an example of the display device DSP and a control circuit provided outside the display device DSP will be described. Fig. 5 is a block diagram showing an example of the display device DSP and the control circuit PRPH.

[0103] 5 includes a display unit DIS and a drive circuit region DRV. The drive circuit region DRV includes a circuit GDS including a plurality of drive circuits GD and a circuit SDS including a plurality of drive circuits SD. The control circuit PRPH includes a distribution circuit DMG, a distribution circuit DMS, a control unit CTR, a memory device MD, a voltage generation circuit PG, a timing controller TMC, a clock signal generation circuit CKS, an image processing unit GPS, and an interface INT.

[0104] In the display device DSP, the drive circuit region DRV including each of the plurality of drive circuits GD overlaps with the pixel layer PXAL including the plurality of display regions ARA as shown in Figures 2A to 4, but for convenience, the drive circuits GD are illustrated as being lined up in a row in Figure 5. Similarly, the drive circuit region DRV including each of the plurality of drive circuits SD overlaps with the pixel layer PXAL including the plurality of display regions ARA as shown in Figures 2A to 4, but for convenience, the drive circuits SD are illustrated as being lined up in a row in Figure 5.

[0105] The control circuit PRPH is electrically connected to the outside of the display device DSP shown in, for example, FIGS. 1A to 4.

[0106] The distribution circuit DMG, distribution circuit DMS, control unit CTR, memory device MD, voltage generation circuit PG, timing controller TMC, clock signal generation circuit CKS, image processing unit GPS, and interface INT each transmit and receive various signals to and from each other via bus wiring BW.

[0107] The interface INT functions as a circuit for inputting image information for displaying an image on the display device DSP, which is output from an external device, into the circuitry within the control circuit PRPH. Examples of the external device include a recording media player, a hard disk drive (HDD), and a non-volatile storage device such as a solid state drive (SSD). The interface INT may also function as a circuit for outputting a signal from the circuitry within the control circuit PRPH to a device outside the display device DSP.

[0108] Furthermore, when image information is input to the interface INT from an external device via wireless communication, the interface INT may be configured to include, for example, an antenna for receiving the image information, a mixer, an amplifier circuit, and an analog-to-digital conversion circuit.

[0109] The control unit CTR has the function of processing various control signals sent from an external device via the interface INT and controlling various circuits included in the control circuit PRPH.

[0110] The memory device MD has the function of temporarily storing information and image signals. In this case, the memory device MD functions, for example, as a frame memory (sometimes called a frame buffer). The memory device MD may also have the function of temporarily storing at least one of information sent from an external device via the interface INT and information processed by the control unit CTR. Note that, for example, at least one of SRAM (Static Random Access Memory) and DRAM (Dynamic Random Access Memory) can be used as the memory device MD.

[0111] The voltage generation circuit PG has a function of generating power supply voltages to be supplied to the pixel circuits included in the display unit DIS and the circuits included in the control circuit PRPH. Note that the voltage generation circuit PG may also have a function of selecting the circuit to which the voltage is supplied. For example, during a period in which a still image is displayed on the display unit DIS, the voltage generation circuit PG can reduce the power consumption of the entire display device DSP by stopping the supply of voltage to the circuit GDS, the circuit SDS, the image processing unit GPS, the timing controller TMC, and the clock signal generation circuit CKS.

[0112] The timing controller TMC has a function of generating timing signals used by the multiple driver circuits GD included in the circuit GDS and the multiple driver circuits SD included in the circuit SDS. The timing signals can be generated using clock signals generated by the clock signal generation circuit CKS.

[0113] The image processing unit GPS has a function of performing processing to draw an image on the display unit DIS. For example, the image processing unit GPS may have a GPU (Graphics Processing Unit). In particular, the image processing unit GPS is configured to perform parallel pipeline processing, thereby enabling high-speed processing of image data to be displayed on the display unit DIS. The image processing unit GPS can also function as a decoder to restore encoded images.

[0114] Also, in Figure 5, the image processing unit GPS has the function of receiving image data to be displayed in each of the display areas ARA[1,1] to ARA[m,n], for example, and generating an image signal from the image data.

[0115] The image processing unit GPS may also have a function of correcting the color tone of the image displayed in the display areas ARA[1,1] to ARA[m,n]. In this case, it is preferable that the image processing unit GPS is provided with one or both of a light adjustment circuit and a color adjustment circuit. Furthermore, if the display pixels included in the display unit DIS include organic EL elements, the image processing unit GPS may also be provided with an EL correction circuit.

[0116] Furthermore, artificial intelligence may be used for the image correction described above. For example, the current flowing through a display device (or the voltage applied to the display device) provided in the pixel may be monitored and acquired, and the image displayed on the display unit DIS may be acquired by an image sensor or the like, and the current (or voltage) and the image may be treated as input data for an artificial intelligence calculation (for example, an artificial neural network, etc.), and the output result may be used to determine whether or not the image should be corrected.

[0117] Furthermore, the calculations of the artificial intelligence can be applied not only to image correction but also to up-conversion processing of image data. As a result, by up-converting image data with a low screen resolution to match the screen resolution of the display unit DIS, it is possible to display an image with high display quality on the display unit DIS. Furthermore, the calculations of the artificial intelligence can be applied to down-conversion processing of image data.

[0118] The above-mentioned artificial intelligence calculations are performed, for example, by a GPU included in the image processing unit GPS. That is, various correction calculations (for example, color unevenness correction or up-conversion) can be performed using the GPU.

[0119] In this specification, a GPU that performs computations for artificial intelligence is referred to as an AI accelerator. That is, in this specification, a GPU may be substituted for an AI accelerator in the following description.

[0120] The clock signal generation circuit CKS has a function of generating a clock signal for displaying a desired image in each of the display areas ARA[1,1] to ARA[m,n], for example.

[0121] In addition, when the image rewriting frequency (frame frequency) differs in each of the display areas ARA[1,1] to ARA[m,n], the clock signal generation circuit CKS preferably has a function of generating clock signals of frame frequencies corresponding to each of the display areas ARA[1,1] to ARA[m,n]. In other words, the clock signal generation circuit CKS preferably has a function of simultaneously generating clock signals of different frequencies.

[0122] The distribution circuit DMG has the function of transmitting the signal received from the bus wiring BW to a drive circuit GD that drives the pixels included in any one of the display areas ARA[1,1] to ARA[m,n] depending on the content of the signal.

[0123] The distribution circuit DMS has the function of transmitting the signal received from the bus wiring BW to a drive circuit SD that drives the pixels included in any one of the display areas ARA[1,1] to ARA[m,n] depending on the content of the signal.

[0124] 5 illustrates a state in which the distribution circuit DMG transmits a signal directly to the circuit GDS, but the signal transmitted from the distribution circuit DMG may be input to the circuit GDS via an interface INT. Similarly, while FIG. 5 illustrates a state in which the distribution circuit DMS transmits a signal directly to the circuit SDS, the signal transmitted from the distribution circuit DMS may be input to the circuit SDS via an interface INT.

[0125] 5, the control circuit PRPH may include a level shifter. As an example, the level shifter has a function of converting signals input to each circuit to an appropriate level.

[0126] 5 is an example, and the circuit configuration included in the control circuit PRPH may be changed depending on the situation. For example, if the control circuit PRPH is configured to receive drive voltages for each circuit from an external source, there is no need to generate the drive voltages within the control circuit PRPH. In this case, the control circuit PRPH may be configured not to include the voltage generation circuit PG.

[0127] Also, for example, all or part of the circuits included in the control circuit PRPH may be included in the circuit layer SICL of the display device DSP. Specifically, in the case of the display device DSP of FIG. 1A, all or part of the circuits included in the control circuit PRPH may be included in the drive circuit region DRV. Also, in the case of the display device DSP of FIG. 1B, all or part of the circuits included in the control circuit PRPH may be included in the drive circuit region DRV or the region LIA.

[0128] Note that this embodiment mode can be appropriately combined with other embodiment modes described in this specification.

[0129] Second Embodiment In the present embodiment, an example will be described in which the above-described display device DSP displays images with different display qualities for each divided display area ARA.

[0130] Here, the display quality is determined by, for example, one or both of the screen resolution (high definition (pixel density)) and the frame frequency. For example, by increasing the screen resolution (definition) of the display device DSP, the display device DSP can display the image displayed on the display device DSP with higher definition, but the amount of image data to be displayed increases. On the other hand, by decreasing the screen resolution (definition) of the display device DSP, the display device DSP can display the image displayed on the display device DSP with lower resolution, but the amount of image data to be displayed can be reduced. Also, for example, by increasing the frame frequency of the display device DSP, the display device DSP can display the movement of the image displayed on the display device DSP more smoothly, but the amount of image data to be displayed increases. On the other hand, by decreasing the frame frequency of the display device DSP, the movement of the image displayed on the display device DSP becomes rougher, but the amount of image data to be displayed can be reduced.

[0131] Next, an example of changing the screen resolution will be described. If the screen resolution of the display unit DIS of the display device DSP is 8K4K, the number of pixels PX included in the display unit DIS is 7680 x 4320. Here, if the screen resolution of the display unit DIS of the display device DSP is changed to 4K2K (3840 x 2160), the pixel PX matrix of the display unit DIS is divided into two rows and two columns, and four pixels PX included in each region are treated as one pixel. The same image signal is transmitted to the four pixels PX included in the same region, thereby driving the display device DSP as a display device with a screen resolution of 4K2K. Furthermore, when the screen resolution of the display unit DIS is changed from 8K4K to 4K2K, the definition of the display unit DIS can be considered to be reduced by approximately half. Furthermore, when the screen resolution of the display unit DIS of the display device DSP is changed to FHD (1920 x 1080), the matrix of pixels PX of the display unit DIS is divided into 4-row, 4-column regions, and the 16 pixels PX included in each region are treated as one pixel, and the same image signal is sent to the four pixels PX included in the same region, so that the 8K4K display device DSP can be driven as a display device with an FHD screen resolution. Furthermore, when the screen resolution of the display unit DIS is changed from 8K4K to FHD, the definition of the display unit DIS can be considered to have decreased to roughly 1 / 4. Furthermore, when the screen resolution of the display unit DIS of the display device DSP is changed to HD (1280 x 720), the matrix of pixels PX of the display unit DIS is divided into regions of 6 rows and 6 columns, and 36 pixels PX included in each region are treated as one pixel, and the same image signal is sent to the 36 pixels PX included in the same region, so that the 8K4K display device DSP can be driven as a display device with an HD screen resolution. Furthermore, when the screen resolution of the display unit DIS is changed from 8K4K to HD, the definition of the display unit DIS can be considered to have decreased to roughly 1 / 6.

[0132] FIG. 6A shows an example in which the display unit DIS of the display device DSP is divided into display areas of 16 rows and 16 columns (that is, in FIG. 2A, p=16, q=16).

[0133] The display device DSP is also assumed to have a function for detecting the user's line of sight. As an example, the display device DSP is provided with an imaging device that captures an image of the user's eye and calculates eye movement from the captured image of the user's eye. Examples of methods for calculating eye movement include the corneal reflex method (PCCR method).

[0134] The display device DSP has a function of detecting the user's line of sight, so that the display device DSP can determine which part of the pixel array ALP the user is looking at. For example, in Fig. 6A, the area ASU is the area determined by the eye tracking function of the display device DSP to be the area the user is looking at (which may also be referred to as the area in front of the user's line of sight).

[0135] Because area ASU is in the user's line of sight, the user can clearly see area ASU. On the other hand, it becomes difficult for the user to clearly see areas away from area ASU (areas that are included in the user's field of view but are not in the user's line of sight, or areas that the user is not focusing on). Conversely, because the user is not consciously paying attention to an image displayed in display area ARA that is away from area ASU, there is little need to improve the display quality of that display area ARA.

[0136] Here, as shown in Fig. 6A, the display device DSP sets an area ALPa around the area ASU based on the area ASU detected by the eye tracking function, sets an area ALPb to surround the periphery of the area ALPa, sets an area ALPc to surround the periphery of the area ALPb, and sets an area ALPd to surround the periphery of the area ALPc. Then, the display area ARA included in the areas ALPa to ALPd is set to have a screen resolution (definition). Here, the screen resolution (definition) of the display area ARA included in the area ALPa is set to R ａ The screen resolution (definition) of the display area ARA included in the area ALPb is R ｂ The screen resolution (definition) of the display area ARA included in the area ALPc is R ｃ The screen resolution (definition) of the display area ARA included in the area ALPd is Rｄ In particular, R ａ is R ｂ Higher than R ｂ is R ｃ Higher than R ｃ is R ｄ It is preferable to set it higher than

[0137] As described above, by increasing the screen resolution (definition) of the display area ARA around the area ASU, which is the user's line of sight, and decreasing the screen resolution (definition) of the display area ARA away from the area ASU, the amount of image data transmitted to the display unit DIS of the display device DSP can be reduced. This eliminates the need to increase the performance of the interface for transmitting image data to the display device DSP, thereby reducing power consumption and costs. Furthermore, the amount of image data transmitted to the display area ARA by the circuits included in the circuit area ARD that drive the pixels PX included in the display area ARA with a low screen resolution (definition) can also be reduced, thereby reducing power consumption.

[0138] It is difficult for the user to clearly see the display area ARA that is away from the area ASU, so even if the screen resolution (definition) of the display area ARA that is away from the area ASU is lowered and the display quality of the image displayed on the entire pixel array ALP is lowered, the impact is small when the user views the image displayed on the pixel array ALP.

[0139] Furthermore, when the user's line of sight moves and the position of area ASU changes, the positions and ranges of areas ALPa, ALPb, ALPc, and ALPd may also change. For example, as shown in Figure 6B or 7A, when the area in front of the user's line of sight changes from area ASU to area ASU_AF, the positions of areas ALPa, ALPb, ALPc, and ALPd change. Note that in the example change shown in Figure 6B, the ranges (sizes) of areas ALPa and ALPb remain unchanged, while the range of area ALPc shrinks and the range of area ALPd expands. Also, Figure 7A shows an example change when the area in front of the user's line of sight changes from area ASU to area ASU_AF, which is near the edge of the pixel array ALP, where the ranges of areas ALPa, ALPb, and ALPc shrink and the range of area ALPd expands.

[0140] Furthermore, if the eye tracking function of the display device DSP does not detect the user's gaze, the display device DSP may set the entire pixel array ALP to the area ALPe, as shown in FIG. 7B . Examples of cases in which the user's gaze is not detected include when the user's eyelids are closed or when the user is sleeping. The screen resolution (definition) of the display area ARA included in the area ALPe may be lower than that of the area ALPd, for example. Alternatively, the display device DSP may perform an operation of not transmitting image signals to the pixels PX of the display area ARA included in the area ALPe. In other words, the display device DSP may perform an operation of transmitting image signals for black display to the pixels PX of the display area ARA included in the area ALPe.

[0141] 6A and 6B show a configuration in which the display unit DIS is divided into four regions, ALPa, ALPb, ALPc, and ALPd, and each of the regions ALPa, ALPb, ALPc, and ALPd has a different screen resolution (definition), but the display device of one embodiment of the present invention is not limited to this. For example, the display unit DIS of the display device DSP may be divided into two, three, five, or more regions, and each of the regions may have a different screen resolution (definition).

[0142] 6A to 7B show an example in which the screen resolution (definition) of each of the areas ALPa, ALPb, ALPc, and ALPd of the display unit DIS is changed, but instead of the screen resolution (definition), the frame frequency of each of the areas ALPa, ALPb, ALPc, and ALPd may be changed. For example, the frame frequency of the display area ARA included in the area ALPa is set higher than the frame frequency of the display area ARA included in the area ALPb, the frame frequency of the display area ARA included in the area ALPb is set higher than the frame frequency of the display area ARA included in the area ALPc, and the frame frequency of the display area ARA included in the area ALPc is set higher than the frame frequency of the display area ARA included in the area ALPd. This increases the amount of image data sent to the display area ARA near the area ASU, allowing the user to see a high-quality image. Furthermore, as described above, by setting the frame frequency of each area of ​​the display unit DIS, the amount of image data sent to the display area ARA that is far from the area ASU can be reduced, thereby reducing the load on the drive circuit that drives the pixels included in the display area ARA.

[0143] 6A to 7B have been described as examples in which the display quality of an image in the vicinity of the area the user is looking at is improved by an eye-tracking function, but one embodiment of the present invention is not limited thereto. For example, one embodiment of the present invention may be configured to change the display quality of each area of ​​the display unit DIS of the display device DSP by a touch sensor function that detects the user's finger, rather than by an eye-tracking function that detects the line of sight. For example, FIG. 8 illustrates an example of a state in which the user's finger FNG touches the display unit DIS of the display device DSP. When scrolling the image on the display unit DIS by, for example, sliding the user's finger FNG across the display unit DIS while touching the display unit DIS, the user often focuses on the image in the display area ARA away from the user's finger FNG, rather than the display area ARA around the user's finger FNG. 8, the image resolution of the display area ARA of the area ALPd of the display unit DIS that is touched by the finger FNG and its periphery may be lowered, and the image resolution of the display area ARA of the area ALPa of the display unit DIS other than the area ALPd may be increased. Alternatively, the frame frequency of the display area ARA of the area ALPd of the display unit DIS that is touched by the finger FNG and its periphery may be lowered, and the frame frequency of the display area ARA of the area ALPa of the display unit DIS other than the area ALPd may be increased.

[0144] Note that Figure 8 shows an example in which the display quality of area ALPa is increased and the display quality of area ALPd is decreased, but it is also possible to increase the display quality of the display area ARA of area ALPd including the area touched by the finger FNG and its surroundings, and decrease the display quality of the display area ARA of area ALPa other than area ALPd of the display unit DIS.

[0145] The structure described in this embodiment mode can be used in appropriate combination with structures described in other embodiments.

[0146] In this embodiment, a display device that can be provided in an electronic device according to one embodiment of the present invention will be described. Note that the display device described in this embodiment can be applied to the display device DSP described in the above embodiment.

[0147] <Structure Example of Display Device> Fig. 9 is a cross-sectional view illustrating an example of a display device according to one embodiment of the present invention. As an example, a display device 1000 illustrated in Fig. 9 has a structure in which a pixel circuit and a driver circuit are provided over a substrate 310. Note that the display device DSP according to the above-described embodiment can have the structure of the display device 1000 illustrated in Fig. 9.

[0148] Specifically, for example, the circuit layer SICL and pixel layer PXAL shown in the display device DSP of FIG. 1 can be configured as in the display device 1000 of FIG. 9 . The display device 1000 of FIG. 9 has, as an example, a configuration in which circuit elements and light-emitting diodes are formed above a substrate 310. Specifically, a transistor 300 is formed on the substrate 310. Also, above the transistor 300, a transistor 200, an LED package 170R, an LED package 170G, and an LED package 170B are provided. Note that wiring is provided between the transistor 300 and the transistor 200 to electrically connect them (not shown). Also, as an example, the pixel layer PXAL includes the transistor 200, an LED package 170R, an LED package 170G, and an LED package 170B. Note that in this specification, the LED packages 170R, 170G, and 170B are collectively referred to as the LED package 170.

[0149] The substrate 310 corresponds to, for example, the substrate BS described in embodiment 1. Therefore, as described in embodiment 1, it is preferable to use a substrate that can be applied to the substrate BS as the substrate 310.

[0150] In particular, it is preferable that the substrate 310 block visible light (have non-transmittance to visible light). When the substrate 310 blocks visible light, it is possible to prevent light from entering the transistor 200 and the transistor 300 formed over the substrate 310 from the outside. However, one embodiment of the present invention is not limited thereto, and the substrate 310 may have transmissivity to visible light.

[0151] In addition, the substrate 310 may have one or both of a reflective layer that reflects light from the LED chips 180R, 180G, and 180B (light-emitting diodes) included in the LED package 170R, the LED package 170G, and the LED package 170B, respectively, and a light-shielding layer that blocks the light.

[0152] An LED chip is a light-emitting diode in which an electrode functioning as a cathode, an electrode functioning as an anode, a p-type semiconductor, an n-type semiconductor, and a light-emitting layer are provided on a substrate. ２ The following LEDs are micro LEDs, and the LED chip area is 10,000 μm ２ Larger than 1mm ２ The following LEDs are mini LEDs, with an area of ​​1mm ２ Larger light-emitting diodes may be referred to as macro light-emitting diodes. The area of ​​the LED chip here may be, for example, the area of ​​the upper or lower surface of the substrate 181 in Figures 11A, 11C, and 11D (described later). Alternatively, the area of ​​the LED chip may be, for example, the area of ​​the upper or lower surface of the electrode 183A in Figure 11B (described later).

[0153] For example, if the area of ​​the LED chip is 100 μm ２ The following light-emitting diodes can be called micro light-emitting diodes (micro LED chips). ２ As a light-emitting diode applicable to the LED package, a micro LED chip or a mini LED chip may be used in some cases.

[0154] In the display device of one aspect of the present invention, the LED package may be any of a micro light-emitting diode, a mini light-emitting diode, and a macro light-emitting diode. In particular, the display device of one aspect of the present invention preferably has a micro light-emitting diode or a mini light-emitting diode, and more preferably has a micro light-emitting diode.

[0155] In particular, the area of ​​the LED chip of the light-emitting diode is 1 mm２ Preferably, it is less than 10,000 μm ２ More preferably, 3000 μm or less ２ More preferably, 700 μm or less ２ The following is even more preferred:

[0156] The area of ​​the light-emitting diode's light-emitting region is 1 mm ２ Preferably, it is less than 10,000 μm ２ More preferably, 3000 μm or less ２ More preferably, 700 μm or less ２ The following is more preferable: The area of ​​the region from which light of the light emitting diode is emitted may be, for example, the area of ​​the upper or lower surface of the light emitting layer 184 in Figs. 11A to 11D described later.

[0157] In this embodiment, a micro light-emitting diode is used as the light-emitting diode. In this embodiment, a micro light-emitting diode having a double heterojunction is described. However, the light-emitting diode is not particularly limited, and for example, a micro light-emitting diode having a quantum well junction or a light-emitting diode using nanocolumns may be used.

[0158] The transistors included in the display device preferably have a metal oxide in a channel formation region. A transistor using a metal oxide can reduce power consumption. Therefore, by combining a metal oxide with a micro LED, a display device with extremely low power consumption can be realized.

[0159] As described in the first embodiment, the diagonal size of the display device DSP can be determined by the size of the substrate used for the substrate BS (substrate 310). In particular, by using a glass substrate, a metal substrate, or a base film, which can be easily enlarged, as the substrate used for the substrate BS (substrate 310), a display device DSP with a large diagonal size can be manufactured. In this specification, a large-area substrate refers to, for example, a substrate having a size equal to or larger than a second-generation substrate.

[0160] In this embodiment mode, the substrate 310 is described as a substrate made of a material with high heat resistance, such as a glass substrate.

[0161] Furthermore, when the area of ​​the substrate BS (substrate 310) is increased, the transistors 300 and 200 are preferably formed by a process that allows formation of the large-area substrate BS (substrate 310). Examples of transistors that can be formed on a large-area substrate include a transistor containing low-temperature polysilicon in a channel formation region (hereinafter referred to as an LTPS transistor) and an OS transistor.

[0162] The transistor 300 is provided on a substrate 310. The transistor 300 includes an insulator 311, an insulator 312, an insulator 313, an insulator 314, a conductor 316, a conductor 317, a low-resistance region 318p, a semiconductor region 318i, and a conductor 319. Here, the same hatching pattern is used to indicate multiple layers obtained by processing the same conductive film. In this specification, the low-resistance region 318p and the semiconductor region 318i are collectively referred to as a semiconductor layer 318. In particular, by using, for example, low-temperature polysilicon as the semiconductor material contained in the semiconductor layer 318, the transistor 300 can be an LTPS transistor. LTPS transistors have high field-effect mobility and favorable frequency characteristics.

[0163] By using an LTPS transistor as the transistor 300, the circuits included in the circuit layer SICL (for example, the drive circuits GD and SD shown in FIGS. 2B to 5 ) can be fabricated on the same substrate as the display unit, thereby simplifying the external circuits mounted on the display device and reducing component costs and mounting costs.

[0164] 9 , the conductor 317 functions as a first gate (sometimes referred to as a gate or a back gate) of the transistor 300. The conductor 316 functions as a second gate (sometimes referred to as the other gate or the back gate) of the transistor 300. One of the pair of low-resistance regions 318p of the semiconductor layer 318 functions as a source or a drain of the transistor 300, and the other of the pair of low-resistance regions 318p of the semiconductor layer 318 functions as the other of the source or the drain of the transistor 300. The insulator 313 functions as a first gate insulating film of the transistor 300, and the insulator 312 functions as a second gate insulating film of the transistor 300.

[0165] 9 , an insulator 311 is formed over a substrate 310. A conductor 316 is formed in a partial region on the insulator 311. An insulator 312 is formed to cover the insulator 311 and the conductor 316. A semiconductor layer 318 is formed to overlap with the conductor 316 and the insulator 312 and in a partial region on the insulator 312. An insulator 313 is formed to cover the insulator 312 and the semiconductor layer 318. A conductor 317 is formed to overlap with the conductor 316, the insulator 312, the semiconductor layer 318, and the insulator 313 and in a partial region on the insulator 313. An insulator 314 covers the insulator 313 and the conductor 317. In addition, openings are provided in the regions of the insulators 313 and 314 that overlap the low-resistance region 318p, and a conductor 319 is formed on the insulator 314 to fill the openings.

[0166] The insulators 311, 312, 313, and 314 can be formed using, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, or aluminum nitride.

[0167] In this specification and elsewhere, an oxynitride refers to a material whose composition contains more oxygen than nitrogen, and a nitride oxide refers to a material whose composition contains more nitrogen than oxygen. For example, silicon oxynitride refers to a material whose composition contains more oxygen than nitrogen, and silicon nitride oxide refers to a material whose composition contains more nitrogen than oxygen.

[0168] In particular, it is preferable to use a barrier insulating film for the insulator 311 that prevents impurities (e.g., certain metal ions, certain metal atoms, oxygen atoms, oxygen molecules, hydrogen atoms, hydrogen molecules, and water molecules) from diffusing from the region below the insulator 311 (e.g., the substrate 310).

[0169] Similarly, it is preferable to use a barrier insulating film for the insulator 314 that prevents impurities (e.g., specific metal ions, specific metal atoms, oxygen atoms, oxygen molecules, hydrogen atoms, hydrogen molecules, and water molecules) from diffusing from the region above the insulator 314 (e.g., the region where the transistor 200, the LED package 170R, the LED package 170G, and the LED package 170B are provided).

[0170] Therefore, it is preferable to use an insulating material for the insulators 311 and 314 that has a function of suppressing the diffusion of impurities such as specific metal ions, specific metal atoms, oxygen atoms, oxygen molecules, hydrogen atoms, hydrogen molecules, and water molecules (i.e., the impurities are less likely to permeate). Depending on the situation, the insulators 311 and 314 may contain nitrogen atoms, nitrogen molecules, and nitrogen oxide molecules (e.g., N ２ O, NO, or NO ２ ), it is preferable to use an insulating material that has a function of suppressing the diffusion of impurities such as copper atoms (that is, an insulating material that is difficult for the oxygen to permeate).

[0171] An example of a film having a barrier property against hydrogen is silicon nitride formed by a CVD (Chemical Vapor Deposition) method.

[0172] The amount of desorption of hydrogen can be analyzed using, for example, thermal desorption spectroscopy (TDS). For example, the amount of desorption of hydrogen from the insulator 311 or the insulator 314 is calculated by TDS as follows: when the surface temperature of the film is in the range of 50° C. to 500° C., the amount of desorption converted into hydrogen atoms is 10×10 per area of ​​the insulator 311 or the insulator 314. １５ atoms / cm ２ Below 5 × 10, preferably １５ atoms / cm ２ The following is fine.

[0173] As described above, the semiconductor layer 318 contains silicon. In particular, the silicon is preferably low-temperature polysilicon. That is, the transistor 300 is preferably an LTPS transistor.

[0174] However, since it is difficult to fabricate a p-type semiconductor using a metal oxide in terms of mobility and reliability, circuits formed with OS transistors are often n-channel unipolar circuits. On the other hand, since LTPS transistors can be easily fabricated as either n-channel or p-channel transistors, a CMOS circuit can be formed using LTPS transistors. As described in Embodiment 1, the circuit layer SICL has a driver circuit, and therefore, in terms of driving speed and power consumption, the driver circuit is preferably formed with a CMOS circuit rather than a unipolar circuit.

[0175] The low-resistance region 318p is a region containing an impurity element. For example, if the transistor 300 is an n-channel transistor, phosphorus or arsenic may be added to the low-resistance region 318p. On the other hand, if the transistor 300 is a p-channel transistor, boron or aluminum may be added to the low-resistance region 318p. Furthermore, the semiconductor region 318i may be doped with the above-mentioned impurities in order to control the threshold voltage of the transistor 300.

[0176] Note that the transistor 300 may be either a p-channel transistor or an n-channel transistor. Alternatively, a plurality of transistors 300 may be provided in the circuit layer SICL, and both p-channel transistors and n-channel transistors may be used.

[0177] The conductors 316 and 317 can be made of a metal such as aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten. Alternatively, the conductors 316 and 317 can be made of an alloy containing the above metal as a main component, in a single-layer structure or a stacked-layer structure. Alternatively, the conductors 316 and 317 can be made of a light-transmitting conductive material such as indium oxide, indium tin oxide (ITO), indium oxide containing tungsten, indium zinc oxide containing tungsten, indium oxide containing titanium, ITO containing titanium, indium zinc oxide, zinc oxide (ZnO), ZnO containing gallium, or indium tin oxide containing silicon. Alternatively, the conductors 316 and 317 can be made of a semiconductor such as polycrystalline silicon or an oxide semiconductor, or a silicide such as nickel silicide, which has a low resistance due to the inclusion of an impurity element or the like. Alternatively, a film containing graphene can be used for the conductor 316 and the conductor 317. A film containing graphene can be formed, for example, by reducing a film containing graphene oxide. A semiconductor such as an oxide semiconductor containing an impurity element may be used for the conductor 316 and the conductor 317. Alternatively, the conductor 316 and the conductor 317 may be formed using a conductive paste of silver, carbon, copper, or the like, or a conductive polymer such as polythiophene. A conductive paste is preferable because it is inexpensive. A conductive polymer is preferable because it is easy to apply.

[0178] The conductor 319 functions as a wiring electrically connected to the low-resistance region 318p of the transistor 300. That is, the conductor 319 functions as a source or drain of the transistor 300. Note that the conductor 319 can be formed using a material that can be used for the conductors 316 and 317.

[0179] Note that the transistor 300 illustrated in FIG. 9 is an example, and the structure is not limited to this example. An appropriate transistor may be used depending on the circuit configuration, driving method, and the like.

[0180] An insulator 320 and an insulator 322 are formed in this order on the insulator 314 .

[0181] For each of the insulators 320 and 322, for example, the material that can be used for any one of the insulators 311 to 314 can be used.

[0182] A plurality of transistors 200 are formed on the insulator 322. The plurality of transistors 200 can be manufactured using the same material and through the same process, for example.

[0183] Over the insulator 322, an insulator 211, an insulator 213, an insulator 215, and an insulator 214 are provided in this order. A part of the insulator 211 functions as a gate insulating layer of each transistor. A part of the insulator 213 functions as a gate insulating layer of each transistor. The insulator 215 is provided to cover the transistor. The insulator 214 is provided to cover the transistor and functions as a planarization layer. Note that the number of gate insulating layers and the number of insulating layers covering the transistors are not limited, and each may be a single layer or a stack of two or more layers.

[0184] At least one insulating layer covering the transistor is preferably made of a material that is resistant to the diffusion of impurities such as water and hydrogen. This allows the insulating layer to function as a barrier layer. With this structure, it is possible to effectively prevent impurities from diffusing into the transistor from the outside, thereby improving the reliability of the display device.

[0185] It is preferable to use an inorganic insulating film as each of the insulators 211, 213, and 215. Examples of the inorganic insulating film that can be used include a silicon nitride film, a silicon oxynitride film, a silicon oxide film, a silicon nitride oxide film, an aluminum oxide film, and an aluminum nitride film. Examples of the inorganic insulating film that can be used include a hafnium oxide film, an yttrium oxide film, a zirconium oxide film, a gallium oxide film, a tantalum oxide film, a magnesium oxide film, a lanthanum oxide film, a cerium oxide film, and a neodymium oxide film. The inorganic insulating film may be a stack of two or more of the above insulating films.

[0186] An organic insulating layer is suitable for the insulator 214, which functions as a planarization layer. Materials that can be used for the organic insulating layer include acrylic resin, polyimide resin, epoxy resin, polyamide resin, polyimideamide resin, siloxane resin, benzocyclobutene-based resin, phenolic resin, and precursors of these resins. The insulator 214 may also have a stacked structure of an organic insulating layer and an inorganic insulating layer. The outermost layer of the insulator 214 preferably functions as an etching protection layer. This can prevent recesses from being formed in the insulator 214 during processing of the conductors 111a to 111c and 112a to 112c, which will be described later. Alternatively, recesses may be formed in the insulator 214 during processing of the conductors 111a to 111c and 112a to 112c.

[0187] The plurality of transistors 200 each include a conductor 221 that functions as a gate, an insulator 211 that functions as a gate insulating layer, conductors 222a and 222b that function as a source and a drain, a semiconductor layer 231, an insulator 213 that functions as a gate insulating layer, and a conductor 223 that functions as a gate. Here, similar to the transistor 300, the same hatching pattern is applied to the plurality of layers obtained by processing the same conductive film. The insulator 211 is located between the conductor 221 and the semiconductor layer 231. The insulator 213 is located between the conductor 223 and the semiconductor layer 231.

[0188] The conductor 221, the conductor 222a, the conductor 222b, and the conductor 223 can each be made of, for example, a material that can be used for the conductor 316.

[0189] The structure of the transistor included in the display device of this embodiment is not particularly limited. For example, a planar transistor, a staggered transistor, an inverted staggered transistor, or the like can be used. Furthermore, either a top-gate transistor or a bottom-gate transistor structure may be used. Alternatively, gates may be provided above and below a semiconductor layer in which a channel is formed.

[0190] Each of the plurality of transistors 200 has a structure in which a semiconductor layer in which a channel is formed is sandwiched between two gates. The two gates may be connected and the same signal may be supplied to drive the transistor. Alternatively, the threshold voltage of the transistor may be controlled by applying a potential for controlling the threshold voltage to one of the two gates and a potential for driving the other.

[0191] The crystallinity of a semiconductor material used for a transistor is not particularly limited, and any of an amorphous semiconductor and a crystalline semiconductor (a microcrystalline semiconductor, a polycrystalline semiconductor, a single crystal semiconductor, or a semiconductor having a crystalline region in part) may be used. The use of a crystalline semiconductor is preferable because it can suppress deterioration of transistor characteristics.

[0192] The semiconductor layer of the transistor preferably includes a metal oxide (also referred to as an oxide semiconductor). That is, the display device of this embodiment preferably includes a transistor using a metal oxide for a channel formation region (hereinafter referred to as an OS transistor).

[0193] Examples of crystalline oxide semiconductors include c-axis-aligned crystalline (CAAC)-OS, nanocrystalline (nc)-OS, and the like.

[0194] An OS transistor has significantly higher field-effect mobility than a transistor using amorphous silicon. Furthermore, an OS transistor has significantly lower source-drain leakage current in an off state (hereinafter also referred to as off-state current), and can hold charge accumulated in a capacitor connected in series with the transistor for a long period of time. Furthermore, the use of an OS transistor can reduce the power consumption of a display device.

[0195] The off-state current of the OS transistor per 1 μm of channel width at room temperature is 1 aA (1×10 −１８ A) Below, 1zA (1×10 −２１ A) or less, or 1 yA (1 x 10 −２４ Note that the off-state current of a Si transistor per 1 μm of channel width at room temperature can be 1 fA (1×10 −１５ A) More than 1pA (1×10 −１２ Therefore, it can be said that the off-state current of an OS transistor is about 10 orders of magnitude lower than that of a Si transistor.

[0196] Furthermore, to increase the light emission luminance of the light-emitting diode included in the pixel circuit (the light-emitting diode included in the LED package 170), it is necessary to increase the amount of current flowing through the light-emitting diode. To achieve this, it is necessary to increase the source-drain voltage of the driving transistor included in the pixel circuit. Since an OS transistor has a higher source-drain withstand voltage than a Si transistor, a high voltage can be applied between the source and drain of the OS transistor. Therefore, by using an OS transistor as the driving transistor included in the pixel circuit, it is possible to increase the amount of current flowing through the light-emitting diode and increase the light emission luminance of the light-emitting diode.

[0197] Furthermore, when a transistor operates in the saturation region, an OS transistor can reduce the change in source-drain current with respect to a change in gate-source voltage compared to a Si transistor. Therefore, by using an OS transistor as a driving transistor included in a pixel circuit, the current flowing between the source and drain can be precisely controlled by changing the gate-source voltage, thereby controlling the amount of current flowing through the light-emitting diode. This allows for a larger gray scale in the pixel circuit.

[0198] Furthermore, in terms of saturation characteristics of the current that flows when a transistor operates in a saturation region, an OS transistor can pass a more stable current (saturation current) than a Si transistor, even when the source-drain voltage gradually increases. Therefore, by using an OS transistor as a driving transistor, a stable current can be passed through a light-emitting diode, for example, even when the current-voltage characteristics of the light-emitting diode vary. In other words, when an OS transistor operates in a saturation region, the source-drain current of the OS transistor remains almost unchanged even when the source-drain voltage increases, thereby stabilizing the light emission luminance of the light-emitting diode.

[0199] As described above, by using an OS transistor for a driving transistor included in a pixel circuit, it is possible to achieve "suppression of black floating," "increase in light emission luminance," "multiple gray levels," and "suppression of variations in light-emitting diodes."

[0200] The semiconductor layer included in the OS transistor preferably contains at least indium or zinc, and more preferably contains indium and zinc. For example, the semiconductor layer preferably contains indium, M (M is one or more selected from gallium, aluminum, yttrium, tin, silicon, boron, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and cobalt), and zinc. In particular, M is preferably one or more selected from gallium, aluminum, yttrium, and tin.

[0201] In particular, it is preferable to use an oxide containing indium (In), gallium (Ga), and zinc (Zn) (also referred to as IGZO) as the semiconductor layer. Alternatively, it is preferable to use an oxide containing indium, tin, and zinc. Alternatively, it is preferable to use an oxide containing indium, gallium, tin, and zinc. Alternatively, it is preferable to use an oxide containing indium (In), aluminum (Al), and zinc (Zn) (also referred to as IAZO). Alternatively, it is preferable to use an oxide containing indium (In), aluminum (Al), gallium (Ga), and zinc (Zn) (also referred to as IAGZO).

[0202] When the semiconductor layer is an In-M-Zn oxide, the atomic ratio of In in the In-M-Zn oxide is preferably equal to or greater than the atomic ratio of M. The atomic ratio of metal elements in such an In-M-Zn oxide may be In:M:Zn=1:1:1 or a composition thereabout, In:M:Zn=1:1:1.2 or a composition thereabout, In:M:Zn=1:3:2 or a composition thereabout, In:M:Zn=1:3:4 or a composition thereabout, In:M:Zn=2:1:3 or a composition thereabout, In:M:Zn=3:1:2 or a composition thereabout, or In:M:Zn=4:2:3. or a composition in the vicinity thereof, In:M:Zn = 4:2:4.1 or a composition in the vicinity thereof, In:M:Zn = 5:1:3 or a composition in the vicinity thereof, In:M:Zn = 5:1:6 or a composition in the vicinity thereof, In:M:Zn = 5:1:7 or a composition in the vicinity thereof, In:M:Zn = 5:1:8 or a composition in the vicinity thereof, In:M:Zn = 6:1:6 or a composition in the vicinity thereof, In:M:Zn = 5:2:5 or a composition in the vicinity thereof, etc. Note that a composition in the vicinity thereof includes a range of ±30% of the desired atomic ratio.

[0203] For example, when describing a composition having an atomic ratio of In:Ga:Zn=4:2:3 or thereabout, this includes a case where, when In is taken as 4, Ga is 1 to 3 and Zn is 2 to 4. Furthermore, when describing a composition having an atomic ratio of In:Ga:Zn=5:1:6 or thereabout, this includes a case where, when In is taken as 5, Ga is more than 0.1 and 2 or less and Zn is 5 to 7. Furthermore, when describing a composition having an atomic ratio of In:Ga:Zn=1:1:1 or thereabout, this includes a case where, when In is taken as 1, Ga is more than 0.1 and 2 or less and Zn is more than 0.1 and 2 or less.

[0204] The structure of the OS transistor is not limited to that shown in FIG. 9. For example, the structures shown in FIGS. 10A and 10B may be used.

[0205] The transistor 200A and the transistor 200B each include a conductor 221 that functions as a gate, an insulator 211 that functions as a gate insulating layer, a semiconductor layer 231 that has a channel formation region 231i and a pair of low-resistance regions 231n, a conductor 222a that connects to one of the pair of low-resistance regions 231n, a conductor 222b that connects to the other of the pair of low-resistance regions 231n, an insulator 225 that functions as a gate insulating layer, a conductor 223 that functions as a gate, and an insulator 215 that covers the conductor 223. The insulator 211 is located between the conductor 221 and the channel formation region 231i. The insulator 225 is located at least between the conductor 223 and the channel formation region 231i. Furthermore, an insulator 218 that covers the transistor may be provided.

[0206] 10A shows an example in which the insulator 225 covers the top surface and side surface of the semiconductor layer 231. The conductor 222a and the conductor 222b are connected to the low-resistance region 231n through openings provided in the insulator 225 and the insulator 215, respectively. One of the conductor 222a and the conductor 222b functions as a source, and the other functions as a drain.

[0207] 10B , the insulator 225 overlaps with the channel formation region 231i of the semiconductor layer 231 but does not overlap with the low-resistance region 231n. For example, the insulator 225 can be processed using the conductor 223 as a mask to form the structure shown in FIG. 10B . In FIG. 10B , the insulator 215 is provided to cover the insulator 225 and the conductor 223, and the conductors 222a and 222b are connected to the low-resistance region 231n through openings in the insulator 215.

[0208] 9 , an opening is provided in each region of the insulator 214 that overlaps with part of the multiple conductors 222b. In each opening, the conductor 111a, the conductor 111b, the conductor 111c, the conductor 112a, the conductor 112b, or the conductor 112c is provided on a part of the insulator 214, on a side surface of the opening, and on the conductor 222b that is the bottom surface of the opening.

[0209] The conductors 111a, 111b, and 111c function as common electrodes for the LED chips 180R, 180G, and 180B (light-emitting diodes) included in the LED packages 170R, 170G, and 170B, respectively. The conductors 112a, 112b, and 112c function as pixel electrodes for the LED chips 180R, 180G, and 180B (light-emitting diodes) included in the LED packages 170R, 170G, and 170B, respectively.

[0210] The conductors 111a to 111c and 112a to 112c can be made of, for example, aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten. The conductors 111a to 111c and 112a to 112c can be made of, for example, an alloy containing a metal selected from the materials listed above as its main component. The conductors 111a to 111c and 112a to 112c can be made of, for example, a single layer containing the materials listed above or an alloy, or a stack of two or more single layers. Specifically, for example, there are a single-layer structure of an aluminum film containing silicon, a two-layer structure in which an aluminum film is stacked on a titanium film, a two-layer structure in which an aluminum film is stacked on a tungsten film, a two-layer structure in which a copper film is stacked on a copper-magnesium-aluminum alloy film, a two-layer structure in which a copper film is stacked on a titanium film, a two-layer structure in which a copper film is stacked on a tungsten film, a three-layer structure in which a titanium film or titanium nitride film is stacked on top of an aluminum film or copper film, and a titanium film or titanium nitride film is further formed on top of that, and a three-layer structure in which a molybdenum film or molybdenum nitride film is stacked on top of an aluminum film or copper film, and a molybdenum film or molybdenum nitride film is further formed on top of that. Note that oxides such as indium oxide, tin oxide, or zinc oxide may also be used. Furthermore, using copper containing manganese is preferable because it improves the controllability of the shape by etching.

[0211] A protective layer 116 is provided over the insulator 214, the conductors 111a to 111c, and the conductors 112a to 112c. The protective layer 116 is formed so as to fill an opening of the insulator 214 whose bottom is the conductor 222b. In particular, the protective layer 116 is preferably provided so as to cover the end portions of the conductors 111a to 111c and the conductors 112a to 112c.

[0212] For example, a resin such as an acrylic resin, a polyimide resin, an epoxy resin, or a silicone resin is preferably used for the protective layer 116. Providing the protective layer 116 can prevent the conductors 117 and 118, which will be described later, from coming into contact with each other and short-circuiting. Note that, depending on the situation, the protective layer 116 does not necessarily have to be provided over the insulator 214, the conductors 111a to 111c, and the conductors 112a to 112c.

[0213] Openings are provided in regions of the protective layer 116 that overlap with portions of the conductors 111a to 111c and portions of the conductors 112a to 112c. A conductor 117 and a conductor 118 are provided over the protective layer 116. In particular, the conductor 117 is provided to fill the openings provided in the regions of the protective layer 116 that overlap with portions of the conductors 112a to 112c, and the conductor 118 is provided to fill the openings provided in the regions of the protective layer 116 that overlap with portions of the conductors 111a to 111c.

[0214] For the conductors 117 and 118, for example, conductive paste containing silver, carbon, or copper, or bumps containing gold or solder can be suitably used. Furthermore, for the conductors 112a to 112c (conductors 111a to 111c) electrically connected to the conductor 117 (conductor 118) and the electrode 172 (electrode 173) described later, a conductive material having low contact resistance with the conductor 117 (conductor 118) is preferably used. For example, when silver paste is used for the conductor 117 (conductor 118), aluminum, titanium, copper, or an alloy of silver, palladium, and copper (Ag—Pd—Cu(APC)) can be used as the conductive material for the conductors 112a to 112c (conductors 111a to 111c) and the electrode 172 (electrode 173) described later, the contact resistance with the conductor 117 (conductor 118) can be reduced.

[0215] An LED package 170R, an LED package 170G, and an LED package 170B are mounted on the conductor 117 and the conductor 118. Note that a specific configuration example of the LED package 170R, the LED package 170G, and the LED package 170B included in the display device 1000 of FIG. 9 is shown in FIG. 11A.

[0216] The LED package 170 in FIG. 11A includes a substrate 171 , an electrode 172 , an electrode 173 , a heat sink 174 , an adhesive layer 175 , a case 176 , a wire 177 , a wire 179 , a sealing layer 178 , a ball 189 , and an LED chip 180 .

[0217] The LED chip 180 includes a substrate 181, a semiconductor layer 182, an electrode 183, a light-emitting layer 184, a semiconductor layer 185, an electrode 186, and an electrode 187. In this specification and the like, the term "LED chip" can be used interchangeably with the term "light-emitting diode."

[0218] The substrate 171 may be, for example, a glass epoxy resin substrate, a polyimide substrate, a ceramic substrate, an alumina substrate, or an aluminum nitride substrate.

[0219] The electrodes 172 and 173 are formed on the upper, side, and lower surfaces of the substrate 171. In particular, the electrode 172 formed on the upper, side, and lower surfaces of the substrate 171 functions as one wiring, and similarly, the electrode 173 formed on the upper, side, and lower surfaces of the substrate 171 functions as another wiring. Note that there is no electrical connection between the electrodes 172 and 173.

[0220] The substrate 171 is also provided with a heat sink 174. The heat sink 174 has a function of dissipating heat generated by the LED chip 180, for example.

[0221] The electrode 172, the electrode 173, and the heat sink 174 can be made of the same material. For example, the electrode 172, the electrode 173, and the heat sink 174 can be made of an element selected from nickel, copper, silver, platinum, and gold, or an alloy material containing 50% or more of the element.

[0222] Furthermore, the electrode 172, the electrode 173, and the heat sink 174 can be formed in the same process.

[0223] The LED chip 180 is attached to the substrate 171 by an adhesive layer 175. Specifically, the substrate 181 of the LED chip 180 is provided so as to overlap the heat sink 174 provided on the substrate 171 via the adhesive layer 175. The material of the adhesive layer 175 is not particularly limited. For example, by using an electrically conductive adhesive as the material of the adhesive layer 175, the heat dissipation properties of the LED chip 180 can be improved.

[0224] The substrate 181 may be a single crystal substrate such as a sapphire substrate, a silicon carbide substrate, a silicon substrate, or a gallium nitride substrate.

[0225] In the LED chip 180, a semiconductor layer 182 is formed on a substrate 181. An electrode 183 is formed on a portion of the semiconductor layer 182, and a light-emitting layer 184 is formed on another portion of the semiconductor layer 182. A semiconductor layer 185 is formed on the light-emitting layer 184, an electrode 186 is formed on the semiconductor layer 185, and an electrode 187 is formed on a portion of the electrode 186.

[0226] In the LED chip 180, the light-emitting layer 184 is sandwiched between the semiconductor layer 182 and the semiconductor layer 185. In the light-emitting layer 184, electrons and holes combine to emit light. One of the semiconductor layer 182 and the semiconductor layer 185 is an n-type semiconductor layer, and the other of the semiconductor layer 182 and the semiconductor layer 185 is a p-type semiconductor layer.

[0227] Furthermore, in the light-emitting diodes included in the LED chips 180 of the LED packages 170R, 170G, and 170B mounted on the display device 1000 of FIG. 9 , a stacked structure having a pair of semiconductor layers and a light-emitting layer between the pair of semiconductor layers is formed to emit light of red, green, or blue. Therefore, the color of light emitted by the light-emitting diode can be freely determined for each of the LED chips 180 of the LED packages 170R, 170G, and 170B. For example, a gallium phosphide compound, a gallium arsenide compound, a gallium aluminum arsenide compound, an aluminum gallium indium phosphide compound, a gallium nitride, an indium gallium nitride compound, or a selenium zinc compound can be used for the stacked structure.

[0228] Furthermore, the color emitted by the light emitting diode included in the LED chip 180 of the LED package 170 can be cyan, magenta, yellow, or white, in addition to red, green, and blue.

[0229] Electrode 183 is electrically connected to electrode 172 via wire 177. That is, electrode 183 functions as a pixel electrode of the light-emitting diode. Electrode 187 is electrically connected to electrode 173 via wire 179. That is, electrode 187 functions as a common electrode of the light-emitting diode.

[0230] Examples of methods for joining electrode 183 and wire 177, electrode 172 and wire 177, electrode 187 and wire 179, and electrode 173 and wire 179 include wire bonding. Examples of wire bonding methods include thermocompression bonding and ultrasonic bonding. By the process of joining wire 177 and wire 179 using wire bonding, balls 189 made of the same material as wire 179 are formed on electrodes 172, 173, 183, and 187.

[0231] For the electrode 183, the electrode 186, and the electrode 187, it is preferable to use, for example, a material that can be used for the conductors 111a to 111c and the conductors 112a to 112c. In particular, because the light-emitting layer 184 of the LED chip 180 emits light upward from the LED package 170, it is preferable to use a light-transmitting conductive material for the electrode 186. The light-transmitting conductive material is preferably, for example, a light-transmitting conductive material that can be used for the conductors 111a to 111c and the conductors 112a to 112c. For the same reason, it is preferable to use a light-transmitting conductive material for the electrode 187.

[0232] The wires 177 and 179 may be thin wires made of metal such as gold, an alloy containing gold, copper, or an alloy containing copper.

[0233] The case 176 may be made of a resin. The case 176 need only cover the side surfaces of the sealing layer 178, and need not cover the top surface of the LED chip 180. That is, for example, the sealing layer 178 may be exposed on the top surface of the LED chip 180. It is also preferable to provide a reflector made of ceramic or the like on the inner side surface of the case 176, specifically, around the LED chip 180 (around the substrate 181, semiconductor layer 182, electrode 183, light-emitting layer 184, semiconductor layer 185, electrode 186, and electrode 187). Reflection of a portion of the light emitted from the light-emitting layer 184 of the LED chip 180 by the reflector allows more light to be extracted from the LED package 170.

[0234] The inside of the case 176 is filled with a sealing layer 178. For example, a resin that is transparent to visible light is preferably used for the sealing layer 178. Specifically, for example, an ultraviolet curable resin or a visible light curable resin such as an epoxy resin or a silicone resin can be used for the sealing layer 178.

[0235] Next, a description will be given of an example of the configuration of an LED package that is different from the LED package 170 in FIG. 11A and that can be applied to the LED package 170R, the LED package 170G, and the LED package 170B of the display device 1000.

[0236] 11B differs from the LED package 170 in that an LED chip 180A is provided on a substrate 171. The pixel electrode of the LED chip 180A is bonded to the electrode 172 by an adhesive layer 175 rather than by a wire 177.

[0237] The LED package 170A1 in FIG. 11B includes a substrate 171, an electrode 172, an electrode 173, an adhesive layer 175, a case 176, a wire 177, a wire 179, a sealing layer 178, a ball 189, and an LED chip 180A.

[0238] 11B , the LED chip 180A includes an electrode 183A and a light-emitting diode provided on the electrode 183A. The light-emitting diode includes a semiconductor layer 182, a light-emitting layer 184, a semiconductor layer 185, an electrode 186, and an electrode 187.

[0239] The electrode 183A may be made of, for example, a conductive substrate, such as a metal substrate.

[0240] Moreover, a semiconductor layer 182, a light-emitting layer 184, a semiconductor layer 185, an electrode 186, and an electrode 187 are formed in this order on the electrode 183A.

[0241] Note that the description of the LED package 170 in FIG. 11A should be referred to for the semiconductor layer 182, the light-emitting layer 184, the semiconductor layer 185, the electrode 186, and the electrode 187.

[0242] 11B , electrodes 172 and 173 are formed on the upper, side, and lower surfaces of substrate 171. In particular, electrode 172 is also formed in the region of substrate 171 where LED chip 180A is provided. The electrodes 172 formed on the upper, side, and lower surfaces of substrate 171 function as a single wire, and similarly, the electrodes 173 formed on the upper, side, and lower surfaces of substrate 171 function as another single wire. There is no electrical connection between electrodes 172 and 173.

[0243] The LED chip 180A is attached to the substrate 171 by an adhesive layer 175. Specifically, the electrode 183A of the LED chip 180A is provided so as to overlap a partial area of ​​the electrode 172 provided on the substrate 171 via the adhesive layer 175. The adhesive layer 175 is made of a conductive adhesive.

[0244] As described above, when using an LED chip 180A in which a light-emitting diode is formed on a conductive substrate, an LED package 170A2 can be constructed by joining the pixel electrode of the LED chip 180A and the electrode 172 of the substrate 171 using an adhesive layer 175 instead of a wire 177.

[0245] Next, an example of the configuration of an LED package that is different from the LED package 170 in FIG. 11A and the LED package 170A1 in FIG. 11B and that can be applied to the LED package 170R, the LED package 170G, and the LED package 170B of the display device 1000 will be described.

[0246] The LED package 170A2 shown in FIG. 11C differs from the LED package of FIG. 11A in that a color conversion layer 190 is provided inside the case 176.

[0247] 11C shows a configuration in which the color conversion layer 190 is provided above the sealing layer 178, the arrangement of the color conversion layer 190 is not limited to this. For example, the color conversion layer 190 may be dispersed inside the sealing layer 178.

[0248] It is preferable to use a phosphor or quantum dots (QDs) as the color conversion layer 190. Quantum dots, in particular, have a narrow peak width in the emission spectrum, and can produce light with good color purity. By using quantum dots in the color conversion layer 190, the display quality of the display device 1000 can be improved.

[0249] The color conversion layer 190 has the function of converting light emitted from the light emitting layer 184 included in the LED chip 180 of the LED package 170A2 into light of a different color.

[0250] The color conversion layer 190 may be, for example, a color conversion layer that converts blue light to green light, or a color conversion layer that converts blue light to red light. For example, when a blue light-emitting diode is provided in a red subpixel, the blue light emitted from the blue light-emitting diode is converted into red light through the color conversion layer 190 and emitted above the case 176, i.e., to the outside of the display device 1000. Furthermore, when a blue light-emitting diode is provided in a green subpixel, the blue light emitted from the blue light-emitting diode is converted into green light through the color conversion layer 190 and emitted above the case 176, i.e., to the outside of the display device 1000.

[0251] The color conversion layer 190 can be formed using a droplet ejection method (e.g., an inkjet method), a coating method, an imprinting method, or various printing methods (screen printing or offset printing). Furthermore, the color conversion layer 190 can be formed using a color conversion film such as a quantum dot film.

[0252] As the phosphor, an organic resin layer on the surface of which a phosphor is printed or painted, or an organic resin layer in which a phosphor is mixed can be used.

[0253] The material constituting the quantum dots is not particularly limited, and examples thereof include a Group 14 element, a Group 15 element, a Group 16 element, a compound consisting of multiple Group 14 elements, a compound of an element belonging to Groups 4 to 14 and a Group 16 element, a compound of a Group 2 element and a Group 16 element, a compound of a Group 13 element and a Group 15 element, a compound of a Group 13 element and a Group 17 element, a compound of a Group 14 element and a Group 15 element, a compound of a Group 11 element and a Group 17 element, iron oxides, titanium oxides, chalcogenide spinels, and semiconductor clusters.

[0254] Specifically, cadmium selenide, cadmium sulfide, cadmium telluride, zinc selenide, zinc oxide, zinc sulfide, zinc telluride, mercury sulfide, mercury selenide, mercury telluride, indium arsenide, indium phosphide, gallium arsenide, gallium phosphide, indium nitride, gallium nitride, indium antimonide, gallium antimonide, aluminum phosphide, aluminum arsenide, aluminum antimonide, lead selenide, lead telluride, lead sulfide, indium selenide, terephthalic acid, Indium sulfide, indium sulfide, gallium selenide, arsenic sulfide, arsenic selenide, arsenic telluride, antimony sulfide, antimony selenide, antimony telluride, bismuth sulfide, bismuth selenide, bismuth telluride, silicon, silicon carbide, germanium, tin, selenium, tellurium, boron, carbon, phosphorus, boron nitride, boron phosphide, boron arsenide, aluminum nitride, aluminum sulfide, barium sulfide, barium selenide, barium telluride, calcium sulfide, selenide Calcium, calcium telluride, beryllium sulfide, beryllium selenide, beryllium telluride, magnesium sulfide, magnesium selenide, germanium sulfide, germanium selenide, germanium telluride, tin sulfide, tin selenide, tin telluride, lead oxide, copper fluoride, copper chloride, copper bromide, copper iodide, copper oxide, copper selenide, nickel oxide, cobalt oxide, cobalt sulfide, iron oxide, iron sulfide, manganese oxide, molybdenum sulfide, vanadium oxide, tungsten oxide, tungsten oxide Examples of the quantum dots include talc, titanium oxide, zirconium oxide, silicon nitride, germanium nitride, aluminum oxide, barium titanate, a compound of selenium, zinc, and cadmium, a compound of indium, arsenic, and phosphorus, a compound of cadmium, selenium, and sulfur, a compound of cadmium, selenium, and tellurium, a compound of indium, gallium, and arsenic, a compound of indium, gallium, and selenium, a compound of indium, selenium, and sulfur, a compound of copper, indium, and sulfur, and combinations thereof. Also, so-called alloy-type quantum dots, whose composition is expressed in any ratio, may be used.

[0255] Quantum dot structures include core, core-shell, and core-multishell types. Quantum dots have a high proportion of surface atoms, making them highly reactive and prone to aggregation. Therefore, it is preferable that a protective agent or protective group is attached to the surface of the quantum dots. By attaching the protective agent or providing the protective group, aggregation can be prevented and solubility in a solvent can be increased. It is also possible to reduce reactivity and improve electrical stability.

[0256] Since the band gap of quantum dots increases as their size (diameter) decreases, their size can be adjusted appropriately to obtain light of the desired wavelength. As the crystal size decreases, the emission of quantum dots shifts toward the blue side, i.e., toward higher energy. Therefore, by changing the size of the quantum dots, the emission wavelength can be adjusted across the wavelength range of the ultraviolet, visible, or infrared spectrum. The size (diameter) of the quantum dots is, for example, 0.5 nm or more and 20 nm or less, preferably 1 nm or more and 10 nm or less. The narrower the size distribution of quantum dots, the narrower the emission spectrum, and the more excellent the color purity of the light emitted. Furthermore, the shape of the quantum dots is not particularly limited and may be spherical, rod-shaped, disc-shaped, or other shapes. Quantum rods, which are rod-shaped quantum dots, have the function of emitting directional light.

[0257] Alternatively, the LED package 170A2 may have a layered structure of a color conversion layer 190 and a colored layer inside or above it. This allows light converted by the color conversion layer 190 to pass through the colored layer, thereby increasing the purity of the light. A colored layer of the same color as the color of light emitted by the light-emitting layer 184 may be provided at a position overlapping the LED chip 180 (substrate 181, semiconductor layer 182, electrode 183, light-emitting layer 184, semiconductor layer 185, electrode 186, and electrode 187). Providing a colored layer of the same color can increase the purity of the light emitted by the light-emitting layer 184. Furthermore, not providing a colored layer in the LED package 170A2 can simplify the manufacturing process.

[0258] The colored layer is a colored layer that transmits light in a specific wavelength range. For example, a color filter that transmits light in the red, green, blue, or yellow wavelength range can be used. Materials that can be used for the colored layer include metal materials, resin materials, and resin materials containing pigments or dyes.

[0259] As described above, by providing a color conversion layer above the LED chip 180, light with good color purity can be emitted from the LED package 170A2.

[0260] Next, an example of the configuration of an LED package that is different from the LED package 170 in FIG. 11A, the LED package 170A1 in FIG. 11B, and the LED package 170A2 in FIG. 11C and that can be applied to the LED package 170R, the LED package 170G, and the LED package 170B of the display device 1000 will be described.

[0261] The LED package 170A3 shown in FIG. 11D differs from the LED package 170 in FIG. 11A in that the substrate 181 of the LED chip 180 provided on the substrate 171 is located above the electrodes 183 and 187.

[0262] In this configuration, the substrate 181 is preferably light-transmitting so that light from the light-emitting layer 184 is emitted above the LED package 170A3.

[0263] 11D , electrodes 183 and 187 of LED chip 180 face toward substrate 171, and therefore electrodes 183 and 172 and electrodes 187 and 173 are joined by conductors functioning as bumps rather than by wires. Specifically, electrodes 183 and 172 are joined by conductor 191, and electrodes 187 and 173 are joined by conductor 192.

[0264] Note that the conductor 191 and the conductor 192 can each be formed using a material that can be used for the conductor 117 or the conductor 118 .

[0265] Next, the number of LED chips 180 that can be provided in the LED package 170 will be described. Fig. 12A is an example of a plan view of the LED package 170 in Fig. 11A . Note that Fig. 12A also shows the substrate 181, which is a component of the LED chip 180. While the above description has been given using an example of a configuration in which the LED package 170 has one LED chip 180 on the substrate 171 as shown in Fig. 12A , one aspect of the present invention is not limited to this. For example, the LED package 170 may have a configuration in which multiple LED chips, rather than one, are provided on the substrate 171.

[0266] 12B shows, as an example, the configuration of an LED package 170S in which three LED chips, 180R, 180G, and 180B, are provided on a substrate 171. Note that FIG. 12B also shows a substrate 181R, which is a component of the LED chip 180R, a substrate 181G, which is a component of the LED chip 180G, and a substrate 181B, which is a component of the LED chip 180B. The light-emitting diodes included in the LED chips 180R, 180G, and 180B provided in the LED package 170S may have light-emitting layers that emit different colors. For example, by providing a light-emitting diode that emits red light on the substrate 181R, a light-emitting diode that emits green light on the substrate 181G, and a light-emitting diode that emits blue light on the substrate 181B, the LED package 170S can emit light of three colors: red, green, and blue.

[0267] In the LED package 170, LED package 170A1, LED package 170A2, and LED package 170S described above, the light-emitting diodes (LED chip 180R, LED chip 180G, and LED chip 180B) may be driven by transistors of the same configuration or by transistors of different configurations. For example, in the display device 1000 of FIG. 9 , the transistor driving LED chip 180R included in LED package 170R, the transistor driving LED chip 180G included in LED package 170G, and the transistor driving LED chip 180B included in LED package 170B may differ from each other in at least one of the transistor size, channel length, channel width, and structure. Specifically, one or both of the channel length and channel width of the transistor may be changed for each color depending on the amount of current required to emit light at a desired brightness.

[0268] In the display device 1000 of FIG. 9 , the upper surface of the protective layer 116, the upper and side surfaces of the conductor 117, the upper and side surfaces of the conductor 118, and the respective side surfaces of the LED package 170R, the LED package 170G, and the LED package 170B may be covered with a resin layer 148. Using a black resin for the resin layer 148 can enhance the display contrast of the display device 1000. Furthermore, one or both of a surface protective layer and an impact absorbing layer may be provided on one or more selected from the upper surface of the resin layer 148 and the upper surfaces of the LED package 170R, the LED package 170G, and the LED package 170B. Furthermore, because the LED package 170R, the LED package 170G, and the LED package 170B are configured to emit light upward, it is preferable that the layers provided on the upper surfaces of the LED package 170R, the LED package 170G, and the LED package 170B be transparent to visible light.

[0269] In the LED package 170R, the LED package 170G, and the LED package 170B, all of the conductors 112a to 112c, the conductor 117, and the electrode 172 may be referred to as pixel electrodes. Also, some of the conductors 112a to 112c, the conductor 117, and the electrode 172 may be referred to as pixel electrodes.

[0270] Note that the display device of one embodiment of the present invention is not limited to the configuration of the display device 1000 illustrated in Fig. 9. The display device of one embodiment of the present invention may have a configuration of the display device 1000 illustrated in Fig. 9 that is modified within the scope of solving the problems of the present invention.

[0271] For example, a display device according to one embodiment of the present invention may have a structure in which a substrate on which a plurality of light-emitting diodes are formed is attached to the upper side of the substrate 310, instead of a structure in which a plurality of LED packages 170 are mounted above the substrate 310.

[0272] Fig. 13A shows, as an example, a display device 1001 in which a substrate 410 on which a plurality of light-emitting diodes are formed is bonded to a structure in which the protective layer 116 of the display device 1000 in Fig. 9 has been formed (hereinafter, this structure will be referred to as a laminate SST). Fig. 13B also shows the substrate 410 on which a plurality of light-emitting diodes are formed.

[0273] 13A and 13B show a plurality of light-emitting diodes, including a light-emitting diode 420R, a light-emitting diode 420G, and a light-emitting diode 420B. The light-emitting diodes 420R, 420G, and 420B may be collectively referred to as light-emitting diodes 420.

[0274] For example, the light-emitting diode 420R includes an electrode 183a, a semiconductor layer 182a, a light-emitting layer 184a, a semiconductor layer 185a, and an electrode 186a. For example, the light-emitting diode 420G includes an electrode 183b, a semiconductor layer 182b, a light-emitting layer 184b, a semiconductor layer 185b, and an electrode 186b. For example, the light-emitting diode 420B includes an electrode 183c, a semiconductor layer 182c, a light-emitting layer 184c, a semiconductor layer 185c, and an electrode 186c.

[0275] 13B , semiconductor layers 185a to 185c are formed on the substrate 410. Light-emitting layers 184a to 184c are formed in partial regions on the semiconductor layers 185a to 185c, respectively. The semiconductor layer 182a is formed on the light-emitting layer 184a, the semiconductor layer 182b is formed on the light-emitting layer 184b, and the semiconductor layer 182c is formed on the light-emitting layer 184c. A protective layer 411 is formed so as to cover the top surface of the substrate 410, the top surfaces and side surfaces of the semiconductor layers 185a to 185c, the side surfaces of the light-emitting layers 184a to 184c, and the top surfaces and side surfaces of the semiconductor layers 182a to 182c.

[0276] An opening is provided in the protective layer 411 in a region overlapping with part of the semiconductor layer 182a, and an electrode 183a is formed to cover part of the protective layer 411 and the upper surface of the semiconductor layer 182a, which is the bottom of the opening. Similarly, an opening is provided in the protective layer 411 in a region overlapping with part of the semiconductor layer 182b, and an electrode 183b is formed to cover part of the protective layer 411 and the upper surface of the semiconductor layer 182b, which is the bottom of the opening. Similarly, an opening is provided in the protective layer 411 in a region overlapping with part of the semiconductor layer 182c, and an electrode 183c is formed to cover part of the protective layer 411 and the upper surface of the semiconductor layer 182c, which is the bottom of the opening.

[0277] Furthermore, an opening is provided in the protective layer 411 in a region that does not overlap with the semiconductor layer 182a and the light-emitting layer 184a but overlaps with a portion of the semiconductor layer 185a, and an electrode 186a is formed to cover a portion of the protective layer 411 and the semiconductor layer 185a, which is the bottom surface of the opening. Similarly, an opening is provided in the protective layer 411 in a region that does not overlap with the semiconductor layer 182b and the light-emitting layer 184b but overlaps with a portion of the semiconductor layer 185b, and an electrode 186b is formed to cover a portion of the protective layer 411 and the semiconductor layer 185b, which is the bottom surface of the opening. Similarly, an opening is provided in the protective layer 411 in a region that does not overlap with the semiconductor layer 182c and the light-emitting layer 184c but overlaps with a portion of the semiconductor layer 185c, and an electrode 186c is formed to cover a portion of the protective layer 411 and the semiconductor layer 185c, which is the bottom surface of the opening.

[0278] The display device 1001 is a top-emission type. Light emitted by the light-emitting diode 420R, the light-emitting diode 420G, and the light-emitting diode 420B is emitted toward the substrate 410. Therefore, it is preferable to use a material that is highly transparent to visible light for the substrate 410. For example, a substrate that is highly transparent to visible light may be selected for the substrate 410 from among substrates that can be used for the substrate BS.

[0279] As shown in FIGS. 13A and 13B , the light-emitting layer 184a is sandwiched between the semiconductor layers 182a and 185a. In the light-emitting layer 184a, electrons and holes recombine to emit light. One of the semiconductor layers 182a and 185a is an n-type semiconductor layer, and the other of the semiconductor layers 182a and 185a is a p-type semiconductor layer. Similarly, the light-emitting layer 184b is sandwiched between the semiconductor layers 182b and 185b. In the light-emitting layer 184b, electrons and holes recombine to emit light. One of the semiconductor layers 182b and 185b is an n-type semiconductor layer, and the other of the semiconductor layers 182b and 185b is a p-type semiconductor layer. Similarly, the light-emitting layer 184c is sandwiched between the semiconductor layers 182c and 185c. In the light emitting layer 184c, electrons and holes are combined to emit light. One of the semiconductor layers 182c and 185c is an n-type semiconductor layer, and the other of the semiconductor layers 182c and 185c is a p-type semiconductor layer.

[0280] Furthermore, in each of the light-emitting diodes 420R, 420G, and 420B mounted on the display device 1001 of FIG. 13A , a stacked structure including a pair of semiconductor layers and a light-emitting layer between the pair of semiconductor layers is formed to emit light of red, green, or blue. Therefore, the color of light emitted by each of the light-emitting diodes 420R, 420G, and 420B can be freely determined. For example, the light-emitting diode 420R can be a red light-emitting diode, the light-emitting diode 420G can be a green light-emitting diode, and the light-emitting diode 420B can be a blue light-emitting diode. Furthermore, the stacked structure can be the same as that applicable to the light-emitting diodes included in the LED package 170 of FIG. 9 .

[0281] Furthermore, the color emitted by the light emitting diode 420 can be cyan, magenta, yellow, or white, in addition to red, green, and blue.

[0282] The protective layer 411 may be made of, for example, an inorganic insulating film or an organic insulating film that can be used for the insulator 105. The protective layer 411 may also be made of, for example, a material that can be used for the sealing layer 178 of the LED package 170 in FIG.

[0283] The substrate 410 is attached to the laminate SST using conductors 193a to 193c and conductors 194a to 194c, which function as bumps. Specifically, the conductor 112a provided in the laminate SST and the electrode 183a of the light-emitting diode 420R are joined via the conductor 194a, the conductor 111a provided in the laminate SST and the electrode 186a of the light-emitting diode 420R are joined via the conductor 193a, and the conductor 112b provided in the laminate SST and the electrode 183b of the light-emitting diode 420G are joined via the conductor 194b. The conductor 111b provided in the laminate SST and the electrode 186b of the light-emitting diode 420G are joined via the conductor 193b, the conductor 112c provided in the laminate SST and the electrode 183c of the light-emitting diode 420B are joined via the conductor 194c, and the conductor 111c provided in the laminate SST and the electrode 186c of the light-emitting diode 420B are joined via the conductor 193c.

[0284] Note that the conductors 193a to 193c and the conductors 194a to 194c can be formed using a material that can be used for the conductor 117 or the conductor 118.

[0285] 11C may be used in the display device 1001. Specifically, by providing the color conversion layer 190 on the path of light emitted from the light emitting diode 420R, the light emitting diode 420G, and the light emitting diode 420B and between the substrate 410 and at least one of the semiconductor layers 185a to 185c, the color of the light emitted from the light emitting layer can be converted into another color by the color conversion layer 190.

[0286] Here, for example, a case will be considered in which light-emitting diodes 420R, 420G, and 420B are light-emitting diodes that emit blue light. Display device 1001A shown in Fig. 14 is a modified version of display device 1001 shown in Fig. 13A, and includes colored layer 167R, color conversion layer 190a, colored layer 167G, color conversion layer 190b, and adhesive layer 108 on substrate 410.

[0287] Specifically, colored layer 167R and color conversion layer 190a are formed in this order on substrate 410 in an area overlapping light-emitting diode 420R. Also, colored layer 167G and color conversion layer 190b are formed in this order on substrate 410 in an area overlapping light-emitting diode 420G. Also, adhesive layer 108 is provided to cover substrate 410, colored layer 167R, color conversion layer 190a, colored layer 167G, and color conversion layer 190b.

[0288] On the adhesive layer 108, the light emitting diode 420R, the light emitting diode 420G, and the light emitting diode 420B described in the display device 1001 of FIG. 13A are provided.

[0289] Specifically, semiconductor layers 185a to 185c are provided in a partial region on the adhesive layer 108. Furthermore, a light-emitting layer 184a and a semiconductor layer 185a are provided in this order in a region of the semiconductor layer 185a that overlaps with the coloring layer 167R and the color conversion layer 190a, and a light-emitting layer 184b and a semiconductor layer 185b are provided in this order in a region of the semiconductor layer 185b that overlaps with the coloring layer 167G and the color conversion layer 190b. Furthermore, a light-emitting layer 184c and a semiconductor layer 185c are provided in this order in a partial region on the semiconductor layer 185c. A protective layer 411 is formed so as to cover the top surface of the adhesive layer 108, the top and side surfaces of the semiconductor layers 185a to 185c, the side surfaces of the light-emitting layers 184a to 184c, and the top and side surfaces of the semiconductor layers 182a to 182c.

[0290] 13A , an opening is provided in the protective layer 411 in a region overlapping with a portion of the semiconductor layer 182a, and an electrode 183a is formed to cover a portion of the protective layer 411 and the upper surface of the semiconductor layer 182a, which is the bottom surface of the opening. Similarly, an opening is provided in the protective layer 411 in a region overlapping with a portion of the semiconductor layer 182b, and an electrode 183b is formed to cover a portion of the protective layer 411 and the upper surface of the semiconductor layer 182b, which is the bottom surface of the opening. Similarly, an opening is provided in the protective layer 411 in a region overlapping with a portion of the semiconductor layer 182c, and an electrode 183c is formed to cover a portion of the protective layer 411 and the upper surface of the semiconductor layer 182c, which is the bottom surface of the opening.

[0291] 13A , an opening is provided in the protective layer 411 in a region that does not overlap with the semiconductor layer 182a and the light-emitting layer 184a and overlaps with a portion of the semiconductor layer 185a, and an electrode 186a is formed to cover a portion of the protective layer 411 and the semiconductor layer 185a, which is the bottom surface of the opening. Similarly, an opening is provided in the protective layer 411 in a region that does not overlap with the semiconductor layer 182b and the light-emitting layer 184b and overlaps with a portion of the semiconductor layer 185b, and an electrode 186b is formed to cover a portion of the protective layer 411 and the semiconductor layer 185b, which is the bottom surface of the opening. Similarly, an opening is provided in the protective layer 411 in a region that does not overlap with the semiconductor layer 182c and the light-emitting layer 184c and overlaps with a portion of the semiconductor layer 185c, and an electrode 186c is formed to cover a portion of the protective layer 411 and the semiconductor layer 185c, which is the bottom surface of the opening.

[0292] Here, color conversion layer 190a has the function of converting blue light to red light, and color conversion layer 190b has the function of converting blue light to green light. Furthermore, coloring layer 167R is a colored layer that transmits light in the red wavelength range, and coloring layer 167G is a colored layer that transmits light in the green wavelength range. As a result, blue light emitted from light-emitting diode 420R is converted into red light by color conversion layer 190a, and the red light, whose color purity has been further enhanced by coloring layer 167R, is emitted to the outside of display device 1001A. Similarly, blue light emitted from light-emitting diode 420G is converted into green light by color conversion layer 190b, and the green light, whose color purity has been further enhanced by coloring layer 167G, is emitted to the outside of display device 1001A.

[0293] As shown in FIGS. 13A and 14 , one embodiment of the present invention can be a display device in which a substrate provided with a transistor and a substrate provided with a light-emitting diode are bonded to each other with a bump or the like.

[0294] Furthermore, for example, various optical members can be arranged on each surface of the resin layer 148, the LED package 170R, the LED package 170G, and the LED package 170B of the display device 1000. Examples of optical members include a polarizing plate, a retardation plate, a light diffusion layer (such as a diffusion film), an anti-reflection layer, and a light-collecting film. Furthermore, a surface protection layer such as an anti-static film that suppresses the adhesion of dust, a water-repellent film that makes it difficult for dirt to adhere, a hard coat film that suppresses the occurrence of scratches during use, or an impact absorbing layer may be arranged on each surface of the resin layer 148, the LED package 170R, the LED package 170G, and the LED package 170B of the display device 1000. For example, a glass layer or a silica layer (SiO ｘ The surface protection layer can be preferably formed of a material such as DLC (diamond-like carbon), aluminum oxide (AlO ｘ), polyester-based materials, or polycarbonate-based materials may also be used. Note that it is preferable to use a material with high transmittance to visible light for the surface protection layer. It is also preferable to use a material with high hardness for the surface protection layer.

[0295] 9 may be provided with a panel having a touch sensor function (sometimes referred to as a touch panel), as shown in a display device 1000A in FIG. 15 . The display device 1000A in FIG. 15 is configured such that a plurality of sensor units 700 are provided on a resin layer 148 and an LED package 170. Specifically, the display device 1000A is configured such that an insulator 103, a conductor 104, an insulator 105, and a conductor 106 are formed in this order on the resin layer 148 and the LED package 170. The display device 1000A is also configured such that the insulator 105 and the conductor 106 are bonded to the substrate 110 via an adhesive layer 107. That is, the sensor unit 700 includes the conductor 104, the insulator 105, and the conductor 106.

[0296] In the display device 1000A in FIG. 15, a layer including a plurality of sensor units 700 is illustrated as a touch sensor layer TP.

[0297] The insulator 103 preferably includes an inorganic insulating material, for example, an oxide or nitride such as silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, or hafnium oxide.

[0298] The conductors 104 and 106 function as electrodes of the touch sensor. When a mutual capacitance type touch sensor is used, for example, a configuration may be adopted in which a pulse potential is applied to one of the conductors 104 and 106, and a detection circuit such as an analog-to-digital (A-D) conversion circuit or a sense amplifier is connected to the other. In this case, capacitance is formed between the conductors 104 and 106. When a finger or the like approaches, the magnitude of the capacitance changes (specifically, the capacitance decreases). This change in capacitance appears as a change in the amplitude of a signal generated at the other of the conductors 104 and 106 when a pulse potential is applied to the other. This makes it possible to detect contact and proximity of a finger or the like.

[0299] The conductor 104 and the conductor 106 can each be made of, for example, a material that can be used for the conductor 316 or the conductor 317 .

[0300] When the conductor 104 and the conductor 106 are made of a material that is difficult to transmit visible light (having low transmittance of visible light, high absorbance of visible light, or high reflectance of visible light), the conductor 104 and the conductor 106 are preferably provided in a region between adjacent LED packages 170 so as not to block visible light from the LED packages 170. When the conductor 104 and the conductor 106 are light-transmitting, the regions in which the conductor 104 and the conductor 106 are provided are not limited to those described above.

[0301] The insulator 105 can be an inorganic insulating film or an organic insulating film. For example, the insulator 105 can be made of a resin such as an acrylic resin or an epoxy resin. The insulator 105 can also be made of an inorganic insulating material such as silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, or aluminum oxide. The insulator 105 may have a single layer structure or a stacked structure.

[0302] The adhesive layer 107 can be made of various curable adhesives, such as photo-curable adhesives (e.g., ultraviolet curable), reactive curable adhesives, thermosetting adhesives, or anaerobic adhesives. Examples of such adhesives include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, and EVA (ethylene vinyl acetate) resin. In particular, materials with low moisture permeability, such as epoxy resin, are preferred. Two-component resins may also be used. Adhesive sheets, etc. may also be used.

[0303] Although the display device 1000A in FIG. 15 has a configuration using a mutual capacitance touch sensor, one embodiment of the present invention is not limited to this. For example, in one embodiment of the present invention, a light-receiving device (also referred to as a photodiode or a photoelectric conversion element) that receives light and generates a current may be used in place of the sensor unit 700 in the display device 1000A. As a result, for example, when a finger touches the substrate 110, the light-receiving device receives light reflected from the finger and can detect the contact and proximity of the finger with the display unit of the display device 1000A. The light-receiving device may receive visible light and generate a current, or may receive infrared light (also referred to as IR) and generate a current. In this case, the display device 1000A may include a light-emitting device (including a light-emitting diode) that emits light for receiving light (visible light or infrared light).

[0304] The display device 1000A is a top-emission type. Light emitted from the LED package 170 is emitted toward the substrate 110. Therefore, it is preferable to use a material that is highly transparent to visible light for the substrate 110. For example, a substrate that is highly transparent to visible light may be selected for the substrate 110 from among substrates that can be used for the substrate BS.

[0305] 9 may include a color layer (color filter), for example. The display device 1000C of FIG. 16 is configured, for example, such that the upper surface of the protective layer 116, the upper and side surfaces of the conductor 117, the upper and side surfaces of the conductor 118, the upper and side surfaces of the LED package 170R, the upper and side surfaces of the LED package 170G, and the side surfaces and upper surfaces of the LED package 170B are covered with a resin layer 149. The display device 1000C is also configured, for example, such that color layers 166R, 166G, and 166B are included between the resin layer 149 and the substrate 110. The color layers 166R, 166G, and 166B may be formed on the substrate 110 side or on the resin layer 149 side. Furthermore, when LED package 170R emits red (R) light, LED package 170G emits green (G) light, and LED package 170B emits blue (B) light, it is preferable that coloring layer 166R be red, coloring layer 166G be green, and coloring layer 166B be blue.

[0306] As described above, by applying a light-emitting diode to the pixel PX of the display device DSP described in Embodiments 1 and 2, a display device having high luminance and a longer life span than an OLED can be manufactured.

[0307] Note that the display device of one embodiment of the present invention is not limited to the configuration of the display device 1000 illustrated in Fig. 9. The configuration of the display device of one embodiment of the present invention may be changed as appropriate within the scope of solving the problems, or may be combined as appropriate with the configurations described in this specification and the like.

[0308] For example, instead of the layer structure in which two transistors are stacked, a display device may have a layer structure in which three or more transistors are stacked.

[0309] <Configuration Example of Pixel Circuit> Here, a configuration example of a pixel circuit that can be provided in the pixel layer PXAL will be described.

[0310] 17A and 17B show a configuration example of a pixel circuit that can be provided in the pixel layer PXAL and a light-emitting diode 420 connected to the pixel circuit. Also, FIG. 17A is a diagram showing the connections of each circuit element included in the pixel circuit 500 provided in the pixel layer PXAL, and FIG. 17B is a diagram schematically showing the hierarchical relationship of a circuit layer SICL including a drive circuit 30 and the like, a layer OSL including multiple transistors of the pixel circuit, and a layer EML including a light-emitting diode 420. Note that the pixel layer PXAL of the display device 1000 (display device 1001) shown in FIG. 17B includes, as an example, a layer OSL and a layer EML. Also, the transistors 200A, 200B, and 200C included in the layer OSL shown in FIG. 17B correspond to the transistors 200 in FIGS. 9 and 13 . Furthermore, the light-emitting diode 420 included in the layer EML shown in FIG. 17B corresponds to the light-emitting diode included in any one of the LED package 170R, the LED package 170G, and the LED package 170B in FIG. 9, or any one of the light-emitting diode 420R, the light-emitting diode 420G, and the light-emitting diode 420B in FIG. 13.

[0311] 17A and 17B , a pixel circuit 500 includes a transistor 200A, a transistor 200B, a transistor 200C, and a capacitor 600. The transistors 200A, 200B, and 200C can be transistors applicable to the transistor 200 described above, for example. That is, the transistors 200A, 200B, and 200C can be OS transistors. In particular, when the transistors 200A, 200B, and 200C are OS transistors, each of the transistors 200A, 200B, and 200C preferably includes a back gate electrode. In this case, as shown in FIGS. 17A and 17B , the back gate electrode can receive the same signal as the gate electrode. Furthermore, the back gate electrode and the gate electrode of each of the transistors 200A, 200B, and 200C can receive different signals. Although backgate electrodes are illustrated in the transistors 200A, 200B, and 200C in FIGS. 17A and 17B, the transistors 200A, 200B, and 200C may not include a backgate electrode.

[0312] The transistor 200B includes a first terminal electrically connected to the gate electrode of the transistor 200A, a gate electrode electrically connected to the wiring GL2, and a second terminal electrically connected to the wiring VCOM. The wiring VCOM is a wiring for applying a constant potential to the gate electrode of the transistor 200A. Note that the constant potential can be, for example, a potential that turns off the transistor 200A. The transistor 200B also includes a gate electrode that controls whether the transistor 200B is on or off based on the potential of the wiring GL2 that functions as a gate line.

[0313] The transistor 200A has a gate electrode electrically connected to a first terminal of the transistor 200B, a first terminal electrically connected to a cathode electrode of the light-emitting diode 420, and a second terminal electrically connected to a wiring CAT. The transistor 200A also has a gate electrode that controls the on / off state based on the potential of a wiring GL1 that functions as a gate line. The wiring CAT functions as a wiring that outputs a current flowing from the light-emitting diode 420 through the transistor 200A.

[0314] The transistor 200C has a first terminal electrically connected to the wiring SL that functions as a source wiring, a second terminal electrically connected to the gate electrode of the transistor 200A and the first terminal of the transistor 200B, and a gate electrode electrically connected to the wiring GL1. The transistor 200A has a function of controlling the conductive state or non-conductive state based on the potential of the wiring GL1 that functions as a gate line.

[0315] The capacitor 600 includes a conductive film electrically connected to the gate electrode of the transistor 200A and a conductive film electrically connected to the second terminal of the transistor 200A.

[0316] The light-emitting diode 420 includes a cathode electrode electrically connected to the first terminal of the transistor 200A and an anode electrode electrically connected to the wiring ANO. The wiring ANO is a wiring for applying a potential for supplying a current to the light-emitting diode 420.

[0317] This allows the intensity of light emitted by the light-emitting diode 420 to be controlled in accordance with an image signal applied to the gate electrode of the transistor 200A.

[0318] 17A and 17B are circuits driven by pulse amplitude modulation (PAM) control, but one embodiment of the present invention is not limited to this. For example, a pixel circuit including a light-emitting diode in a display device of one embodiment of the present invention may be driven by pulse width modulation (PWM) control.

[0319] 17A and 17B can output, for example, a current value that can be used to set pixel parameters from the line CAT. More specifically, the line CAT may function as a monitor line for outputting the current flowing through the transistor 200A or the current flowing through the light-emitting diode 420 to the outside. For example, the current output to the line CAT can be converted into a voltage using a source follower circuit or the like and output to the outside. Alternatively, the voltage output to the line CAT can be converted into a digital signal using an A-D converter or the like and output to, for example, an AI accelerator included in the external control circuit PRPH described in the above embodiment.

[0320] In the configuration shown as an example in FIG. 17B , the wiring electrically connecting the pixel circuits 500 and the driver circuit 30 can be shortened, thereby reducing the wiring resistance of the wiring. Therefore, data can be written at high speed, allowing the display device 1000 (display device 1001) to be driven at high speed. This allows a sufficient frame period to be ensured even if the display device 1000 (display device 1001) has a large number of pixel circuits 500, thereby increasing the pixel density of the display device 1000 (display device 1001). Furthermore, increasing the pixel density of the display device 1000 (display device 1001) can increase the resolution of images displayed by the display device 1000 (display device 1001). For example, the pixel density of the display device 1000 (display device 1001) can be set to 500 ppi or more, preferably 1000 ppi or more. Therefore, the display device 1000 can be used as, for example, a display device for AR or VR, and can be suitably applied to electronic devices such as HMDs (head-mounted displays) in which the display unit is close to the user.

[0321] <Pixel Layout> Here, the pixel layout will be described. There are no particular limitations on the arrangement of sub-pixels, and various methods can be applied. Examples of the arrangement of sub-pixels include a stripe arrangement, an S-stripe arrangement, a matrix arrangement, a delta arrangement, a Bayer arrangement, and a pentile arrangement.

[0322] Examples of the top surface shape of the sub-pixel include a triangle, a quadrangle (including a rectangle or a square), a polygon such as a pentagon, a polygon with rounded corners, an ellipse, a circle, etc. Here, the top surface shape of the sub-pixel corresponds to the top surface shape of the light-emitting region of the light-emitting diode.

[0323] Each of the sub-pixels 80a, 80b, and 80c described below includes a light-emitting diode. For example, the light-emitting diode includes a pixel electrode, an n-type semiconductor layer, a p-type semiconductor layer, a light-emitting layer, and a common electrode. For the configuration of the light-emitting diode, please refer to the descriptions of the LED package 170 in FIG. 11A , the LED package 170A1 in FIG. 11B , the LED package 170A2 in FIG. 11C , and the LED package 170A3 in FIG. 11D , as well as the light-emitting diodes 420R, 420G, and 420B in FIG. 13A and FIG. 13B .

[0324] A stripe arrangement is applied to the pixel 80 shown in Fig. 18A. The pixel 80 shown in Fig. 18A is composed of three subpixels: subpixel 80a, subpixel 80b, and subpixel 80c. For example, as shown in Fig. 19A, the subpixel 80a may be a red subpixel R, the subpixel 80b may be a green subpixel G, and the subpixel 80c may be a blue subpixel B.

[0325] An S-stripe arrangement is applied to the pixel 80 shown in Fig. 18B. The pixel 80 shown in Fig. 18B is composed of three subpixels: subpixel 80a, subpixel 80b, and subpixel 80c. For example, as shown in Fig. 19B, the subpixel 80a may be a blue subpixel B, the subpixel 80b may be a red subpixel R, and the subpixel 80c may be a green subpixel G.

[0326] 18C shows an example in which subpixels of each color are arranged in a zigzag pattern. Specifically, in a plan view, the positions of the upper edges of two subpixels arranged in the column direction (e.g., subpixels 80a and 80b, or subpixels 80b and 80c) are misaligned. For example, as shown in FIG. 19C , subpixel 80a may be a red subpixel R, subpixel 80b may be a green subpixel G, and subpixel 80c may be a blue subpixel B.

[0327] The pixel 80 shown in Figure 18D includes a subpixel 80a having a generally trapezoidal top surface shape with rounded corners, a subpixel 80b having a generally triangular top surface shape with rounded corners, and a subpixel 80c having a generally rectangular or hexagonal top surface shape with rounded corners. The subpixel 80a has a larger light-emitting area than the subpixel 80b. In this manner, the shape and size of each subpixel can be determined independently. For example, as shown in Figure 19D, the subpixel 80a may be a green subpixel G, the subpixel 80b may be a red subpixel R, and the subpixel 80c may be a blue subpixel B.

[0328] The pixel 70A and pixel 70B shown in Fig. 18E are arranged in a Pentile arrangement. Fig. 18E shows an example in which pixel 70A having subpixels 80a and 80b and pixel 70B having subpixels 80b and 80c are arranged alternately. For example, as shown in Fig. 19E, subpixel 80a may be a red subpixel R, subpixel 80b may be a green subpixel G, and subpixel 80c may be a blue subpixel B.

[0329] Pixels 70A and 70B shown in Figures 18F and 18G are arranged in a delta configuration. Pixel 70A has two subpixels (subpixels 80a and 80b) in the top row (first row) and one subpixel (subpixel 80c) in the bottom row (second row). Pixel 70B has one subpixel (subpixel 80c) in the top row (first row) and two subpixels (subpixels 80a and 80b) in the bottom row (second row). For example, as shown in Figure 19F, subpixel 80a may be a red subpixel R, subpixel 80b may be a green subpixel G, and subpixel 80c may be a blue subpixel B.

[0330] FIG. 18F shows an example in which each subpixel has a substantially rectangular top surface shape with rounded corners, and FIG. 18G shows an example in which each subpixel has a circular top surface shape.

[0331] The pixel 80 shown in FIGS. 20A to 20C is configured in a stripe arrangement.

[0332] Figure 20A is an example in which each subpixel has a rectangular top surface shape, Figure 20B is an example in which each subpixel has a top surface shape that is a combination of two semicircles and a rectangle, and Figure 20C is an example in which each subpixel has an elliptical top surface shape.

[0333] The pixels 80 shown in FIGS. 20D to 20F are arranged in a matrix.

[0334] Figure 20D is an example in which each sub-pixel has a square top surface shape, Figure 20E is an example in which each sub-pixel has an approximately square top surface shape with rounded corners, and Figure 20F is an example in which each sub-pixel has a circular top surface shape.

[0335] The pixel 80 shown in Figures 20A to 20F is composed of four subpixels: subpixel 80a, subpixel 80b, subpixel 80c, and subpixel 80d. The subpixels 80a, subpixel 80b, subpixel 80c, and subpixel 80d each emit light of a different color. For example, the subpixels 80a, subpixel 80b, subpixel 80c, and subpixel 80d can be red, green, blue, and white subpixels, respectively. For example, as shown in Figures 21A and 21B, the subpixels 80a, subpixel 80b, subpixel 80c, and subpixel 80d can be red (R), green (G), blue (B), and white (W) subpixels, respectively. Alternatively, the sub-pixels 80a, 80b, 80c, and 80d may be red, green, blue, and infrared emitting sub-pixels, respectively.

[0336] For the configuration of the sub-pixel 80d, the descriptions of the sub-pixels 80a, 80b, and 80c are to be referred to as an example.

[0337] 20G shows an example in which one pixel 80 is configured with two rows and three columns. The pixel 80 has three subpixels (subpixels 80a, 80b, and 80c) in the top row (first row) and three subpixels 80d in the bottom row (second row). In other words, the pixel 80 has the subpixels 80a and 80d in the left column (first column), the subpixels 80b and 80d in the center column (second column), and the subpixels 80c and 80d in the right column (third column).

[0338] 20H shows an example in which one pixel 80 is configured with two rows and three columns. The pixel 80 has three subpixels (subpixels 80a, 80b, and 80c) in the top row (first row) and one subpixel (subpixel 80d) in the bottom row (second row). In other words, the pixel 80 has the subpixel 80a in the left column (first column), the subpixel 80b in the center column (second column), the subpixel 80c in the right column (third column), and the subpixels 80d across these three columns.

[0339] In addition, in the pixel 80 shown in Figures 20G and 20H, for example, as shown in Figures 21C and 21D, the subpixel 80a can be a red subpixel R, the subpixel 80b can be a green subpixel G, the subpixel 80c can be a blue subpixel B, and the subpixel 80d can be a white subpixel W.

[0340] 22A shows an example in which each subpixel has a rectangular shape when viewed from above and is arranged so that the long sides of the subpixels are adjacent to each other. Note that the subpixels may be arranged so that they are in contact with each other or not in contact with each other.

[0341] The pixel 80 shown in Figure 22A is composed of three subpixels: subpixel 80a, subpixel 80b, and subpixel 80c. As an example, the subpixels 80a, 80b, and 80c each emit a different color. For example, the different colors here may be red (R), green (G), and blue (B). Therefore, as shown in Figure 22B, the subpixels 80a, 80b, and 80c may be red (R), green (G), and blue (B) subpixels, respectively.

[0342] In addition, in FIG. 22B, the colors of light emitted by sub-pixel 80a, sub-pixel 80b, and sub-pixel 80c can be cyan (C), magenta (M), yellow (Y), and white (W) in addition to red (R), green (G), and blue (B).

[0343] Although the pixel 80 shown in FIG. 22A has three subpixels, the pixel 80 shown in FIG. 22A may have one, two, or four or more subpixels. For example, as shown in FIG. 22C , the pixel 80 is composed of four subpixels: subpixel 80a, subpixel 80b, subpixel 80c, and subpixel 80d. Similarly to the pixel 80 shown in FIG. 22A , the pixel 80 shown in FIG. 22C may be configured such that the subpixels 80a, 80b, and 80c emit different colors. For example, the different colors may be red (R), green (G), blue (B), and white (W). Therefore, as shown in FIG. 22D , the subpixels 80a, 80b, 80c, and 80d may be red (R), green (G), blue (B), and white (W), respectively.

[0344] In addition, in FIG. 22D, the colors of light emitted by sub-pixel 80a, sub-pixel 80b, sub-pixel 80c, and sub-pixel 80d can be cyan (C), magenta (M), and yellow (Y) in addition to red (R), green (G), blue (B), and white (W).

[0345] Note that, although the pixel 80 in Figures 22A and 22C shows an example in which the long sides of each sub-pixel are arranged adjacent to each other, the pixel 80 may also be arranged so that the short sides of each sub-pixel are arranged adjacent to each other.

[0346] FIG. 22E shows an example in which each pixel has a square top surface shape and an electrode is formed.

[0347] The pixel 80 shown in FIG. 22E is composed of three subpixels, ie, subpixels 80a, 80b, and 80c, and a conductor 81 that functions as an electrode.

[0348] As an example, subpixels 80a, 80b, and 80c each emit a different color. For example, the different colors may be red (R), green (G), and blue (B). Thus, as shown in FIG. 22F, subpixels 80a, 80b, and 80c may be red (R), green (G), and blue (B) subpixels, respectively.

[0349] In addition, in FIG. 22F, the colors of light emitted by sub-pixel 80a, sub-pixel 80b, and sub-pixel 80c can be cyan (C), magenta (M), yellow (Y), and white (W) in addition to red (R), green (G), and blue (B).

[0350] The conductor 81 also functions as a common electrode for the light-emitting diodes provided in the sub-pixels 80 a, 80 b, and 80 c, for example. In particular, the common electrode preferably functions as a cathode electrode for the light-emitting diodes included in the sub-pixels 80 a, 80 b, and 80 c.

[0351] 11A. Therefore, the material applicable to the conductor 81 may be, for example, a material applicable to the electrode 172 or the electrode 173.

[0352] 22G, the conductor 81 may be provided such that the sub-pixels 80a, 80b, and 80c are each located above the conductor 81. In other words, the sub-pixels 80a, 80b, and 80c are provided on the conductor 81. The conductor 81 of the pixel 80 in FIG. 22G corresponds to the electrode 172 in the LED package 170A1 in FIG. 11B.

[0353] Furthermore, although pixel 80 in FIG. 22G does not show a conductor corresponding to electrode 173 in LED package 170A1 in FIG. 11B, pixel 80 in FIG. 22G may have a conductor corresponding to electrode 173.

[0354] 22E and 22G show a pixel 80 with one electrode, but the pixel 80 shown in FIG. 22E may have two or more electrodes. For example, the number of electrodes in the pixel 80 may be determined according to the number of sub-pixels. As an example, in the pixel 80 of FIG. 22E, if an anode electrode and a cathode electrode are provided for each of the three sub-pixels, the number of electrodes provided in the pixel 80 may be six. As an example, in the pixel 80 of FIG. 22E, if an anode electrode and a common electrode serving as a cathode electrode are provided for each of the three sub-pixels, the number of electrodes provided in the pixel 80 may be four.

[0355] In addition, in the pixel 80 of Figure 22E, the conductor 81 has a square top surface shape, but the top surface shape of the conductor 81 may be various shapes such as an approximately trapezoid with rounded corners, an approximately square with rounded corners, an approximately hexagon with rounded corners, a shape connecting a semicircle and a rectangle, a circle, or an ellipse.

[0356] Furthermore, one of the sub-pixels included in the pixel 80 shown in each of FIGS. 18A to 18G, 20A to 20H, 22A, and 22B may be replaced with a conductor 81.

[0357] The insulators, conductors, semiconductors, and the like disclosed in this specification can be formed by a PVD (Physical Vapor Deposition) method or a CVD method. Examples of PVD methods include sputtering, resistance heating evaporation, electron beam evaporation, and PLD (Pulsed Laser Deposition). Examples of CVD methods include plasma CVD and thermal CVD. In particular, examples of thermal CVD methods include MOCVD (Metal Organic Chemical Vapor Deposition) and ALD (Atomic Layer Deposition).

[0358] The thermal CVD method is a film formation method that does not use plasma, and therefore has the advantage that defects caused by plasma damage are not generated.

[0359] In the thermal CVD method, a source gas and an oxidizing agent are simultaneously fed into a chamber, the chamber is kept at atmospheric pressure or reduced pressure, and the reaction occurs near or on a substrate, resulting in deposition on the substrate, thereby forming a film.

[0360] Alternatively, the ALD method may be used to deposit a film by sequentially introducing source gases for reaction into a chamber under atmospheric or reduced pressure, and repeating this gas introduction sequence. For example, two or more source gases are sequentially supplied to the chamber by switching between switching valves (also called high-speed valves). An inert gas (e.g., argon or nitrogen) is introduced simultaneously with or after the first source gas to prevent mixing of the multiple source gases, followed by the introduction of the second source gas. When an inert gas is introduced simultaneously, the inert gas acts as a carrier gas, and the inert gas may also be introduced simultaneously with the introduction of the second source gas. Alternatively, instead of introducing an inert gas, the first source gas may be evacuated by vacuum evacuation before the introduction of the second source gas. The first source gas adsorbs on the substrate surface to form a first thin layer, which then reacts with the second source gas introduced later, resulting in the second thin layer being deposited on the first thin layer to form a thin film. Repeating this gas introduction sequence multiple times while controlling the gas introduction sequence until the desired thickness is reached allows the formation of a thin film with excellent step coverage. The thickness of the thin film can be adjusted by changing the number of times the gas introduction sequence is repeated, allowing for precise film thickness adjustment, making this method suitable for fabricating fine FETs.

[0361] Thermal CVD methods such as MOCVD and ALD can form various films such as metal films, semiconductor films, or inorganic insulating films disclosed in the embodiments described above. For example, when forming an In—Ga—Zn—O film, trimethylindium (In(CH ３ ) ３ ), trimethylgallium (Ga(CH ３ ) ３ ), and dimethylzinc (Zn(CH ３ ) ２ In addition, the combination is not limited to these, and trimethylgallium may be replaced with triethylgallium (Ga(C ２ H ５) ３ ) can also be used, and diethyl zinc (Zn(C) ２ H ５ ) ２ ) can also be used.

[0362] For example, when a hafnium oxide film is formed using a film forming apparatus that uses the ALD method, a solvent and a liquid containing a hafnium precursor compound (e.g., hafnium alkoxide, tetrakisdimethylamidohafnium (TDMAH), Hf[N(CH ３ ) ２ ] ４ The raw material gas is a vaporized hafnium amide (such as ozone) as an oxidizer. ３ ) Two types of gases are used. Other materials include tetrakis(ethylmethylamido)hafnium.

[0363] For example, when an aluminum oxide film is formed using a film forming apparatus that uses the ALD method, a liquid containing a solvent and an aluminum precursor compound (e.g., trimethylaluminum (TMA), Al(CH ３ ) ３ )) as a raw material gas, and H as an oxidant. ２ Two types of gases are used: O. Other materials include tris(dimethylamido)aluminum, triisobutylaluminum, and aluminum tris(2,2,6,6-tetramethyl-3,5-heptanedionate).

[0364] For example, when a silicon oxide film is formed using a film forming apparatus that uses the ALD method, hexachlorodisilane is adsorbed on the surface to be formed, and an oxidizing gas (e.g., O ２ , or nitrous oxide) radicals are supplied to react with the adsorbate.

[0365] For example, when a tungsten film is formed using a film forming apparatus that uses the ALD method, WF ６ Gas and B ２ H ６ The gases are introduced repeatedly in sequence to form an initial tungsten film, and then WF ６ Gas and H ２ The gases are introduced repeatedly in sequence to form a tungsten film.２ H ６ Instead of gas, SiH ４ A gas may also be used.

[0366] For example, when an In—Ga—Zn—O film is formed as an oxide semiconductor film by a film formation apparatus using the ALD method, a precursor (generally, it may be called, for example, a precursor or a metal precursor) and an oxidizing agent (generally, it may be called, for example, a reactant or a non-metal precursor) are sequentially and repeatedly introduced to form the oxide semiconductor film. Specifically, for example, the precursor In(CH ３ ) ３ gas and oxidizer O ３ The gas is introduced to form an In—O layer, and then the precursor Ga(CH ３ ) ３ gas and oxidizer O ３ The gas is introduced to form a GaO layer, and then the precursor Zn(CH ３ ) ２ gas and oxidizer O ３ The gas is introduced to form a ZnO layer. Note that the order of these layers is not limited to this example. Also, mixed oxide layers such as an In—Ga—O layer, an In—Zn—O layer, or a Ga—Zn—O layer may be formed using these gases. ３ Instead of gas, H obtained by bubbling water with an inert gas such as Ar ２ O gas may be used, but O gas containing no H ３ It is preferable to use In(CH ３ ) ３ Instead of gas, In(C ２ H ５ ) ３ Gas may also be used. ３ ) ３ Instead of gas, Ga(C ２ H ５ ) ３ Gas may also be used. ３ ) ２ Instead of gas, Zn(C ２ H ５ ) 2 gases may also be used.

[0367] The screen ratio (aspect ratio) of the display unit included in the electronic device of one embodiment of the present invention is not particularly limited. For example, the display unit can support various screen ratios such as 1:1 (square), 4:3, 16:9, 16:10, 21:9, or 32:9.

[0368] The shape of the display unit included in the electronic device of one embodiment of the present invention is not particularly limited. For example, the display unit can have various shapes such as a rectangular shape, a polygonal shape (e.g., an octagonal shape), a circular shape, or an elliptical shape.

[0369] Note that this embodiment mode can be appropriately combined with other embodiment modes described in this specification.

[0370] Embodiment 4 In this embodiment, a metal oxide (hereinafter also referred to as an oxide semiconductor) that can be used for the OS transistor described in the above embodiment will be described.

[0371] The metal oxide used in the OS transistor preferably contains at least indium or zinc, and more preferably contains indium and zinc. For example, the metal oxide preferably contains indium, M (M is one or more selected from gallium, aluminum, yttrium, tin, silicon, boron, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and cobalt), and zinc. In particular, M is preferably one or more selected from gallium, aluminum, yttrium, and tin, and more preferably gallium.

[0372] The metal oxide can be formed by a sputtering method, a chemical vapor deposition (CVD) method such as a metal organic chemical vapor deposition (MOCVD) method, or an atomic layer deposition (ALD) method.

[0373] Hereinafter, an oxide containing indium (In), gallium (Ga), and zinc (Zn) will be described as an example of a metal oxide. Note that an oxide containing indium (In), gallium (Ga), and zinc (Zn) may be referred to as an In—Ga—Zn oxide.

[0374] <Classification of Crystal Structure> Examples of the crystal structure of an oxide semiconductor include amorphous (including completely amorphous), c-axis-aligned crystalline line (CAAC), nanocrystalline line (nc), cloud-aligned composite (CAC), single crystal, and polycrystalline.

[0375] The crystalline structure of a film or substrate can be evaluated using an X-ray diffraction (XRD) spectrum. For example, it can be evaluated using an XRD spectrum obtained by GIXD (Grazing-Incident XRD) measurement. The GIXD method is also called the thin film method or the Seemann-Bohlin method. In the following, the XRD spectrum obtained by GIXD measurement may be simply referred to as the XRD spectrum.

[0376] For example, in the case of a quartz glass substrate, the peak shape of the XRD spectrum is almost symmetrical. On the other hand, in the case of an In-Ga-Zn oxide film having a crystalline structure, the peak shape of the XRD spectrum is asymmetrical. The asymmetrical peak shape of the XRD spectrum clearly indicates the presence of crystals in the film or substrate. In other words, if the peak shape of the XRD spectrum is not symmetrical, the film or substrate cannot be said to be in an amorphous state.

[0377] The crystalline structure of a film or substrate can be evaluated by a diffraction pattern (also called a nanobeam electron diffraction pattern) observed by nanobeam electron diffraction (NBED). For example, a halo is observed in the diffraction pattern of a quartz glass substrate, confirming that the quartz glass is in an amorphous state. Furthermore, a spot-like pattern is observed in the diffraction pattern of an In—Ga—Zn oxide film formed at room temperature, rather than a halo. For this reason, it is estimated that the In—Ga—Zn oxide formed at room temperature is neither single crystal nor polycrystalline, nor in an amorphous state, but is in an intermediate state, and it cannot be concluded that it is in an amorphous state.

[0378] [Structure of Oxide Semiconductor] Note that oxide semiconductors may be classified differently from the above when focusing on their structure. For example, oxide semiconductors are classified into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include the above-mentioned CAAC-OS and nc-OS. Non-single-crystal oxide semiconductors include polycrystalline oxide semiconductors, pseudo-amorphous-like oxide semiconductors (a-like OSs), amorphous oxide semiconductors, and the like.

[0379] Here, the above-mentioned CAAC-OS, nc-OS, and a-like OS will be described in detail.

[0380] [CAAC-OS] A CAAC-OS is an oxide semiconductor having multiple crystalline regions, each with its c-axis aligned in a specific direction. The specific direction refers to the thickness direction of the CAAC-OS film, the normal direction to the surface where the CAAC-OS film is formed, or the normal direction to the surface of the CAAC-OS film. A crystalline region is a region having periodic atomic arrangement. If the atomic arrangement is considered as a lattice arrangement, a crystalline region is also a region with a uniform lattice arrangement. Furthermore, a CAAC-OS has a region where multiple crystalline regions are connected in the a-b plane direction, and the region may have distortion. Note that distortion refers to a portion where the lattice arrangement changes between a region with a uniform lattice arrangement and a region with another uniform lattice arrangement in a region where multiple crystalline regions are connected. In other words, a CAAC-OS is an oxide semiconductor whose c-axes are aligned and whose orientation is not clearly aligned in the a-b plane direction.

[0381] Each of the multiple crystalline regions is composed of one or more minute crystals (crystals with a maximum diameter of less than 10 nm). When a crystalline region is composed of one minute crystal, the maximum diameter of the crystalline region is less than 10 nm. When a crystalline region is composed of many minute crystals, the maximum diameter of the crystalline region may be several tens of nanometers.

[0382] In an In—Ga—Zn oxide, CAAC-OS tends to have a layered crystal structure (also referred to as a layered structure) in which a layer containing indium (In) and oxygen (hereinafter referred to as an In layer) and a layer containing gallium (Ga), zinc (Zn), and oxygen (hereinafter referred to as a (Ga, Zn) layer) are stacked. Note that indium and gallium are mutually substituted. Therefore, the (Ga, Zn) layer may contain indium. The In layer may contain gallium. The In layer may contain zinc. The layered structure is observed as a lattice image in a high-resolution transmission electron microscope (TEM) image, for example.

[0383] When a CAAC-OS film is subjected to structural analysis using an XRD apparatus, for example, a peak indicating c-axis orientation is detected at or near 2θ = 31° in out-of-plane XRD measurement using θ / 2θ scanning. Note that the position of the peak indicating c-axis orientation (the value of 2θ) may vary depending on the type, composition, and the like of the metal elements constituting the CAAC-OS.

[0384] For example, multiple bright spots are observed in the electron diffraction pattern of a CAAC-OS film, and the observed spots are at positions that are point-symmetric with respect to a spot of an incident electron beam that has passed through the sample (also referred to as a direct spot).

[0385] When a crystalline region is observed from the specific direction, the lattice arrangement in the crystalline region is basically a hexagonal lattice, but the unit cell is not necessarily a regular hexagon and may be a non-regular hexagon. The distortion may have a pentagonal, heptagonal, or other lattice arrangement. In the CAAC-OS, no clear grain boundary can be identified even near the distortion. This indicates that the distortion in the lattice arrangement suppresses the formation of grain boundaries. This is thought to be because the CAAC-OS can tolerate distortion due to the lack of close-packed arrangement of oxygen atoms in the a-b plane and the change in interatomic bond distance caused by metal atom substitution.

[0386] Note that a crystal structure in which clear grain boundaries are observed is called polycrystalline. The grain boundaries act as recombination centers, and are likely to trap carriers, resulting in a decrease in the on-state current of a transistor and a decrease in field-effect mobility. Therefore, CAAC-OS, in which clear grain boundaries are not observed, is one of the crystalline oxides having a crystal structure suitable for a semiconductor layer of a transistor. Note that a structure containing Zn is preferable for forming a CAAC-OS. For example, In—Zn oxide and In—Ga—Zn oxide are suitable because they can suppress the generation of grain boundaries more effectively than In oxide.

[0387] CAAC-OS is an oxide semiconductor with high crystallinity and no clear crystal grain boundaries. Therefore, it can be said that the CAAC-OS is less susceptible to a decrease in electron mobility due to crystal grain boundaries. Furthermore, since the crystallinity of an oxide semiconductor can be reduced by the inclusion of impurities and / or the generation of defects, the CAAC-OS can also be said to be an oxide semiconductor with few impurities and defects (such as oxygen vacancies). Therefore, an oxide semiconductor having a CAAC-OS has stable physical properties. Therefore, an oxide semiconductor having a CAAC-OS is heat-resistant and highly reliable. Furthermore, the CAAC-OS is stable even against high temperatures (so-called thermal budget) in the manufacturing process. Therefore, the use of a CAAC-OS in an OS transistor can increase the flexibility of the manufacturing process.

[0388] [nc-OS] The nc-OS has periodic atomic arrangement in a microscopic region (e.g., a region of 1 nm to 10 nm, particularly a region of 1 nm to 3 nm). In other words, the nc-OS has microcrystals. Note that the size of the microcrystals is, for example, 1 nm to 10 nm, particularly 1 nm to 3 nm, and therefore the microcrystals are also called nanocrystals. Furthermore, the nc-OS does not exhibit regularity in the crystal orientation between different nanocrystals. Therefore, no orientation is observed throughout the film. Therefore, depending on the analysis method, the nc-OS may be indistinguishable from an a-like OS and an amorphous oxide semiconductor. For example, when a structural analysis of an nc-OS film is performed using an XRD apparatus, no peak indicating crystallinity is detected in out-of-plane XRD measurement using θ / 2θ scanning. When an nc-OS film is subjected to electron diffraction (also referred to as selected-area electron diffraction) using an electron beam with a probe diameter larger than that of a nanocrystal (e.g., 50 nm or more), a diffraction pattern resembling a halo pattern is observed. On the other hand, when an nc-OS film is subjected to electron diffraction (also referred to as nanobeam electron diffraction) using an electron beam with a probe diameter close to or smaller than that of a nanocrystal (e.g., 1 nm to 30 nm), an electron diffraction pattern in which multiple spots are observed within a ring-shaped region centered on a direct spot may be obtained.

[0389] [a-Like OS] The a-like OS is an oxide semiconductor having a structure between the nc-OS and an amorphous oxide semiconductor. The a-like OS has pores or low-density regions. That is, the a-like OS has lower crystallinity than the nc-OS and CAAC-OS. Furthermore, the a-like OS has a higher hydrogen concentration in the film than the nc-OS and CAAC-OS.

[0390] [Structure of Oxide Semiconductor] Next, the above-described CAC-OS will be described in detail. Note that the CAC-OS relates to a material structure.

[0391] [CAC-OS] CAC-OS is, for example, a material in which elements constituting a metal oxide are unevenly distributed in a size of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or in the vicinity thereof. Note that hereinafter, a state in which one or more metal elements are unevenly distributed in a metal oxide and regions containing the metal elements are mixed in a size of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or in the vicinity thereof, is also referred to as a mosaic or patch state.

[0392] Furthermore, the CAC-OS has a mosaic structure in which a material is separated into a first region and a second region, and the first region is distributed throughout the film (hereinafter also referred to as a cloud structure). That is, the CAC-OS is a composite metal oxide having a structure in which the first region and the second region are mixed.

[0393] Here, the atomic ratios of In, Ga, and Zn to the metal elements constituting the CAC-OS in the In—Ga—Zn oxide are denoted as [In], [Ga], and [Zn], respectively. For example, in the CAC-OS in the In—Ga—Zn oxide, the first region is a region where [In] is larger than [In] in the composition of the CAC-OS film. The second region is a region where [Ga] is larger than [Ga] in the composition of the CAC-OS film. Alternatively, for example, the first region is a region where [In] is larger than [In] in the second region and [Ga] is smaller than [Ga] in the second region. The second region is a region where [Ga] is larger than [Ga] in the first region and [In] is smaller than [In] in the first region.

[0394] Specifically, the first region is a region whose main component is indium oxide, indium zinc oxide, or the like. The second region is a region whose main component is gallium oxide, gallium zinc oxide, or the like. In other words, the first region can be rephrased as a region whose main component is In. The second region can be rephrased as a region whose main component is Ga.

[0395] It should be noted that there are cases where a clear boundary between the first region and the second region cannot be observed.

[0396] Furthermore, CAC-OS in In—Ga—Zn oxide refers to a structure in which a mosaic of regions containing Ga as the main component and regions containing In as the main component are randomly arranged in a material composition containing In, Ga, Zn, and O. Therefore, it is presumed that CAC-OS has a structure in which metal elements are distributed nonuniformly.

[0397] The CAC-OS can be formed by sputtering without heating the substrate, for example. When forming the CAC-OS by sputtering, any one or more of an inert gas (typically argon), oxygen gas, and nitrogen gas may be used as the deposition gas. The lower the flow rate of oxygen gas relative to the total flow rate of deposition gas during deposition, the more preferable it is. For example, the flow rate of oxygen gas relative to the total flow rate of deposition gas during deposition is set to 0% or more and less than 30%, preferably 0% or more and 10% or less.

[0398] Furthermore, for example, in the case of CAC-OS in an In—Ga—Zn oxide, EDX mapping obtained using energy dispersive X-ray spectroscopy (EDX) can confirm that the CAC-OS has a structure in which a region containing In as a main component (first region) and a region containing Ga as a main component (second region) are unevenly distributed and mixed.

[0399] Here, the first region has higher conductivity than the second region. That is, the flow of carriers through the first region causes the metal oxide to exhibit conductivity. Therefore, the first region is distributed in a cloud-like manner in the metal oxide, thereby achieving a high field-effect mobility (μ).

[0400] On the other hand, the second region has higher insulating properties than the first region. That is, the second region is distributed in the metal oxide, thereby suppressing leakage current.

[0401] Therefore, when a CAC-OS is used in a transistor, the conductivity due to the first region and the insulating property due to the second region act complementarily, thereby providing the CAC-OS with a switching function (a function of turning on / off). That is, a CAC-OS has a conductive function in a part of the material and an insulating function in a part of the material, and functions as a semiconductor as a whole. By separating the conductive function and the insulating function, both functions can be maximized. Therefore, by using a CAC-OS in a transistor, a high on-current (I ｏｎ), high field-effect mobility (μ), and good switching behavior can be achieved.

[0402] Furthermore, a transistor using the CAC-OS has high reliability, and therefore, the CAC-OS is ideal for various semiconductor devices such as display devices.

[0403] Oxide semiconductors have a variety of structures, each of which has different characteristics. The oxide semiconductor of one embodiment of the present invention may include two or more of an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, an a-like OS, a CAC-OS, an nc-OS, and a CAAC-OS.

[0404] <Transistor Having Oxide Semiconductor> Next, a case where the oxide semiconductor is used for a transistor will be described.

[0405] By using the oxide semiconductor for a transistor, a transistor with high field-effect mobility and high reliability can be realized.

[0406] In particular, it is preferable to use an oxide containing indium (In), gallium (Ga), and zinc (Zn) (also referred to as "IGZO") as the semiconductor layer in which the channel is formed. Alternatively, an oxide containing indium (In), aluminum (Al), and zinc (Zn) (also referred to as "IAZO") may be used as the semiconductor layer. Alternatively, an oxide containing indium (In), aluminum (Al), gallium (Ga), and zinc (Zn) (also referred to as "IAGZO") may be used as the semiconductor layer.

[0407] For the transistor, an oxide semiconductor having a low carrier concentration is preferably used. For example, the carrier concentration of the oxide semiconductor is 1×10 １７ cm −３ Below 1 × 10, preferably １５ cm −３ More preferably, 1×10 １３ cm −３ or less, more preferably 1 × 10 １１ cm −３ More preferably, 1×10 １０ cm −３is less than 1×10 −９ cm −３ That is all. Note that in order to reduce the carrier concentration of an oxide semiconductor film, the impurity concentration in the oxide semiconductor film may be reduced to reduce the density of defect states. In this specification and the like, a semiconductor having a low impurity concentration and a low density of defect states is referred to as a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor. Note that an oxide semiconductor having a low carrier concentration may also be referred to as a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor.

[0408] A highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low density of defect states, and therefore, the density of trap states may also be low.

[0409] Charges trapped in the trap states of an oxide semiconductor take a long time to dissipate and may behave like fixed charges. Therefore, a transistor in which a channel formation region is formed in an oxide semiconductor with a high density of trap states may have unstable electrical characteristics.

[0410] Therefore, reducing the impurity concentration in the oxide semiconductor is effective for stabilizing the electrical characteristics of a transistor. Furthermore, in order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in adjacent films. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, and silicon. Note that the term "impurity" in an oxide semiconductor refers to, for example, any element other than the main component constituting the oxide semiconductor. For example, an element with a concentration of less than 0.1 atomic % can be considered an impurity.

[0411] <Impurities> Here, the influence of each impurity in an oxide semiconductor will be described.

[0412] When an oxide semiconductor contains silicon or carbon, which is one of Group 14 elements, defect levels are formed in the oxide semiconductor. Therefore, the concentration of silicon or carbon in the oxide semiconductor (concentration obtained by secondary ion mass spectrometry (SIMS)) is set to 2×10 １８ atoms / cm ３ Below 2 × 10, preferably １７atoms / cm ３ The following applies.

[0413] When an oxide semiconductor contains an alkali metal or an alkaline earth metal, defect levels are formed and carriers are generated in some cases. Therefore, a transistor using an oxide semiconductor containing an alkali metal or an alkaline earth metal is likely to have normally-on characteristics. For this reason, when the concentration of the alkali metal or the alkaline earth metal in the oxide semiconductor obtained by SIMS is 1×10 １８ atoms / cm ３ Below 2 × 10, preferably １６ atoms / cm ３ Do the following:

[0414] When nitrogen is contained in an oxide semiconductor, electrons serving as carriers are generated, the carrier concentration increases, and the semiconductor is likely to become n-type. As a result, a transistor using an oxide semiconductor containing nitrogen as a semiconductor tends to have normally-on characteristics. Alternatively, when nitrogen is contained in an oxide semiconductor, trap states may be formed. As a result, the electrical characteristics of the transistor may become unstable. For this reason, the nitrogen concentration in the oxide semiconductor obtained by SIMS is measured to be 5×10 １９ atoms / cm ３ Less than 5×10 １８ atoms / cm ３ or less, more preferably 1 × 10 １８ atoms / cm ３ or less, more preferably 5 × 10 １７ atoms / cm ３ Do the following:

[0415] Hydrogen contained in an oxide semiconductor reacts with oxygen bonded to a metal atom to form water, which may form an oxygen vacancy. Hydrogen entering the oxygen vacancy may generate electrons as carriers. Furthermore, some of the hydrogen may bond with oxygen bonded to a metal atom to generate electrons as carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen is likely to have normally-on characteristics. Therefore, it is preferable to reduce the amount of hydrogen in the oxide semiconductor as much as possible. Specifically, the hydrogen concentration in the oxide semiconductor obtained by SIMS is measured to be 1×10 ２０ atoms / cm ３ less than 1×10 １９ atoms / cm ３ less than 5×10 １８ atoms / cm ３ less than 1×10 １８ atoms / cm ３ Make it less than.

[0416] When an oxide semiconductor with sufficiently reduced impurities is used for a channel formation region of a transistor, stable electrical characteristics can be obtained.

[0417] The structure described in this embodiment mode can be used in appropriate combination with structures described in other embodiments.

[0418] Embodiment 5 In this embodiment, a display module that can be applied to an electronic device of one embodiment of the present invention will be described.

[0419] <Configuration Example of Display Module> First, a display module including a display device that can be applied to an electronic device of one embodiment of the present invention will be described.

[0420] 23A is a perspective view of a display module 1280. The display module 1280 includes, for example, the display device 1000 and an FPC 1290. For example, the display device 1001 shown in FIG. 13 may be applied to the display module 1280 instead of the display device 1000.

[0421] The display module 1280 includes a substrate 1291 and a substrate 1292. The display module 1280 includes a display portion 1281. The display portion 1281 is a region for displaying an image in the display module 1280, and is a region where light from each pixel provided in a pixel portion 1284 described later can be viewed.

[0422] 23B is a perspective view schematically showing the configuration on the substrate 1291 side. A circuit portion 1282, a pixel circuit portion 1283 on the circuit portion 1282, and a pixel portion 1284 on the pixel circuit portion 1283 are stacked on the substrate 1291. A terminal portion 1285 for connecting to the FPC 1290 is provided in a portion of the substrate 1291 that does not overlap with the pixel portion 1284. The terminal portion 1285 and the circuit portion 1282 are electrically connected by a wiring portion 1286 composed of a plurality of wirings.

[0423] The pixel section 1284 and the pixel circuit section 1283 correspond to, for example, the pixel layer PXAL described above, and the circuit section 1282 corresponds to, for example, the circuit layer SICL described above.

[0424] The pixel unit 1284 has a plurality of periodically arranged pixels 1284a. An enlarged view of one pixel 1284a is shown on the right side of FIG. 23B . The pixel 1284a has a light-emitting diode 1430a, a light-emitting diode 1430b, and a light-emitting diode 1430c, each emitting a different color. The light-emitting diodes 1430a, 1430b, and 1430c correspond to, for example, the light-emitting diodes included in the LED package described above, or the light-emitting diodes 420R, 420G, and 420B. The plurality of light-emitting diodes described above may also be arranged in a stripe array as shown in FIG. 23B . Various arrangement methods, such as a delta array or a pentile array, may also be applied.

[0425] The pixel circuit section 1283 has a plurality of pixel circuits 1283a arranged periodically.

[0426] One pixel circuit 1283a is a circuit that controls the light emission of three light-emitting diodes included in one pixel 1284a. One pixel circuit 1283a may be configured to have three circuits that control the light emission of one light-emitting diode. For example, the pixel circuit 1283a may be configured to have at least one selection transistor, one current control transistor (drive transistor), and a capacitor for each light-emitting diode. In this case, a gate signal is input to the gate of the selection transistor, and a source signal is input to either the source or the drain. This realizes an active matrix display device.

[0427] The circuit portion 1282 includes a circuit for driving each pixel circuit 1283a of the pixel circuit portion 1283. For example, the circuit portion 1282 preferably includes one or both of a gate line driver circuit and a source line driver circuit. In addition, the circuit portion 1282 may include at least one of an arithmetic circuit, a memory circuit, a power supply circuit, and the like.

[0428] The FPC 1290 functions as wiring for supplying a video signal, a power supply potential, or the like from the outside to the circuit portion 1282. An IC may be mounted on the FPC 1290.

[0429] The display module 1280 can be configured such that one or both of the pixel circuit portion 1283 and the circuit portion 1282 are stacked below the pixel portion 1284, so that the aperture ratio (effective display area ratio) of the display portion 1281 can be made extremely high.

[0430] Note that this embodiment mode can be appropriately combined with other embodiment modes described in this specification.

[0431] Embodiment 6 In this embodiment, an example of an electronic device to which a display device is applied will be described as an example of an electronic device according to one embodiment of the present invention.

[0432] 24A and 24B show the appearance of an electronic device 8300 that is a head-mounted display.

[0433] The electronic device 8300 includes a housing 8301 , a display portion 8302 , operation buttons 8303 , and a band-shaped fixture 8304 .

[0434] The operation button 8303 has a function of a power button, etc. The electronic device 8300 may have a button in addition to the operation button 8303.

[0435] 24C , a lens 8305 may be provided between the display portion 8302 and the user's eyes. The lens 8305 allows the user to enlarge the display portion 8302, thereby enhancing the sense of realism. In this case, as shown in FIG. 24C , a dial 8306 may be provided to change the position of the lens for adjusting the diopter.

[0436] For example, a display device with extremely high definition is preferably used for the display portion 8302. By using a display device with high definition for the display portion 8302, even if an image is enlarged using a lens 8305 as in FIG. 24C , pixels are not visible to the user, and a more realistic image can be displayed.

[0437] 24A to 24C show an example in which one display unit 8302 is included. With such a configuration, the number of parts can be reduced.

[0438] The display portion 8302 can display two images, an image for the right eye and an image for the left eye, side by side in two regions, left and right, respectively, thereby displaying a stereoscopic image using binocular parallax.

[0439] Alternatively, a single image that can be viewed by both eyes may be displayed across the entire area of ​​the display unit 8302. This allows a panoramic image to be displayed across both ends of the field of view, thereby enhancing the sense of reality.

[0440] Here, the electronic device 8300 preferably has a mechanism for changing the curvature of the display portion 8302 to an appropriate value depending on the size of the user's head, the position of the user's eyes, etc. For example, the user may adjust the curvature of the display portion 8302 by operating a dial 8307 for adjusting the curvature of the display portion 8302. Alternatively, the electronic device 8300 may have a mechanism for adjusting the curvature of the display portion 8302 based on detection data from a sensor unit (for example, a camera, a contact sensor, or a non-contact sensor) that detects the size of the user's head, the position of the user's eyes, etc., provided in the housing 8301.

[0441] In addition, when the lens 8305 is used, it is preferable to provide a mechanism for adjusting the position and angle of the lens 8305 in synchronization with the curvature of the display portion 8302. Alternatively, the dial 8306 may have a function for adjusting the angle of the lens.

[0442] 24E and 24F show an example including a driver 8308 that controls the curvature of the display portion 8302. The driver 8308 is fixed to at least a part of the display portion 8302. The driver 8308 has a function of deforming the display portion 8302 by deforming or moving a part fixed to the display portion 8302.

[0443] 24E is a schematic diagram illustrating a case where a user 8310 with a relatively large head size is wearing the housing 8301. In this case, the shape of the display portion 8302 is adjusted by the driving unit 8308 so that the curvature is relatively small (the radius of curvature is large).

[0444] On the other hand, Fig. 24F shows a case where a user 8311, whose head is smaller than that of the user 8310, is wearing the housing 8301. The user 8311 has a smaller eye distance than the user 8310. In this case, the shape of the display unit 8302 is adjusted by the drive unit 8308 so that the curvature of the display unit 8302 is large (the radius of curvature is small). In Fig. 24F, the position and shape of the display unit 8302 in Fig. 24E are indicated by dashed lines.

[0445] In this way, the electronic device 8300 has a mechanism for adjusting the curvature of the display portion 8302, so that it can provide an optimal display to various users, regardless of age or gender.

[0446] Furthermore, by changing the curvature of the display portion 8302 in accordance with the content displayed on the display portion 8302, a high sense of realism can be given to the user. For example, shaking can be expressed by vibrating the curvature of the display portion 8302. In this way, various effects can be produced according to the scene in the content, and a new experience can be provided to the user. Furthermore, by linking the display portion 8302 with a vibration module provided in the housing 8301, a more realistic display can be achieved.

[0447] Note that the electronic device 8300 may have two display units 8302 as shown in FIG. 24D.

[0448] By having two display units 8302, the user can view one display unit per eye. This allows high-resolution images to be displayed even when performing 3D display using parallax. Furthermore, the display unit 8302 is curved in an arc shape roughly centered on the user's eye. This allows the distance from the user's eye to the display surface of the display unit to be constant, allowing the user to view more natural images. Furthermore, even if the brightness and chromaticity of light from the display unit change depending on the viewing angle, this effect can be substantially ignored because the user's eye is positioned in the normal direction to the display surface of the display unit, allowing for more realistic images to be displayed.

[0449] Figures 25A to 25C are diagrams showing the appearance of electronic device 8300, which is different from electronic device 8300 shown in Figures 24A to 24D, respectively. Specifically, for example, Figures 25A to 25C differ from Figures 24A to 24D in that electronic device 8300 has a fixture 8304a to be attached to the head and a pair of lenses 8305.

[0450] A user can view the display on the display portion 8302 through the lens 8305. Note that it is preferable to curve the display portion 8302 because the user can feel a high sense of presence. In addition, by viewing different images displayed in different regions of the display portion 8302 through the lens 8305, three-dimensional display using parallax can be performed. Note that the configuration is not limited to one display portion 8302, and two display portions 8302 may be provided, with one display portion being arranged for each eye of the user.

[0451] Note that, for example, a display device with extremely high definition is preferably used for the display portion 8302. By using a display device with high definition for the display portion 8302, even if an image is enlarged using a lens 8305 as in FIG. 25C , pixels are not visible to the user, and a more realistic image can be displayed.

[0452] A head-mounted display, which is an electronic device of one embodiment of the present invention, may have the structure of an electronic device 8200, which is a glasses-type head-mounted display, illustrated in FIG. 25D.

[0453] The electronic device 8200 includes a mounting portion 8201, a lens 8202, a main body 8203, a display portion 8204, and a cable 8205. The mounting portion 8201 includes a built-in battery 8206.

[0454] A cable 8205 supplies power from a battery 8206 to the main body 8203. The main body 8203 includes a wireless receiver or the like and can display received video information on a display portion 8204. The main body 8203 also includes a camera and can use information on the movement of the user's eyeballs or eyelids as an input means.

[0455] The wearing unit 8201 may be provided with a plurality of electrodes at positions that come into contact with the user, capable of detecting a current that flows in association with the movement of the user's eyeballs, and may have a function of recognizing the line of sight. The wearing unit 8201 may also have a function of monitoring the user's pulse based on the current that flows through the electrodes. The wearing unit 8201 may also have various sensors such as a temperature sensor, a pressure sensor, or an acceleration sensor, and may have a function of displaying biometric information of the user on the display unit 8204, a function of changing an image displayed on the display unit 8204 in accordance with the movement of the user's head, and the like.

[0456] 26A to 26C are diagrams showing the appearance of an electronic device 8750, which is different from the electronic device 8300 shown in FIGS. 24A to 24D and the electronic device 8200 shown in FIG. 25D, respectively.

[0457] 26A is a perspective view showing the front, top, and left side of electronic device 8750, and FIGS. 26B and 26C are perspective views showing the back, bottom, and right side of electronic device 8750. FIG.

[0458] The electronic device 8750 includes a pair of display devices 8751, a housing 8752, a pair of mounting portions 8754, a buffer member 8755, and a pair of lenses 8756. The pair of display devices 8751 are provided inside the housing 8752 at positions where they can be seen through the lenses 8756.

[0459] Here, one of the pair of display devices 8751 corresponds to the display device DSP described in Embodiment 1 or the like. Although not shown, the electronic device 8750 shown in FIGS. 26A to 26C includes an electronic component having a processing unit described in the previous embodiment (for example, a circuit included in the control circuit PRPH shown in FIG. 5 ). Although not shown, the electronic device 8750 shown in FIGS. 26A to 26C includes a camera. The camera can capture an image of the user's eye and its vicinity. Although not shown, the electronic device 8750 shown in FIGS. 26A to 26C includes a motion detection unit, audio, a control unit, a communication unit, and a battery in a housing 8752.

[0460] The electronic device 8750 is an electronic device for VR. A user wearing the electronic device 8750 can view an image displayed on a display device 8751 through a lens 8756. Also, by displaying different images on the pair of display devices 8751, three-dimensional display using parallax can be performed.

[0461] An input terminal 8757 and an output terminal 8758 are provided on the back side of the housing 8752. A cable for supplying a video signal from a video output device or the like, or power for charging a battery provided in the housing 8752, can be connected to the input terminal 8757. The output terminal 8758 functions as, for example, an audio output terminal, and earphones or headphones can be connected to the output terminal 8758.

[0462] The housing 8752 preferably has a mechanism for adjusting the left and right positions of the lens 8756 and the display device 8751 so that they are optimally positioned according to the position of the user's eyes. Also, the housing 8752 preferably has a mechanism for adjusting the focus by changing the distance between the lens 8756 and the display device 8751.

[0463] By using the camera, the display device 8751, and the electronic components, the electronic device 8750 can estimate the state of a user of the electronic device 8750 and display information about the estimated state of the user on the display device 8751. Alternatively, information about the state of a user of an electronic device connected to the electronic device 8750 via a network can be displayed on the display device 8751.

[0464] The buffer member 8755 is a portion that comes into contact with the user's face (e.g., the forehead and / or cheeks). The close contact of the buffer member 8755 with the user's face can prevent light leakage and enhance the sense of immersion. It is preferable to use a soft material for the buffer member 8755 so that it can come into close contact with the user's face when the user wears the electronic device 8750. For example, materials such as rubber, silicone rubber, urethane, or sponge can be used. Furthermore, using a sponge or the like with its surface covered with cloth or leather (e.g., natural leather or synthetic leather) can prevent gaps from forming between the user's face and the buffer member 8755, thereby favorably preventing light leakage. Furthermore, using such a material is preferable because it not only feels good to the touch but also prevents the user from feeling cold when worn in cold seasons. It is preferable to configure components that come into contact with the user's skin, such as the buffer member 8755 or the attachment portion 8754, to be removable for easy cleaning or replacement.

[0465] The electronic device of this embodiment may further include an earphone 8754A. The earphone 8754A has a communication unit (not shown) and has a wireless communication function. The earphone 8754A can output audio data using the wireless communication function. The earphone 8754A may also have a vibration mechanism that functions as a bone conduction earphone.

[0466] 26C, the earphone 8754A can be directly connected to the attachment portion 8754 or connected by wire. The earphone 8754B and the attachment portion 8754 may have a magnet. This allows the earphone 8754B to be fixed to the attachment portion 8754 by magnetic force, which is preferable because it makes storage easier.

[0467] The earphone 8754A may have a sensor unit that can be used to estimate the state of the user of the electronic device.

[0468] In addition to any one of the above-described configuration examples, the electronic device of one embodiment of the present invention may include one or more selected from an antenna, a battery, a camera, a speaker, a microphone, a touch sensor, and an operation button.

[0469] The electronic device of one embodiment of the present invention may include a secondary battery, and it is preferable that the secondary battery can be charged using contactless power transmission.

[0470] Examples of secondary batteries include lithium ion secondary batteries (e.g., lithium polymer batteries (lithium ion polymer batteries) using a gel electrolyte), nickel-metal hydride batteries, nickel-cadmium batteries, organic radical batteries, lead-acid batteries, air secondary batteries, nickel-zinc batteries, and silver-zinc batteries.

[0471] The electronic device of one embodiment of the present invention may include an antenna. By receiving a signal through the antenna, images, information, and the like can be displayed on a display portion. When the electronic device includes an antenna and a secondary battery, the antenna may be used for contactless power transmission.

[0472] The display portion of the electronic device of one embodiment of the present invention can display images with a screen resolution of, for example, full high definition, 4K2K, 8K4K, 16K8K, or higher.

[0473] Note that this embodiment mode can be appropriately combined with other embodiment modes described in this specification.

[0474] Embodiment 7 In this embodiment, electronic devices including a display device manufactured using one embodiment of the present invention will be described.

[0475] The electronic devices exemplified below include a display device according to one embodiment of the present invention in their display portions, and therefore have high screen resolution.

[0476] 27A to 27H, which will be described later, may include the display devices described in the above embodiments, thereby enabling these electronic devices to have both high screen resolution and a large screen.

[0477] One embodiment of the present invention includes a display device and one or more selected from an antenna, a battery, a housing, a camera, a speaker, a microphone, a touch sensor, and an operation button.

[0478] The electronic device of one embodiment of the present invention may include a secondary battery, and it is preferable that the secondary battery can be charged using contactless power transmission.

[0479] For the secondary battery, for example, the description of the secondary battery described in the sixth embodiment can be referred to.

[0480] The electronic device of one embodiment of the present invention may include an antenna. Note that the description of the antenna in Embodiment 6 can be referred to, for example, for the antenna.

[0481] The display portion of the electronic device of one embodiment of the present invention can display images with a screen resolution of, for example, full high definition, 4K2K, 8K4K, 16K8K, or higher.

[0482] Examples of electronic devices include electronic devices with relatively large screens such as television devices, notebook personal computers, monitor devices, digital signage, pachinko machines, and game machines, as well as digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, and sound playback devices.

[0483] An electronic device to which one embodiment of the present invention is applied can be incorporated along a flat or curved surface of an inner or outer wall of a building such as a house or a building, or an interior or exterior surface of a car or the like.

[0484] 27A is a mobile phone (smartphone), which is a type of information terminal. The information terminal 5500 has a housing 5510 and a display unit 5511. The display unit 5511 is provided with a touch panel and the housing 5510 is provided with buttons as input interfaces.

[0485] 27B is a diagram showing the appearance of an information terminal 5900, which is an example of a wearable terminal. The information terminal 5900 includes a housing 5901, a display portion 5902, operation buttons 5903, a crown 5904, a band 5905, and the like.

[0486] 27C also illustrates a notebook information terminal 5300. The notebook information terminal 5300 illustrated in Fig. 27C includes, for example, a display unit 5331 in a housing 5330a and a keyboard unit 5350 in a housing 5330b.

[0487] 27A to 27C are taken as examples of electronic devices, but information terminals other than smartphones, wearable terminals, and notebook information terminals can also be applied. Examples of information terminals other than smartphones, wearable terminals, and notebook information terminals include PDAs (Personal Digital Assistants), desktop information terminals, and workstations.

[0488] [Camera] FIG. 27D is a diagram showing the appearance of the camera 8000 with the viewfinder 8100 attached.

[0489] The camera 8000 includes a housing 8001, a display portion 8002, operation buttons 8003, a shutter button 8004, etc. The camera 8000 is also provided with a detachable lens 8006 attached thereto.

[0490] Note that the camera 8000 may have the lens 8006 and the housing integrated together.

[0491] The camera 8000 can capture an image by pressing a shutter button 8004 or touching a display portion 8002 that functions as a touch panel.

[0492] The housing 8001 has a mount with electrodes, and can be connected to a finder 8100 as well as a strobe device and the like.

[0493] The finder 8100 includes a housing 8101 , a display portion 8102 , and a button 8103 .

[0494] The housing 8101 is attached to the camera 8000 by a mount that engages with the mount of the camera 8000. The viewfinder 8100 can display an image received from the camera 8000 on a display portion 8102.

[0495] The button 8103 has a function as, for example, a power button.

[0496] The display device of one embodiment of the present invention can be applied to a display portion 8002 of a camera 8000 and a display portion 8102 of a finder 8100. Note that the camera 8000 may have a built-in finder.

[0497] 27E is a diagram showing the appearance of a portable game machine 5200, which is an example of a game machine. The portable game machine 5200 includes a housing 5201, a display portion 5202, and buttons 5203.

[0498] Furthermore, the images of the portable game console 5200 can be output by a display device such as a television device, a display for a personal computer, a game display, or a head-mounted display.

[0499] A low-power consumption portable game console 5200 can be realized by applying the display device described in the above embodiment to the portable game console 5200. In addition, the low power consumption can reduce heat generation from a circuit, thereby reducing the influence of heat on the circuit itself, peripheral circuits, and modules.

[0500] 27E illustrates a portable game machine as an example of a game machine, but the electronic device of one embodiment of the present invention is not limited to this. Examples of the electronic device of one embodiment of the present invention include a stationary game machine, an arcade game machine installed in an entertainment facility (e.g., an arcade or amusement park), and a pitching machine for batting practice installed in a sports facility.

[0501] 27F is a perspective view of a television set. The television set 9000 includes a housing 9002, a display 9001, speakers 9003, operation keys 9005 (including a power switch or an operation switch), connection terminals 9006, and sensors 9007 (e.g., sensors having a function of measuring or detecting force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared light). The storage device of one embodiment of the present invention can be included in the television set. The television set can include a display 9001 that is, for example, 50 inches or larger, or 100 inches or larger.

[0502] A low-power television set 9000 can be realized by applying the display device described in the above embodiment to the television set 9000. Furthermore, low power consumption can reduce heat generation from a circuit, thereby reducing the influence of heat generation on the circuit itself, peripheral circuits, and modules.

[0503] [Mobile Body] The display device according to one embodiment of the present invention can also be applied to the vicinity of the driver's seat of an automobile, which is a mobile body.

[0504] Fig. 27G is a diagram showing the area around the windshield in the interior of an automobile 5700. Fig. 27G illustrates display panels 5701, 5702, and 5703 attached to the dashboard, as well as a display panel 5704 attached to a pillar.

[0505] The display panels 5701 to 5703 can display, for example, navigation information, a speedometer, a tachometer, a mileage, a fuel gauge, a gear status, and air conditioning settings. The display items and layouts displayed on the display panels can be changed as appropriate to suit the user's preferences, thereby improving the design. The display panels 5701 to 5703 can also be used as lighting devices.

[0506] The display panel 5704 can complement the view blocked by the pillar (blind spot) by displaying an image from an imaging means provided on the vehicle body. That is, by displaying an image from an imaging means provided on the outside of the automobile 5700, blind spots can be complemented and safety can be improved. Furthermore, by displaying an image that complements the invisible part, safety can be confirmed more naturally and without discomfort. The display panel 5704 can also be used as a lighting device.

[0507] The display device of one embodiment of the present invention can be applied to the display panels 5701 to 5704, for example.

[0508] Although an automobile is described above as an example of a moving object, the moving object is not limited to an automobile. For example, the moving object can be a train, a monorail, a ship, or an aircraft (e.g., a helicopter, an unmanned aerial vehicle (drone), an airplane, or a rocket), and the display device of one embodiment of the present invention can be applied to these moving objects.

[0509] 27H illustrates an example of a digital signage that can be attached to a wall. FIG. 27H illustrates a state in which a digital signage 6200 is attached to a wall 6201. The display device of one embodiment of the present invention can be applied to, for example, a display portion of the digital signage 6200. The digital signage 6200 may be provided with an interface such as a touch panel.

[0510] Although the above example shows an electronic device that can be mounted on a wall as an example of an electronic signboard, the type of electronic signboard is not limited to this. For example, electronic signboards can be mounted on a pole, placed on a stand on the ground, or installed on the roof or side wall of a building.

[0511] Note that this embodiment mode can be appropriately combined with other embodiment modes described in this specification.

[0512] Eighth Embodiment In this embodiment, a system including the electronic device described above and a server (sometimes called a computer) that functions on a network will be described.

[0513] 28A schematically illustrates, as an example, communication between an electronic device to which the display device of one embodiment of the present invention is applied and a server 5100. Note that communication 5110 is illustrated in FIG. 28A as an example of communication. Also, in FIG. 28A , an information terminal 5500, a camera 8000, a laptop information terminal 5300, a portable game console 5200, a car 5700, and a television set 9000 are illustrated as examples of the electronic device.

[0514] By configuring the electronic devices in this manner, when each electronic device performs large-scale arithmetic processing, the electronic device can transmit a signal including an instruction for the arithmetic processing to the server 5100, and the server 5100 can perform the arithmetic processing on behalf of the electronic device. In particular, in this manner, the electronic device does not need to have the data and application software required for the arithmetic processing, which can save on the storage capacity of the electronic device. Alternatively, since the electronic device does not need to perform the arithmetic processing, the load on the circuitry included in the electronic device can be reduced.

[0515] In this specification, the above-described system may be referred to as a thin client system. The electronic device may be referred to as a thin client terminal, and the server 5100 may be referred to as a thin client server.

[0516] For example, the processing performed by the server 5100 instead of the electronic device may include, for example, image processing to be displayed on the display unit of the display device (e.g., gradation adjustment processing, adjustment of brightness of each color, etc.), processing to set the image resolution of each area into which the display unit of the display device is divided, processing to set the frame frequency of each area into which the display unit of the display device is divided, or processing related to the eye tracking function, as described in the above embodiment.

[0517] The structure described in this embodiment mode can be used in appropriate combination with structures described in other embodiments.

[0518] DSP: display device, PXAL: pixel layer, EML: layer, OSL: layer, SICL: circuit layer, BS: substrate, SST: laminate, TP: touch sensor layer, DRV: drive circuit area, LIA: area, DIS: display section, ARA[1,1]: display area, ARA[2,1]: display area, ARA[m- 1,1]: Display area, ARA[m,1]: Display area, ARA[1,2]: Display area, ARA[2,2]: Display area, ARA[m-1,2]: Display area, ARA[m,2]: Display area, ARA[1,n-1]: Display area, ARA[2,n-1]: Display area, ARA[m-1,n- 1]: display area, ARA[m,n-1]: display area, ARA[1,n]: display area, ARA[2,n]: display area, ARA[m-1,n]: display area, ARA[m,n]: display area, ARD[1,1]: circuit area, ARD[2,1]: circuit area, ARD[m-1,1]: circuit area A RD[m,n-1]: circuit area, ARD[1,n]: circuit area, ARD[2,n]: circuit area, ARD[m-1,n]: circuit area, ARD[m,n]: circuit area, PRPH: control circuit, SD: drive circuit, SDS: circuit, GD: drive circuit, GDS: circuit, DMG: distribution circuit, DMS: distribution circuit, CTR: control unit, MD: memory device, PG: voltage generation circuit, TMC: timing controller, CKS: clock signal generation circuit, GPS: image processing unit, INT: interface, BW: bus wiring, PX: pixel, GL: wiring, GL1: wiring, GL2: wiring, SL: Wiring, ANO: wiring, CAT: wiring, VCOM: wiring, ASU: region, ASU_AF: region, ALPa: region, ALPb: region, ALPc: region, ALPd: region, ALPe: region, 30: driving circuit, 70A: pixel, 70B: pixel, 80: pixel, 80a: sub-pixel, 80b: sub-pixel, 80c: sub-pixel, 80d: sub-pixel, 81: conductor, 103: insulator, 104: conductor, 105: insulator, 106: conductor, 107: adhesive layer, 108: adhesive layer, 110: substrate, 111a: conductor, 111b: conductor, 111c: conductor, 112a: conductor, 112b: conductor,112c: conductor, 116: protective layer, 117: conductor, 118: conductor, 148: resin layer, 149: resin layer, 166R: colored layer, 166G: colored layer, 166B: colored layer, 167R: colored layer, 167G: colored layer, 170: LED package, 170R: LED package, 170G: LED package, 170B: LED package, 170A1: LED package, 170A2: LED package, 170A3: LED package, 170S: LED package, 171: substrate, 172: electrode, 173: electrode, 175: adhesive layer, 178: sealing layer, 180: L ED chip, 180A: LED chip, 180R: LED chip, 180G: LED chip, 180B: LED chip, 181: substrate, 181R: substrate, 181G: substrate, 181B: substrate, 182: semiconductor layer, 182a: semiconductor layer, 182b: semiconductor layer, 182c: semiconductor layer, 183: electrode, 183A: electrode, 183a: electrode, 183b: electrode, 183c: electrode, 184: light emitting layer, 184a: light emitting layer, 184b: light emitting layer, 184c: light emitting layer, 185: semiconductor layer, 185a: semiconductor layer, 185b: semiconductor layer, 185c: semiconductor layer, 186: electrode, 186a: electrode electrode, 186b: electrode, 186c: electrode, 187: electrode, 190: color conversion layer, 190a: color conversion layer, 190b: color conversion layer, 191: conductor, 192: conductor, 193a: conductor, 193b: conductor, 193c: conductor, 194a: conductor, 194b: conductor, 194c: conductor, 200: transistor, 200A: transistor, 200B: transistor, 200C: transistor, 211: insulator, 213: insulator, 214: insulator, 215: insulator, 218: insulator, 221: conductor, 222a: conductor, 222b: conductor, 223: conductor, 225: insulator Insulator, 231: semiconductor layer, 231n: low resistance region, 231i: channel formation region, 300: transistor, 310: substrate, 311: insulator, 312: insulator, 313: insulator, 314: insulator, 316: conductor, 317: conductor, 318: semiconductor layer, 318i: semiconductor region, 318p: low resistance region, 319: conductor, 320: insulator, 322: insulator, 410: substrate, 411: protective layer, 420: light emitting diode, 420R: light emitting diode, 420G: light emitting diode, 420B: light emitting diode, 500: pixel circuit, 600: capacitor, 1000: display device,1000A: display device, 1000C: display device, 1001: display device, 1001A: display device, 1280: display module, 1281: display unit, 1290: FPC, 1282: circuit unit, 1283: pixel circuit unit, 1283a: pixel circuit, 1284: pixel unit, 1284a: pixel, 1285: terminal unit, 1286: wiring unit, 1291: substrate, 1292: substrate, 1430a: light-emitting diode, 1430b: light-emitting diode, 1430c: light-emitting diode, 5200: portable game machine, 5 201: housing, 5202: display unit, 5203: buttons, 5300: notebook type information terminal, 5330a: housing, 5330b: housing, 5331: display unit, 5350: keyboard unit, 5500: information terminal, 5510: housing, 5511: display unit, 5701: display panel, 5702: display panel, 5703: display panel, 5704: display panel, 5900: information terminal, 5901: housing, 5902: display unit, 5903: operation buttons, 5904: crown, 5905: band, 6200: electronic watch Board, 6201: Wall, 8000: Camera, 8001: Housing, 8002: Display, 8003: Operation buttons, 8004: Shutter button, 8006: Lens, 8100: Viewfinder, 8101: Housing, 8102: Display, 8103: Button, 8200: Electronic device, 8201: Mounting part, 8202: Lens, 8203: Main body, 8204: Display, 8205: Cable, 8206: Battery, 8300: Electronic device, 8301: Housing, 8302: Display, 8303: Operation buttons, 83 04: Fixing device, 8304a: Fixing device, 8305: Lens, 8310: User, 8311: User, 8750: Electronic device, 8751: Display device, 8752: Housing, 8754: Mounting part, 8754A: Earphone, 8754B: Earphone, 8755: Cushioning member, 8756: Lens, 8757: Input terminal, 8758: Output terminal, 9000: Television device, 9001: Display part, 9002: Housing, 9003: Speaker, 9005: Operation key, 9006: Connection terminal, 9007: Sensor,

Claims

1. a first layer and a second layer having a region located above the first layer; the first layer has a drive circuit region; the second layer has a display area; the drive circuit area has a drive circuit, the drive circuit has a function of driving the display area, the drive circuit includes a first transistor; the display area has a plurality of pixels; each of the plurality of pixels includes a second transistor, a light emitting diode, a first conductive layer, and a second conductive layer; an insulating layer having a region located above the second transistor, the insulating layer having a plurality of openings; the first conductive layer has a region embedded in one of the plurality of openings; the second conductive layer has a region embedded in another one of the plurality of openings; one of the anode and the cathode of the light-emitting diode is electrically connected to the first conductive layer; The other of the anode and the cathode of the light-emitting diode is electrically connected to the second conductive layer.

2. a first layer and a second layer having a region located above the first layer; the first layer has a drive circuit region; the second layer has a display area and a sensor unit, the drive circuit area has a drive circuit, the drive circuit has a function of driving the display area, the drive circuit includes a first transistor; the display area has a plurality of pixels; each of the plurality of pixels includes a second transistor, a light emitting diode, a first conductive layer, and a second conductive layer; an insulating layer having a region located above the second transistor, the insulating layer having a plurality of openings; the first conductive layer has a region embedded in one of the plurality of openings; the second conductive layer has a region embedded in another one of the plurality of openings; one of the anode and the cathode of the light-emitting diode is electrically connected to the first conductive layer; the other of the anode and the cathode of the light-emitting diode is electrically connected to the second conductive layer; the sensor unit has a region located above the light-emitting diode, The display device, wherein an electrode of the touch sensor included in the sensor unit is arranged so as not to overlap a light-emitting layer of the light-emitting diode.