Power amplifier system

Abstract

A power amplifier system is disclosed having a carrier amplifier having a first supply node, a peaking amplifier having a second supply node, and an envelope tracking (ET) circuit. The ET circuit has a first tracking amplifier that generates a first voltage signal at the first supply node, a second tracking amplifier that generates a second voltage signal at the second supply node, and a transistor coupled between the first supply node and the second supply node. A control circuit has a first input coupled to the output of either or both the first tracking amplifier and the second tracking amplifier, and a control output terminal coupled to the control input terminal of the transistor. The control circuit is configured to gradually turn on the transistor to pass current from the first supply node to the second supply node as the peaking amplifier is gradually activated.

Description

Technology Field

[0001] Related applications

[0002] This application claims the benefits of provisional patent application serial number 63 / 149,556 filed on February 15, 2021, the disclosures of which are incorporated herein by reference in their entirety.

[0003] Technology field

[0004] The present invention relates generally to radio frequency transmitters, and more specifically to envelope tracking circuits that control Doherty-type power amplifiers within radio frequency transmitters. Background Technology

[0005] Mobile communication devices providing wireless communication services are becoming increasingly common in today's society. The proliferation of these mobile communication devices is partly driven by the many features currently available on them. The increased processing capabilities in these devices mean that mobile communication devices have evolved from pure communication tools into sophisticated mobile multimedia centers that enable enhanced user experiences.

[0006] The redefined user experience requires higher data rates provided by wireless communication technologies such as Wi-Fi, LTE, and 5G-NR (5-generation new-radio). To achieve higher data rates in mobile communication devices, sophisticated power amplifiers may be employed to increase the output power of radio frequency (RF) signals communicated by mobile communication devices (e.g., to maintain sufficient energy per bit).

[0007] Various power amplifier arrays have been proposed and implemented within transmitter chains of mobile communication devices to meet the power level control requirements of 5G-NR while also providing the desired output power. One such power amplifier array is the Doherty amplifier, which uses a carrier amplifier to operate at voltages up to average power and a carrier amplifier and peaking amplifier to operate at voltages between average and peak power. While the Doherty amplifier offers options for providing power amplification, there remains room to improve energy efficiency and linearity during power amplification.

[0008] A power amplifier system is disclosed having a carrier amplifier having a first supply node, a peaking amplifier having a second supply node, and an envelope tracking (ET) circuit. The ET circuit has a first tracking amplifier that generates a first voltage signal at the first supply node, a second tracking amplifier that generates a second voltage signal at the second supply node, and a transistor coupled between the first supply node, the second supply node, and a control input terminal. The first tracking amplifier and the second tracking amplifier may be referred to as parallel amplifiers. The control circuit has a first input coupled to the output of either or both the first tracking amplifier and the second tracking amplifier, and a control output terminal coupled to the control input terminal of the transistor. The control circuit is configured to gradually turn on the transistor to pass current from the first supply node to the second supply node as the peaking amplifier is gradually activated.

[0009] The present disclosure relates to envelope tracking operation with bare Doherty power amplifiers for additional improved transmitter efficiency, wherein the bare Doherty amplifiers exhibit an increase in extra power-added efficiency of about 5% compared to average power tracking amplifiers, and the bare Doherty amplifiers with envelope tracking exhibit an extra power-added efficiency of about +18% compared to average power tracking amplifiers.

[0010] In other embodiments, any of the foregoing embodiments may be combined individually or together, and / or various distinct embodiments and features as described herein may be combined for additional advantage. Any of the various features and elements as disclosed herein may be combined with one or more other disclosed features and elements unless otherwise indicated herein.

[0011] A person skilled in the art to which the present invention pertains will understand the scope of the present invention and realize additional embodiments after reading the following detailed description of preferred embodiments of the present invention in conjunction with the attached drawings. Brief explanation of the drawing

[0012] The accompanying drawings, incorporated into and forming part of this specification, serve to illustrate various aspects of the present disclosure and, together with the description, explain the principles of the present disclosure. FIG. 1 is a schematic diagram of a power amplifier system comprising an envelope tracking circuit configured according to the present disclosure to generate two modulated supply voltages from a single tracer circuit that enables a Doherty power amplifier. Figure 2a is a graph showing the peaking current of the peaking amplifier versus the main current of the carrier amplifier for the Doherty amplifier of Figure 1. Figure 2b is a graph showing the voltage versus carrier amplifier current of the peaking amplifier and carrier amplifier for the Doherty amplifier of Figure 1. Figure 3 is a graph showing the power supply voltage (Vcc) carrier and Vcc peaking swing for an ideal Doherty amplifier. Figure 4 is a graph showing the Vcc carrier and Vcc peaking swing for the Doherty amplifier of Figure 1. Figure 5 is a graph illustrating the efficiency improvement provided by the power amplifier system of the present invention. Specific details for implementing the invention

[0013] The embodiments presented below provide information necessary for a person skilled in the art to practice the embodiments and illustrate the best mode of practice for practicing the embodiments. By reading the following description in conjunction with the accompanying drawings, a person skilled in the art will understand the concepts of the present disclosure and recognize applications of these concepts not specifically addressed in this specification. It should be understood that such concepts and applications are within the scope of the present disclosure and the appended claims.

[0014] Terms such as first, second, etc., may be used to describe various elements, but these elements should not be limited by these terms. These terms are used solely for the purpose of distinguishing one element from another. For example, without departing from the scope of the invention, the first element may be named the second element, and similarly, the second element may be named the first element. As used herein, the term "and / or" includes any and all combinations of one or more of the associated enumerated items.

[0015] When an element such as a layer, region, or substrate is referred to as being "on" or extending "on" another element, it will be understood that it may be directly extended onto or directly extending onto the other element, or that intermediate elements may also exist. Conversely, if an element is referred to as being "directly" on or extending "directly onto" another element, there are no intermediate elements present. Likewise, when an element such as a layer, region, or substrate is referred to as being "on" or extending "up" another element, it will be understood that it may be directly extended onto or directly extending onto the other element, or that intermediate elements may also exist. Conversely, if an element is referred to as extending "directly" on or "directly extending" onto another element, there are no intermediate elements present. Furthermore, when an element is referred to as being "connected" or "joined" to another element, it will be understood that it may be directly connected or joined to the other element, or that intermediate elements may exist. Conversely, if an element is referred to as being "directly connected" or "directly joined" to another element, there are no intermediate elements present.

[0016] Relative terms such as "below," "above," "upper," "lower," "horizontal," or "vertical" may be used herein to describe the relationship between one element, layer, or region and another element, layer, or region as illustrated in the drawings. It will be understood that these terms and those discussed above are intended to include different orientations of the device in addition to the orientations illustrated in the drawings.

[0017] The terms used herein are for the purpose of describing specific embodiments only and are not intended to limit the disclosure. The singular forms (“a,” “an,” and “the”) used herein are intended to include the plural forms unless the context clearly indicates otherwise. It will be further understood that the terms used herein, “comprises,” “comprising,” “includes,” and / or “including,” specify the presence of the specified features, integers, steps, actions, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, actions, elements, components, and / or groups thereof.

[0018] Unless otherwise defined, all terms used herein (including technical and scientific terms) may be used in a meaning commonly understood by a person skilled in the art to which this disclosure pertains. Furthermore, terms used herein should be interpreted as having a meaning consistent with their meaning in the context of this specification and related technology, and should not be interpreted in an ideal or overly formal sense unless explicitly defined in this specification.

[0019] Embodiments are described herein with reference to schematic drawings of embodiments of the present disclosure. As such, the actual dimensions of layers and elements may vary, and variations from the shapes of the examples are expected, for example, as a result of manufacturing techniques and / or tolerances. For example, regions illustrated or described as square or rectangular may have rounded or curved features, and regions depicted as straight may have some irregularities. Accordingly, regions illustrated in the drawings are schematic, and their shapes are not intended to illustrate the exact shape of a region of the device and are not intended to limit the scope of the present disclosure. Additionally, the sizes of structures or regions may be exaggerated relative to other structures or regions for exemplary purposes and are provided to illustrate general structures of the subject matter of the present invention, and may or may not be drawn to scale. Common elements between the drawings may be illustrated herein with common element numbers and may not be subsequently described.

[0020] The present disclosure relates to envelope tracking integrated circuits (ETICs) having an approach referred to as DiVeRT, which enables a new power amplifier topology that generates two simultaneously modulated power supply voltages from a single tracer circuit and thus modulates the collector of a power amplifier ( D ual) moment( i instantaneous) voltage V oltage) reinforcement( e rapid R APID tracking T It represents racking.

[0021] Modulating the driver stages individually from the final output stages of the power amplifiers allows for a wide modulation bandwidth ET such as ET 200 MHz, where the modulation of the first driver stage has a corresponding Vcc time-aligned to the radio frequency (RF) envelope, and the modulation of the final stages has a corresponding Vcc time-aligned to the RF envelope, which is generally slightly delayed by inter-stage networks.

[0022] For a poor Doherty (or load modulation) power amplifier, that is, for separate envelope tracking of the carrier and peaking amplifiers, modulating the carrier amplifier stages and peaking amplifier stages individually allows for almost free additional bias control of these two amplifier stages, minimizes degradation due to the turn-on or turn-off of the peaking amplifier, improves efficiency in addition to the load modulation itself, and recovers the efficiency drop caused by the use of the poor Doherty approach. This is D 2 It is referred to as E, which represents the Doherty and dual ET method according to the present disclosure.

[0023] Modulating two power amplifiers used in transmit (TX) diversity to transmit the same RF modulated signal at similar or different power levels allows for the operation of the traditional approach of modulating both the final stage and the drivers of the power amplifiers in different modes of ET, such as ProET (progressive Voffset (e) envelope tracking) or normal ET of average power tracking (APT), or APeT, which indicate that the tracking amplifier operates in ET while using an APT controller that is disabled.

[0024] FIG. 1 is a schematic diagram of a power amplifier system (10) according to the present disclosure, comprising a Doherty power amplifier (PA) (12) and an envelope tracking (ET) circuit (14). In an exemplary embodiment of FIG. 1, the envelope tracking circuit (14) is in the form of an ETIC.

[0025] The Doherty PA (12) has a carrier amplifier (16) having a first supply node (18) and a peaking amplifier (20) having a second supply node (22). The Doherty PA (12) has an RF signal input section (24) that couples an RF signal (26) to the carrier amplifier (16) and the peaking amplifier (20). However, the RF signal (26) passes through a first impedance inverter (28) labeled "Ka" before reaching the peaking amplifier (20). During operation, the carrier amplifier (16) has a main current signal (I) that passes through a second impedance inverter (30) before reaching the RF output section (32). M ) generates. The peaking amplifier (20) generates the main current signal ( IM) Generates a peaking current signal (j*Ip) combined with the same phase. Load ( RL ) is coupled between the RF output section (32) and a fixed voltage node such as ground. Load ( RL ) is an antenna that typically transmits an amplified version of the RF signal (26).

[0026] The single tracer circuit (34) of the ET circuit section (14) supplies power to the Doherty amplifier (12). The single tracer circuit (34) is configured to generate two modulated Vcc supply voltages, Vcc and Vccaux. The micro-charge pump (MCP) (36) has an output coupled to the first supply output section (38) through the power inductor (40). The MCP (36) is at battery voltage V BAT Power is supplied by. The first supply node (18) is coupled to the first supply output (38) to supply power to the carrier amplifier (16).

[0027] The ET circuit section (14) also includes a first tracking amplifier (42) coupled to the first supply output section (38) by a relatively large capacitance (~2.2 μF) of the first offset capacitor (44). The first offset voltage (V OFFA ) exists across the first offset capacitor (44) during operation. The first feedback (FB) network (46) is coupled between the first supply output (38) and the first tracking input (48) of the first tracking amplifier (42).

[0028] The ET circuit section (14) also includes a second tracking amplifier (50) coupled to the second supply output section (52) by a relatively small capacitance (~10 nF) of the second offset capacitor (54). The second offset voltage (V OFFB ) exists across the second offset capacitor (54) during operation. The second feedback (FB) network (56) is coupled between the second supply output (52) and the second tracking input (58) of the second tracking amplifier (50). The second supply node (22) is coupled to the second supply output (52) to supply power to the peaking amplifier (20).

[0029] The tracking amplifier supply unit (60) is a first tracking amplifier supply voltage (V) that activates the first tracking amplifier (42). SUPA ) generates. The tracking amplifier supply (60) also generates a second tracking amplifier supply voltage (V) that activates the second tracking amplifier (50). SUPB ) generates. In some embodiments, the MCP (36) generates the first trace amplifier supply voltage (V) of the trace amplifiers (60). SUPA ) and second tracking amplifier supply voltage (V SUPB It can supply the DC voltage used to generate ).

[0030] A field-effect transistor (FET) (62) has a first current terminal (64) coupled to a first supply node (18) through a first output section (38). The FET (62) also has a second current terminal (66) coupled to a second supply node (22) through a second supply output section (52). A control terminal (68) is used to control the FET (62). A control circuit (70) has a control output section (72) coupled to the control terminal (68), and the control circuit (70) is configured to control the FET (62) to operate as a current source, as a closed switch, or as an open switch in linear mode. In at least some embodiments, the control circuit (70) includes a digital processor configured to read values ​​from lookup tables, apply values ​​to digital-to-analog converters, and read signal values ​​from analog-to-digital converters. In the exemplary embodiment of FIG. 1, the control circuit (70) has a first sensing input (74) coupled to the tracking output (76) of the second tracking amplifier (50) and a second sensing input (78) coupled to the second supply output (52). The differential sensing voltage between the first sensing input (74) and the second sensing input (78) is a second offset voltage (V OFFB It is the same as ).

[0031] The external transceiver receives the target Vramp modulation signal (V) from the Vramp input section (80) of the control circuit (70). TGT(t) ) generates. The control circuit (70) generates the first target signal (V) at the first target signal output section (82). TGTA(t) ) and the second target signal (V) in the second target signal output unit (84). TGTB(t) By simultaneously generating the target Vramp modulation signal (V TGT(t) It is configured to respond to the first target signal (V). TGTA(t) ) and the second target (V TGTB(t)) may have different amplitude shapes and different time alignments. The first target signal output (82) is coupled to the first target signal input (86) of the first tracking amplifier (42). In response, the first tracking amplifier (42) has a first tracking amplifier signal (V AMPA(t) It generates ). The second target signal output section (84) is coupled to the second target signal input section (88) of the second tracking amplifier (50). In response to this, the second tracking amplifier (50) generates the second tracking amplifier signal (V AMPB(t) Generates ). Both the first supply voltage (Vcc) and the second supply voltage (Vccaux) are the first trace amplifier signal (V AMPA(t) ) and the second tracking amplifier signal (V AMPB(t) Tracks )

[0032] During the operation of the Doherty amplifier (12), the envelope of the RF voltage across the carrier amplifier (16) is referred to as Vm, and the associated current is I M It is denoted as follows. The envelope of the RF voltage across the peaking amplifier is referred to as Vp, and the associated current is denoted as j*Ip, where j is the peaking current Ip and the main current I M It is a virtual component that illustrates a 90-degree phase difference between them. Furthermore, for the Doherty amplifier (12), it operates as a poor Doherty power amplifier with assumptions that load-line transitions do not necessarily have to be identical between the two amplifier stages.

[0033] FIGS. 2a and 2b show that the Doherty amplifier (12) D 2 Various currents and voltages are illustrated when operating using method E, where the peaking amplifier (20) is activated much lower than the -6 dB point relative to the peak envelope; that is, the Doherty operation of load-line modulation terminates or expires below the peak envelope power, and subsequently both the carrier and peaking amplifiers each deliver half of the power between point B and point C.

[0034] The average point of modulation does not need to be separated from point A, but can be separated from the point where the load modulation has already reduced the maximum impedance shown by the carrier amplifier at point A', thus reducing the load modulation efficiency improvement and thus utilizing the advantage of having envelope tracking on the carrier amplifier (16) to recover efficiency compared to an ideal Doherty amplifier.

[0035] The peaking amplifier (20) sees a different modulated RF voltage when activated, and thus can utilize having a separate ET modulation on the peaking amplifier (20). The voltage shown by the peaking amplifier (20) at point A is about half the voltage shown by the carrier amplifier (16) at point A, and the voltage shown by the peaking amplifier (20) at point B is equal to the voltage shown by the carrier amplifier (16) at point B, which is twice the voltage at the peaking amplifier (20) at point A. The voltage shown by the carrier amplifier (16) from point B to point C is similar to the voltage shown by the carrier amplifier (20) at these points.

[0036] In the case of a modulated signal with a peak-to-average ratio of 6 dB and an ideal Doherty case, FIG. 3 shows the modulated Vcc voltage for the carrier amplifier (16) and the peaking amplifier (20), where the modulated voltage swing of Vcc_peaking expected by the peaking amplifier is approximately Vccmax / 2 to Vccmax. When the Doherty amplifier (12) operates as a poor Doherty power amplifier, the modulated voltages change because the load modulation is activated early and expires before reaching the peak envelope of the RF modulation.

[0037] As illustrated in FIG. 4, the modulation of the supply voltage (Vcc) on the peaking amplifier (20) has a lower dynamic range compared to the modulation of the supply voltage (Vcc) of the carrier amplifier (16). This is because the minimum voltage is approximately equal to Vccm0 / 2 as illustrated in FIG. 4. Therefore, the second offset capacitor (54) can be pre-charged to a value near Vccm0 / 2 to supply the second tracking amplifier (50), which drives the supply of the peaking amplifier (20) from a lower voltage supply for improved efficiency. Two distinct Vcc modulation voltages (Vcc_carrier(t) Vcc_peaking(t)) allows for different load-line conversion and / or two different impedance inverter ratios for each of the carrier amplifier (16) and peaking amplifier (20). This flexibility allows for maximizing power efficiency.

[0038] To maximize the overall linearity of the Doherty amplifier (12), different linearizations may exist by different supply voltages for the carrier amplifier (16) and the peaking amplifier (20). For example, the carrier supply modulation (Vcc_carrier(t)) may be adjusted in proportion to values ​​stored in an envelope tracking lookup table (ET-LUT) that provides an isometric gain operation of the carrier amplifier (16). The peaking supply modulation (Vcc_peaking(t)) may have a different ET-LUT relationship with respect to the carrier supply modulation (Vcc_carrier) that allows an isometric gain operation of the peaking amplifier (20), so that the overall gain of the Doherty amplifier (12) is linearized by using two available modulated supplies. The ET-LUT change for Vcc_peaking relative to the ET-LUT relationship with respect to the Vcc_carrier can be directly implemented within the ET circuit section (14), which uses an input modulated Vramp signal used as a target by the Vcc_carrier and modifies it through an internal mapping change to generate a different target signal for Vcc_peaking as shown in FIG. 1.

[0039] FIG. 5 illustrates the expected efficiency improvement below point A, between the two peaking points A and B, and above point B. Assuming a high load line seen at point A and still some good efficiency at point A', the efficiency of the carrier amplifier (16) is good, but the load line drops at point A' due to barely operating, but is improved between point A and point C due to the modulated supply ET operation of the Vcc_carrier to maintain operation near compression.

[0040] Although the efficiency of the peaking amplifier (20) is good, the difference between (Vm(t) - Vp(t)), which represents the voltage across the FET element between Vcc(t) and Vccaux(t) of the ETIC, dissipates power for the modulated peaking current flowing through this FET and thus provides an equivalent to always supplying the peaking amplifier at the Vccm0 voltage between point A and point B.

[0041] The peaking amplifier (20) is biased with a lower supply (Vccmin_peaking) at the start, the peaking amplifier is activated, and the control of the Vcc_peaking voltage allows for better control of the RF performance of the peaking amplifier (20) and assigns better bias control at the gate / base and collector (not shown) compared to bias control only at the gate / base of the RF transistors (not shown). The minimum Vcc for Vcc_peaking may differ from the minimum Vcc_carrier, if this helps to better optimize the behavior of the peaking amplifier (20) when starting or stopping the sourcing of RF current. The minimum Vcc may also be approximately half the Vcc_carrier voltage at the transition point where the peaking amplifier (20) is coupled, provided that the Vp envelope is half the Vm envelope. Indirectly, the carrier amplifier (16) and the peaking amplifier (20) can be linearized because each has a self-modulated Vcc waveform that is adjusted by the value from each ET-LUT.

[0042] In the embodiments of the present disclosure, it is noted that the carrier amplifier modulated supply voltage (Vcc_carrier(t)) is always greater than or equal to the peaking amplifier modulated supply voltage (Vcc_peaking(t)). Accordingly, the embodiments of the present disclosure Vcc(t) Vccaux(t) is configured for the required DiVeRT approach.

[0043] Additionally, the carrier amplifier modulated supply voltage (Vcc_carrier(t)) has a low peak-to-average ratio and a low peak-to-minimum voltage ratio. Accordingly, the tracking amplifier supply voltage (V) for the first tracking amplifier (42) SUPA ) can be lower, which increases the energy efficiency of the envelope tracer circuit (14). Additionally, the peaking amplifier modulation supply voltage (Vcc_peaking(t)) for the peaking amplifier (20) has a reduced peak-to-minimum voltage ratio swing. V used to supply the first trace amplifier (42) and the second trace amplifier (20) differently, respectively. SUPB Two different voltages V smaller than SUPA The presence of provides maximum energy efficiency for the ET circuit section (14).

[0044] Mixing and matching of different power amplifier topologies using Vcc and Vccaux supply voltages may exist. Additionally, if there is any mismatch in time between the two RF envelopes in each power amplifier, there may be different time alignments between Vcc_carrier(t) and Vcc_peaking(t). Each power amplifier stage may be biased in Class-AB and may utilize ET amplitude modulation-amplitude modulation linearization of each amplifier through each supply path.

[0045] It is considered that any of the aforementioned embodiments, and / or various distinct embodiments and features as described herein may be combined for additional advantage. Any of the various embodiments disclosed herein may be combined with one or more other disclosed embodiments unless otherwise indicated herein.

[0046] A person skilled in the art will recognize improvements and modifications to the preferred embodiments of the present disclosure. All such improvements and modifications are considered within the scope of the concepts disclosed herein and the subsequent claims.

Claims

Claim 1 A power amplifier system comprising: a carrier amplifier having a first supply node; a peaking amplifier having a second supply node; and an envelope tracking (ET) circuit, wherein the circuit comprises: a first tracking amplifier configured to generate a first voltage signal at the first supply node; a second tracking amplifier configured to generate a second voltage signal at the second supply node; and a transistor having a first current terminal coupled to the first supply node and a second current terminal coupled to the second supply node. A power amplifier system comprising a control circuit having a first input coupled to the output of either or both of the first tracking amplifier and the second tracking amplifier, and a control output terminal coupled to a control input terminal of the transistor, wherein the control circuit is configured to gradually turn on the transistor to pass current from the first supply node to the second supply node as the peaking amplifier is gradually activated, and the control circuit is configured to cause the rate of change of the peaking current supplied to the peaking amplifier to be greater than the rate of change of the carrier current supplied to the carrier amplifier until the carrier current and the peaking current are substantially the same. Claim 2 A power amplifier system according to claim 1, wherein the control circuit determines that the peaking amplifier is becoming increasingly active by monitoring the tracking output voltage at the first input of the control circuit. Claim 3 In paragraph 2, the power amplifier system, wherein the control circuit has a second input coupled to the second supply node to monitor the voltage at the second supply node. Claim 4 A power amplifier system according to claim 3, wherein the control circuit is configured to monitor the differential voltage between the first input section and the second input section, and in response thereto, to gradually turn on the transistor to pass current from the first supply node to the second supply node as the peaking amplifier is gradually activated. Claim 5 A power amplifier system according to claim 1, wherein the first supply signal has a first amplitude modulation following the envelope of a radio frequency signal received by the ET circuit, and the second supply signal has a second amplitude modulation following the envelope of the radio frequency signal received by the ET circuit. Claim 6 A power amplifier system according to claim 1, wherein the rate of change of the peaking current supplied to the peaking amplifier has a slope that is at least twice the slope of the rate of change of the carrier current supplied to the carrier amplifier. Claim 7 A power amplifier system according to claim 1, wherein the ET circuit portion is integrated into an ET integrated circuit (ETIC). Claim 8 A power amplifier system according to claim 1, wherein the ET circuit is configured to ensure that the voltage at the first supply node supplied to the carrier amplifier is maintained to be greater than or equal to the voltage at the second supply node supplied to the peaking amplifier. Claim 9 A power amplifier system according to claim 1, wherein the ET circuit further comprises a tracer circuit having a micro-charge-pump having an output coupled to the first supply node through a power inductor. Claim 10 A power amplifier system according to claim 1, wherein the transistor is a field-effect transistor. Claim 11 A power amplifier system according to claim 1, wherein the carrier amplifier and the peaking amplifier are combined in a Doherty amplifier configuration. Claim 12 A power amplifier system according to claim 11, further comprising a first impedance inverter coupled between the signal output section of the carrier amplifier and the signal output section of the peaking amplifier. Claim 13 A power amplifier system according to claim 12, further comprising a second impedance inverter coupled between the signal input of the carrier amplifier and the signal input of the peaking amplifier. Claim 14 In paragraph 13, the power amplifier system wherein the first impedance inverter and the second impedance inverter have substantially different impedance inverter ratios. Claim 15 A power amplifier system according to claim 1, further comprising a first capacitor coupled between the output of the first tracking amplifier and the first supply node. Claim 16 A power amplifier system according to claim 15, further comprising a second capacitor coupled between the output of the second tracking amplifier and the second supply node. Claim 17 A power amplifier system according to claim 16, wherein the capacitance of the second capacitor is of a smaller order of magnitude than the capacitance of the first capacitor. Claim 18 A power amplifier system according to claim 1, wherein the control circuit is further configured to adjust the supply voltage at the first supply node based on values ​​stored in a first envelope tracking lookup table (ET-LUT) to provide equal gain operation of the carrier amplifier. Claim 19 A power amplifier system according to claim 1, wherein the control circuit is further configured to adjust the supply voltage at the second supply node based on values ​​stored in the second ET-LUT to provide equal gain operation of the peaking amplifier. Claim 20 delete

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