A storage server, a method of operating the same storage server and a data center including the same storage server

Abstract

A storage server is provided. The storage server comprises: a processor that generates a plurality of flush write commands in response to a write command for first data provided from a host, provides a replication command corresponding to the write command to a subsequent storage server, and receives a signal of operation completion for the replication command from the subsequent storage server; a memory in which a program is executed for a log file in which a plurality of flush write commands are logged; and a storage device that receives a single multi-offset write command for at least some of the plurality of flush write commands logged in the log file and performs a flush operation for the multi-offset write command, wherein the processor provides the multi-offset write command to the storage device based on the log file after receiving the signal of operation completion.

Description

Technology Field

[0001] The present invention relates to a storage server, a method for operating the storage server, and a data center including the storage server. Background Technology

[0002] Block services are used in distributed environments such as virtual machines and data centers. However, since block services assume a local block service, they require a "Strong Consistency" feature that enables the rapid reading of the latest write data upon read. This level of consistency is also observed in applications requiring high reliability, such as databases, and the aforementioned Strong Consistency feature demands more writes compared to the Weak Consistency feature.

[0003] In particular, since replication between servers and nodes is required during write operations in a distributed environment, context switching is necessary alongside the write operation; this leads to increased latency and inefficiency in processors such as CPUs, causing performance degradation in the overall distributed environment. The problem to be solved

[0004] The technical problem that the present invention aims to solve is to provide a storage server that increases CPU efficiency by reducing context switching.

[0005] The technical problem that the present invention aims to solve is to provide a storage server that performs operations related to a multi-offset write command requesting multiple write operations at once.

[0006] The technical problems of the present invention are not limited to those mentioned above, and other unmentioned technical problems will be clearly understood by a person skilled in the art from the description below. means of solving the problem

[0007] A storage server according to a certain embodiment for achieving the above technical objective comprises: a processor that generates a plurality of flush write commands in response to a write command for first data provided from a host, provides a replication command corresponding to the write command to a subsequent storage server, and receives a signal of operation completion for the replication command from the subsequent storage server; a memory in which a program is executed for a log file in which a plurality of flush write commands are logged; and a storage device that receives a single multi-offset write command for at least some of the plurality of flush write commands logged in the log file and performs a flush operation for the multi-offset write command, wherein the processor provides the multi-offset write command to the storage device based on the log file after receiving the signal of operation completion.

[0008] A storage server operation method according to several embodiments for achieving the above technical objective comprises generating a plurality of flush write commands in response to a write command for first data provided from a host, logging the plurality of flush write commands to a log file, and after the log operation, providing a replication command corresponding to the write command to a subsequent storage server, receiving a signal of operation completion for the replication command from the subsequent storage server, and after receiving the signal of operation completion, providing a single multi-offset write command for at least some of the plurality of flush write commands to a storage device.

[0009] A data center according to some embodiments for achieving the above technical problem comprises: an application server that provides a write command for first data; a first processor that generates a plurality of first flush write commands in response to the write command and provides a replication command corresponding to the write command; a first memory that executes a program on a first log file in which a plurality of first flush write commands are logged; a first storage server that is provided with one first multi-offset write command for at least some of the plurality of first flush write commands and performs a first flush operation on the first multi-offset write command; a second processor that generates a plurality of second flush write commands in response to a replication command provided by the first storage server and provides an operation completion signal to the first storage server; a second memory in which a program is executed on a second log file in which a plurality of second flush write commands are logged; and a second storage server that is provided with one second multi-offset write command for at least some of the plurality of second flush write commands and performs a second flush operation on the second multi-offset write command. Including, the first processor, after receiving an operation completion signal, provides a first multi-offset write command to a first storage device based on a first log file, and the second processor, after providing an operation completion signal, provides a second multi-offset write command to a second storage device based on a second log file. Brief explanation of the drawing

[0010] FIG. 1 is a block diagram illustrating a data center according to some embodiments of the present invention. FIG. 2 is a block diagram illustrating a storage server according to some embodiments of the present invention. FIG. 3 is a flowchart for explaining the operation of a storage server according to some embodiments of the present invention. FIG. 4 is a ladder diagram for explaining the operation of a data center according to some embodiments of the present invention. FIGS. 5 to 13 are drawings for explaining the operation of a storage server according to some embodiments of the present invention. FIG. 14 is a block diagram illustrating a storage server in a data center according to some other embodiments of the present invention. FIG. 15 is a diagram for explaining the operation of the embodiment of FIG. 14. FIGS. 16 to 18 are drawings for explaining the effects of a data center according to some embodiments of the present invention. Specific details for implementing the invention

[0011] Hereinafter, embodiments according to the technical concept of the present invention will be described with reference to the attached drawings. In the description of FIGS. 1 to 18, the same reference numerals are used for substantially identical components, and redundant descriptions of such components are omitted. Additionally, throughout the various drawings of the present invention, similar reference numerals are used for similar components.

[0012] FIG. 1 is a block diagram illustrating a data center according to some embodiments of the present invention.

[0013] Referring to FIG. 1, the data center (10) is a facility that collects various data and provides services, and may be referred to as a data storage center. The data center (10) may be a system for operating search engines and databases, a computing system used by companies such as banks or government agencies, and a distributed storage system. The data center (10) may include application servers (100 to 100n) and storage servers (200 to 200m). The number of application servers (100 to 100n) and the number of storage servers (200 to 200m) may be selected in various ways according to the embodiment, and the number of application servers (100 to 100n) and the number of storage servers (200 to 200m) may differ from each other. A plurality of storage servers (200 to 200m) may be included in a single cluster (C) and driven by each of the application servers (100 to 100n).

[0014] The application server (100) or storage server (200) may include at least one of a processor (110, 210) and a memory (120, 220). To describe the storage server (200) as an example, the processor (210) can control the overall operation of the storage server (200). Specific operations of the processors (210) according to some embodiments of the present invention will be described later.

[0015] The processor (210) can access memory (220) and execute instructions and / or data loaded into memory (220). Memory (220) may be DDR SDRAM (Double Data Rate Synchronous DRAM), HBM (High Bandwidth Memory), HMC (Hybrid Memory Cube), DIMM (Dual In-line Memory Module), Optane DIMM, or NVMDIMM (Non-Volatile DIMM). Likewise, specific operations of the memory (220) according to some embodiments of the present invention will be described later.

[0016] According to the embodiment, the number of processors (210) and the number of memory (220) included in the storage server (200) may be selected in various ways. In one embodiment, the processors (210) and memory (220) may provide processor-memory pairs. In one embodiment, the number of processors (210) and memory (220) may differ from each other. The processor (210) may include a single-core processor or a multi-core processor. The above description of the storage server (200) may similarly apply to the application server (100). According to the embodiment, the application server (100) may not include a storage device (150). The storage server (200) may include at least one storage device (250). The number of storage devices (250) included in the storage server (200) may be selected in various ways according to the embodiment.

[0017] Application servers (100 to 100n) and storage servers (200 to 200m) can communicate with each other through a network (300). The network (300) can be implemented using Fibre Channel (FC) or Ethernet, etc. In this case, FC is a medium used for relatively high-speed data transmission, and an optical switch providing high performance / high availability can be used. Depending on the access method of the network (300), the storage servers (200 to 200m) can be provided as file storage, block storage, or object storage.

[0018] In one embodiment, the network (300) may be a storage-dedicated network such as a Storage Area Network (SAN). For example, the SAN may be an FC-SAN that utilizes an FC network and is implemented according to the FC Protocol (FCP). As another example, the SAN may be an IP-SAN that utilizes a TCP / IP network and is implemented according to the iSCSI (SCSI over TCP / IP or Internet SCSI) protocol. In another embodiment, the network (300) may be a general network such as a TCP / IP network. For example, the network (300) may be implemented according to protocols such as FC over Ethernet (FCoE), Network Attached Storage (NAS), and NVMe over Fabrics (NVMe-oF).

[0019] Hereinafter, the description will focus on the application server (100) and the storage server (200). The description of the application server (100) may also apply to other application servers (100n), and the description of the storage server (200) may also apply to other storage servers (200m).

[0020] The application server (100) can store data requested for storage by a user or client in one of the storage servers (200 to 200m) via the network (300). Additionally, the application server (100) can obtain data requested for reading by a user or client from one of the storage servers (200 to 200m) via the network (300). For example, the application server (100) can be implemented as a web server or a DBMS (Database Management System), etc.

[0021] The application server (100) can operate as a host for storage servers (200 to 200m), etc. The application server (100) can access memory (120n) or storage device (150n) contained in another application server (100n) via the network (300), or can access memory (220-220m) or storage device (250-250m) contained in a storage server (200-200m) via the network (300). Thus, the application server (100) can perform various operations on data stored in the application servers (100-100n) and / or storage servers (200-200m). For example, the application server (100) can execute commands to move or replicate data between the application servers (100-100n) and / or storage servers (200-200m). At this time, data may be moved from the storage device (250-250m) of the storage servers (200-200m) through the memories (220-220m) of the storage servers (200-200m), or directly to the memory (120-120n) of the application servers (100-100n). Data moving through the network (300) may be encrypted data for security or privacy.

[0022] To illustrate with an example of a storage server (200), the interface (254) can provide a physical connection between the processor (210) and the controller (251) and a physical connection between the NIC (240) and the controller (251). For example, the interface (254) can be implemented in a Direct Attached Storage (DAS) manner, which directly connects the storage device (250) with a dedicated cable. Additionally, for example, the interface (254) can be implemented in various interface methods such as ATA (Advanced Technology Attachment), SATA (Serial ATA), e-SATA (external SATA), SCSI (Small Computer Small Interface), SAS (Serial Attached SCSI), PCI (Peripheral Component Interconnection), PCIe (PCI express), NVMe (NVM express), IEEE 1394, USB (universal serial bus), SD (secure digital) card, MMC (multi-media card), eMMC (embedded multi-media card), UFS (Universal Flash Storage), eUFS (embedded Universal Flash Storage), CF (compact flash) card interface, etc.

[0023] The storage server (200) may further include a switch (230) and a NIC (240). The switch (230) may selectively connect the processor (210) and the storage device (250) or selectively connect the NIC (240) and the storage device (250) according to the control of the processor (210).

[0024] In one embodiment, the NIC (240) may include a network interface card, a network adapter, etc. The NIC (240) may be connected to a network (300) by a wired interface, a wireless interface, a Bluetooth interface, an optical interface, etc. The NIC (240) may include internal memory, a DSP, a host bus interface, etc., and may be connected to a processor (210) and / or a switch (230), etc., through the host bus interface. The host bus interface may be implemented as one of the examples of the interface (254) described above. In one embodiment, the NIC (240) may be integrated with at least one of the processor (210), the switch (230), and the storage device (250).

[0025] In a storage server (200-200m) or application server (100-100n), a processor (110-110n, 210-210m) can program or read data by transmitting a command to a storage device (130-130n, 250-250m) or memory (120-120n, 220-220m). At this time, the data may be data that has been error-corrected through an ECC (Error Correction Code) engine. The data may be data that has undergone Data Bus Inversion (DBI) or Data Masking (DM) processing and may include Cyclic Redundancy Code (CRC) information. The data may be data that has been encrypted for security or privacy.

[0026] The storage device (150-150m, 250-250m) can transmit a control signal and a command / address signal to the NAND flash memory device (252-252m) in response to a read command received from the processor. Accordingly, when reading data from the NAND flash memory device (252-252m), the RE (Read Enable) signal is input as a data output control signal and can serve to output data to the DQ bus. A DQS (Data Strobe) can be generated using the RE signal. The command and address signals can be latched in the page buffer according to the rising edge or falling edge of the WE (Write Enable) signal.

[0027] The controller (251) can control the overall operation of the storage device (250). In one embodiment, the controller (251) may include Static Random Access Memory (SRAM). The controller (251) can write data to the NAND flash (252) in response to a write command, or read data from the NAND flash (252) in response to a read command. For example, the write command and / or read command may be provided by a processor (210) in the storage server (200), a processor (210m) in another storage server (200m), or a processor (110-110n) in an application server (100-100n). The DRAM (253) may temporarily store (buffer) data to be written to the NAND flash (252) or data read from the NAND flash (252). Additionally, the DRAM (253) may store metadata. Here, metadata is data for managing user data or NAND flash (252).

[0028] The storage device (250) may include a Secure Element (SE) for security or privacy. The storage device (250) may perform database functions for stored data stored by the data center (10a).

[0029] FIG. 2 is a block diagram illustrating a storage server (200p, 200s) according to some embodiments of the present invention.

[0030] A data center (10a) according to some embodiments of the present invention includes a host application server (100a), a first storage server (200p), and a second storage server (200s).

[0031] The host application server (100a) can provide a command (CMD) along with the data to the storage server (200p) via the network (300, see FIG. 1) based on the data (Data) requested for storage by a user or client. The host application server (100a) may correspond to at least one of the application servers (100-100n) of FIG. 1.

[0032] The first storage server (200p) may include a first processor (210p), a first NVDIMM (220p), and a first storage device (250p). The second storage server (200s) may include a first processor (210s), a second NVDIMM (220s), and a second storage device (250s).

[0033] In some embodiments of the present invention, the first storage server (200p) and the second storage server (200s) correspond to the storage server (200-200m) of FIG. 1. The first processor (210p) and the second processor (210s) correspond to the processor (210-210m) of FIG. 1, the first NVDIMM (220p) and the second NVDIMM (220s) correspond to the memory (220-220m) of FIG. 1, and the first storage device (250p) and the second storage device (250s) correspond to the storage device (250-250m) of FIG. 1. The first storage server (200p) and the second storage server (200s) may have the same configuration, and the configuration of the second storage server (200s) may be replaced by the configuration description of the first storage server (200p). Additionally, the second storage server (200s) corresponds to a subsequent storage server for the first storage server (200p) from the perspective of the host application server (100a).

[0034] The first processor (210p) receives data, a command (CMD) for the data, and a return signal (Return) associated with the command (CMD) from the first storage server (200p). The first processor (210p) can generate an additional command (CMD) in response to the received command (CMD) and provide it externally, and can receive a return signal (Return) and provide the return signal (Return) externally.

[0035] The first NVDIMM (220p) may include a first buffer (221p) and a first non-volatile memory device (222p), and the first non-volatile memory device (222p) may store and load a first log file (223p) and a first firmware (224p) to perform programming on the first log file (223p) and the first firmware (224p). The first non-volatile memory device (222p) may be an EEPROM (Electrically Erasable Programmable Read-Only Memory), flash memory, MRAM (Magnetic RAM), Spin-Transfer Torque MRAM (Spin-Transfer Torque MRAM), FeRAM (Ferroelectric RAM), PRAM (Phase change RAM), or Resistive RAM (RRAM).

[0036] The first buffer (221p) operates as a re-driving buffer and can re-drive signals / commands input from the first processor (210p) to provide the re-driven signals / commands to the first non-volatile memory device (222p) in the first NVDIMM (220p).

[0037] Commands for the first storage device (250p) can be logged in the first log file (223p). The first firmware (224p) causes the first processor (210p) to provide multi-offset write commands to the storage device (250p) based on the first log files (223p). In addition, the first firmware (224p) provides commands for operation to the first storage device (250p) via the first processor (210p) in software.

[0038] The first storage device (250p) receives a command from the first processor (210p) and can perform read / write operations according to the received command. The type of data programmed in the first storage device (250p) may be data that can be programmed by the storage device, such as externally input data, metadata and allocator for said data, and examples of said data types do not limit the technical concept of the present invention.

[0039] FIG. 3 is a flowchart illustrating the operation of a storage server according to some embodiments of the present invention. FIG. 4 is a ladder diagram illustrating the operation of a data center according to some embodiments of the present invention. FIG. 5 to 13 are drawings illustrating the operation of a storage server according to some embodiments of the present invention.

[0040] Referring to FIGS. 3 to 5, the first processor (210p) of the first storage device (200p) receives a write command (WCMD) for the first data (Data A) from the host application server (100a) (S110).

[0041] The first processor (210p) receives a write command (WCMD) for the first data (Data A), and first to third flush write commands (1) for the write command (WCMD). st flush WCMD-3 rd flush WCMD) logs to the first log file (223p) (S120).

[0042] Referring additionally to FIG. 6, the first flush light command (1 st flush WCMD) is a write command for the first data (Data A). The first data (Data A) is the data that the host requests to write from the first data layout (DL_a).

[0043] Second Flush Light Command (2 nd flush WCMD) is the write command of the first allocator (Allocator A) for the first data (Data A). The third flush write command (3 rd flush WCMD) is a write command for the first metadata (Metadata A) for the first data (Data A). The first allocator (Allocator A) is data for implementing resource allocation for the first data (Data A). The first metadata (Metadata A) is data for managing the first data (Data A).

[0044] The first processor (210p) sends the first flush write command (1) to the first log file (223p). st Logs the flush WCMD) (S121), and the second flush write command (223p) to the first log file (2 nd Logs the flush WCMD) (S122), and the third flush write command (3) to the first log file (223p). rd Logs the flush WCMD (S123). The order of the above logging operations is an example to explain the operation of the present invention, and the technical concept of the present invention is not limited to the above order.

[0045] Referring additionally to FIG. 7, the first processor (210p) provides a replica command (RepCMD) for a write command (WCMD) to the second storage server (200s) after the log operation (S120) for the first log file (223p) is completed (S130).

[0046] The second processor (210s) receives a replication command (RepCMD) for the first data (Data A), and first to third flush write commands (1) for the replication command (RepCMD). st flush WCMD-3 rdThe flush WCMD) is logged to the second log file (223s) (S140). According to the embodiment, the first to third flush write commands (1 st flush WCMD-3 rd flush WCMD) is the first to third flush write command (1) logged in the first log file (223p). st flush WCMD-3 rd It can be the same as flush WCMD.

[0047] The second processor (210s) writes the first flush write command (1) to the second log file (223s). st Logs the flush WCMD) (S141), and the second flush write command (223s) to the second log file (2 nd Logs the flush WCMD) (S142), and the third flush write command (3) to the second log file (223s). rd Logs the flush WCMD (S143). The order of the above logging operations is an example to explain the operation of the present invention, and the technical concept of the present invention is not limited to the above order.

[0048] Referring additionally to FIG. 8, the second processor (210s) provides a notification signal to the first storage server (200p) for the completion of the log operation (S140) for the second log file (223s) (S150).

[0049] According to some embodiments, the operation completion signal (notification signal) of the second processor (210s) signifies that the operation for the replication command (RepCMD) provided by the first storage server (200p) is completed, and this may be a return signal to the first storage server (200p).

[0050] The first processor (210p) provides a return signal for a write command (WCMD) to the host application server (100a) after receiving a notification signal (S160). The return signal for the write command (WCMD) indicates that the operation of the write command (WCMD) provided by the host application server (100a) has been completed.

[0051] Referring further to FIGS. 9 and FIGS. 10, the first firmware (224p) reads commands logged in the first log file (223p) (S170). It performs a multi-offset write command corresponding to the read commands and performs a flush operation corresponding to the multi-offset write command on the first storage device (250p) (S180).

[0052] The first log file (223p) logs the first data (Data A), the first allocator (Allocator A), and the first metadata (Metadata A) of FIG. 6 corresponding to the first multi-offset write command (WCMD).

[0053] With respect to the logged command, the log sequence number (LSN), the type of operation, the logical address, and the data may be logged. According to some embodiments, the log sequence number (LSN) may represent the order of commands logged to the first log file (223p), and according to some embodiments, may be performed as an index function for the command.

[0054] The types of operations of the logged command include insert, update, and delete, and the types of operations may vary depending on the embodiment. The first to third write commands (1) of the present invention st Flush WCMD-3 rd Flush WCMD) can correspond to an input or change operation.

[0055] A logical address may be entered as a logical address where data on which a command is executed is stored, and according to an embodiment, each command may be logged as a logical page number (LPN). For example, a first data (Data A) and a logical page number (LPNa) are logged together, a first allocator (Allocator A) and a logical page number (LPNb) are logged together, and a first metadata (Metadata A) and a logical page number (LPNc) are logged together.

[0056] In FIG. 10, each command is input in separate logical page number (LPN) units, but in a different embodiment, data in a single logical page number (LPN) unit can be programmed for multiple commands.

[0057] The first firmware (224p) is such that the first processor (210p) [delivers] one first multi-offset write command (1) for a command corresponding to the first to 16 log sequence numbers (LSN1-LSN16). st It is possible to control the issuance of MO_WCMD). However, the number of commands logged for the multi-offset write command to be issued may vary depending on the embodiment, and the multi-offset write command may be issued when the number of commands logged is greater than or equal to a pre-specified threshold (S181).

[0058] 1st multi-offset light command (1 st MO_WCMD) can be issued based on the first data (Data A), first allocator (Allocator A), and first metadata (Metadata A) of FIG. 6 corresponding to the write command (WCMD) and provided to the first storage device (250p).

[0059] FIG. 11 is a diagram illustrating the operation of an embodiment other than the embodiment of FIG. 10. Referring further to FIG. 11, regardless of the number of commands logged for a multi-offset write command to be issued, the first firmware (224p) is, after a predetermined threshold time (T) has elapsed following the issuance of a previous multi-offset write command or the reception of a write command (WCMD), the first processor (210p) issues a second multi-offset write command (2 nd It can control the issuance of MO_WCMD (S181).

[0060] Unlike FIG. 10, the first firmware (224p) has a first processor (210p) for a command corresponding to the first to twelfth log sequence numbers (LSN1-LSN12) a second multi-offset write command (2 nd Controls the issuance of MO_WCMD, and the first processor (210p) issues a multi-offset write command based on the first data (Data A) and the first allocator (Allocator A) of FIG. 6.

[0061] Referring further to FIG. 12, the first firmware (224p) sends a first multi-offset write command (1) to the first storage device (250p) along with a logical address. st MO_WCMD) can be provided. The first storage device (250p) performs a flush operation on a multi-offset write command based on the provided logical address (S183).

[0062] The flush operation (S183) of the first storage device (250p) is the first multi-offset write command (1 st The first to third flush light commands corresponding to MO_WCMD ((1 st Flush WCMD-3 rd Simultaneously performs the operation of Flush WCMD.

[0063] In some embodiments, the first storage device (250p) does not perform updates to mapping information that maps logical addresses to physical addresses in order to efficiently perform multi-offset write commands. For example, if a program of the first data (Data A, see FIG. 10) for the a-th physical page number (PPNa) to the a-th logical page number (LPNa) is executed, and thereafter there is no request for an update of mapping information from the first processor (210p) or the first firmware (224p), the mapping information for the a-th logical page number (LPNa) and the a-th physical page number (PPNa) is not updated.

[0064] Likewise, the program of the first allocator (Allocator A, see FIG. 10) for the b physical page number (PPNb) to the b logical page number (LPNb) is executed, and subsequently, if there is no request for an update of mapping information from the first processor (210p) or the first firmware (224p), the mapping information for the b logical page number (LPNb) and the b physical page number (PPNb) is not updated.

[0065] Likewise, a program of the first metadata (Metadata A, see FIG. 10) for the second logical page number (LPNc) is executed from the second physical page number (PPNc), and subsequently, if there is no request for an update of the mapping information from the first processor (210p) or the first firmware (224p), the mapping information for the second logical page number (LPNc) and the second physical page number (PPNc) is not updated.

[0066] Accordingly, mapping information for the logical addresses (LBN0-LBNx) and the physical addresses of the first storage device (PBN0-PBNy) that can be processed by the first processor (210p) in the first storage server (200p) according to some embodiments is not updated unless there is a separate request.

[0067] In a first storage device (250p) according to some embodiments, a physical page number (PPNa) may be placed in a data page area within the first storage device (250p), a physical page number (PPNb) may be placed in an allocator page area within the first storage device (250p), and a physical page number (PPNc) may be placed in a metadata page area within the first storage device (250p).

[0068] Referring further to FIG. 13, the processor removes the log of the command corresponding to the multi-offset write command from the log file (S190). The first processor (210p) removes the first multi-offset write command (1) from the first log file (223p). st The first to third flush light commands (1) corresponding to MO_WCMD) st Flush WCMD-3 rd Removes the logs of Flush WCMD (S191).

[0069] In FIGS. 9 to 13, the read operation (S171) of the first firmware (210p) and the issuance (S181) of the multi-offset write command (MO_WCMD), the flush operation (S183) of the first storage device (250p), and the removal operation (S191) of the first log file (223p) are illustrated, but corresponding to the operation of the first storage server (210p), the read operation (S172) of the second firmware (210s) and the issuance (S182) of the multi-offset write command (MO_WCMD), the flush operation (S184) of the second storage device (250s), and the removal operation (S192) of the second log file (223s) are performed in the second storage server (210s).

[0070] Accordingly, the read operation (S172) of the second firmware (210s) and the issuance (S182) of the multi-offset write command (MO_WCMD) in the second storage server (210s), the flush operation (S184) of the second storage device (250s), and the removal operation (S192) of the second log file (223s) can be replaced with the first storage server (210p).

[0071] However, the read operation (S172) of each second firmware (210s) and the issuance of the multi-offset write command (MO_WCMD) (S182), the flush operation (S184) of the second storage device (250s), and the removal operation (S192) of the second log file (223s) may be performed independently of the read operation (S171) of each first firmware (210p), the issuance of the multi-offset write command (MO_WCMD) (S181), the flush operation (S183) of the first storage device (250p), and the removal operation (S191) of the first log file (223p).

[0072] FIG. 14 is a block diagram illustrating a data center (10b) storage server (220p', 220s') according to some other embodiments of the present invention.

[0073] Hereinafter, with reference to FIG. 14, storage servers (200p', 200s') within a data center (10b) according to some other embodiments of the present invention will be described. The description will focus on the differences from the storage servers (200p, 200s) shown in FIG. 2.

[0074] The first storage server (200p') includes a first DIMM (220p') and a first non-volatile memory device (240p) separated from the first DIMM (220p'). The first DIMM (220p') includes volatile memory, and the volatile memory may be RAM (random access memory), DRAM (dynamic RAM), SRAM (static RAM), T-RAM (thyristor RAM), Z-RAM (zero capacitor RAM), or TTRAM (Twin Transistor RAM).

[0075] The first DIMM (220p') is loaded with the first log file (241p) and the first firmware (242p), and a program for the first log file (241p) and the first firmware (242p) can be executed. The first DIMM (220p') may correspond to the first NVDIMM (220p) of FIG. 2.

[0076] The first non-volatile memory device (240p) may be an EEPROM (Electrically Erasable Programmable Read-Only Memory), a flash memory, a MRAM (Magnetic RAM), a Spin-Transfer Torque MRAM (Spin-Transfer Torque MRAM), a FeRAM (Ferroelectric RAM), a PRAM (Phase change RAM), or a Resistive RAM (RRAM).

[0077] The first non-volatile memory device (240p) stores the first log file (241p) and the first firmware (242p), and the first log file (241p) and the first firmware (242p) stored in the first non-volatile memory device (240p) can be loaded into the first DIMM (220p'). The first non-volatile memory device (240p) may correspond to the first non-volatile memory device (222p) of FIG. 2 in that the first log file (241p) and the first firmware (242p) are stored.

[0078] The second storage server (200s') includes a second DIMM (220s') and a second non-volatile memory device (240s) separated from the second DIMM (220s'). Each of the second DIMM (220s') and the second non-volatile memory device (240s) may correspond to the first DIMM (220p') and the first non-volatile memory device (240p). Accordingly, it is self-evident that the description of the second DIMM (220s') and the second non-volatile memory device (240s) is replaced by the description of the first DIMM (220p') and the first non-volatile memory device (240p).

[0079] FIG. 15 is a diagram illustrating the operation of the embodiment of FIG. 14. The operation of FIG. 15 may be performed prior to the provision of a write command (WCMD) by the host application server (100a) in the embodiment of FIG. 2 (see FIG. 5).

[0080] The first log file (241p) and the first firmware (242p) stored in the first non-volatile memory device (240p) can be loaded into the first DIMM (220p'). A program for the first log file (241p) and the first firmware (242p) loaded from the first DIMM (220p') can be executed. Thus, before the program for the first log file (241p) and the first firmware (242p) is executed in the first DIMM (220p'), the first log file (241p) and the first firmware (242p) are loaded into the first DIMM (220p').

[0081] FIGS. 16 to 18 are drawings for explaining the effects of a data center (10) according to some embodiments of the present invention.

[0082] Referring to FIG. 2 and FIG. 16 to 18, the first and second storage servers (200p, 200s) according to some embodiments can perform a multi-offset write operation on a write command (WCMD). That is, they can perform a flush operation on a write command (WCMD).

[0083] Referring to FIG. 16, a storage server that cannot perform multi-offset write operations performs x IOPS (I / O per second) operations, but a first and second storage server (200p, 200s) according to some embodiments of the present invention can perform 4.54 x IOPS.

[0084] Referring to FIG. 17, a storage server that cannot perform multi-offset write operations requires y seconds to perform one I / O operation, whereas a first and second storage server (200p, 200s) according to some embodiments of the present invention requires 0.3 y seconds to perform one I / O operation.

[0085] Referring to FIG. 17, the processor of a storage server that cannot perform multi-offset write operations shows an efficiency of z% based on operating with 48 cores, but the processor (210p, 210s) of the first and second storage servers (200p, 200s) according to an embodiment of the present invention shows an efficiency of 1.25z%.

[0086] A first and second storage server (200p, 200s) according to some embodiments of the present invention can increase the efficiency of the processor and reduce the delay time required to perform I / O operations and increase the number of I / O operations per hour by performing a multi-offset write operation that simultaneously performs a plurality of flush write operations.

[0087] Although embodiments of the present invention have been described above with reference to the attached drawings, the present invention is not limited to the above embodiments and can be manufactured in various different forms, and those skilled in the art will understand that the present invention can be implemented in other specific forms without changing the technical concept or essential features of the present invention. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive. Explanation of the symbols

[0089] 10: Data Center 100a: Host Application Server 200p: 1st Storage Server 200s: 2nd Storage Server 210p: 1st processor 210s: 2nd processor 220p: 1st NVDIMM 220s: 2nd NVDIMM 250p: 1st storage device 250s: 2nd storage device

Claims

Claim 1 A processor that generates a plurality of flush write commands in response to a write command for first data provided from a host, provides a replication command corresponding to the write command to a subsequent storage server, and receives a signal of operation completion for the replication command from the subsequent storage server; a memory in which a program for generating a multi-offset write command based on a log file in which the plurality of flush write commands are logged is stored; and a storage device that receives a single multi-offset write command for at least some of the plurality of flush write commands logged in the log file and performs a flush operation on the multi-offset write command, wherein the processor provides the multi-offset write command to the storage device based on the log file after receiving the signal of operation completion. Claim 2 In claim 1, the processor provides a return signal for the write command to the host after receiving the operation completion signal, and the processor provides the multi-offset write command to the storage device after providing the return signal. Claim 3 In claim 1, the storage device is a storage server that receives the multi-offset write command and simultaneously performs a plurality of write operations corresponding to the multi-offset write command. Claim 4 In claim 1, the memory is a non-volatile memory, and the log file is stored in the memory on a storage server. Claim 5 In claim 1, the memory is a volatile memory, and the log file is stored in a storage server that is separated from the memory in a non-volatile memory device. Claim 6 A storage server according to claim 1, wherein the plurality of flush write commands includes a first flush write command, a second flush write command, and a third flush write command, wherein the first flush write command is a write command for the first data, the second flush write command is a write command for an allocator for the first data for implementing resource allocation of the first data, and the third flush write command is a write command for the metadata of the first data. Claim 7 In claim 1, when the number of write commands logged in the log file is greater than or equal to a predetermined threshold log value, the processor provides the multi-offset write command to the storage device based on the log file. Claim 8 A storage server operation method comprising generating a plurality of flush write commands in response to a write command for first data provided from a host, logging the plurality of flush write commands to a log file, providing a replication command corresponding to the write command to a subsequent storage server after the log operation, receiving a signal of operation completion for the replication command from the subsequent storage server, and after receiving the signal of operation completion, providing a single multi-offset write command for at least some of the plurality of flush write commands to a storage device. Claim 9 An application server including a host processor that outputs a write command for first data; a first processor that generates a plurality of first flush write commands in response to the write command and outputs a replication command corresponding to the write command; a first memory that stores a program for generating a first multi-offset write command based on a first log file in which the plurality of first flush write commands are logged; and a first storage device that is provided as a first multi-offset write command for at least some of the plurality of first flush write commands and performs a first flush operation on the first multi-offset write command; A data center comprising: a second storage server including a second processor that generates a plurality of second flush write commands in response to a replication command provided by the first storage server and outputs an operation completion signal to the first storage server; a second memory in which a program for generating a second multi-offset write command based on a second log file in which the plurality of second flush write commands are logged is stored; and a second storage device that receives at least some of the plurality of second flush write commands as one second multi-offset write command and performs a second flush operation on the second multi-offset write command. wherein the first processor provides the first multi-offset write command to the first storage device based on the first log file after receiving the operation completion signal, and the second processor provides the second multi-offset write command to the second storage device based on the second log file after providing the operation completion signal. Claim 10 A data center according to claim 9, wherein the first processor provides a return signal for the write command to the application server after receiving the operation completion signal, the first processor provides the first multi-offset write command to the first storage device after providing the return signal, and the second processor provides the second multi-offset write command to the second storage device after providing the return signal.

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