Device for detecting zone parallelity of SSD and operating method thereof

Abstract

A parallelism detection device according to the present technology includes a detection control circuit that generates a first request and a second request for any two zones among a plurality of zones included in an SSD; and an SSD controller that generates a first command and a second command according to the first request and the second request to control the SSD, wherein the SSD controller schedules the first command and the second command simultaneously or sequentially, and the detection control circuit determines the parallelism of any two zones using the response performance for any two zones.

Description

Technology Field

[0001] The present technology relates to a device for detecting zone parallelism in a Solid State Drive (SSD) and a method of operation thereof, and more specifically, to a device for detecting zone parallelism in a Zoned Namespace (ZNS) SSD and a method of operation thereof. Background Technology

[0002] ZNS SSDs are being developed as one of the next-generation SSDs.

[0003] ZNS SSDs group storage space into multiple zones; while each zone can be read in any order, write operations are only possible sequentially.

[0004] As such, ZNS SSDs have the characteristic of improving write performance and QoS by improving internal data placement.

[0005] SSDs contain multiple internal channels, and independent access is possible between different channels. Additionally, multiple ways can be assigned to each channel, and even if a single channel belongs to a different way, it can operate independently within that channel.

[0006] Many zones included in ZNS SSDs are mapped to channels and ways, and while parallel access is possible for two zones mapped to different channels and thus performance is improved, there is a problem where performance is degraded due to interference when accessing two zones included in the same channel.

[0007] In this case, there are no predetermined rules regarding how multiple zones are mapped to channels or ways, and since each manufacturer uses its own method, systems using SSDs cannot know this in advance. Prior art literature

[0008] (Patent Document 0001) KR 10-2020-0016809 AUS 2019 / 0042150 A1 The problem to be solved

[0009] The present technology provides a device and a method of operation capable of effectively detecting parallelism between zones in a ZNS SSD. means of solving the problem

[0010] A parallelism detection device according to one embodiment of the present invention includes: a detection control circuit that generates a first request and a second request for any two zones among a plurality of zones included in an SSD; and an SSD controller that generates a first command and a second command according to the first request and the second request to control the SSD, wherein the SSD controller schedules the first command and the second command simultaneously or sequentially, and the detection control circuit determines the parallelism of any two zones using the response performance for any two zones.

[0011] A parallelism detection method according to one embodiment of the present invention includes the steps of: selecting any two zones among a plurality of zones of an SSD; providing commands for any two zones to the SSD simultaneously or sequentially and measuring response performance; and determining parallelism for any two zones among a plurality of zones based on response performance. Effects of the invention

[0012] The parallelism of multiple zones included in an SSD can be determined using a parallelism detection device based on the present technology.

[0013] The parallelism detection device based on this technology can be used universally without being dependent on a specific SSD.

[0014] Since the parallelism detection operation only needs to be performed once for the SSD, it does not cause performance degradation in the system including the parallelism detection device. Brief explanation of the drawing

[0015] FIG. 1 is a block diagram showing a parallel zone detection device according to an embodiment of the present invention. FIG. 2 is an explanatory diagram showing a pivot zone and a needle zone in an SSD according to an embodiment of the present invention. FIG. 3 is a flowchart showing the operation of a parallel zone detection device according to the present invention. Figure 4 is a graph showing the read performance of the needle zone based on the pivot zone. Specific details for implementing the invention

[0016] Embodiments of the present invention are disclosed below with reference to the attached drawings.

[0017] FIG. 1 is a block diagram showing a parallel zone detection device (10) according to one embodiment of the present invention.

[0018] The parallel zone detection device (10) includes a detection control circuit (11), an SSD controller (12), and a storage circuit (13).

[0019] The detection control circuit (11) may be composed of hardware, software, or a combination of hardware and software and controls the detection control operation described below.

[0020] The SSD controller (12) generates a command corresponding to a request provided by the detection control circuit (11) to perform a read or write operation on the SSD (20).

[0021] For example, the detection control circuit (11) can generate a read request for two zones of the SSD (20) and provide it to the SSD controller (12).

[0022] The SSD controller (12) can provide a read command to the SSD (20) in response to a read request for two zones of the SSD (20), and receive a processing result from the SSD (20) to respond to the detection control circuit (11).

[0023] At this time, the SSD controller (12) provides read commands to the SSD (20) at substantially the same time in response to read requests for two zones.

[0024] For example, read commands for two zones can be scheduled simultaneously or sequentially and provided to the SSD (20).

[0025] When scheduling two read instructions sequentially, the time between scheduling points must be sufficiently short compared to the latency, for example, less than 1% of the latency.

[0026] The detection control circuit (11) determines parallelism using the response time to a read request for two zones.

[0027] In this embodiment, the SSD (20) is a ZNS SSD, and the commands required for read / write operations on the ZNS SSD are standardized as the NVMe ZNS command set.

[0028] Accordingly, a detailed description of the read and write operations for the ZNS SSD (20) performed by the SSD controller (12) is omitted.

[0029] FIG. 2 is a diagram showing a pivot zone and a needle zone in an SSD (20) according to one embodiment of the present invention.

[0030] The SSD (20) is a ZNS SSD, and the storage space is divided into multiple zones (21).

[0031] The detection control circuit (11) selects a pivot zone and a needle zone for parallel detection.

[0032] For example, if you select zone 0 as the pivot zone, you can select one of zones from 1 to n-1 as the needle zone.

[0033] Afterwards, when the pivot zone is changed to zone 1, one of zones from 2 to n-1 can be selected as the needle zone.

[0034] FIG. 3 is a flowchart showing the operation of a parallelism detection device (10) according to one embodiment of the present invention.

[0035] First, select the pivot zone (S110).

[0036] Afterwards, the latency corresponding to the request is measured while moving between needle zones (S120).

[0037] In this case, the request is, for example, a read request.

[0038] As mentioned above, if zone 0 is selected as the pivot zone, one of zones from 1 to n-1 can be selected as the needle zone.

[0039] The detection control circuit (11) generates a request for the pivot zone and a request for the needle zone, provides them to the SSD controller (12), and then records the response times for the two requests.

[0040] The SSD controller (12) can provide two commands to the SSD (20) by scheduling them simultaneously or sequentially, one for a request for a pivot zone and the other for a needle zone.

[0041] The parallelism between the current pivot zone and the needle zone is determined by referring to the measured latency (S130).

[0042] Figure 4 is a graph showing the latency relative to the needle zone with respect to the pivot zone.

[0043] Figure 4 is a graph showing the results of measuring latency when n=130, with zone 0 selected as the pivot zone and zones 1 through 129 selected as the needle zones.

[0044] In this embodiment, if there is a significant performance difference of 50% or more, that is, if the relative latency is 1.5 or more, it is determined that there is no parallelism.

[0045] From the graph, it can be seen that when the needle zones are 32, 64, 96, and 128, the latency increased by about 70 percent compared to other zones.

[0046] Through this, it is determined that zones 32, 64, 96, and 128 are not in a parallel relationship with zone 0, and that the remaining zones, excluding these, are in a parallel relationship with zone 0.

[0047] In the graph of Figure 4, there is a zone where the relative latency is measured between 1.1 and 1.2, which indicates a performance degradation of about 10 to 20%.

[0048] In the present invention, this degree of difference is determined to be due to conflicts arising from the use of other resources, such as interfaces and SSD controllers. That is, these zones are determined to be in a parallel relationship with zone 0.

[0049] As described above, in this embodiment, the parallel relationship was determined based on whether the relative latency exceeded 50%.

[0050] In other embodiments, a different threshold value may be used by considering a relative latency graph of the form shown in FIG. 4, and since the threshold value can be determined by a person skilled in the art using statistical analysis techniques, a specific description is omitted.

[0051] Then, it is determined whether the next pivot zone exists (S140). In this case, the next pivot zone refers to a zone that is not used as a pivot zone.

[0052] If the next pivot zone does not exist, the operation is terminated, and if the next pivot zone exists, the pivot zone is changed (S150), and the process moves to step (S120) to repeat the aforementioned operation.

[0053] When the operation is completed, the detection control circuit (11) may temporarily or permanently store the result of the judgment regarding the parallelism between any two zones in the storage circuit (13), and the result of the judgment may be provided to hardware or software using the SSD (20).

[0054] Hardware or software using the SSD (20) can control the SSD (20) in a way that improves the access speed to the SSD (20) by using the parallelism detection results.

[0055] Details regarding this are omitted as they exceed the scope of the present invention.

[0056] The scope of the present invention is not limited to the disclosure above. The scope of the present invention should be interpreted based on the scope literally described in the claims and their equivalents. Explanation of the symbols

[0057] 10: Parallelism detection device 11: Parallelism detection circuit 12: SSD Controller 20: SSD

Claims

Claim 1 A parallelism detection device comprising: a detection control circuit that generates a first request and a second request for any two zones among a plurality of zones included in an SSD; and an SSD controller that generates a first command and a second command according to the first request and the second request to control the SSD, wherein the SSD controller schedules the first command and the second command simultaneously or sequentially, and the detection control circuit determines the parallelism of any two zones using the response performance for any two zones. Claim 2 A parallelism detection device according to claim 1, further comprising a storage circuit for storing a parallelism determination result for any two of the plurality of zones. Claim 3 In claim 1, the detection control circuit is a parallelism detection device that determines parallelism by comparing the relative response performance of any two zones among the plurality of zones. Claim 4 A parallelism detection device according to claim 3, wherein the response performance is latency. Claim 5 In claim 4, the detection control circuit is a parallelism detection device that determines that there is no parallelism when the relative latency exceeds 1.

5. Claim 6 A method for determining parallelism by a parallelism detection device of claim 1, comprising: selecting any two zones among a plurality of zones of an SSD; providing commands for the any two zones to the SSD simultaneously or sequentially and measuring response performance; and determining parallelism for any two zones among the plurality of zones based on the response performance. Claim 7 In claim 6, the step of determining parallelism is a parallelism determination method that measures the relative response performance to commands for the two zones. Claim 8 In claim 7, the response performance is a parallelism determination method in which latency is used. Claim 9 In claim 8, the step of determining parallelism is a method for determining parallelism in which the relative latency is determined to be non-parallel when it exceeds 1.5.

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