Non-inductive upgrade method for interrupt processing program, and computer system

Abstract

The present application belongs to the technical field of data processing. Provided are a non-inductive upgrade method for an interrupt processing program, and a computer system. The method comprises: in response to an upgrade operation for an interrupt processing program to be upgraded, a BMC acquiring said interrupt processing program and an upgrade parameter; the BMC transferring said interrupt processing program into a BIOS Flash on the basis of the upgrade parameter, so as to cover a historical interrupt processing program, which corresponds to said interrupt processing program, in the BIOS Flash, and sending an upgrade interrupt signal to an interrupt processor; and the interrupt processor starting an interrupt upgrade program and acquiring the upgrade parameter, moving, on the basis of the upgrade parameter, said interrupt processing program in the BIOS Flash to a physical memory address, so as to cover the historical interrupt processing program corresponding to said interrupt processing program, and then using same as a new interrupt processing program. The present application aims to perform an online upgrade on an interrupt processing program.

Description

Interrupt processing program senseless upgrade method and computer system

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to the Chinese patent application filed with the China Patent Office on September 25, 2023, with application number 202311243963.X and entitled “A method for seamlessly upgrading an interrupt handler and a computer system”, the entire contents of which are incorporated by reference into this application. Technical Field

[0003] The embodiments of the present application relate to the technical field of data processing, and in particular to a method for seamlessly upgrading an interrupt handler and a computer system. Background Art

[0004] The interrupt mechanism is one of the basic mechanisms in the computer system. It plays the role of a communication network in the system to coordinate the system's response and processing of various external events. Interrupts are a necessary condition for implementing multiprogramming.

[0005] The processor in a computer system often has a high-level privilege interrupt mechanism. The BIOS (Basic Input Output System) and the OS (Operator System) enter the privileged interrupt handler by triggering a high-level privilege interrupt. For example, when refreshing the BIOS firmware image under the OS, the OS cannot directly access the BIOS Flash memory to ensure the security of the firmware image. Therefore, a high-level privilege interrupt must be triggered under the OS. The interrupt handler of this interrupt has the highest processor privilege and updates the BIOS Flash memory through this privileged code. High-level privilege interrupts can also be used to perform processor-level fault diagnosis, such as accessing processor registers in privileged code to analyze system faults.

[0006] However, the privileged code of an interrupt handler itself may also have problems. Once the privileged code for processing high-level permission functions has problems, the system may experience serious problems such as system crashes. Currently, when modifying or upgrading the privileged code of an interrupt handler, it is necessary to shut down and restart the system for the modified privileged code of the interrupt handler to take effect.

[0007] Summary of the Invention

[0008] The embodiments of the present application provide a method and a computer system for seamlessly upgrading an interrupt handler, aiming to upgrade the privileged code of an interrupt handler online.

[0009] In a first aspect, an embodiment of the present application provides a method for seamlessly upgrading an interrupt handler, the method comprising:

[0010] The BMC (Baseboard Management Controller) obtains the interrupt handler to be upgraded and upgrade parameters of the interrupt handler to be upgraded in response to the upgrade operation for the interrupt handler to be upgraded, wherein the upgrade parameters include an interrupt number and a code length;

[0011] Based on the upgrade parameters, the BMC transfers the interrupt handler to be upgraded to the BIOS Flash (BIOS Flash, the flash memory of the basic input and output system), overwriting the historical interrupt handler corresponding to the interrupt handler to be upgraded in the BIOS Flash, and sends an upgrade interrupt signal to the interrupt processor;

[0012] The interrupt processor starts the interrupt upgrade program in response to the upgrade interrupt signal;

[0013] The interrupt upgrade program obtains the upgrade parameters of the interrupt handler to be upgraded, moves the interrupt handler to be upgraded in the BIOS Flash to the physical memory address according to the upgrade parameters, and overwrites the historical interrupt handler corresponding to the interrupt handler to be upgraded in the physical memory address as the new interrupt handler.

[0014] Optionally, after the BMC responds to the upgrade operation for the interrupt handler to be upgraded, the method further includes:

[0015] BMC starts the BMC upgrade program stored in the BMC;

[0016] Based on the upgrade parameters, the BMC transfers the interrupt handler to be upgraded to the BIOS Flash, overwriting the historical interrupt handler corresponding to the interrupt handler to be upgraded, and sends an upgrade interrupt signal to the interrupt processor, including:

[0017] The BMC upgrade program transfers the interrupt handler to be upgraded to the BIOS Flash according to the upgrade parameters, overwriting the historical interrupt handler corresponding to the interrupt handler to be upgraded.

[0018] The BMC upgrade program sends an upgrade interrupt signal to the interrupt processor. The upgrade interrupt signal carries an interrupt number corresponding to the interrupt upgrade program.

[0019] Optionally, the BMC upgrade program transfers the interrupt handler to be upgraded to the BIOS Flash according to the upgrade parameters, overwriting the historical interrupt handler corresponding to the interrupt handler to be upgraded, including:

[0020] The BMC upgrade program reads the interrupt handler to be upgraded stored in the BMC according to the code length in the upgrade parameter;

[0021] The BMC upgrade program determines the target storage location of the interrupt handler to be upgraded in the BIOS Flash according to the interrupt number in the upgrade parameter, and transfers the interrupt handler to be upgraded to the corresponding target storage location in the BIOS Flash, overwriting the historical interrupt handler stored in the target storage location with the interrupt handler to be upgraded.

[0022] Optionally, the interrupt handler starts an interrupt upgrade program in response to the upgrade interrupt signal, including:

[0023] The interrupt processor obtains the interrupt upgrade program at the physical memory address and starts the interrupt upgrade program according to the interrupt number corresponding to the interrupt upgrade program carried in the upgrade interrupt signal.

[0024] Optionally, the method further comprises:

[0025] Through a data transmission channel with a CPU (Central Processing Unit), the BMC sends the upgrade parameters of the interrupt handler to be upgraded to the CPU register for storage.

[0026] Optionally, the interrupt upgrade program obtains upgrade parameters of the interrupt handler to be upgraded, including:

[0027] The interrupt upgrade program reads the CPU register to obtain the upgrade parameters of the interrupt handler to be upgraded.

[0028] Optionally, the BMC sends the upgrade parameters of the interrupt handler to be upgraded to the CPU register for storage through the data transmission channel between the BMC and the CPU, including:

[0029] Through the PECI (Platform Environment Control Interface) channel of the Intel platform, the BMC sends the upgrade parameters of the interrupt handler to be upgraded to the CPU register for storage.

[0030] Optionally, the BMC sends the upgrade parameters of the interrupt handler to be upgraded to the CPU register for storage through the data transmission channel between the BMC and the CPU, including:

[0031] Through a universal standard PCIe (PCIe: peripheral component interconnect express, a high-speed serial computer expansion bus standard) channel, the BMC sends the upgrade parameters of the interrupt handler to be upgraded to the CPU register for storage.

[0032] Optionally, obtaining the interrupt handler to be upgraded and upgrade parameters of the interrupt handler to be upgraded includes:

[0033] When the upgrade parameters of the interrupt handler to be upgraded are stored in the file header of the interrupt handler to be upgraded, the BMC obtains the file header of the file of the interrupt handler to be upgraded and parses it to obtain the upgrade parameters of the interrupt handler to be upgraded.

[0034] Optionally, the interrupt upgrade program obtains upgrade parameters of the interrupt handler to be upgraded, including:

[0035] The interrupt upgrade program identifies the file header of the interrupt handler to be upgraded in the BIOS Flash and parses it to obtain upgrade parameters of the interrupt handler to be upgraded.

[0036] Optionally, after the interrupt upgrade program identifies a file header of the interrupt handler to be upgraded in the BIOS Flash and parses to obtain upgrade parameters of the interrupt handler to be upgraded, the method further includes:

[0037] The interrupt upgrade program erases the file header of the interrupt handler to be upgraded.

[0038] Optionally, the method further comprises:

[0039] When the BMC responds to the upgrade operation for the interrupt handler to be upgraded, it detects whether the interrupt handler to be upgraded includes a file header;

[0040] When the interrupt handler to be upgraded contains a file header, the file header carries an upgrade identifier;

[0041] The interrupt upgrade program identifies the file header of the interrupt handler to be upgraded in the BIOS Flash and parses it to obtain the upgrade parameters of the interrupt handler to be upgraded, including:

[0042] The interrupt upgrade program searches for the upgrade identifier, determines the file header of the interrupt handler to be upgraded corresponding to the upgrade identifier, and parses the file header to obtain the upgrade parameters of the interrupt handler to be upgraded.

[0043] Optionally, when the interrupt handler to be upgraded includes a file header, the file header carries an upgrade identifier, including:

[0044] A hash calculation is performed on the upgrade parameters of the interrupt processing program to be upgraded, and the calculated upgrade parameter hash value is added as an upgrade identifier to the file header of the interrupt processing program to be upgraded.

[0045] Optionally, the interrupt upgrade program obtains upgrade parameters of the interrupt handler to be upgraded, moves the interrupt handler to be upgraded in the BIOS Flash to a physical memory address according to the upgrade parameters, and overwrites a historical interrupt handler corresponding to the interrupt handler to be upgraded in the physical memory address, including:

[0046] The interrupt upgrade program determines the storage location of the interrupt handler to be upgraded in the BIOS Flash according to the interrupt number of the interrupt handler to be upgraded, and reads the interrupt handler to be upgraded according to the code length of the interrupt handler to be upgraded;

[0047] The interrupt upgrade program determines the location of the historical interrupt handler corresponding to the interrupt handler to be upgraded in the physical memory address according to the interrupt number, and overwrites the historical interrupt handler with the interrupt handler to be upgraded.

[0048] Optionally, the method further comprises:

[0049] Configure the upgrade interrupt signal corresponding to the interrupt upgrade program to the highest priority.

[0050] Optionally, after the BMC obtains the interrupt handler to be upgraded and the upgrade parameters of the interrupt handler to be upgraded in response to the upgrade operation on the interrupt handler to be upgraded, the method further includes:

[0051] When the BMC receives multiple different interrupt handlers to be upgraded, it assigns upgrade priorities to the multiple different interrupt handlers to be upgraded according to the interrupt types of the interrupt handlers to be upgraded;

[0052] The interrupt processor responds to the upgrade interrupt signal and starts the interrupt upgrade program, including:

[0053] The interrupt upgrade program upgrades a plurality of different interrupt handling programs to be upgraded in sequence according to their priorities.

[0054] Optionally, after overwriting the historical interrupt handler corresponding to the interrupt handler to be upgraded in the physical memory address as the new interrupt handler, the method further includes:

[0055] When the interrupt processor detects the interrupt signal corresponding to the new interrupt handler, it executes the new interrupt handler.

[0056] Optionally, the method further comprises:

[0057] After the interrupt handler to be upgraded is used as the new interrupt handler, an upgrade completion prompt is generated.

[0058] Optionally, the method further comprises:

[0059] The upgrade process of the interrupt handler to be upgraded is monitored, and when the upgrade of the interrupt handler to be upgraded fails, an upgrade failure prompt is generated.

[0060] In a second aspect, an embodiment of the present application provides a computer system, which includes a BMC, a BIOS Flash, an interrupt handler, and a physical memory address, and the computer is used to execute the interrupt handler seamless upgrade method as described in the first aspect of the embodiment. Beneficial effects:

[0061] When an interrupt handler needs to be upgraded, the BMC responds to the upgrade operation for the interrupt handler to be upgraded, obtains the interrupt handler to be upgraded and the upgrade parameters of the interrupt handler to be upgraded, the upgrade parameters including the interrupt number and code length; then, based on the upgrade parameters, the BMC transfers the interrupt handler to be upgraded to the BIOS Flash, overwriting the historical interrupt handler corresponding to the interrupt handler to be upgraded in the BIOS Flash, and sends an upgrade interrupt signal to the interrupt processor; then, the interrupt processor responds to the upgrade interrupt signal and starts the interrupt upgrade program; the interrupt upgrade program obtains the upgrade parameters of the interrupt handler to be upgraded, moves the interrupt handler to be upgraded in the BIOS Flash to the physical memory address based on the upgrade parameters, and overwrites the historical interrupt handler corresponding to the interrupt handler to be upgraded in the physical memory address as the new interrupt handler.

[0062] This method provides a seamless upgrade method for interrupt handlers, which can upgrade interrupt handlers online. The interrupt handlers to be upgraded located in the physical memory address take effect immediately without the need to shut down and restart the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0063] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments of the present application. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0064] FIG1 is a flowchart of the steps of a method for seamlessly upgrading an interrupt handler according to some embodiments of the present application;

[0065] FIG2 is a schematic diagram of a computer system proposed in some embodiments of the present application. Specific embodiments

[0066] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0067] 1 , a flowchart of a method for seamlessly upgrading an interrupt handler according to an embodiment of the present application is shown. The method may specifically include the following steps:

[0068] S101: In response to an upgrade operation for an interrupt handler to be upgraded, the BMC obtains the interrupt handler to be upgraded and upgrade parameters of the interrupt handler to be upgraded, where the upgrade parameters include an interrupt number and a code length.

[0069] When the user needs to upgrade any interrupt handler, the user uploads the program code of the interrupt handler to be upgraded and the upgrade parameters of the interrupt handler to be upgraded to the BMC. The upgrade parameters include the interrupt number and code length of the interrupt handler to be upgraded.

[0070] The interrupt number of the interrupt handler corresponds one-to-one to the storage location of the interrupt handler in the BIOS Flash and the physical memory address. The interrupt handler to be upgraded is an upgrade of the historical interrupt handler, and the historical interrupt handler is already stored in the BIOS Flash. Therefore, the BIOS has determined the interrupt number corresponding to the historical interrupt handler, and the interrupt number of the interrupt handler to be upgraded is the same as that of its corresponding historical interrupt handler.

[0071] In the actual implementation process, the BMC may provide a communication interface for the user to upload the interrupt handler to be upgraded to perform an upgrade operation on the interrupt handler to be upgraded.

[0072] In some feasible implementations, the user is allowed to upload the program code of the interrupt handler to be upgraded and the upgrade parameters of the interrupt handler to be upgraded respectively through the communication interface, and the BMC can directly obtain the interrupt handler to be upgraded and the upgrade parameters.

[0073] In other feasible implementations, the user is allowed not to upload the upgrade parameters of the interrupt handler to be upgraded separately, but to add a recognizable file header to the program file of the interrupt handler to be upgraded, and add the upgrade parameters of the interrupt handler to be upgraded in the recognizable file header.

[0074] When the BMC responds to the upgrade operation for the interrupt handler to be upgraded, if the upgrade parameters of the interrupt handler to be upgraded are not directly obtained, the BMC may obtain the file header of the file of the interrupt handler to be upgraded and parse it to obtain the upgrade parameters of the interrupt handler to be upgraded.

[0075] S102: The BMC transfers the interrupt handler to be upgraded to the BIOS Flash according to the upgrade parameters, overwriting the historical interrupt handler corresponding to the interrupt handler to be upgraded in the BIOS Flash, and sends an upgrade interrupt signal to the interrupt processor.

[0076] The BIOS Flash stores all interrupt handlers in the OS. Since the BIOS Flash has the characteristic of non-volatile storage, the saved data will not be lost when the system is powered off. When the system is powered on, the interrupt handlers stored in the BIOS Flash are automatically copied to the physical memory address. When the interrupt processor detects the interrupt signal corresponding to any interrupt handler, it calls and executes the interrupt handler in the physical memory address.

[0077] Therefore, it is necessary to first save the interrupt handler to be upgraded in the BIOS Flash so that the upgraded interrupt handler can still be obtained the next time the system is powered on. Specifically, the BMC reads the interrupt handler to be upgraded stored in the BMC according to the code length in the upgrade parameters, and then determines the target storage location corresponding to the interrupt handler to be upgraded in the BIOS Flash according to the interrupt number in the upgrade parameters, and transfers the interrupt handler to be upgraded to the corresponding target storage location in the BIOS Flash, overwriting the historical interrupt handler stored in the target storage location with the interrupt handler to be upgraded. In this way, only the upgraded interrupt handler is stored in the BIOS Flash, and the historical interrupt handler has been overwritten.

[0078] After the interrupt handler to be upgraded is stored in the BIOS Flash, the interrupt handler to be upgraded is not yet effective in the current system working state. Further, the BMC needs to send an upgrade interrupt signal to the interrupt processor to trigger the interrupt upgrade program so that the interrupt handler to be upgraded is effective in the current system working state.

[0079] In some feasible implementations, in order to improve the efficiency of interrupt upgrade, a thread for processing interrupt upgrade tasks is written in the BMC, such as adding a BMC upgrade program in the BMC.

[0080] When the BMC responds to the upgrade operation for the interrupt processing program to be upgraded, the BMC upgrade program stored in the BMC is started while the interrupt processing program to be upgraded and the upgrade parameters are obtained.

[0081] Then, the BMC upgrade program reads the interrupt handler to be upgraded stored in the BMC according to the code length in the upgrade parameters, and determines the target storage location corresponding to the interrupt handler to be upgraded in the BIOS Flash according to the interrupt number in the upgrade parameters, and transfers the interrupt handler to be upgraded to the corresponding target storage location in the BIOS Flash, overwriting the historical interrupt handler stored in the target storage location with the interrupt handler to be upgraded.

[0082] Next, the BMC upgrade program sends an upgrade interrupt signal to the interrupt processor. The upgrade interrupt signal carries an interrupt number corresponding to the interrupt upgrade program.

[0083] The interrupt upgrade program is essentially an interrupt handler. The interrupt upgrade program can be pre-stored in the BIOS Flash for stable storage. Each time the system is powered on, the interrupt upgrade program is automatically copied to the physical memory address. Therefore, the interrupt upgrade program also corresponds to an interrupt number. The interrupt number corresponding to the interrupt upgrade program corresponds one-to-one with the storage location of the interrupt upgrade program in the BIOS Flash and the physical memory address.

[0084] S103: The interrupt processor starts the interrupt upgrade program in response to the upgrade interrupt signal.

[0085] Specifically, the interrupt processor starts the interrupt upgrade program at a storage location of the interrupt upgrade program corresponding to the physical memory address according to the interrupt number corresponding to the interrupt upgrade program carried in the upgrade interrupt signal.

[0086] In some feasible implementations, considering that the interrupt mechanism is one of the most important basic mechanisms in a computer system, coordinating the system's response and processing of various external events, if the timeliness requirements for the upgrade of the interrupt handler are high, if the upgrade process of the interrupt handler takes a long time, it will affect the system's response to normal interrupt signals, thereby causing system crashes and other problems. Therefore, the upgrade interrupt signal corresponding to the interrupt upgrade program can be configured as the highest priority. When the interrupt processor receives the upgrade interrupt signal corresponding to the interrupt upgrade program, it will give priority to processing the upgrade interrupt signal, thereby reducing the duration of the interrupt handler upgrade.

[0087] S104: The interrupt upgrade program obtains upgrade parameters of the interrupt handler to be upgraded, moves the interrupt handler to be upgraded in the BIOS Flash to the physical memory address according to the upgrade parameters, and overwrites the historical interrupt handler corresponding to the interrupt handler to be upgraded in the physical memory address as the new interrupt handler.

[0088] Although the interrupt handler stored in the BIOS Flash will not be lost due to system power failure, it does not interrupt the processor and cannot be called or started directly in the BIOS Flash. Therefore, the interrupt handler needs to be stored in the physical memory address before it can be used in the current working state of the system. Therefore, after the interrupt upgrade program is started, the interrupt upgrade program is responsible for moving the interrupt handler to be upgraded stored in the BIOS Flash to the physical memory address.

[0089] Specifically, after the interrupt upgrade program is started, the interrupt upgrade program first needs to obtain the upgrade parameters of the interrupt handler to be upgraded, and the interrupt handler to be upgraded can be obtained according to the interrupt number and code length in the upgrade parameters.

[0090] In some feasible implementations, the BMC may participate in the parameter transfer process of the upgrade parameters. Specifically, through the data transmission channel between the BMC and the CPU, the BMC upgrade program sends the upgrade parameters of the interrupt handler to be upgraded to the CPU register for storage.

[0091] The data transmission channel between the BMC and the CPU can be specifically designed according to the type of CPU. For example, the BMC sends the upgrade parameters of the interrupt handler to be upgraded to the CPU register for storage through the PECI channel of the Intel platform, or sends the upgrade parameters of the interrupt handler to be upgraded to the CPU register for storage through the universal standard PCIe channel.

[0092] When the interrupt upgrade program needs to obtain the upgrade parameters of the interrupt processing program to be upgraded, the interrupt upgrade program reads the CPU register to obtain the upgrade parameters of the interrupt processing program to be upgraded.

[0093] In other feasible implementations, the BMC does not participate in the parameter transmission process of the upgrade parameters. Specifically, when the user does not upload the upgrade parameters of the interrupt handler to be upgraded separately, but adds a recognizable file header to the program file of the interrupt handler to be upgraded, and adds the upgrade parameters of the interrupt handler to be upgraded to the recognizable file header, the interrupt handler to be upgraded stored in the BIOS Flash still carries the recognizable file header.

[0094] When the interrupt upgrade program needs to obtain upgrade parameters of the interrupt handler to be upgraded, the interrupt upgrade program identifies the file header of the interrupt handler to be upgraded in the BIOS Flash and parses it to obtain the upgrade parameters of the interrupt handler to be upgraded.

[0095] Furthermore, to prevent the interrupt upgrade program from repeatedly upgrading the same interrupt handler to be upgraded, the interrupt upgrade program can erase the file header of the interrupt handler to be upgraded stored in the BIOS Flash after parsing and obtaining the upgrade parameters of the interrupt handler to be upgraded.

[0096] In other feasible implementations, in order to improve the ability of the interrupt upgrade program to quickly locate the file header of the interrupt handler to be upgraded in the BIOS Flash, the BMC can detect whether the interrupt handler to be upgraded contains a file header when responding to the upgrade operation on the interrupt handler to be upgraded; if the interrupt handler to be upgraded contains a file header, the file header carries an upgrade identifier. For example, a hash calculation can be performed on the upgrade parameters of the interrupt handler to be upgraded, and the calculated upgrade parameter hash value can be added as an upgrade identifier to the file header of the interrupt handler to be upgraded.

[0097] When the interrupt upgrade program identifies the file header of the interrupt handler to be upgraded in the BIOS Flash, the interrupt upgrade program searches for the upgrade identifier, determines the file header of the interrupt handler to be upgraded corresponding to the upgrade identifier, and parses to obtain the upgrade parameters of the interrupt handler to be upgraded, further improving the efficiency of the interrupt handler upgrade process.

[0098] After the interrupt upgrade program obtains the upgrade parameters of the interrupt handler to be upgraded, the interrupt upgrade program determines the storage location of the interrupt handler to be upgraded in the BIOS Flash according to the interrupt number of the interrupt handler to be upgraded, and reads the interrupt handler to be upgraded according to the code length of the interrupt handler to be upgraded; the interrupt upgrade program determines the location of the historical interrupt handler corresponding to the interrupt handler to be upgraded in the physical memory address according to the interrupt number, overwrites the historical interrupt handler with the interrupt handler to be upgraded, and exits the interrupt handler. At this time, the interrupt handler to be upgraded can be used as a new interrupt handler and can be started in response to the corresponding interrupt signal of the system in the current working state. Specifically, when the interrupt processor detects the interrupt signal corresponding to the new interrupt handler, it executes the new interrupt handler.

[0099] This method provides a seamless upgrade method for interrupt handlers, which can upgrade interrupt handlers online. The interrupt handlers to be upgraded located in the physical memory address take effect immediately without the need to shut down and restart the system, and the efficiency of interrupt handler upgrades is improved.

[0100] In some feasible implementations, when the BMC receives multiple different interrupt handlers to be upgraded, upgrade priorities are assigned to the multiple different interrupt handlers to be upgraded according to the interrupt types of the interrupt handlers to be upgraded; when the interrupt processor starts the interrupt upgrade program in response to the upgrade interrupt signal, the interrupt upgrade program upgrades the multiple different interrupt handlers to be upgraded in sequence according to the priorities; for example, the upgrade priorities assigned to the multiple different interrupt handlers to be upgraded can be determined according to the degree of impact of the corresponding interrupt handlers on the basic operation of the system, and users can be allowed to customize them; by assigning upgrade priorities to the multiple different interrupt handlers to be upgraded, the interrupt upgrade program is allowed to upgrade the multiple different interrupt handlers to be upgraded in sequence according to the priorities, and the upgrade process of the interrupt handler can be executed more reasonably.

[0101] In other feasible implementations, after the interrupt handler to be upgraded is used as the new interrupt handler, an upgrade completion prompt can be generated, or the upgrade process of the interrupt handler to be upgraded can be monitored. When the upgrade of the interrupt handler to be upgraded fails, an upgrade failure prompt can be generated to notify the user in time. The user can make a fault recovery response in time according to the upgrade failure prompt of the interrupt handler to be upgraded.

[0102] In some feasible implementations, the method for executing the interrupt handler seamless upgrade method is as follows:

[0103] The BMC provides a communication interface for users to upload the interrupt handler to be upgraded. The user uploads the program code of the interrupt handler to be upgraded and the upgrade parameters of the interrupt handler to be upgraded respectively. The BMC responds to the upgrade operation on the interrupt handler to be upgraded, obtains the interrupt handler to be upgraded and the upgrade parameters, stores the interrupt handler to be upgraded in the BMC, and starts the BMC upgrade program stored in the BMC.

[0104] The BMC upgrade program reads the interrupt handler to be upgraded stored in the BMC according to the code length in the upgrade parameters, and determines the target storage location corresponding to the interrupt handler to be upgraded in the BIOS Flash according to the interrupt number in the upgrade parameters. The BMC upgrade program transfers the interrupt handler to be upgraded to the corresponding target storage location in the BIOS Flash, and overwrites the historical interrupt handler stored in the target storage location with the interrupt handler to be upgraded.

[0105] Then, through the data transmission channel between the BMC upgrade program and the CPU, the upgrade parameters of the interrupt handler to be upgraded are sent to the CPU register for storage. At the same time, the BMC upgrade program sends an upgrade interrupt signal to the interrupt processor, and the upgrade interrupt signal carries the interrupt number corresponding to the interrupt upgrade program.

[0106] The interrupt processor responds to the upgrade interrupt signal with the highest priority, and starts the interrupt upgrade program at the storage location of the interrupt upgrade program corresponding to the physical memory address according to the interrupt number corresponding to the interrupt upgrade program carried in the upgrade interrupt signal.

[0107] The interrupt upgrade program reads the CPU register to obtain the upgrade parameters of the interrupt handler to be upgraded.

[0108] After the interrupt upgrade program obtains the upgrade parameters of the interrupt handler to be upgraded, the interrupt upgrade program determines the storage location of the interrupt handler to be upgraded in the BIOS Flash according to the interrupt number of the interrupt handler to be upgraded, and reads the interrupt handler to be upgraded according to the code length of the interrupt handler to be upgraded; the interrupt upgrade program determines the location of the historical interrupt handler corresponding to the interrupt handler to be upgraded in the physical memory address according to the interrupt number, overwrites the historical interrupt handler with the interrupt handler to be upgraded, exits the interrupt handler, uses the interrupt handler to be upgraded as the new interrupt handler, and generates an upgrade completion prompt.

[0109] Afterwards, when the interrupt signal corresponding to the new interrupt handler is detected, the new interrupt handler is executed.

[0110] In some other feasible implementations, the interrupt handler non-sensing upgrade method is executed as follows:

[0111] The BMC provides a communication interface for users to upload the interrupt handler to be upgraded. Users do not upload the upgrade parameters of the interrupt handler to be upgraded separately. Instead, users add a recognizable file header to the program file of the interrupt handler to be upgraded and add the upgrade parameters of the interrupt handler to the recognizable file header.

[0112] When the BMC responds to the upgrade operation for the interrupt handler to be upgraded, the BMC can obtain the file header of the file of the interrupt handler to be upgraded, parse it to obtain the upgrade parameters of the interrupt handler to be upgraded, and perform hash calculation on the upgrade parameters of the interrupt handler to be upgraded to obtain an upgrade parameter hash value, and add the calculated upgrade parameter hash value as an upgrade identifier to the file header of the interrupt handler to be upgraded.

[0113] The BMC upgrade program reads the interrupt handler to be upgraded stored in the BMC according to the code length in the upgrade parameters, and determines the target storage location corresponding to the interrupt handler to be upgraded in the BIOS Flash according to the interrupt number in the upgrade parameters. The BMC upgrade program transfers the interrupt handler to be upgraded to the corresponding target storage location in the BIOS Flash, and overwrites the historical interrupt handler stored in the target storage location with the interrupt handler to be upgraded.

[0114] Then, the BMC upgrade program sends an upgrade interrupt signal to the interrupt processor. The upgrade interrupt signal carries the interrupt number corresponding to the interrupt upgrade program. The interrupt processor responds to the upgrade interrupt signal with the highest priority and starts the interrupt upgrade program at the storage location corresponding to the interrupt upgrade program in the physical memory address according to the interrupt number corresponding to the interrupt upgrade program carried in the upgrade interrupt signal.

[0115] The interrupt upgrade program searches for the upgrade identifier in the BIOS Flash, further determines the file header of the interrupt handler to be upgraded corresponding to the upgrade identifier, and parses the file header to obtain the upgrade parameters of the interrupt handler to be upgraded.

[0116] After the interrupt upgrade program parses and obtains the upgrade parameters of the interrupt handler to be upgraded, the interrupt upgrade program erases the file header of the interrupt handler to be upgraded stored in the BIOS Flash to avoid the interrupt upgrade program from repeatedly upgrading the same interrupt handler to be upgraded.

[0117] After the interrupt upgrade program obtains the upgrade parameters of the interrupt handler to be upgraded, the interrupt upgrade program determines the storage location of the interrupt handler to be upgraded in the BIOS Flash according to the interrupt number of the interrupt handler to be upgraded, and reads the interrupt handler to be upgraded according to the code length of the interrupt handler to be upgraded; the interrupt upgrade program determines the location of the historical interrupt handler corresponding to the interrupt handler to be upgraded in the physical memory address according to the interrupt number, overwrites the historical interrupt handler with the interrupt handler to be upgraded, exits the interrupt handler, uses the interrupt handler to be upgraded as the new interrupt handler, and generates an upgrade completion prompt.

[0118] Afterwards, when the interrupt signal corresponding to the new interrupt handler is detected, the new interrupt handler is executed.

[0119] In some other feasible implementations, the interrupt handler non-sensing upgrade method is executed as follows:

[0120] Based on the BMC providing a communication interface for users to upload the interrupt handler to be upgraded, the user uploaded the program code and upgrade parameters of the interrupt handler to be upgraded respectively, and uploaded two different interrupt handlers to be upgraded consecutively.

[0121] In response to the upgrade operation for the interrupt handler to be upgraded, the BMC obtains the first interrupt handler to be upgraded and the corresponding upgrade parameters, and the second interrupt handler to be upgraded and the corresponding upgrade parameters, and stores the interrupt handler to be upgraded in the BMC.

[0122] The BMC determines the upgrade priorities of the first interrupt handler to be upgraded and the second interrupt handler to be upgraded respectively according to the corresponding relationship between the impact of the preset interrupt handler on the basic operation of the system and the upgrade priority of the interrupt handler to be upgraded.

[0123] The BMC starts the BMC upgrade program stored in the BMC.

[0124] The BMC upgrade program reads the upgrade parameters of the first interrupt handler to be upgraded stored in the BMC according to the code length in the upgrade parameters of the first interrupt handler to be upgraded, determines the target storage location corresponding to the first interrupt handler to be upgraded in the BIOS Flash according to the interrupt number of the first interrupt handler to be upgraded, transfers the first interrupt handler to be upgraded with the upgrade priority to the corresponding target storage location in the BIOS Flash, and overwrites the corresponding historical interrupt handler stored in the target storage location with the first interrupt handler to be upgraded.

[0125] The BMC upgrade program reads the upgrade parameters of the second interrupt handler to be upgraded stored in the BMC according to the code length in the upgrade parameters of the second interrupt handler to be upgraded, determines the target storage location corresponding to the second interrupt handler to be upgraded in the BIOS Flash according to the interrupt number of the second interrupt handler to be upgraded, transfers the second interrupt handler to be upgraded with the upgrade priority to the corresponding target storage location in the BIOS Flash, and overwrites the corresponding historical interrupt handler stored in the target storage location with the second interrupt handler to be upgraded.

[0126] Then, through the data transmission channel between the BMC upgrade program and the CPU, the upgrade parameters and upgrade priority of the first interrupt handler to be upgraded, as well as the upgrade parameters and upgrade priority of the second interrupt handler to be upgraded, are sent to the CPU register for storage. At the same time, the BMC upgrade program sends an upgrade interrupt signal to the interrupt processor, and the upgrade interrupt signal carries the interrupt number corresponding to the interrupt upgrade program.

[0127] The interrupt processor responds to the upgrade interrupt signal with the highest priority, and starts the interrupt upgrade program at the storage location of the interrupt upgrade program corresponding to the physical memory address according to the interrupt number corresponding to the interrupt upgrade program carried in the upgrade interrupt signal.

[0128] The interrupt upgrade program reads the CPU register, obtains the upgrade parameters and upgrade priority of the first interrupt handler to be upgraded, as well as the upgrade parameters and upgrade priority of the second interrupt handler to be upgraded, and stores the upgrade parameters of the two interrupt handlers to be upgraded in the waiting queue of the interrupt upgrade program.

[0129] The interrupt upgrade program compares the upgrade priority of the first interrupt handler to be upgraded and the second interrupt handler to be upgraded. For example, it is assumed that the upgrade priority of the first interrupt handler to be upgraded is higher than the upgrade priority of the second interrupt handler to be upgraded.

[0130] In the interrupt upgrade program, the storage location of the first interrupt handler to be upgraded in the BIOS Flash is first determined according to the interrupt number of the first interrupt handler to be upgraded which has a higher upgrade priority, and the first interrupt handler to be upgraded is read according to the code length of the first interrupt handler to be upgraded; the interrupt upgrade program determines the location of the historical interrupt handler corresponding to the first interrupt handler to be upgraded in the physical memory address according to the interrupt number of the first interrupt handler to be upgraded, overwrites the historical interrupt handler with the first interrupt handler to be upgraded, uses the first interrupt handler to be upgraded as the new interrupt handler, and generates a prompt indicating that the upgrade of the first interrupt handler to be upgraded is completed.

[0131] Then, the interrupt upgrade program reads the upgrade parameters of the second interrupt handler to be upgraded in the pending queue, determines the storage location of the second interrupt handler to be upgraded in the BIOS Flash according to the interrupt number of the second interrupt handler to be upgraded, and reads the second interrupt handler to be upgraded according to the code length of the second interrupt handler to be upgraded; the interrupt upgrade program determines the location of the historical interrupt handler corresponding to the second interrupt handler to be upgraded in the physical memory address according to the interrupt number of the second interrupt handler to be upgraded, overwrites the historical interrupt handler with the second interrupt handler to be upgraded, uses the second interrupt handler to be upgraded as the new interrupt handler, and generates a prompt that the upgrade of the second interrupt handler to be upgraded is completed.

[0132] Afterwards, when an interrupt signal corresponding to any new interrupt processing program is detected, the new interrupt processing program is executed.

[0133] Referring to Figure 2, a schematic diagram of a computer system provided in an embodiment of the present application is shown, a computer system including a BMC, a BIOS Flash, an interrupt handler and a physical memory address, and the computer is used to execute the interrupt handler seamless upgrade method as in the embodiment.

[0134] Specifically, in response to the upgrade operation for the interrupt processing program to be upgraded, the BMC obtains the interrupt processing program to be upgraded and upgrade parameters of the interrupt processing program to be upgraded, where the upgrade parameters include an interrupt number and a code length.

[0135] The BMC transfers the interrupt handler to be upgraded to the BIOS Flash according to the upgrade parameters, overwriting the historical interrupt handler corresponding to the interrupt handler to be upgraded in the BIOS Flash, and sends an upgrade interrupt signal to the interrupt processor.

[0136] The interrupt handler responds to the upgrade interrupt signal and starts the interrupt upgrade program. The interrupt upgrade program obtains the upgrade parameters of the interrupt handler to be upgraded and, based on the upgrade parameters, moves the interrupt handler to be upgraded from the BIOS Flash to a physical memory address. This overwrites the historical interrupt handler corresponding to the interrupt handler to be upgraded in the physical memory address and becomes the new interrupt handler.

[0137] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0138] Those skilled in the art will appreciate that the embodiments of the present application can be provided as methods, devices, or computer program products. Therefore, the present application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM (Compact Disc Read-Only Memory), optical storage, etc.) containing computer-usable program code.

[0139] The present application embodiment is described with reference to the flow chart and / or block diagram of the method, terminal device (system), and computer program product according to the embodiment of the present application. It should be understood that each process and / or box in the flow chart and / or block diagram and the combination of the process and / or box in the flow chart and / or block diagram can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor or other programmable data processing terminal device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device produce a device for realizing the function specified in one process or multiple processes and / or one box or multiple boxes of the flow chart.

[0140] These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing terminal device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including an instruction device that implements the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.

[0141] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device so that a series of operating steps are executed on the computer or other programmable terminal device to produce computer-implemented processing, so that the instructions executed on the computer or other programmable terminal device provide steps for implementing the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.

[0142] Although preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they become aware of the basic inventive concepts. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0143] Finally, it should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that includes a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or terminal device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or terminal device that includes the element.

[0144] This document uses specific examples to illustrate the principles and implementation methods of this application. The description of the above embodiments is only used to help understand the method and core ideas of this application. At the same time, for those skilled in the art, based on the ideas of this application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting this application.

Claims

1. A method for seamlessly upgrading an interrupt processing program, characterized in that: The method comprises: In response to the upgrade operation for the interrupt handler to be upgraded, the BMC acquires the interrupt handler to be upgraded and upgrade parameters of the interrupt handler to be upgraded, wherein the upgrade parameters include an interrupt number and a code length; The BMC transfers the interrupt processing program to be upgraded to the BIOS Flash according to the upgrade parameters, overwriting the historical interrupt processing program corresponding to the interrupt processing program to be upgraded in the BIOS Flash, and sends an upgrade interrupt signal to the interrupt processor; The interrupt processor starts an interrupt upgrade program in response to the upgrade interrupt signal; The interrupt upgrade program obtains the upgrade parameters of the interrupt handler to be upgraded, moves the interrupt handler to be upgraded in the BIOS Flash to the physical memory address according to the upgrade parameters, and overwrites the historical interrupt handler corresponding to the interrupt handler to be upgraded in the physical memory address as a new interrupt handler.

2. The method according to claim 1, characterized in that After the BMC responds to the upgrade operation for the interrupt handler to be upgraded, the method further includes: The BMC starts a BMC upgrade program stored in the BMC; The BMC transfers the interrupt processing program to be upgraded to the BIOS Flash according to the upgrade parameters, overwriting the historical interrupt processing program corresponding to the interrupt processing program to be upgraded, and sends an upgrade interrupt signal to the interrupt processor, including: The BMC upgrade program transfers the interrupt processing program to be upgraded to the BIOS Flash according to the upgrade parameters, overwriting the historical interrupt processing program corresponding to the interrupt processing program to be upgraded; The BMC upgrade program sends an upgrade interrupt signal to the interrupt processor, and the upgrade interrupt signal carries an interrupt number corresponding to the interrupt upgrade program.

3. The method according to claim 2, characterized in that The BMC upgrade program transfers the interrupt processing program to be upgraded to the BIOS Flash according to the upgrade parameters, overwriting the historical interrupt processing program corresponding to the interrupt processing program to be upgraded, including: The BMC upgrade program reads the interrupt processing program to be upgraded stored in the BMC according to the code length in the upgrade parameter; The BMC upgrade program determines the target storage location corresponding to the interrupt handler to be upgraded in the BIOS Flash according to the interrupt number in the upgrade parameter, and transfers the interrupt handler to be upgraded to the corresponding target storage location in the BIOS Flash, and uses the interrupt handler to be upgraded to overwrite the historical interrupt handler stored in the target storage location.

4. The method according to claim 2, characterized in that: The interrupt processor starts an interrupt upgrade program in response to the upgrade interrupt signal, including: The interrupt processor obtains the interrupt upgrade program at the physical memory address and starts the interrupt upgrade program according to the interrupt number corresponding to the interrupt upgrade program carried in the upgrade interrupt signal.

5. The method according to claim 1, characterized in that The method further comprises: Through the data transmission channel between the BMC and the CPU, the BMC sends the upgrade parameters of the interrupt processing program to be upgraded to the CPU register for storage.

6. The method according to claim 5, characterized in that The interrupt upgrade program obtains the upgrade parameters of the interrupt handling program to be upgraded, including: The interrupt upgrade program reads the CPU register to obtain the upgrade parameters of the interrupt handling program to be upgraded.

7. The method according to claim 5, characterized in that The BMC sends the upgrade parameters of the interrupt handler to be upgraded to the CPU register for storage through the data transmission channel between the BMC and the CPU, including: Through the PECI channel of the Intel platform, the BMC sends the upgrade parameters of the interrupt handler to be upgraded to the CPU register for storage.

8. The method according to claim 5, characterized in that The BMC sends the upgrade parameters of the interrupt handler to be upgraded to the CPU register for storage through the data transmission channel between the BMC and the CPU, including: Through a universal standard PCIe channel, the BMC sends the upgrade parameters of the interrupt processing program to be upgraded to the CPU register for storage.

9. The method according to claim 1, characterized in that: Acquiring the interrupt processing program to be upgraded and the upgrade parameters of the interrupt processing program to be upgraded, including: When the upgrade parameters of the interrupt processing program to be upgraded are stored in the file header of the interrupt processing program to be upgraded, the BMC obtains the file header of the file of the interrupt processing program to be upgraded, and parses to obtain the upgrade parameters of the interrupt processing program to be upgraded.

10. The method according to claim 9, characterized in that The interrupt upgrade program obtains the upgrade parameters of the interrupt handling program to be upgraded, including: The interrupt upgrade program identifies the file header of the interrupt processing program to be upgraded in the BIOS Flash, and parses and obtains the upgrade parameters of the interrupt processing program to be upgraded.

11. The method according to claim 10, characterized in that After the interrupt upgrade program identifies the file header of the interrupt handler to be upgraded in the BIOS Flash and parses to obtain the upgrade parameters of the interrupt handler to be upgraded, the method further includes: The interruption upgrade program erases the file header of the interruption processing program to be upgraded.

12. The method according to claim 9, characterized in that The method further comprises: When the BMC responds to the upgrade operation for the interrupt processing program to be upgraded, detecting whether the interrupt processing program to be upgraded includes a file header; In the case where the interrupt processing program to be upgraded includes a file header, the file header carries an upgrade identifier; The interrupt upgrade program identifies the file header of the interrupt handler to be upgraded in the BIOS Flash, and parses to obtain upgrade parameters of the interrupt handler to be upgraded, including: The interrupt upgrade program searches for the upgrade identifier, determines the file header of the interrupt processing program to be upgraded corresponding to the upgrade identifier, and parses to obtain the upgrade parameters of the interrupt processing program to be upgraded.

13. The method according to claim 12, characterized in that In the case where the interrupt processing program to be upgraded includes a file header, the file header carries an upgrade identifier, including: Performing hash calculation on the upgrade parameters of the interrupt processing program to be upgraded, and adding the calculated upgrade parameter hash value as the upgrade identifier into the file header of the interrupt processing program to be upgraded.

14. The method according to any one of claims 1 to 13, characterized in that: The interrupt upgrade program obtains upgrade parameters of the interrupt handler to be upgraded, moves the interrupt handler to be upgraded in the BIOS Flash to a physical memory address according to the upgrade parameters, and overwrites a historical interrupt handler corresponding to the interrupt handler to be upgraded in the physical memory address, including: The interrupt upgrade program determines the storage location of the interrupt handler to be upgraded in the BIOS Flash according to the interrupt number of the interrupt handler to be upgraded, and reads the interrupt handler to be upgraded according to the code length of the interrupt handler to be upgraded; The interrupt upgrade program determines the location of the historical interrupt handler corresponding to the interrupt handler to be upgraded in the physical memory address according to the interrupt number, and overwrites the historical interrupt handler with the interrupt handler to be upgraded.

15. The method according to claim 1, characterized in that The method further comprises: The upgrade interrupt signal corresponding to the interrupt upgrade program is configured as the highest priority.

16. The method according to claim 1, characterized in that: After the BMC obtains the interrupt handler to be upgraded and the upgrade parameters of the interrupt handler to be upgraded in response to the upgrade operation for the interrupt handler to be upgraded, the method further includes: When the BMC receives a plurality of different interrupt processing programs to be upgraded, assigning upgrade priorities to the plurality of different interrupt processing programs to be upgraded according to the interrupt types of the interrupt processing programs to be upgraded; The interrupt processor starts an interrupt upgrade program in response to the upgrade interrupt signal, including: The interrupt upgrade program upgrades the multiple different interrupt handling programs to be upgraded in sequence according to the priorities.

17. The method according to claim 1, characterized in that After overwriting the historical interrupt handler corresponding to the interrupt handler to be upgraded in the physical memory address as a new interrupt handler, the method further includes: When the interrupt processor detects the interrupt signal corresponding to the new interrupt processing program, the new interrupt processing program is executed.

18. The method according to claim 1, characterized in that The method further comprises: After the interrupt processing program to be upgraded is used as a new interrupt processing program, an upgrade completion prompt is generated.

19. The method according to claim 1, characterized in that The method further comprises: The upgrading process of the interruption processing program to be upgraded is monitored, and when the upgrading of the interruption processing program to be upgraded fails, an upgrading failure prompt is generated.

20. A computer system, characterized in that: The computer system includes a BMC, a BIOS Flash, an interrupt processor and a physical memory address, and the computer is used to execute the interrupt handler seamless upgrade method as claimed in claim 1.

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