Method and device for compensating for a systematic error in a symbol clock synchronization between a transmitter and a receiver
The method addresses the challenge of systematic errors in symbol clock synchronization by using a compensation value to adjust initial phase offsets, resulting in faster and more accurate synchronization between transmitters and receivers.
Patent Information
- Application Number
- PCT/EP2024/086880
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-12-20
- Filing Date
- 2024-12-17
- Publication Date
- 2025-06-26
AI Technical Summary
Existing symbol clock synchronization methods between transmitters and receivers, particularly those without a separate clock line, face challenges in achieving accurate synchronization due to systematic estimation errors, which result in initial data loss and prolonged settling times.
A method that compensates for systematic errors in symbol clock synchronization by determining an estimated initial phase offset, initializing a feedback symbol synchronizer, and using a compensation value to adjust subsequent synchronizations, thereby reducing errors and improving synchronization speed.
The method enables rapid and accurate symbol clock synchronization between transmitters and receivers, minimizing initial data loss and reducing response times in communication systems.
Smart Images

Figure EP2024086880_26062025_PF_FP_ABST
Abstract
Description
[0001] Description
[0002] title
[0003] Method and device for compensating a systematic error in a symbol clock synchronization between a transmitter and a receiver
[0004] State of the art
[0005] The present invention relates to a method and a device for compensating a systematic error, in particular a systematic estimation error, in a symbol clock synchronization between a transmitter and a receiver.
[0006] Transmission systems are known from the prior art in which the transmitter and receiver are not synchronized for data transmission by means of a separate clock line, so that synchronization of a symbol take on the receiver side with respect to a symbol clock on the transmitter side must be carried out using data transmission signals themselves, since the respective clock generators in the transmitter and receiver operate independently of one another and can therefore have frequency and phase shifts relative to one another.
[0007] For this purpose, feedback symbol synchronizers known from the state of the art can be used. These generally consist of a timing error detector, an adjustable interpolator, an interpolation controller, and a loop filter. Such feedback symbol synchronizers offer the advantage of being relatively inexpensive to implement, meaning they require relatively few hardware and / or software resources. On the other hand, due to the existing control loop, such feedback symbol synchronizers typically have long settling times until sufficiently accurate symbol timing synchronization is achieved.
[0008] In principle, low self-noise of the feedback symbol synchronizer is desirable. However, the narrow control bandwidth required for this disadvantageously increases the settling time. Settling time and low self-noise are a trade-off and cannot be simultaneously improved in a trivial way.
[0009] In contrast, feedforward symbol synchronizers are known, which, due to the absence of a control loop, can achieve faster symbol clock synchronization. However, the implementation of such feedforward symbol synchronizers is generally associated with higher resource requirements in terms of hardware and / or software.
[0010] Rice, Michael. "Digital Communications: A Discrete-Time Approach," Upper Saddle River, NJ: Prentice Hall, 2008, discloses, among other things, a backward-coupled symbol synchronizer.
[0011] Disclosure of the invention
[0012] According to a first aspect of the present invention, a method for compensating a systematic error in symbol clock synchronization between a transmitter and a receiver is proposed.
[0013] It should be noted that the present invention is particularly aimed at symbol clock synchronization between transmitters and receivers, which are not synchronized with each other by a separate clock line, but only on the basis of transmitted data signals.
[0014] It should also be noted that the method steps according to the invention described below can be carried out on the basis of one or more evaluation units of the receiver, which can be configured, for example, as an ASIC, FPGA, processor, digital signal processor, microcontroller, or similar. It should also be noted that components explained in the following description can be logical and / or physical components, and that an assignment of functions to the respective components can deviate from the following description, as long as the inventive effect is achieved.
[0015] In a first step of the method according to the invention, a first signal generated by the transmitter, which is suitable for symbol clock synchronization, is received in the receiver connected to the transmitter via information technology. Particularly preferably, the first signal is a predefined synchronization signal, which can also be considered, for example, a preamble or training signal.
[0016] A transmission system formed by the transmitter and the receiver is, for example, an ultrasound system and / or a radar system, and / or a vehicle system and / or a powerline transmission system and / or a baseband transmission system and / or a transmission system deviating therefrom. It should be noted that such a transmission system can also comprise a plurality of transmitters, each of which is configured to communicate with the receiver in a non-colliding manner (e.g., by means of a time-division multiplexing method or by means of a deviating multiplexing method). It is also possible for bidirectional communication between the transmitter and the receiver to be carried out based on the method according to the invention by the respective transmitters or receivers exchanging their respective roles depending on a current communication direction.
[0017] In a second step of the method according to the invention, an estimated initial phase offset between a symbol clock of the transmitter, on the basis of which the first signal is generated, and a symbol clock of the receiver, on the basis of which the first signal is evaluated in the receiver, is determined using the first signal in an estimation component of the receiver.
[0018] In a third step of the method according to the invention, a symbol synchronizer of the receiver, which is designed as a feedback symbol synchronizer, is initialized based on the estimated initial phase offset. The symbol synchronizer is, for example, a feedback symbol synchronizer known from the prior art, which is configured to be initialized using a value of the estimated initial phase offset. Initialization is preferably carried out in that the value for the estimated initial phase offset, which is preferably provided as a temporal shift value, initializes an above-mentioned interpolation control of the symbol synchronizer known from the prior art. In particular, due to non-linear influences from a transmission channel (e.g.Due to capacitive and / or inductive influences) between the transmitter and the receiver, it is possible that the estimated initial phase offset exhibits an undesirable deviation from the actual initial phase offset between the transmitter and the receiver, so that symbol clock synchronization between the transmitter and the receiver, despite initialization by the estimation component, may initially not be sufficiently accurate to prevent initial data loss due to incorrectly interpreted symbols during transmission. Since such an estimation error is essentially identical between different synchronization processes under unchanged boundary conditions, this estimation error can be referred to as a systematic error.
[0019] In a fourth step of the method according to the invention, a second signal generated by the transmitter is received in the receiver. The second signal can, in principle, be any signal, provided it has a sufficient number of transitions between different symbols to be transmitted. For example, it is conceivable that the second signal contains random data, representing, for example, noise, and / or predefined data. A suitable length and / or characteristic of the second signal is preferably determined empirically for a particular transmission system employing the method according to the invention.
[0020] It should be noted that the method according to the invention can be carried out particularly advantageously in a separate operating state (e.g., a training mode) of the transmission system and not during a standard data transmission between the transmitter and the receiver. This allows, among other things, particular flexibility in the design of the second signal to be achieved, since the second signal can, in principle, be designed in any desired way in such a separate operating state. This does not explicitly rule out the possibility that the method according to the invention can also be carried out during a standard data transmission, in which the second signal can contain payload data to be transmitted to the receiver. Payload data is understood here to mean data that is not intended for synchronization between the transmitter and the receiver and / or not for controlling data communication between the transmitter and the receiver.Instead, they are intended to represent data that is further processed in the receiver apart from the method described here. In an exemplary case in which the transmitter and the receiver are respective components of an ultrasound system, the payload data can, for example, be environmental information detected by an ultrasound sensor representing the transmitter, which is to be transmitted to the receiver in order to identify, for example, objects in the vicinity of the ultrasound sensor on the basis of the environmental information. In a fifth step of the method according to the invention, a plurality of phase offset values, each representing a phase offset between the symbol clock of the transmitter and the symbol clock of the receiver, are determined and stored by means of the initialized symbol synchronizer on the basis of a plurality of sample values representing the second signal.For this purpose, the respective samples are preferably converted into complex samples using a known IQ demodulation method, on the basis of which respective phase offset values can then be determined for each complex sample or for a predefined selection of complex samples. Preferably, a memory provided for the samples is set to a predefined state by the estimation component during the initialization of the symbol synchronizer to ensure that only a history of current samples of the second signal is stored in the memory.
[0021] In a sixth step of the method according to the invention, an approximated initial phase offset between the symbol clocks of the transmitter and the receiver is determined based on an approximation over the plurality of stored phase offset values. For the approximation, known approximation methods from the prior art are used, for example, and in particular computer-optimized approximation methods that require particularly low computing power in order to save computing resources and / or to be able to use inexpensive computing components to implement the method according to the invention. The approximation is accordingly intended to determine an approximated phase offset based on the history of the sample values, which essentially or ideally completely corresponds to an actually existing phase offset after the symbol synchronizer has been initialized by the estimation component.
[0022] In a seventh step of the method according to the invention, a compensation value is determined which is suitable for at least partially compensating a systematic error in determining the estimated initial phase offset by the estimation component, wherein the compensation value represents a difference between the approximated initial phase offset and a phase offset which is based on the estimated initial phase offset.
[0023] This can be expressed by the following formula: COMP = y0- y0, where COMP represents the compensation value, y0 represents the approximate initial phase shift, and y0 represents the estimated initial phase shift.
[0024] In an eighth step of the method according to the invention, the compensation value is calculated against a subsequently determined estimated initial phase offset during a subsequent initialization of the symbol synchronizer using the estimation component. In other words, a compensation value determined once can be advantageously buffered for one or more subsequent uses due to the underlying systematic error, so that during a new symbol clock synchronization between the transmitter and the receiver, no further determination of the compensation value is required. This saves, among other things, computing resources and / or the time required for determination during subsequent symbol clock synchronizations.In particular, since no dedicated second signal is generated by the transmitter for determining the compensation value and evaluated by the receiver, reliable transmission of user data can be achieved with a particularly short delay. In other words, storing the compensation value advantageously makes it possible to transmit a third and / or further signals, preferably containing user data for the receiver, immediately after the first signal in a subsequent symbol clock synchronization.
[0025] In summary, the method according to the invention offers the particular advantage that a data transmission between a transmitter and a receiver, whose symbol clocks are initially not synchronized, can be recorded particularly quickly and without loss, whereby response times in an overall system comprising the transmitter and the receiver can be kept particularly short.
[0026] The subclaims show preferred developments of the invention.
[0027] Further preferably, the estimation component is designed as a feedforward estimation component, since this enables a particularly resource-efficient and / or fast estimation of the initial phase offset. In particular, when using a feedforward estimation component, it is possible for a processing time for estimating the phase offset to be shorter than a settling time of the symbol synchronizer until a synchronized symbol clock is reached between the transmitter and the receiver in a case in which the symbol synchronizer is not initialized by means of the estimation component. This explicitly does not preclude the possibility of achieving a settling time based on a feedforward estimation component compared to a symbol synchronizer not initialized according to the invention.
[0028] In a further preferred embodiment of the present invention, only those phase offset values are taken into account in the approximation which correspond in time to samples selected as final symbol values by a sample selector of the symbol synchronizer. The sample selector is provided, in particular, to decimate a possibly oversampled second signal such that the most suitable sample is selected from a plurality of samples representing a respective symbol during oversampling (e.g., the sample having the greatest signal-to-noise ratio with respect to a symbol amplitude). This selection is performed in a symbol synchronizer known from the prior art, for example, based on a so-called "strobe" signal, which determines the currently used sample at the output of the symbol synchronizer.Accordingly, it is advantageous if the phase offset, which as described above is "based on the estimated initial phase offset", is preferably a phase offset currently used in the symbol synchronizer for interpolation of sample values, which can always deviate from the phase offset estimated by the estimation component if the sample selector of the symbol synchronizer does not output the first sample value processed by the symbol synchronizer as a symbol value at an output of the symbol synchronizer, but rather a subsequent sample value in this regard.In such a case, it can be assumed that the control loop of the symbol synchronizer has already resulted in a phase offset adapted to the current sample values with respect to the estimated initial phase offset, which should be used as a basis for determining the compensation value in order to achieve a particularly high accuracy when determining the compensation value, since in this way an optimal temporal agreement between the estimated initial phase offset and the approximated initial phase offset can be achieved.
[0029] Further preferably, a respective value is added to each phase offset value included in the approximation, which corresponds to a time interval between the determination of the respective phase offset value s and the start of processing of the second signal in the receiver. This value to be added can, for example, be an index of the respective successive phase offset values or an index of respective successive strobe signals, depending on the specific design of the method. A vector y of respective phase offset values included in the approximation can be described accordingly as follows: y = [(E00) + n0), (EO1) + «1), - ], where p.(ni) represents a respective phase offset value (or interpolation value, since this indicates the temporal offset to be taken into account in the interpolation, in particular at the subsample level) for a respective sample value n or for a respective "strobe" signal n.
[0030] Particularly preferably, the approximation is carried out using a regression method, and in particular using a linear regression method, which provides for the minimization of a mean square error without thereby restricting the applicable regression method. The mean square error MSE to be minimized can be expressed as follows:
[0031] Here, i represents the index of a particular sample or a particular sample selected by the strobe signal. N represents the total number of phase offset values included in the approximation, while m represents a linear progression due to a constant frequency offset (FOFF) between transmitter and receiver.
[0032] Further advantageously, samples representing the first signal and / or the second signal are subjected to a filtering process before and / or during use within the estimation component and / or before and / or during use within the symbol synchronizer, by which influences of a transmission channel between the transmitter and the receiver are at least partially compensated.
[0033] In a further advantageous embodiment of the present invention, the estimation component is configured to estimate the phase offset by converting samples representing the first signal (which are preferably generated from the first signal by an A / D converter of the device and / or the receiver) into complex samples by means of an IQ demodulation, preferably known from the prior art, whose reference frequency corresponds to the symbol clock of the receiver and in particular to the described carrier frequency, by determining a respective corresponding phase offset value for each of the complex samples and by determining, from the respective determined phase offset values, temporal shift values between the symbol clock of the transmitter and the symbol clock of the receiver, which temporal shift values correspond to the phase offset values.These temporal shift values can then be used in the symbol synchronizer, for example, to specify suitable new sampling times (preferably at the subsample level) for the first signal in the interpolator. It should be noted in this context that a sampling rate of the sample values with respect to the symbol rate can advantageously represent oversampling, whereby the sampling rate can be converted (in particular, decimated) to a target sampling rate during or at the end of the processing chain of the estimation component and / or the symbol synchronizer. The phase offset is determined, for example, based on an arctangent calculation applied to the complex sample values.Furthermore, depending on the specific implementation of the phase shift estimation, it is possible that further signal processing steps may be provided, for example to carry out suitable scaling and / or value range shifts of results within the processing chain.
[0034] The method according to the invention can preferably be carried out in an event-based manner and particularly preferably when a configuration change occurs in the transmitter and / or the receiver and / or in a transmission system comprising the transmitter and the receiver and / or when a predefined temperature change and / or an exceedance and / or undershoot of predefined temperature threshold values occurs in the transmitter and / or the receiver and / or the transmission system and / or when one or more predefined aging threshold values for the transmitter and / or the receiver and / or the transmission system are reached. Furthermore, further events for carrying out the method according to the invention can be defined in this way, which can have an influence on the systematic estimation error in the symbol clock synchronization between the transmitter and the receiver.Furthermore, it is advantageously possible for the estimation component to estimate, in addition to the initial estimated phase offset, a frequency offset (i.e., an initially estimated frequency offset) between the symbol clocks of the transmitter and the receiver. This makes it possible to then also initialize the symbol synchronizer based on the determined frequency offset. This can lead to a more accurate initial estimate of the deviations of the symbol clocks between the transmitter and the receiver and thus to more reliable symbol clock synchronization. The frequency offset is preferably estimated by converting samples representing the first signal into complex samples by means of an IQ demodulation whose reference frequency corresponds to the symbol clock of the receiver, by determining a corresponding phase offset value for each of the complex samples, by eliminating overflow-related jumps (i.e.,Unwrapping (unwrapping) between consecutive phase offset values (e.g., when a specified value range for the phase offset values is exceeded, which ranges from -71 to +71, for example) can be avoided by converting the phase offset values into a continuously continuing sequence of phase offset values and by calculating changes between consecutive converted phase offset values, which represent a respective frequency offset. Regarding the sampling rate and any oversampling, reference is made to the above description for determining the phase offset, which also applies to determining the frequency offset. Likewise, regarding the possible calculation of the phase offset and any further processing steps, reference is made to the above description for determining the phase offset.
[0035] According to a second aspect of the present invention, a device for compensating a systematic error in symbol clock synchronization between a transmitter and a receiver is proposed, wherein the device comprises an estimation component, a feedback symbol synchronizer, and a memory for storing determined phase offset values. The device is configured to carry out a method according to one of the preceding claims. The features, combinations of features, and the advantages resulting therefrom correspond to those explained in connection with the first-mentioned aspect of the invention, so that reference is made to the above statements to avoid repetition.
[0036] Brief Description of the Drawings Embodiments of the invention are described in detail below with reference to the accompanying drawings. In the drawing:
[0037] Figure 1 is a block diagram of an embodiment of a
[0038] Transmission system with a device according to the invention.
[0039] Embodiments of the invention
[0040] Figure 1 shows a block diagram of an exemplary embodiment of a transmission system according to the invention with a device 5 according to the invention, which is set up to carry out a method according to the invention according to claims 1 to 9.
[0041] The device 5 is represented here by a computing unit which implements the functional blocks of the device 5 described below on the basis of a computer program which can be executed by the computing unit.
[0042] The device 5 is provided for synchronizing a symbol clock during data transmission between a transmitter 10 and a receiver 20, wherein the device 5 is arranged in the receiver 20. The transmitter 10, which here is designed as an ultrasonic sensor of an environment detection system of a vehicle, is connected to the receiver 20 via a wired transmission channel 60, wherein the receiver 20 here is a central control unit of the vehicle for receiving and evaluating environment information detected by the ultrasonic sensor. It should be noted that the receiver 20 can be connected to a plurality of transmitters 10, each of which is configured to carry out data communication with the receiver 20 according to the method according to the invention.
[0043] It should also be noted that further components of the receiver 20, which are provided, for example, for pre-processing and / or further processing of received data transmitted by means of the data transmission between the transmitter 10 and the receiver 20, are not shown or described here for reasons of clarity. The device 5 has an estimation component 30 and a symbol synchronizer 40, wherein the estimation component 30 is configured to receive a first signal S1 generated by the transmitter 10 and, based on the first signal S1, to estimate an estimated initial phase offset POFFI between a symbol clock of the transmitter 10, on the basis of which the first signal S1 is generated, and a symbol clock of the receiver 20, on the basis of which the first signal S1 is evaluated in the receiver 20.The first signal S 1 is designed here as a predefined preamble whose symbol rate is equal to or lower than a carrier frequency provided for the transmission of the first signal S 1.
[0044] For this purpose, the estimation component 30 has a first subunit 32 configured to determine the estimated initial phase offset POFFI, and a second subunit 34 configured to determine a frequency offset FOFF between the respective symbol clocks. Furthermore, the estimation component 30 has an estimated value selector 36 configured to determine a time TS at which a currently available value for the estimated initial phase offset POFFI and for the frequency offset FOFF in the subunits 32, 34 is suitable for initializing the symbol synchronizer 40.
[0045] The device 5 is further configured to initialize the symbol synchronizer 40, which is designed here as a conventional feedback symbol synchronizer 40, on the basis of the estimated initial phase offset POFFI and the estimated frequency offset FOFF.
[0046] It should be noted that an A / D converter (and possibly a possible further preprocessing unit independent of the synchronization state) of the device 5, which converts the first signal S1 transmitted in analog form by the transmitter 10 (and the signals S2, S3, etc. described below) into digital signals SI, S2, S3 for further processing within the device 5, is not shown here for reasons of clarity. Such an A / D converter is preferably connected in such a way that it provides the converted signals SI, S2, S3 or at least a portion of the signals SI, S2, S3 to both the symbol synchronizer 40 and the estimation component 30.
[0047] The symbol synchronizer 40 has the following components: an adjustable interpolator 90, into which the signals S1, S2, S3 from the transmitter 10 are fed; a sample selector 130, by which the most suitable sample for representing a respective symbol is selected from a plurality of samples per transmitted symbol (i.e., oversampling of the individual symbols is present here). The selection is preferably made such that the sample per symbol is selected which has the highest signal-to-noise ratio with respect to a symbol amplitude.
[0048] The symbol synchronizer 40 further comprises a symbol timing error detector 110 which is configured, on the basis of an algorithm known from the prior art, to calculate a symbol timing deviation between the respective symbol clocks of the transmitter 10 and the receiver 20.
[0049] The symbol synchronizer 40 further comprises a loop feeder 120, which is implemented on the basis of a PI controller and is configured according to the invention to be initialized by means of the frequency offset value FOFF.
[0050] Finally, the symbol synchronizer 40 has an interpolation controller 100, which is configured to be initialized according to the invention on the basis of the estimated initial phase offset POFFI and to execute a control of the interpolator 90 and the sample selector 130 known from the prior art.
[0051] The device 5 is also configured to receive the second signal S2 generated by the transmitter 10 and to determine a plurality of phase offset values p(n), each representing a phase offset between the symbol clock of the transmitter 10 and the symbol clock of the receiver 20, based on a plurality of sample values representing the second signal S2, by means of the initialized symbol synchronizer 40. The symbol synchronizer 40 is configured to store the plurality of phase offset values p(n) in a phase offset value memory 140.
[0052] The device 5 is further configured to determine an approximated initial phase offset POFF2 between the symbol clocks of the transmitter 10 and the receiver 20 using a linear regression method over the plurality of stored phase offset values p(n). The approximated initial phase offset POFF2 is determined here, for example, by the interpolator 90 and provided to the interpolation controller 100. The device 5 is further configured to determine a compensation value COMP, which is suitable for at least partially compensating for a systematic error when determining the estimated initial phase offset POFFI by the estimation component 30, wherein the compensation value COMP represents a difference between the approximated initial phase offset POFF2 and a phase offset based on the estimated initial phase offset POFFI.The interpolation controller 100 has a compensation value memory 150 for storing the compensation value COMP.
[0053] Finally, the device 5 is configured to offset the compensation value COMP with a subsequently determined estimated initial phase offset during a subsequent initialization of the symbol synchronizer 40 by means of the estimation component 30 in order to at least reduce the systematic estimation error by the estimation component 30.
[0054] The symbol synchronizer 40 is generally configured to receive, in the initialized state, the third signal S3 generated by the transmitter 10 and possibly further signals in order to generate, on the basis of the third signal S3 and the possibly further signals, respective output signals SO which represent symbols (ie, payload data) synchronized with the symbol clock of the receiver 20 and transmitted within the third signal S3 or within the further signals.
Claims
Claims 1. A method for compensating a systematic error in symbol clock synchronization between a transmitter (10) and a receiver (20), comprising: - a first step for receiving a first signal (S1) generated by the transmitter (10) which is suitable for symbol clock synchronization in the receiver (20), - a second step for determining an estimated initial phase offset (POFFI) between a symbol clock of the transmitter (10), on the basis of which the first signal (S1) is generated, and a symbol clock of the receiver (20), on the basis of which the first signal (S1) is evaluated in the receiver (20), using the first signal (S1) in an estimation component (30) of the receiver (20), - a third step for initializing a symbol synchronizer (40) of the receiver (20), which is designed as a feedback symbol synchronizer (40), on the basis of the estimated initial phase offset (POFFI), - a fourth step of receiving a second signal (S2) generated by the transmitter (10) in the receiver (20), - a fifth step for determining and storing a plurality of phase offset values (p(n)), each representing a phase offset between the symbol clock of the transmitter (10) and the symbol clock of the receiver (20), on the basis of a plurality of sample values representing the second signal (S2), by means of the initialized symbol synchronizer (40), - a sixth step for determining an approximated initial phase offset (POFF2) between the symbol clocks of the transmitter (10) and the receiver (20) based on an approximation over the plurality of stored phase offset values (p(n)), - a seventh step for determining a compensation value (COMP) which is suitable for at least partially compensating a systematic error when determining the estimated initial phase offset (POFF1) by the estimation component (30), wherein the compensation value (COMP) is a difference between the approximated initial phase offset (POFF2) and a phase offset, which is based on the estimated initial phase offset (POFFI), and - an eighth step for calculating the compensation value (COMP) with a subsequently determined estimated initial phase offset during a subsequent initialization of the symbol synchronizer (40) by means of the estimation component (30).
2. The method according to claim 1, wherein - the estimation component (30) is designed as a feedforward estimation component (30), and / or - a processing time for estimating the initial phase offset (POFFI) is shorter than a settling time of the symbol synchronizer (40) until a synchronized symbol clock is reached between the transmitter (10) and the receiver (20) in a case where the symbol synchronizer (40) is not initialized by means of the estimation component (30).
3. Method according to one of the preceding claims, wherein only those phase offset values (p(n)) are taken into account in the approximation which correspond in time to sample values which are selected as final symbol values by a sample value selector (42) of the symbol synchronizer.
4. Method according to one of the preceding claims, wherein a respective value is added to each phase offset value (p(n)) flowing into the approximation, which value corresponds to a time interval between the determination of the respective phase offset value (p(n)) and the start of the processing of the second signal (S2) in the receiver (20).
5. Method according to one of the preceding claims, wherein the approximation is carried out by means of a regression method and in particular by means of a linear regression method.
6. Method according to one of the preceding claims, wherein samples representing the first signal (S1) and / or the second signal (S2) are subjected to a filtering before and / or during use within the estimation component (30) and / or before and / or during use within the symbol synchronizer (40), by means of which influences of a transmission channel (60) between the transmitter (10) and the receiver (20) are at least partially compensated.
7. Method according to one of the preceding claims, wherein the estimation component (30) and / or the symbol synchronizer (40) determines a respective phase offset by - samples representing the first signal (S1) are converted into complex samples by means of an IQ demodulation whose reference frequency corresponds to the symbol clock of the receiver (20), - a corresponding phase offset value (p(n)) is determined for each of the complex sample values, and - from the respective determined phase offset values (p(n)), time shift values between the symbol clock of the transmitter (10) and the symbol clock of the receiver (20) corresponding to the phase offset values (p(n)) are determined.
8. Method according to one of the preceding claims, wherein the method is event-based and is carried out in particular when - there is a configuration change in the transmitter (10) and / or the receiver (20) and / or in a transmission system comprising the transmitter (10) and the receiver (20), and / or - a predefined temperature change and / or an exceedance and / or undershoot of predefined temperature threshold values in the transmitter (10) and / or the receiver (20) and / or the transmission system, and / or - one or more predefined aging thresholds for the transmitter (10) and / or the receiver (20) and / or the transmission system are reached.
9. Method according to one of the preceding claims, further comprising: - estimating a frequency offset (FOFF) between the symbol clocks of the transmitter (10) and the receiver (20) by the estimation component (30), and - Initializing the symbol synchronizer (40) additionally based on the determined frequency offset (FOFF).
10. Device (5) for compensating a systematic error in symbol clock synchronization between a transmitter (10) and a receiver (20), comprising: - an estimation component (30), - a feedback symbol synchronizer (40), and - a memory (140) for storing determined phase offset values (p(n)), wherein the device is configured to carry out a method according to one of the preceding claims.
Citation Information
Patent Citations
Method and a device for controlling data extraction from a data stream containing at least one data packet
US20030076905A1
Joint maximum likelihood frame and timing estimation for a digital receiver
US6654432B1
Tracking the phase of a received signal
US7606342B1