Apparatus and method for configuring a two-sided model for reporting in a wireless communication system

The two-sided model configuration with separate training and management strategies addresses excessive data transfer and update frequency issues, enhancing system performance and reducing power consumption in wireless communication systems.

WO2025154036A1PCT designated stage Publication Date: 2025-07-24LENOVO (SINGAPORE) PTE LTD
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Patent Information

Application Number
PCT/IB2025/051086
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-02-02
Filing Date
2025-01-31
Publication Date
2025-07-24

AI Technical Summary

Technical Problem

Existing wireless communication systems face challenges in managing excessive data transfer and update frequency for two-sided models, leading to increased power consumption and processor usage, which affects overall system performance.

Method used

Implementing a two-sided model configuration that reduces data transfer quantity and update frequency by using neural network blocks at both UE and gNB sides, with separate training and model management strategies to enhance generalization and reduce overhead.

Benefits of technology

This approach minimizes power consumption and data usage while improving overall system performance by optimizing data transfer and model updates in wireless communication systems.

✦ Generated by Eureka AI based on patent content.

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Abstract

Various aspects of the present disclosure relate to wireless communication. A first apparatus may determine (802) a first set of one or more parameters for an encoder model. The first apparatus may determine (804) a first set of information comprising a set of one or more samples representing an input of the encoder model. The first apparatus may also update (806) the encoder model based at least in part on the first set of one or more parameters and a third set of one or more parameters, wherein the third set of one or more parameters is based on the first set of information, a first message from another apparatus, and / or a second set of one or more parameters for a pre-encoder generator model. The first apparatus may encode (808) data based at least in part on the first set of information and the updated encoder model.
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Description

APPARATUS AND METHOD FOR CONFIGURING A TWO-SIDED MODEL OF A WIRELESS COMMUNICATION SYSTEM TECHNICAL FIELD

[0001] The present disclosure relates to wireless communications, and more specifically to configuring a two-sided model of a wireless communication system. BACKGROUND

[0002] A wireless communications system may include one or multiple network communication devices, such as base stations, which may support wireless communications for one or multiple user communication devices, which may be otherwise known as user equipment (UE), or other suitable terminology. The wireless communications system may support wireless communications with one or multiple user communication devices by utilizing resources of the wireless communication system (e.g., time resources (e.g., symbols, slots, subframes, frames, or the like) or frequency resources (e.g., subcarriers, carriers, or the like). Additionally, the wireless communications system may support wireless communications across various radio access technologies including third generation (3G) radio access technology, fourth generation (4G) radio access technology, fifth generation (5G) radio access technology, among other suitable radio access technologies beyond 5G (e.g., sixth generation (6G)). SUMMARY

[0003] An article “a” before an element is unrestricted and understood to refer to “at least one” of those elements or “one or more” of those elements. The terms “a,” “at least one,” “one or more,” and “at least one of one or more” may be interchangeable. As used herein, including in the claims, “or” as used in a list of items (e.g., a list of items prefaced by a phrase such as “at least one of” or “one or more of” or “one or both of”) indicates an inclusive list such that, for example, a list of at least one of A, B, or C means A or B or C or AB or AC or BC or ABC (i.e., A and B and C). Also, as used herein, the phrase “based on” shall not be construed as a reference to a closed set of conditions. For example, an example step that is described as “based on condition A” may be based on both a condition A and a condition B without departing from the scope of the present disclosure. In other words, as used herein, the phrase “based on” shall beconstrued in the same manner as the phrase “based at least in part on.” Further, as used herein, including in the claims, a “set” may include one or more elements.

[0004] Various aspects of the present disclosure relate to wireless communications, including improved methods and apparatuses that support configuring a two-sided model (e.g., encoder and decoder) of a wireless communication system. A first apparatus may determine a first set of one or more parameters for an encoder model. The first apparatus may also determine a first set of information comprising a set of one or more samples representing an input of the encoder model. The first apparatus may update the encoder model based at least in part on the first set of one or more parameters and a third set of one or more parameters, wherein the third set of one or more parameters is based at least in part on one or more of the first set of information, a first message from another apparatus, or a second set of one or more parameters for a pre-encoder generator model. The first apparatus may also encode data based at least in part on the first set of information and the updated encoder model. The first apparatus may transmit the encoded data to a second apparatus. BRIEF DESCRIPTION OF THE DRAWINGS

[0005] Figure 1 illustrates an example of a wireless communications system in accordance with aspects of the present disclosure.

[0006] Figure 2 illustrates an example of a wireless network in accordance with aspects of the present disclosure.

[0007] Figure 3 illustrates an example of a block diagram of a two-sided model in accordance with aspects of the present disclosure.

[0008] Figure 4 illustrates an example of a block diagram of another two-sided model in accordance with aspects of the present disclosure.

[0009] Figure 5 illustrates an example of a UE in accordance with aspects of the present disclosure.

[0010] Figure 6 illustrates an example of a processor in accordance with aspects of the present disclosure.

[0011] Figure 7 illustrates an example of a network equipment (NE) in accordance with aspects of the present disclosure.

[0012] Figure 8 illustrates a flowchart of a method performed by a first apparatus in accordance with aspects of the present disclosure.

[0013] Figure 9 illustrates a flowchart of a method performed by a second apparatus in accordance with aspects of the present disclosure. DETAILED DESCRIPTION

[0014] Various aspects of the present disclosure relate to supporting (e.g., configuring, enabling) a two-sided model of a wireless communication system. The two-sided model may be associated with an encoder of a first wireless device which may be referred to as an encoder device) and a decoder of the first wireless device or a second wireless device (which may be referred to as a decoder device). Some functions (e.g., operations, behaviors, features, constraints) of the model may be performed by the first wireless device (e.g., the encoder device) and other functions (e.g., operations, behaviors, features, constraints) of the model may be performed by the first wireless device or the second wireless device (e.g., the decoder device). In some implementations, one or more of the first wireless device (e.g., the encoder device) or the second wireless device (e.g., the decoder device) may manage (e.g., update, adjust, modify) a set of one or more parameters of the two-sided model at a frequency (e.g., rate, pattern, interval). However, in some cases, excessive data may be used, for example, based on a quantity (e.g., amount) of data transferred to update the two-sided model and a frequency (e.g., rate) of the updates.

[0015] By reducing one or more of the transfers including the quantity (e.g., amount) of data for updating the two-sided model or the frequency (e.g., rate) of updating the two-sided model, apparatuses (e.g., wireless devices) performing one or more of encoding or decoding may reduce power consumption, reduce processor usage, reduce data usage, and increase overall system performance.

[0016] Aspects of the present disclosure are described in the context of a wireless communications system.

[0017] Figure 1 illustrates an example of a wireless communications system 100 in accordance with aspects of the present disclosure. The wireless communications system 100 may include one or more NE 102, one or more UE 104, and a core network (CN) 106. The wireless communications system 100 may support various radio accesstechnologies. In some implementations, the wireless communications system 100 may be a 4G network, such as an LTE network or an LTE-Advanced (LTE-A) network. In some other implementations, the wireless communications system 100 may be a new radio (NR) network, such as a 5G network, a 5G-Advanced (5G-A) network, or a 5G ultrawideband (5G-UWB) network. In other implementations, the wireless communications system 100 may be a combination of a 4G network and a 5G network, or other suitable radio access technology including Institute of Electrical and Electronics Engineers (IEEE) 802.11 (Wi-Fi), IEEE 802.16 (WiMAX), IEEE 802.20. The wireless communications system 100 may support radio access technologies beyond 5G, for example, 6G. Additionally, the wireless communications system 100 may support technologies, such as time division multiple access (TDMA), frequency division multiple access (FDMA), or code division multiple access (CDMA), etc.

[0018] The one or more NE 102 may be dispersed throughout a geographic region to form the wireless communications system 100. One or more of the NE 102 described herein may be or include or may be referred to as a network node, a base station, a network element, a network function, a network entity, a radio access network (RAN), a NodeB, an eNodeB (eNB), a next-generation NodeB (gNB), or other suitable terminology. An NE 102 and a UE 104 may communicate via a communication link, which may be a wireless or wired connection. For example, an NE 102 and a UE 104 may perform wireless communication (e.g., receive signaling, transmit signaling) over a Uu interface.

[0019] An NE 102 may provide a geographic coverage area for which the NE 102 may support services for one or more UEs 104 within the geographic coverage area. For example, an NE 102 and a UE 104 may support wireless communication of signals related to services (e.g., voice, video, packet data, messaging, broadcast, etc.) according to one or multiple radio access technologies. In some implementations, an NE 102 may be moveable, for example, a satellite associated with a NTN. In some implementations, different geographic coverage areas associated with the same or different radio access technologies may overlap, but the different geographic coverage areas may be associated with different NE 102.

[0020] The one or more UE 104 may be dispersed throughout a geographic region of the wireless communications system 100. A UE 104 may include or may be referredto as a remote unit, a mobile device, a wireless device, a remote device, a subscriber device, a transmitter device, a receiver device, or some other suitable terminology. In some implementations, the UE 104 may be referred to as a unit, a station, a terminal, or a client, among other examples. Additionally, or alternatively, the UE 104 may be referred to as an Internet-of-Things (IoT) device, an Internet-of-Everything (IoE) device, or machine-type communication (MTC) device, among other examples.

[0021] A UE 104 may be able to support wireless communication directly with other UEs 104 over a communication link. For example, a UE 104 may support wireless communication directly with another UE 104 over a device-to-device (D2D) communication link. In some implementations, such as vehicle-to-vehicle (V2V) deployments, vehicle-to-everything (V2X) deployments, or cellular-V2X deployments, the communication link may be referred to as a sidelink. For example, a UE 104 may support wireless communication directly with another UE 104 over a UE-to-UE interface (PC5 interface).

[0022] An NE 102 may support communications with the CN 106, or with another NE 102, or both. For example, an NE 102 may interface with other NE 102 or the CN 106 through one or more backhaul links (e.g., S1, N2, N2, or network interface). In some implementations, the NE 102 may communicate with each other directly. In some other implementations, the NE 102 may communicate with each other or indirectly (e.g., via the CN 106. In some implementations, one or more NE 102 may include subcomponents, such as an access network entity, which may be an example of an access node controller (ANC). An ANC may communicate with the one or more UEs 104 through one or more other access network transmission entities, which may be referred to as a radio heads, smart radio heads, or transmission-reception points (TRPs).

[0023] The CN 106 may support user authentication, access authorization, tracking, connectivity, and other access, routing, or mobility functions. The CN 106 may be an evolved packet core (EPC), or a 5G core (5GC), which may include a control plane entity that manages access and mobility (e.g., a mobility management entity (MME), an access and mobility management functions (AMF)) and a user plane entity that routes packets or interconnects to external networks (e.g., a serving gateway (S-GW), a Packet Data Network (PDN) gateway (P-GW), or a user plane function (UPF)). In some implementations, the control plane entity may manage non-access stratum (NAS)functions, such as mobility, authentication, and bearer management (e.g., data bearers, signal bearers, etc.) for the one or more UEs 104 served by the one or more NE 102 associated with the CN 106.

[0024] The CN 106 may communicate with a packet data network over one or more backhaul links (e.g., via an S1, N2, N2, or another network interface). The packet data network may include an application server. In some implementations, one or more UEs 104 may communicate with the application server. A UE 104 may establish a session (e.g., a protocol data unit (PDU) session, or the like) with the CN 106 via an NE 102. The CN 106 may route traffic (e.g., control information, data, and the like) between the UE 104 and the application server using the established session (e.g., the established PDU session). The PDU session may be an example of a logical connection between the UE 104 and the CN 106 (e.g., one or more network functions of the CN 106).

[0025] In the wireless communications system 100, the NEs 102 and the UEs 104 may use resources of the wireless communications system 100 (e.g., time resources (e.g., symbols, slots, subframes, frames, or the like) or frequency resources (e.g., subcarriers, carriers)) to perform various operations (e.g., wireless communications). In some implementations, the NEs 102 and the UEs 104 may support different resource structures. For example, the NEs 102 and the UEs 104 may support different frame structures. In some implementations, such as in 4G, the NEs 102 and the UEs 104 may support a single frame structure. In some other implementations, such as in 5G and among other suitable radio access technologies, the NEs 102 and the UEs 104 may support various frame structures (i.e., multiple frame structures). The NEs 102 and the UEs 104 may support various frame structures based on one or more numerologies.

[0026] One or more numerologies may be supported in the wireless communications system 100, and a numerology may include a subcarrier spacing and a cyclic prefix. A first numerology (e.g., ^=0) may be associated with a first subcarrier spacing (e.g., 15 kHz) and a normal cyclic prefix. In some implementations, the first numerology (e.g., ^=0) associated with the first subcarrier spacing (e.g., 15 kHz) may utilize one slot per subframe. A second numerology (e.g., ^=1) may be associated with a second subcarrier spacing (e.g., 30 kHz) and a normal cyclic prefix. A third numerology (e.g., ^=2) may be associated with a third subcarrier spacing (e.g., 60 kHz) and a normal cyclic prefix or an extended cyclic prefix. A fourth numerology (e.g., ^=3)may be associated with a fourth subcarrier spacing (e.g., 120 kHz) and a normal cyclic prefix. A fifth numerology (e.g., ^=4) may be associated with a fifth subcarrier spacing (e.g., 240 kHz) and a normal cyclic prefix.

[0027] A time interval of a resource (e.g., a communication resource) may be organized according to frames (also referred to as radio frames). Each frame may have a duration, for example, a 10 millisecond (ms) duration. In some implementations, each frame may include multiple subframes. For example, each frame may include 10 subframes, and each subframe may have a duration, for example, a 1 ms duration. In some implementations, each frame may have the same duration. In some implementations, each subframe of a frame may have the same duration.

[0028] Additionally or alternatively, a time interval of a resource (e.g., a communication resource) may be organized according to slots. For example, a subframe may include a number (e.g., quantity) of slots. The number of slots in each subframe may also depend on the one or more numerologies supported in the wireless communications system 100. For instance, the first, second, third, fourth, and fifth numerologies (i.e., ^=0, ^=1, ^=2, ^=3, ^=4) associated with respective subcarrier spacings of 15 kHz, 30 kHz, 60 kHz, 120 kHz, and 240 kHz may utilize a single slot per subframe, two slots per subframe, four slots per subframe, eight slots per subframe, and 16 slots per subframe, respectively. Each slot may include a number (e.g., quantity) of symbols (e.g., orthogonal frequency division multiplexing (OFDM) symbols). In some implementations, the number (e.g., quantity) of slots for a subframe may depend on a numerology. For a normal cyclic prefix, a slot may include 14 symbols. For an extended cyclic prefix (e.g., applicable for 60 kHz subcarrier spacing), a slot may include 12 symbols. The relationship between the number of symbols per slot, the number of slots per subframe, and the number of slots per frame for a normal cyclic prefix and an extended cyclic prefix may depend on a numerology. It should be understood that reference to a first numerology (e.g., ^=0) associated with a first subcarrier spacing (e.g., 15 kHz) may be used interchangeably between subframes and slots.

[0029] In the wireless communications system 100, an electromagnetic (EM) spectrum may be split, based on frequency or wavelength, into various classes, frequency bands, frequency channels, etc. By way of example, the wireless communications system 100 may support one or multiple operating frequency bands,such as frequency range designations FR1 (410 MHz – 7.125 GHz), FR2 (24.25 GHz – 52.6 GHz), FR3 (7.125 GHz – 24.25 GHz), FR4 (52.6 GHz – 114.25 GHz), FR4a or FR4-1 (52.6 GHz – 71 GHz), and FR5 (114.25 GHz – 300 GHz). In some implementations, the NEs 102 and the UEs 104 may perform wireless communications over one or more of the operating frequency bands. In some implementations, FR1 may be used by the NEs 102 and the UEs 104, among other equipment or devices for cellular communications traffic (e.g., control information, data). In some implementations, FR2 may be used by the NEs 102 and the UEs 104, among other equipment or devices for short-range, high data rate capabilities.

[0030] FR1 may be associated with one or multiple numerologies (e.g., at least three numerologies). For example, FR1 may be associated with a first numerology (e.g., ^=0), which includes 15 kHz subcarrier spacing; a second numerology (e.g., ^=1), which includes 30 kHz subcarrier spacing; and a third numerology (e.g., ^=2), which includes 60 kHz subcarrier spacing. FR2 may be associated with one or multiple numerologies (e.g., at least 2 numerologies). For example, FR2 may be associated with a third numerology (e.g., ^=2), which includes 60 kHz subcarrier spacing; and a fourth numerology (e.g., ^=3), which includes 120 kHz subcarrier spacing.

[0031] Figure 2 illustrates an example of a wireless network 200 in accordance with aspects of the present disclosure. The wireless network 200 may include a NE 102-a (e.g., one embodiment of a NE 102, a gNB), a first UE 104-a (e.g., one embodiment of a UE 104, UE1), a second UE 104-b (e.g., one embodiment of a UE 104, UE2), and a third UE 104-c (e.g., one embodiment of a UE 104, UEK, the third UE 104-c represents any number of additional UEs).

[0032] Specifically, Figure 2 shows one example of the wireless network 200 with one NE 102-a (e.g., may be represented by node ^^and may be equipped with ^antennas) and ^ UEs 104-a, 104-b, 104-c (e.g.,be denoted by ^^, ^^ , ⋯ , ^^ thateach have ^ antennas). ^^^^^^ may denote a channel at time ^frequency band^, ^ ∈ {1,2, … , ^} , between ^^ and ^^ which may form a matrix of size ^ × ^ withcomplex entries, i.e., ^∈ ℂ^×^ .

[0033] At time ^ and frequency band ^, it may be assumed that the NE 102-a wantsto transmit message ^^^ ^^^ to user ^ ^^ where = {1,2, ⋯ , ^} while it uses "^ ^^^ ∈ℂ^×^as a precoding vector. The received signal at ^^,may be written as:

[0034] #^^^^ = ^^^^^"^^^^^^^^^ ^^ ^ ^ ^ + %^ ^^^,at a receiver.

[0036] To improve an achievable rate of the link, in one example, the NE 102-a selects "^^^^^ that maximizes a received signal-to-interference and noise ratio (SINR). Several different configurations may be used for selection of "^^^^^ where some of the configurations may have some knowledge about ^^^^^^.

[0037] The NE 102-a may get knowledge of ^^^^^^ by direct measurement (e.g., in a time duplex division (TDD) mode and assuming reciprocity of a channel), or indirectly using information that one of the UEs 104-a, 104-b, and 104-c sends to the NE 102-a (e.g., in a frequency division duplex (FDD) mode). In the indirect method, a large amount of feedback may be used to send accurate information about ^^^^^^. This may require a large amount of data if there are a large number of antennas or / and large frequency bands.

[0038] In one example, a single time slot is analyzed, but the example may be extended to the examples with more than a single time slot. Without loss of generality, ^^^^^^ may be denoted using ^^^.

[0039] ^^^^^ may be defined as a matrix of size ^ × ^ × ^ which is formed bystacking ^^^ for all frequency bands (e.g., the entries at ^^&', (, ^)^^^ is equal to^^^ &', ()^^^^. In total, each UE 104-a, 104-b, and 104-c may provide feedbackinformation about most recent ^ × ^ × ^ complex numbers to the NE 102-a.

[0040] Various configurations may be used to reduce a rate of required feedback. Two-sided models may include two parts where a first part is deployed at a UE side (e.g., UE 104) and the second part is deployed at a gNB side (e.g., NE 102). The UE and gNB sides may include one or a few neural network (NN) blocks which are trained using data driven approaches. The UE side may be responsible for computing a latent representation of input data (e.g., what needs to be transferred to the gNB) with as low of a number of bits as possible. Receiving what has been transmitted by the UE side, the gNB side reconstructs the information intended to be transmitted to the gNB. An encoding part of the two-sided model (at Node A, e.g., UE) may compute a quantized latent representation of the input data, and a decoding part of the two-sided model (atNode B, e.g., the gNB) may get this latent representation and use it to reconstruct the desired output.

[0041] Figure 3 illustrates an example of a block diagram of a two-sided model 300 (e.g., NN-based model) in accordance with aspects of the present disclosure. The two- sided model 300 includes a node A 302 (e.g., encoder, encoding model, Me) and a node B 304 (e.g., decoder, decoding model, Md). Figure 3 illustrates only one example of a two-sided model 300, while in other examples the location of the encoder and decoder may be swapped. Input data 306 is provided to the node A 302, then there is a latent representation 308 in communications from the node A 302 to the node B 304, and the node B 304 outputs data 310. In some configurations, the node A 302 is located at the UE 104, and the node B 304 is located at the NE 102, but in other configurations the node A 302 and the node B 304 may be located in other devices.

[0042] The exact structure of a UE and a gNB side may vary depending on a particular scheme, but in some embodiment training of an encoder and decoder are not online, meaning that the encoder and the decoder training is based on some criteria and an NN-block of the encoder and the decoder are fixed during an inference phase.

[0043] There may be several methods to train NN modules at UE and gNB sides, including, centralized training, simultaneous training, and separate training. Similarly, updating the two-sided model 300 may be carried out centrally on one entity, on different entities but simultaneously, or separately.

[0044] In a separate training and / or model update, NN modules of the node A 302 (e.g., UE) and the node B 304 (e.g. gNB) parts are trained in different training sessions (e.g., no forward or backpropagation path between the two parts). In separate training, the node A 302 does not need to know ^*and the node B 304 does not need to know ^+.

[0045] To have a model with high generalization capability, one configuration trains the model with as many diverse samples as possible. For example, gathering data from many different UEs and many different cells to train a model that may be usable in different scenarios. Having a model with high generalization capability simplifies the operation of the system as there may be no need to handle different models for different cases (e.g., reduces overhead related to signaling and model transfer).

[0046] In some scenarios, a model trained for a specific task (e.g., task A) performs better for task A compared to a generalized model trained for task A, task B, and task C. So, if overhead related to model management is handled, it may be beneficial to have multiple models each for each task.

[0047] In one example, there may be two two-sided channel state information (CSI) feedback models: a first model, named ℳ^, is trained only with data collected from Cell-1, and a second model, named is trained with the data collected from multiplecells (e.g., Cell-1, Cell-2,…, Cell-k). are enough training samples for training both models, the performance of ℳ^may be higher than ℳ^if the model for Cell-1 is used.

[0048] In some examples found herein there are different schemes for supporting cell-specific models. For two-sided models, one way to support multiple cells is to collect data from all different cells and then train one single model using all of the data collected from all cells. For a separate training method, the node A 302 (e.g., UE-side node) has an encoder part of the model and the node B 304 (e.g., the network side node) has a decoder part of the model. As the model is trained using data from all cells, it can be used in all UEs and all gNBs. Model management in this example is easier as the network and / or UE needs to deal only with a single model. The drawback, however, is that the performance may be lower than a scheme in which one model is trained for each of the cells.

[0049] In various examples, data is collected from all different cells, but instead of combining all of them, separate models are trained for different cells. Assuming ^ different cells, there may be ^ different decoder models and also ^ different encoder models. Each gNB may then receive a decoder model based on its cell. In these examples, the UE model management is more complicated since the UE may receive and / or use a different encoder model based on the cell it is currently located in and so the UE may change the encoder model when it moves from one cell to another cell. Although this model may have higher gains, model management may be more complicated and may lead to higher signaling overhead.

[0050] In some examples found herein, there are methods to train models that may capture per cell properties of a network while have low model management complexity.

[0051] If there are ^ datasets, -. = / 〈132, 432〉, 6 = 1,2, ⋯ , ^78, 9 = 1,2, ⋯ , ^, each fora particular task (e.g., CSI dataset collected from cell 9 = 1,2, ⋯ , ^). Then, a completedataset is constructed called:-= : -.7;^,^,⋯,^

[0052] If the two-sided modelall collected data, there is an encoder and a decoder model which are generalizable models that may be good for all cells. These models may be denoted by ^+<and ^*<, respectively.

[0053] Three categories of embodiments are described herein to support cell (e.g., task) specific models.

[0054] In a first embodiment, ensemble models may be used. Instead of training a single model using training dataset -, an ensemble of ^ models are trained - each with one dataset. Each of the trained models may have an encoder and a decoder part denotedby ^7+ and ^7* , 9 = 1,2, ⋯ , ^. In some scenarios, a node A side (e.g. UE-side) only hasto encoder parts and a node B side (e.g., network (NW)-side) only has access to decoder parts.

[0055] Two NN blocks (e.g., NN1, NN2) may be used to act as a model selector. NN1 is trained so that it gets one or a few 132 samples from one cell as its input and predicts a cell it belongs to (e.g., 9). NN2 is trained so that it gets one or a few 132 samples from one cell as its input and predicts a cell it belongs to (e.g., 9). In some configurations, NN2 is trained so that it gets one or a few samples of an output of an encoder model ^+7=132> from a cell as its input and predicts a cell it belongs to (e.g., 9). NN1 and NN2 are trained based on 132 and ^+7=132> which are available at the node A and the node B sides, respectively. So, it is possible to train these models using a separate training scheme.

[0056] In the first embodiment, a complete encoder model that may be sent to eachnode A (e.g., each UE) may be a combination of / ^^1, and ^7+ , 9 = 1,2, ⋯ , ^ 8 and acomplete decoder model that may be sent to each node B (e.g., each gNB) may be acombination of / ^^2, and ^7* , 9 = 1,2, ⋯ , ^ 8.

[0057] During an inference phase: the node A (e.g., the UE) uses NN1 and 132 samples to determine which of the encoder models are the best fit for current conditions ∗ +7∗(e.g., model number 9 ) and then uses ^ for encoding of data, and the node B (e.g., the gNB) uses NN2 and 132 samples to determine which of the decoder models are the best fit (e.g., model number ^∗), and then uses ^*^∗for decoding of data.

[0058] In one example, the node B (e.g., the gNB) uses NN2 and input samples it receives from the node A side to determine which decoder model is the best fit (e.g., model number ^∗), and then uses ^*^∗for decoding of data.

[0059] In certain examples it is possible to give a node B of cell ^ a decoder model trained with data of that cell (e.g., ^*^). This is possible if cell ^ participates in a model development phase so it is known which model is a good fit for that cell.

[0060] In a second embodiment, an adaptation layer may be used. In this embodiment, a training dataset - is used and ^+<and ^*<are trained as a pair of generalizable encoder and decoder. consider two NN blocks, ^CD+and^CEFG, as a pre-encoder block and a post-decoder block, respectively. A complete two-sided model for this embodiment is a concatenation of ^CD+ , ^<+ , ^<* , and ^CEFGmodels. A high level block diagram of this embodiment is illustrated in Figure 4. It should be noted that, in practice, a size of ^CD+and ^CEFGare much smaller models than ^+<and ^*<.

[0061] Figure 4 illustrates an example of a block diagram of another two-sided model 400 in accordance with aspects of the present disclosure. The two-sided model 400 includes a node A 402 (e.g., encoder, encoding model, ^+<), a node B 304 (e.g., decoder, decoding model, ^*<), a pre-encoder node 406 (e.g., ^CD+), and a post-decoder node 408 (e.g., ^CEFG). Figure 4 illustrates only one example of the two-sided model 400, while in other examples the location of the encoder and decoder may be swapped. Input data 410 is provided to the pre-encoder node 406, then there is a latent representation 412 in communications from the node A 402 to the node B 404, and the post-decoder node 408 outputs data 414. In some configurations, the node A 402 is located at the UE 104, and the node B 404 is located at the NE 102, but in other configurations the node A 402 and the node B 404 may be located in other devices.

[0062] Using the two-sided model 400, ^ models are trained, each with one of the cell-specific datasets -.while the encoder and the decoder blocks are kept constant to generalized models developed using dataset -. Weights are frozen for ^+<, and ^*<. As a result, there are ^ pre-encoder blocks and post-decoder blocks that may be denotedusing ^7CD+ and ^7CEFG , 9 = 1,2, ⋯ , ^. The complete model for the 9GH cell may then be:^7 → ^< < 7CD+ + → ^* → ^CEFG .phase: all node B (e.g., the gNBs)<receive ^*as a common part of a decoder model. Furthermore, based on their cell, they receive a corresponding ^C7EFG, and all node A (e.g., the UEs) receive ^+<as a common part of an encoder model which is not changed from one cell to another. Then, based on the cell, the node A is associated and it activates the corresponding ^C7D+. If node A does not have the ^C7D+model, the system may need to transfer that model to node A.

[0064] Compared to training different complete encoder and / or decoder model (e.g., ^+7 / ^7*) for each cell, singling overhead that may be associated with model transfer may be lower in the second embodiment since the sizes of ^C7D+and ^7CEFGare generally smaller than ^+7and ^7* .

[0065] In a third embodiment, generative models may be used. In this embodiment, a training dataset - is used and ^+<and ^*<are trained as a pair of generalizable encoder and decoder. Furthermore, in the third embodiment, two NN blocks, ^CD+and ^CEFG, are used as a pre-encoder block and a post-decoder block, respectively. Thecomplete two-sided model 400 is the concatenation of ^CD+, ^<+ , ^<* , and ^CEFG modelsas illustrated in Figure 4. It should be noted that, in practice, ^CD+and ^CEFGare considered smaller NN block (e.g., one or two convolutional or fully connected layers). "CD+and "CEFGmay be defined as two vectors constructed by concatenating all weights for ^CD+and ^CEFG.

[0066] Using the two-sided model 400, ^ models are trained each with one of the cell-specific datasets -.while encoder and decoder blocks are kept constant to generalized models developed using dataset -. As a result, there may be ^ pre-encoderblocks and post-decoder blocks that may be denoted using ^7 7CD+ and ^CEFG , 9 =1,2, ⋯ , ^. Furthermore, after this phase, there may be "7CD+ and "7CEFG for each cell 9where 9 = 1,2, ⋯ , ^. The complete model for a 9GH cell may then be: ^7 <CD+ → ^+ →^< 7* → ^CEFG .

[0067] Moreover, the following may be constructed: a pre-encoder dataset whereKLMN = / 〈{13 72, 6 = 1,2, ⋯ , ^}, "CD+ 〉, 9 = 1,2, ⋯ , ^8 - each sample from this dataset mayhave - the first component is a set of ^ samples from 132 of one of thecells, e.g., cell 9 and then the second component is the pre-encoder blocks weight vector that was constructed in the previous step for that cell, e.g., "C7D+, and a post-encoderdataset where KL4OP = / 〈{132, 6 = 1,2, ⋯ , ^}, "7CEFG 〉, 9 = 1,2, ⋯ , ^8. Each sample fromthis dataset may have two components. The first component is a set of ^ samples from132 of one of the cells, e.g., cell 9 and then the second component is the post-decoder blocks weight vector that was constructed in the previous step for that cell, i.e., "C7EFG.

[0068] In one example, KL4OP may be constructed as KL4OP = / 〈{Q32, 6 =1,2, ⋯ , ^}, "7 〉, 9 = 1,2, ⋯ , ^8 where Q32 representshas been sentthe node B from the node A. So, KL4OPmay depend on the feedback samples in a latent domain not the original input samples of the encoder model.

[0069] In the third embodiment, two NN blocks may be developed which act as twogenerator models: use K to train 3LMN RCD+ such that it gets {12, 6 = 1,2, ⋯ , ^} from a cellas an input and predicts a best "C7D+for that cell, and use KL4OPto train RCEFGsuch thatit gets {13, 6 = 1,2, ⋯ , ^} from a cell as an input and predi 72 cts a best "CEFG for that cell. IfK is constructed using Q3, then 3L4OP 2 RCEFG is trained such that it gets {Q2, 6 = 1,2, ⋯ , ^}from a cell as and input and predicts the best "7CEFGfor that cell. It should be noted that RCD+and RCEFGmay be the same for all node As and node Bs, respectively.

[0070] During an inference phase: all node B (e.g., the gNBs) receive ^*<as a common part of a decoder model and also K as a generator modelpost- block - each node B, e.g., the 9GHnode B , then, uses KL4OPto determine a good "C7EFGusing which it constructs the ^7CEFGmodel - the complete decoder model may then be^<* → ^7CEFG , and all node A (e.g., the UEs) receive ^<+ as a common part of an encoderand also KLMNas a generator model for a pre-encoder block. Each node A, e.g., 9GHnode A, then uses KLMNto determine a good "C7D+using which it constructs the^7 model. T 7 <CD+ he complete encoder model may then be ^CD+ → ^* .

[0071] In should be noted that node A or node B may be able to update ^C7D+and ^C7EFGbased on input data they receive, e.g., 12and / or Q2to have a better model match for current input statistics. If one side (especially the node A) updates its model, it may inform the other side that the encoder and / or decoder model has been modified so the other side can check if the current post-decoder and / or pre-encoder model is the best fit or if it needs to update its weights.

[0072] In one example, all node Bs (e.g., the gNBs) receive ^*<as a common part of a decoder model and then each node B transmits a few from encoded data or132 samples it received from node As to another node (e.g., another node on the NW, on the UE vendor side, on the operator side) which has access to KL4OPas a generator model for a post-decoder block. That node may then use KL4OPto determine a good "C7EFGand transmit it back to node B. Node A then uses the received data to constructsthe ^7 model. The comp < 7CEFG lete decoder model may then be ^* → ^CEFG . Node B mayupdate ^7by sending some samples to that node andupdated "C7EFGwhich it may update ^C7D+.

[0073] In another example, all node As (e.g., the UEs) receive ^+<as a common part of an encoder model and then each node A transmits a fewfrom input data to another node (e.g., another node on the NW, on the UE vendor side, on the operator side) which has access to KLMNas a generator model for a pre-encoder block. That node may then uses KLMNto determine a good "C7D+and transmit it back to node A. Node A then uses the received data to construct the ^C7D+model. The complete encoder modelmay then be ^7 < 7CD+ → ^*. Node A may still update ^CD+ by sending some samples tothat node and"C7D+using which it may update ^C7D+.

[0074] It should be noted that embodiments found herein may be used for CSI- feedback but are not limited to this use. The embodiments may be used in any other task specific use that has access to different models developed for different tasks and may provide an advantage as compared to a single model developed to support all tasks. Different cells described herein may be seen as different tasks. For example, different models may be used for different UEs (e.g., different UEs may act as different tasks). It should be noted that some embodiments may have only a pre-encoder part or a post- encoder part. Moreover, any possible combination of embodiments described herein may be made.

[0075] Figure 5 illustrates an example of a UE 500 in accordance with aspects of the present disclosure. The UE 500 may include a processor 502, a memory 504, a controller 506, and a transceiver 508. The processor 502, the memory 504, the controller 506, or the transceiver 508, or various combinations thereof or various components thereof may be examples of means for performing various aspects of the present disclosure as described herein. These components may be coupled (e.g., operatively, communicatively, functionally, electronically, electrically) via one or more interfaces.

[0076] The processor 502, the memory 504, the controller 506, or the transceiver 508, or various combinations or components thereof may be implemented in hardware (e.g., circuitry). The hardware may include a processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), or other programmable logic device, or any combination thereof configured as or otherwise supporting a means for performing the functions described in the present disclosure.

[0077] The processor 502 may include an intelligent hardware device (e.g., a general-purpose processor, a DSP, a CPU, an ASIC, a field programmable gate array (FPGA), or any combination thereof). In some implementations, the processor 502 may be configured to operate the memory 504. In some other implementations, the memory 504 may be integrated into the processor 502. The processor 502 may be configured to execute computer-readable instructions stored in the memory 504 to cause the UE 500 to perform various functions of the present disclosure.

[0078] The memory 504 may include volatile or non-volatile memory. The memory 504 may store computer-readable, computer-executable code including instructionswhen executed by the processor 502 cause the UE 500 to perform various functions described herein. The code may be stored in a non-transitory computer-readable medium such the memory 504 or another type of memory. Computer-readable media includes both non-transitory computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A non-transitory storage medium may be any available medium that may be accessed by a general-purpose or special-purpose computer.

[0079] In some implementations, the processor 502 and the memory 504 coupled with the processor 502 may be configured to cause the UE 500 to perform one or more of the functions described herein (e.g., executing, by the processor 502, instructions stored in the memory 504). For example, the processor 502 may support wireless communication at the UE 500 in accordance with examples as disclosed herein. For example, the processor 502 coupled with the memory 504 may be configured to cause the UE 500 to determine a first set of one or more parameters for an encoder model. The UE 500 may also determine a first set of information comprising a set of one or more samples representing an input of the encoder model. The UE 500 may update the encoder model based at least in part on the first set of one or more parameters and a third set of one or more parameters, wherein the third set of one or more parameters is based at least in part on one or more of the first set of information, a first message from another apparatus, or a second set of one or more parameters for a pre-encoder generator model. The UE 500 may also encode data based at least in part on the first set of information and the updated encoder model. The UE 500 may transmit the encoded data to a second apparatus.

[0080] The controller 506 may manage input and output signals for the UE 500. The controller 506 may also manage peripherals not integrated into the UE 500. In some implementations, the controller 506 may utilize an operating system such as iOS®, ANDROID®, WINDOWS®, or other operating systems. In some implementations, the controller 506 may be implemented as part of the processor 502.

[0081] In some implementations, the UE 500 may include at least one transceiver 508. In some other implementations, the UE 500 may have more than one transceiver 508. The transceiver 508 may represent a wireless transceiver. The transceiver 508 mayinclude one or more receiver chains 510, one or more transmitter chains 512, or a combination thereof.

[0082] A receiver chain 510 may be configured to receive signals (e.g., control information, data, packets) over a wireless medium. For example, the receiver chain 510 may include one or more antennas for receive the signal over the air or wireless medium. The receiver chain 510 may include at least one amplifier (e.g., a low-noise amplifier (LNA)) configured to amplify the received signal. The receiver chain 510 may include at least one demodulator configured to demodulate the receive signal and obtain the transmitted data by reversing the modulation technique applied during transmission of the signal. The receiver chain 510 may include at least one decoder for decoding the processing the demodulated signal to receive the transmitted data.

[0083] A transmitter chain 512 may be configured to generate and transmit signals (e.g., control information, data, packets). The transmitter chain 512 may include at least one modulator for modulating data onto a carrier signal, preparing the signal for transmission over a wireless medium. The at least one modulator may be configured to support one or more techniques such as amplitude modulation (AM), frequency modulation (FM), or digital modulation schemes like phase-shift keying (PSK) or quadrature amplitude modulation (QAM). The transmitter chain 512 may also include at least one power amplifier configured to amplify the modulated signal to an appropriate power level suitable for transmission over the wireless medium. The transmitter chain 512 may also include one or more antennas for transmitting the amplified signal into the air or wireless medium.

[0084] Figure 6 illustrates an example of a processor 600 in accordance with aspects of the present disclosure. The processor 600 may be an example of a processor configured to perform various operations in accordance with examples as described herein. The processor 600 may include a controller 602 configured to perform various operations in accordance with examples as described herein. The processor 600 may optionally include at least one memory 604, which may be, for example, an L1 / L2 / L3 cache. Additionally, or alternatively, the processor 600 may optionally include one or more arithmetic-logic units (ALUs) 606. One or more of these components may be in electronic communication or otherwise coupled (e.g., operatively, communicatively, functionally, electronically, electrically) via one or more interfaces (e.g., buses).

[0085] The processor 600 may be a processor chipset and include a protocol stack (e.g., a software stack) executed by the processor chipset to perform various operations (e.g., receiving, obtaining, retrieving, transmitting, outputting, forwarding, storing, determining, identifying, accessing, writing, reading) in accordance with examples as described herein. The processor chipset may include one or more cores, one or more caches (e.g., memory local to or included in the processor chipset (e.g., the processor 600) or other memory (e.g., random access memory (RAM), read-only memory (ROM), dynamic RAM (DRAM), synchronous dynamic RAM (SDRAM), static RAM (SRAM), ferroelectric RAM (FeRAM), magnetic RAM (MRAM), resistive RAM (RRAM), flash memory, phase change memory (PCM), and others).

[0086] The controller 602 may be configured to manage and coordinate various operations (e.g., signaling, receiving, obtaining, retrieving, transmitting, outputting, forwarding, storing, determining, identifying, accessing, writing, reading) of the processor 600 to cause the processor 600 to support various operations in accordance with examples as described herein. For example, the controller 602 may operate as a control unit of the processor 600, generating control signals that manage the operation of various components of the processor 600. These control signals include enabling or disabling functional units, selecting data paths, initiating memory access, and coordinating timing of operations.

[0087] The controller 602 may be configured to fetch (e.g., obtain, retrieve, receive) instructions from the memory 604 and determine subsequent instruction(s) to be executed to cause the processor 600 to support various operations in accordance with examples as described herein. The controller 602 may be configured to track memory address of instructions associated with the memory 604. The controller 602 may be configured to decode instructions to determine the operation to be performed and the operands involved. For example, the controller 602 may be configured to interpret the instruction and determine control signals to be output to other components of the processor 600 to cause the processor 600 to support various operations in accordance with examples as described herein. Additionally, or alternatively, the controller 602 may be configured to manage flow of data within the processor 600. The controller 602 may be configured to control transfer of data between registers, arithmetic logic units (ALUs), and other functional units of the processor 600.

[0088] The memory 604 may include one or more caches (e.g., memory local to or included in the processor 600 or other memory, such RAM, ROM, DRAM, SDRAM, SRAM, MRAM, flash memory, etc. In some implementations, the memory 604 may reside within or on a processor chipset (e.g., local to the processor 600). In some other implementations, the memory 604 may reside external to the processor chipset (e.g., remote to the processor 600).

[0089] The memory 604 may store computer-readable, computer-executable code including instructions that, when executed by the processor 600, cause the processor 600 to perform various functions described herein. The code may be stored in a non- transitory computer-readable medium such as system memory or another type of memory. The controller 602 and / or the processor 600 may be configured to execute computer-readable instructions stored in the memory 604 to cause the processor 600 to perform various functions. For example, the processor 600 and / or the controller 602 may be coupled with or to the memory 604, the processor 600, the controller 602, and the memory 604 may be configured to perform various functions described herein. In some examples, the processor 600 may include multiple processors and the memory 604 may include multiple memories. One or more of the multiple processors may be coupled with one or more of the multiple memories, which may, individually or collectively, be configured to perform various functions herein.

[0090] The one or more ALUs 606 may be configured to support various operations in accordance with examples as described herein. In some implementations, the one or more ALUs 606 may reside within or on a processor chipset (e.g., the processor 600). In some other implementations, the one or more ALUs 606 may reside external to the processor chipset (e.g., the processor 600). One or more ALUs 606 may perform one or more computations such as addition, subtraction, multiplication, and division on data. For example, one or more ALUs 606 may receive input operands and an operation code, which determines an operation to be executed. One or more ALUs 606 be configured with a variety of logical and arithmetic circuits, including adders, subtractors, shifters, and logic gates, to process and manipulate the data according to the operation. Additionally, or alternatively, the one or more ALUs 606 may support logical operations such as AND, OR, exclusive-OR (XOR), not-OR (NOR), and not-AND (NAND), enabling the one or more ALUs 606 to handle conditional operations, comparisons, and bitwise operations.

[0091] The processor 600 may support wireless communication in accordance with examples as disclosed herein. The processor 600 may be configured to or operable to support a means for: determining a first set of one or more parameters for an encoder model, determining a first set of information comprising a set of one or more samples representing an input of the encoder model, updating the encoder model based at least in part on the first set of one or more parameters and a third set of one or more parameters, wherein the third set of one or more parameters is based at least in part on one or more of the first set of information, a first message from another apparatus, or a second set of one or more parameters for a pre-encoder generator model, encoding data based at least in part on the first set of information and the updated encoder model, and transmitting the encoded data to a second apparatus.

[0092] Figure 7 illustrates an example of a NE 700 in accordance with aspects of the present disclosure. The NE 700 may include a processor 702, a memory 704, a controller 706, and a transceiver 708. The processor 702, the memory 704, the controller 706, or the transceiver 708, or various combinations thereof or various components thereof may be examples of means for performing various aspects of the present disclosure as described herein. These components may be coupled (e.g., operatively, communicatively, functionally, electronically, electrically) via one or more interfaces.

[0093] The processor 702, the memory 704, the controller 706, or the transceiver 708, or various combinations or components thereof may be implemented in hardware (e.g., circuitry). The hardware may include a processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), or other programmable logic device, or any combination thereof configured as or otherwise supporting a means for performing the functions described in the present disclosure.

[0094] The processor 702 may include an intelligent hardware device (e.g., a general-purpose processor, a DSP, a CPU, an ASIC, an FPGA, or any combination thereof). In some implementations, the processor 702 may be configured to operate the memory 704. In some other implementations, the memory 704 may be integrated into the processor 702. The processor 702 may be configured to execute computer-readable instructions stored in the memory 704 to cause the NE 700 to perform various functions of the present disclosure. For example, the processor 702 coupled with the memory 704may be configured to cause the NE 700 to: determine a first set of one or more parameters for a decoder model, receive encoder data from a first apparatus and a first set of information from the first apparatus or another apparatus, update the decoder model based at least in part on the first set of one or more parameters and a third set of one or more parameters, wherein the third set of one or more parameters is based at least in part on one or more of the first set of information, a first message from another apparatus, or a second set of one or more parameters for a post-decoder generator model, and determine a model output based on the encoded data and the updated decoder model.

[0095] The memory 704 may include volatile or non-volatile memory. The memory 704 may store computer-readable, computer-executable code including instructions when executed by the processor 702 cause the NE 700 to perform various functions described herein. The code may be stored in a non-transitory computer-readable medium such the memory 704 or another type of memory. Computer-readable media includes both non-transitory computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A non-transitory storage medium may be any available medium that may be accessed by a general-purpose or special-purpose computer.

[0096] In some implementations, the processor 702 and the memory 704 coupled with the processor 702 may be configured to cause the NE 700 to perform one or more of the functions described herein (e.g., executing, by the processor 702, instructions stored in the memory 704). For example, the processor 702 may support wireless communication at the NE 700 in accordance with examples as disclosed herein.

[0097] The controller 706 may manage input and output signals for the NE 700. The controller 706 may also manage peripherals not integrated into the NE 700. In some implementations, the controller 706 may utilize an operating system such as iOS®, ANDROID®, WINDOWS®, or other operating systems. In some implementations, the controller 706 may be implemented as part of the processor 702.

[0098] In some implementations, the NE 700 may include at least one transceiver 708. In some other implementations, the NE 700 may have more than one transceiver 708. The transceiver 708 may represent a wireless transceiver. The transceiver 708 mayinclude one or more receiver chains 710, one or more transmitter chains 712, or a combination thereof.

[0099] A receiver chain 710 may be configured to receive signals (e.g., control information, data, packets) over a wireless medium. For example, the receiver chain 710 may include one or more antennas for receive the signal over the air or wireless medium. The receiver chain 710 may include at least one amplifier (e.g., a low-noise amplifier (LNA)) configured to amplify the received signal. The receiver chain 710 may include at least one demodulator configured to demodulate the receive signal and obtain the transmitted data by reversing the modulation technique applied during transmission of the signal. The receiver chain 710 may include at least one decoder for decoding the processing the demodulated signal to receive the transmitted data.

[0100] A transmitter chain 712 may be configured to generate and transmit signals (e.g., control information, data, packets). The transmitter chain 712 may include at least one modulator for modulating data onto a carrier signal, preparing the signal for transmission over a wireless medium. The at least one modulator may be configured to support one or more techniques such as amplitude modulation (AM), frequency modulation (FM), or digital modulation schemes like phase-shift keying (PSK) or quadrature amplitude modulation (QAM). The transmitter chain 712 may also include at least one power amplifier configured to amplify the modulated signal to an appropriate power level suitable for transmission over the wireless medium. The transmitter chain 712 may also include one or more antennas for transmitting the amplified signal into the air or wireless medium.

[0101] Figure 8 illustrates a flowchart of a method 800 in accordance with aspects of the present disclosure. The operations of the method 800 may be implemented by a first apparatus (e.g., UE) as described herein. In some implementations, a UE 500 may execute a set of instructions to control the function elements of a processor to perform the described functions.

[0102] At 802, the method may include determining a first set of one or more parameters for an encoder model. The operations of 802 may be performed in accordance with examples as described herein. In some implementations, aspects of the operations of 802 may be performed by a UE as described with reference to Figure 5.

[0103] At 804, the method may include determining a first set of information comprising a set of one or more samples representing an input of the encoder model. The operations of 804 may be performed in accordance with examples as described herein. In some implementations, aspects of the operations of 804 may be performed by a UE as described with reference to Figure 5.

[0104] At 806, the method may include updating the encoder model based at least in part on the first set of one or more parameters and a third set of one or more parameters, wherein the third set of one or more parameters is based at least in part on one or more of the first set of information, a first message from another apparatus, or a second set of one or more parameters for a pre-encoder generator model. The operations of 806 may be performed in accordance with examples as described herein. In some implementations, aspects of the operations of 806 may be performed by a UE as described with reference to Figure 5.

[0105] At 808, the method may include encoding data based at least in part on the first set of information and the updated encoder model. The operations of 808 may be performed in accordance with examples as described herein. In some implementations, aspects of the operations of 808 may be performed by a UE as described with reference to Figure 5.

[0106] At 810, the method may include transmitting the encoded data to a second apparatus. The operations of 810 may be performed in accordance with examples as described herein. In some implementations, aspects of the operations of 810 may be performed by a UE as described with reference to Figure 5.

[0107] Figure 9 illustrates a flowchart of another method 900 in accordance with aspects of the present disclosure. The operations of the method 900 may be implemented by a second apparatus (e.g., NE) as described herein. In some implementations, a NE 700 may execute a set of instructions to control the function elements of a processor to perform the described functions.

[0108] At 902, the method may include determining a first set of one or more parameters for a decoder model. The operations of 902 may be performed in accordance with examples as described herein. In some implementations, aspects of the operations of 902 may be performed by a NE as described with reference to Figure 7.

[0109] At 904, the method may include receiving encoder data from a first apparatus and a first set of information from the first apparatus or another apparatus. The operations of 904 may be performed in accordance with examples as described herein. In some implementations, aspects of the operations of 904 may be performed by a NE as described with reference to Figure 7.

[0110] At 906, the method may include updating the decoder model based at least in part on the first set of one or more parameters and a third set of one or more parameters, wherein the third set of one or more parameters is based at least in part on one or more of the first set of information, a first message from another apparatus, or a second set of one or more parameters for a post-decoder generator model. The operations of 906 may be performed in accordance with examples as described herein. In some implementations, aspects of the operations of 906 may be performed by a NE as described with reference to Figure 7.

[0111] At 908, the method may include determining a model output based on the encoded data and the updated decoder model. The operations of 908 may be performed in accordance with examples as described herein. In some implementations, aspects of the operations of 908 may be performed by a NE as described with reference to Figure 7.

[0112] It should be noted that the methods described herein describe possible implementations, and that the operations and the steps may be rearranged or otherwise modified and that other implementations are possible.

[0113] The description herein is provided to enable a person having ordinary skill in the art to make or use the disclosure. Various modifications to the disclosure will be apparent to a person having ordinary skill in the art, and the generic principles defined herein may be applied to other variations without departing from the scope of the disclosure. Thus, the disclosure is not limited to the examples and designs described herein but is to be accorded the broadest scope consistent with the principles and novel features disclosed herein.

Claims

CLAIMS What is claimed is:

1. A first apparatus, comprising: at least one memory; and at least one processor coupled with the at least one memory and configured to cause the first apparatus to: determine a first set of one or more parameters for an encoder model; determine a first set of information comprising a set of one or more samples representing an input of the encoder model; update the encoder model based at least in part on the first set of one or more parameters and a third set of one or more parameters, wherein the third set of one or more parameters is based at least in part on one or more of the first set of information, a first message from another apparatus, or a second set of one or more parameters for a pre-encoder generator model; encode data based at least in part on the first set of information and the updated encoder model; and transmit the encoded data to a second apparatus.

2. The first apparatus of claim 1, wherein the at least one processor is configured to cause the first apparatus to transmit a second message to another apparatus, and the second message comprises a subset of the set of one or more samples from the first set of information.

3. The first apparatus of claim 1, wherein the encoder model is updated based on a periodic event, receiving a triggering message from another apparatus, observing a shift in statistics of the first set of information, observing a shift in statistics of a second set of information, or a combination thereof, and wherein the second set of information is based on parameters of an environment or parameters of the first apparatus.

4. The first apparatus of claim 1, wherein, in response to the encoder model being updated, the at least one processor is configured to cause the first apparatus totransmit a triggering message to another apparatus indicating that a pre-encoder model is modified.

5. The first apparatus of claim 1, wherein the at least one processor is configured to cause the first apparatus to transmit, to another apparatus, a second set of information based on the first set of information.

6. The first apparatus of claim 1, wherein the first set of information is based on a channel data representation.

7. The first apparatus of claim 6, wherein the channel data representation is based on reception of at least one reference signal from the second apparatus.

8. The first apparatus of claim 6, wherein the channel data representation is based on different transmit (TX)-receive (RX) pairs over different frequency bands or different time slots or TX-RX pair transformations in other domains.

9. The first apparatus of claim 1, wherein the first set of one or more parameters, the second set of one or more parameters, or a combination thereof is received from another apparatus.

10. A processor of a first apparatus for wireless communication, comprising: at least one controller coupled with at least one memory and configured to cause the processor to: determine a first set of one or more parameters for an encoder model; determine a first set of information comprising a set of one or more samples representing an input of the encoder model; update the encoder model based at least in part on the first set of one or more parameters and a third set of one or more parameters, wherein the third set of one or more parameters is based at least in part on one or more of the first set of information, a first message from another apparatus, or a second set of one or more parameters for a pre-encoder generator model; encode data based at least in part on the first set of information and the updated encoder model; and transmit the encoded data to a second apparatus.

11. The processor of claim 10, wherein the at least one controller is configured to cause the processor to transmit a second message to another apparatus, and the second message comprises a subset of the set of one or more samples from the first set of information.

12. A second apparatus, comprising: at least one memory; and at least one processor coupled with the at least one memory and configured to cause the second apparatus to: determine a first set of one or more parameters for a decoder model; receive encoder data from a first apparatus and a first set of information from the first apparatus or another apparatus; update the decoder model based at least in part on the first set of one or more parameters and a third set of one or more parameters, wherein the third set of one or more parameters is based at least in part on one or more of the first set of information, a first message from another apparatus, or a second set of one or more parameters for a post-decoder generator model; and determine a model output based on the encoded data and the updated decoder model.

13. The second apparatus of claim 12, wherein the at least one processor is configured to cause the second apparatus to transmit a second message to another apparatus, and the second message comprises a subset of samples from the encoder data and the first set of information.

14. The second apparatus of claim 12, wherein the decoder model is updated based on a periodic event, receiving a triggering message from another apparatus, observing a shift in statistics of the encoded data, observing a shift in statistics of the first set of information, observing a shift in statistics of a second set of information, or a combination thereof, and wherein the second set of information is based on parameters of an environment or parameters of the second apparatus.

15. The second apparatus of claim 12, wherein, in response to the decoder model being updated, the at least one processor is configured to cause the second apparatus to transmit a triggering message to another apparatus indicating that a post-decoder model is modified.

16. The second apparatus of claim 12, wherein the first set of information is based on a channel data representation.

17. The second apparatus of claim 16, wherein the channel data representation is based on reception of at least one reference signal from a second apparatus.

18. The second apparatus of claim 16, wherein the channel data representation is based on different transmit (TX)-receive (RX) pairs over different frequency bands or different time slots or TX-RX pair transformations in other domains.

19. The second apparatus of claim 12, wherein the first set of one or more parameters, the second set of one or more parameters, or a combination thereof is received from another apparatus.

20. A method performed by a second apparatus, the method comprising: determining a first set of one or more parameters for a decoder model; receiving encoder data from a first apparatus and a first set of information from the first apparatus or another apparatus; updating the decoder model based at least in part on the first set of one or more parameters and a third set of one or more parameters, wherein the third set of one or more parameters is based at least in part on one or more of the first set of information, a first message from another apparatus, or a second set of one or more parameters for a post-decoder generator model; and determining a model output based on the encoded data and the updated decoder model.

Citation Information

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