Method, communication device, and processing device for transmitting information block, storage medium, method, communication device, and processing device for receiving information block, and storage medium

Abstract

This communication device determines frozen bit indices from among N bit indices with convolutional precoding of a length of L and maps an information block to the non-frozen bit indices. If (N-E) bits are excluded in rate matching, the frozen bit indices include pre-frozen bit indices, where E is rate matching output length. The number of pre-frozen bit indexes can be determined to be 0 on the basis of N-E < L, and ii) max (0, N-E-L) lowest bit indexes in an information bit sequence can be determined as the pre-frozen bit indexes on the basis of N-E > = L.

Description

Method for transmitting an information block, communication device, processing device, and storage medium, and method for receiving an information block, communication device, processing device, and storage medium

[0001] This specification relates to wireless communication systems.

[0002] Various devices and technologies, such as machine-to-machine (M2M) communication, machine-type communication (MTC), and smartphones and tablet PCs (personal computers) that require high data transmission rates, are emerging and becoming widespread. Consequently, the amount of data required to be processed on cellular networks is rapidly increasing. To meet this rapidly increasing data processing demand, technologies such as carrier aggregation and cognitive radio are being developed to efficiently utilize more frequency bands, while multi-antenna technology and multi-BS cooperation technology are being developed to increase the data capacity transmitted within a limited frequency range.

[0003] As more and more communication devices demand greater capacity, the need for enhanced mobile broadband (eMBB) communications is emerging, surpassing legacy radio access technology (RAT). Furthermore, massive machine type communication (mMTC), which connects multiple devices and objects to provide diverse services anytime, anywhere, is a key issue to be considered in next-generation communications.

[0004] Additionally, discussions are underway on communication systems designed to accommodate reliability- and latency-sensitive services and user equipment (UE). The introduction of next-generation wireless access technologies is being discussed, including enhanced mobile broadband (eMBB), mMTC, and ultra-reliable and low latency communication (URLLC).

[0005] With the introduction of new wireless communication technologies, not only is the number of UEs that a BS must service within a given resource area increasing, but the amount of data and control information that the BS transmits / receives with the UEs it serves is also increasing. Since the amount of radio resources available to a BS for communication with the UE(s) is finite, a new method is required for the BS to efficiently receive / transmit uplink / downlink data and / or uplink / downlink control information from / to the UE(s) using the limited radio resources. In other words, as the density of nodes and / or the density of UEs increases, a method is required for efficiently utilizing a high density of nodes or a high density of user equipment for communication.

[0006] Additionally, a method is required to efficiently support various services with different requirements in a wireless communication system.

[0007] Additionally, a method to further improve the performance of the polar code proposed as an alternative to existing channel codes is required.

[0008] The technical tasks that this specification aims to achieve are not limited to the technical tasks mentioned above, and other technical tasks that are not mentioned will be clearly understood by those skilled in the art related to this specification from the detailed description below.

[0009] In one aspect of the present disclosure, a method for transmitting an information block by a communication device in a wireless communication system is provided. The method comprises: applying convolutional precoding with a constraint length L to an information bit sequence with a length N to generate a first bit sequence with a length N; applying a polar transform with a size N to the first bit sequence to generate a second bit sequence with a length N; performing rate matching on the second bit sequence to obtain a rate-matched bit sequence with a length E, where E < N; and transmitting the rate-matched bit sequence, the method comprising: determining pre-frozen bit indices, each of which is set to a predetermined value among N bit indices of the information bit sequence. Based on the fact that the rate-matched bit sequence is obtained by excluding bits of the (NE) lowest bit indices from the second bit sequence: i) based on NE < L, the number of the pre-frozen bit indices is determined to be 0, and ii) based on NE >= L, max(0, NEL) lowest bit indices among the information bit sequence can be determined as the pre-frozen bit indices.

[0010] In another aspect of the present disclosure, a communication device for transmitting an information block in a wireless communication system is provided. The communication device comprises: at least one transceiver; at least one processor; and at least one computer memory operably connectable to the at least one processor and storing instructions that, when executed, cause the at least one processor to perform operations. The operations include: applying convolutional precoding of a constraint length L to an information bit sequence of length N to generate a first bit sequence of length N; applying a polar transform of size N to the first bit sequence to generate a second bit sequence of length N; performing rate matching on the second bit sequence to obtain a rate-matched bit sequence of length E, where E < N; and transmitting the rate-matched bit sequence, the method comprising: determining pre-frozen bit indices, among N bit indices of the information bit sequence, each of which is set to a predetermined value. Based on the fact that the rate-matched bit sequence is obtained by excluding bits of the (NE) lowest bit indices from the second bit sequence: i) based on NE < L, the number of the pre-frozen bit indices is determined to be 0, and ii) based on NE >= L, max(0, NEL) lowest bit indices among the information bit sequence can be determined as the pre-frozen bit indices.

[0011] In another aspect of the present disclosure, a processing device is provided. The processing device includes: at least one processor; and at least one computer memory operably connected to the at least one processor and storing instructions that, when executed, cause the at least one processor to perform operations. The operations include: applying convolutional precoding of a constraint length L to an information bit sequence of length N to generate a first bit sequence of length N; applying a polar transform of size N to the first bit sequence to generate a second bit sequence of length N; performing rate matching on the second bit sequence to obtain a rate-matched bit sequence of length E, where E < N; and transmitting the rate-matched bit sequence, the method including: determining pre-frozen bit indices, among N bit indices of the information bit sequence, each of which is set to a predetermined value. Based on the fact that the rate-matched bit sequence is obtained by excluding bits of the (NE) lowest bit indices from the second bit sequence: i) based on NE < L, the number of the pre-frozen bit indices is determined to be 0, and ii) based on NE >= L, max(0, NEL) lowest bit indices among the information bit sequence can be determined as the pre-frozen bit indices.

[0012] In another aspect of the present disclosure, a computer-readable storage medium is provided. The storage medium stores at least one program code comprising instructions that, when executed, cause at least one processor to perform operations, the operations comprising: applying convolutional precoding of a constraint length L to an information bit sequence of length N to generate a first bit sequence of length N; applying a polar transform of size N to the first bit sequence to generate a second bit sequence of length N; performing rate matching on the second bit sequence to obtain a rate-matched bit sequence of length E, where E < N; and transmitting the rate-matched bit sequence, the method comprising: determining pre-frozen bit indices, among N bit indices of the information bit sequence, each of which is set to a predetermined value. Based on the fact that the rate-matched bit sequence is obtained by excluding bits of the (NE) lowest bit indices from the second bit sequence: i) based on NE < L, the number of the pre-frozen bit indices is determined to be 0, and ii) based on NE >= L, max(0, NEL) lowest bit indices among the information bit sequence can be determined as the pre-frozen bit indices.

[0013] In another aspect of the present disclosure, a method is provided for a communication device to receive an information block in a wireless communication system. The method comprises: receiving a rate-matched bit sequence having a length E; obtaining a second bit sequence having a size N based on the rate-matched bit sequence, where E < N; obtaining a first bit sequence having a length N based on a polar transform of the second bit sequence and a size N; and applying an inverse convolution precoding having a constraint length L to the first bit sequence to obtain an information bit sequence having a length N, wherein N bit indices of the information bit sequence include zero or more pre-frozen bit indices, each having a predetermined value. Based on the fact that the rate-matched bit sequence is obtained by excluding bits of the (NE) lowest bit indices from the second bit sequence: i) based on NE < L, the number of the pre-frozen bit indices is determined to be 0, and ii) based on NE >= L, max(0, NEL) lowest bit indices among the information bit sequence can be determined as the pre-frozen bit indices.

[0014] In another aspect of the present disclosure, a communication device for receiving an information block in a wireless communication system is provided. The communication device comprises: at least one transceiver; at least one processor; and at least one computer memory operably connected to the at least one processor and storing instructions that, when executed, cause the at least one processor to perform operations. The operations include: receiving a rate-matched bit sequence of length E; obtaining a second bit sequence of size N based on the rate-matched bit sequence, wherein E < N; obtaining a first bit sequence of length N based on a polar transform of size N and the second bit sequence; and applying an inverse-convolutional precoding having a constraint length L to the first bit sequence to obtain an information bit sequence of length N, wherein the N bit indices of the information bit sequence include zero or more pre-frozen bit indices, each having a predetermined value. Based on the fact that the rate-matched bit sequence is obtained by excluding bits of the (NE) lowest bit indices from the second bit sequence: i) based on NE < L, the number of the pre-frozen bit indices is determined to be 0, and ii) based on NE >= L, max(0, NEL) lowest bit indices among the information bit sequence can be determined as the pre-frozen bit indices.

[0015] In another aspect of the present disclosure, a processing device is provided. The processing device includes: at least one processor; and at least one computer memory operably connected to the at least one processor and storing instructions that, when executed, cause the at least one processor to perform operations. The operations include: receiving a rate-matched bit sequence of length E; obtaining a second bit sequence of size N based on the rate-matched bit sequence, wherein E < N; obtaining a first bit sequence of length N based on a polar transform of size N and the second bit sequence; and applying an inverse-convolutional precoding of a constraint length L to the first bit sequence to obtain an information bit sequence of length N, wherein the N bit indices of the information bit sequence include zero or more pre-frozen bit indices, each having a predetermined value. Based on the fact that the rate-matched bit sequence is obtained by excluding bits of the (NE) lowest bit indices from the second bit sequence: i) based on NE < L, the number of the pre-frozen bit indices is determined to be 0, and ii) based on NE >= L, max(0, NEL) lowest bit indices among the information bit sequence can be determined as the pre-frozen bit indices.

[0016] In another aspect of the present disclosure, a computer-readable storage medium is provided. The storage medium stores at least one program code comprising instructions that, when executed, cause at least one processor to perform operations, the operations comprising: receiving a rate-matched bit sequence of length E; obtaining a second bit sequence of size N based on the rate-matched bit sequence, wherein E < N; obtaining a first bit sequence of length N based on a polar transform of size N and the second bit sequence; and applying an inverse-convolutional precoding of a constraint length L to the first bit sequence to obtain an information bit sequence of length N, wherein the N bit indices of the information bit sequence include zero or more pre-frozen bit indices, each having a predetermined value. Based on the fact that the rate-matched bit sequence is obtained by excluding bits of the (NE) lowest bit indices from the second bit sequence: i) based on NE < L, the number of the pre-frozen bit indices is determined to be 0, and ii) based on NE >= L, max(0, NEL) lowest bit indices among the information bit sequence can be determined as the pre-frozen bit indices.

[0017] In each aspect of the present specification, based on the fact that the rate-matched bit sequence is obtained by excluding bits of the (NE) highest bit indices from the second bit sequence, ((NE) + L - 1) highest bit indices in the information bit sequence can be determined as the pre-frozen bit indices.

[0018] In each aspect of this specification, the rate-matched bit sequence can be obtained by excluding bits of the (NE) lowest bit indices among the second bit sequence based on E / N being less than or equal to a predetermined value.

[0019] In each aspect of the present specification, the rate-matched bit sequence can be obtained by excluding bits of the (NE) highest bit indices among the second bit sequence based on E / N being greater than a predetermined value.

[0020] In each aspect of this specification, applying the convolutional precoding to the information bit sequence: Based on the first bit sequence u N = {u0,...,u N-1}, where c k is the impulse response c=(c0, ..., c m ) is an element of v n is an element of the above information bit sequence, and v when i=0,...,N-1 and j>=i i-j =0, m is the number of transition registers, and the constraint length L = m+1.

[0021] In each aspect of the present specification, the method or the operations may further include: determining the information bit sequence based on a reliability order of the information block, the pre-frozen bit indices, and bit indices of a polar code of size N.

[0022] In each aspect of the present specification, determining the information bit sequence may include: setting K bits of the information block to K most reliable bit indices among the N bit indices of the information bit sequence, excluding the pre-frozen bit indices; and setting the predetermined value to each of the remaining bit indices.

[0023] In each aspect of the present specification, the information block may be determined based on a mapping relationship of the information block to the information block sequence, wherein the mapping relationship may include: setting K bits of the information block to K most reliable bit indices among the N bit indices of the information bit sequence, excluding the pre-frozen bit indices; and setting the predetermined value to each of the remaining bit indices.

[0024] The above problem solving methods are only some of the examples of this specification, and various examples reflecting the technical features of this specification can be derived and understood by a person having ordinary knowledge in the relevant technical field based on the detailed description below.

[0025] According to some implementations of this specification, wireless communication signals can be transmitted / received efficiently. Consequently, the overall throughput of a wireless communication system can be increased.

[0026] According to some implementations of this specification, incremental redundancy (IR) HARQ may be supported for user data encoded via polarization adjusted convolution (PAC) codes that apply convolutional precoding before polar encoding.

[0027] Some implementations of this specification allow PAC codes to be applied robustly to physical downlink control channel (PDCCH) errors.

[0028] The effects according to this specification are not limited to the effects mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art related to this specification from the detailed description below.

[0029] To aid in understanding implementations of this specification, the accompanying drawings, which are included as part of the detailed description, provide examples of implementations of this specification and, together with the detailed description, illustrate implementations of this specification:

[0030] Figure 1 illustrates an example of a communication system 1 to which implementations of the present specification are applied;

[0031] FIG. 2 is a block diagram illustrating examples of communication devices capable of performing a method according to the present specification.

[0032] FIG. 3 illustrates another example of a wireless device capable of performing implementation(s) of this specification;

[0033] Figure 4 is the 3rd generation partnership project (3 rd It illustrates an example of a frame structure available in a wireless communication system based on the 3rd Generation Partnership Project (3GPP);

[0034] Figure 5 illustrates a processing process on the transmission side for a transport block (TB);

[0035] Figure 6 is an example of a block diagram for a polar encoder;

[0036] Figure 7 illustrates the concept of channel combining and channel splitting for channel polarization;

[0037] Fig. 8 illustrates N-th level channel combining for polar code;

[0038] Figure 9 illustrates the evolution of decoding paths in the List-L decoding process;

[0039] FIG. 10 is a diagram illustrating the concept of selecting the location(s) to which information bit(s) are to be allocated in a polar code;

[0040] Figure 11 illustrates puncturing and information bit allocation for a polar code;

[0041] Figure 12 illustrates a method for generating parity check bit(s) used in a polar code;

[0042] FIG. 13 illustrates a rate matching process according to some implementations of this specification;

[0043] FIG. 14 illustrates the structure of one of the encoder / decoders for PAC codes available in some implementations of the present specification;

[0044] Figure 15 illustrates a codeword tree to explain the concept of sequential decoding;

[0045] FIG. 16 illustrates examples of assigning information bits to a polar encoder according to some implementations of the present specification;

[0046] FIG. 17 illustrates the locations of bit indices of a polar code that are pre-frozen for rate matching according to some implementations of the present specification;

[0047] Figure 18 is a diagram to help understand pre-freezing according to rate matching in PAC code;

[0048] Figure 19 illustrates a block interleaver;

[0049] FIG. 20 illustrates a permutated precoding matrix according to some implementations of the present specification;

[0050] FIG. 21 illustrates a block interleaver according to some implementations of the present specification;

[0051] FIG. 22 illustrates a channel encoding process according to some implementations of the present specification;

[0052] Figure 23 illustrates a channel decoding process according to some implementations of the present specification.

[0053] Hereinafter, implementations according to this specification will be described in detail with reference to the attached drawings. The detailed description provided below, together with the attached drawings, is intended to describe exemplary implementations of this specification and is not intended to represent the only possible implementations of this specification. The detailed description below includes specific details to provide a thorough understanding of this specification. However, one of ordinary skill in the art will appreciate that this specification may be practiced without these specific details.

[0054] In some cases, to avoid ambiguity in the concepts of this specification, known structures and devices may be omitted or illustrated in block diagram form focusing on the core functions of each structure and device. Furthermore, identical components are described using the same drawing reference numerals throughout this specification.

[0055] The techniques, devices, and systems described below can be applied to various wireless multiple access systems. Examples of multiple access systems include code division multiple access (CDMA) systems, frequency division multiple access (FDMA) systems, time division multiple access (TDMA) systems, orthogonal frequency division multiple access (OFDMA) systems, single carrier frequency division multiple access (SC-FDMA) systems, and multi-carrier frequency division multiple access (MC-FDMA) systems. CDMA can be implemented in wireless technologies such as Universal Terrestrial Radio Access (UTRA) or CDMA2000. TDMA can be implemented in wireless technologies such as Global System for Mobile communication (GSM), General Packet Radio Service (GPRS), and Enhanced Data Rates for GSM Evolution (EDGE) (i.e., GERAN). OFDMA can be implemented in wireless technologies such as IEEE (Institute of Electrical and Electronics Engineers) 802.11 (WiFi), IEEE 802.16 (WiMAX), IEEE 802-20, and E-UTRA (evolved-UTRA). UTRA is part of UMTS (Universal Mobile Telecommunication System), and 3GPP (3rd Generation Partnership Project) LTE (Long Term Evolution) is a part of E-UMTS that uses E-UTRA.3GPP LTE adopts OFDMA for the downlink (DL) and SC-FDMA for the uplink (UL). LTE-A (LTE-advanced) is an evolved form of 3GPP LTE.

[0056] For convenience of explanation, the following description assumes that this specification applies to 3GPP-based communication systems, such as LTE and NR. However, the technical features of this specification are not limited to this. For example, although the detailed description below is based on a mobile communication system corresponding to a 3GPP LTE / NR system, it can also be applied to any other mobile communication system, except for features specific to 3GPP LTE / NR.

[0057] For terms and technologies used in this specification that are not specifically explained, reference may be made to 3GPP-based standard documents, such as 3GPP TS 36.211, 3GPP TS 36.212, 3GPP TS 36.213, 3GPP TS 36.321, 3GPP TS 36.300 and 3GPP TS 36.331, 3GPP TS 37.213, 3GPP TS 38.211, 3GPP TS 38.212, 3GPP TS 38.213, 3GPP TS 38.214, 3GPP TS 38.300, 3GPP TS 38.331, etc.

[0058] In the examples of this specification described below, the expression "assumes" that a device "assumes" that the entity transmitting the channel transmits the channel in a manner consistent with the "assume." The entity receiving the channel may mean that, under the assumption that the channel was transmitted in a manner consistent with the "assume," the entity receiving the channel receives or decodes the channel in a manner consistent with the "assume."

[0059] In this specification, UE may be fixed or mobile, and includes various devices that communicate with a BS (base station) to transmit and / or receive user data and / or various control information. UE may be called (Terminal Equipment), MS (Mobile Station), MT (Mobile Terminal), UT (User Terminal), SS (Subscribe Station), wireless device, PDA (Personal Digital Assistant), wireless modem, handheld device, etc. In addition, in this specification, BS generally refers to a fixed station that communicates with UE and / or other BS, and exchanges various data and control information with UE and other BS. BS may be called by other terms such as ABS (Advanced Base Station), NB (Node-B), eNB (evolved-NodeB), BTS (Base Transceiver System), Access Point, PS (Processing Server), etc. In particular, the BS in UTRAN is called a Node-B, the BS in E-UTRAN is called an eNB, and the BS in a new radio access technology network is called a gNB. For convenience of explanation, BSs are collectively referred to as BSs below, regardless of the type or version of communication technology.

[0060] In this specification, a node refers to a fixed point that can transmit / receive radio signals by communicating with a UE. Various types of BSs can be used as nodes regardless of their names. For example, BSs, NBs, eNBs, pico-cell eNBs (PeNBs), home eNBs (HeNBs), relays, and repeaters can be nodes. Furthermore, a node may not be a BS. For example, it can be a radio remote head (RRH) or a radio remote unit (RRU). RRHs, RRUs, etc. generally have a lower power level than the BS. Since an RRH or RRU (hereinafter referred to as RRH / RRU) is generally connected to a BS via a dedicated line such as an optical cable, cooperative communication between an RRH / RRU and a BS can be performed more smoothly than cooperative communication between BSs that are generally connected via a wireless line. Each node is equipped with at least one antenna. The antenna may be a physical antenna, an antenna port, a virtual antenna, or an antenna group. A node is also called a point.

[0061] In this specification, a cell refers to a certain geographical area where one or more nodes provide communication services. Therefore, in this specification, communicating with a specific cell may mean communicating with a BS or node that provides communication services to the specific cell. In addition, the downlink / uplink signal of a specific cell refers to a downlink / uplink signal from / to a BS or node that provides communication services to the specific cell. A cell that provides uplink / downlink communication services to a UE is specifically referred to as a serving cell. In addition, the channel state / quality of a specific cell refers to the channel state / quality of a channel or communication link formed between a BS or node that provides communication services to the specific cell and the UE. In a 3GPP-based communication system, a UE can measure a downlink channel state from a specific node using CRS (Cell-specific Reference Signal) resources transmitted by antenna port(s) of the specific node on CRS resources allocated to the specific node and / or CSI-RS (Channel State Information Reference Signal) resources transmitted.

[0062] Meanwhile, 3GPP-based communication systems use the concept of cells to manage radio resources, and cells associated with radio resources are distinguished from cells in geographical areas.

[0063] A "cell" in a geographical area can be understood as the coverage over which a node can provide a service using a carrier, and a "cell" in a radio resource is associated with a bandwidth (BW), which is a frequency range configured by the carrier. Since downlink coverage, which is the range over which a node can transmit a valid signal, and uplink coverage, which is the range over which a node can receive a valid signal from a UE, depend on the carrier carrying the signal, the coverage of a node is also associated with the coverage of the "cell" of the radio resource used by the node. Therefore, the term "cell" can sometimes be used to mean the coverage of a service by a node, sometimes a radio resource, and sometimes the range over which a signal using the radio resource can reach with a valid intensity.

[0064] Meanwhile, the 3GPP communication standard uses the concept of a cell to manage radio resources. A "cell" associated with radio resources is defined as a combination of downlink resources (DL resources) and uplink resources (UL resources), i.e., a combination of a DL component carrier (CC) and an UL CC. A cell can be configured with DL resources alone or a combination of DL resources and UL resources. If carrier aggregation is supported, the linkage between the carrier frequency of the DL resources (or DL ​​CC) and the carrier frequency of the UL resources (or UL CC) can be indicated by system information. For example, the combination of DL resources and UL resources can be indicated by a System Information Block Type 2 (SIB2) linkage. Here, the carrier frequency can be the same as or different from the center frequency of each cell or CC. When carrier aggregation (CA) is established, the UE has only one radio resource control (RRC) connection with the network. One serving cell provides non-access stratum (NAS) mobility information during RRC connection establishment / re-establishment / handover, and one serving cell provides security input during RRC connection re-establishment / handover. Such a cell is called a primary cell (Pcell). A Pcell is a cell operating on the primary frequency where the UE performs initial connection establishment procedures or initiates connection re-establishment procedures.Depending on the UE capability, secondary cells (Scells) can be configured to form a set of serving cells together with Pcells. An Scell ​​can be configured after RRC (Radio Resource Control) connection establishment, and is a cell that provides additional radio resources in addition to the resources of a special cell (SpCell). The carrier corresponding to a Pcell in downlink is called a downlink primary CC (DL PCC), and the carrier corresponding to a Pcell in uplink is called an UL primary CC (DL PCC). The carrier corresponding to an Scell ​​in downlink is called a DL secondary CC (DL SCC), and the carrier corresponding to the Scell ​​in uplink is called an UL secondary CC (UL SCC).

[0065] For dual connectivity (DC) operation, the term SpCell refers to a Pcell of a master cell group (MCG) or a Pcell of a secondary cell group (SCG). A SpCell supports PUCCH transmission and contention-based random access and is always activated. An MCG is a group of serving cells associated with a master node (e.g., BS) and consists of a SpCell (Pcell) and optionally one or more Scells. For a UE configured for DC, an SCG is a subset of serving cells associated with a secondary node and consists of a PSCell and zero or more Scells. A PSCell is the primary Scell ​​of an SCG. For a UE in RRC_CONNECTED state that is not configured for CA or DC, there is only one serving cell consisting solely of Pcells. For a UE in RRC_CONNECTED state configured as CA or DC, the term serving cells refers to the set of cells consisting of SpCell(s) and all Scell(s). In DC, two medium access control (MAC) entities are configured in the UE: one for the MCG and one for the SCG.

[0066] For a UE where CA is set and DC is not set, a Pcell PUCCH group consisting of a Pcell and zero or more Scells and a Scell ​​PUCCH group consisting of only Scell(s) may be set. In the case of an Scell, an Scell ​​(hereinafter referred to as a PUCCH cell) on which a PUCCH associated with the cell is transmitted may be set. An Scell ​​indicated as a PUCCH Scell ​​belongs to an Scell ​​PUCCH group, and PUCCH transmission of the relevant UCI is performed on the PUCCH Scell, and an Scell ​​where a PUCCH Scell ​​is not indicated or is a Pcell indicated as a cell for PUCCH transmission, belongs to a Pcell PUCCH group, and PUCCH transmission of the relevant UCI is performed on the Pcell.

[0067] In a wireless communication system, a UE receives information from a base station (BS) via the downlink (DL), and the UE transmits information to the base station via the uplink (UL). The information transmitted and / or received by the BS and UE includes data and various control information, and various physical channels exist depending on the type and purpose of the information they transmit and / or receive.

[0068] 3GPP-based communication standards define downlink physical channels corresponding to resource elements that carry information originating from higher layers, and downlink physical signals corresponding to resource elements that are used by the physical layer but do not carry information originating from higher layers. For example, the physical downlink shared channel (PDSCH), physical broadcast channel (PBCH), and physical downlink control channel (PDCCH) are defined as downlink physical channels, and reference signals and synchronization signals are defined as downlink physical signals. A reference signal (RS), also referred to as a pilot, refers to a signal with a predefined, special waveform that is known to the BS and UE. For example, the demodulation reference signal (DMRS) and the channel state information RS (CSI-RS) are defined as downlink reference signals. 3GPP-based communication standards define uplink physical channels corresponding to resource elements that carry information originating from higher layers, and uplink physical signals corresponding to resource elements that are used by the physical layer but do not carry information originating from higher layers.For example, a physical uplink shared channel (PUSCH), a physical uplink control channel (PUCCH), and a physical random access channel (PRACH) are defined as uplink physical channels, and a demodulation reference signal (DMRS) for uplink control / data signals and a sounding reference signal (SRS) used for uplink channel measurement are defined.

[0069] In this specification, the Physical Downlink Control CHannel (PDCCH) refers to a set of time-frequency resources (e.g., resource elements (REs)) that carry Downlink Control Information (DCI), and the Physical Downlink Shared CHannel (PDSCH) refers to a set of time-frequency resources that carry downlink data. In addition, the Physical Uplink Control CHannel (PUCCH), Physical Uplink Shared CHannel (PUSCH), and Physical Random Access CHannel (PRACH) refer to sets of time-frequency resources that carry Uplink Control Information (UCI), uplink data, and random access signals, respectively. Hereinafter, the expression that a user equipment transmits / receives a PUCCH / PUSCH / PRACH is used with the same meaning as transmitting / receiving uplink control information / uplink data / random access signal on or through the PUCCH / PUSCH / PUCCH / PRACH, respectively. In addition, the expression that a BS transmits / receives a PBCH / PDCCH / PDSCH is used with the same meaning as transmitting broadcast information / downlink control information / downlink data on or through the PBCH / PDCCH / PDSCH, respectively.

[0070] In this specification, radio resources (e.g., time-frequency resources) scheduled or configured by the BS to the UE for transmission or reception of PUCCH / PUSCH / PDSCH are also referred to as PUCCH / PUSCH / PDSCH resources.

[0071] Since the communication device receives SSB, DMRS, CSI-RS, PBCH, PDCCH, PDSCH, PUSCH, and / or PUCCH in the form of radio signals on a cell, it cannot selectively receive through an RF receiver only radio signals including only a specific physical channel or only a specific physical signal, or selectively receive through an RF receiver only radio signals excluding only a specific physical channel or only a physical signal. In actual operation, the communication device first receives radio signals on a cell through an RF receiver, converts the radio signals, which are RF band signals, into baseband signals, and decodes physical signals and / or physical channels within the baseband signals using one or more processors. Thus, in some implementations of the present specification, receiving a physical signal and / or a physical channel may not actually mean that the communication device does not receive wireless signals containing the physical signal and / or physical channel at all, but rather that it does not attempt to recover the physical signal and / or physical channel from the wireless signals, e.g., does not attempt to decode the physical signal and / or the physical channel.

[0072] As more and more communication devices demand greater communication capacity, the need for improved mobile broadband communication over existing radio access technology (RAT) is emerging. Furthermore, massive MTC, which connects numerous devices and objects to provide diverse services anytime, anywhere, is also a key issue to be considered in next-generation communications. Furthermore, communication system design that considers reliability and latency-sensitive services / UEs is being discussed. The introduction of next-generation RATs that take advanced mobile broadband communication, massive MTC, and URLLC (Ultra-Reliable and Low Latency Communication) into account is currently under discussion. 3GPP is currently conducting studies on next-generation mobile communication systems beyond EPC. For convenience, this technology is referred to as new RAT (NR) or 5G RAT, and a system that uses or supports NR is referred to as an NR system.

[0073] FIG. 1 illustrates an example of a communication system 1 to which implementations of the present specification are applied. Referring to FIG. 1, the communication system (1) applied to the present specification includes a wireless device, a BS, and a network. Here, the wireless device refers to a device that performs communication using a wireless access technology (e.g., 5G NR (New RAT), LTE (e.g., E-UTRA)) and may be referred to as a communication / wireless / 5G device. Although not limited thereto, the wireless device may include a robot (100a), a vehicle (100b-1, 100b-2), an XR (eXtended Reality) device (100c), a hand-held device (100d), a home appliance (100e), an IoT (Internet of Things) device (100f), and an AI device / server (400). For example, the vehicle may include a vehicle equipped with a wireless communication function, an autonomous vehicle, a vehicle capable of performing vehicle-to-vehicle communication, etc. Here, the vehicle may include an Unmanned Aerial Vehicle (UAV) (e.g., a drone). XR devices include AR (Augmented Reality) / VR (Virtual Reality) / MR (Mixed Reality) devices, and may be implemented in the form of a Head-Mounted Device (HMD), a Head-Up Display (HUD) installed in a vehicle, a television, a smartphone, a computer, a wearable device, a home appliance, digital signage, a vehicle, a robot, etc. Mobile devices may include a smartphone, a smart pad, a wearable device (e.g., a smart watch, smart glasses), a computer (e.g., a laptop, etc.), etc. Home appliances may include a TV, a refrigerator, a washing machine, etc. IoT devices may include sensors, smart meters, etc. For example, a BS or network may also be implemented as a wireless device, and a specific wireless device may act as a BS / network node to other wireless devices.

[0074] Wireless devices (100a to 100f) can be connected to a network (300) via a BS (200). Artificial Intelligence (AI) technology can be applied to the wireless devices (100a to 100f), and the wireless devices (100a to 100f) can be connected to an AI server (400) via a network (300). The network (300) can be configured using a 3G network, a 4G (e.g., LTE) network, a 5G (e.g., NR) network, etc. The wireless devices (100a to 100f) can communicate with each other via the BS (200) / network (300), but can also communicate directly (e.g., sidelink communication) without going through the BS / network. For example, vehicles (100b-1, 100b-2) can communicate directly (e.g., V2V (Vehicle to Vehicle) / V2X (Vehicle to Everything) communication). In addition, IoT devices (e.g., sensors) can communicate directly with other IoT devices (e.g., sensors) or other wireless devices (100a to 100f).

[0075] Wireless communication / connection (150a, 150b) can be performed between wireless devices (100a~100f) / BS (200) - BS (200) / wireless devices (100a~100f). Here, the wireless communication / connection can be performed through various wireless access technologies (e.g., 5G NR) for uplink / downlink communication (150a) and sidelink communication (150b) (or D2D communication). Through the wireless communication / connection (150a, 150b), the wireless device and the BS / wireless device can transmit / receive wireless signals to / from each other. To this end, at least some of various configuration information setting processes for transmitting / receiving wireless signals, various signal processing processes (e.g., channel encoding / decoding, modulation / demodulation, resource mapping / demapping, etc.), and resource allocation processes can be performed based on various proposals of this specification.

[0076] FIG. 2 is a block diagram illustrating examples of communication devices capable of performing a method according to the present specification. Referring to FIG. 2, a first wireless device (100) and a second wireless device (200) can transmit and / or receive wireless signals via various wireless access technologies (e.g., LTE, NR). Here, {the first wireless device (100), the second wireless device (200)} can correspond to {the wireless device (100x), the BS (200)} and / or {the wireless device (100x), the wireless device (100x)} of FIG. 1.

[0077] A first wireless device (100) includes one or more processors (102) and one or more memories (104), and may further include one or more transceivers (106) and / or one or more antennas (108). The processor (102) controls the memories (104) and / or the transceivers (106), and may be configured to implement functions, procedures, and / or methods described / suggested below. For example, the processor (102) may process information in the memory (104) to generate first information / signals, and then transmit a wireless signal including the first information / signals via the transceivers (106). In addition, the processor (102) may receive a wireless signal including second information / signals via the transceivers (106), and then store information obtained from signal processing of the second information / signals in the memory (104). The memory (104) may be connected to the processor (102) and may store various information related to the operation of the processor (102). For example, the memory (104) may perform some or all of the processes controlled by the processor (102), or may store software code including commands for performing the procedures and / or methods described / proposed below. Here, the processor (102) and the memory (104) may be part of a communication modem / circuit / chip designed to implement wireless communication technology (e.g., LTE, NR). The transceiver (106) may be connected to the processor (102) and may transmit and / or receive wireless signals via one or more antennas (108). The transceiver (106) may include a transmitter and / or a receiver. The transceiver (106) may be used interchangeably with an RF (Radio Frequency) unit. In this specification, a wireless device may also mean a communication modem / circuit / chip.

[0078] The second wireless device (200) includes one or more processors (202), one or more memories (204), and may further include one or more transceivers (206) and / or one or more antennas (208). The processor (202) controls the memories (204) and / or the transceivers (206), and may be configured to implement the functions, procedures, and / or methods described / suggested below. For example, the processor (202) may process information in the memory (204) to generate third information / signals, and then transmit a wireless signal including the third information / signals via the transceivers (206). In addition, the processor (202) may receive a wireless signal including fourth information / signals via the transceivers (206), and then store information obtained from signal processing of the fourth information / signals in the memory (204). The memory (204) may be connected to the processor (202) and may store various information related to the operation of the processor (202). For example, the memory (204) may perform some or all of the processes controlled by the processor (202), or may store software code including commands for performing the procedures and / or methods described / proposed below. Here, the processor (202) and the memory (204) may be part of a communication modem / circuit / chip designed to implement wireless communication technology (e.g., LTE, NR). The transceiver (206) may be connected to the processor (202) and may transmit and / or receive wireless signals via one or more antennas (208). The transceiver (206) may include a transmitter and / or a receiver. The transceiver (206) may be used interchangeably with an RF unit. In this specification, a wireless device may also mean a communication modem / circuit / chip.

[0079] The wireless communication technology implemented in the wireless device (100, 200) of the present specification may include not only LTE, NR, and 6G, but also Narrowband Internet of Things for low-power communication. At this time, for example, NB-IoT technology may be an example of LPWAN (Low Power Wide Area Network) technology, and may be implemented with standards such as LTE Cat NB1 and / or LTE Cat NB2, and is not limited to the above-described names. Additionally or alternatively, the wireless communication technology implemented in the wireless device (XXX, YYY) of the present specification may perform communication based on LTE-M technology. At this time, for example, LTE-M technology may be an example of LPWAN technology, and may be called by various names such as eMTC (enhanced Machine Type Communication). For example, LTE-M technology can be implemented by at least one of various standards such as 1) LTE CAT 0, 2) LTE Cat M1, 3) LTE Cat M2, 4) LTE non-BL (non-Bandwidth Limited), 5) LTE-MTC, 6) LTE Machine Type Communication, and / or 7) LTE M, and is not limited to the above-described names. Additionally or alternatively, the wireless communication technology implemented in the wireless device (XXX, YYY) of the present specification can include at least one of ZigBee, Bluetooth, and Low Power Wide Area Network (LPWAN) considering low-power communication, and is not limited to the above-described names. For example, ZigBee technology can create PAN (personal area networks) related to small / low-power digital communication based on various standards such as IEEE 802.15.4, and can be called by various names.

[0080] Hereinafter, hardware elements of the wireless device (100, 200) will be described in more detail. Although not limited thereto, one or more protocol layers may be implemented by one or more processors (102, 202). For example, one or more processors (102, 202) may implement one or more layers (e.g., functional layers such as a physical (PHY) layer, a medium access control (MAC) layer, a radio link control (RLC) layer, a packet data convergence protocol (PDCP) layer, a radio resource control (RRC) layer, and a service data adaptation protocol (SDAP) layer). One or more processors (102, 202) may generate one or more protocol data units (PDUs) and / or one or more service data units (SDUs) according to the functions, procedures, proposals, and / or methods disclosed in this document. One or more processors (102, 202) may generate messages, control information, data or information according to the functions, procedures, proposals and / or methods disclosed herein. One or more processors (102, 202) may generate signals (e.g., baseband signals) including PDUs, SDUs, messages, control information, data or information according to the functions, procedures, proposals and / or methods disclosed herein and provide the signals to one or more transceivers (106, 206). One or more processors (102, 202) may receive signals (e.g., baseband signals) from one or more transceivers (106, 206) and obtain PDUs, SDUs, messages, control information, data or information according to the functions, procedures, proposals and / or methods disclosed herein.

[0081] One or more processors (102, 202) may be referred to as a controller, a microcontroller, a microprocessor, or a microcomputer. One or more processors (102, 202) may be implemented by hardware, firmware, software, or a combination thereof. For example, one or more Application Specific Integrated Circuits (ASICs), one or more Digital Signal Processors (DSPs), one or more Digital Signal Processing Devices (DSPDs), one or more Programmable Logic Devices (PLDs), or one or more Field Programmable Gate Arrays (FPGAs) may be included in one or more processors (102, 202). The functions, procedures, proposals, and / or methods disclosed in this document may be implemented using firmware or software, and the firmware or software may be implemented to include modules, procedures, functions, etc. Firmware or software configured to perform the functions, procedures, suggestions and / or methods disclosed in this document may be included in one or more processors (102, 202) or stored in one or more memories (104, 204) and executed by one or more processors (102, 202). The functions, procedures, suggestions and / or methods disclosed in this document may be implemented using firmware or software in the form of codes, instructions and / or sets of instructions.

[0082] One or more memories (104, 204) may be coupled to one or more processors (102, 202) and may store various forms of data, signals, messages, information, programs, codes, instructions, and / or commands. The one or more memories (104, 204) may be configured as ROM, RAM, EPROM, flash memory, hard drives, registers, cache memory, computer-readable storage media, and / or combinations thereof. The one or more memories (104, 204) may be located internally and / or externally to the one or more processors (102, 202). Additionally, the one or more memories (104, 204) may be coupled to the one or more processors (102, 202) via various technologies, such as wired or wireless connections.

[0083] One or more transceivers (106, 206) can transmit user data, control information, wireless signals / channels, etc., as mentioned in the methods and / or flowcharts of this document, to one or more other devices. One or more transceivers (106, 206) can receive user data, control information, wireless signals / channels, etc., as mentioned in the functions, procedures, proposals, methods and / or flowcharts of this document, from one or more other devices. For example, one or more transceivers (106, 206) can be coupled to one or more processors (102, 202) and can transmit and / or receive wireless signals. For example, one or more processors (102, 202) can control one or more transceivers (106, 206) to transmit user data, control information, or wireless signals to one or more other devices. Additionally, one or more processors (102, 202) may control one or more transceivers (106, 206) to receive user data, control information, or wireless signals from one or more other devices. Additionally, one or more transceivers (106, 206) may be coupled to one or more antennas (108, 208), and one or more transceivers (106, 206) may be configured to transmit and / or receive user data, control information, wireless signals / channels, or the like, as referred to in the functions, procedures, proposals, methods, and / or operational flowcharts disclosed in this document, via one or more antennas (108, 208). In this document, one or more antennas may be multiple physical antennas or multiple logical antennas (e.g., antenna ports). One or more transceivers (106, 206) may convert received user data, control information, wireless signals / channels, etc. from RF band signals to baseband signals for processing using one or more processors (102, 202).One or more transceivers (106, 206) may convert user data, control information, wireless signals / channels, etc. processed by one or more processors (102, 202) from baseband signals to RF band signals. For this purpose, one or more transceivers (106, 206) may include an (analog) oscillator and / or filter.

[0084] FIG. 3 illustrates another example of a wireless device capable of performing implementation(s) of the present specification. Referring to FIG. 3, the wireless device (100, 200) corresponds to the wireless device (100, 200) of FIG. 2 and may be composed of various elements, components, units, and / or modules. For example, the wireless device (100, 200) may include a communication unit (110), a control unit (120), a memory unit (130), and an additional component (140). The communication unit may include a communication circuit (112) and a transceiver(s) (114). For example, the communication circuit (112) may include one or more processors (102, 202) and / or one or more memories (104, 204) of FIG. 2. For example, the transceiver(s) (114) may include one or more transceivers (106, 206) and / or one or more antennas (108, 208) of FIG. 2. The control unit (120) is electrically connected to the communication unit (110), the memory unit (130), and the additional components (140) and controls the overall operation of the wireless device. For example, the control unit (120) may control the electrical / mechanical operation of the wireless device based on the program / code / command / information stored in the memory unit (130). In addition, the control unit (120) may transmit information stored in the memory unit (130) to an external device (e.g., another communication device) via a wireless / wired interface through the communication unit (110), or store information received from an external device (e.g., another communication device) via a wireless / wired interface in the memory unit (130).

[0085] The additional configuration (140) may be configured in various ways depending on the type of the wireless device. For example, the additional configuration (140) may include at least one of a power unit / battery, an input / output (I / O) unit, a driving unit, and a computing unit. Although not limited thereto, the wireless device may be implemented in the form of a robot (Fig. 1, 100a), a vehicle (Fig. 1, 100b-1, 100b-2), an XR device (Fig. 1, 100c), a portable device (Fig. 1, 100d), a home appliance (Fig. 1, 100e), an IoT device (Fig. 1, 100f), a UE for digital broadcasting, a hologram device, a public safety device, an MTC device, a medical device, a fintech device (or a financial device), a security device, a climate / environmental device, an AI server / device (Fig. 1, 400), a BS (Fig. 1, 200), a network node, etc. Wireless devices may be mobile or stationary depending on the use / service.

[0086] In FIG. 3, various elements, components, units / parts, and / or modules within the wireless device (100, 200) may be interconnected entirely via a wired interface, or at least some may be wirelessly connected via a communication unit (110). For example, within the wireless device (100, 200), the control unit (120) and the communication unit (110) may be wired, and the control unit (120) and a first unit (e.g., 130, 140) may be wirelessly connected via the communication unit (110). In addition, each element, component, unit / part, and / or module within the wireless device (100, 200) may further include one or more elements. For example, the control unit (120) may be configured with one or more processor sets. For example, the control unit (120) may be configured as a set of a communication control processor, an application processor, an electronic control unit (ECU), a graphics processing processor, a memory control processor, etc. As another example, the memory unit (130) may be configured as a random access memory (RAM), a dynamic RAM (DRAM), a read only memory (ROM), a flash memory, a volatile memory, a non-volatile memory, and / or a combination thereof.

[0087] In this specification, at least one memory (e.g., 104 or 204) can store instructions or programs that, when executed, cause at least one processor operably connected to the at least one memory to perform operations according to some embodiments or implementations of the present specification.

[0088] In this specification, a computer-readable (non-volatile) storage medium can store at least one instruction or computer program, which when executed by at least one processor causes the at least one processor to perform operations according to some embodiments or implementations of this specification.

[0089] In this specification, a processing device or apparatus may include at least one processor and at least one computer memory operatively connected to the at least one processor. The at least one computer memory may store instructions or programs, which, when executed, cause at least one processor operatively connected to the at least one memory to perform operations according to some embodiments or implementations of the present specification.

[0090] In this specification, a computer program may be stored in at least one computer-readable (non-volatile) storage medium and may include program code that, when executed, performs operations according to some implementations of the present specification or causes at least one processor to perform operations according to some implementations of the present specification. The computer program may be provided in the form of a computer program product. The computer program product may include at least one computer-readable (non-volatile) storage medium.

[0091] A communications device of the present specification comprises at least one processor; and at least one computer memory operably connected to said at least one processor and storing instructions that, when executed, cause said at least one processor to perform operations according to the example(s) of the present specification described below.

[0092] Figure 4 illustrates an example of a frame structure available in a 3GPP-based wireless communication system.

[0093] The structure of the frame in Fig. 4 is merely an example, and the number of subframes, the number of slots, and the number of symbols in the frame can be varied. In an NR system, OFDM numerology (e.g., subcarrier spacing (SCS)) may be set differently between multiple cells aggregated to a single UE. Accordingly, the (absolute time) duration of a time resource (e.g., a subframe, a slot, or a transmission time interval (TTI)) consisting of the same number of symbols may be set differently between the aggregated cells. Here, the symbol may include an OFDM symbol (or a cyclic prefix - orthogonal frequency division multiplexing (CP-OFDM) symbol), an SC-FDMA symbol (or a discrete Fourier transform-spread-OFDM (DFT-s-OFDM) symbol). In this specification, the terms symbol, OFDM-based symbol, OFDM symbol, CP-OFDM symbol, and DFT-s-OFDM symbols are interchangeable.

[0094] Referring to Figure 4, in the NR system, uplink and downlink transmissions are organized into frames. Each frame is T f = (△f max *N f / 100)*T c = 10 ms duration, divided into two half-frames of 5 ms each. Here, T is the basic time unit for NR. c = 1 / (△fmax *N f ) and △f max = 480*10 3 Hz, and N f =4096. For reference, T is the basic time unit for LTE. s = 1 / (△f ref *N f,ref ) and △f ref = 15*10 3 Hz, and N f,ref =2048. T c Wow T s is a constant κ = T s / T c = 64 relationship. Each half-frame consists of 5 subframes, and the duration of a single subframe (SF) is T sf is 1ms. Subframes are further divided into slots, and the number of slots in a subframe depends on the subcarrier spacing. Each slot consists of 14 or 12 OFDM symbols based on the cyclic prefix. In the normal cyclic prefix (CP), each slot consists of 14 OFDM symbols, and in the case of the extended CP, each slot consists of 12 OFDM symbols. The numerology is exponentially scalable with the subcarrier spacing △f = 2. u *Depends on 15 kHz. The following table shows the subcarrier spacing for regular CP △f = 2. u *Number of OFDM symbols per slot at 15 kHz (N) slot symb ), number of slots per frame (N frame,u slot ) and the number of slots per subframe (N subframe,u slot ) is shown.

[0095]

[0096] The following table shows the subcarrier spacing for extended CP △f = 2.u *Indicates the number of OFDM symbols per slot, the number of slots per frame, and the number of slots per subframe at 15 kHz.

[0097]

[0098] For a subcarrier spacing setting u, slots are n in increasing order within a subframe. u s ∈ {0, ..., nsubframe,u slot - 1} and n in increasing order within the frame u s,f ∈ {0, ..., n frame,u slot - Numbered as 1}.

[0099] A slot contains multiple symbols (e.g., 14 or 12) in the time domain. For each numeral (e.g., subcarrier spacing) and carrier, a common resource block (CRB) N is indicated by higher-layer signaling (e.g., radio resource control (RRC) signaling). start,u grid Starting from,N size,u grid,x *N RB sc Dog subcarriers and N subframe,u symb A resource grid of OFDM symbols is defined, where N size,u grid,x is the number of resource blocks (RBs) in the resource grid, and the subscript x is DL for downlink and UL for uplink. N RB sc is the number of subcarriers per RB, and in 3GPP-based wireless communication systems, N RB scis typically 12. For a given antenna port p, subcarrier spacing configuration u, and transmission direction (DL or UL), there is one resource grid. The carrier bandwidth N for subcarrier spacing configuration u size,u grid is given to the UE by higher layer parameters (e.g., RRC parameters) from the network. Each element in the resource grid for antenna port p and subcarrier spacing configuration u is called a resource element (RE), and one complex symbol can be mapped to each RE. Each RE in the resource grid is uniquely identified by an index k in the frequency domain and an index l indicating the symbol position relative to a reference point in the time domain. In an NR system, an RB is defined by 12 consecutive subcarriers in the frequency domain. In an NR system, RBs can be classified into common resource blocks (CRBs) and physical resource blocks (PRBs). CRBs are numbered upwards from 0 in the frequency domain for the subcarrier spacing configuration u. The center of subcarrier 0 of CRB 0 for the subcarrier spacing configuration u coincides with 'Point A', which is a common reference point for the resource block grids. PRBs for subcarrier spacing u are defined within the bandwidth part (BWP) and range from 0 to N. size,u BWP,i -1, where i is the number of the bandwidth part. Common resource block n u CRB and bandwidth part i within physical resource block n PRB The relationship between the two is as follows: n u PRB = n u CRB +N start,u BWP,i , here N start,u BWP,iis a common resource block (BRB) whose bandwidth part starts relative to CRB 0. A BWP comprises multiple consecutive RBs in the frequency domain. For example, a BWP may be a given numeral u within a BWP i on a given carrier. i A subset of contiguous CRBs defined for a carrier. A carrier may include up to N (e.g., 5) BWPs. A UE may be configured to have one or more BWPs on a given component carrier. Data communication is performed through the activated BWPs, and only a predetermined number (e.g., 1) of BWPs configured for the UE may be activated on the carrier.

[0100] A UE configured with carrier aggregation may be configured to use one or more cells. If the UE is configured to have multiple serving cells, the UE may be configured to have one or more cell groups. The UE may be configured to have multiple cell groups associated with different BSs. Alternatively, the UE may be configured to have multiple cell groups associated with a single BS. Each cell group of the UE consists of one or more serving cells, and each cell group includes a single PUCCH cell configured with PUCCH resources. The PUCCH cell may be a Pcell or an Scell ​​configured as a PUCCH cell among the Scells of the corresponding cell group. Each serving cell of the UE belongs to one of the cell groups of the UE and does not belong to multiple cell groups.

[0101] Figure 5 illustrates a processing process on the transmission side for a transport block (TB).

[0102] To enable the receiver to correct errors encountered in wireless signals over the wireless channel, the transmitter encodes the information it sends using a forward error correction code before transmitting it. The receiver demodulates the received signal and then decodes the error correction code to restore the transmitted information. This decoding process corrects errors in the received signal caused by the wireless channel.

[0103] Data arrives at the coding block in the form of up to two transport blocks per TTI per DL / UL cell. The following coding steps can be applied to each transport block in a DL / UL cell:

[0104] - Add a cyclic redundancy check (CRC) to the transport block;

[0105] - Code block segmentation and code block CRC attachment;

[0106] - Channel coding;

[0107] - Rate matching;

[0108] - Code block concatenation.

[0109] In actual communication systems, for ease of implementation, transport blocks larger than a certain size are divided into several smaller data blocks for encoding. These smaller data blocks are called code blocks. While code blocks typically have the same size, due to the size limitations of the channel encoder's internal interleaver, one code block among multiple code blocks may have a different size. After error-correcting encoding is performed on code blocks of a given interleaver size, interleaving is performed to reduce the impact of burst errors that occur during transmission over a wireless channel. These blocks are then mapped to actual radio resources and transmitted. Since the amount of radio resources used in actual transmission is constant, rate matching must be performed on the encoded code blocks to accommodate this. Typically, rate matching is achieved through puncturing or repetition. For example, if the amount of wireless resources, i.e., the number of transmission bits that can be transmitted by the wireless resources, is M, and the coded bit sequence, i.e., the number of output bits of the encoder, is N, then if M and N are different, rate matching is performed to adjust the length of the coded bit sequence to match M. If M>N, all or part of the bits of the coded bit sequence are repeated so that the length of the rate-matched sequence becomes equal to M. M <N이면, 레이트 매칭된 시퀀스의 길이가 M과 같아지도록, 코딩된 비트 시퀀스의 비트들 중 일부가 펑처링되며, 펑처링된 비트는 전송에서 제외된다.

[0110] That is, in a wireless communication system, the transmitting end encodes data to be transmitted using channel coding having a specific code rate, and then adjusts the code rate of the data to be transmitted through a rate matching process consisting of puncturing and repetition.

[0111] There are various types of error-correcting codes, but the optimal information block sizes for each type of error-correcting code are determined. While many coding schemes are available that offer high capacity information performance at large information block lengths, most of them do not consistently perform well across a wide range of information block lengths and code rates. However, turbo codes, low-density parity check (LDPC) codes, and polar codes have shown promising BLER performance across a wide range of coding rates and code lengths. With the increasing demands for diverse use cases such as enhanced mobile broadband (eMBB), massive IoT, and URLLC, there is a need for coding schemes that offer stronger channel coding efficiency than turbo codes. Furthermore, there is a growing need for increased capacity, i.e., an increase in the maximum number of subscribers that a channel can currently accommodate. Among various error-correcting codes, polar codes are codes that provide a new framework to solve the problems of existing channel codes. They were invented by Arikan of Bikent University (Reference: E. Arikan, "Channel Polarization: A Method for Constructing Capacity-Achieving Codes for Symmetric Binary-Input Memoryless Channels," in IEEE Transactions on Information Theory, vol. 55, no. 7, pp. 3051-3073, July 2009). Polar codes are the first mathematically proven capacity-achieving codes with low encoding and decoding complexity. Polar codes outperform turbo codes at large information block lengths without any error flow. Hereinafter, channel coding using polar codes is referred to as polar coding.

[0112] Polar codes are known as codes that can achieve channel capacity on a given binary discrete memoryless channel. This can only be achieved when the information block size is sufficiently large. In other words, polar codes are codes that can achieve channel capacity by increasing the code size N infinitely. Polar codes have low encoding and decoding complexity and can be successfully decoded. Polar codes are a type of linear block error-correcting code, and recursive multiple concatenation is the basic building block for polar codes and the basis for code construction. The physical transformation of a channel, which converts physical channels into virtual channels, occurs based on recursive multiple concatenation. When multiple channels are multiplied and accumulated, most of the channels become either better or worse. The idea behind polar codes is to utilize good channels. For example, data is transmitted at rate 1 through good channels and at rate 0 through bad channels. That is, through channel polarization, channels move from a normal state to a polarized state.

[0113] Figure 6 is an example of a block diagram for a polar encoder.

[0114] Figure 6(a) illustrates the base module of a polar code, and in particular, it is a diagram illustrating the first-level channel combining for polar coding. In Figure 6(a), W2 represents the entire equivalent channel obtained by combining two binary discrete memoryless channels (B-DMC), W, . Here, u1 and u2 represent binary input source bits, and y1 and y2 represent output coded bits. Channel combining is the process of concatenating B-DMC channels in parallel.

[0115] Figure 6(b) shows the basic matrix F for the basic module, and the binary input source bits u1, u2 to the basic matrix F and the corresponding output x1, x2 have the following relationship.

[0116]

[0117] Channel W2 can achieve a symmetric capacity I(W), which is the highest rate. In B-DMC W, the symmetric capacity is an important parameter, which is used to measure the rate, and is the highest rate at which reliable communication can occur over the channel W. B-DMC can be defined as follows.

[0118]

[0119] It is possible to synthesize or create a second set of N binary input channels from N independent copies of a given B-DMCW, said channels having properties {W N (i) : 1 <= i <= N}. As N increases, some of the channels tend to have capacities close to 1, while the rest tend to have capacities close to 0. This is called channel polarization. In other words, channel polarization uses N independent copies of a given B-DMCW to create a second set of N channels {W N (i) : is a process that generates {1 <= i <= N}, and the channel polarization effect increases as N increases, all symmetric capacity terms {I(W N (i))} tends to be either 0 or 1 except for the vanishing fraction of these indices i. In other words, the idea behind channel polarization in polar codes is to transform N copies (i.e., N transmissions) of a channel with symmetric capacity I(W) (e.g., an additive white Gaussian noise channel) into extreme channels with capacities close to 1 or 0. Among the N channels, the I(W) fraction will be perfect channels and the 1-I(W) fraction will be completely noise channels. Then, information bits are sent only through good channels, and inputs to other channels are frozen to 1 or 0. The amount of channel polarization increases with the block length. Channel polarization consists of two phases: the channel combining phase and the channel splitting phase.

[0120] Figure 7 illustrates the concept of channel combining and channel splitting for channel polarization. As illustrated in Figure 7, N copies of the original channel W are appropriately combined to create a vector channel W. vec After creating and splitting into new polarized channels, for sufficiently large N, the new polarized channels are each divided into channel capacities C(W)=1 and C(W)=0. In this case, since bits passing through a channel with channel capacity C(W)=1 can be transmitted without error, it is better to transmit information bits through a channel with channel capacity C(W)=1, and since bits passing through a channel with channel capacity C(W)=0 cannot transmit information, it is better to transmit frozen bits, which are meaningless bits.

[0121] Referring to Fig. 7(a), copies of the given B-DMCW are combined recursively to obtain W N : X N →Y NVector channel W given by vec This can be printed. Here, N=2 n , and n is an integer greater than or equal to 0. Recursion always starts at level 0, where W1 = W. n = 1 represents the first level of regression, where two independent copies of W1 are combined together. Combining these two copies yields a channel W2: X2 → Y2. The transition probability of this new channel W2 can be expressed by the following equation.

[0122]

[0123] Once the above channel W2 is obtained, a single copy of channel W4 can be obtained by combining two copies of W2. This regression can be expressed by W4: X4→Y4 with the following transition probability.

[0124]

[0125] In Fig. 7(b) G N is a generator matrix of size N. G in Fig. 7(b) N Input to u N 1 and output x N The relationship of 1 is x N 1=u N 1G N can be expressed as . Here x N 1= {x1, ..., x N},u N 1= {u1, ..., u N}. When combining N B-DMCs, each B-DMC can be expressed in a recursive form. That is, G N can be expressed by the following mathematical formula.

[0126]

[0127] Here, ⓧ is the Kronecker product, and N=2 n , F for all n>=1 ⓧn =FⓧF ⓧ(n-1)And, F ⓧ0 = 1.B N is a permutation matrix known as bit-reversal, and B N =R N (I2ⓧB N / 2 ) can be computed recursively. I2 is a 2-dimensional identity matrix, and this recursion is initialized as B2 = I2. R N is a bit-reversal interleaver, with input s N 1= {s1, ..., s N} output x N 1= {s1, s3,..., s N-1 , s2, ..., s N} is used to map. For example, G2 corresponds to the basic matrix F shown in Fig. 6(b). G4 can be expressed as the following matrix.

[0128]

[0129] The bit-reversal interleaver may not be included in the transmission. If the bit-reversal interleaver is not considered, G N = (G2) ⓧn (Here, N=2 n ) can be expressed as (G2) ⓧn is the n-th Kronecker power of matrix G2, where G2 is the same as the elementary matrix F shown in Fig. 6(b).

[0130] The relationship of mathematical expression 5 is illustrated in Fig. 8.

[0131] Figure 8 illustrates N-th level channel combining for polar codes.

[0132] The process of combining N B-DMCWs and then defining an equivalent channel for a specific input is called channel splitting. Channel splitting can be expressed as a channel transition probability, as shown in the following mathematical equation.

[0133]

[0134] Channel polarization has the following characteristics:

[0135] > Conservation: C(W - ) + C(W + ) = 2C(W),

[0136] > Extremization: C(W - ) <= C(W) <= C(W + ).

[0137] After channel combining and channel splitting, the following theorem can be obtained.

[0138] * Theorem: For any B-DMCW, channels {W N (i)} is polarized in the following sense: for any fixed δ∈{0,1}, as N goes to infinity through powers of 2, I(W N (i) )∈(1-δ,1], the fraction of indices i∈{1,...,N} goes to I(W), and I(W N (i) )∈[0,δ) goes to 1-I(W). Therefore, if N→∞, the channels are either completely noisy or are noise-freely polarized, and these channels are known exactly at the transmitter. Therefore, we can fix the bad channels and transmit the unmodulated bits on the good channels.

[0139] That is, when the size N of the polar code becomes infinite, the channel becomes either noisy or noiseless for a specific input bit. This means that the capacity of the equivalent channel for a specific input bit is distinguished as 0 or I(W).

[0140] The input of a polar encoder is divided into bit channels, to which information data is mapped, and bit channels, to which it is not. As previously explained, according to polar code theory, as the number of polar codewords approaches infinity, the input bit channels can be divided into noise-free and noise channels. Therefore, channel capacity can be achieved by assigning information to noise-free bit channels. However, in practice, it is impossible to construct infinitely long codewords. Therefore, the reliability of the input bit channels is calculated and data bits are assigned in that order. In this specification, the bit channels to which data bits are assigned are referred to as "good bit channels." A good bit channel can be considered the input bit channel to which data bits are mapped. The bit channels to which data is not mapped are referred to as "frozen bit channels," and encoding is performed by inputting a known value (e.g., 0) into the frozen bit channels. Any value known to the transmitter and receiver can be mapped to the frozen bit channels. Information about the good bit channels can be utilized when performing puncturing or repetition. For example, codeword bit (i.e., output bit) positions corresponding to input bit positions that are not allocated to information bits may be punctured.

[0141] The decoding method of polar codes is the successive cancellation (SC) decoding method. The SC decoding method calculates the likelihood ratio (LLR) for the input bits by obtaining the channel transition probability. At this time, the channel transition probability can be calculated recursively by taking advantage of the recursive nature of the channel combining and channel splitting processes. Therefore, the LLR value can also be calculated recursively. First, the input bit u i Channel transition probability W for N (i) (y1 N ,u1 i-1 |u1) can be obtained as follows. u1 i is separated into odd index and even index, u 1,o i , u 1,e i It can be expressed as follows. The channel transition probability can be expressed as the following mathematical formulas.

[0142]

[0143]

[0144] The polar decoder retrieves information, and uses the known values ​​(e.g., received bits, frozen bits, etc.) of the polar code. N 1's estimate u^ N Generates 1. LLR is defined as follows.

[0145]

[0146] LLR can be calculated recursively as follows:

[0147]

[0148] The recursive calculation of LLRs is LLR L (1) 1(yi ) = W(y i |0) / W(y i |1) is traced back to code length 1. L (1) 1(y i ) is soft information observed from the channel.

[0149] The complexity of the polar encoder and SC decoder depends on the length N of the polar code, and is known to have a complexity of O(NlogN). Assuming K input bits in a polar code of length N, the coding rate becomes N / K. The generator matrix of the polar encoder with a data payload size N is G N If so, the encoded bit is x N 1=u N 1G N It can be expressed as, u N K bits in 1 correspond to payload bits and G corresponds to the payload bits. N Let the row index be i, and the remaining NK bits correspond to G N Let the row index of F be . The minimum distance of such polar code is d min (C) = min i∈I 2 wt(i) can be given as, where wt(i) is the number of ones in the binary expansion of i, and i=0,1,...,N-1.

[0150] SC List (SCL) decoding is an extension of the basic SC decoder. In this type of decoder, L decoding paths are considered simultaneously at each stage of decoding, where L is an integer. In other words, for polar codes, the List-L decoding algorithm traces L paths simultaneously during the decoding process.

[0151] Figure 9 illustrates the evolution of decoding paths during List-L decoding. For convenience of explanation, we assume that the number of bits to be determined is n and that not all bits are frozen. If the list size L = 4, each level has at most 4 nodes with paths that continue downward. Discontinuous paths are indicated by dotted lines in Figure 9. Referring to Figure 9, the evolution of decoding paths during List-L decoding is explained as follows. i) List-L decoding begins, and the first unfrozen bit can be either 0 or 1. ii) List-L decoding continues. The second unfrozen bits can be either 0 or 1. Since the number of paths is not more than L = 4, there is no need to prune yet. iii) Considering all options for the first bit (i.e., the bits of the first level), the second bit (i.e., the bits of the second level) and the third bit (i.e., the bits of the third level) results in 8 decoding paths, which is too many since L=4. iv) Pruning the 8 decoding paths into L=4 promising paths. v) Continue the 4 active paths by considering the 2 options for the fourth unfrozen bit. In this case, the number of paths doubles to 8, which is too many since L=4. vi) Again, pruning into L=4 best paths. In the example of Fig. 9, four candidate codewords 0100, 0110, 0111 and 1111 are obtained, and one of them is determined as the codeword most similar to the original codeword. As in a general decoding process, for example, during a pruning process or a process of determining a final codeword, the path with the largest sum of the absolute values ​​of the LLRs can be selected as the survival path.If a CRC is present, a survival path may be selected through the CRC.

[0152] Meanwhile, CRC-aided SCL decoding is SCL decoding using CRC, which improves the performance of polar codes. CRC is the most widely used technique for error detection and error correction in the fields of information theory and coding. For example, if the input block to an error-correcting encoder is K bits, the length of the information bits is k, and the length of the CRC sequence is m bits, then K = k + m. The CRC bits are part of the source bits for the error-correcting code, and if the size of the channel code used for encoding is N, the code rate R is defined as R = K / N. CRC-aided SCL decoding aims to detect error-free paths by checking a cyclic redundancy check (CRC) code for each path at a receiver. The SCL decoder outputs candidate sequences to a CRC detector, which feeds back the check result to assist in codeword determination.

[0153] SCL decoding, or CRC-assisted SCL decoding, is more complex than the SC algorithm but offers superior decoding performance. For more details on the List-L decoding algorithm for polar codes, see I. Tal and A. Vardy, "List decoding of polar codes," in Proc. IEEE Int. Symp. Inf. Theory, pp. 1-5, July 2011.

[0154] Figure 10 is a diagram illustrating the concept of selecting the location(s) to which information bit(s) are to be allocated in a polar code.

[0155] In the example of Fig. 10, it is assumed that the size of the mother code is N=8, that is, the size of the polar code is N=8, and the code rate is 1 / 2.

[0156] C(W) in Fig. 10i ) is channel W i As the capacity of the polar code, it corresponds to the reliability of the channels that the input bits of the polar code will experience. If the channel capacities corresponding to the input bit positions of the polar code are as shown in FIG. 10, the reliability of the input bit positions can be ranked as shown in FIG. 10. In this case, in order to transmit data at a code rate of 1 / 2, the transmitting device allocates the four bits that make up the data to four input bit positions with high channel capacities among the eight input bit positions of the polar code (i.e., the input bit positions indicated as u4, u6, u7, and u8 among the input bit positions u1 to u8 in FIG. 10), and freezes the remaining input bit positions. The generator matrix G8 corresponding to the polar code of FIG. 10 is as follows. The generator matrix G8 is (G2) ⓧn can be obtained based on .

[0157]

[0158] The input bit positions indicated as u1 to u8 in Fig. 10 correspond one-to-one to the rows from the most significant row to the least significant row of G8. Referring to Fig. 10, it can be seen that the input bit corresponding to u8 affects all output coded bits. On the other hand, it can be seen that the input bit corresponding to u1 affects only y1 among the output coded bits. Referring to Equation 12, when the binary input source bits u1 to u8 are multiplied by G8, the row that causes the corresponding input bit to appear in all output bits is the least significant row [1, 1, 1, 1, 1, 1, 1, 1], which is a row of G8 in which all elements are 1. On the other hand, a row that causes the corresponding binary-input source bit to appear in only one output bit is a row of G8 in which one element is 1, i.e., a row weight is 1, [1, 0, 0, 0, 0, 0, 0, 0, 0]. Similarly, a row with a row weight of 2 can be said to reflect the input bit corresponding to the row in two output bits. Referring to FIG. 10 and mathematical expression 12, u1 to u8 correspond one-to-one to the rows of G8, and bit indices can be assigned to the input positions of u1 to u8, i.e., the rows of G8, to distinguish the input positions.

[0159] In polar code, G N It can be assumed that for the N input bits of the row, bit indices are sequentially assigned from bit index 0 to N-1, starting from the top row with the smallest row weight. For example, referring to Fig. 10, bit index 0 is assigned to the input position of u1, i.e., the first row of G8, and bit index 7 is assigned to the input position of u8, i.e., the last row of G8. However, since the bit indices are used to indicate the input positions of the polar code, they can be assigned differently. For example, bit indices 0 to N-1 can be assigned, starting from the bottom row with the largest row weight.

[0160] For the output bit index, as illustrated in Fig. 10 and Equation 12, G N It can be assumed that among the columns, the bit indices are assigned from 0 to N-1, or from 1 to N, from the first column with the largest column weight to the last column with the smallest column weight.

[0161] In polar codes, setting information bits and frozen bits is one of the most important factors in the configuration and performance of the polar code. In other words, determining the rank of input bit positions can be said to be an important factor in the performance and configuration of the polar code. For polar codes, bit indices can distinguish input or output positions of the polar code. For polar codes, a sequence obtained by listing bit positions in ascending or descending order of reliability is called a bit index sequence or polar sequence. In other words, the bit index sequence indicates the reliability of the input or output bit positions of the polar code in ascending or descending order. A transmitting device inputs information bits to input bits with high reliability based on the input bit index sequence and performs encoding using a polar code, and a receiving device can identify input positions to which information bits are assigned or input positions to which frozen bits are assigned using the same or corresponding input bit index sequence. That is, the receiving device can perform polar decoding using the same or corresponding input bit index sequence as the input bit index sequence used by the transmitting device and the corresponding polar code. For the polar code, the input bit index sequence can be assumed to be predetermined so that information bit(s) can be assigned to input bit position(s) with high reliability. In this specification, the input bit index sequence is also referred to as a polar sequence.

[0162] Figure 11 illustrates puncturing and information bit allocation for a polar code. In Figure 11, F represents a frozen bit, D represents an information bit, and 0 represents a skipping bit.

[0163] Depending on the index or position of the punctured bit among the coded bits, there may be cases where the information bits are changed to frozen bits. For example, if the output coded bits for the mother code with N=8 should be punctured in the order of Y8, Y7, Y6, Y4, Y5, Y3, Y2, Y1, and if the target code rate is 1 / 2, as illustrated in FIG. 9, Y8, Y7, Y6, and Y4 are punctured, and U8, U7, U6, and U4, which are only connected to Y8, Y7, Y6, and Y4, are frozen to 0, and these input bits are not transmitted. The input bits that are changed to frozen bits by puncturing of the coded bits are called skipping bits or shortening bits, and the corresponding input positions are called skipping positions or shortening positions. Shortening is a rate matching method that maintains the size of the input information (i.e., the size of the information block) and inserts known bits into the input bit positions associated with the desired output bit positions. Generator matrix G N Shortening is possible starting from the input corresponding to the column with column weight 1 in the matrix, and after removing the columns and rows with column weight 1, the input corresponding to the column with column weight 1 in the remaining matrix can be shortened next. To prevent all the information bits from being punctured, the information bits that should have been assigned to the information bit positions can be reallocated in order of high confidence within the frozen bit position set.

[0164] For polar codes, decoding is typically performed in the following order:

[0165] > 1. Bit(s) with low reliability are restored first. Although it varies depending on the structure of the decoder, since the smaller the input bit index (hereinafter referred to as the encoder input bit index or bit index) in the encoder, the lower the reliability, so decoding is generally performed sequentially starting from the smaller encoder input bit index.

[0166] > 2. If there is known bit information about the restored bit, the known bit is used together with the restored bit, or step 1 is omitted and the known bit for a specific input bit position is used directly to restore the information bit, which is an unknown bit. The information bit may be a source information bit (e.g., a bit of a transport block) or a CRC bit.

[0167] As explained above, through the process of channel combining and channel splitting, the equivalent channel is divided into a noisy channel and a noise-free channel, and the data payload must be transmitted through the noise-free channel. In other words, the data payload must be transmitted through the noise-free equivalent channel to obtain the desired performance. At this time, the noise-free equivalent channel is the value of the equivalent channel for each input bit. can be determined by obtaining Z(W). Z(W) is called the Battacharyya parameter and can be a value corresponding to an upper bound of the error probability when performing a maximum a posteriori probability (MAP) decision for transmitting binary input 0 or 1. Therefore, the transmitter can obtain the value Z(W) and select equivalent channel(s) in ascending order (e.g., small to large) of the value Z(W) to transmit the data payload. Z(W) can be obtained by the following formula for a binary erasure channel (BEC).

[0168]

[0169] For example, when the size of the code block of the BEC channel is 8 with a binary probability of 0.5, the value of Z(W) is calculated using Equation 11 as follows: Z(W) = {1.00, 0.68, 0.81, 0.12, 0.88, 0.19, 0.32, 0.00}. Therefore, when the size of the data payload is 2, the data payload can be transmitted through the equivalent channel 8 with the value Z(W) = 0.00 and the equivalent channel 4 with the value Z(W) = 0.12.

[0170] As mentioned above, since the reliability is different depending on the input positions in the polar encoder, the transmitter can perform encoding by assigning the data block (i.e., the information block before encoding) to the bit channel(s) in order of reliability according to the size of the data block, and setting all the rest to frozen (e.g., value '0'). For example, if the mother code size of the polar encoder (i.e., the maximum size of the code block that the polar encoder can encode) is N, and the size of the data block input to the polar encoder is K, the bits of the data block are arranged in order of reliability on the K bit channels, and the NK bit channel(s) are set to 0 to perform polar encoding.

[0171] The following shows the polar sequences used in NR systems (refer to the polar sequences defined in 3GPP TS 38.212 Rel-15).

[0172] Polar Sequence

[0173]

[0174]

[0175]

[0176]

[0177] The table above shows the polar sequence Q0 Nmax-1 and its corresponding reliability W(Q i Nmax ), and in the table above, W is W(Q i Nmax ) means, and I is Q i Nmax That is, the polar sequence Q0 Nmax-1 = {Q0 Nmax ,Q1 Nmax ,...,Q Nmax-1 Nmax} is given by the table above, where 0 <=Q i Nmax<= Nmax-1 represents the bit index (i.e., bit channel index) before polar encoding for i=0,1,...,Nmax-1, and Nmax=1024 in 3GPP TS 38.212 Rel-15. The polar sequence Q0 Nmax-1 is the ascending order of reliability W(Q0 Nmax ) <W(Q1 Nmax )<... <W(Q Nmax-1 Nmax ), and W(Q i Nmax ) is the bit index Q i Nmax Indicates the reliability of the bit index Q. For example, referring to the table above, the bit index Q i Nmax =4 reliability W(Q i Nmax )=3 is bit index Q i Nmax =3 reliability W(Q i Nmax )=7. In other words, the table above can be said to be a list of bit indices 0 to 1023 representing each of the 1024 input positions of the polar code with Nmax=1024 in ascending order of reliability.

[0178] For any information block encoded to N bits, the same polar sequence Q0 N-1 = {Q0 N ,Q1 N ,Q2 N ,...,Q N-1 N} is used. The above polar sequence Q0 N-1 is the reliability W(Q0 N ) <W(Q1 N ) <W(Q2 N )<... <W(Q N-1 N ) are ordered in ascending order of values ​​less than N. i Nmax with, polar sequence Q0 Nmax-1is a subset of . For example, if N=8, the polar sequence Q0 7 Silver polar sequence Q0 Nmax-1 Among the elements of Q i Nmax <8 elements, Q i Nmax <8 elements have reliability W(0) <W(1)<W(2)<W(4)<W(3)<W(5)<W(6)의 오름차순으로 정렬(order)된다.

[0179] For example, Table 3 shows the input bit positions for an information block of size K=10 from a polar sequence with N=512 to a polar code.

[0180]

[0181] Table 3 shows the 10 elements for K=10 among the elements of the polar sequence with N=512, sorted in ascending order of reliability. Referring to the <Polar sequence> table mentioned above, I(=Q) smaller than N=512 i Nmax ) values, the top 10 confidence levels W(Q) i Nmax ) is {479, 495, 503, 505, 506, 507, 508, 509, 510, 511}, and if {479, 495, 503, 505, 506, 507, 508, 509, 510, 511} are sorted in ascending order of their reliability W, a set of bit indices for K=10 in the polar sequence with N=512 as exemplified in Table 3, {505, 506, 479, 508, 495, 503, 507, 509, 510, 511} can be obtained.

[0182] The bit sequence input to the channel coding is c0,c1,c2,c3,...,c K-1 If we denote it as d0,d1,d2,d3,...,d after encoding the above bits N-1 is represented by where K is the number of bits to be encoded, and N=2 n is. N=2 nThe value of n can be determined, for example, by the following table.

[0183]

[0184] In Table 4, n max may be a predetermined value depending on the type of channel or control information and / or the number of information bits input to the channel coding block. For example, n for BCH max is 9, n for downlink control information max is 9, n for uplink control information max can be predetermined as 10.

[0185] In Table 4, E is the rate matching output sequence length. The rate matching output sequence length E may be a predetermined value depending on the type of channel, the type of control information, the amount of resources to which the channel or control information is mapped, and / or the number of code blocks used for transmitting the control information. For example, the rate matching output sequence length E for BCH=864, the rate matching output sequence length E for downlink control information=864, and the rate matching output sequence length E for uplink control information may be a predetermined value based on the number of OFDM symbols carrying UCI, the number of resource blocks, a spreading factor, the number of code blocks for UCI, and / or the UCI type included in the UCI payload (e.g., HARQ-ACK, scheduling request (SR), channel state information (CSI)).

[0186] For any information block encoded to N bits, the same polar sequence Q0 N-1 = {Q0 N ,Q1 N ,Q2N ,...,Q N-1 N} is used. The above polar sequence Q0 N-1 is the reliability W(Q0 N ) <W(Q1 N ) <W(Q2 N )<... <W(Q N-1 N ) are ordered in ascending order of values ​​less than N. i Nmax with, polar sequence Q0 Nmax-1 is a subset of .

[0187] In NR systems, parity check bits are generated to improve performance (e.g., BLER) when using polar codes under certain conditions, for example, when 18 <= polar code information size <= 25. Here, the polar code information size K is the number of information bits encoded through polar coding. For example, the sum of the code block + code block CRC bit(s) can be the polar code information size.

[0188] Figure 12 illustrates a method for generating parity check bit(s) used in polar codes.

[0189] In some implementations, a PC polar code, which is a polar code that places parity check (PC) bit(s) generated using a portion of a data block (i.e., an information block) at the input of a polar encoder, may be used. In the NR standard published so far, the PC polar code can be used when the data block size K is 18 <= K <= 25, the number of PC bits is 3, and it can be generated using a 5-bit transition register as shown in FIG. 12. In FIG. 12, the 5-bit transition registers, y[0],...,[4], are all initialized to 0. That is, the PC bit(s) are generated by placing a parity check bit(s) in the data block [u0, u1, u2,..., u N-1] can be generated as follows:

[0190] > Cyclic left shift the register,

[0191] > u i If u is an information bit, then y[0] =(u i Set to XOR y[0],

[0192] > u i If you have a PC, u i = set to y[0].

[0193] The PC bit(s) generated in this way are assigned to the input bit channels of the polar encoder (i.e., bit indices of the polar code) as follows: where n when E-K+3>192 wm PC =1, and when E-K+3<=192, n wm PC =0. Here, the set of bit indices for the PC bits is Q N PC , and is indicated by Q N PC A set of bit indices for different parity check bits in Q N PC_wm If expressed as , set Q N PC Size of |Q N PC |=n PC And set Q N PC_wm Size of |Q N PC_wm |=n wm PC is. In the NR standard (e.g., 3GPP TS 38.212 Rel-15) Q N PC Wow Q N PC_wm The method of obtaining is as follows. For a bit index j where j=0,1,...,N-1,G N The j-th row of g j Marked as g jThe row weight (weight) of w(g) j ), where w(g j ) is g j The number of my things (one) (n) PC - n wm PC ) parity check bits My (n PC - n wm PC ) are placed in the least reliable bit indices of n. wm PC There are different parity check bits are placed at the bit indices of my minimum row weight, where Is my Displays the most reliable bit indices of the dog. There are n bit indices with the same minimum row weight within wm PC If there are more than dogs, the above n wm PC The other parity check bits are The highest reliability and minimum row weight of n wm PC The dog bits are placed in the indexes.

[0194] Input to Polo encoding u= [u0u1u2... u N-1 ] can be generated according to the following table.

[0195]

[0196] Output after encoding d=[d0d1d2d3... d N-1 ] is d=uG N , and the encoding is performed in GF(2).

[0197] FIG. 13 is a diagram illustrating a rate matching process according to some implementations of this specification.

[0198] In some implementations, rate matching is performed after channel coding. In the NR standard, rate matching for polar codes is defined per code block and consists of sub-block interleaving, bit selection, and bit interleaving. In this specification, the input bit sequence to rate matching is d0, d1, d2, d3, ..., d N-1 , after rate matching, the output bit sequence is f0,f1,f2,f3,...,f E-1 can be expressed as . The bits input to the sub-block interleaver are coded bits d0, d1, d2, d3, ..., d N-1 is. The above coded bits d0,d1,d2,d3,...,d N-1 can be divided into 32 sub-blocks. The bits output from the sub-block interleaver are y0,y1,y2,y3,...,y N-1 It can be denotated as and can be generated as follows: for n = to N-1: i = floor(32n / N); J(n) = P(i)*(N / 32) + mod(n,N / 32); y n = d J(n) . Here, the sub-block interleaver pattern P(i) is given by the following table.

[0199]

[0200] G N = (G2) ⓧn is the n-th Kronecker power of matrix G2, where N=2 n ,G2 is the same as the basic matrix F shown in Fig. 6(b).

[0201] In some implementations, the bit sequence y0,y1,y2,y3,...,y after the sub-block interleaver N-1is written to a circular buffer of length N. If the rate matching output sequence length is E, the bit selection output bit sequence e k , k=0,1,2, ...,E-1 can be generated as follows.

[0202]

[0203] Puncturing or shortening is a technique for not transmitting some of the encoded bits when the resources allocated for transmission are not large enough to accommodate all of the encoded bits. Repetition is a technique for transmitting some of the encoded bits repeatedly when the resources allocated for transmission are large enough to accommodate more than the encoded bits.

[0204] Depending on the type of transport channel or control information, or depending on the channel coding method, the bit sequence e0,e1,e2,...,e E-1 is a bit sequence f0,f1,f2,f3,...,f E-1 can be interleaved. For example, for polar coding for UCI, the bit sequence e0,e1,e2,..., e E-1 is a bit sequence f0,f1,f2,f3,...,f E-1 can be interleaved as follows:

[0205]

[0206] Polar sequence Q0 N-1 a set of bit indices Denote by (denote) and polar sequence Q0 N-1 the set of other bit indices are respectively indicated as , where , and n PC is the number of parity check bits. In this specification, |S| is the number of elements in set S. and is given as follows.

[0207]

[0208] In this specification, A\B means the difference of set B from set A, i.e., AB, which is the set of all elements of set A that do not belong to set B.

[0209] To improve the performance of polar encoding / decoding, polarization-adjusted convolution (PAC) codes, which employ a convolutional transform as a precoding step before the polar transform, are being considered. PAC codes can improve the error-correction performance of polar codes by concatenating the convolutional transform with the polar transform.

[0210] Figure 14 illustrates the structure of one of the encoder / decoders for PAC codes available in some implementations of the present specification.

[0211] As with typical polar codes, the overall performance of a PAC code depends on which locations within the input vector v to the convolution carry information and which locations are frozen to zero. This selection of frozen locations within v is called rate profiling.

[0212] Referring to Fig. 14, rate profiling in a PAC code classifies user data into an information set and a frozen set. For example, assuming a PAC code with a mother code size N=8, if the user data size K=4, then d= [d0, d1, d2, d3]. At this time, assuming the information / frozen bit allocation method according to the current NR standard, since the user data of size K is allocated to K bit channels in the order of bit channels 7, 6, 5, 3, 4, 2, 1, 0, the information set A={7, 6, 5, 3}, and the frozen set A c ={4, 2, 1, 0}. The above rate profiling maps user data d= [d0, d1, d2, d3] to v=[v0, ..., v7], where v i is the value mapped to bit channel i. Therefore, it can be expressed as v = [0, 0, 0, d1, 0, d2, d3, d4]. The convolution operation is an impulse response c = (c0, ..., c m ), where c0≠0 and c m ≠0. The parameter m+1 is called the constraint length of the convolution. m is the size of the memory used for the convolution, e.g., the number of shift registers. In some implementations of this specification, the convolution precoder may be configured to include m memory(s) (e.g., shift register(s)). Given an impulse response c=(c0, ..., c m ) is the input-output relationship for convolution. , where i=0,...,N-1, and j>=i, v i-j =0. If this is expressed as a matrix, it can be expressed in the form of an upper triangular matrix as follows.

[0213]

[0214] Polar deformation P of mother code size N N represents a polar code kernel matrix as in mathematical expression 5. The PAC codeword x can be expressed as follows.

[0215]

[0216] Decoding methods for PAC codes can be broadly divided into two types. The first method interprets the convolution operation (i.e., convolution precoding) and polar transformation as convolution encoding with a constraint length L, and performs sequential decoding. Sequential decoding is a high-order (heuristic) decoding, and various algorithms are known, with Fano decoding being an efficient method (see E. Arikan, "From sequential decoding to channel polarization and back again").

[0217] A brief description of Fano decoding for a convolutional encoder with the number of input bits λ, the number of output bits v, and constraint length L is as follows. When implementing decoding, the path metric can be expressed as follows.

[0218]

[0219] Here, l is the depth of the code tree, , Q(k) is the relative frequency of k. At this time, the update of the path depth can be expressed as follows.

[0220]

[0221] The following table illustrates the Fano decoding algorithm.

[0222]

[0223] In Table 10, * means adding jδ to the threshold, where j is chosen so that: . In Table 10 means moving forward to the first node stemming from the current node. In Table 10, means moving laterally to the next node that is different from the current node only in the last branch. If the current node is the last, move backward.

[0224] The second method interprets the polar code as having T precoding applied, and performs the SC or SCL decoding described above. In this case, SC / SCL decoding of PAC codes requires an SC / SCL decoder for the existing polar code, and the storage of memory states after performing convolutional re-encoding during the decoding process. This is because in PAC codes, the input of the polar transform is the output of the convolutional encoder.

[0225] An example of an SCL decoding algorithm for a PAC code can be represented as shown in the following table (see: M. Rowshan, A. Burg, and E. Viterbo, "Polarization-adjusted convolutional (PAC) codes: sequential decoding vs list decoding," IEEE Tr. VT., vol. 70, no. 2, 2021).

[0226]

[0227] A PAC code, such as that shown in Fig. 14, can be further generalized as a precoding in which the convolution operation matrix T is in the form of an upper triangular matrix. It is known that such a precoded polar code can have improved minimum distance characteristics compared to a polar code that is not precoded.

[0228] Figure 15 illustrates a codeword tree to illustrate the concept of sequential decoding. In the example of Figure 15, it is assumed that the input data is 100, the codeword resulting from encoding the input data 100 is 111 010 100, and the corresponding received codeword at the receiver is 001 010 100.

[0229] Referring to Fig. 15, sequential decoding can be performed from left to right of the codeword tree. Referring to Fig. 15, for example, the decoder can perform decoding in the direction corresponding to 0 because 000 has a small (Hamming) distance value among the possible codewords 111 and 000 for the first codeword part 001 of the received codeword 001 010 100. The decoder can continue decoding in the direction of 0 corresponding to the input of 000 by comparing the second codeword part 010 of the received codeword 001 010 100 with 111, 000 again, and perform decoding by comparing the third codeword part 100 with 111, 000 again to select 0, thereby obtaining the final value of 000. However, in this case, an error occurred because the received codeword was decoded as 000, which is a different value from the input data 100. Therefore, by creating a specific condition to allow the decoder to perform decoding again at the upper node, decoding without error can be performed. In the example above, after decoding the first codeword part 001, if it branches to the upper node and performs decoding in the direction corresponding to 111 instead of 000, the decoding result of 100 can be obtained.

[0230] <Incremental redundancy (IR) HARQ>

[0231] Hybrid automatic request (HARQ) is a technology that combines forward error correction (FEC) and automatic repeat request (ARQ). For example, a transmitter transmits all or part of the encoded bits using FEC, and a receiver detects errors in the received data and transmits a HARQ-ACK signal indicating an acknowledgment (ARQ) or negative ARQ (NACK) of the received data to the transmitter. If the receiver determines that the received data is error-free or below a certain threshold, the transmitter transmits new data. However, if the received data contains errors, the transmitter retransmits the corresponding data block. The receiver combines the retransmitted data block with previously transmitted data blocks and decodes it again to detect errors. This process can be repeated until no errors are detected or until a predetermined number of errors are detected. The combining method for decoding retransmitted data blocks can be divided into the following two methods.

[0232] * Chase combining: For combining at the receiver, the transmitter retransmits coded bits identical to the initially transmitted coded bits. Chase combining can reduce the error probability through power gain during decoding of retransmitted data blocks.

[0233] * Incremental redundancy (IR): For combining at the receiver, the transmitter retransmits coded bits that are not identical to the coded bits that were initially transmitted. For example, the transmitter sends redundancy that was not sent in the initial transmission to the receiver in the retransmission. Since the redundancy that was not sent in the previous transmission is sent in the retransmission, the redundancy of the previous transmission and the redundancy of the current transmission are combined to increase the redundancy, which has the effect of lowering the code rate. In other words, incremental redundancy can reduce the error probability through coding gain when decoding retransmitted data blocks. In general, chase combining corresponds to the case where there is no incremental redundancy among incremental redundancies, so chase combining can be interpreted as a special form of incremental redundancy.

[0234] In the current 3GPP-based wireless systems, polar codes have only been used for channel coding for transport channels with few bits, such as broadcast channels (BCH), DCI, and UCI, or for control information. Therefore, there has been little need to apply HARQ to information blocks to which polar codes have been applied. However, as wireless communication technologies develop and the required services become more diverse, the application of polar code-based channel coding to data channels (e.g., uplink shared channel (UL-SCH), downlink shared channel (DL-SCH), and sidelink shared channel (SL-SCH)) may be considered. If polar code-based channel coding is applied to data in the future, a method to support HARQ for information blocks to which polar code-based channel coding has been applied is required. Below, implementations of this specification to support HARQ for polar codes are described.

[0235] Figure 16 illustrates examples of allocation of information bits to a polar encoder according to some implementations of the present specification. In particular, Figure 16 illustrates allocation of information bits to a polar encoding block for incremental redundancy (IR). In the example of Figure 16, it is assumed that the size of the data block (i.e., the size of the information block in polar encoding) K = 6, the mother code size N = 8 for the initial transmission, and the mother code size N = 16 for the retransmission. In the example of Figure 16, reliability according to the Battacharyya parameter is assumed. In Figure 16(a), a bit index with a larger reliability order value is assumed to be a reliable bit index. For example, a bit index with a reliability order value of 1 is assumed to be more reliable than a bit index with a reliability order value of 0. In Fig. 16(b), the values ​​in the input nodes are the values ​​calculated from the Battacharyya parameters, and a smaller value indicates higher reliability.

[0236] To support incremental redundancy-based HARQ (hereinafter, IR HARQ) for polar codes, the transmitter may increase the mother code size when performing retransmissions. For example, the transmitter may apply a mother code size of N for the initial transmission and a mother code size of 2N for the retransmission.

[0237] Referring to Fig. 16, in the case of the first transmission, since K = 6, the transmitter performs polar encoding by placing bits c0, c1, c2, c3, c4, and c5 of the data block in the most reliable bit indices 2, 3, 4, 5, 6, and 7 among the bit channel indices 0 to 7 (i.e., bit indices before polar encoding) of the mother code size N = 8. If the receiver determines that there is an error after decoding the initial transmission and requests retransmission, or if the transmitter wants to perform retransmission in case there is an error in the initial transmission, the transmitter performs polar encoding by placing bits c0, c1, c2, c3, c4, and c5 of the data block in the six most reliable bit indices 7, 11, 12, 13, 14, and 15 among bit indices 0 to 15 of mother code size N = 16. However, in order for the transmitter and the receiver to support IR HARQ, they must satisfy the property that the coded bits generated in the initial transmission are included in the coded bits generated in the retransmission. For example, referring to FIGS. 16(a) and 16(b), the information bits c0, c1, c2, c3, c4, and c5 should be placed at the bit indices where the information bits c0, c1, c2, c3, c4, and c5 were placed in the previous transmission, and the information bits c0, c1, c2, c3, c4, and c5 should be placed in the current transmission as well. When the mother code size increases from N to 2N, the polar encoded codeword can be expressed by the following equation.

[0238]

[0239] Here, F is a kernel for polar encoding with mother code size N, and [U2U1] is a data block. In this case, U1F must be the codeword of the first transmission to support IR HARQ. Therefore, referring to FIG. 16, an operation is required in which data corresponding to bit index 7 is also assigned to bit index 10. That is, the same data bits must be arranged and encoded at bit indexes 7 and 10. This copy operation occurs when the mother code size increases during retransmission and the data block size is arranged at the bit indexes of the upper polar encoder. That is, according to the example of FIG. 16, in the case of N = 16, when the data block size is greater than or equal to 5, the information bit is arranged at bit index 7, which is the most reliable bit index among the bit indexes corresponding to the lower polar encoder, and thus a copy operation occurs. Hereinafter, the polar subcodes of small bit indices are referred to as lower polar subcodes, and the polar subcodes of large bit indices are referred to as upper polar subcodes.

[0240] In the example of FIG. 16, the copy operation is described as copying a bit value mapped to a bit index of an upper polar subcode to a bit index of an upper polar subcode. However, it may also be specified that the copy operation is performed from an upper polar subcode to a lower polar subcode. For example, referring to FIG. 16, a transmitter performing a retransmission may place bits c0, c1, c2, c3, c4, and c5 of a data block at bit indices 9 to 15 of the polar code of the retransmission so that the upper polar subcode includes the mapping pattern to the polar code of the previous transmission as it is, and copy bit c0 placed at bit index 10 to bit index 7.

[0241] Pre-freezing due to rate matching

[0242] In some implementations of this specification, if a portion of a codeword is punctured or shortened by general rate matching performed based on a rate-matching output sequence length E, pre-freezing may be performed. Pre-freezing means setting input bit channels as frozen bits for rate matching of puncturing or shortening. The reason for performing pre-freezing can be explained as follows. For example, assuming a mother code size N=8, when input u=(u0,u1,...,u7), codeword d=(d0,d1,...,d7), and polar code generator matrix G of Equation 12, d=uG can be obtained. Puncturing or shortening is the process of not transmitting a specific part of a codeword. Puncturing is a method of not transmitting the bit(s) corresponding to the lower index(es) among the coded bit indices, and shortening is a method of not transmitting the bit(s) corresponding to the higher index(es) among the coded bit indices. For example, for a mother code size of N=8, if 1-bit puncturing is performed, d0 is not transmitted, and if 1-bit shortening is performed, d7 is not transmitted. This is equivalent to generating a codeword using a new generator matrix obtained by removing the first or last column of the generator matrix. In this case, in the case of 1-bit puncturing, since the first row of the new generator matrix becomes all 0, the input bit u0 is not represented in the codeword, so the receiver cannot decode u0. Therefore, the transmitter needs to set u0 as a frozen bit so that it does not allocate information. Meanwhile, in the case of 1-bit shortening, the last row of the new generator matrix becomes all 1s, which interferes with all coded bits. Therefore, setting u7 as a frozen bit to reduce interference can help improve performance. Therefore, when rate matching of puncturing or shortening is performed, it is desirable to freeze specific input bit channels(s).

[0243] Figure 17 illustrates the locations of bit indices of polar codes that are pre-frozen for rate matching according to some implementations of the present specification.

[0244] Referring to Table 9 above, the bit indices to be frozen vary depending on the puncturing / shortening rate matching. Also, the amount of bit indices to be frozen varies depending on the rate matching output size E. For example, referring to Table 9, if K / E is less than or equal to the reference code rate R (7 / 16 in Table 9), rate matching of puncturing in which the front end of the coded bit sequence is not transmitted is performed, and the leading bit indices are pre-frozen as illustrated in Fig. 17(a). Referring to Table 9, if E <= 7 / 16 and E>=3N / 4, bit indices 0 to (ceil(3N / 4 - E / 2) - 1) are pre-frozen, and if E <= 7 / 16 and E<3N / 4, bit indices 0 to (ceil(9N / 16 - E / 4) - 1) are pre-frozen. As another example, referring to Table 9, if K / E is greater than 7 / 16, rate matching of shortening is performed in which the latter half of the coded bit sequence is not transmitted, and the latter bit indices are pre-frozen as illustrated in Fig. 17(b). Referring to Table 9, if E > 7 / 16, bit indices E to N-1 are pre-frozen.

[0245] Thus, according to the current NR standard, when performing rate matching of puncturing or shortening for a polar code, the transmitter assigns frozen bits to a specific information bit channel (i.e., a bit index). This is to improve channel coding performance by avoiding the occurrence of catastrophic errors that occur when the receiver fails to decode the first bit(s) of the information bit sequence, as mentioned above, or by limiting the influence of interference by the last bit(s) of the information bit sequence. Therefore, in order to maintain or improve the performance of channel coding using PAC codes, it is necessary to consider pre-freezing required in the rate matching process. Below, several implementations of this specification for PAC codes that consider pre-freezing are described. In particular, below, several implementations of this specification for a pre-freezing scheme required when performing rate matching in a channel process using PAC codes are described. In addition, below, several implementations of this specification for a precoding matrix that does not require pre-freezing are described. Additionally, some implementations of this specification are described regarding decoding schemes for coded bits using a precoding matrix that does not require pre-freezing.

[0246] <PAC 코드를 위한 사전-프리징>

[0247] For PAC codes, codewords can be generated according to Equation 15. Assuming the same rate matching as the current NR standard (but not sub-block interleaving), the polar transform matrix P of Equation 15 N Codewords can be generated by puncturing the column(s). For example, in the case of rate matching of puncturing, the UE may generate a matrix P N Puncturing is performed on the leading columns from the first column by the amount for rate matching, and in the case of rate matching of shortening, the matrix P NA codeword of a PAC code can be generated by performing puncturing on the last columns by an amount for rate matching starting from the last column.

[0248] For PAC codes, since convolutional precoding is performed, the information bits are spread out by the constraint length of the convolution operation. That is, when rate matching is performed on a number of bits greater than or equal to the constraint length, a pre-freezing operation becomes necessary.

[0249] Figure 18 is a diagram to help understand pre-freezing according to rate matching in PAC code. In the example of Figure 18, it is assumed that the mother code size N = 8 and the constraint length L = 3.

[0250] Referring to Figure 18, when 1-bit or 2-bits of a codeword by a PAC code must be punctured, the matrix P N Even if the first two columns of are punctured, no pre-freezing operation is required because the information corresponding to v0 is expressed in the codeword. However, if 3 bits are punctured from the codeword by the PAC code, a pre-freezing operation must be performed because the information corresponding to v0 is not expressed in the codeword. Therefore, if the modulator code size is N, the rate-matching output size is E, and the constraint length is L, the bit index j that must be pre-frozen by rate matching of puncturing can be expressed as follows.

[0251]

[0252] Referring to Fig. 18, when shortening 1 bit of a codeword by PAC code, the transmitter uses matrix P NThe last column of the codeword is punctured to generate a codeword. At this time, in order to reduce the interference of the signal after the convolution operation, frozen bits must be set in the last three information bit channels. In case of shortening 2 bits of the codeword by the PAC code, the transmitter uses the matrix P N Since the last two columns of the codeword are punctured to generate the codeword, the frozen bits can be set in the last four information bit channels. In other words, in the case of rate matching of shortening, if the length of the shortening, i.e., the number of bits to be shortened, is S, and the constraint length is L, then pre-freezing can be performed for 'S + L - 1' bit indices. Therefore, if the mother code size is N, the rate matching output size is E, and the constraint length is L, the bit index j that is set as a frozen bit by pre-freezing due to rate matching of shortening can be expressed as follows.

[0253]

[0254] In some implementations of this specification, when rate matching for a PAC code, rate matching with shortening may not be supported. In this case, puncturing and repetition are supported. Such rate matching scheme enables robust operation against errors in the downlink control channel (e.g., PDCCH) when applying a PAC code to user data transmission to support HARQ. For example, as shown in Equation 20, when the pre-freezing operation is performed by puncturing / shortening rate matching, the pre-freezing operation must be performed as a function of the rate matching output size E. In such a situation, signaling of rate matching information is required to generate the PAC code for the initial transmission so that the transmitter and receiver can unambiguously determine the position(s) of the bit index(es) to be pre-frozen in the event of a PDCCH error. For example, 2-bit information can be provided to the UE indicating whether the rate matching scheme applied to the information block is puncturing, shortening, or repetition. At this time, if shortening is not supported, the signaling burden can be reduced to 1 bit instead of the 2 bits required to support puncturing / shortening / repetition.

[0255] <PAC 코드를 위한 퍼뮤테이션된 프리코딩 행렬>

[0256] Figure 19 illustrates a block interleaver. Figure 19 illustrates a 3-by-3 block interleaver, but block interleavers of different sizes may be used depending on the size of the object to be interleaved.

[0257] As described above, when rate matching for puncturing / shortening is performed on a PAC code, a pre-freezing operation must be performed. However, if a PDCCH transmission error occurs, signaling of the corresponding information is required because the pre-freezing operation is affected by the rate matching parameter. Rate matching is affected by the channel conditions, modulation and coding scheme (MCS), and resource allocation, which significantly increases signaling overhead. Therefore, it may be desirable to design the PAC code so that the pre-freezing operation is not performed. In some implementations of this specification, shortening rate matching is assumed not to be supported to reduce signaling overhead. According to the NR standard, puncturing rate matching is performed when the code rate is less than or equal to 7 / 16. As mentioned above, the information bits are spread by a length corresponding to the constraint length through the convolution operation. From this, if the transmitter performs interleaving on the output signal vT of the convolution operation so as to place at least 1 bit or more of the signals containing the same information bits at the position corresponding to the index N / 2, the pre-freezing operation by puncturing rate matching does not need to be performed. For example, when the mother code size N = 8 and the constraint length L = 3, if the output vT = u of the precoding passes through the interleaver illustrated in Fig. 19, the output signal z = [z0, z3, z6, z1, z4, z7, z2, z5] can be obtained for the input signal u = [z0, z1, z2, z3, z4, z5, z6, z7].

[0258] Figure 20 illustrates a permutated precoding matrix according to some implementations of the present specification.

[0259] Interleaving the output of precoding can be said to be equivalent to column permutating the precoding matrix as illustrated in Fig. 20. In the case of a permutated convolutional precoding matrix as illustrated in Fig. 20, even if puncturing rate matching is performed, if the code rate is 7 / 16 or lower, the information bits are spread by the convolution operation and interleaving, so that the corresponding information is expressed in the codeword. Therefore, the pre-freezing operation does not need to be performed. For example, when K = 2 and E = 6, 2 bits are punctured by puncturing rate matching, and at this time, the codeword includes information v0 and v1, so the pre-freezing operation does not need to be performed. Generalizing this, if polar encoding is performed after performing row-wise writing / column-wise reading for a block interleaver of size ceil(N / L)-by-L on the output of convolutional precoding, pre-freezing may not be performed.

[0260] Figure 21 illustrates a block interleaver according to some implementations of the present specification. A block interleaver of size ceil(N / L)-by-L applied to the convolutional precoding output can be represented as illustrated in Figure 21. In some implementations, the block interleaver can be located between the convolutional encoder and the polar encoder.

[0261] If shortening is not supported, puncturing is performed from the beginning of the codeword to the rate-matching output size E regardless of the code rate. Therefore, even if a block interleaver with the constraint length L as above is applied, pre-freezing may be required depending on the mother code size N, information size K, and rate-matching output size E. In this case, if the constraint length L is increased according to the mother code size N, the constraint length of the PAC code can be designed so that the pre-freezing operation is not performed. According to the NR standard, the information size that supports polar codes (including PC polar codes) is 21 bits or more. Therefore, when designing a block interleaver, if the number of elements corresponding to the last column of Fig. 21 (i.e., the number of rows with bit values ​​in the last column) is set to 21, the maximum code rate that includes all information bits becomes 21 / 22, so that the pre-freezing operation is not required. In other words, according to the current NR standard, polar codes can be applied to information blocks with a size of 21 bits or more. In this case, the number of coded bits must be greater than the number of information bits, so the number of coded bits must be 22 or more. If the number of elements in the last column of the block interleaver is 21, this means that at least 1 bit remains in each row of the block interleaver. In Fig. 21, since the constraint length L is the number of columns of the block interleaver, this means that at least 1 bit of the information spread by convolution remains in the last row of the block interleaver. Accordingly, all information bits are reflected in the codeword, so that a pre-freezing operation is not required. According to some implementations of the present specification, for example, when the mother code size N is 256, if the constraint length L is set / set to 12, a 22x12 block interleaver can be designed by the mathematical formula of Fig. 21.As another example, if the mother code size N is 512, a 22x24 block interleaver can be designed by the mathematical formula in Fig. 24 by setting / setting the constraint length L to 24. In this case, even if an error occurs in the PDCCH detection of the first transmission, signaling for the mother code size N is required because the transmitter / receiver can obtain the constraint length L based on the information about the mother code size.

[0262] The block interleaving as above is equivalent to the column permutation of the precoding matrix. Since the convolutional characteristics of the permutated convolutional precoding matrix disappear due to the permutation, it may be desirable to modify and apply the aforementioned PAC decoding method. While the receiver can complete decoding by simultaneously performing SC / SCL decoding and deconvolution for a general PAC code without permutation, for a PAC code with permutation, after performing SC / SCL decoding, the signal including the bits spread by convolution for specific information bits can be decoded and then deconvolution can be performed. For example, when permutation of the precoding matrix is ​​performed as a result of block interleaving as illustrated in FIG. 22, decoding is performed on a received signal in the form [u0u3u6u1u4u5u2u7] received by the receiver. v0 can be obtained after SC / SCL decoding of u0, but v1 can be obtained after SC / SCL decoding of u1. That is, deconvolution becomes possible after a delay of the constraint length L. Similarly, v2 can be obtained after SC / SCL decoding of u2. After this, v3, ..., v7 can be obtained through deconvolution because SC / SCL decoding of u3, ..., u7 has been completed. In this way, decoding is possible at the decoder even if a permutation convolution precoding matrix is ​​used.

[0263] Some implementations of this specification can apply PAC codes robustly to PDCCH errors. Consequently, some implementations of this specification can improve the throughput of data communication systems that apply PAC codes.

[0264] Figure 22 illustrates a channel encoding process according to some implementations of the present specification.

[0265] A communications device or encoder may perform operations according to some implementations of the present disclosure in connection with channel encoding. The communications device or encoder may include at least one transceiver; at least one processor; and at least one computer memory operably connected to the at least one processor and storing instructions that, when executed, cause the at least one processor to perform operations according to some implementations of the present disclosure. A processing device for the communications device or encoder may include at least one processor; and at least one computer memory operably connected to the at least one processor and storing instructions that, when executed, cause the at least one processor to perform operations according to some implementations of the present disclosure. A computer-readable (non-volatile) storage medium may store at least one computer program comprising instructions that, when executed by at least one processor, cause the at least one processor to perform operations according to some implementations of the present disclosure. A computer program or computer program product may be recorded on at least one computer-readable (non-volatile) storage medium and may contain instructions that, when executed, cause (at least one processor) to perform operations according to some implementations of the present specification.

[0266] Referring to FIG. 22, a method performed by the communication device, or in the communication device, the encoder, the processing device, the computer-readable (non-volatile) storage medium, and / or the computer program product, the operations may include: applying convolutional precoding with a constraint length L to an information bit sequence with a length N to generate a first bit sequence with a length N (S2203); applying a polar transform with a size N to the first bit sequence to generate a second bit sequence with a length N (S2205); performing rate matching on the second bit sequence to obtain a rate-matched bit sequence with a length E (S2207), where E < N; and transmitting the rate-matched bit sequence. The information bit sequence includes a predetermined value in each of pre-frozen bit indices (S2201). The method or operations may include: determining the pre-frozen bit indices among N bit indices of the information bit sequence. Based on the fact that the rate-matched bit sequence is obtained by excluding bits of the (NE) lowest bit indices from the second bit sequence: and i) based on NE < L, the number of the pre-frozen bit indices is determined to be 0, and ii) based on NE >= L, max(0, NEL) lowest bit indices among the information bit sequence can be determined as the pre-frozen bit indices.

[0267] In some implementations, based on the fact that the rate-matched bit sequence is obtained by excluding bits of the (NE) highest bit indices from the second bit sequence, the ((NE) + L - 1) highest bit indices in the information bit sequence can be determined as the pre-frozen bit indices.

[0268] In some implementations, the rate-matched bit sequence may be obtained by excluding bits of the (NE) lowest bit indices among the second bit sequence based on E / N being less than or equal to a predetermined value.

[0269] In some implementations, the rate-matched bit sequence may be obtained by excluding bits of the (NE) highest bit indices among the second bit sequence based on E / N being greater than a predetermined value.

[0270] In some implementations, applying the convolutional precoding to the information bit sequence comprises: Based on the first bit sequence u N = {u0,...,u N-1}, where c k is the impulse response c=(c0, ..., c m ) is an element of v n is an element of the above information bit sequence, and v when i=0,...,N-1 and j>=i i-j =0, m is the number of transition registers, and the constraint length L = m+1.

[0271] In some implementations, the method or the operations may further comprise: determining the information bit sequence based on a reliability order of the information block, the pre-frozen bit indices, and bit indices of a polar code of size N.

[0272] In some implementations, determining the information bit sequence may include: setting K bits of the information block to K most reliable bit indices among the N bit indices of the information bit sequence, excluding the pre-frozen bit indices; and setting the predetermined value to each of the remaining bit indices.

[0273] Figure 23 illustrates a channel decoding process according to some implementations of the present specification.

[0274] A communications device or decoder may perform operations according to some implementations of the present disclosure in connection with channel decoding. The communications device may include at least one transceiver; at least one processor; and at least one computer memory operably connected to the at least one processor and storing instructions that, when executed, cause the at least one processor to perform operations according to some implementations of the present disclosure. A processing device for the communications device or decoder may include at least one processor; and at least one computer memory operably connected to the at least one processor and storing instructions that, when executed, cause the at least one processor to perform operations according to some implementations of the present disclosure. A computer-readable (non-volatile) storage medium may store at least one computer program comprising instructions that, when executed by at least one processor, cause the at least one processor to perform operations according to some implementations of the present disclosure. A computer program or computer program product may be recorded on at least one computer-readable (non-volatile) storage medium and may contain instructions that, when executed, cause (at least one processor) to perform operations according to some implementations of the present specification.

[0275] Referring to FIG. 23, a method performed by the communication device, or in the communication device, the decoder, the processing device, the computer-readable (non-volatile) storage medium, and / or the computer program product, the operations may include: receiving a rate-matched bit sequence having a length E (S2301); obtaining a second bit sequence having a size N based on the rate-matched bit sequence, where E < N (S2303); obtaining a first bit sequence having a length N based on the second bit sequence and a polar transform having a size N (S2305); and applying an inverse-convolution precoding having a constraint length L to the first bit sequence to obtain an information bit sequence having a length N (S2307). The N bit indices of the information bit sequence may include zero or more pre-frozen bit indices, each having a predetermined value. Based on the fact that the rate-matched bit sequence is obtained by excluding bits of the (NE) lowest bit indices from the second bit sequence, and based on i) NE < L, the number of the pre-frozen bit indices is determined to be 0, and based on ii) NE >= L, max(0, NEL) lowest bit indices among the information bit sequence can be determined as the pre-frozen bit indices.

[0276] In some implementations, based on the fact that the rate-matched bit sequence is obtained by excluding bits of the (NE) highest bit indices from the second bit sequence, the ((NE) + L - 1) highest bit indices in the information bit sequence can be determined as the pre-frozen bit indices.

[0277] In some implementations, the rate-matched bit sequence may be obtained by excluding bits of the (NE) lowest bit indices among the second bit sequence, based on E / N being less than or equal to a predetermined value.

[0278] In some implementations, the rate-matched bit sequence may be obtained by excluding bits of the (NE) highest bit indices among the second bit sequence, based on E / N being greater than a predetermined value.

[0279] In some implementations, applying the convolutional precoding to the information bit sequence comprises: Based on the first bit sequence u N = {u0,...,u N-1}, where c k is the impulse response c=(c0, ..., c m ) is an element of v n is an element of the above information bit sequence, and v when i=0,...,N-1 and j>=i i-j =0, m is the number of transition registers, and the constraint length L = m+1.

[0280] In some implementations, the method or the operations may further comprise: determining the information block based on a reliability order of bit indices of the information bit sequence, a size K of the information block, and a polar code of size N.

[0281] In some implementations, the information block may be determined based on a mapping relationship of the information block to the information block sequence, the mapping relationship including: setting K bits of the information block to K most reliable bit indices among the N bit indices of the information bit sequence, excluding the pre-frozen bit indices; and setting the predetermined value to each of the remaining bit indices.

[0282] As described above, the examples disclosed herein are provided to enable those skilled in the art to implement and practice the present disclosure. While the examples have been described above with reference to the examples of the present disclosure, those skilled in the art will appreciate that various modifications and variations may be made to the examples of the present disclosure. Accordingly, the present disclosure is not intended to be limited to the examples described herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0283] Implementations of this specification may be used in wireless communication systems, base stations, user equipment, or other equipment.

Claims

1. When a communication device transmits an information block in a wireless communication system, Apply convolutional precoding with constraint length L to an information bit sequence of length N to generate a first bit sequence of length N; Applying a polar transform of size N to the first bit sequence to generate a second bit sequence of length N; Perform rate matching on the second bit sequence to obtain a rate-matched bit sequence of length E, where E < N; and comprising transmitting the rate-matched bit sequence, The method comprises: determining pre-frozen bit indices, each of which is set to a predetermined value among N bit indices of the information bit sequence; Based on the above rate-matched bit sequence being obtained by excluding bits of the (NE) lowest bit indices from the second bit sequence, and i) Based on NE < L, the number of pre-frozen bit indices is determined to be 0, ii) Based on NE >= L, the max(0, NEL) lowest bit indices among the information bit sequences are determined as the pre-frozen bit indices. How to transmit information blocks.

2. In paragraph 1, Based on the fact that the rate-matched bit sequence is obtained by excluding bits of the (NE) highest bit indices from the second bit sequence, ((NE) + L - 1) highest bit indices in the information bit sequence are determined as the pre-frozen bit indices. How to transmit information blocks.

3. In paragraph 1, The rate-matched bit sequence is obtained by excluding the bits of the (NE) lowest bit indices among the second bit sequences based on E / N being less than or equal to a predetermined value. How to transmit information blocks.

4. In paragraph 2, The rate-matched bit sequence is obtained by excluding the bits of the (NE) highest bit indices among the second bit sequences based on E / N being greater than a predetermined value. How to transmit information blocks.

5. In paragraph 1, Applying the convolutional precoding to the above information bit sequence is: Based on the first bit sequence u N = {u0,...,u N-1 }, which includes creating Here c k is the impulse response c=(c0, ..., c m ) is an element of v n is an element of the above information bit sequence, and v when i=0,...,N-1 and j>=i i-j =0, m is the number of transition registers, and the constraint length L = m+1. How to transmit information blocks.

6. In paragraph 1, Further comprising determining the information bit sequence based on the reliability order of the information block, the pre-frozen bit indices, and the bit indices of the polar code having a size N. How to transmit information blocks.

7. In paragraph 6, Determining the above information bit sequence: Setting the K bits of the information block to the most reliable K bit indices among the N bit indices of the information bit sequence, excluding the pre-frozen bit indices; and Including setting the predetermined value to each of the remaining bit indices, How to transmit information blocks.

8. When a communication device transmits a block of information in a wireless communication system, At least one transmitter / receiver; at least one processor; and At least one computer memory operably connectable to said at least one processor and storing instructions that, when executed, cause said at least one processor to perform operations, said operations comprising: Apply convolutional precoding with constraint length L to an information bit sequence of length N to generate a first bit sequence of length N; Applying a polar transform of size N to the first bit sequence to generate a second bit sequence of length N; Perform rate matching on the second bit sequence to obtain a rate-matched bit sequence of length E, where E < N; and comprising transmitting the rate-matched bit sequence, The above operations include: determining pre-frozen bit indices, each of which is set to a predetermined value among N bit indices of the information bit sequence, Based on the above rate-matched bit sequence being obtained by excluding bits of the (NE) lowest bit indices from the second bit sequence, and i) Based on NE < L, the number of pre-frozen bit indices is determined to be 0, ii) Based on NE >= L, the max(0, NEL) lowest bit indices among the information bit sequences are determined as the pre-frozen bit indices. Communication device.

9. In a processing device in a wireless communication system, at least one processor; and At least one computer memory operably connectable to said at least one processor and storing instructions that, when executed, cause said at least one processor to perform operations, said operations comprising: Apply convolutional precoding with constraint length L to an information bit sequence of length N to generate a first bit sequence of length N; Applying a polar transform of size N to the first bit sequence to generate a second bit sequence of length N; Perform rate matching on the second bit sequence to obtain a rate-matched bit sequence of length E, where E < N; and comprising transmitting the rate-matched bit sequence, The above operations include: determining pre-frozen bit indices, each of which is set to a predetermined value among N bit indices of the information bit sequence, Based on the above rate-matched bit sequence being obtained by excluding bits of the (NE) lowest bit indices from the second bit sequence, and i) Based on NE < L, the number of pre-frozen bit indices is determined to be 0, ii) Based on NE >= L, the max(0, NEL) lowest bit indices among the information bit sequences are determined as the pre-frozen bit indices. Processing unit.

10. In a computer-readable storage medium, The storage medium stores at least one program code comprising instructions that, when executed, cause at least one processor to perform operations, the operations comprising: Apply convolutional precoding with constraint length L to an information bit sequence of length N to generate a first bit sequence of length N; Applying a polar transform of size N to the first bit sequence to generate a second bit sequence of length N; Perform rate matching on the second bit sequence to obtain a rate-matched bit sequence of length E, where E < N; and comprising transmitting the rate-matched bit sequence, The above operations include: determining pre-frozen bit indices, each of which is set to a predetermined value among N bit indices of the information bit sequence, Based on the above rate-matched bit sequence being obtained by excluding bits of the (NE) lowest bit indices from the second bit sequence, and i) Based on NE < L, the number of pre-frozen bit indices is determined to be 0, ii) Based on NE >= L, the max(0, NEL) lowest bit indices among the information bit sequences are determined as the pre-frozen bit indices. Storage media.

11. When a communication device receives an information block in a wireless communication system, Receive a rate-matched bit sequence of length E; Obtain a second bit sequence of size N based on the above rate-matched bit sequence, where E < N; Obtaining a first bit sequence of length N based on the second bit sequence and a polar transform of size N; and It includes obtaining an information bit sequence of length N by applying inverse convolution precoding with a constraint length L to the first bit sequence, The N bit indices of the above information bit sequence include zero or more pre-frozen bit indices, each having a predetermined value, Based on the above rate-matched bit sequence being obtained by excluding bits of the (NE) lowest bit indices from the second bit sequence, and i) Based on NE < L, the number of pre-frozen bit indices is determined to be 0, ii) Based on NE >= L, the max(0, NEL) lowest bit indices among the information bit sequences are determined as the pre-frozen bit indices. How to receive information blocks.

12. When a communication device receives an information block in a wireless communication system, At least one transmitter / receiver; at least one processor; and At least one computer memory operably connectable to said at least one processor and storing instructions that, when executed, cause said at least one processor to perform operations, said operations comprising: Receive a rate-matched bit sequence of length E; Obtain a second bit sequence of size N based on the above rate-matched bit sequence, where E < N; Obtaining a first bit sequence of length N based on the second bit sequence and a polar transform of size N; and It includes obtaining an information bit sequence of length N by applying inverse convolution precoding with a constraint length L to the first bit sequence, The N bit indices of the above information bit sequence include zero or more pre-frozen bit indices, each having a predetermined value, Based on the above rate-matched bit sequence being obtained by excluding bits of the (NE) lowest bit indices from the second bit sequence, and i) Based on NE < L, the number of pre-frozen bit indices is determined to be 0, ii) Based on NE >= L, the max(0, NEL) lowest bit indices among the information bit sequences are determined as the pre-frozen bit indices. Communication device.

13. In a processing device in a wireless communication system, at least one processor; and At least one computer memory operably connectable to said at least one processor and storing instructions that, when executed, cause said at least one processor to perform operations, said operations comprising: Receive a rate-matched bit sequence of length E; Obtain a second bit sequence of size N based on the above rate-matched bit sequence, where E < N; Obtaining a first bit sequence of length N based on the second bit sequence and a polar transform of size N; and It includes obtaining an information bit sequence of length N by applying inverse convolution precoding with a constraint length L to the first bit sequence, The N bit indices of the above information bit sequence include zero or more pre-frozen bit indices, each having a predetermined value, Based on the above rate-matched bit sequence being obtained by excluding bits of the (NE) lowest bit indices from the second bit sequence, and i) Based on NE < L, the number of pre-frozen bit indices is determined to be 0, ii) Based on NE >= L, the max(0, NEL) lowest bit indices among the information bit sequences are determined as the pre-frozen bit indices. Processing unit.

14. In a computer-readable storage medium, The storage medium stores at least one program code comprising instructions that, when executed, cause at least one processor to perform operations, the operations comprising: Receive a rate-matched bit sequence of length E; Obtain a second bit sequence of size N based on the above rate-matched bit sequence, where E < N; Obtaining a first bit sequence of length N based on the second bit sequence and a polar transform of size N; and It includes obtaining an information bit sequence of length N by applying inverse convolution precoding with a constraint length L to the first bit sequence, The N bit indices of the above information bit sequence include zero or more pre-frozen bit indices, each having a predetermined value, Based on the above rate-matched bit sequence being obtained by excluding bits of the (NE) lowest bit indices from the second bit sequence, and i) Based on NE < L, the number of pre-frozen bit indices is determined to be 0, ii) Based on NE >= L, the max(0, NEL) lowest bit indices among the information bit sequences are determined as the pre-frozen bit indices. Storage media.

Images