Micro-led display device and preparation method therefor

Abstract

Disclosed in the present application are a micro-LED display device and a preparation method therefor. The micro-LED display device comprises a display substrate. The display substrate comprises a light-emitting epitaxial layer, a current-blocking layer, a plurality of transparent pixel electrodes, a first dielectric reflection layer, and a plurality of lead-out electrodes, wherein the current-blocking layer is arranged on one side of a first semiconductor layer of the light-emitting epitaxial layer and exposes the first semiconductor layer; the transparent pixel electrodes each comprise a first electrode region and a second electrode region, the first electrode region covering the exposed portion of the first semiconductor layer and being electrically conductively connected thereto, and the second electrode region covering one side of the current-blocking layer; the first dielectric reflection layer covers the transparent pixel electrodes, and a plurality of first via holes is formed in the first dielectric reflection layer, and the projections of the first via holes fall within the overlap regions of the second electrode regions and the current-blocking layer; and the lead-out electrodes are arranged in the first via holes and electrically connected to the second electrode regions. By means of the method, the present application can improve the light emission collimation and optical efficiency of micro-LED display devices.

Description

Micro-LED display device and preparation method thereof

[0001] The present application claims priority to Chinese Patent Application No. 2024111099372, filed on August 13, 2024, entitled "Micro-LED display device and preparation method thereof", the entire contents of which are incorporated herein by reference.

TECHNICAL FIELD

[0002] The present application relates to the technical field of semiconductor light-emitting diodes, in particular to a Micro-LED display device and a preparation method thereof.

BACKGROUND

[0003] LED (Light Emitting Diode) is a kind of semiconductor component that can convert electrical energy into visible light, and is a lighting source widely used in modern indication, display, decoration, backlight, general lighting and urban night scene fields.

[0004] Most of the current LED devices have one side light emission requirement, and the light emission angle of the LED is usually 120-degree Lambertian light, which is relatively divergent. In addition, the size of the Micro-LED chip is smaller, the sidewall light emission is stronger, and the light emission angle is more divergent. Therefore, in some fields requiring collimated light emission applications, the optical efficiency of the Micro-LED device is not high.

SUMMARY

[0005] Embodiments of the present application provide a Micro-LED display device and a preparation method thereof, which can improve the collimation of the light emission angle of the Micro-LED display device and improve the optical efficiency of the Micro-LED display device.

[0006] In a first aspect, embodiments of the present application provide a Micro-LED display device, which includes a display substrate, the display substrate including a light-emitting epitaxial layer, a current blocking layer, a plurality of pixel transparent electrodes, a first dielectric reflective layer, and a plurality of lead electrodes.

[0007] The light-emitting epitaxial layer includes a first semiconductor layer, an active layer, and a second semiconductor layer sequentially stacked along a predetermined stacking direction.

[0008] The current blocking layer is disposed on a side of the first semiconductor layer away from the active layer and partially exposes the first semiconductor layer.

[0009] The plurality of pixel transparent electrodes are spaced apart from each other and arranged in an array, each pixel transparent electrode comprising a first electrode region and a second electrode region, wherein the first electrode region covers and forms an electrically conductive connection with the exposed portion of the first semiconductor layer from the current blocking layer, and the second electrode region covers the side of the current blocking layer away from the first semiconductor layer;

[0010] The first dielectric reflective layer covers the plurality of pixel transparent electrodes and is provided with a plurality of first vias, each first via has a projection along the stacking direction falling into the overlapping region of the corresponding pixel transparent electrode second electrode region and the current blocking layer;

[0011] Each lead-out electrode is arranged in the corresponding first via, and the lead-out electrode is electrically connected with the corresponding second electrode region and supplies power to the corresponding first electrode region through the second electrode region.

[0012] In a second aspect, the embodiments of the present application provide a preparation method of a Micro-LED display device, the method comprising:

[0013] Forming a light-emitting epitaxial layer on a substrate, wherein the light-emitting epitaxial layer comprises a first semiconductor layer, an active layer and a second semiconductor layer arranged in sequence along a predetermined stacking direction, and the first semiconductor layer is located on the side of the light-emitting epitaxial layer away from the substrate;

[0014] Forming a current blocking layer on the side of the first semiconductor layer away from the active layer, wherein the current blocking layer is partially exposed to the first semiconductor layer;

[0015] Forming a plurality of pixel transparent electrodes on the side of the first semiconductor layer away from the active layer, wherein the plurality of pixel transparent electrodes are spaced apart from each other and arranged in an array, each pixel transparent electrode comprising a first electrode region and a second electrode region, the first electrode region covers and forms an electrically conductive connection with the exposed portion of the first semiconductor layer from the current blocking layer, and the second electrode region covers the side of the current blocking layer away from the first semiconductor layer;

[0016] Forming a first dielectric reflective layer covering the plurality of pixel transparent electrodes, and forming a plurality of first vias on the first dielectric reflective layer, wherein each first via has a projection along the stacking direction falling into the overlapping region of the corresponding pixel transparent electrode second electrode region and the current blocking layer;

[0017] Forming a lead-out electrode in each of the plurality of first vias, wherein each lead-out electrode is electrically connected with the corresponding second electrode region and supplies power to the corresponding first electrode region through the second electrode region.

[0018] The beneficial effects of the present application are: different from the prior art, the present application is provided with a plurality of pixel transparent electrodes on one side of the first semiconductor of the light-emitting epitaxial layer to supply power to the light-emitting epitaxial layer, wherein the plurality of pixel transparent electrodes have a plurality of first electrode regions and a plurality of second electrode regions, the plurality of first electrode regions are spaced apart from the current blocking layer, the first electrode region covers and is electrically connected to the first semiconductor layer to form a display pixel area of the Micro-LED display device, and the second electrode region of the pixel transparent electrode covers the side of the current blocking layer away from the first semiconductor layer. And the first dielectric reflective layer further covers the side of the pixel transparent electrode away from the first semiconductor layer, the first dielectric reflective layer can reflect light to the other side, so as to improve the collimation of the light-emitting angle of the Micro-LED display device, and improve the optical efficiency of the Micro-LED display device. Moreover, a plurality of first vias are provided on the first dielectric reflective layer and overlap the plurality of second electrode regions and the current blocking layer, a plurality of lead electrodes are filled in the plurality of first vias and are electrically connected to the plurality of second electrode regions, and an external circuit can supply power to the plurality of second electrode regions through the plurality of lead electrodes, and the plurality of second electrode regions supply power to the plurality of first electrode regions. Therefore, the display pixel area of the light-emitting epitaxial layer corresponds to the first electrode region, and the side of the first electrode region away from the light-emitting epitaxial layer is completely covered by the first dielectric reflective layer, and the first electrode region contacts the current through the second electrode region not corresponding to the display pixel area and the lead electrode. Therefore, when the display pixel area corresponding to the plurality of first electrode regions emits light, the light will be reflected by the first dielectric reflective layer when conducting to the side of the first electrode region, and the light will be emitted from the light-emitting side, thereby reducing the light leakage and further improving the collimation of the light-emitting angle of the Micro-LED display device and the optical efficiency of the LED display device. BRIEF DESCRIPTION OF DRAWINGS

[0019] FIG. 1 is a structural schematic diagram of an embodiment of the Micro-LED display device of the present application;

[0020] FIG. 2 is a structural relationship diagram of the current blocking layer, the pixel transparent electrode and the lead electrode in the Micro-LED display device of FIG. 2 when viewed along the stacking direction;

[0021] FIG. 3 is a structural schematic diagram of another embodiment of the Micro-LED display device of the present application;

[0022] FIG. 4 is a structural relationship diagram of the current blocking layer, the pixel transparent electrode and the lead electrode in the Micro-LED display device of FIG. 3 when viewed along the stacking direction;

[0023] FIG. 5 is a flow step schematic diagram of an embodiment of the preparation method of the Micro-LED display device of the present application;

[0024] FIG. 6 is a schematic diagram of a preparation process of the manufacturing method of the Micro-LED display device shown in FIG. 5 according to an embodiment;

[0025] FIG. 7 is a schematic diagram of a preparation process of the manufacturing method of the Micro-LED display device shown in FIG. 5 according to another embodiment;

[0026] FIG. 8 is a schematic diagram of another flow step of the manufacturing method of the Micro-LED display device according to the present application;

[0027] FIG. 9 is a schematic diagram of a preparation process of the manufacturing method of the Micro-LED display device shown in FIG. 8 according to an embodiment;

[0028] FIG. 10 is a schematic diagram of another preparation process of the manufacturing method of the Micro-LED display device shown in FIG. 8 according to an embodiment.

DETAILED DESCRIPTION

[0029] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative labor fall within the scope of protection of the present application.

[0030] The present inventors have found that most of the light emitting requirements of LED devices nowadays are one-side light emission, and the light emitting angle of the LED is usually 120-degree Lambertian light, which is relatively divergent. Moreover, the size of the Micro-LED chip is smaller, the sidewall light emission is stronger, and the light emitting angle is more divergent. Therefore, in some fields requiring collimated light emission applications, the optical efficiency of the Micro-LED device is not high. In order to solve the above problems, the present application proposes the following embodiments.

[0031] The following is an exemplary description of the structure of the Micro-LED display device according to the embodiments of the present application.

[0032] The Micro-LED display device 10 refers to a device capable of forming a plurality of display pixels inside to generate light, and the generated light can be emitted from one side of the Micro-LED display device 10 to illuminate or display various information such as text, images, etc. For example, the Micro-LED display device 10 can be an LED display screen chip, an LED digital vehicle lamp chip, a digital lamp strip chip, or an AR / VR / MR chip, etc.

[0033] As shown in FIG. 1, the Micro-LED display device 10 can include a display substrate 100. The display substrate 100 is configured to receive a driving current, and is capable of converting electrical energy into light energy, and is capable of internally forming a plurality of display pixel regions that can generate light.

[0034] In some embodiments, as shown in FIG. 1, the display substrate 100 can include a light-emitting epitaxial layer 110, a current blocking layer 120, a plurality of pixel transparent electrodes 130, a first dielectric reflective layer 140, and a plurality of lead electrodes 150.

[0035] The light-emitting epitaxial layer 110 is capable of emitting light by recombination of electrons and holes under the action of the driving current, and internally defines a plurality of display pixels.

[0036] In some embodiments, the light-emitting epitaxial layer 110 can include a first semiconductor layer 111, an active layer 112, and a second semiconductor layer 113 sequentially stacked along a predetermined stacking direction. The stacking direction can be indicated by arrow A in FIG. 1.

[0037] The first semiconductor layer 111 and the second semiconductor layer 113 can be an N-type semiconductor layer and a P-type semiconductor layer, respectively. The active layer 112 is a working medium layer, and the first semiconductor layer 111 and the second semiconductor layer 113 are located on both sides of the active layer 112 and are in contact with the active layer 112. The active layer 112 can form an N-i-P heterostructure together with the first semiconductor layer 111 and the second semiconductor layer 113 on both sides, and can recombine electrons and holes to form a P-N junction to form one or more display pixels.

[0038] Optionally, the first semiconductor layer 111, the active layer 112, and the second semiconductor layer 113 can be formed by doping semiconductor materials such as AlN, AlGaN, GaN, InGaN, AlInGaN, GaAs, GaP, GaInN, GaAsP, AlGaAs, or AlGaInP.

[0039] As shown in FIG. 1, the current blocking layer 120 can be disposed on the side of the first semiconductor layer 111 away from the active layer 112, and partially exposes the first semiconductor layer 111. Specifically, the current blocking layer 120 is made of an insulating material.

[0040] As an example, the current blocking layer 120 can be an oxide layer made of silicon dioxide (SiO2) or other insulating materials.

[0041] Optionally, as shown in FIG. 1 and FIG. 2, the plurality of pixel transparent electrodes 130 can be spaced apart from each other and arranged in an array. Each pixel transparent electrode 130 can include a first electrode region 131 and a second electrode region 132. The first electrode region 131 can cover and form an electrically conductive connection with the exposed portion of the first semiconductor layer 111 from the current blocking layer 120, and the second electrode region 132 can cover the side of the current blocking layer 120 facing away from the first semiconductor layer 111.

[0042] Specifically, the plurality of pixel transparent electrodes 130 correspond to the current blocking layer 120, the first electrode region 131 covers the exposed portion of the current blocking layer 120, and the second electrode region 132 covers part of the current blocking layer 120. The first electrode region 131 and the second electrode region 132 are connected to each other.

[0043] Optionally, the pixel transparent electrode 130 can transmit current to the first semiconductor layer 111 through the first electrode region 131, so that the light-emitting epitaxial layer 110 can emit light under the action of the current. Therefore, the position corresponding to the light-emitting epitaxial layer 110 of the first electrode region 131 can define a plurality of display pixels.

[0044] In some embodiments, the pixel transparent electrode 130 can be an ITO layer, or a transparent metal layer formed by doping a multilayer metal layer of nickel, silver, titanium, chromium, etc. and aluminum. After the display pixels in the light-emitting epitaxial layer 110 generate light, the light can pass through the transparent first electrode region 131.

[0045] In some embodiments, as shown in FIG. 1, the first dielectric reflective layer 140 can cover the plurality of pixel transparent electrodes 130. The first dielectric reflective layer 140 is provided with a plurality of first vias 141. The projection of each first via 141 along the stacking direction falls within the overlapping region of the second electrode region 132 of the corresponding pixel transparent electrode 130 and the current blocking layer 120. Each lead electrode 150 can be arranged in the corresponding first via 141, and the lead electrode 150 is electrically connected to the corresponding second electrode region 132 and supplies power to the corresponding first electrode region 131 through the second electrode region 132.

[0046] The first dielectric reflective layer 140 can reflect the light passing through the transparent first electrode region 131 to the side of the light-emitting epitaxial layer 110 facing away from the pixel transparent electrode 130. In some embodiments, the first dielectric reflective layer 140 can be a DBR mirror, which can be a multilayer SiO2 / TiO2 dielectric film structure or other non-conductive reflective structure layer.

[0047] Specifically, as shown in FIG. 1 and FIG. 2, the positions of the plurality of first vias 141 correspond to the positions of the second electrode regions 132 in the plurality of pixel transparent electrodes 130, the plurality of lead-out electrodes 150 are filled in the plurality of first vias 141 one by one, and the plurality of lead-out electrodes 150 are correspondingly electrically connected to the second electrode regions 132. The side of the plurality of lead-out electrodes 150 opposite to the second electrode regions 132 is exposed on the surface of the first dielectric reflection layer 140, so as to facilitate the contact with other electrode circuits.

[0048] When the side of the plurality of lead-out electrodes 150 opposite to the second electrode regions 132 is in contact with other electrode circuits and in conductive communication, the plurality of lead-out electrodes 150 can transmit current to the second electrode regions 132, and supply power to the corresponding first electrode regions 131 through the second electrode regions 132, and the first electrode regions 131 further transmit current to the first semiconductor layer 111, so that the light-emitting epitaxial layer 110 can emit light under the action of the current.

[0049] The projection of each first via 141 along the stacking direction is arranged to fall within the overlapping region of the corresponding pixel transparent electrode 130 and the current blocking layer 120, so that each display pixel point can correspond to the first dielectric reflection layer 140 in the stacking direction, without corresponding to the position where the first via 141 is arranged on the first dielectric reflection layer 140. Therefore, when the display pixel points formed by the plurality of first electrode regions 131 emit light, the light generated by the light-emitting epitaxial layer 110 can pass through the transparent first electrode regions 131 to reach the first dielectric reflection layer 140, and then be reflected by the first dielectric reflection layer 140 to the side of the light-emitting epitaxial layer 110 opposite to the pixel transparent electrode 130, so as to reduce the light leakage from the first via 141, and enable the light generated in the light-emitting epitaxial layer 110 to be mostly emitted from the side of the light-emitting epitaxial layer 110 opposite to the pixel transparent electrode 130, thereby improving the collimation of the light-emitting angle of the Micro-LED display device 10 and improving the optical efficiency of the Micro-LED display device 10.

[0050] In some embodiments, the first dielectric reflection layer 140 can also cover the side of the current blocking layer 120 opposite to the light-emitting epitaxial layer 110, so that the first dielectric reflection layer 140 can also reflect part of the light leakage through the current blocking layer 120, thereby improving the collimation of the light-emitting angle of the Micro-LED display device 10 and improving the light-emitting efficiency of the Micro-LED display device 10.

[0051] Based on the above structure, the positions of the first electrode regions 131 and the second electrode regions 132 can present the following two embodiments:

[0052] First embodiment:

[0053] As shown in FIG. 1 and FIG. 2, the current blocking layer 120 can be provided with a plurality of first windows 121 spaced apart from each other and arranged in an array, and the first electrode region 131 can be arranged in the corresponding first window 121. The second electrode region 132, the first via 141 and the lead electrode 150 can be arranged around the first electrode region 131.

[0054] The current blocking layer 120 can be provided with a plurality of first windows 121 spaced apart from each other and arranged in an array, and the first electrode region 131 can be arranged in the corresponding first window 121. The second electrode region 132, the first via 141 and the lead electrode 150 can be arranged around the first electrode region 131.

[0055] Specifically, the second electrode region 132, the first via 141 and the lead electrode 150 can all be arranged around the first electrode region 131. In this way, the lead electrode 150 can transmit driving current to the first electrode region 131 through the second electrode region 132 around the first electrode region 131, thereby improving the current diffusion effect in the first semiconductor layer 111 and making the brightness of the display pixel points more uniform. Moreover, in this way, the area of the display pixel points of the light-emitting epitaxial layer 110 can be more concentrated, thereby ensuring the display effect of the light-emitting epitaxial layer 110.

[0056] Moreover, the plurality of pixel transparent electrodes 130 are spaced apart by the current blocking layer 120, which can increase the distance between two display pixel points and further increase the diffusion distance of the driving current in the first semiconductor layer 111, thereby reducing the electrical crosstalk between the display pixel points.

[0057] In some embodiments, as shown in FIG. 2, the first window 121 can be arranged in a circular shape, the pixel transparent electrode 130 can be arranged in a cylindrical shape, and the second electrode region 132 and the lead electrode 150 can be arranged in a ring shape around the first electrode region 131 when viewed from the side of the pixel transparent electrode 130 away from the light-emitting epitaxial layer 110.

[0058] Of course, in other embodiments, the first window 121 can present a rectangular or triangular shape or other shapes, and the second electrode region 132, the first via 141 and the lead electrode 150 can be further arranged in a rectangular or triangular shape or other shapes to adapt to the shape of the first window 121. Moreover, in other embodiments, the second electrode region 132, the first via 141 and the lead electrode 150 can be arranged on one side or both sides of the first electrode region 131, instead of being arranged around the first electrode region 131, and the shape of the lead electrode 150 is not limited herein.

[0059] Second embodiment:

[0060] As shown in FIG. 3 and FIG. 4, the current blocking layer 120 can include a plurality of current blocking patterns 122 arranged in an array and spaced apart from each other, the second electrode region 132 can be arranged on the side of the corresponding current blocking pattern 122 away from the first semiconductor layer 111, and the first electrode region 131 can be arranged around the second electrode region 132.

[0061] The plurality of current blocking patterns 122 can correspond to a plurality of display pixel regions in the light emitting epitaxial layer 110. The plurality of pixel transparent electrodes 130 are arranged in an array and spaced apart from each other to define a plurality of display pixel points in the light emitting epitaxial layer 110.

[0062] Specifically, as shown in FIG. 3 and FIG. 4, each pixel transparent electrode 130 corresponds to a current blocking pattern 122, and the second electrode region 132 of each pixel transparent electrode 130 is arranged on the side of the current blocking pattern 122 away from the first semiconductor layer 111. The first electrode region 131 can be arranged around the stacked second electrode region 132 and the current blocking pattern 122 in the vertical direction of the stacking direction and electrically connected to the first semiconductor layer 111. The first dielectric reflective layer 140 covers the side of the pixel transparent electrode 130 away from the first semiconductor layer 111 and covers the gap between the plurality of pixel transparent electrodes 130. The first via 141 is in contact with the second electrode region 132, and the lead electrode 150 is filled in the first via 141 and can be arranged in a columnar shape.

[0063] Therefore, after receiving the driving current, the second electrode region 132 can transmit the driving current to the first electrode region 131, and the first electrode region 131 can further transmit the current to the first semiconductor layer 111. Therefore, in the stacking direction, the region corresponding to the second electrode region 132 in the middle of the first electrode region 131 is a region where no light is emitted, and the annular first electrode region 131 defines a display pixel point in the light emitting epitaxial layer 110.

[0064] In this way, the second electrode area 132 is arranged at the middle of the first electrode area 131, which facilitates the arrangement of the first via hole 141 and the lead electrode 150 corresponding to the second electrode area 132, reduces the difficulty of adding the first via hole 141 and the lead electrode 150, and thus reduces the difficulty of manufacturing the Micro-LED display device 10. In addition, by reducing the spacing between the display pixels, the size of the display area of the Micro-LED display device 10 can be reduced, and the density of the display pixels can be improved.

[0065] In some embodiments, as shown in FIG. 4, the second electrode area 132 can be arranged in a cylindrical shape, and the lead electrode 150 can also be arranged in a cylindrical shape corresponding to the second electrode area 132. When the pixel transparent electrode 130 and the lead electrode 150 are viewed from the side of the pixel transparent electrode 130 away from the light-emitting epitaxial layer 110, the first electrode area 131 and the lead electrode 150 can be arranged in a ring shape and surround the second electrode area 132.

[0066] Of course, in other embodiments, the outer periphery of the first electrode area 131 can be arranged in a rectangular or triangular shape or other shapes. In addition, in other embodiments, the second electrode area 132, the first via hole 141, and the lead electrode 150 can be arranged only at one corner or half side of the first electrode area 131, rather than being arranged at the middle of the first electrode area 131, which is not limited in the present application.

[0067] Based on the above two different embodiments, the side of the light-emitting epitaxial layer 110 away from the pixel transparent electrode 130 can be arranged as follows:

[0068] In some embodiments, as shown in FIG. 1, the display substrate 100 can further include a common transparent electrode 160 and a current diffusion electrode 170. The side of the second semiconductor layer 113 away from the active layer 112 is provided with a first recessed area 1121, and the current diffusion electrode 170 can be arranged in the first recessed area 1121. The current diffusion electrode 170 can be further electrically connected with the second semiconductor layer 113.

[0069] When viewed in the stacking direction, the current diffusion electrode 170 and the first recessed area 1121 can be arranged in a grid shape to form a plurality of light-emitting areas 1131 spaced apart from each other and arranged in an array. The first electrode area 131 at least partially falls within the corresponding light-emitting area 1131 in the stacking direction. Therefore, the plurality of light-emitting areas 1131 can also correspond to the display pixels of the light-emitting epitaxial layer 110. When the display pixels of the light-emitting epitaxial layer 110 emit light during display, the light can be emitted from the side of the plurality of light-emitting areas 1131, so as not to be blocked by the current diffusion electrode 170.

[0070] Further, the common transparent electrode 160 can cover the second semiconductor layer 113 and the current diffusion electrode 170 and be electrically connected with the current diffusion electrode 170. The conductivity of the current diffusion electrode 170 can be greater than that of the common transparent electrode 160.

[0071] The common transparent electrode 160 can be connected with an external circuit, and the common transparent electrode 160 can supply power to the second semiconductor layer 113 through the current diffusion electrode 170, so that the common transparent electrode 160 can communicate with the external circuit to provide a reference voltage for the light-emitting epitaxial layer 110, so that the light-emitting epitaxial layer 110 realizes light emission under the joint action of the common transparent electrode 160, the current diffusion electrode 170, the pixel transparent electrode 130 and the extraction electrode 150.

[0072] Since the first recessed area 1121 is arranged in the second semiconductor layer 113, the current diffusion electrode 170 is arranged in the first recessed area 1121 to be embedded in the second semiconductor layer 113, so that the current diffusion electrode 170 has a large contact area with the second semiconductor layer 113, and the conductivity of the current diffusion electrode 170 is greater than that of the common transparent electrode 160, which can facilitate the current diffusion electrode 170 to supply power to the second semiconductor layer 113, thereby improving the current diffusion efficiency between the current diffusion electrode 170 and the second semiconductor layer 113, improving the photoelectric conversion rate in the light-emitting epitaxial layer 110, and thereby improving the light-emitting efficiency of the Micro-LED display device 10.

[0073] In some embodiments, the current diffusion electrode 170 can be formed of conductive materials such as Cr, Ti, Ni, Al, Pt metal or Au metal. The common transparent electrode 160 can be a transparent and conductive electrode such as ITO.

[0074] The transparent arrangement of the common transparent electrode 160 can facilitate the light in the light-emitting epitaxial layer 110 to pass through the common transparent electrode 160 and be emitted, reduce the loss of the light propagating in the common transparent electrode 160 layer, and improve the light-emitting efficiency of the Micro-LED display device 10.

[0075] In some embodiments, the Micro-LED display device 10 can also not be provided with the common transparent electrode 160, but only the current diffusion electrode 170 is arranged to supply power to the second semiconductor layer 113.

[0076] In some embodiments, as shown in FIG. 1, in the stacking direction, the depth of the first recessed area 1121 can be less than the thickness of the second semiconductor layer 113.

[0077] Optionally, the first recessed region 1121 can be formed by etching. Therefore, the depth of the first recessed region 1121 can be less than the thickness of the second semiconductor layer 113, so that the first main recessed region does not damage the active layer 112 during etching, thereby ensuring the light emitting intensity of the light emitting epitaxial layer 110.

[0078] In some embodiments, as shown in FIG. 1, the display substrate 100 can further include a second dielectric reflective layer 180, which can be disposed on the side of the common transparent electrode 160 facing away from the second semiconductor layer 113. The reflectivity of the second dielectric reflective layer 180 is less than that of the first dielectric reflective layer 140, so as to form a resonant cavity for light emitted from the side of the second dielectric reflective layer 180.

[0079] The second dielectric reflective layer 180 can be used to transmit part of the light emitted from the side of the second semiconductor layer 113.

[0080] Specifically, the reflectivity of the second dielectric reflective layer 180 is set to be less than that of the first dielectric reflective layer 140, so as to form a resonant cavity for light emitted from the side of the second dielectric reflective layer 180. Therefore, by setting the reflectivity of the second dielectric reflective layer 180 in this way, the light can be concentrated and reflected from the side of the second dielectric reflective layer 180, and the light emitting angle of the light can be concentrated, thereby improving the collimation and light emitting efficiency of the Micro-LED display device 10.

[0081] Optionally, the first dielectric reflective layer 140 and the second dielectric reflective layer 180 can both be made of a distributed Bragg reflector (DBR). The present application does not make specific limitations on the materials for making the first dielectric reflective layer 140 and the second dielectric reflective layer 180.

[0082] Based on the structure of the display substrate 100 described above, the Micro-LED display device 10 of the first embodiment and the second embodiment can both add a driving substrate 200 corresponding to the display substrate 100, so as to supply power to the light emitting epitaxial layer 110 of the display substrate 100.

[0083] In some embodiments, the driving substrate 200 and the display substrate 100 of the two embodiments can be connected to each other by hybrid bonding. The specific structure can be as follows:

[0084] As an example, referring to FIG. 1, the display substrate 100 can further include a first bonding medium layer 190 and a plurality of extension electrodes 1000. The first bonding medium layer 190 can be disposed on a side of the first medium reflective layer 140 facing away from the first semiconductor layer 111, and a plurality of second vias 191 can be disposed on the first bonding medium layer 190. The plurality of second vias 191 can be in communication with corresponding first vias 141, and the plurality of extension electrodes 1000 can be disposed in the corresponding second vias 191. Moreover, each extension electrode 1000 can be in ohmic contact with a corresponding lead electrode 150 in the first via 141.

[0085] The extension electrode 1000, the lead electrode 150, and the pixel transparent electrode 130 can serve as a P electrode of the light-emitting epitaxial layer 110, and the current diffusion electrode 170 and the common transparent electrode 160 can serve as an N electrode of the light-emitting epitaxial layer 110.

[0086] Referring to FIG. 1, the Micro-LED display device 10 can further include a driving substrate 200. The driving substrate 200 can include a second bonding medium layer 210 and a plurality of power supply electrodes 220. The second bonding medium layer 210 can include a plurality of third vias 211, and each power supply electrode 220 can be disposed in a corresponding third via 211.

[0087] The plurality of third vias 211 can correspond to the positions of the plurality of extension electrodes 1000, and the third vias 211 can extend through the second bonding medium layer 210 along a stacking direction. The first bonding medium layer 190 and the second bonding medium layer 210 can be bonded to each other, and the extension electrodes 1000 and the corresponding power supply electrodes 220 can be bonded to each other.

[0088] Optionally, the area of the extension electrode 1000 can be greater than the area of the lead electrode 150 when viewed along the stacking direction, and the lead electrode 150 can be disposed in the middle of the extension electrode 1000. In this way, the lead electrode 150 and the power supply electrode 220 can be connected by the extension electrode 1000 with a larger area, which can facilitate the connection and bonding of the extension electrode 1000 and the power supply electrode 220, thereby reducing the difficulty of bonding.

[0089] In some embodiments, referring to FIG. 1, the driving substrate 200 can further include a substrate body 230. The second bonding medium layer 210 and the plurality of power supply electrodes 220 can be disposed on a side of the substrate body 230 facing the light-emitting epitaxial layer 110, and the surface of the substrate body 230 can be exposed in the third via 211. The substrate body 230 can include a conductive circuit disposed therein and on the surface thereof. The power supply electrode 220 disposed in the third via 211 can be connected to the conductive circuit on the substrate body 230.

[0090] Therefore, the substrate body 230 can provide the driving current to the extension electrode 1000 through the plurality of power supply electrodes 220, the driving current further flows to the lead-out electrode 150 and the pixel transparent electrode 130 through the extension electrode 1000, and finally reaches the first semiconductor layer 111, so as to realize the power supply to the first semiconductor layer 111.

[0091] In some embodiments, the bonding between the driving substrate 200 and the display can be a hybrid bonding between Cu / SiO2-Cu / SiO2, a hybrid bonding between Cu / SiN-Cu / SiN, a hybrid bonding between Cu / SiO2-Cu / SiN, a hybrid bonding between Cu / BCB-Cu / BCB, or a hybrid bonding between Cu / PI-Cu / PI. Among them, the first bonding medium layer 190 and the second bonding medium layer 210 can be a non-conductive medium layer such as SiO2 or BCB, and the extension electrode 1000 and the power supply electrode 220 can be a metal material such as Au or Cu.

[0092] In this way, the connection between the driving substrate 200 and the display substrate 100 is set in the form of hybrid bonding, which can enhance the connection strength between the driving substrate 200 and the display substrate 100, and enhance the connection stability of the Micro-LED display device 10.

[0093] In other embodiments, the driving substrate 200 and the display substrate 100 in the first embodiment and the second embodiment can also be connected in the form of wafer bonding, and the specific connection structure can be as follows:

[0094] As an example, referring to FIG. 3, the display substrate 100 can include a metal bonding layer 1100, which can be arranged on the side of the first medium reflection layer 140 away from the first semiconductor layer 111.

[0095] Referring to FIG. 3, the driving substrate 200 can include a plurality of power supply electrodes 220 arranged in an array and spaced from each other, and each metal bonding pattern 1110 is further bonded with the corresponding power supply electrode 220.

[0096] In some embodiments, referring to FIG. 3, the driving substrate 200 can further include a substrate body 230 and a first metal bonding layer 1200, the plurality of power supply electrodes 220 are disposed on a side of the substrate body 230 facing the light emitting epitaxial layer 110, the first metal bonding layer 1200 covers the side of the substrate body 230 facing the light emitting epitaxial layer 110, and the plurality of metal bonding patterns 1110 are bonded to the first metal bonding layer 1200, and the plurality of power supply electrodes 220 are conductively connected to the plurality of metal bonding patterns 1110 through the first metal bonding layer 1200. The substrate body 230 can be internally and externally provided with conductive lines, and the plurality of power supply electrodes 220 can be connected to the conductive lines on the substrate body 230.

[0097] Referring to FIG. 3, the first recessed area 1121 can extend into the metal bonding layer 1100 and the first metal bonding layer 1200 along the stacking direction, so as to divide the metal bonding layer 1100 into a plurality of metal bonding patterns 1110 spaced apart from each other, and divide the first metal bonding layer 1200 into a plurality of first metal bonding patterns 1210 spaced apart from each other. Each of the metal bonding patterns 1110 is conductively connected to a corresponding lead electrode 150, and each of the first metal bonding patterns 1210 is connected to a corresponding power supply electrode 220.

[0098] Specifically, as shown in FIG. 3, the position of the first recessed area 1121 and the position of the pixel transparent electrode 130 can be staggered with each other when viewed along the stacking direction, and the grid-shaped first recessed area 1121 can separate each of the pixel transparent electrodes 130. When the first recessed area 1121 extends into the metal bonding layer 1100 and the first metal bonding layer 1200 along the stacking direction, the first dielectric filling layer, the metal bonding layer 1100 and the first metal bonding layer 1200 can be further separated, so that the adjacent metal bonding patterns 1110 and the first metal bonding patterns 1210 are not conductively connected.

[0099] Therefore, the substrate body 230 can further transmit driving current to the plurality of first metal bonding patterns 1210 and the plurality of metal bonding patterns 1110 through the plurality of power supply electrodes 220, and the driving current further sequentially passes through the plurality of first metal bonding patterns 1210, the plurality of metal bonding patterns 1110, the lead electrode 150 and the pixel transparent electrode 130 to reach the first semiconductor layer 111, so as to realize conduction to the light emitting epitaxial layer 110.

[0100] In the preparation of the Micro-LED display device 10, wafer bonding can be achieved between the driving substrate 200 and the display substrate 100, that is, the metal bonding layer 1100 and the first metal bonding layer 1200 in the driving substrate 200 are bonded first, and the power supply electrode 220 on the driving substrate is conductively connected with the metal bonding layer 1100. Then, when the first recessed area 1121 is formed on the display substrate 100, the depth of the first recessed area 1121 can be deepened, so that the first recessed area 1121 can divide the metal bonding layer 1100 into a plurality of metal bonding patterns 1110 spaced from each other, and the first recessed area 1121 can also divide the first metal bonding layer 1200 into a plurality of first metal bonding patterns 1210 spaced from each other.

[0101] Since the alignment accuracy between the metal bonding layer 1100 and the driving substrate 200 is not high by using wafer bonding, the bonding difficulty between the driving substrate 200 and the display substrate 100 can be reduced, the preparation process of the Micro-LED display device 10 can be simplified, and the preparation yield of the Micro-LED display device 10 can be improved.

[0102] In some embodiments, referring to FIG. 3, the current diffusion electrode 170 can extend at least to the first dielectric reflection layer 140 and be electrically insulated from the first semiconductor, the active layer 112, and the metal bonding pattern 1110.

[0103] For example, in some embodiments, referring to FIG. 3, the wall surface and the bottom of the first recessed area 1121 can be provided with an insulating spacer layer 1122, and the current diffusion electrode 170 is arranged in the first recessed area 1121 and is spaced from and electrically insulated from the first semiconductor, the active layer 112, the metal bonding pattern 1110, and the first metal bonding pattern 1210 by the insulating spacer layer 1122. Optionally, the insulating spacer layer 1122 can be a non-conductive dielectric layer such as SiO2, SiN, Al2O3, or BCB.

[0104] In this way, the current in the current diffusion electrode 170 cannot spread into the first semiconductor, the active layer 112, and the metal bonding pattern 1110 to cause a short circuit in the Micro-LED display device 10, and the current diffusion electrode 170 can also prevent current crosstalk between the display pixels in the light-emitting epitaxial layer 110, thereby increasing the safety of the Micro-LED display device 10 and ensuring the light-emitting effect of the Micro-LED display device 10.

[0105] Of course, in other embodiments, other ways can be selected to electrically insulate the current diffusion electrode 170 from the first semiconductor, the active layer 112, and the metal bonding pattern 1110, which will not be specifically enumerated one by one in this embodiment.

[0106] Based on the above various structures of the Micro-LED display device 10, the preparation process of the Micro-LED display device 10 is described below as an example. As shown in FIG. 5, wherein FIG. 5 shows a manufacturing method flow of the Micro-LED display device 10 in an embodiment of the present application, FIG. 6 and FIG. 7 show the preparation process and component structure involved in the steps of the flow shown in FIG. 5.

[0107] S100: forming a light-emitting epitaxial layer on a substrate, wherein the light-emitting epitaxial layer comprises a first semiconductor layer, an active layer and a second semiconductor layer sequentially stacked along a predetermined stacking direction, and the first semiconductor layer is located on a side of the light-emitting epitaxial layer away from the substrate.

[0108] As an example, this step can correspond to FIG. 6 or FIG. 7.

[0109] Specifically, a substrate 300 is provided. The substrate 300 can be made of sapphire, silicon, SiC, GaN material, etc. For example, if the material of the substrate 300 is Si material, the stress effect caused by thermal mismatch in the subsequent bonding process with the silicon-based driving substrate 200 can be minimized, and the preparation process of the Micro-LED display device 10 is not easily affected.

[0110] In some embodiments, the first semiconductor layer 111, the active layer 112 and the second semiconductor layer 113 can be formed on one side of the substrate 300 by growth.

[0111] Alternatively, in other embodiments, the light-emitting epitaxial layer 110 can be fixed on the substrate 300 by transfer. For example, the light-emitting epitaxial layer 110 is fixed on the substrate 300 by transfer, and the substrate 300 can be made of ceramic, glass, PCB substrate, etc., which is not limited herein. For example, the light-emitting epitaxial layer 110 is fixed on the substrate 300 by transfer with the second semiconductor layer 113 facing the substrate 300, and the substrate 300 can be coated with adhesive in advance before contacting the light-emitting epitaxial layer 110 for bonding and fixing the light-emitting epitaxial layer 110.

[0112] The specific definitions of the first semiconductor layer 111, the active layer 112 and the second semiconductor layer 113 can be found in the above description, which is not repeated herein.

[0113] S200: forming a current blocking layer on a side of the first semiconductor layer away from the active layer, wherein the current blocking layer partially exposes the first semiconductor layer.

[0114] Specifically, corresponding to the different structures of the first and second embodiments of the current blocking layer 120 described above, this step can be divided into two different preparation processes:

[0115] Corresponding to the structure of the first embodiment of the current blocking layer 120, the preparation process corresponding to this step is shown in the following steps S211-S212:

[0116] S211: Form a current blocking layer on the side of the first semiconductor layer away from the active layer.

[0117] As an example, this step can correspond to Figure 6. Among them, the current blocking layer 120 can completely cover the side of the first semiconductor layer 111 away from the active layer 112.

[0118] S212: Form a plurality of first windows in the current blocking layer, which are spaced apart and arranged in an array.

[0119] As an example, this step can correspond to Figure 6. Alternatively, a plurality of first windows 121 can be formed in the current blocking layer 120 by etching, and the plurality of first windows 121 can expose the first semiconductor layer 111. Among them, the positions of the plurality of first windows 121 correspond to the positions required for display of the Micro-LED display device 10, that is, the positions of the plurality of first windows 121 are consistent with the positions of the display pixel points in the light-emitting epitaxial layer 110.

[0120] As an example, after forming a plurality of first windows 121, when observing the current blocking layer 120 along the side of the current blocking layer 120 facing away from the first semiconductor layer 111, the current blocking layer 120 can exhibit a grid-like shape.

[0121] Corresponding to the structure of the second embodiment of the current blocking layer 120, the preparation process corresponding to this step is shown in the following step S221:

[0122] S221: Form a plurality of current blocking patterns on the side of the first semiconductor layer away from the active layer, which are spaced apart and arranged in an array, and the plurality of current blocking patterns form a current blocking layer.

[0123] As an example, this step can correspond to Figure 7. Specifically, a plurality of current blocking patterns 122 are formed on the side of the first semiconductor layer 111 away from the active layer 112 according to the positions of the display pixel points required, and the plurality of current blocking patterns 122 can correspond to the middle positions of the display pixel points.

[0124] In some embodiments, SiO2 material can be used as the current blocking layer 120, and the thickness of the current blocking layer 120 can be between 20nm and 300nm. For example, the thickness of the current blocking layer 120 in the stacking direction is 20nm, 40nm, 80nm, 130nm, 170nm, 280nm or 300nm, etc.

[0125] S300: forming a plurality of pixel transparent electrodes on the side of the first semiconductor layer away from the active layer, wherein the plurality of pixel transparent electrodes are spaced apart from each other and arranged in an array, each pixel transparent electrode comprises a first electrode region and a second electrode region, the first electrode region covers and forms an electrically conductive connection with the exposed portion of the first semiconductor layer from the current blocking layer, and the second electrode region covers the side of the current blocking layer away from the first semiconductor layer.

[0126] Similarly, corresponding to the structures of different embodiments of the pixel transparent electrode 130, this step can present different preparation processes:

[0127] Corresponding to the structure of the first embodiment of the pixel transparent electrode 130, the preparation process corresponding to this step is shown in the following steps S311-S312:

[0128] S311: The first electrode region of the plurality of pixel transparent electrodes is filled in the first window and covers the first semiconductor layer exposed in the first window.

[0129] As an example, this step can correspond to FIG. 6.

[0130] S312: The second electrode region of the plurality of pixel transparent electrodes covers the side of the corresponding current blocking pattern away from the first semiconductor layer, and the second electrode region is arranged around the first electrode region.

[0131] As an example, this step can correspond to FIG. 6. Among them, the plurality of pixel transparent electrodes 130 are arranged to be spaced apart corresponding to the plurality of first windows 121, and the plurality of pixel transparent electrodes 130 do not contact each other.

[0132] Corresponding to the structure of the second embodiment of the pixel transparent electrode 130, the preparation process corresponding to this step is shown in the following step S321:

[0133] S321: The second electrode region of the plurality of pixel transparent electrodes covers the side of the corresponding current blocking pattern away from the first semiconductor layer, and the first electrode region is arranged around the corresponding second electrode region and the current blocking pattern.

[0134] As an example, this step can correspond to FIG. 7. Similarly, the plurality of pixel transparent electrodes 130 are arranged to be spaced apart corresponding to the plurality of first windows 121, and the current blocking pattern 122 is covered by the pixel transparent electrode 130 at the middle position.

[0135] In some embodiments, the pixel transparent electrode 130 can be an ITO material, and the thickness of the pixel transparent electrode 130 can be between 10 nm and 100 nm. For example, in the stacking direction, the thickness of the pixel transparent electrode 130 can be 10 nm, 20 nm, 40 nm, 50 nm, 70 nm, or 100 nm, etc.

[0136] S400: forming a first dielectric reflective layer covering the plurality of pixel transparent electrodes, and forming a plurality of first vias on the first dielectric reflective layer, wherein each first via projects onto the overlapping region of the second electrode region of the corresponding pixel transparent electrode and the current blocking layer along the stacking direction.

[0137] In some embodiments, the first dielectric reflective layer 140 can be deposited on the side of the plurality of pixel transparent electrodes 130 opposite to the first semiconductor layer 111. The first dielectric reflective layer 140 not only covers the side of the plurality of pixel transparent electrodes 130 opposite to the first semiconductor layer 111, but also fills the gaps between the plurality of pixel transparent electrodes 130. Furthermore, a plurality of first vias 141 can be formed on the first dielectric reflective layer 140 by etching, and each first via 141 penetrates the first dielectric reflective layer 140 along the stacking direction, and the second electrode region 132 is partially exposed in the first via 141.

[0138] For the structure of the first embodiment corresponding to the pixel transparent electrode 130, as shown in FIG. 6, the first via 141 can correspond to the second electrode region 132, and when viewed along the stacking direction, the first via 141 can be arranged around the first electrode region 131.

[0139] For the structure of the second embodiment corresponding to the pixel transparent electrode 130, as shown in FIG. 7, the first via 141 can correspond to the second electrode region 132, and when viewed along the stacking direction, the first via 141 can be arranged at the middle position of the first electrode region 131, and the first electrode region 131 can be arranged around the first via 141.

[0140] In some embodiments, the first dielectric reflective layer 140 is a multi-layer SiO2 / TiO2 repeating structure, and the thickness of SiO2 and TiO2 is determined by the light emitting wavelength of the device, and is usually wherein λ is the light emitting wavelength, and n is the refractive index of the dielectric material.

[0141] S500: forming a plurality of lead electrodes in the plurality of first vias, respectively, wherein each lead electrode is electrically connected to the corresponding second electrode region, and supplies power to the corresponding first electrode region through the second electrode region.

[0142] As an example, a plurality of lead electrodes 150 can be formed in the plurality of first vias 141 by sputtering deposition and electroplating, respectively, each lead electrode 150 is in conductive contact with the corresponding second electrode region 132, and the side of the lead electrode 150 opposite to the second electrode region 132 can be exposed on the side of the first dielectric reflective layer 140 opposite to the first semiconductor layer 111.

[0143] Corresponding to the structure of the first embodiment of the pixel transparent electrode 130, as shown in FIG. 6, the first via hole 141 can correspond to the second electrode area 132, and when viewed along the stacking direction, the first via hole 141 can be arranged around the first electrode area 131.

[0144] Corresponding to the structure of the second embodiment of the pixel transparent electrode 130, as shown in FIG. 7, the first via hole 141 can correspond to the second electrode area 132, and when viewed along the stacking direction, the first via hole 141 can be arranged at the middle position of the first electrode area 131, and the first electrode area 131 is arranged around the first via hole 141.

[0145] Based on the structure of the display substrate 100 described above, the display substrate 100 can be covered on the driving substrate 200, and bonded and connected with the driving substrate 200. Hereinafter, taking the structure of the first embodiment of the pixel transparent electrode 130 as an example, the wafer bonding process of the display substrate 100 and the driving substrate 200 is described exemplarily. Wherein FIG. 8 shows the manufacturing method flow of another part of the Micro-LED display device 10 in an embodiment of the present application, and FIG. 9 and FIG. 10 show the preparation process and component structure involved in the flow steps shown in FIG. 8.

[0146] S600: Forming a metal bonding layer on the side of the first medium reflection layer away from the first semiconductor layer, wherein the metal bonding layer is in conductive connection with the plurality of lead electrodes.

[0147] In some embodiments, as shown in FIG. 9, a metal bonding layer 1100 can be formed on the side of the first medium reflection layer 140 away from the first semiconductor layer 111 by deposition. Since the surfaces of the plurality of lead electrodes 150 are exposed on the side of the first medium reflection layer 140 away from the first semiconductor layer 111, the metal bonding layer 1100 can be in conductive contact with the plurality of lead electrodes 150, thereby realizing conductive connection.

[0148] Wherein, the metal bonding layer 1100 can be Ti / Pt / AuSn, Ti / Pt / Au or Ti / Pt / NiSn, etc. different structure bonding metal.

[0149] S700: Bonding the metal bonding layer with the first metal bonding layer of the driving substrate.

[0150] The driving substrate 200 is provided, which can include a substrate body 230, a first metal bonding layer 1200, and a plurality of power electrodes 220, the plurality of power electrodes 220 are arranged in an array on one side of the substrate body 230 and spaced from each other, and the first metal bonding layer 1200 covers the plurality of power electrodes 220 and the plurality of substrate bodies 230.

[0151] Specifically, referring to FIG. 9, the first metal bonding layer 1200 is formed on the side of the driving substrate 200 facing the metal bonding layer 1100, and the plurality of power supply electrodes 220 form ohmic contact with the first metal bonding layer 1200. In some embodiments, the first metal bonding layer 1200 can be Ti / Pt / AuSn, Ti / Pt / Au, or Ti / Pt / NiSn, or other different structures of bonding metal.

[0152] Further, referring to FIG. 9, the display substrate 100 is inverted and placed on the driving substrate 200 with the metal bonding layer 1100 facing the plurality of power supply electrodes 220, and then the metal bonding layer 1100 and the first metal bonding layer 1200 are further bonded by hot pressing, so that the metal bonding layer 1100 and the first metal bonding layer 1200 form ohmic contact, and the metal bonding layer 1100 is electrically connected to the plurality of power supply electrodes 220 through the first metal bonding layer 1200.

[0153] S800: removing the substrate and forming a first recessed area on the side of the second semiconductor layer away from the active layer, wherein the first recessed area extends to the metal bonding layer in the stacking direction to divide the metal bonding layer into a plurality of metal bonding patterns spaced from each other, and further divide the first metal bonding layer into a plurality of first metal bonding patterns, each metal bonding pattern is electrically connected to a corresponding lead electrode and a power supply electrode of the driving substrate, each metal bonding pattern is electrically connected to a corresponding lead electrode and a first metal bonding pattern, and each first metal bonding pattern is electrically connected to a corresponding power supply electrode.

[0154] After the bonding driving substrate 200 is fixed, referring to FIG. 9, the substrate 300 on the side of the second semiconductor layer 113 away from the active layer 112 can be removed. Specifically, the substrate 300 can be removed by grinding, chemical etching, or laser lift-off (LLO) process, so that the second semiconductor layer 113 is exposed.

[0155] As an example, referring to FIG. 10, the second semiconductor layer 113 is etched on the side of the second semiconductor layer 113 away from the active layer 112 to form a first recessed area 1121, wherein the etched area is misaligned with the pixel transparent electrode 130. Optionally, the first recessed area 1121 can have a grid shape when viewed in the stacking direction.

[0156] As an example, referring to FIG. 10, the first recessed areas 1121 can extend to the metal bonding layer 1100 and the first metal bonding layer 1200 in the stacking direction, i.e., the depth of the first recessed areas 1121 is equal to the light emitting epitaxial layer 110, the first dielectric reflective layer 140, the metal bonding layer 1100 and the first metal bonding layer 1200. The grid-shaped first recessed areas 1121 separate the metal bonding layer 1100 into a plurality of metal bonding patterns 1110, and further separate the first metal bonding layer 1200 into a plurality of first metal bonding patterns 1210. Each of the metal bonding patterns 1110 is respectively conductively connected with a corresponding lead electrode 150 and a first metal bonding pattern 1210, and each of the first metal bonding patterns 1210 is conductively connected with a corresponding power supply electrode 220.

[0157] The first recessed areas 1121 can be formed by a two-step etching method, i.e., first forming a semiconductor photoresist mask to etch the light emitting epitaxial layer 110, and then using a semiconductor photoresist mask to etch the first dielectric reflective layer 140, the metal bonding layer 1100 and the first metal bonding layer 1200, so as to protect the exposed side wall of the light emitting epitaxial layer 110.

[0158] S900: forming a current diffusion electrode in the first recessed areas, wherein the current diffusion electrode and the first recessed areas are arranged in a grid shape when viewed in the stacking direction, so as to form a plurality of light emitting areas 1131 spaced apart from each other and arranged in an array, and the first electrode area at least partially falls within a corresponding light emitting area 1131 in the stacking direction.

[0159] In some embodiments, as an example, referring to FIG. 10, the inner wall and the bottom of part of the first recessed areas 1121 can be first insulated, so as to isolate the first semiconductor, the active layer 112 and the metal bonding pattern 1110 exposed in the first recessed areas 1121.

[0160] For example, referring to FIG. 10, an insulating spacer layer 1122 can be added to the inner wall and the bottom of the first recessed areas 1121, and the implementation of the insulating treatment is not specifically limited in this embodiment.

[0161] As an example, referring to FIG. 10, the current diffusion electrode 170 is further filled in the first recessed areas 1121 by sputtering and electroplating, and the current diffusion electrode 170 also presents a grid shape, so as to form a plurality of light emitting areas 1131 spaced apart from each other and arranged in an array, wherein the plurality of light emitting areas 1131 correspond to the first electrode area 131 of the plurality of pixel transparent electrodes 130, so as to correspond to a plurality of display pixel points in the light emitting epitaxial layer 110.

[0162] S1000: forming a common transparent electrode covering the second semiconductor layer and the current diffusion electrode, wherein the common transparent electrode is electrically connected with the current diffusion electrode, and the conductivity of the current diffusion electrode is greater than that of the common transparent electrode.

[0163] As an example, referring to FIG. 10, a common transparent electrode 160 can be formed on the side of the second semiconductor layer 113 opposite to the active layer 112, and the common transparent electrode 160 is electrically connected with the current diffusion electrode 170 and the second semiconductor layer 113 respectively, so that the current diffusion electrode 170 can supply power to the second semiconductor layer 113 through the common transparent electrode 160.

[0164] The conductivity of the current diffusion electrode 170 is greater than that of the common transparent electrode 160, so that the current diffusion electrode 170 diffuses current in the common transparent electrode 160 to further diffuse to the second semiconductor layer 113, thereby improving the current diffusion effect in the second semiconductor layer 113.

[0165] S1100: forming a second dielectric reflection layer on the side of the common transparent electrode away from the second semiconductor layer, wherein the reflectivity of the second dielectric reflection layer is less than that of the first dielectric reflection layer, so as to form a resonant cavity between the first dielectric reflection layer and the second dielectric reflection layer for light emission from the side of the second dielectric reflection layer.

[0166] The specific description of the second dielectric reflection layer 180 can be referred to the above, and this step will not be repeated here.

[0167] The display substrate 100 in the second embodiment can also add the driving substrate 200, the current diffusion electrode 170, the common transparent electrode 160 and the second dielectric reflection layer 180 according to steps S600-S1100, and this embodiment will not be repeated here.

[0168] Of course, in other embodiments, the display substrate 100 and the driving substrate 200 in the Micro-LED display device 10 can be connected by hybrid bonding.

[0169] In some embodiments, after step S500, a first bonding dielectric layer 190 can be formed on the side of the first dielectric reflection layer 140 away from the pixel transparent electrode 130, and then the first bonding dielectric layer 190 is etched to form a plurality of second vias 191, and a plurality of extension electrodes 1000 are added in the first vias 141, the plurality of extension electrodes 1000 correspond to and are electrically connected with the plurality of lead electrodes 150. The driving substrate 200 can also include a second bonding dielectric layer 210 and a plurality of power supply electrodes 220.

[0170] Further, the display substrate 100 is inverted on the driving substrate 200 in a manner that the plurality of extension electrodes 1000 face the plurality of power supply electrodes 220, and the plurality of power supply electrodes 220 and the plurality of extension electrodes 1000 are bonded to each other by surface activated bonding, and the first bonding medium layer 190 and the second bonding medium layer 210 are bonded to each other. Then, a high-temperature annealing process is performed to realize the electrical connection between the plurality of extension electrodes 1000 and the driving substrate 200. After the bonding is realized, the substrate 300 is removed, and the second semiconductor layer 113 is exposed.

[0171] Since the first bonding medium layer 190 separates the plurality of extension electrodes 1000, and the second bonding medium layer 210 separates the plurality of power supply electrodes 220, when the first recessed area 1121 is formed later, the depth of the first recessed area 1121 is less than the thickness of the second semiconductor layer 113. Then, the current diffusion electrode 170 is filled in the first recessed area 1121, and the current diffusion electrode 170 is electrically connected to the second semiconductor. Further, the common transparent electrode 160 and the second medium reflective layer 180 are sequentially covered on the side of the second semiconductor opposite to the active layer 112. The common transparent electrode 160 electrically connects the second semiconductor layer 113 and the current diffusion electrode 170, and the reflectivity of the second medium reflective layer 180 is less than that of the first medium reflective layer 140.

[0172] In summary, the application is provided with a plurality of pixel transparent electrodes 130 on the side of the first semiconductor of the light-emitting epitaxial layer 110 to supply power to the light-emitting epitaxial layer 110, wherein the plurality of pixel transparent electrodes 130 have a plurality of first electrode areas 131 and a plurality of second electrode areas 132, the plurality of first electrode areas 131 are spaced apart from the current blocking layer 120, the first electrode area 131 covers and electrically connects the first semiconductor layer 111 to form a display pixel area of the Micro-LED display device 10, and the second electrode area 132 of the pixel transparent electrode 130 covers the side of the current blocking layer 120 away from the first semiconductor layer 111. The first dielectric reflective layer 140 further covers the side of the pixel transparent electrode 130 away from the first semiconductor layer 111, and the first dielectric reflective layer 140 can reflect light to the other side, thereby improving the collimation of the light-emitting angle of the Micro-LED display device 10 and improving the optical efficiency of the Micro-LED display device 10. Moreover, the first dielectric reflective layer 140 is provided with a plurality of first vias 141 overlapping the plurality of second electrode areas 132 and the current blocking layer 120, a plurality of lead electrodes 150 are filled in the plurality of first vias 141 and electrically connected with the plurality of second electrode areas 132, and an external circuit can supply power to the plurality of second electrode areas 132 through the plurality of lead electrodes 150, and the plurality of second electrode areas 132 supply power to the plurality of first electrode areas 131. Therefore, the display pixel area of the light-emitting epitaxial layer 110 corresponds to the first electrode area 131, and the side of the first electrode area 131 opposite to the light-emitting epitaxial layer 110 is completely covered by the first dielectric reflective layer 140, and the first electrode area 131 contacts the current through the second electrode area 132 not corresponding to the display pixel area and the lead electrode 150. Therefore, when the display pixel area corresponding to the plurality of first electrode areas 131 emits light, the light is reflected by the first dielectric reflective layer 140 when conducting to the side of the first electrode area 131, and the light is emitted from the light-emitting side, thereby further improving the collimation of the light-emitting angle of the Micro-LED display device 10, reducing the light leakage, and improving the light-emitting efficiency of the Micro-LED display device 10.

[0173] The above is only an embodiment of the application, and does not limit the patent scope of the application. Any equivalent structure or equivalent process transformation using the content of the specification and drawings, or direct or indirect application in other related technical fields, is also included in the patent protection scope of the application.

Claims

1. A Micro-LED display device, characterized in that, The Micro-LED display device comprises a display substrate, the display substrate comprises: a light-emitting epitaxial layer comprising a first semiconductor layer, an active layer and a second semiconductor layer arranged in sequence along a predetermined stacking direction; a current blocking layer arranged on a side of the first semiconductor layer away from the active layer and partially exposing the first semiconductor layer; a plurality of pixel transparent electrodes spaced apart from each other and arranged in an array, each of the pixel transparent electrodes comprising a first electrode region and a second electrode region, wherein the first electrode region covers and forms an electrically conductive connection with the exposed part of the first semiconductor layer from the current blocking layer, and the second electrode region is arranged on a side of the current blocking layer away from the first semiconductor layer; a first dielectric reflective layer covering the plurality of pixel transparent electrodes and provided with a plurality of first vias, each of the first vias has a projection falling into an overlapping area of the second electrode region of the corresponding pixel transparent electrode and the current blocking layer along the stacking direction; a plurality of lead electrodes, each of the lead electrodes is arranged in the corresponding first via, and the lead electrode is electrically connected to the corresponding second electrode region and supplies power to the corresponding first electrode region through the second electrode region.

2. The Micro-LED display device of claim 1, wherein, The current blocking layer is provided with a plurality of first openings spaced apart from each other and arranged in an array, the first electrode region is arranged in the corresponding first opening, and the second electrode region, the first via and the lead electrode are arranged around the first electrode region.

3. The Micro-LED display device of claim 1, wherein, The current blocking layer comprises a plurality of current blocking patterns spaced apart from each other and arranged in an array, the second electrode region is arranged on a side of the corresponding current blocking pattern away from the first semiconductor layer, and the first electrode region is arranged around the second electrode region. 4.The Micro-LED display device of any one of claims 1-3, wherein, The display substrate further comprises a common transparent electrode and a current diffusion electrode, a first recessed area is arranged on a side of the second semiconductor layer away from the active layer, the current diffusion electrode is arranged in the first recessed area, and the current diffusion electrode and the first recessed area are arranged in a grid shape when viewed along the stacking direction to form a plurality of light-emitting areas spaced apart from each other and arranged in an array, the first electrode region is at least partially arranged in the corresponding light-emitting area along the stacking direction, the common transparent electrode covers the second semiconductor layer and the current diffusion electrode and is electrically connected to the current diffusion electrode, and the conductivity of the current diffusion electrode is greater than that of the common transparent electrode.

5. The Micro-LED display apparatus of claim 4, wherein, In the stacking direction, the depth of the first recessed area is less than the thickness of the second semiconductor layer, and the current diffusion electrode is further electrically connected to the second semiconductor layer.

6. The Micro-LED display apparatus of claim 4, wherein, The display substrate further comprises a second dielectric reflective layer arranged on a side of the common transparent electrode away from the second semiconductor layer, the reflectivity of the second dielectric reflective layer is less than that of the first dielectric reflective layer, so as to form a resonant cavity emitting light from the side of the second dielectric reflective layer between the first dielectric reflective layer and the second dielectric reflective layer.

7. The Micro-LED display apparatus of claim 4, wherein, The display substrate further comprises a metal bonding layer disposed on a side of the first dielectric reflective layer away from the first semiconductor layer, the first recessed region extends to the metal bonding layer along the stacking direction to divide the metal bonding layer into a plurality of metal bonding patterns spaced apart from each other, each of the metal bonding patterns is respectively conductively connected with a corresponding one of the lead electrodes, and the Micro-LED display device further comprises a driving substrate comprising a plurality of power supply electrodes spaced apart from each other and arranged in an array, and each of the metal bonding patterns is further bonded with a corresponding one of the power supply electrodes.

8. The Micro-LED display apparatus of claim 7, wherein, The current diffusion electrode at least extends to the first dielectric reflective layer and is at least electrically insulated from the first semiconductor, the active layer and the metal bonding pattern.

9. The Micro-LED display device of any one of claims 1-3, wherein, The display substrate further comprises a first bonding dielectric layer disposed on a side of the first dielectric reflective layer away from the first semiconductor layer, a plurality of second vias are disposed on the first bonding dielectric layer, each of the second vias is in communication with a corresponding one of the first vias, and a plurality of extension electrodes are disposed in corresponding ones of the second vias, the Micro-LED display device further comprises a driving substrate comprising a second bonding dielectric layer and a plurality of power supply electrodes, a plurality of third vias are disposed on the second bonding dielectric layer, and each of the power supply electrodes is disposed in a corresponding one of the third vias, the first bonding dielectric layer and the second bonding dielectric layer are bonded with each other, and the extension electrodes are respectively bonded with corresponding ones of the power supply electrodes.

10. A method for manufacturing a Micro-LED display device, comprising: forming a light-emitting epitaxial layer on a substrate, wherein the light-emitting epitaxial layer comprises a first semiconductor layer, an active layer and a second semiconductor layer sequentially stacked along a predetermined stacking direction, and the first semiconductor layer is located on a side of the light-emitting epitaxial layer away from the substrate; forming a current blocking layer on a side of the first semiconductor layer away from the active layer, wherein the current blocking layer partially exposes the first semiconductor layer; forming a plurality of pixel transparent electrodes on a side of the first semiconductor layer away from the active layer, wherein the plurality of pixel transparent electrodes are spaced apart from each other and arranged in an array, each of the pixel transparent electrodes comprises a first electrode region and a second electrode region, the first electrode region covers and forms a conductive connection with the exposed portion of the first semiconductor layer from the current blocking layer, and the second electrode region covers a side of the current blocking layer away from the first semiconductor layer; forming a first dielectric reflective layer covering the plurality of pixel transparent electrodes, and forming a plurality of first vias on the first dielectric reflective layer, wherein a projection of each of the first vias along the stacking direction falls within an overlapping region of the second electrode region of a corresponding one of the pixel transparent electrodes and the current blocking layer; forming a lead electrode in each of the plurality of first vias, wherein each of the lead electrodes is electrically connected with a corresponding one of the second electrode regions and supplies power to a corresponding one of the first electrode regions through the second electrode region.

11. The method of claim 10, wherein, The method further comprises: forming a metal bonding layer on a side of the first dielectric reflective layer facing away from the first semiconductor layer, wherein the metal bonding layer is electrically connected with the plurality of the lead electrodes; bonding the metal bonding layer with a plurality of power supply electrodes of a driving substrate; removing the substrate, and forming a first recessed area on a side of the second semiconductor layer facing away from the active layer, wherein the first recessed area extends to the metal bonding layer along the stacking direction to divide the metal bonding layer into a plurality of metal bonding patterns spaced apart from each other, each of the metal bonding patterns is electrically connected with a corresponding lead electrode and power supply electrode, respectively.

12. The method of claim 11, wherein, The method further comprises: forming a current diffusion electrode in the first recessed area, wherein the current diffusion electrode and the first recessed area are arranged in a grid shape when viewed along the stacking direction to form a plurality of light emitting areas spaced apart from each other and arranged in an array, and the first electrode area at least partially falls within a corresponding light emitting area along the stacking direction; forming a common transparent electrode covering the second semiconductor layer and the current diffusion electrode, wherein the common transparent electrode is electrically connected with the current diffusion electrode, and the current diffusion electrode has a higher electrical conductivity than the common transparent electrode; forming a second dielectric reflective layer on a side of the common transparent electrode facing away from the second semiconductor layer, wherein the second dielectric reflective layer has a lower reflectivity than the first dielectric reflective layer to form a resonant cavity between the first dielectric reflective layer and the second dielectric reflective layer for emitting light from the side of the second dielectric reflective layer.

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