Communication method and apparatus

Abstract

A communication method and apparatus, which relate to the technical field of communications, and enable rate matching for an encoded code block when a code block is encoded using a spatially coupled code. The method comprises: a sending end device encoding a first code block using a spatially coupled code, in order to obtain L+1 first sub-blocks; performing rate matching on an i-th first sub-block among the L+1 first sub-blocks, in order to obtain an i-th second sub-block having a length of Ei'; and outputting a second code block having a length of E, wherein L is a coupling chain length of the spatially coupled code; E'1+E'2+…+E'L+1=E, E is a length corresponding to the first code block after the rate matching, i=0, 1, …, L, and the second code block comprises L+1 second sub-blocks; and the difference between lengths of information bits of any two second sub-blocks among 0-th to (L-1)-th second sub-blocks is less than or equal to a first preset threshold value, and the difference between lengths of check bits of any two second sub-blocks among 0-th to L-th second sub-blocks is less than or equal to a second preset threshold value.

Description

Communication methods and devices

[0001] This application claims priority to Chinese Patent Application No. 202411545877.9, filed with the State Intellectual Property Office of China on October 30, 2024, entitled "Communication Method and Apparatus", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of communication technology, and in particular to communication methods and apparatus. Background Technology

[0003] In a communication system, the transmitting device can encode one or more code blocks (CBs) corresponding to a transport block (TB) based on a low-density parity-check code (LDPC), and perform rate matching on each of the one or more CBs after encoding.

[0004] Spatially coupled (SC)-LDPC is a special type of LDPC that can encode CBs using a sliding window approach, simplifying the encoding process. How to perform rate matching on the encoded CBs when encoding them using SC-LDPC is a pressing issue. Summary of the Invention

[0005] This application provides a communication method and apparatus that can perform rate matching on the encoded CB when spatially coupled code encoding the CB.

[0006] Firstly, this application provides a communication method that can be executed by a transmitting device. Unless otherwise specified, "transmitting device" in this application can refer to the transmitting device itself, a component within the transmitting device (e.g., a processor, chip, or chip system), or a logic module or software capable of implementing all or part of the functions of the transmitting device. The method includes: the transmitting device performing spatial coupling code encoding on a first code block to obtain L+1 first sub-blocks; and performing rate matching on the i-th first sub-block among the L+1 first sub-blocks to obtain a sub-block of length E′. i The i-th second sub-block; the output second code block of length E; where L is the length of the coupling chain of the spatially coupled code; E′ i For positive integers, E′1+E′2+…+E′ L+1=E, where E is the length of the first code block after rate matching. The i-th second sub-block does not include the code block padding bits in the i-th first sub-block; i = 0, 1, ..., L; the difference in the length of the information bits of any two second sub-blocks from the 0th to the (L-1)th second sub-block is less than or equal to the first preset threshold; the difference in the length of the check bits of any two second sub-blocks from the 0th to the Lth second sub-block is less than or equal to the second preset threshold; the second code block includes L+1 second sub-blocks.

[0007] Based on the first aspect, on the one hand, when spatially coupled coding is applied to the first code block, rate matching can be performed on each of the L+1 first sub-blocks to achieve rate matching of the encoded first code block and the codewords, thus flexibly supporting code length and code rate to adapt to air interface resources. On the other hand, since the difference in the length of the information bits of any two second sub-blocks from the 0th to the (L-1th)th second sub-blocks is less than or equal to a first preset threshold, the information bits of the 0th to the (L-1th)th second sub-blocks can be evenly distributed in the second code block. Furthermore, since the difference in the length of the parity bits of any two second sub-blocks from the 0th to the Lth second sub-blocks is less than or equal to a second preset threshold, the parity bits of the L+1 second sub-blocks can be evenly distributed in the second code block. This allows for uniform perforation of the parity check matrix of the determined first sub-block, preserving as many parity check equations as possible, thereby improving the decoding performance of the communication system.

[0008] Secondly, this application provides a communication method that can be executed by a receiving device. Unless otherwise specified, "receiving device" in this application can refer to the receiving device itself, a component within the receiving device (e.g., a processor, chip, or chip system), or a logic module or software capable of implementing all or part of the functions of the receiving device. The method includes: the receiving device receiving information to be decoded; and determining the length E′ of each of the L+1 third sub-blocks based on the coupling chain length L of the spatial coupling code and the length E of the first code block. i Based on the information to be decoded and E′ i First, determine L+1 third sub-blocks; then, perform rate matching on the L+1 third sub-blocks to obtain L+1 fourth sub-blocks; finally, decode the L+1 fourth sub-blocks to obtain the decoding result. The information to be decoded corresponds to the second code block; i = 0, 1, ..., L, E′ i For positive integers, E′1+E′2+…+E′ L+1=E; In the 0th to L-1th third sub-blocks, the difference in the length of the information bits of any two third sub-blocks is less than or equal to the first preset threshold; In the 0th to Lth second sub-blocks, the difference in the length of the check bits of any two second sub-blocks is less than or equal to the second preset threshold.

[0009] Based on the second aspect, the receiving device can determine the length of each of the L+1 third sub-blocks according to L and E, and then perform rate matching on each third sub-block according to the length of each third sub-block, which can flexibly support code length and code rate.

[0010] Combining the first and second aspects, one possible implementation is E′ i Determined according to one or more of the following: E, L, X, the length of the i-th first sub-block, the length of the information bits in the i-th first sub-block, the length of the code block padding bits in the i-th first sub-block, or the length of the parity bits in the i-th first sub-block; wherein, X is the number of repetitions of the bit sequence other than the code block padding bits in the L+1 first sub-blocks.

[0011] Based on this possible implementation, the length of each of the L+1 second sub-blocks can be determined according to one or more of the above parameters, providing a feasible solution for determining the length of the second sub-blocks.

[0012] Combining the first and second aspects, one possible implementation is that X is the floor function of the ratio of E to the first value; where the first value is the sum of the lengths of all bits in the L+1 first sub-blocks except for the code block padding bits.

[0013] Based on this possible implementation, by determining the floor result of the ratio of E to the first value, the number of times the bit sequence in the L+1 first sub-blocks, excluding the code block padding bits, can be repeatedly transmitted can be determined. When the rate is matched, the bit sequence in each of the L+1 first sub-blocks, excluding the code block padding bits, can be repeatedly transmitted X times.

[0014] Combining the first and second aspects, one possible implementation is that, when the second value is less than or equal to the length of the first code block, the length E′ of the j-th second sub-block is... j The values ​​are determined based on E, L, X, the length of the j-th first sub-block, and the length of the code block padding bits in the j-th first sub-block; where j = 0, 1, ..., L-1; the second value is the difference between E and the first product, the first product is the product of X and the first value, the first value is the sum of the lengths of all bits in the L+1 first sub-blocks except for the CB padding bits, and X is the number of repetitions of the bit sequence in the L+1 first sub-blocks except for the code block padding bits.

[0015] Combining the first and second aspects, one possible implementation is E′ j The first ratio is determined based on the first ratio, X, the length of the j-th first sub-block, and the length of the code block padding bits in the j-th first sub-block; wherein the first ratio is the ratio of the second value to L.

[0016] Combining the first and second aspects, one possible implementation is that the length E′ of the a-th second sub-block is... a Satisfy the following formula: Where a = 0, 1, ..., L-β1-1, To round down, F CB,a N is the length of the padding bits in the first sub-block of the a-th sub-block. l,a E′ represents the length of the first sub-block (e-th 'a') and the length of the second sub-block (e-th 'b'). b Satisfy the following formula: Where b = L-β1, L-β1+1, ..., L-1, To round up, F CB,b N is the length of the padding bits in the first sub-block of the b-th sub-block. l,b Let b be the length of the first sub-block. Let β1 be the first ratio, Y be the second value, and β1 = E mod L.

[0017] Based on the three possible implementations mentioned above, a feasible solution is provided for determining the length of each second sub-block from the 0th to the (L-1th)th second sub-block when the second value is less than or equal to the length of the first code block. Here, the second value is the length of the bits that still need to be transmitted after L+1 first sub-blocks are repeatedly transmitted X times (also called the length of the remaining bits). The fact that the second value is less than or equal to the length of the first code block can be understood as the length of the remaining bits being less than or equal to the sum of the lengths of the information bits in the 0th to the (L-1th)th first sub-blocks. This can be achieved by determining multiple information bits in the 0th to the (L-1th)th first sub-blocks to ensure that the difference in the length of the information bits between any two second sub-blocks is less than or equal to a first preset threshold. This allows the information bits in the 0th to the (L-1th)th second sub-blocks to be evenly distributed in the second code block, and allows for uniform perforation of the parity check matrix used to determine the first sub-blocks. This, in turn, preserves as many parity check equations as possible, improving the decoding performance of the communication system.

[0018] Combining the first and second aspects, one possible implementation is that, when the second value is less than or equal to the length of the first code block, the length E′ of the Lth second sub-block is... LThe value is determined based on X and the length of the Lth first sub-block; where the second value is the difference between E and the first product, the first product is the product of X and the first value, the first value is the sum of the lengths of all bits in the L+1 first sub-blocks except for the CB padding bits, and X is the number of repetitions of the bit sequence in the L+1 first sub-blocks except for the code block padding bits.

[0019] Combining the first and second aspects, one possible implementation is E′ L X is the product of the length of X and the length of the Lth first sub-block.

[0020] Based on the two possible implementations mentioned above, when the second value is less than or equal to the length of the first code block, the Lth first sub-block can be transmitted X times, which can make the length of the parity bits of the L+1 second sub-blocks the same, and make the parity bits in the 0th to Lth second sub-blocks evenly distributed in the second code block. It can also make the parity matrix of the first sub-block uniformly punched, thereby preserving as many parity equations as possible and improving the decoding performance of the communication system.

[0021] Combining the first and second aspects, one possible implementation is that, when the second value is greater than the length of the first code block, the length E′ of the j-th second sub-block is... j The values ​​are determined based on E, L, X, the length of the j-th first sub-block, the length of the information bits in the j-th first sub-block, and the length of the code block padding bits in the j-th first sub-block; where j = 0, 1, ..., L-1; the second value is the difference between E and the first product, the first product is the product of X and the first value, the first value is the sum of the lengths of all bits in the L+1 first sub-blocks except for the CB padding bits, and X is the number of repetitions of the bit sequence in the L+1 first sub-blocks except for the code block padding bits.

[0022] Combining the first and second aspects, one possible implementation is E′ j The value is determined based on the second ratio, X, the length of the j-th first sub-block, the length of the information bits in the j-th first sub-block, and the length of the code block padding bits in the j-th first sub-block; wherein, the second ratio is the ratio of the first difference to (L+1), and the first difference is the difference between the second value and the length of the first code block.

[0023] Combining the first and second aspects, one possible implementation is that the length E′ of the c-th second sub-block is... c Satisfy the following formula: Where c = 0, 1, ..., L-β²-1, To round down, F CB,c N is the length of the padding bits in the c-th first sub-block. l,cK is the length of the c-th first sub-block. l,c E′ represents the length of the information bits in the c-th first sub-block; E′ represents the length of the d-th second sub-block. d Satisfy the following formula: Where d = L-β2, L-β2+1, ..., L-1, To round up, F CB,d N is the length of the padding bits in the first sub-block of the d-th sub-block. l,d K is the length of the d-th first sub-block. l,d Let d be the length of the information bits in the first sub-block. Z is the second ratio, and β2 = E mod(L+1).

[0024] Based on the three possible implementations mentioned above, a feasible solution is provided for determining the length of each second sub-block from the 0th to the (L-1th)th second sub-block when the second value is greater than the length of the first code block. Here, the second value is the length of the bits that still need to be transmitted after L+1 first sub-blocks are repeatedly transmitted X times (also called the length of the remaining bits). The second value being greater than the length of the first code block can be understood as the length of the remaining bits being greater than the sum of the lengths of the information bits in the 0th to the (L-1th)th first sub-blocks. This can be achieved by determining all the information bits in the 0th to the (L-1th)th first sub-blocks, ensuring that the difference in the length of the information bits between any two second sub-blocks from the 0th to the (L-1th)th second sub-blocks is less than or equal to a first preset threshold. This allows the 0th to... Information bits in the second sub-block to the (L-1)th second sub-block are evenly distributed in the second code block. In addition, multiple parity bits can be determined in the 0th to the (L-1)th first sub-block to ensure that the difference in length between any two second sub-blocks in the 0th to the (L-1)th second sub-block is less than or equal to a second preset threshold. This allows the parity bits in the 0th to the (L-1)th second sub-block to be evenly distributed in the second code block. It also allows for uniform perforation of the parity matrix of the determined first sub-block, thereby preserving as many parity equations as possible and improving the decoding performance of the communication system.

[0025] Combining the first and second aspects, one possible implementation is that, when the second value is greater than the length of the first code block, the length E′ of the Lth second sub-block is... L The value is determined based on E, L, X, and the length of the Lth first sub-block; where the second value is the difference between E and the first product, the first product is the product of X and the first value, the first value is the sum of the lengths of all bits in the L+1 first sub-blocks except for the CB padding bits, and X is the number of times the bit sequence in the L+1 first sub-blocks except for the code block padding bits is repeated.

[0026] Combining the first and second aspects, one possible implementation is E′ L The ratio is determined based on the product of X and the length of the Lth first sub-block, and the second ratio; wherein the second ratio is the ratio of the first difference to (L+1), and the first difference is the difference between the second value and the length of the first code block.

[0027] Combining the first and second aspects, one possible implementation is when β2 = 0. Or, in the case where β2≠0, Where, N t Let L be the length of the first sub-block. The second ratio is β2 = E mod(L+1).

[0028] Based on the above three possible implementations, when the second value is greater than the length of the first code block, multiple bits can be determined in the Lth first sub-block after X retransmissions of the Lth first sub-block. This is to ensure that the difference in the length of the parity bits of any two second sub-blocks from the 0th to the Lth second sub-block is less than or equal to the second preset threshold. This can make the parity bits in the L+1 second sub-blocks evenly distributed in the second code block, and can evenly punch holes in the parity matrix of the determined first sub-block. This can retain as many parity equations as possible and improve the decoding performance of the communication system.

[0029] Thirdly, this application provides a communication method that can be executed by a transmitting device. Unless otherwise specified, "transmitting device" in this application can refer to the transmitting device itself, a component within the transmitting device (e.g., a processor, chip, or chip system), or a logic module or software capable of implementing all or part of the functions of the transmitting device. The method includes: the transmitting device performing spatial coupling code encoding on a first code block to obtain an (L+1)th first sub-block; interleaving the (L+1)th first sub-blocks to obtain a first sequence; rate matching the bits in the first sequence, excluding code block padding bits, to obtain a second sequence of length E; and outputting the second sequence. Wherein, L is the length of the coupling chain of the spatial coupling code; the length of the first sequence is equal to the sum of the lengths of the (L+1)th first sub-blocks; and E is the rate-matched length corresponding to the first code block.

[0030] Based on the third aspect, on the one hand, when spatially coupled coding is applied to the first code block, the L+1 first sub-blocks can be interleaved to obtain the first sequence, and rate matching can be performed on the first sequence to achieve rate matching of the encoded first code block. Furthermore, this allows the information bits or parity bits in the L+1 first sub-blocks to be evenly distributed in the first sequence, enabling uniform perforation of the parity-check matrix determining the first sub-block, and preserving as many parity-check equations as possible, thereby improving the decoding performance of the communication system. On the other hand, compared to rate matching of each of the L+1 first sub-blocks, the scheme of interleaving the L+1 first sub-blocks to obtain the first sequence and then rate matching the first sequence reduces computational complexity and simplifies implementation.

[0031] One possible implementation is that the transmitting device performs row-column interleaving on L+1 first sub-blocks.

[0032] One possible implementation is that the first Q bits of the first sequence include information bits and code block padding bits from the 0th to the (L-1th)th first sub-blocks, and the last NQ bits of the first sequence include parity bits from the 0th to the Lth first sub-blocks; where Q is the sum of the lengths of the information bits and code block padding bits from the 0th to the (L-1th)th first sub-blocks, and N is the length of the first sequence.

[0033] Based on the two possible implementations mentioned above, a feasible solution is provided for interleaving L+1 first sub-blocks.

[0034] Fourthly, this application provides a communication method that can be executed by a receiving device. Unless otherwise specified, "receiving device" in this application can refer to the receiving device itself, a component within the receiving device (e.g., a processor, chip, or chip system), or a logic module or software capable of implementing all or part of the functions of the receiving device. The method includes: the receiving device receiving information to be decoded; performing rate matching on a third sequence to obtain a fourth sequence; deinterleaving the fourth sequence to obtain L+1 second sub-blocks; and decoding the L+1 second sub-blocks to obtain a decoding result. The information to be decoded includes a third sequence of length E corresponding to a first code block; L is the coupling chain length of the spatial coupling code.

[0035] Based on the fourth aspect, the transmitting device can perform rate matching on the third sequence to obtain the fourth sequence, and then deinterleave the fourth sequence to obtain L+1 second sub-blocks. Compared with deinterleaving the L+1 sub-blocks, the computational complexity can be reduced and the implementation can be simplified.

[0036] One possible implementation is that the receiving device performs row-column interleaving on the fourth sequence.

[0037] Based on this possible implementation, a feasible solution is provided for deinterleaving the fourth sequence.

[0038] Fifthly, embodiments of this application provide a communication device that can be applied to the transmitting end device described in the first aspect to realize the functions performed by the transmitting end device. The communication device can be the transmitting end device itself, or it can be a chip, chip system, or system-on-a-chip of the transmitting end device, etc. The communication device can execute the functions performed by the transmitting end device through hardware, or it can execute corresponding software through hardware. The hardware or software includes one or more modules corresponding to the above functions. For example, a transceiver module and a processing module. The transceiver module can independently complete the following transceiver operations, or it can cooperate with the processing module to complete the following transceiver operations; correspondingly, the processing module can independently complete the following processing operations, or it can cooperate with the transceiver module to complete the following processing operations, without limitation.

[0039] For example, the processing module is used to perform spatial coupling code encoding on the first code block to obtain L+1 first sub-blocks; where L is the coupling chain length of the spatial coupling code; the processing module is also used to perform rate matching on the i-th first sub-block among the L+1 first sub-blocks to obtain a length of E′ i The i-th second sub-block; where E′ i For positive integers, E′1+E′2+…+E′ L+1 =E, where E is the length of the first code block after rate matching, and the i-th second sub-block does not include the code block padding bits in the i-th first sub-block; i = 0, 1, ..., L; the difference in the length of the information bits of any two second sub-blocks from the 0th to the (L-1)th second sub-block is less than or equal to the first preset threshold; the difference in the length of the check bits of any two second sub-blocks from the 0th to the Lth second sub-block is less than or equal to the second preset threshold; transceiver module, used to output a second code block of length E; wherein, the second code block includes L+1 second sub-blocks.

[0040] Optionally, the transceiver module and processing module of the communication device in the fifth aspect may also perform the corresponding functions in the first aspect or any possible design of the first aspect, as detailed in the method examples, and the beneficial effects that can be achieved can also be found in the foregoing related content.

[0041] Sixthly, embodiments of this application provide a communication device that can be applied to the receiving device described in the second aspect to realize the functions performed by the receiving device. The communication device can be the receiving device itself, or it can be a chip, chip system, or system-on-a-chip of the receiving device, etc. The communication device can execute the functions performed by the receiving device through hardware, or it can execute corresponding software through hardware. The hardware or software includes one or more modules corresponding to the above functions. For example, a transceiver module and a processing module. The transceiver module can independently complete the following transceiver operations, or it can cooperate with the processing module to complete the following transceiver operations; correspondingly, the processing module can independently complete the following processing operations, or it can cooperate with the transceiver module to complete the following processing operations, without limitation.

[0042] For example, the transceiver module is used to receive information to be decoded; wherein the information to be decoded corresponds to a second code block; the processing module is used to determine the length E′ of each of the L+1 third sub-blocks based on the coupling chain length L of the spatially coupled code and the length E of the second code block. i i = 0, 1, ..., L, E′ i For positive integers, E′1+E′2+…+E′ L+1 =E; In the 0th to L-1th third sub-blocks, the difference in the length of the information bits of any two third sub-blocks is less than or equal to a first preset threshold; In the 0th to Lth second sub-blocks, the difference in the length of the check bits of any two second sub-blocks is less than or equal to a second preset threshold; The processing module is further configured to, based on the information to be decoded and E′ i The processing module determines L+1 third sub-blocks; it also performs rate matching on the L+1 third sub-blocks to obtain L+1 fourth sub-blocks; and it further decodes the L+1 fourth sub-blocks to obtain the decoding result.

[0043] Optionally, the transceiver module and processing module of the communication device in the sixth aspect may also perform the corresponding functions in the second aspect or any possible design of the second aspect, as detailed in the method examples, and the beneficial effects that can be achieved can also be found in the foregoing related content.

[0044] Seventhly, embodiments of this application provide a communication device that can be applied to the transmitting end device described in the third aspect to realize the functions performed by the transmitting end device. The communication device can be the transmitting end device itself, or it can be a chip, chip system, or system-on-a-chip of the transmitting end device, etc. The communication device can execute the functions performed by the transmitting end device through hardware, or it can execute corresponding software through hardware. The hardware or software includes one or more modules corresponding to the above functions. For example, a transceiver module and a processing module. The transceiver module can independently complete the following transceiver operations, or it can cooperate with the processing module to complete the following transceiver operations; correspondingly, the processing module can independently complete the following processing operations, or it can cooperate with the transceiver module to complete the following processing operations, without limitation.

[0045] For example, the processing module is used to encode the first code block using spatial coupling codes to obtain the (L+1)th first sub-block; where L is the length of the coupling chain of the spatial coupling code; the processing module is also used to interleave the (L+1)th first sub-blocks to obtain a first sequence; where the length of the first sequence is equal to the sum of the lengths of the (L+1)th first sub-blocks; the processing module is also used to perform rate matching on the bits in the first sequence except for the code block padding bits to obtain a second sequence of length E; where E is the length of the rate-matched first code block; the transceiver module is used to output the second sequence.

[0046] Optionally, the transceiver module and processing module of the communication device in the seventh aspect may also perform the corresponding functions in the third aspect or any possible design of the third aspect, as detailed in the method examples, and the beneficial effects that can be achieved can also be found in the foregoing related content.

[0047] Eighthly, embodiments of this application provide a communication device that can be applied to the receiving device described in the fourth aspect to realize the functions performed by the receiving device. The communication device can be the receiving device itself, or it can be a chip, chip system, or system-on-a-chip of the receiving device. The communication device can execute the functions performed by the receiving device through hardware or through corresponding software. The hardware or software includes one or more modules corresponding to the functions described above. For example, a transceiver module and a processing module. The transceiver module can independently complete the following transceiver operations or cooperate with the processing module to complete the following transceiver operations; correspondingly, the processing module can independently complete the following processing operations or cooperate with the transceiver module to complete the following processing operations, without limitation.

[0048] For example, the transceiver module is used to receive information to be decoded; wherein, the information to be decoded includes a third sequence of length E corresponding to the first code block; the processing module is used to perform rate matching on the third sequence to obtain a fourth sequence; the processing module is also used to deinterleave the fourth sequence to obtain L+1 second sub-blocks; wherein, L is the coupling chain length of the spatially coupled code; the processing module is also used to decode the L+1 second sub-blocks to obtain a decoding result.

[0049] Optionally, the transceiver module and processing module of the communication device in the eighth aspect may also perform the corresponding functions in the fourth aspect or any possible design of the fourth aspect, as detailed in the method examples, and the beneficial effects that can be achieved can also be found in the foregoing related content.

[0050] Ninthly, embodiments of this application provide a communication device, the communication device including one or more processors; the one or more processors are configured to run computer programs or instructions, such that when the one or more processors execute the computer instructions or instructions, the communication method described in any one of the first to fourth aspects is executed.

[0051] In one possible design, the communication device further includes one or more memories coupled to one or more processors, the memories used to store the aforementioned computer programs or instructions. In one possible implementation, the memories are located outside the communication device. In another possible implementation, the memories are located inside the communication device. In embodiments of this application, the processor and memory may also be integrated into a single device, i.e., the processor and memory may be integrated together. In one possible implementation, the communication device further includes a transceiver for receiving and / or transmitting information.

[0052] In one possible design, the communication device further includes one or more communication interfaces coupled to one or more processors, and the communication interfaces are used to communicate with other modules outside the communication device.

[0053] In a tenth aspect, embodiments of this application provide a communication device, which includes an interface circuit and a logic circuit; the interface circuit is used to input and / or output information; the logic circuit is used to perform the communication method as described in any one of the first to fourth aspects, and to process and / or generate information based on the information.

[0054] Eleventhly, embodiments of this application provide a computer-readable storage medium storing computer instructions or programs that, when executed on a computer, cause the communication method described in any one of the first to fourth aspects to be performed.

[0055] In a twelfth aspect, embodiments of this application provide a computer program product containing computer instructions that, when run on a computer, causes the communication method described in any one of the first to fourth aspects to be executed.

[0056] In a thirteenth aspect, embodiments of this application provide a computer program that, when run on a computer, causes the communication method described in any one of the first to fourth aspects to be executed.

[0057] In a fourteenth aspect, embodiments of this application provide a chip, including: a processor coupled to a memory for storing programs or instructions, wherein when the program or instructions are executed by the processor, a communication method as described in any one of the first to fourth aspects is executed.

[0058] The technical effects of any of the design methods in aspects five through fourteen are similar to those in aspects one through four, and will not be elaborated upon further.

[0059] In a fifteenth aspect, embodiments of this application provide a communication system that may include communication means for performing the communication described in the first aspect or any possible design of the first aspect, and communication means for performing the communication described in the second aspect or any possible design of the second aspect; or, the communication system may include communication means for performing the communication described in the third aspect or any possible design of the third aspect, and communication means for performing the communication described in the fourth aspect or any possible design of the fourth aspect. Attached Figure Description

[0060] Figure 1 is a schematic diagram of a Tanner diagram provided in an embodiment of this application;

[0061] Figure 2 is a schematic diagram of a verification matrix provided in an embodiment of this application;

[0062] Figure 3 is a schematic diagram of SC-LDPC encoding of code blocks provided in an embodiment of this application;

[0063] Figure 4 is a schematic diagram of a communication system provided in an embodiment of this application;

[0064] Figure 5 is a schematic diagram of another communication system provided in an embodiment of this application;

[0065] Figure 6 is a schematic diagram of encoding and decoding performed by a transmitting end device and a receiving end device according to an embodiment of this application;

[0066] Figure 7 is a schematic diagram of the structure of a communication device provided in an embodiment of this application;

[0067] Figure 8 is a flowchart illustrating a communication method provided in an embodiment of this application;

[0068] Figure 9 is a schematic diagram of drilling holes in three first sub-blocks according to an embodiment of this application;

[0069] Figure 10 is a schematic diagram of a process for LDPC encoding of a transport block provided in an embodiment of this application;

[0070] Figure 11 is a schematic diagram of the distribution of CB padding bits provided in an embodiment of this application;

[0071] Figure 12 is a schematic diagram of an encoded L+1 sub-blocks provided in an embodiment of this application;

[0072] Figure 13 is a schematic diagram of a rate matching method provided in an embodiment of this application;

[0073] Figure 14 is a schematic diagram of rate matching for L+1 first sub-blocks provided in an embodiment of this application;

[0074] Figure 15 is a flowchart illustrating a communication method provided in an embodiment of this application;

[0075] Figure 16 is a schematic diagram of row and column interleaving provided in an embodiment of this application;

[0076] Figure 17 is a schematic diagram of another rate matching of L+1 first sub-blocks provided in an embodiment of this application;

[0077] Figure 18 is a schematic diagram of a verification matrix punching method provided in an embodiment of this application;

[0078] Figure 19 is a schematic diagram of the structure of a transmitting device provided in an embodiment of this application;

[0079] Figure 20 is a schematic diagram of the structure of a receiving device provided in an embodiment of this application;

[0080] Figure 21 is a schematic diagram of a communication device provided in an embodiment of this application;

[0081] Figure 22 is a schematic diagram of an encoding processing unit chip architecture provided in an embodiment of this application;

[0082] Figure 23 is a schematic diagram of a decoding processing unit chip architecture provided in an embodiment of this application. Detailed Implementation

[0083] Before describing the embodiments of this application, the technical terms involved in the embodiments of this application will be described.

[0084] Channel coding: Channel coding is one of the core technologies in the field of wireless communication. The complete process of channel coding includes adding cyclic redundancy check (CRC) bits, code block (CB) segmentation, error correction coding, rate adaptation (or rate matching), code block concatenation, data interleaving, and data scrambling. The purpose of error correction coding is to ensure that the receiving device can automatically correct errors that occur during data transmission with minimal redundancy overhead. It is understandable that, for the same bit error rate, the smaller the required redundancy overhead, the higher the coding efficiency. For example, channel coding can include linear block codes (such as Hamming codes, Gray codes, Bose-Chaudhuri-Hocquenghem (BCH) codes, Reed-Solomon (RS) codes, etc.), convolutional codes, and concatenated codes. These codes have their own different characteristics and performance, and can be applied to different communication scenarios.

[0085] In third-generation (3G) and fourth-generation (4G) communication systems, Turbo codes were used as the encoding and decoding technology defined by the Third Generation Partnership Project (3GPP) standard. Turbo codes are convolutional codes and can approach the limits of Shannon theory. However, in fifth-generation (5G) communication systems, the data transmission rate is orders of magnitude higher than that of 4G. For Turbo codes, the serial-processing-based decoder is difficult to effectively support the higher-speed data transmission. At the same time, 5G communication systems have also seen the emergence of other richer service application scenarios and new requirements for channel coding. For example, massive machine-type communication (mMTC) scenarios require smaller data packets, while ultra-reliable and low-latency communication (URLLC) scenarios have higher requirements for encoding and decoding latency and low bit error rate. Based on this, the 5G standard adopts low-density parity check (LDPC) codes and polar codes.

[0086] LDPC: LDPC is a linear block code whose parity-check matrix (PCM) exhibits sparse characteristics, meaning that the proportion of 1s in the PCM is relatively small. For example, taking an LDPC with an information bit sequence of length K and a code length of N as an example, the dimension of its PCM H can be (NK) × N, and the codeword c corresponding to the information bit sequence can be defined by the PCM H as c = {c|Hc}. T =0, c∈{0,1} N}

[0087] In this system, each row of the parity-check matrix corresponds to a parity-check equation in the LDPC, and the NK parity-check equations correspond to the NK parity-check nodes of the LDPC. Each column of the parity-check matrix corresponds to a symbol in the LDPC, and the N symbols correspond to the N variable nodes of the LDPC. The non-zero elements h in the parity-check matrix... i,j This indicates that the i-th check node and the j-th variable node are connected. The number of non-zero elements in each row of the check matrix represents the degree of the check node, and the number of non-zero elements in each column represents the degree of the variable node. If all check nodes have the same degree, and all variable nodes also have the same degree, the LDPC corresponding to this check matrix can be called a regular code; otherwise, it is an irregular code. For example, taking a regular LDPC with a code length of 10 and a code rate of 1 / 2 as an example, its check matrix can be as follows: Where v0, v1, ..., v9 represent variable nodes, and c0, c1, ..., c4 represent check nodes.

[0088] Optionally, LDPC can also be represented by graphical models such as Tanner graphs, factor graphs, or tree graphs. For example, taking a Tanner graph as an example, the above verification matrix... As shown in Figure 1 below, the degree of a node (verification node or variable node) can be defined as the number of edges connected to that node.

[0089] Furthermore, the 5G communication system employs a Raptor-like LDPC structure. This LDPC's parity-check matrix includes a high-rate parity-check matrix (i.e., the core matrix) and an extended matrix (i.e., multi-rate coding is achieved by incrementally generating parity bits through an extended core matrix). For example, as shown in Figure 2, the LDPC parity-check matrix can be divided into five components: matrix A (the information bit portion of the core matrix), matrix B (the parity bit portion of the core matrix, with a double-diagonal structure), matrix C (an all-zero matrix), matrix D (the information bit portion of the extended matrix), and matrix E (the parity bit portion of the extended matrix, with a single-diagonal structure). Among these, matrices A and B form the complete core matrix (i.e., H). core The D matrix and the E matrix form an extended matrix (H). ext ).

[0090] Among them, the parity check matrix of LDPC is irregular, which leads to difficulties in storing and reading the parity check matrix and high encoding complexity. QC-LDPC is an important subset of LDPC. Its parity check matrix has quasi-cyclic characteristics, which facilitates memory storage and addressing, thereby greatly reducing the encoding and decoding complexity of LDPC.

[0091] Spatially Coupled (SC)-LDPC: SC-LDPC is an important subset of LDPC, and its parity-check matrix can be shown below: Among them, H sc The size is b(L+m) s )×cL,H sc Each column is composed of m s +1 submatrix of size b×c Composition, t represents time, column number L represents the length of the SC-LDPC coupling chain, m s The length of the coupling constraint. Matrix H sc The blank spaces in the matrix are all zeros.

[0092] To simplify the encoding process, m can be configured. s =1, that is, matrix H sc Each column in the matrix contains only two non-zero submatrices H0(t) and H1(t), and these submatrices remain unchanged at different times, denoted as H0 and H1 respectively. At this point, matrix H... sc It can be as follows: Additionally, it can be found in matrix H sc The tail parity matrix I (i.e., ...) is introduced in the lower right corner. ), to ensure matrix · sc The block error rate (BLER) is low. Matrix I is a b×b square matrix, which can be an identity matrix or a lower triangular matrix.

[0093] Based on matrix H sc When performing LDPC encoding, the information bit sequence can be divided into L sub-information bit sequences (e.g., x0, x1, ..., x...). L-1 (where L is the length of the SC-LDPC coupling chain), and thus a sliding window approach can be used to simplify the encoding of the L sub-information bit sequences. Specifically, as shown in Figure 3, the black block represents H0, and the white block represents H1. SC-LDPC encoding of x0 can be performed using H0 to obtain the encoded sub-block (corresponding to ① in Figure 3); SC-LDPC encoding of x1 can be performed using [H1, H0] to obtain the encoded sub-block (corresponding to ② in Figure 3); and so on, until x is determined. L-1 The corresponding encoded sub-block. Furthermore, x can be determined based on [H1I]. L-1The corresponding encoded sub-blocks are then LDPC encoded to obtain the parity bit pL (corresponding to ④ in Figure 3), thus completing the SC-LDPC encoding.

[0094] Based on the above descriptions of LDPC and SC-LDPC, the transmitting device can encode one or more CBs corresponding to a TB. In the case of LDPC encoding, the transmitting device can perform LDPC encoding on each of the one or more CBs corresponding to the TB, and then perform rate matching on the encoded CBs. In the case of SC-LDPC encoding, the transmitting device can divide each of the one or more CBs corresponding to the TB into multiple sub-blocks (which can also be understood as dividing the information bit sequence into multiple sub-information bit sequences), and then perform SC-LDPC encoding on the multiple sub-blocks corresponding to each CB, resulting in multiple encoded sub-blocks. Among these, how to perform rate matching on the encoded sub-blocks becomes a problem that urgently needs to be solved.

[0095] In summary, this application provides a communication method, which includes: a transmitting device performing spatial coupling code encoding on a first code block to obtain L+1 first sub-blocks; and performing rate matching on the i-th first sub-block among the L+1 first sub-blocks to obtain a sub-block of length E′. i The i-th second sub-block; the output second code block of length E; where L is the length of the coupling chain of the spatially coupled code; E′ i For positive integers, E′1+E′2+…+E′ L+1 =E, where E is the length of the first code block after rate matching. The i-th second sub-block does not include the code block padding bits in the i-th first sub-block; i = 0, 1, ..., L; the difference in the length of the information bits of any two second sub-blocks from the 0th to the (L-1)th second sub-block is less than or equal to the first preset threshold; the difference in the length of the check bits of any two second sub-blocks from the 0th to the Lth second sub-block is less than or equal to the second preset threshold; the second code block includes L+1 second sub-blocks.

[0096] In this embodiment, on the one hand, when spatially coupled coding is performed on the first code block, rate matching can be performed on each of the L+1 first sub-blocks to achieve rate matching of the encoded first code block and rate matching of the codewords. This allows for flexible support of code length and code rate to adapt to air interface resources. On the other hand, since the difference in the length of the information bits of any two second sub-blocks from the 0th to the (L-1th)th second sub-blocks is less than or equal to a first preset threshold, the information bits of the 0th to the (L-1th)th second sub-blocks can be evenly distributed in the second code block. In addition, since the difference in the length of the parity bits of any two second sub-blocks from the 0th to the Lth second sub-blocks is less than or equal to a second preset threshold, the parity bits of the L+1 second sub-blocks can be evenly distributed in the second code block. This allows for uniform perforation of the parity matrix of the determined first sub-blocks to retain as many parity equations as possible, thereby improving the decoding performance of the communication system.

[0097] The embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0098] The communication method provided in this application embodiment can be used in any communication system, such as a 3GPP communication system, for example, a long term evolution (LTE) system, a 5G mobile communication system, a hybrid LTE and 5G network system, an NR system, an NR vehicle-to-everything (V2X) system, a device-to-device (D2D) communication system, a machine-to-machine (M2M) communication system, an Internet of Things (IoT) system, a narrow band Internet of Things (NB-IoT) system, a global system for mobile communications (GSM), an enhanced data rate for GSM evolution (EDGE) system, a wideband code division multiple access (WCDMA) system, a code division multiple access (CDMA2000) system, a time division-synchronization code division multiple access (TD-SCDMA) system, or an enhanced mobile broadband system. Broadband (eMBB), ultra-reliable and low-latency communication (URLLC), enhanced machine-type communication (eMTC), and various types of future communication systems are also included, as well as non-terrestrial network (NTN) systems (such as satellite communication systems), non-3GPP communication systems, etc., without restriction.

[0099] The communication method provided in this application can be applied to various communication scenarios. For example, it can be applied to one or more of the following communication scenarios: coding of control channels, coding of data channels, etc., without limitation.

[0100] The communication system provided in the embodiments of this application will be described below using Figure 4 as an example.

[0101] Figure 4 is a schematic diagram of a communication system provided in an embodiment of this application. As shown in Figure 4, the communication system may include at least one terminal device and at least one network device.

[0102] In Figure 4, the terminal device can be located within the beam / cell coverage area of ​​the network device, and the network device can provide communication services to the terminal device. For example, the network device can use channel coding to encode downlink data and then transmit it to the terminal device via air interface after constellation modulation (i.e., the network device is the transmitting device, and the terminal device is the receiving device); the terminal device can also use channel coding to encode uplink data and then transmit it to the network device via air interface after constellation modulation (i.e., the terminal device is the transmitting device, and the network device is the receiving device). It is understood that when network devices communicate with each other, or when terminal devices communicate with each other, communication can also be based on channel coding; that is, the transmitting and receiving devices can both be network devices or both be terminal devices, without restriction.

[0103] The terminal device in Figure 4 can be a device with wireless transceiver capabilities or a chip or chip system that can be configured on the device. It allows users to access the network and is used to provide voice and / or data connectivity to users. The terminal device can also be called user equipment (UE), subscriber unit, terminal, mobile station (MS), or mobile terminal (MT), etc.

[0104] For example, the terminal device can be a mobile phone, a tablet computer, or a computer with wireless transceiver capabilities. Terminal equipment can also be user stations, mobile stations, remote stations, remote terminal equipment, mobile terminal equipment, user terminal equipment, wireless communication equipment, user agents, user devices, cellular phones, cordless phones, session initiation protocol (SIP) phones, wireless local loop (WLL) stations, personal digital assistants (PDAs), handheld devices with wireless communication capabilities, computing devices, processing devices connected to wireless modems, in-vehicle equipment, wearable devices, terminal equipment in the Internet of Things (IoT), home appliances, virtual reality (VR) terminals, augmented reality (AR) terminals, wireless terminals in industrial control, wireless terminals in autonomous driving, wireless terminals in telemedicine, wireless terminals in smart grids, wireless terminals in smart cities, wireless terminals in smart homes, vehicles with vehicle-to-vehicle (V2V) communication capabilities, intelligent connected vehicles, and UAV-to-UAV communication. Unmanned aerial vehicles (UAVs) with U2U communication capabilities, terminal devices in future networks, or terminal devices in future evolved public land mobile networks (PLMNs) are not subject to restrictions.

[0105] In Figure 4, the network device can be any device deployed in the access network capable of wireless communication with terminal devices. It can also be a chip or chip system that can be configured within the aforementioned device, a logical node or logical module, or a function implemented in software. Its main responsibilities include air interface-side wireless physical control, resource scheduling, wireless resource management, quality of service management, data compression and encryption, wireless access control, and mobility management. Specifically, the network device can be either a wired access device or a wireless access device.

[0106] For example, a network device can consist of one or more access network (AN) / radio access network (RAN) nodes. AN / RAN nodes can be various types of base stations, such as: satellite base stations, evolved Node Bs (gNBs), transmission reception points (TRPs), evolved Node Bs (eNBs), radio network controllers (RNCs), Node Bs (NBs), base station controllers (BSCs), base transceiver stations (BTSs), home base stations (e.g., home evolved Node Bs, or home Node Bs (HNBs), macro base stations, micro base stations, pico base stations, small cells, relay stations, balloon stations, drone stations, wireless backhaul nodes, base band units (BBUs), or wireless fidelity (Wi-Fi) access points (APs), etc. It is understood that network devices can be terrestrial devices or non-terrestrial devices (such as satellites, drones, high-altitude communication equipment, etc.). Furthermore, in communication systems employing different wireless access technologies, the names of network devices with base station functions may differ, and this application does not impose any restrictions on this.

[0107] In another example, the network equipment may include a BBU and a remote radio unit (RRU). The BBU and RRU can be located in different places; for example, the RRU can be moved remotely to a high-traffic area, while the BBU is located in the central equipment room. The BBU and RRU can also be located in the same equipment room. The BBU and RRU can also be different components under the same rack.

[0108] In another example, the network device can be a device that includes centralized unit (CU) nodes, distributed unit (DU) nodes, or both CU and DU nodes. For instance, the network device can be logically divided into CUs and DUs, with some protocol layer functions centrally controlled by the CU, and the remaining partial or complete protocol layer functions distributed in the DU, which is centrally controlled by the CU. The CU and DU can be separate entities or included in the same network element, such as a BBU. Furthermore, the centralized unit (CU) can be further divided into a control plane (CU-CP) and a user plane (CU-UP).

[0109] In another example, the network device may also be a device that includes a radio unit (RU), or a device that includes a CU, a DU, and a RU. The RU may be included in a radio frequency device or radio frequency unit, such as an RRU, an active antenna unit (AAU), or a remote radio head (RRH).

[0110] It is understood that CU (or CU-CP and CU-UP), DU, or RU may have different names in different systems, but those skilled in the art will understand their meaning. For example, in an open radio access network (O-RAN) system, CU can also be called O-CU (open CU), DU can also be called O-DU, CU-CP can also be called O-CU-CP, CU-UP can also be called O-CU-UP, and RU can also be called O-RU. For ease of description, this application uses CU, CU-CP, CU-UP, DU, and RU as examples. Any of the units among CU (or CU-CP, CU-UP), DU, and RU in this application can be implemented through software modules, hardware modules, or a combination of software modules and hardware modules.

[0111] Optionally, the embodiments in this application can be applied to various communication scenarios. As shown in Figure 5, taking the network device as the base station and the terminal device as the UE as an example, in the communication scenario shown in Figure 5(a), the base station and the UE have a point-to-point single connection, that is, the base station and the UE can communicate directly; in the communication scenario shown in Figure 5(b), the base station and the UE have a multi-hop single connection, that is, the base station and the UE can communicate through multiple relays; in the communication scenario shown in Figure 5(c), the base station and the UE have a dual connection, that is, multiple base stations can communicate directly with one UE; in the communication scenario shown in Figure 5(d), the base station and the UE have a multi-hop multi-connection. Compared with the communication scenario shown in Figure 5(b), the base station and the UE in the communication scenario shown in Figure 5(d) can communicate through different relays. The communication scenarios shown in Figure 5 are merely examples and do not limit the network architecture used in this application.

[0112] It is understood that the application scenarios of this invention include, but are not limited to, scenarios in which any one or more network devices charge one or more terminal devices, such as base stations charging UEs, base stations charging base stations, base stations charging relays, relay base stations charging UEs, multiple base stations charging one UE, or multiple base stations charging multiple UEs.

[0113] Based on the above description of the terminal device and network device, optionally, the communication method provided in the embodiments of this application can be implemented by the aforementioned terminal device or network device, or by components of the terminal device or network device, such as by application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or software (such as program code in memory) deployed in the terminal device or network device, without limitation.

[0114] Optionally, in this embodiment, the transmitting device and the receiving device can perform encoding and decoding using the process shown in Figure 6 below. The transmitting device can be any terminal device or network device in the communication system shown in Figure 4, and the receiving device can also be any terminal device or network device in the communication system shown in Figure 4.

[0115] The transmitting device can encode, modulate, map, precode, frame, perform inverse fast Fourier transform, and apply intermediate radio frequency (IRF) to its generated layer (L)2 data to obtain the transmitted signal, which can then be transmitted to the receiving device through the channel. When the receiving device receives the signal through the channel, it can recover the source bitstream through IRF, Fourier transform, deframing, equalization, de-mapping, demodulation, and decoding.

[0116] In specific implementation, as shown in Figure 4, each terminal device and network device can adopt the composition structure shown in Figure 7, or include the components shown in Figure 7. Figure 7 is a schematic diagram of the composition of a communication device 700 provided in an embodiment of this application. The communication device 700 can be a terminal device or a chip or system-on-a-chip in a terminal device; it can also be a network device or a chip or system-on-a-chip in a network device. As shown in Figure 7, the communication device 700 includes a processor 701, a transceiver 702, and a communication line 703.

[0117] Furthermore, the communication device 700 may also include a memory 704. The processor 701, memory 704, and transceiver 702 can be connected via a communication line 703.

[0118] The processor 701 can be a central processing unit (CPU), a network processor (NP), a digital signal processor (DSP), a microprocessor, a microcontroller, a programmable logic device (PLD), or any combination thereof. The processor 701 can also be other devices with processing capabilities, such as circuits, devices, or software modules, without limitation.

[0119] Transceiver 702 is used to communicate with other devices or other communication networks. These other communication networks can be Ethernet, radio access network (RAN), wireless local area network (WLAN), etc. Transceiver 702 can be a module, circuit, transceiver, or any device capable of enabling communication.

[0120] Communication line 703 is used to transmit information between the components included in communication device 700.

[0121] Memory 704 is used to store instructions. These instructions can be computer programs.

[0122] The memory 704 can be a read-only memory (ROM) or other type of static storage device that can store static information and / or instructions; it can also be a random access memory (RAM) or other type of dynamic storage device that can store information and / or instructions; it can also be an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical discs, laser discs, optical discs, digital universal optical discs, Blu-ray discs, etc.), magnetic disk storage media or other magnetic storage devices, etc., without limitation.

[0123] The memory 704 can exist independently of the processor 701 or be integrated with the processor 701. The memory 704 can be used to store instructions, program code, or data. The memory 704 can be located inside or outside the communication device 700, without limitation. The processor 701 is used to execute the instructions stored in the memory 704 to implement the communication method provided in the following embodiments of this application.

[0124] In one example, processor 701 may include one or more CPUs, such as CPU0 and CPU1 in Figure 7.

[0125] As an optional implementation, the communication device 700 may include multiple processors, for example, in addition to the processor 701 in FIG7, it may also include a processor 707.

[0126] As an optional implementation, the communication device 700 also includes an output device 705 and an input device 706. For example, the input device 706 is a device such as a keyboard, mouse, microphone, or joystick, and the output device 705 is a device such as a display screen or speaker.

[0127] The communication device 700 can be a desktop computer, a portable computer, a web server, a mobile phone, a tablet computer, a wireless terminal, an embedded device, a chip system, or a device with a similar structure to that shown in Figure 7. Furthermore, the composition shown in Figure 7 does not constitute a limitation on the communication device. In addition to the components shown in Figure 7, the communication device may include more or fewer components than shown, or combine certain components, or have different component arrangements.

[0128] In this embodiment of the application, the chip system may be composed of chips or may include chips and other discrete devices.

[0129] Furthermore, the actions, terms, etc., involved in the various embodiments of this application can be referenced interchangeably without limitation. The message names or parameter names in the messages exchanged between the various devices in the embodiments of this application are merely examples, and other names may be used in specific implementations without limitation.

[0130] The communication method provided in the embodiments of this application will be described below with reference to the communication system shown in Figure 4 and Figure 8. The transmitting device can be any terminal device or network device in the communication system shown in Figure 4, and the receiving device can also be any terminal device or network device in the communication system shown in Figure 4. The transmitting or receiving device described in the following embodiments may include the components shown in Figure 7.

[0131] It is understood that the technical solutions provided in this application can be applied to channel coding / decoding between transmitting and receiving devices. Channel coding / decoding between transmitting and receiving devices can include: channel coding / decoding between network devices and terminal devices, channel coding / decoding between network devices, and channel coding / decoding between terminal devices. In this application, the term "channel coding / decoding" can also be simply referred to as "coding," and the term "coding" can also be described as "channel encoding / decoding," "network coding," "external code," or "source-channel joint encoding / decoding." The term "coding structure" can also be simply referred to as "coding," "code pattern," or "code design," and the term "coding structure" can also be described as "concatenated code," "layered code," "coupled code," "external code," "sliding window code," "product code," or "ladder code."

[0132] Figure 8 is a flowchart of a communication method provided in an embodiment of this application. As shown in Figure 8, the method may include:

[0133] Step 801: The transmitting device performs spatial coupling code encoding on the first code block to obtain L+1 first sub-blocks.

[0134] The spatially coupled code can be any spatially coupled code in any encoding scheme. For example, the spatially coupled code can be a spatially coupled low-density parity-check code, or the spatially coupled code can be a spatially coupled polar code. This application does not limit the specific code in this regard.

[0135] Where L is the length of the coupling chain of the spatially coupled code. L can also be described as the number of coupling blocks in the spatially coupled code, or the replication factor of the spatially coupled code. For example, L can be determined based on the length of TB, and L can be a positive integer greater than or equal to 2. For example, L can be any of the following: 2, 3, 4, 5, 6, 8, 10, 11, or 12.

[0136] The first code block can be spatially coupled and encoded, as shown in Figure 8 above. The specific encoding process can be found in the following description of the spatial coupling encoding of the first code block, which will not be repeated here.

[0137] Optionally, the first sub-block may include one or more of the following: information bits, CB padding bits, or check bits.

[0138] In one example, if the length of the first code block is divisible by L*Z, each of the first sub-blocks from the 0th to the (L-1th)th may include information bits and check bits, and the Lth first sub-block may include check bits.

[0139] Where Z is the boosting factor, which can be found in the description of boosting factors above and will not be repeated here.

[0140] In another example, if the length of the first code block is not divisible by L*Z, each of the first sub-blocks from the 0th to the (L-1th)th may include information bits, CB padding bits, and parity bits, and the Lth first sub-block may include parity bits; or, the 0th first sub-block may include information bits, CB padding bits, and parity bits, each of the first sub-blocks from the 1st to the (L-1th)th may include information bits and parity bits, and the Lth first sub-block may include parity bits; or, each of the first sub-blocks from the 0th to the (L-2th)th first sub-blocks may include information bits, CB padding bits, and parity bits, the (L-1th)th first sub-block may include information bits and parity bits, and the Lth first sub-block may include parity bits.

[0141] The CB padding bits can be referred to in the following description of CB padding bits, which will not be repeated here.

[0142] It is understood that in the embodiments of this application, the initial first sub-block can be called the 0th first sub-block, and the last first sub-block among the L first sub-blocks can be called the (L-1)th first sub-block; in addition, the embodiments of this application can also be applied to the case where the initial first sub-block is the 1st first sub-block, and the last first sub-block among the L first sub-blocks can be called the Lth first sub-block.

[0143] It is understandable that the length of the information bits in each of the first sub-blocks from the 0th to the (L-1th)th first sub-block is the same as the length of the Lth first sub-block. Here, the length of the information bits can be understood as the number of information bits, or simply the number of information bits in total.

[0144] In addition, the length of the parity bit can be understood as the number of parity bits, or the number of parity bits; similarly, the length of the CB padding bit can be understood as the number of CB padding bits, or the number of CB padding bits.

[0145] In embodiments of this application, the bits on the information bits in the first sub-block may include information bits and CB padding bits; that is, the length of the information bits in the first sub-block may be the sum of the length of the information bits and the length of the CB padding bits in the first sub-block. Alternatively, if the first sub-block does not include CB padding bits, the bits on the information bits in the first sub-block may be information bits.

[0146] Step 802: The transmitting device performs rate matching on the i-th first sub-block among the L+1 first sub-blocks to obtain a length of E′. i The i-th second sub-block.

[0147] Where i = 0, 1, ..., L, E′ i For positive integers, E′1+E′2+…+E′ L+1 =E, where E is the length of the rate-matched code block corresponding to the first code block.

[0148] The i-th second sub-block does not include the CB padding bits in the i-th first sub-block; that is, when performing rate matching on the i-th first sub-block, the CB padding bits in the i-th first sub-block are skipped.

[0149] For example, the transmitting device can determine the length E′ after rate matching. i The length of the information bits in the i-th first sub-block (which can be denoted as K) l,i ) and the length of the parity bits (which can be denoted as N) t The sum of (i.e., K) l,i +N t Determine the rate matching method. For example, if K l,i +N t Less than E′ i Then the rate matching mode is determined to be repetition, that is, after the sending device sends the information bits and check bits of the i-th first sub-block, it retransmits (E′). i -K l,i -N t ) bits. If K l,i +N t Greater than E′ i Then the transmitting device can determine that the rate matching method is puncture (i.e., puncturing from front to back (K)). l,i +N t -E′ i ) bits, or punch holes from back to front (K) l,i +N t -E′ i ( ) bits). Punching holes from back to front can also be represented as shortening (e.g., shortening from back to front (K bits)). l,i +N t -E′ i (bits).

[0150] For example, taking rate matching as puncturing, assuming L is 2, the transmitting device can obtain three first sub-blocks by spatially coupled coding the first code block. The three first sub-blocks can be shown in Figure 9(a) below. Furthermore, rate matching (i.e., puncturing) can be performed on the three first sub-blocks to obtain three second sub-blocks (also called rate-matched first sub-blocks). The three second sub-blocks can be shown in Figure 9(b) below, and the length of the i-th second sub-block can be E′.i .

[0151] Among them, determine E′ i The specific method can be referred to in the following two possible designs for determining E′. i The specific details are not elaborated here.

[0152] Among the following two possible designs, E′ is determined. i It can satisfy any of the following conditions:

[0153] Condition 1: In the second sub-block from the 0th to the (L-1th)th second sub-block, the difference in the length of the information bits of any two second sub-blocks can be less than or equal to the first preset threshold.

[0154] The first preset threshold can be predefined, or it can be determined based on the actual communication scenario or situation, without restriction. For example, the first preset threshold can be 1, or it can be 2.

[0155] Condition 2: In the second sub-block from the 0th to the (L-1th)th second sub-block, the difference in the length of the parity bits of any two second sub-blocks can be less than or equal to the second preset threshold.

[0156] The second preset threshold can be predefined, or it can be determined based on the actual communication scenario or situation, without restriction. For example, the second preset threshold can be 1, or it can be 2.

[0157] Condition 3: The difference between the length of the parity bit of each second sub-block from the 0th to the (L-1th)th second sub-block and the length of the Lth second sub-block can be less than or equal to the second preset threshold; in addition, the difference between the length of the parity bit of any two second sub-blocks from the 0th to the (L-1th)th second sub-block is less than or equal to the second preset threshold.

[0158] Condition 3 can also be described as follows: in the second sub-block from the 0th to the Lth second sub-block, the difference in the length of the check bits of any two second sub-blocks is less than or equal to the second preset threshold.

[0159] Condition 4: The difference in the length of the information bits of any two second sub-blocks from the 0th to the (L-1th)th second sub-block can be less than or equal to the first preset threshold, and the difference in the length of the check bits of any two second sub-blocks from the 0th to the Lth second sub-block is less than or equal to the second preset threshold.

[0160] Step 803: The transmitting device outputs a second code block of length E; correspondingly, the receiving device receives the decoding information from the transmitting device.

[0161] The second code block comprises L+1 second sub-blocks. Specifically, bits 0 to E′0-1 of the second code block can include bits 0 to E′0-1 of the 0th second sub-block, bits E′0 to E′0+E′1-1 of the second code block can include bits 0 to E′1-1 of the 1st second sub-block, bits E′0+E′1 to E′0+E′1+E′2-1 of the second code block can include bits 0 to E′2-1 of the 2nd second sub-block, ..., bits E′0+E′1+...+E′... of the second code block... L-2 Bits from E′0+E′1+…+E′ L-1 -1 bits can include bits 0 through E′ in the (L-1)th second sub-block. L-1 -1 bit, the E′0+E′1+…+E′ of the second code block L-1 Bits from the Lth to the (E-1th)th bit can include bits from the 0th to the E′th bit in the Lth second sub-block. L -1 bit.

[0162] It is understandable that the second code block sent by the sending device to the receiving device may be affected by noise and other interference when transmitted through the channel. The information to be decoded received by the receiving device is the second code block affected by noise and other interference.

[0163] The information to be decoded corresponds to the second code block.

[0164] Step 804: The receiving device determines the length E′ of the i-th third sub-block among the L+1 third sub-blocks based on the coupling chain length L of the spatial coupling code and the length E of the second code block. i .

[0165] The method by which the receiving device determines the length of each third sub-block can be referred to the description of how the sending device determines the length of each first sub-block, and will not be repeated here.

[0166] Step 805: The receiving device determines the decoding information and E′ based on the decoding information. i Determine L+1 third sub-blocks.

[0167] Among them, in the 0th to L-1th third sub-blocks, the difference in the length of the information bits of any two third sub-blocks is less than or equal to the first preset threshold.

[0168] Among them, the difference in the length of the check bits of any two third sub-blocks from the 0th to the Lth third sub-block is less than or equal to the second preset threshold.

[0169] Step 806: The receiving device performs rate matching on L+1 third sub-blocks to obtain L+1 fourth sub-blocks.

[0170] Step 807: The receiving device decodes L+1 fourth sub-blocks to obtain the decoding result.

[0171] Optionally, the receiving device may decode the second code block, which may include L+1 fourth sub-blocks; or, the receiving device may perform partial sliding window decoding on the L+1 fourth sub-blocks, which is not limited in this application.

[0172] Based on the communication method described in Figure 8, on the one hand, when spatially coupled coding is performed on the first code block, rate matching can be performed on each of the L+1 first sub-blocks to achieve rate matching of the encoded first code block and the codeword rate matching. This allows for flexible support of code length and code rate to adapt to air interface resources. On the other hand, since the difference in the length of the information bits of any two second sub-blocks from the 0th to the (L-1th)th second sub-blocks is less than or equal to a first preset threshold, the information bits of the 0th to the (L-1th)th second sub-blocks can be evenly distributed in the second code block. In addition, since the difference in the length of the parity bits of any two second sub-blocks from the 0th to the Lth second sub-blocks is less than or equal to a second preset threshold, the parity bits of the L+1 second sub-blocks can be evenly distributed in the second code block. This allows for uniform perforation of the parity check matrix of the determined first sub-blocks to retain as many parity check equations as possible, thereby improving the decoding performance of the communication system.

[0173] It is understood that the transmitting device can perform spatial coupling code encoding, rate matching and other operations on each of the multiple first code blocks. For ease of description and understanding, this application takes a first code block as an example and describes the transmission process of the first code block based on the communication method shown in Figure 8. The communication method shown in Figure 8 can be applied to any first code block. Similarly, the implementation method in this application can be applied to any first code block.

[0174] Based on the communication method shown in step 801 above, optionally, the first code block can be any one of the one or more CBs corresponding to the TB. The following is a detailed description of how the transmitting device determines the one or more CBs corresponding to the TB:

[0175] Let TB be of length B (TB may include an information bit sequence of length A and a sequence of length L) TB,CRC Taking the CRC (which can be called TBCRC) as an example, B = A + L TB,CRC If B <K CB,maxThe transmitting device may not perform code block segmentation on TB (in this case, TB can be understood as a CB, that is, the first code block can be TB); if B≥K CB,max The transmitting device can evenly divide TB into C CBs, each CB including a CRC (which can be called CBCRC) (in this case, the first code block can be any one of the C CBs). Wherein, K CB,max A, B, and C are all positive integers, and C is an integer greater than 1.

[0176] Among them, K CB,max It can be predefined, or, K CB,max It can be determined based on the actual communication scenario or situation, and is not restricted.

[0177] If TB cannot be evenly divided into C CBs, TB padding bits can be added to the initial position of TB. The TB after adding the padding bits is then evenly divided, and the padding bits can be located at the beginning of the 0th CB. For example, with C = 3, TB can be as shown in Figure 10(a). The transmitting device can then evenly divide TB into three CBs, as shown in Figure 10(b), where the length of each of the three CBs is K. r The length of the CBCRC in each CB can be L CB,CRC The length of the TB padding bits in the header of the 0th CB can be F. TB .

[0178] Optionally, the first code block may include information bits and CBCRC, or the first code block may include information bits, CBCRC, and TBCRC, or the first code block may include TB padding bits, information bits, and CBCRC. This application does not limit the scope of the application.

[0179] Optionally, the transmitting device can perform LDPC encoding on each of the one or more CBs corresponding to TB. During the encoding process, the transmitting device can add CB padding bits to each CB, such that the length of the CB after adding the CB padding bits is an integer multiple of the LDPC expansion factor Z. If the length of the CB is an integer multiple of the LDPC expansion factor, adding CB padding bits to the CB is unnecessary. For example, the CB after adding CB padding bits can be as shown in Figure 10(c), where the length of the CB after adding CB padding bits is K, and the length of the padding bits is F. CB Furthermore, the transmitting device can perform LDPC encoding on the CB after adding CB padding bits to obtain the encoded CB; for example, the encoded CB can be shown as in Figure 10(d). Furthermore, the transmitting device can perform rate matching on the encoded CB; for example, the rate-matched CB can be shown as in Figure 10(e).

[0180] It can be understood that when the TB corresponds to multiple CBs, the length of the r-th rate-matched CB can be expressed as E r , E r can take values of E + or E - . When 0 ≤ r ≤ C - γ - 1: Or, when C′ - γ - 1 < r < C: G′ = G / (N L ·Q m ), where G is the length of the TB after rate matching, that is, the air interface resources corresponding to the TB; Q m is the number of bits carried by each modulation symbol, N L is the number of layers mapped by the TB, γ = G′ mod C, and C is the number of CBs to be transmitted. is floor function, is ceiling function.

[0181] Different from the description above where the sending device performs LDPC coding on each CB in one or more CBs corresponding to the TB, in this application, the sending device can divide each CB into L sub-blocks of the same length, and perform spatially coupled code coding on the L sub-blocks to obtain L + 1 encoded sub-blocks. Further, the sending device can perform rate matching on each of the L + 1 encoded sub-blocks, so that when performing spatially coupled code coding on the CB, the sending device can perform rate matching on the encoded CB. Below, taking the first code block as an example, the spatially coupled code coding of the first code block and the rate matching of the encoded first code block will be specifically described.

[0182] Based on the description of step 801 above, optionally, the sending device can divide the first code block into L fifth sub-blocks of the same length, and perform coding on the L fifth sub-blocks to obtain L + 1 first sub-blocks.

[0183] Among them, if the length of the first code block cannot be divisible by L*Z, CB padding bits can be added to the first code block so that the length of the first code block after adding the CB padding bits can be divisible by L*Z, and then the first code block after adding the CB padding bits can be divided into L fifth sub-blocks of the same length.

[0184] Exemplarily, the CB padding bits can be evenly distributed in each fifth sub-block (as shown in (a) in Figure 11 below); or, the CB padding bits can be located at the initial position of the fifth sub-block 0 (i.e., the 0th fifth sub-block) (as shown in (b) in Figure 11 below); or, the CB padding bits can be located at the end position of the fifth sub-block L - 1 (i.e., the last fifth sub-block) (as shown in (c) in Figure 11 below).

[0185] With the length of the first code block as K r The length of the CB padding bits is F. CB For example, let's describe in detail the determination of L fifth sub-blocks by the transmitting device. The length of each of the L fifth sub-blocks can be (K... r +F CB ) / L.

[0186] In one example, during the process of determining the L fifth sub-blocks, the transmitting device can position all CB padding bits at the initial position of the 0th fifth sub-block. That is, the 0th fifth sub-block can include all CB padding bits and bits 0 to (K) of the first code block. r +F CB ) / L-1-F CB The first fifth sub-block can include the (K)th bit of the first code block. r +F CB ) / LF CB Bits up to the 2nd (K) r +F CB ) / L-1-F CB The second fifth sub-block can include the second (K)th bit of the first code block. r +F CB ) / LF CB Bits up to the 3rd (K) r +F CB ) / L-1-F CB The (L-1)th bit, ..., the (L-1)th fifth sub-block may include the (L-1)(K)th bit of the first code block. r +F CB ) / LF CB bits up to the Kth bit r -1 bit.

[0187] In another example, during the process of determining the L fifth sub-blocks, the transmitting device can position all the CB padding bits at the end of the (L-1)th fifth sub-block. That is, the 0th fifth sub-block can include the 0th bit to the (K)th bit of the first code block. r +F CB The first fifth sub-block can include the (K)th bit of the first code block. r +F CB ) / L bits to the 2nd (K) r +F CB The second fifth sub-block can include the second (K) bit of the first code block. r +F CB ) / L bits to the 3rd (K) r +F CBThe (L-1)th bit, ..., the (L-1)th fifth sub-block may include the (L-1)(K)th bit of the first code block. r +F CB ) / L bits to the Kth r -1 bit, plus all CB padding bits.

[0188] In another example, during the process of determining the L fifth sub-blocks, the transmitting device can evenly distribute the CB padding bits at the end positions of the L fifth sub-blocks, and each fifth sub-block may include (F CB / L) CB padding bits, that is, the 0th fifth sub-block may include the 0th bit to the (K)th bit of the first code block. r +F CB ) / L-1-(F CB / L), and (F CB The first fifth sub-block may include the (K)th CB padding bit of the first code block. r +F CB ) / L-(F CB / L) bits to the 2nd (K) bit r +F CB ) / L-1-(F CB / L), and (F CB The second fifth sub-block may include the second (K)th CB padding bit of the first code block. r +F CB ) / L-(F CB / L) bits to the 3rd (K) r +F CB ) / L-1-(F CB / L), and (F CB / L) CB padding bits, ..., the (L-1)th fifth sub-block may include the (L-1)(K)th bits of the first code block. r +F CB ) / L-(F CB / L) bits to the Kth r -1, and (F) CB / L) CB padding bits.

[0189] The transmitting device can perform spatial coupling code encoding on L fifth sub-blocks (i.e., spatial coupling code encoding on the first code block) to obtain L+1 first sub-blocks. For example, taking SC-LDPC as the spatial coupling code, the parity-check matrix of SC-LDPC can be obtained by referring to the above description of H... sc The description, assuming During the encoding process, the transmitting device can perform spatial coupling code encoding on the 0th fifth sub-block (which can be denoted as x0) according to H0 to obtain the parity bit p0. x0 and p0 are then combined to obtain the 0th first sub-block, denoted as y0 = [x0, p0]. Further, y0 is combined with the 1st fifth sub-block (denoted as x1) to form a new sub-block x′1 = [y0, x1]. Based on [H1, H0], x′1 is spatially coupled code encoded to obtain the parity bit p1. x1 and p1 are then combined... The first sub-block is obtained, denoted as y1 = [x1, p1]. Further, y1 can be combined with the second fifth sub-block (which can be denoted as x2) to form a new sub-block x′2 = [y1, x2]. x′2 is spatially coupled and encoded according to [H1, H0] to obtain the parity bit p2. x2 and p2 are then combined to obtain the second first sub-block, denoted as y2 = [x2, p2]. This process continues until the (L-1)th fifth sub-block corresponds to the (L-1)th first sub-block, denoted as y. L-1 =[x L-1 ,p L-1 Furthermore, y can be determined based on [H1I]. L-1 Spatial coupling code encoding is performed to obtain the parity bit p. L The check bit p L That is, the Lth first sub-block.

[0190] For example, taking the first code block as the first CB in Figure 10(b), assuming the transmitting device performs SC-LDPC encoding on the first code block, it can obtain L+1 encoded sub-blocks (i.e., L+1 first sub-blocks) as shown in Figure 12. The length of each first sub-block from 0 to L-1 can be N. l The length of the CB padding bits in each first sub-block is F. CB,l The length of the parity bits in each first sub-block can be N. t The length of the information bits in each first sub-block can be K. l (The bits in the information bits of each first sub-block may include information bits and CB padding bits); the length of the first sub-block L can be N. t .

[0191] Based on the above description of the first sub-block, optionally, the information bits in the first sub-block may include the information bits in the first code block, and may also include one or more of the following: TBCRC, CBCRC, or TB padding bits in the first code block. For example, when the length of TB is greater than K... CB,maxIf the length of TB is divisible by Z, the information bits in the first sub-block may include the information bits in the first code block, or the information bits in the first sub-block may include the information bits in the first code block and CBCRC, or the information bits in the first sub-block may include TBCRC, CRCRC, and the information bits in the first code block; when the length of TB is greater than K CB,max If the length of TB is not divisible by Z, the information bits in the first sub-block may include CBCRC, the information bits in the first code block, and TB padding bits in the first code block; or, the information bits in the first sub-block may include the information bits in the first code block and CBCRC; or, the information bits in the first sub-block may include CBCRC, TBCRC, and the information bits in the first code block. When the length of TB is less than K... CB,max In this case, the information bits in the first sub-block may include the information bits in TBCRC and TB.

[0192] It is understandable that, due to the limitations of air interface resources, there may be situations where the length of the air interface resources is inconsistent with the length of the encoded bit sequence. Therefore, rate matching can be used to make the length of the air interface resources match the length of the encoded bit sequence.

[0193] For example, let the encoded information bit sequence be d0, d1, ..., d N-1 For example, the transmitting device can process d0, d1, ..., d N-1 Rate matching is performed to obtain a rate matching sequence f0, f1, ..., f of length E. E-1 For example, the rate-matching sequence f0, f1, ..., f E-1 It can be obtained in the following way: f k =d k mod N k = 0, 1, ..., E-1. That is, as shown in Figure 13, a bit sequence of length N is placed into a circular buffer, and rate matching is to read E bits sequentially from the buffer in a cyclic manner.

[0194] Therefore, after the transmitting device determines L+1 first sub-blocks, it can perform rate matching on the L+1 first sub-blocks to obtain L+1 second sub-blocks, where the length of the i-th second sub-block among the L+1 second sub-blocks can be E′. i .

[0195] Optional, E′ i The following can be determined based on one or more of the following: E, L, X, and the length of the i-th first sub-block (which can be denoted as N). l,i (The length of the Lth first sub-block can also be denoted as N) t The length of the information bits in the i-th first sub-block (which can be denoted as K) l,iThe length of the CB padding bits in the i-th first sub-block (which can be denoted as F) CB,i ), or the length of the parity bits in the i-th first sub-block (which can be denoted as N). t ).

[0196] Where X represents the number of times the bit sequence excluding the CB padding bits is repeated in the L+1 first sub-blocks (or it can be described as the number of times the bit sequence excluding the CB padding bits is repeatedly transmitted in the L+1 first sub-blocks), or it can be understood as the number of times the information bits and check bits are repeated in the L+1 first sub-blocks. For example, if X is 4, the transmitting device can repeatedly transmit the bit sequence excluding the CB padding bits in the first code block four times.

[0197] For example, X can be the floor result of the ratio of E to the first value. For instance, X can satisfy the following formula: Where, N e The first value, This indicates rounding down to the nearest integer.

[0198] Wherein, the first value is the sum of the lengths of all bits in the L+1 first sub-blocks, excluding the CB padding bits. For example, the first value can satisfy the following formula: N l,0 +N l,1 +…+N l,L-1 +N t -F CB .

[0199] Among them, F CB The sum of the lengths of the CB padding bits of the L first sub-blocks, for example, F CB The following formula can be satisfied: F CB,0 +F CB,1 +…+F CB,L-1 , or, F CB To satisfy the following formula:

[0200] It is understandable that the lengths of the first sub-blocks from the 0th to the (L-1)th are the same (e.g., N). l In the case of L×N, the first value can satisfy the following formula: l +NF CB Similarly, the length of the CB padding bits is the same in the first sub-blocks from the 0th to the (L-1th)th sub-block (e.g., F). CB In the case of F'), CB The following formula can be satisfied: L×F CB ′.

[0201] Based on the determination of E′ in step 802 above iAs described above, this application provides two possible designs. In the first possible design, E′ is determined when the second value is less than or equal to the length of the first code block. i In the second possible design, E′ is determined when the second value is greater than the length of the first code block. i Furthermore, in these two possible designs, taking the example of CB padding bits being uniformly distributed at the end positions of the L fifth sub-blocks, E′ is determined. i .

[0202] Where the second value is the difference between E and the first product (or it can be described as the absolute value of the difference between E and the first product), and the first product is the product of X and the first value. For example, the second value can satisfy the following formula: EX*N e .

[0203] The second value can be understood as the length of the remaining bits that need to be transmitted after the bit sequence in the L+1 first sub-blocks, excluding the CB padding bits, is repeatedly transmitted X times (which can be called the length of the remaining bits).

[0204] The first possible design is described in detail below:

[0205] When the second value is less than or equal to the length of the first code block (which can also be understood as the second value being less than or equal to the sum of the lengths of the information bits of L first code blocks), the length E′ of the j-th second sub-block can be determined through the following two possible implementations. j and the length E′ of the Lth second sub-block L , where j = 0, 1, ..., L-1.

[0206] In the first possible implementation, the length E′ of the j-th second sub-block j It can be determined based on E, L, X, the length of the j-th first sub-block, and the length of the CB padding bits in the j-th first sub-block.

[0207] Specifically, E′ j It can be determined based on the first ratio, X, the length of the j-th first sub-block, and the length of the CB padding bits in the j-th first sub-block.

[0208] The first ratio is the ratio of the second value to L. For example, the first ratio can satisfy the following formula: Y represents the second numerical value.

[0209] It is understandable that the first ratio can be an integer or a non-integer. If the first ratio is an integer, E′ j The following formula can be satisfied: X(N l,a -F CB,aThe first ratio is X times the length of the bit sequence of the j-th first sub-block excluding the CB padding bits (i.e., the bit sequence of the j-th first sub-block excluding the CB padding bits is transmitted X times); if the first ratio is not an integer, it allows any two second sub-blocks from the length of the 0th second sub-block to the length of the L-β1-1th second sub-block to have the same length, and any two second sub-blocks from the length of the L-β1th second sub-block to the length of the L-1th second sub-block to have the same length. Where β1 = E mod L.

[0210] For example, the length E′ of the a-th second sub-block a The following formula can be satisfied: Where a = 0, 1, ..., L-β1-1, To round down, F CB,a N is the length of the CB padding bits in the a-th first sub-block. l,a Let be the length of the a-th first sub-block.

[0211] For example, the length E′ of the b-th second sub-block b The following formula can be satisfied: Where b = L-β1, L-β1+1, ..., L-1, To round up, F CB,b N is the length of the CB padding bits in the b-th first sub-block. l,b Let be the length of the b-th first sub-block.

[0212] Based on the first possible implementation, the second value being less than or equal to the length of the first code block can be understood as the length of the remaining bits being less than or equal to the sum of the lengths of the information bits in the 0th to L-1th first sub-blocks, which can be determined from the 0th to L-1th first sub-blocks. (or The information bits are used to ensure that the difference in the length of the information bits of any two second sub-blocks from the 0th to the (L-1th)th second sub-block is less than or equal to the first preset threshold. This allows the information bits in the 0th to the (L-1th)th second sub-blocks to be evenly distributed in the second code block. It also allows for uniform perforation of the parity check matrix of the first sub-block, thereby preserving as many parity check equations as possible and improving the decoding performance of the communication system.

[0213] In the second possible implementation, the length E′ of the Lth second sub-block L It can be determined based on X and the length of the Lth first sub-block.

[0214] For example, E′ L It can be the product of X and the length of the Lth first sub-block. For example, E′ L It can satisfy the following formula: X×Nt .

[0215] Based on the second possible implementation, when the second value is less than or equal to the length of the first code block, the Lth first sub-block can be transmitted X times, which can make the length of the parity bits of the L+1 second sub-blocks the same, and make the parity bits in the 0th to L-1th second sub-blocks evenly distributed in the second code block. It can also make the parity matrix of the first sub-block uniformly punched, thereby preserving as many parity equations as possible and improving the decoding performance of the communication system.

[0216] In the second possible design, the second value is greater than the length of the first code block. The length E′ of the j-th second sub-block can be determined through the following two possible implementations. j and the length E′ of the Lth second sub-block L , where j = 0, 1, ..., L-1.

[0217] In the first possible implementation, the length E′ of the j-th second sub-block j It can be determined based on E, L, X, the length of the j-th first sub-block, the length of the information bits in the j-th first sub-block, and the length of the CB padding bits in the j-th first sub-block.

[0218] Specifically, E′ j It can be determined based on the second ratio, X, the length of the j-th first sub-block, the length of the information bits in the j-th first sub-block, and the length of the CB padding bits in the j-th first sub-block.

[0219] The second ratio is the ratio of the first difference to (L+1). For example, the second ratio can satisfy the following formula: Z represents the first difference.

[0220] Here, the first difference is the difference between the second value and the length of the first code block (or it can be described as the absolute value of the difference between the second value and the length of the first code block). For example, the first difference can satisfy the following formula: YK r K r This is the length of the first code block.

[0221] It is understandable that when the second value is greater than the length of the first code block, the bit sequence from the 0th first sub-block to the (L-1)th second sub-block, excluding the CB padding bits, can be transmitted (X+1) times, and the Lth first sub-block can be transmitted X times. The first difference is the length of the bits that still need to be transmitted.

[0222] Understandably, the second ratio may be an integer or a non-integer. If the second ratio is an integer, E′ j The following formula can be satisfied: X(N l,a -F CB,a K is X times the length of the bit sequence of the j-th first sub-block excluding the CB padding bits (i.e., the bit sequence of the j-th first sub-block excluding the CB padding bits is transmitted X times), l,j Let be the length of the information bits in the j-th first sub-block; if the second ratio is not an integer, it is possible to make the lengths of any two second sub-blocks from the 0th to the L-β2-1th second sub-block the same, and the lengths of any two second sub-blocks from the L-β2th to the L-1th second sub-block the same. Where β2 = E mod(L+1).

[0223] For example, the length E′ of the c-th second sub-block c Satisfy the following formula: Where c = 0, 1, ..., L-β²-1, F CB,c N is the length of the CB padding bits in the c-th first sub-block. l,c K is the length of the c-th first sub-block. l,c Let E' be the length of the information bits in the c-th first sub-block. Alternatively, let E' be the length of the c-th second sub-block. c The following formula can be satisfied: K′ l,c Let be the length of the information bits in the c-th first sub-block.

[0224] For example, the length E′ of the d-th second sub-block d Satisfy the following formula: Where d = L-β2, L-β2+1, …, L-1, F CB,d N is the length of the CB padding bits in the d-th first sub-block. l,d K is the length of the d-th first sub-block. l,d Let E' be the length of the information bits in the d-th first sub-block. Alternatively, let E' be the length of the d-th second sub-block. d The following formula can be satisfied: K′ l,d is the length of the information bits in the d-th first sub-block.

[0225] Based on the first possible implementation, the second value being greater than the length of the first code block can be understood as the length of the remaining bits being greater than the sum of the lengths of the information bits in the 0th to L-1th first sub-blocks. This can be achieved by determining all the information bits in the 0th to L-1th first sub-blocks to ensure that the difference in the length of the information bits between any two second sub-blocks is less than or equal to a first preset threshold, thus ensuring a uniform distribution of the information bits in the 0th to L-1th first sub-blocks within the second code block. Alternatively, multiple check bits can be determined in the 0th to L-1th first sub-blocks to ensure that the difference in the length of any two second sub-blocks is less than or equal to a second preset threshold, again ensuring a uniform distribution of the check bits in the 0th to L-1th second sub-blocks within the second code block. This allows for uniform perforation of the check matrix of the determined first sub-blocks, thereby preserving as many check equations as possible and improving the decoding performance of the communication system.

[0226] In the second possible implementation, the length E′ of the Lth second sub-block L It can be determined based on E, L, X, and the length of the Lth first sub-block.

[0227] Specifically, E′ L It can be determined based on the product of the lengths of X and the Lth first sub-block, and the second ratio.

[0228] For example, when β2 = 0, Or, in the case where β2≠0,

[0229] Where, N t Let β2 be the length of the Lth first sub-block, and β2 = E mod(L+1).

[0230] Based on the second possible implementation, if the second value is greater than the length of the first code block, it can be determined in the Lth first sub-block after the Lth first sub-block has been repeatedly transmitted X times. (or () bits are used to ensure that the difference in the length of the parity bits of any two second sub-blocks from the 0th to the Lth second sub-block is less than or equal to the second preset threshold. This allows the parity bits in the L+1 second sub-blocks to be evenly distributed in the second code block. It also allows for uniform perforation of the parity matrix of the first sub-block, thereby preserving as many parity equations as possible and improving the decoding performance of the communication system.

[0231] Based on the two possible designs described above, the length of each second sub-block in the L+1 second sub-blocks can be determined. In other words, the transmitting device can determine the length of each first sub-block after rate matching in the L+1 first sub-blocks, and then perform rate matching on the L+1 first sub-blocks to obtain the L+1 second sub-blocks. For example, let the length of the a-th first sub-block after rate matching be... For example, after the sending device has sent the information bits and check bits of the first sub-block X times (i.e., X(N)), l,a -F CB,a After 10 bits, retransmit. One information bit.

[0232] In one possible embodiment, the L+1 first sub-blocks can be as shown in Figure 14(a), and rate matching for each of the L+1 first sub-blocks can be as shown in Figure 14(b). Starting from the 0th bit of the i-th first sub-block in the L+1 first sub-blocks, E′ can be read sequentially. i bits (the E′) i The bits do not include the CB padding bits in the i-th first sub-block, that is, during the reading process, the CB padding bits in the i-th first sub-block can be skipped to obtain the i-th second sub-block (as shown in (c) of Figure 14).

[0233] Compared to the communication method shown in Figure 8, which performs rate matching on each first sub-block to obtain the second sub-block, this application also provides a communication method for rate matching on the encoded first code block while performing spatial coupling code encoding on the first code block. This reduces computational complexity and simplifies implementation. Specific steps can be found in Figure 15 below:

[0234] Step 1501: The transmitting device performs spatial coupling code encoding on the first code block to obtain the (L+1)th first sub-block.

[0235] Where L is the length of the coupling chain of the spatially coupled code.

[0236] Step 1501 can refer to the content shown in step 801 above, and will not be repeated here.

[0237] Step 1502: The transmitting device interleaves L+1 first sub-blocks to obtain the first sequence.

[0238] The length of the first sequence is equal to the sum of the lengths of the L+1 first sub-blocks.

[0239] For example, the transmitting device can perform row and column interleaving on L+1 first sub-blocks to obtain a first sequence.

[0240] Optionally, the first Q bits of the first sequence include information bits and CB padding bits from the 0th to the (L-1)th first sub-blocks, and the last NQ bits of the first sequence include parity bits from the 0th to the Lth first sub-blocks; where Q is the sum of the lengths of the information bits and CB padding bits from the 0th to the (L-1)th first sub-blocks, and N is the length of the first sequence.

[0241] For example, let N be the length of each first sub-block from the 0th to the (L-1th)th first sub-block. l The length of the Lth first sub-block is N t The length of the parity bits in each of the first sub-blocks from the 0th to the (L-1th)th is N. t For example, the 0th bit in the first sub-block from the 0th to the (L-1th)th first sub-block can be used as the 0th to the (L-1th)th bits in the first sequence (i.e., the 0th bit of the first sequence is the 0th bit of the 0th first sub-block, the 1st bit of the first sequence is the 0th bit of the 1st first sub-block, the 2nd bit of the first sequence is the 0th bit of the 2nd first sub-block, ..., the (L-1th)th bit of the first sequence is the 0th bit of the (L-1th)th first sub-block); the 1st bit in the first sub-block from the 0th to the (L-1th)th first sub-block can be used as the Lth to the 2L-1th bits in the first sequence (i.e., the Lth bit of the first sequence is the 1st bit of the 0th first sub-block, the (L+1th)th bit of the first sequence is the 1st bit of the 1st first sub-block, ..., the 2L-1th bit of the first sequence is the 1st bit of the (L-1th)th first sub-block); and so on, the Nth bit in the first sub-block from the 0th to the (L-1th)th first sub-block can be used as the Nth bit of the first sub-block. l -N t -1 bits are used as the (N)th bit in the first sequence. l -N t -1)L bits to the (N)th bit l -N t L-1 bits (i.e., the (N)th bit of the first sequence) l -N t -1) The L bits are the Nth bit of the 0th first sub-block. l -N t -1 bit, the (N)th bit of the first sequence l -N t -1) L+1 bits are the Nth bit of the first sub-block. l -N t -1 bit, ..., the (N)th bit of the first sequence l -N t The L-1 bits are the Nth bits of the L-1th first sub-block. l -N t -1 bit).

[0242] Furthermore, the Nth sub-block from the 0th to the (L-1)th sub-block can be... l -N t The first bit and the 0th bit in the Lth first sub-block are used as the (N)th bit in the first sequence. l -N t )L bits to (N) l -N t +1)L bits (i.e., the (N)th bit of the first sequence) l -N t L bits are the Nth bit of the 0th first sub-block. l -N t The (N)th bit of the first sequence l -N t L+1 bits are the Nth bit of the first sub-block. l -N t The nth bit, ..., the (Nth)th bit of the first sequence l -N t +1) The L bits are the 0th bit of the Lth first sub-block; the Nth bit of the first sub-block from the 0th to the (L-1)th first sub-block can be... l -N t +1 bits and the first bit in the Lth first sub-block are used as the (N)th bit in the first sequence. l -N t +1)L+1 bits to the (N)th bit l -N t +2)L+1 bits (i.e., the (N)th bit of the first sequence) l -N t +1)L+1 bits are the Nth bit of the 0th first sub-block. l -N t +1 bit, the (N)th bit of the first sequence l -N t +1) L+2 bits are the Nth bit of the first sub-block. l -N t +1 bit, ..., the (N)th bit of the first sequence l -N t +2)L+1 bits are the Nth bit of the Lth first sub-block. l -N t +1 bit); and so on, the Nth bit in the first sub-block from the 0th to the (L-1th)th first sub-block. l -1 bits and the Nth bit in the Lth first sub-block t -1 bit, as the LNth bit in the first sequence. l +N t -L-2 bits to the LNth bit l +Nt -1 bit (i.e., the LNth bit of the first sequence) l +N t -L-2 bits represent the Nth bit of the 0th first sub-block. l -1 bit, the LNth bit of the first sequence l +N t -L-1 bits represent the Nth bit of the first sub-block. l -1 bit, ..., LN-th bit of the first sequence l +N t -1 bits represent the Nth bit of the Lth first sub-block. t -1 bit).

[0243] Understandably, the transmitting device can use a row-write, column-read approach to write L+1 first sub-blocks into the circular buffer, as shown in Figure 16(a). Row-column interleaving can be achieved using one interleaver, i.e., by inserting nulls (NULL), the parity bits in the Lth first sub-block can be aligned with the parity bits in the 0th to L-1th first sub-blocks. Alternatively, as shown in Figure 16(b), row-column interleaving can be achieved using two interleavers. The first interleaver can write the information bits and CB padding bits in the 0th to L-1th first sub-blocks, and the second interleaver can write the parity bits in the L+1th first sub-blocks.

[0244] Step 1503: The transmitting device performs rate matching on the bits in the first sequence except for the CB padding bits to obtain a second sequence of length E.

[0245] Where E is the length of the rate-matched code block corresponding to the first code block.

[0246] For example, the length E after rate matching can be calculated as the sum of the lengths of all bits in the first sequence except for the CB padding bits (which can be denoted as LN). l +N t -F CB Determine the rate matching method. For example, if LN l +N t -F CB If the value is less than E, then the rate matching mode is determined to be repetition, meaning that after the sending device sends the information bits and check bits in the first sequence, it retransmits (E-(LN)). l +N t -F CB )) bits. If LN l +N t -F CB If the value is greater than E, the transmitting device can determine that the rate matching method is puncturing (i.e., puncturing from front to back (LN)). l +Nt -F CB -E) bits, or punch holes from back to front (LN) l +N t -F CB -E) bits).

[0247] For example, as shown in Figure 17 below, (a) in Figure 17 shows L+1 first sub-blocks obtained by spatially coupled coding the first code block, and (b) in Figure 17 shows row-column interleaving of the L+1 first sub-blocks to obtain the first sequence (as shown in (c) in Figure 17). Furthermore, rate matching can be performed on the first sequence to obtain the second sequence (as shown in (d) in Figure 17).

[0248] Step 1504: The transmitting device outputs the second sequence; correspondingly, the receiving device receives the decoding information from the transmitting device.

[0249] It is understandable that the second sequence sent by the sending device to the receiving device may be affected by noise and other interference when transmitted through the channel. The information to be decoded received by the receiving device is the second sequence affected by noise and other interference.

[0250] The information to be decoded includes a third sequence of length E corresponding to the first code block.

[0251] Step 1505: The receiving device performs rate matching on the third sequence to obtain the fourth sequence.

[0252] Step 1506: The receiving device deinterleaves the fourth sequence to obtain L+1 second sub-blocks.

[0253] Optionally, the receiving device can de-interleave the fourth sequence to obtain L+1 second sub-blocks.

[0254] Step 1507: The receiving device decodes L+1 second sub-blocks to obtain the decoding result.

[0255] Based on the communication method shown in Figure 15, on the one hand, while spatially coupled coding is applied to the first code block, L+1 first sub-blocks can be interleaved to obtain a first sequence, and rate matching can be performed on the first sequence to achieve rate matching of the encoded first code block. Furthermore, this method ensures that the information bits or parity bits in the L+1 first sub-blocks are evenly distributed in the first sequence, allowing for uniform perforation of the parity check matrix determining the first sub-block, preserving as many parity check equations as possible, thereby improving the decoding performance of the communication system. On the other hand, compared to rate matching for each of the L+1 first sub-blocks, the method of interleaving the L+1 first sub-blocks to obtain a first sequence and then rate matching the first sequence reduces computational complexity and simplifies implementation.

[0256] Optionally, the communication method shown in Figure 15 can be implemented using the following pseudocode:

[0257] Where i represents the i-th first sub-block, K l N represents the sum of the length of the information bits and the length of the CB padding bits in each of the first sub-blocks from the 0th to the (L-1th)th first sub-block (which can also be described as the length of the information bits in each first sub-block), k represents the kth bit of any first sub-block, and N represents the length of the information bits in each first sub-block. l f represents the length of each first sub-block from the 0th to the (L-1)th first sub-block. e This represents the e-th bit of the second sequence. Represents the k+Nth digit of the first sequence. l ×i bits, Represents the k+Nth digit of the first sequence. l ×i bits.

[0258] Alternatively, if the CB padding bits of the first sub-block are located after the information bits, the communication method shown in Figure 15 can be implemented using the following pseudocode:

[0259] Among them, F CB,i Let be the length of the CB padding bits in the i-th first sub-block.

[0260] Based on the description of the communication methods shown in Figures 8 and 15 above, the transmitting device can perform spatial coupling code encoding on the first code block to obtain L+1 first sub-blocks. By performing rate matching on the L+1 first sub-blocks, the information bits in the L+1 first sub-blocks can be evenly distributed in the first sequence, and the parity bits in the L+1 first sub-blocks can also be evenly distributed in the first sequence, thus uniformly punching holes in the parity check matrix of the spatial coupling code. As shown in Figure 18 below, Figure 18(a) shows uniformly punched holes in the parity check matrix, and Figure 18(b) shows non-uniformly punched holes in the parity check matrix. Compared with the parity check matrix shown in Figure 18(b), the parity check matrix in Figure 18(a) can retain more parity check equations, which can better improve decoding performance.

[0261] It is understandable that the parity bits of the H0 and H1 matrices in the parity check matrix will adopt a lower triangular structure. If the parity check matrix is ​​not punched evenly, during the spatial coupling code encoding of the first code block, some parity check equations in the parity check matrix with more punches will not be valid in the parity check matrix with fewer punches, leading to an increase in code rate and performance loss. Therefore, it is necessary to punch the parity check matrix evenly to improve decoding performance.

[0262] The various embodiments of this application can be implemented independently or in combination, without limitation. Unless otherwise specified or in conflict of logic, the terminology and / or descriptions between the different embodiments provided in this application are consistent and can be referenced mutually. Technical features in different embodiments can be combined to form new embodiments based on their inherent logical relationships.

[0263] It is understood that in the embodiments of this application, the executing entity may perform some or all of the steps in the embodiments of this application. These steps or operations are merely examples, and the embodiments of this application may also perform other operations or variations thereof. Furthermore, the various steps may be executed in different orders as presented in the embodiments of this application, and it is not necessarily necessary to execute all the operations in the embodiments of this application.

[0264] The foregoing primarily describes the solutions provided in this application from the perspective of device-to-device interaction. It is understood that each device, in order to achieve the aforementioned functions, includes corresponding hardware structures and / or software modules for executing each function. Those skilled in the art will readily recognize that, based on the algorithmic steps of the examples described in conjunction with the embodiments disclosed herein, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0265] This application embodiment can divide each device into functional modules according to the above method example. For example, each function can be divided into a separate functional module, or two or more functions can be integrated into one processing module. The integrated module can be implemented in hardware or as a software functional module. The module division in this application embodiment is illustrative and only represents one logical functional division. In actual implementation, there may be other division methods.

[0266] With each function divided into a functional module, Figure 19 shows a transmitting device 190. The transmitting device 190 can perform the actions performed by the transmitting device in the methods shown in Figures 8 and 15. All relevant content of each step involved in the above method embodiments can be referred to the functional description of the corresponding functional module. The technical effects that can be obtained can be referred to the above method embodiments, and will not be repeated here.

[0267] The transmitting device 190 may include a transceiver module 1901 and a processing module 1902. Exemplarily, the transmitting device 190 may be a communication device, or a chip or other combination device or component having the aforementioned transmitting device functions applied in a communication device. When the transmitting device 190 is a communication device, the transceiver module 1901 may be a transceiver, which may include an antenna and radio frequency circuits, etc.; the processing module 1902 may be a processor (or processing circuit), such as a baseband processor, which may include one or more CPUs. When the transmitting device 190 is a component having the aforementioned transmitting device functions, the transceiver module 1901 may be a radio frequency unit; the processing module 1902 may be a processor (or processing circuit), such as a baseband processor. When the transmitting device 190 is a chip system, the transceiver module 1901 may be an input / output interface of a chip (e.g., a baseband chip); the processing module 1902 may be a processor (or processing circuit) of the chip system, and may include one or more central processing units. It should be understood that the transceiver module 1901 in the embodiments of this application can be implemented by a transceiver or transceiver-related circuit components; the processing module 1902 can be implemented by a processor or processor-related circuit components (or, referred to as processing circuit).

[0268] For example, the transceiver module 1901 can be used to perform all the transceiver operations performed by the transmitting device in the embodiments shown in FIG8 and FIG15, and / or to support other processes of the technology described herein; the processing module 1902 can be used to perform all operations other than the transceiver operations performed by the transmitting device in the embodiments shown in FIG8 and FIG15, and / or to support other processes of the technology described herein.

[0269] Figure 20 illustrates a receiving device 200, which can perform the actions performed by the receiving device in the methods shown in Figures 8 and 15 above. All relevant content of each step involved in the above method embodiments can be referred to the functional description of the corresponding functional module, and the technical effects that can be obtained can be referred to the above method embodiments, which will not be repeated here.

[0270] The receiving device 200 may include a transceiver module 2001 and a processing module 2002. For example, the receiving device 200 may be a communication device, or a chip or other combination device or component having the aforementioned receiving device functions. When the receiving device 200 is a communication device, the transceiver module 2001 may be a transceiver, which may include an antenna and radio frequency circuits; the processing module 2002 may be a processor (or processing circuit), such as a baseband processor, which may include one or more CPUs. When the receiving device 200 is a component having the aforementioned receiving device functions, the transceiver module 2001 may be a radio frequency unit; the processing module 2002 may be a processor (or processing circuit), such as a baseband processor. When the receiving device 200 is a chip system, the transceiver module 2001 may be an input / output interface of a chip (e.g., a baseband chip); the processing module 2002 may be a processor (or processing circuit) of the chip system, and may include one or more central processing units. It should be understood that the transceiver module 2001 in the embodiments of this application can be implemented by a transceiver or transceiver-related circuit components; the processing module 2002 can be implemented by a processor or processor-related circuit components (or, referred to as processing circuit).

[0271] For example, the transceiver module 2001 can be used to perform all the transceiver operations performed by the receiving device in the embodiments shown in FIG8 and FIG15, and / or to support other processes of the technology described herein; the processing module 2002 can be used to perform all operations other than the transceiver operations performed by the receiving device in the embodiments shown in FIG8 and FIG15, and / or to support other processes of the technology described herein.

[0272] As another possible implementation, the transceiver module 1901 in Figure 19 can be replaced by a transceiver that integrates the functions of the transceiver module 1901; the processing module 1902 can be replaced by a processor that integrates the functions of the processing module 1902. Furthermore, the transmitting end device 190 shown in Figure 19 may also include a memory. Alternatively, the transceiver module 2001 in Figure 20 can be replaced by a transceiver that integrates the functions of the transceiver module 2001; the processing module 2002 can be replaced by a processor that integrates the functions of the processing module 2002. Furthermore, the receiving end device 200 shown in Figure 20 may also include a memory.

[0273] Alternatively, when the processing module 1902 is replaced by a processor and the transceiver module 1901 is replaced by a transceiver, the transmitting end device 190 involved in the embodiments of this application can also be the communication device 210 shown in FIG21. Or, when the processing module 2002 is replaced by a processor and the transceiver module 2001 is replaced by a transceiver, the receiving end device 200 involved in the embodiments of this application can also be the communication device 210 shown in FIG21.

[0274] The processor can be logic circuit 2101, and the transceiver can be interface circuit 2102. Furthermore, the communication device 210 shown in FIG21 may also include a memory 2103.

[0275] This application also provides an encoding processing unit chip architecture and a decoding processing unit architecture. The encoding processing unit chip architecture, as shown in Figure 22, includes a computing unit, a storage unit, and a control unit. Taking LDPC encoding as an example, the computing unit in Figure 22 can perform TBCRC calculation, BG selection, code block segmentation, CBCRC calculation, LDPC encoding, and rate matching. The decoding processing unit architecture, as shown in Figure 23, includes a computing unit, a storage unit, and a control unit. Taking LDPC decoding as an example, the computing unit shown in Figure 23 can perform rate matching, hybrid automatic repeat request (HARQ) merging, LDPC decoding, CBCRC verification, and TBCRC verification to complete the decoding process. Because LDPC encoding and decoding require high throughput, it is generally implemented using a hardware accelerator (HAC) in a system-on-chip (SOC).

[0276] This application also provides a computer program product that, when executed by a computer, can implement the functions of any of the above method embodiments.

[0277] This application also provides a computer program that, when executed by a computer, can implement the functions of any of the above method embodiments.

[0278] This application also provides a computer-readable storage medium. All or part of the processes in the above method embodiments can be implemented by a computer program instructing related hardware. This program can be stored in the computer-readable storage medium, and when executed, it can include the processes of the above method embodiments. The computer-readable storage medium can be an internal storage unit of the terminal (including a data sending end and / or a data receiving end) of any of the foregoing embodiments, such as the terminal's hard disk or memory. The computer-readable storage medium can also be an external storage device of the terminal, such as a plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, etc., equipped on the terminal. Further, the computer-readable storage medium can include both the terminal's internal storage unit and external storage devices. The computer-readable storage medium is used to store the computer program and other programs and data required by the terminal. The computer-readable storage medium can also be used to temporarily store data that has been output or will be output.

[0279] The terms "first" and "second," etc., used in the specification, claims, and drawings of this application are used to distinguish different objects, not to describe a specific order. "First" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined with "first" and "second" may explicitly or implicitly include one or more of that feature. In the description of this embodiment, unless otherwise stated, "a plurality of" means two or more.

[0280] Furthermore, the terms “comprising” and “having”, and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the steps or units listed, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to such process, method, product, or apparatus.

[0281] It should be understood that in this application, "at least one (item)" means one or more. "More than one" means two or more. "At least two (items)" means two or three or more. "And / or" is used to describe the relationship between related objects, indicating that there can be three relationships. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the related objects before and after are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple. Both "...when" and "if" indicate that a corresponding action will be taken under certain objective circumstances. They are not time limits, nor do they require a judgment action to be taken when the action is taken, nor do they imply any other limitations.

[0282] In the embodiments of this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design that is described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a specific manner to facilitate understanding.

[0283] In this application, "sending information to...(terminal device)" can be understood as the destination of the information being the terminal device. This can include sending information directly or indirectly to the terminal device. "Receiving information from...(terminal device)" can be understood as the source of the information being the terminal device, and can include receiving information directly or indirectly from the terminal device. Information may undergo necessary processing between the source and destination, such as format changes, but the destination can understand the valid information from the source.

[0284] Through the above description of the embodiments, those skilled in the art can clearly understand that, for the sake of convenience and brevity, only the division of the above functional modules is used as an example. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0285] In the several embodiments provided in this application, the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed. Furthermore, the displayed or discussed mutual couplings, direct couplings, or communication connections may be through some interfaces; indirect couplings or communication connections between devices or units may be electrical, mechanical, or other forms.

[0286] The units described as separate components may or may not be physically separate. A component shown as a unit can be one or more physical units; that is, it can be located in one place or distributed in multiple different locations. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0287] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0288] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solution of this application embodiment, or all or part of the technical solution, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause a device (which may be a microcontroller, chip, etc.) or processor to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, ROM, RAM, magnetic disks, or optical disks.

Claims

1. A communication method, characterized in that, include: The first code block is spatially coupled and encoded to obtain L+1 first sub-blocks; where L is the length of the coupling chain of the spatially coupled code. Rate matching is performed on the i-th first sub-block among the L+1 first sub-blocks to obtain a length of E′. i The i-th second sub-block; where E′ i For positive integers, E′1+E′2+…+E′ L+1 =E, where E is the length of the rate-matched code block corresponding to the first code block, and the i-th second sub-block does not include the code block padding bits in the i-th first sub-block; i = 0, 1, ..., L; the difference in the length of the information bits of any two second sub-blocks from the 0th to the (L-1)th second sub-block is less than or equal to a first preset threshold; the difference in the length of the check bits of any two second sub-blocks from the 0th to the Lth second sub-block is less than or equal to a second preset threshold; Output a second code block of length E; wherein the second code block includes L+1 second sub-blocks.

2. A communication method, characterized in that, include: Receive information to be decoded; wherein the information to be decoded corresponds to a second code block; Based on the coupling chain length L of the spatially coupled code and the length E of the second code block, determine the length E′ of the i-th third sub-block among the L+1 third sub-blocks. i i = 0, 1, ..., L, E′ i For positive integers, E′1+E′2+…+E′ L+1 =E; The difference in the length of the information bits of any two third sub-blocks from the 0th to the (L-1)th third sub-block is less than or equal to the first preset threshold; The difference in the length of the check bits of any two third sub-blocks from the 0th to the Lth third sub-block is less than or equal to the second preset threshold; Based on the information to be decoded and E′i, determine L+1 third sub-blocks; Rate matching is performed on the L+1 third sub-blocks to obtain L+1 fourth sub-blocks; The L+1 fourth sub-blocks are decoded to obtain the decoding result.

3. The method according to claim 1 or 2, characterized in that, E′ i Determined according to one or more of the following: E, L, X, the length of the i-th first sub-block, the length of the information bits in the i-th first sub-block, the length of the code block padding bits in the i-th first sub-block, or the length of the parity bits in the i-th first sub-block; wherein, X is the number of repetitions of the bit sequence other than the code block padding bits in the L+1 first sub-blocks.

4. The method according to claim 3, characterized in that, X is the floor result of the ratio of E to the first value; where the first value is the sum of the lengths of all bits in the L+1 first sub-blocks except for the code block padding bits.

5. The method according to any one of claims 1-4, characterized in that, When the second value is less than or equal to the length of the first code block The length E′ of the j-th second sub-block j Determined based on E, L, X, the length of the j-th first sub-block, and the length of the code block padding bits in the j-th first sub-block; Where j = 0, 1, ..., L-1; the second value is the difference between E and the first product, the first product is the product of X and the first value, the first value is the sum of the lengths of all bits in the L+1 first sub-blocks except for the CB padding bits, and X is the number of repetitions of the bit sequence in the L+1 first sub-blocks except for the code block padding bits.

6. The method according to claim 5, characterized in that, E′ j The ratio is determined based on the first ratio, X, the length of the j-th first sub-block, and the length of the code block padding bits in the j-th first sub-block; wherein the first ratio is the ratio of the second value to L.

7. The method according to claim 6, characterized in that, The length of the a-th second sub-block is E′ a Satisfy the following formula: Where a = 0, 1, ..., L-β1-1, To round down, F CB,a N is the length of the padding bits in the first sub-block of the a-th sub-block. l,a The length of the a-th first sub-block; The length E′ of the b-th second sub-block b Satisfy the following formula: Where b = L-β1, L-β1+1, ..., L-1, To round up, F CB b is the length of the code block padding bits in the b-th first sub-block, N l，b The length of the b-th first sub-block; Let Y be the first ratio, Y be the second value, and β1 = E mod L.

8. The method according to any one of claims 1-7, characterized in that, When the second value is less than or equal to the length of the first code block The length of the Lth second sub-block is E′ L Determined based on X and the length of the Lth first sub-block; Wherein, the second value is the difference between E and the first product, the first product is the product of X and the first value, the first value is the sum of the lengths of all bits in the L+1 first sub-blocks except for the CB padding bits, and X is the number of repetitions of the bit sequence in the L+1 first sub-blocks except for the code block padding bits.

9. The method according to claim 8, characterized in that, E′ L X is the product of the length of the Lth first sub-block.

10. The method according to any one of claims 1-4, characterized in that, When the second value is greater than the length of the first code block The length E′ of the j-th second sub-block j The length of the j-th first sub-block is determined based on E, L, X, the length of the information bits in the j-th first sub-block, and the length of the code block padding bits in the j-th first sub-block. Where j = 0, 1, ..., L-1; the second value is the difference between E and the first product, the first product is the product of X and the first value, the first value is the sum of the lengths of all bits in the L+1 first sub-blocks except for the CB padding bits, and X is the number of repetitions of the bit sequence in the L+1 first sub-blocks except for the code block padding bits.

11. The method according to claim 10, characterized in that, E′ j The length of the j-th first sub-block, the length of the information bits in the j-th first sub-block, and the length of the code block padding bits in the j-th first sub-block are determined based on the second ratio, X, the length of the j-th first sub-block, the length of the information bits in the j-th first sub-block, and the length of the code block padding bits in the j-th first sub-block. Wherein, the second ratio is the ratio of the first difference to (L+1), and the first difference is the difference between the second value and the length of the first code block.

12. The method according to claim 11, characterized in that, The length of the c-th second sub-block is E′ c Satisfy the following formula: Where c = 0, 1, ..., L-β²-1, To round down, F CB,c The length N of the padding bits for the code block in the c-th first sub-block l,c K is the length of the c-th first sub-block. l,c The length of the information bits in the c-th first sub-block; The length of the dth second sub-block is E′ d Satisfy the following formula: Where d = L-β2, L-β2+1, ..., L-1, To round up, F CB,d N is the length of the code block padding bits in the d-th first sub-block. l,d K is the length of the d-th first sub-block. l,d The length of the information bits in the d-th first sub-block; Z is the second ratio, Z is the first difference, and β2 = E mod(L+1).

13. The method according to any one of claims 1-4 and 10-12, characterized in that, When the second value is greater than the length of the first code block The length of the Lth second sub-block is E′ L The value is determined based on E, L, X, and the length of the Lth first sub-block; wherein, the second value is the difference between E and the first product, the first product is the product of X and the first value, the first value is the sum of the lengths of all bits in the L+1 first sub-blocks except for the CB padding bits, and X is the number of repetitions of the bit sequence in the L+1 first sub-blocks except for the code block padding bits.

14. The method according to claim 13, characterized in that, E′ L Determined based on the product of X and the length of the Lth first sub-block, and the second ratio; Wherein, the second ratio is the ratio of the first difference to (L+1), and the first difference is the difference between the second value and the length of the first code block.

15. The method according to claim 14, characterized in that, When β2 = 0, or When β2≠0, Where, N t The length of the Lth first sub-block is The second ratio is given by β2 = E mod(L+1).

16. A communication method, characterized in that, include: The first code block is encoded using a spatially coupled code to obtain the (L+1)th first sub-block; where L is the length of the coupling chain of the spatially coupled code. The L+1 first sub-blocks are interleaved to obtain a first sequence; wherein the length of the first sequence is equal to the sum of the lengths of the L+1 first sub-blocks; Rate matching is performed on the bits in the first sequence, excluding code block padding bits, to obtain a second sequence of length E; where E is the length of the rate-matched sequence corresponding to the first code block. Output the second sequence.

17. The method according to claim 16, characterized in that, Interleaving the L+1 first sub-blocks includes: Perform row and column interleaving on the L+1 first sub-blocks.

18. The method according to claim 16 or 17, characterized in that, The first Q bits of the first sequence include information bits and code block padding bits from the 0th to the (L-1)th first sub-block, and the last NQ bits of the first sequence include parity bits from the 0th to the Lth first sub-block; where Q is the sum of the lengths of the information bits and code block padding bits from the 0th to the (L-1)th first sub-block, and N is the length of the first sequence.

19. A communication method, characterized in that, include: Receive information to be decoded; wherein, the information to be decoded includes a third sequence of length E corresponding to the first code block; De-rate matching is performed on the third sequence to obtain the fourth sequence; The fourth sequence is deinterleaved to obtain L+1 second sub-blocks; where L is the length of the coupling chain of the spatial coupling code; The L+1 second sub-blocks are decoded to obtain the decoding result.

20. The method according to claim 19, characterized in that, The deinterleaving of the fourth sequence includes: The fourth sequence is de-interleaved (row and column interleaving is performed).

21. A communication device, characterized in that, The communication device includes a processor; the processor is configured to run a computer program or instructions that cause the communication method as described in any one of claims 1 or 3-15 to be executed, or cause the communication method as described in any one of claims 2-15 to be executed, or cause the communication method as described in any one of claims 16-18 to be executed, or cause the communication method as described in any one of claims 19-20 to be executed.

22. A communication device, characterized in that, The communication device includes an interface circuit and a logic circuit; the interface circuit is used to input and / or output information; the logic circuit is used to execute the communication method as described in any one of claims 1 or 3-15, or to execute the communication method as described in any one of claims 2-15, processing and / or generating the information based on the information, or to execute the communication method as described in any one of claims 16-18, processing and / or generating the information based on the information, or to execute the communication method as described in any one of claims 19-20, processing and / or generating the information based on the information.

23. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions or programs that, when executed on a computer, cause the communication method as described in any one of claims 1 to 3-15 to be executed, or the communication method as described in any one of claims 2 to 15 to be executed, or the communication method as described in any one of claims 16 to 18 to be executed, or the communication method as described in any one of claims 19 to 20 to be executed.

24. A computer program product, characterized in that, The computer program product includes computer instructions; when some or all of the computer instructions are executed on a computer, they cause the communication method as described in any one of claims 1 or 3-15 to be executed, or the communication method as described in any one of claims 2-15 to be executed, or the communication method as described in any one of claims 16-18 to be executed, or the communication method as described in any one of claims 19-20 to be executed.

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