Multilayer ceramic capacitor

The multilayer ceramic capacitor addresses void formation and moisture penetration issues by using specific silicon and magnesium content in the side and end margin portions, achieving high density and improved reliability.

WO2026126277A1PCT designated stage Publication Date: 2026-06-18MURATA MFG CO LTD

Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
MURATA MFG CO LTD
Filing Date
2024-12-09
Publication Date
2026-06-18

AI Technical Summary

Technical Problem

Existing multilayer ceramic capacitors face issues with void formation and moisture penetration due to low sintering density in the side margin area, leading to reduced moisture resistance reliability.

Method used

The multilayer ceramic capacitor design includes specific compositions and structures in the side and end margin portions, with higher silicon and magnesium content relative to titanium, and absence of volatile components like boron, lithium, and zinc, to enhance sintering density and suppress grain growth.

🎯Benefits of technology

This design results in a capacitor with high density and improved moisture resistance reliability, along with suppressed grain growth, enhancing overall performance.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure JP2024043397_18062026_PF_FP_ABST
    Figure JP2024043397_18062026_PF_FP_ABST
Patent Text Reader

Abstract

A multilayer ceramic capacitor 100 comprises: a multilayer structure110 that includes a plurality of dielectric layers 140 and a plurality of internal electrode layers 150 layered in the lamination direction T, and has a first main surface 111 and a second main surface 112 facing each other in the lamination direction T, a first lateral surface 113 and a second lateral surface 114 facing each other in the width direction W orthogonal to the lamination direction T, and a first end surface 115 and a second end surface 116 facing each other in the length direction L orthogonal to the lamination direction T and the width direction W; a first external electrode 120 that is provided on the first end surface 115 of the multilayer structure110; and a second external electrode 130 that is provided on the second end surface 116 of the multilayer structure110. The multilayer structure110 is demarcated into: an internal layer part IP in which internal electrode layers 150 that are exposed on different end surfaces of the multilayer structure110 are opposite to each other in the lamination direction T with the dielectric layers 140 therebetween; a pair of end margin portions EM which are respectively positioned on the first end surface 115 side and the second end surface 116 side of the internal layer part IP in the length direction L, and in which internal electrode layers 150 that are exposed on the same end surface of the multilayer structure110 are opposite to each other in the lamination direction T without having therebetween the internal electrode layers 150 that are exposed on the different end surface of the multilayer structure110; a pair of side margin portions SM which are respectively positioned on the first lateral surface 113 side and the second lateral surface 114 side of a portion including the internal layer part IP and the end margin portions EM in the width direction W, and are provided in a manner covering the end portions of the internal electrode layers 15
Need to check novelty before this filing date? Find Prior Art

Description

Multilayer ceramic capacitor 【0001】 This invention relates to a multilayer ceramic capacitor. 【0002】 Multilayer ceramic capacitors, which have a structure in which dielectric layers and internal electrode layers are alternately stacked, are manufactured, for example, by providing an outer layer on the outside of a stack of ceramic green sheets on which the internal electrode pattern is formed, and then pressing them together. In this process, if there are parts of the ceramic green sheet on which the internal electrode pattern is not formed, a step difference is created between the dielectric layer and the internal electrode layer. 【0003】 To address the above problem, a method has been proposed to absorb the step difference by forming an internal electrode pattern on a ceramic green sheet and then forming a ceramic paste layer on the areas where the internal electrode pattern is not formed (see Patent Document 1). 【0004】Patent Document 1 discloses a multilayer ceramic electronic component comprising: a ceramic sintered body having a plurality of ceramic layers laminated together, having a first side surface and a second side surface facing each other, and a first end surface and a second end surface facing each other; a first internal electrode containing Ni formed inside the ceramic sintered body and drawn out from the first end surface; a second internal electrode containing Ni formed inside the ceramic sintered body so as to face the first internal electrode via a specific ceramic layer and drawn out from the second end surface; a first external terminal electrode formed on the first end surface of the ceramic sintered body and electrically connected to the first internal electrode; and a second external terminal electrode formed on the second end surface of the ceramic sintered body, electrically connected to the second internal electrode, and connected to a potential different from that of the first external terminal electrode. In the multilayer ceramic electronic component described in Patent Document 1, the ceramic sintered body includes, among the ceramic layers, an effective layer portion sandwiched between the first internal electrode and the second internal electrode and contributing to capacitance formation, and a side gap portion existing between the sides of the first and second internal electrodes and the first and second side surfaces of the ceramic sintered body, and between the sides of the effective layer portion and the first and second side surfaces of the ceramic sintered body, wherein at least the region of the side gap portion adjacent to the first and second internal electrodes is a Mg-rich region with a higher Mg concentration than the effective layer portion. 【0005】 Japanese Patent Publication No. 2010-103566 【0006】 When manufacturing a multilayer ceramic capacitor using the method described in Patent Document 1, if the sintering density of the portion that absorbs the step difference between the dielectric layer and the internal electrode layer is low, voids are likely to form between the edge of the internal electrode layer and the dielectric layer in the side gap portion, also known as the side margin portion. In that case, moisture such as humidity may penetrate into the void, potentially reducing the moisture resistance reliability. 【0007】 The present invention was made to solve the above problems and aims to provide a multilayer ceramic capacitor with high density in the side margin area and suppressed grain growth. 【0008】The multilayer ceramic capacitor of the present invention includes a plurality of dielectric layers and a plurality of internal electrode layers stacked in the stacking direction, and comprises a laminate having a first main surface and a second main surface facing each other in the stacking direction, a first side surface and a second side surface facing each other in the width direction perpendicular to the stacking direction, and a first end surface and a second end surface facing each other in the length direction perpendicular to the stacking direction and the width direction, a first external electrode provided on the first end surface of the laminate, and a second external electrode provided on the second end surface of the laminate. The laminate is divided into an inner layer portion in which the internal electrode layers exposed on different end faces of the laminate face each other in the stacking direction via the dielectric layer; a pair of end margin portions located on the first and second end face sides of the inner layer portion in the length direction, respectively, in which the internal electrode layers exposed on the same end face of the laminate face each other in the stacking direction without the internal electrode layers exposed on different end faces of the laminate face each other; a pair of side margin portions located on the first and second side sides of the portion including the inner layer portion and the end margin portions in the width direction, respectively, and provided to cover the ends of the internal electrode layers in the width direction; and a pair of outer layer portions located on the first and second main surface sides of the portion including the inner layer portion, the end margin portions, and the side margin portions in the stacking direction, respectively, and provided to cover the internal electrode layer closest to the first or second main surface of the laminate. The inner layer, end margin, and side margin portions described above do not contain volatile components such as boron (B), lithium (Li), and zinc (Zn). The content of silicon (Si) and magnesium (Mg) in the ceramic portion of the end margin portion, relative to titanium (Ti), is greater than the content of Si and Mg in the ceramic portion of the inner layer, relative to Ti. The content of Si and Mg in the ceramic portion of the side margin portion, relative to Ti, is greater than the content of Si and Mg in the ceramic portion of the inner layer, relative to Ti.The Si and Mg content in the ceramic contained in the side margin portion is greater than the Si and Mg content in the ceramic contained in the end margin portion, relative to Ti. The Si content in the ceramic contained in the side margin portion is greater than the Mg content. The Si content in the ceramic contained in the end margin portion is greater than the Mg content. 【0009】 According to the present invention, it is possible to provide a multilayer ceramic capacitor with high density in the side margin area and suppressed grain growth. 【0010】 Figure 1 is a schematic perspective view showing an example of a multilayer ceramic capacitor of the present invention. Figure 2 is an example of a cross-sectional view of the multilayer ceramic capacitor shown in Figure 1 along the line II-II. Figure 3 is an example of a cross-sectional view of the multilayer ceramic capacitor shown in Figure 1 along the line III-III. Figures 4A, 4B, and 4C are schematic perspective views showing an example of some steps in the manufacturing method of the multilayer ceramic capacitor of the present invention. 【0011】 The multilayer ceramic capacitor of the present invention will be described below. However, the present invention is not limited to the following embodiments, and can be modified and applied as appropriate without altering the essence of the invention. Furthermore, a combination of two or more of the preferred configurations described in the following embodiments also constitutes the present invention. 【0012】 In this specification, terms describing relationships between elements (e.g., "perpendicular," "parallel," "orthogonal," etc.) and terms describing the shapes of elements do not represent only strict meanings, but also include a range of substantially equivalent terms, such as differences of a few percent. 【0013】 The following diagrams are schematic representations, and their dimensions, aspect ratios, and scales may differ from those of the actual product. The same reference numerals are used for identical or equivalent parts in the diagrams. Furthermore, identical elements are denoted by the same reference numerals in each diagram, and redundant explanations are omitted. 【0014】Figure 1 is a schematic perspective view showing an example of a multilayer ceramic capacitor of the present invention. Figure 2 is an example of a cross-sectional view of the multilayer ceramic capacitor shown in Figure 1 along line II-II. Figure 3 is an example of a cross-sectional view of the multilayer ceramic capacitor shown in Figure 1 along line III-III. In Figures 1 to 3, the length direction of the laminate, which will be described later, is indicated by L, the width direction by W, and the lamination direction by T. 【0015】 The multilayer ceramic capacitor 100 shown in Figure 1 comprises a laminate 110, a first external electrode 120, and a second external electrode 130. 【0016】 As shown in Figures 2 and 3, the laminate 110 includes a plurality of dielectric layers 140 and a plurality of internal electrode layers 150 stacked in the stacking direction T. 【0017】 The laminate 110 includes a first main surface 111 and a second main surface 112 that are opposite to each other in the stacking direction T, a first side surface 113 and a second side surface 114 that are opposite to each other in the width direction W perpendicular to the stacking direction T, and a first end surface 115 and a second end surface 116 that are opposite to each other in the length direction L perpendicular to the stacking direction T and the width direction W. 【0018】 At least one of the corners and edges of the laminate 110 may be rounded. Here, the corners are the parts where three faces of the laminate 110 intersect, and the edges are the parts where two faces of the laminate 110 intersect. 【0019】 The first external electrode 120 is provided on the first end face 115 of the laminate 110. The first external electrode 120 may wrap around to a portion of the first main surface 111, the second main surface 112, the first side surface 113, and the second side surface 114 of the laminate 110. 【0020】 The second external electrode 130 is provided on the second end face 116 of the laminate 110. The second external electrode 130 may wrap around to a portion of the first main surface 111, the second main surface 112, the first side surface 113, and the second side surface 114 of the laminate 110. 【0021】The dielectric layer 140 is composed of a ceramic containing titanium (Ti). Preferably, the dielectric layer 140 further contains barium (Ba). Specifically, the dielectric layer 140 mainly contains a perovskite-type oxide. Alternatively, the dielectric layer 140 can be said to be composed of a sintered body of a perovskite-type oxide. 【0022】 The perovskite-type oxide included as the main component in the dielectric layer 140 is, for example, barium titanate (BaTiO2). 3 It is a compound of the ) system. BaTiO 3 It is a ferroelectric material that exhibits a tetragonal crystal structure at room temperature and has a high dielectric constant. Therefore, BaTiO 3 By using a compound system as the main component, the dielectric constant of the dielectric layer 140 can be increased, making it possible to increase the capacitance of the capacitor. 【0023】 For example, a perovskite-type oxide is BaTiO 3 If it is a compound system, then BaTiO 3 The compound system is BaTiO 3 The compound may be one in which part of the Ba and / or Ti contained in it is substituted with other elements. For example, part of the Ba may be substituted with an alkaline earth metal element such as calcium (Ca) or strontium (Sr), and part of the Ti may be substituted with a transition metal element such as zirconium (Zr) or hafnium (Hf). Furthermore, BaTiO 3 The molar ratio of A-site elements (Ba, Ca, Sr, etc.) to B-site elements (Ti, Zr, Hf, etc.) in a compound (hereinafter also referred to as the A / B ratio) is not strictly limited to 1:1. As long as the perovskite crystal structure is maintained, deviations in the molar ratio between A-site and B-site elements are acceptable. 【0024】The perovskite oxide contained as the main component in the dielectric layer 140 may further contain rare earth elements (Re). Rare earth elements (Re) are a general term for elements that make up the group consisting of scandium (Sc) with atomic number 21, yttrium (Y) with atomic number 39, and lanthanum (La) with atomic number 57 to lutetium (Lu) with atomic number 71 in the periodic table. The perovskite oxide may contain one type of rare earth element (Re), or it may contain a combination of multiple types of rare earth elements (Re). The perovskite oxide contained as the main component in the dielectric layer 140 may further contain elements other than rare earth elements (Re). 【0025】 As shown in Figures 2 and 3, the internal electrode layer 150 includes a first internal electrode layer 151 electrically connected to the first external electrode 120 and a second internal electrode layer 152 electrically connected to the second external electrode 130. 【0026】 The first internal electrode layer 151 extends to the first end face 115 of the laminate 110, where it is electrically connected to the first external electrode 120. 【0027】 The second internal electrode layer 152 extends to the second end face 116 of the laminate 110, where it is electrically connected to the second external electrode 130. 【0028】 The first internal electrode layer 151 and the second internal electrode layer 152, which face each other across the dielectric layer 140, are not electrically connected. Therefore, when a voltage is applied between the first internal electrode layer 151 and the second internal electrode layer 152 via the first external electrode 120 and the second external electrode 130, charge accumulates. The accumulated charge generates capacitance, thereby enabling the device to function as a capacitive element. 【0029】 As shown in Figures 2 and 3, the laminate 110 is divided into an inner layer IP, a pair of end margins EM, a pair of side margins SM, and a pair of outer layers XP. 【0030】The inner layer IP is the portion where internal electrode layers 150 (i.e., the first internal electrode layer 151 and the second internal electrode layer 152) exposed on different end faces of the laminate 110 face each other in the lamination direction T via a dielectric layer 140. In the inner layer IP, it is preferable that the first internal electrode layer 151 and the second internal electrode layer 152 are alternately laminated via a dielectric layer 140. 【0031】 The pair of end margin portions EM are located in the longitudinal direction L on the first end face 115 side and the second end face 116 side of the inner layer portion IP, respectively, and are portions where internal electrode layers 150 exposed on the same end face of the laminate 110 (i.e., the first internal electrode layers 151 together or the second internal electrode layers 152 together) face each other in the lamination direction T without being separated by internal electrode layers 150 exposed on different end faces of the laminate 110. 【0032】 The pair of side margin portions SM are located on the first side surface 113 and the second side surface 114 sides, respectively, of the portion including the inner layer portion IP and the end margin portion EM in the width direction W, and are provided to cover the end of the internal electrode layer 150 in the width direction W. 【0033】 The outer layer XP is located on the first main surface 111 side and the second main surface 112 side of the portion including the inner layer IP, end margin EM, and side margin SM in the lamination direction T, and is provided to cover the inner electrode layer 150 closest to the first main surface 111 or the second main surface 112 of the laminate 110, respectively. 【0034】 The multilayer ceramic capacitor 100 is characterized in that the inner layer IP, end margin EM, and side margin SM do not contain volatile components such as boron (B), lithium (Li), and zinc (Zn). 【0035】In the manufacturing process of the multilayer ceramic capacitor 100, if B, Li, and Zn are contained in the ceramic raw material, these components volatilize during firing, making the composition of the resulting multilayer ceramic capacitor 100 likely to vary. As a result, the characteristics of the multilayer ceramic capacitor 100 may vary. On the other hand, if the volatile components B, Li, and Zn are not contained in the ceramic raw material, the variation in the characteristics of the multilayer ceramic capacitor 100 can be suppressed. 【0036】 Note that the inner layer portion IP, the end margin portion EM, and the side margin portion SM do not have to substantially contain the volatile components B, Li, and Zn, and it is acceptable that a trace amount of volatile components that do not affect the variation in the characteristics of the multilayer ceramic capacitor 100 are inevitably contained as impurities. 【0037】 Furthermore, in the multilayer ceramic capacitor 100, the respective contents of silicon (Si) and magnesium (Mg) based on titanium (Ti) in the ceramic contained in the end margin portion EM are higher than the respective contents of Si and Mg based on Ti in the ceramic contained in the inner layer portion IP; the respective contents of Si and Mg based on Ti in the ceramic contained in the side margin portion SM are higher than the respective contents of Si and Mg based on Ti in the ceramic contained in the inner layer portion IP; the respective contents of Si and Mg based on Ti in the ceramic contained in the side margin portion SM are higher than the respective contents of Si and Mg based on Ti in the ceramic contained in the end margin portion EM; the content of Si based on Ti in the ceramic contained in the side margin portion SM is higher than the content of Mg; and the content of Si based on Ti in the ceramic contained in the end margin portion EM is higher than the content of Mg. 【0038】The presence of Si in the end margin portion EM and the side margin portion SM improves the sintering density, thereby improving the moisture resistance reliability. On the other hand, the presence of Mg in the end margin portion EM and the side margin portion SM suppresses grain growth after densification, thereby improving the high-temperature load reliability. 【0039】 In particular, since the respective contents of Si and Mg in the side margin portion SM are larger than those in the end margin portion EM, a multilayer ceramic capacitor 100 with high density of the side margin portion SM and suppressed grain growth can be obtained. 【0040】 The content of Si based on Ti in the ceramic contained in the side margin portion SM is preferably 1.4 mol% or more and 2.5 mol% or less. 【0041】 The content of Mg based on Ti in the ceramic contained in the side margin portion SM is preferably 0.4 mol% or more and 1.4 mol% or less. 【0042】 The content of Si based on Ti in the ceramic contained in the end margin portion EM is preferably 1.2 mol% or more and 2.1 mol% or less. 【0043】 The content of Mg based on Ti in the ceramic contained in the end margin portion EM is preferably 0.2 mol% or more and 0.9 mol% or less. 【0044】 The ratio of the content of Mg based on Ti in the ceramic contained in the side margin portion SM to the content of Mg based on Ti in the ceramic contained in the end margin portion EM may be larger, smaller, or the same as the ratio of the content of Si based on Ti in the ceramic contained in the side margin portion SM to the content of Si based on Ti in the ceramic contained in the end margin portion EM. 【0045】 The content of Si based on Ti in the ceramic contained in the inner layer portion IP is preferably larger than the content of Mg. 【0046】 In the ceramic contained in the inner layer portion IP, the content of Si based on Ti is preferably 1.0 mol% or more and 1.3 mol% or less. 【0047】 In the ceramic contained in the inner layer portion IP, the content of Mg based on Ti is preferably 0.0 mol% or more and 0.1 mol% or less. 【0048】 The content of each element in the side margin portion SM, the end margin portion EM, and the inner layer portion IP can be measured using an analytical method such as laser ablation inductively coupled plasma mass spectrometry (LA-ICP-MS) or inductively coupled plasma mass spectrometry (ICP-MS). 【0049】 The dimension in the width direction W of the side margin portion SM (the length indicated by W in FIG. 3) is not particularly limited, but is preferably 90 μm or less for each. On the other hand, the dimension in the width direction W of the side margin portion SM is, for example, 50 μm or more for each. Note that the dimension in the width direction W of the side margin portion SM may be 15 μm or less for each. The dimension in the width direction W of the side margin portion SM may be the same or different between the first side surface 113 side and the second side surface 114 side. SM The dimension in the length direction L of the end margin portion EM (the length indicated by L in FIG. 2) is not particularly limited, but is preferably 100 μm or less for each. On the other hand, the dimension in the length direction L of the end margin portion EM is, for example, 60 μm or more for each. Note that the dimension in the length direction L of the end margin portion EM may be 15 μm or less for each. The dimension in the length direction L of the end margin portion EM may be the same or different between the first end surface 115 side and the second end surface 116 side. 【0050】 The dimension in the stacking direction T of the outer layer portion XP (the length indicated by T in FIGS. 2 and 3) EM is not particularly limited, but is preferably 100 μm or less for each. On the other hand, the dimension in the stacking direction T of the outer layer portion XP is, for example, 60 μm or more for each. Note that the dimension in the stacking direction T of the outer layer portion XP may be 15 μm or less for each. The dimension in the stacking direction T of the outer layer portion XP may be the same or different between the first end surface 115 side and the second end surface 116 side. 【0051】 The dimension in the stacking direction T of the outer layer portion XP (the length indicated by T in FIGS. 2 and 3) XPThe lengths indicated by are not particularly limited, but are preferably 90 μm or less. On the other hand, the dimensions of the outer layer XP in the lamination direction T are, for example, 70 μm or more. The dimensions of the outer layer XP in the lamination direction T may also be 15 μm or less. The dimensions of the outer layer XP in the lamination direction T may be the same or different on the first main surface 111 side and the second main surface 112 side. 【0052】 The dimensions of the laminate 110 are not particularly limited. For example, in the embodiment described later, the length L dimension of the laminate 110 is 3.2 mm and the width W dimension is 1.6 mm. 【0053】 The thickness of the dielectric layer 140 in the inner layer IP is not particularly limited, but it is preferably 0.8 μm or less for each layer. On the other hand, the thickness of the dielectric layer 140 in the inner layer IP is not particularly limited, but it is preferably 0.6 μm or more for each layer. 【0054】 The number of layers of dielectric layers 140 in the inner layer IP is, for example, 1200 or more and 1400 or less. 【0055】 The internal electrode layer 150 contains a conductive metal. Examples of conductive metals include nickel (Ni), copper (Cu), silver (Ag), palladium (Pd), and alloys containing at least one of these metals. The internal electrode layer 150 may also contain other components besides the conductive metal. Examples of other components include ceramic components that act as co-materials. An example of a ceramic component is the BaTiO contained in the dielectric layer 140. 3 Examples include compound systems. 【0056】 The thickness of the internal electrode layer 150 in the inner layer IP is not particularly limited, but it is preferably 0.6 μm or less. On the other hand, the thickness of the internal electrode layer 150 in the inner layer IP is, for example, 0.4 μm or more. 【0057】The configuration of the first external electrode 120 and the second external electrode 130 is not particularly limited. The first external electrode 120 and the second external electrode 130 may have a laminated structure consisting of a base layer, a first plating layer, and a second plating layer, starting from the end face side of the multilayer ceramic capacitor 100. The base layer contains a metal such as nickel (Ni) or copper (Cu). The base layer may also contain ceramic powder as a co-material in addition to the metal. The first plating layer is, for example, a nickel (Ni) plating layer. The second plating layer is, for example, a tin (Sn) plating layer. A conductive resin layer may be provided between the base layer and the first plating layer. The conductive resin layer is a layer containing conductive metal particles such as copper (Cu), silver (Ag), and nickel (Ni), and resin. The first external electrode 120 and the second external electrode 130 are not limited in their form as long as they are electrically connected to the internal electrode layer 150 and function as external input / output terminals. 【0058】 The following describes how to measure the dimensions of each component. 【0059】 The thicknesses of the dielectric layer 140 and the internal electrode layer 150 in the inner layer IP are measured as follows: First, the multilayer ceramic capacitor 100 is polished to expose a cross section perpendicular to the length direction L (also called the WT cross section). The exposed cross section is observed with a scanning electron microscope. Next, the thicknesses of the dielectric layer 140 and the internal electrode layer 150 are measured along a center line along the stacking direction T that passes through the center of the exposed cross section, and along a total of five lines drawn at equal intervals on both sides of this center line. The average of the five measured values ​​for the dielectric layer 140 is taken as the thickness of the dielectric layer 140. The average of the five measured values ​​for the internal electrode layer 150 is taken as the thickness of the internal electrode layer 150. 【0060】The widthwise dimension W of the side margin portion SM is measured as follows. First, the multilayer ceramic capacitor 100 is polished to expose a cross section perpendicular to the lengthwise direction L. The exposed cross section is observed with a microscope and its dimensions are measured. The measurement positions are the upper, middle, and lower parts located on the boundary lines that divide the exposed cross section into four equal parts in the stacking direction T. The average of the measured values ​​of the side margin portion SM on the first side surface 113 at these three locations is taken as the widthwise dimension W of the side margin portion SM on the first side surface 113, and the average of the measured values ​​of the side margin portion SM on the second side surface 114 at these three locations is taken as the widthwise dimension W of the side margin portion SM on the second side surface 114. 【0061】 The length L dimension of the end margin portion EM is measured as follows. First, the multilayer ceramic capacitor 100 is polished to expose the cross section perpendicular to the width direction W (also called the LT cross section). The exposed cross section is observed with a microscope and its dimensions are measured. The measurement positions are the upper, middle, and lower parts, located on the boundary lines that divide the exposed cross section into four equal parts in the stacking direction T. The average of the measured values ​​of the end margin portion EM on the first end face 115 side at these three locations is taken as the length L dimension of the end margin portion EM on the first end face 115 side, and the average of the measured values ​​of the end margin portion EM on the second end face 116 side at these three locations is taken as the length L dimension of the end margin portion EM on the second end face 116 side. 【0062】 The dimensions of the outer layer XP in the stacking direction T are measured as follows: First, the multilayer ceramic capacitor 100 is polished to expose the cross section perpendicular to the width direction W. The exposed cross section is observed with a microscope and its dimensions are measured. The measurement position is the center of the length direction L. 【0063】 The manufacturing method of the multilayer ceramic capacitor of the present invention is not limited, as long as the above-mentioned requirements are satisfied. 【0064】The present invention provides a method for manufacturing a multilayer ceramic capacitor, for example, comprising the steps of: forming an internal electrode pattern using a conductive paste and a ceramic paste layer using a second ceramic paste on the main surface of a ceramic green sheet using a first ceramic paste; stacking the ceramic green sheets on which the internal electrode pattern and the ceramic paste layer are formed to produce an unfired laminate; firing the unfired laminate; and forming external electrodes on the outer surface of the fired laminate. 【0065】 Figures 4A, 4B, and 4C are schematic perspective views illustrating an example of some steps in the manufacturing method of the multilayer ceramic capacitor of the present invention. 【0066】 Hereinafter, an example of a method for manufacturing the multilayer ceramic capacitor of the present invention will be described step by step with reference to Figures 4A, 4B, and 4C. 【0067】 (1) Prepare a ceramic green sheet using the first ceramic paste. 【0068】 The method for producing the ceramic green sheet is not particularly limited. The first ceramic paste mainly consists of a ceramic containing titanium (Ti). Preferably, the first ceramic paste further contains barium (Ba). Specifically, the first ceramic paste mainly contains a perovskite-type oxide. As the main component raw material of the first ceramic paste, for example, barium titanate (BaTiO) 3 Powders of ) compounds are used. The first ceramic paste also includes the form of a slurry. 【0069】 The first ceramic paste may further contain elements such as alkaline earth metal elements like calcium (Ca) and strontium (Sr), transition metal elements like zirconium (Zr) and hafnium (Hf), and rare earth elements (Re). 【0070】(2) As shown in Figure 4A, a conductive paste for internal electrodes containing conductive metal powder such as nickel (Ni) powder is printed in an island-like pattern on the main surface of the ceramic green sheet 211 by, for example, screen printing, to form an internal electrode pattern 212. 【0071】 (3) As shown in Figure 4B, a second ceramic paste is printed on the portion of the main surface of the ceramic green sheet 211 where the internal electrode pattern 212 is not formed, to form a ceramic paste layer 213 for eliminating steps. 【0072】 The second ceramic paste mainly comprises a ceramic containing Ti. Preferably, the second ceramic paste further contains Ba. Specifically, the second ceramic paste mainly comprises a perovskite-type oxide. For example, BaTiO is used as the main component raw material of the second ceramic paste. 3 A compound powder is used. 【0073】 The second ceramic paste may further contain elements such as alkaline earth metal elements like calcium (Ca) and strontium (Sr), transition metal elements like zirconium (Zr) and hafnium (Hf), and rare earth elements (Re). 【0074】 In the method for manufacturing a multilayer ceramic capacitor of the present invention, it is preferable that the elements contained in the first ceramic paste and the elements contained in the second ceramic paste are the same. 【0075】 In the method for manufacturing a multilayer ceramic capacitor of the present invention, it is preferable that neither the first ceramic paste nor the second ceramic paste contains volatile components such as boron (B), lithium (Li), and zinc (Zn). In this case, it is sufficient that the first and second ceramic pastes do not contain volatile components such as B, Li, and Zn as additives, and it is acceptable for trace amounts of volatile components to be inevitably mixed in as impurities. 【0076】By using a first ceramic paste and a second ceramic paste that do not contain the volatile components B, Li, and Zn, the composition of the resulting multilayer ceramic capacitor becomes less prone to variation. As a result, variations in the characteristics of the multilayer ceramic capacitor can be suppressed. 【0077】 Furthermore, it is preferable that the content of silicon (Si) and magnesium (Mg) in the second ceramic paste, relative to titanium (Ti), is greater than the content of Si and Mg in the first ceramic paste, relative to Ti. 【0078】 The inclusion of Si in the first or second ceramic paste improves sintering density. On the other hand, the inclusion of Mg in the first or second ceramic paste suppresses grain growth after densification. 【0079】 In particular, by forming a ceramic paste layer using a second ceramic paste having a higher Si and Mg content compared to the first ceramic paste, it is possible to manufacture a multilayer ceramic capacitor with high density in the side margin area and suppressed grain growth. 【0080】 In the second ceramic paste, the Si content relative to Ti is preferably 1.9 mol% or more and 3.1 mol% or less. 【0081】 The content of Mg relative to Ti in the second ceramic paste is preferably 0.9 mol% or more and 2.6 mol% or less. For example, the content of Mg relative to Ti in the second ceramic paste may be 1.6 mol% or more and 2.6 mol% or less. 【0082】 On the other hand, the Si content in the first ceramic paste, relative to Ti, is preferably 1.0 mol% or more and 1.3 mol% or less. 【0083】The content of Mg in the first ceramic paste, relative to Ti, is preferably 0 mol% or more and 0.1 mol% or less. The first ceramic paste may or may not contain Mg. 【0084】 If the first ceramic paste contains Mg, the ratio of the Mg content in the second ceramic paste relative to the Mg content in the first ceramic paste relative to Ti may be greater than, less than, or the same as the ratio of the Si content in the second ceramic paste relative to the Si content in the first ceramic paste relative to Ti. 【0085】 Although not shown in Figure 4B, when forming the internal electrode pattern 212 and the ceramic paste layer 213, it is preferable to form the internal electrode pattern 212 and the ceramic paste layer 213 such that at least a portion of the second ceramic paste overlaps with the end of the internal electrode pattern 212 in the width direction W, and that there is a stepped region in the length direction L on the main surface of the ceramic green sheet 211 where the internal electrode pattern 212 is not formed and the second ceramic paste is not applied. 【0086】 (4) Although not shown in the diagram, a mother block is manufactured by stacking ceramic green sheets 211 on which the internal electrode pattern 212 and the ceramic paste layer 213 are formed, alternatingly shifting them by a predetermined distance in the length direction L. It is preferable that the outermost layer of the mother block is made of ceramic green sheets for the outer layer portion on which the internal electrode pattern 212 is not formed. It is also preferable that the mother block be pressed in the stacking direction T by means of a hydrostatic press or the like. 【0087】(5) As shown in Figure 4C, the mother block is cut along a predetermined cut line CL to a predetermined size to cut out a laminated chip (unfired laminate). In Figure 4C, for convenience, one ceramic green sheet 211 is shown to indicate the cut line CL. If necessary, the laminated chip may be polished by methods such as barrel polishing to round off at least one of the corners and edges of the laminated chip. 【0088】 In the process of cutting the mother block, when cutting the ceramic green sheet 211 in the first direction, it is preferable to cut it between two adjacent internal electrode patterns 212 in a second direction perpendicular to the first direction, and at the position of the stepped region described above. 【0089】 (6) The obtained laminated chips, i.e., the unfired laminates, are fired. The firing temperature should be such that the laminated chips become sufficiently dense. The firing process is, for example, the main component BaTiO 3 It is preferable to carry out the process in an atmosphere in which the compound is not reduced and oxidation of the conductive metal is suppressed. Furthermore, additional heat treatment may be performed after firing at an appropriate temperature and atmosphere. 【0090】 (7) A conductive paste for external electrodes is applied to the outer surface of the laminate after firing and baked to form a base layer. If necessary, a plating layer may be formed on the surface of the base layer. The plating layer may have a multilayer structure. The external electrodes are thus formed. 【0091】 Based on the above steps, a multilayer ceramic capacitor is fabricated. 【0092】 This specification discloses the following: 【0093】<1> A laminate comprising a plurality of dielectric layers and a plurality of internal electrode layers stacked in the stacking direction, having a first main surface and a second main surface facing each other in the stacking direction, a first side surface and a second side surface facing each other in the width direction perpendicular to the stacking direction, and a first end surface and a second end surface facing each other in the length direction perpendicular to the stacking direction and the width direction, a first external electrode provided on the first end surface of the laminate, and a second external electrode provided on the second end surface of the laminate, The laminate is divided into: an inner layer portion in which the internal electrode layers exposed on different end faces of the laminate face each other in the stacking direction via the dielectric layer; a pair of end margin portions located on the first and second end face sides of the inner layer portion in the length direction, respectively, in which the internal electrode layers exposed on the same end face of the laminate face each other in the stacking direction without the internal electrode layers exposed on different end faces of the laminate face each other; a pair of side margin portions located on the first and second side sides of the portion including the inner layer portion and the end margin portions in the width direction, respectively, and provided to cover the ends of the internal electrode layers in the width direction; and a pair of outer layer portions located on the first and second main surface sides of the portion including the inner layer portion, the end margin portions, and the side margin portions in the stacking direction, respectively, and provided to cover the internal electrode layer closest to the first or second main surface of the laminate, respectively. The inner layer, end margin, and side margin portions do not contain volatile components such as boron (B), lithium (Li), and zinc (Zn). The content of silicon (Si) and magnesium (Mg) in the ceramic portion of the end margin portion, relative to titanium (Ti), is greater than the content of Si and Mg in the ceramic portion of the inner layer, relative to Ti. The content of Si and Mg in the ceramic portion of the side margin portion, relative to Ti, is greater than the content of Si and Mg in the ceramic portion of the inner layer, relative to Ti.A multilayer ceramic capacitor in which the content of Si and Mg relative to Ti in the ceramic contained in the side margin portion is greater than the content of Si and Mg relative to Ti in the ceramic contained in the end margin portion, the content of Si relative to Ti in the ceramic contained in the side margin portion is greater than the content of Mg, and the content of Si relative to Ti in the ceramic contained in the end margin portion is greater than the content of Mg. 【0094】 <2> The multilayer ceramic capacitor described in <1>, wherein the Si content in the ceramic included in the side margin portion is 1.4 mol% or more and 2.5 mol% or less, relative to Ti. 【0095】 <3> The multilayer ceramic capacitor according to <1> or <2>, wherein the Si content in the ceramic included in the end margin portion is 1.2 mol% or more and 2.1 mol% or less, relative to Ti. 【0096】 <4> The multilayer ceramic capacitor according to any one of <1> to <3>, wherein the content of Mg relative to Ti in the ceramic included in the side margin portion is 0.4 mol% or more and 1.4 mol% or less. 【0097】 <5> The multilayer ceramic capacitor according to any one of <1> to <4>, wherein the content of Mg relative to Ti in the ceramic included in the end margin portion is 0.2 mol% or more and 0.9 mol% or less. 【0098】 <6> The dielectric layer further comprises barium (Ba), as described in any one of <1> to <5>, a multilayer ceramic capacitor. 【0099】 <7> The multilayer ceramic capacitor according to any one of <1> to <6>, wherein the thickness of the dielectric layer in the inner layer is 0.8 μm or less. 【0100】 <8> The multilayer ceramic capacitor according to any one of <1> to <7>, wherein the thickness of the internal electrode layer in the inner layer portion is 0.6 μm or less. 【0101】 <9> The multilayer ceramic capacitor according to any one of <1> to <8>, wherein the width dimension of the side margin portion is 90 μm or less. 【0102】 <10> The multilayer ceramic capacitor according to any one of <1> to <9>, wherein the lengthwise dimension of the end margin portion is 100 μm or less. 【0103】 <11> The multilayer ceramic capacitor according to any one of <1> to <10>, wherein the dimensions of the outer layer in the stacking direction are 90 μm or less. 【0104】 The following are examples that more specifically disclose the multilayer ceramic capacitor of the present invention. However, the present invention is not limited to these examples. 【0105】 [Fabrication of Multilayer Ceramic Capacitors] A multilayer ceramic capacitor was fabricated by performing the following steps: forming an internal electrode pattern using a conductive paste and a ceramic paste layer using a second ceramic paste on the main surface of a ceramic green sheet using a first ceramic paste; laminating the ceramic green sheet on which the internal electrode pattern and the ceramic paste layer are formed to create an unfired laminate; firing the unfired laminate; and forming external electrodes on the outer surface of the fired laminate. 【0106】 In this process, the internal electrode pattern and ceramic paste layer were formed such that at least a portion of the second ceramic paste overlapped with the widthwise edge of the internal electrode pattern, and a stepped region existed in the longitudinal direction on the main surface of the ceramic green sheet where the internal electrode pattern was not formed and the second ceramic paste was not applied. Furthermore, in the process of cutting the ceramic green sheet, when cutting the ceramic green sheet in the first direction, the cut was made between two adjacent internal electrode patterns in the second direction perpendicular to the first direction, and at the location of the stepped region described above. 【0107】The first and second ceramic pastes can be prepared by wet mixing a ceramic material with PVB (polyvinyl butyral) resin, a plasticizer, a dispersant, and an organic solvent. The second ceramic paste can be applied using printing methods such as screen printing, inkjet printing, or gravure printing. 【0108】 [Evaluation of Multilayer Ceramic Capacitors] 1. The WT cross-section (cross-section parallel to the width direction and stacking direction) at the center of the dense laminate in the side margin was observed using a scanning electron microscope (SEM), and the area of ​​voids present in the side margin was measured. The ratio of the void area to the total area of ​​the side margin (void area / total area of ​​the side margin) was defined as the porosity, and those with a porosity of less than 3% were judged as ○ (good), and those with a porosity of 3% or more were judged as × (poor). 【0109】 2. End grain diameter The WT cross section at the center of the length direction of the laminate was observed by SEM, and the grain diameter of the ceramic particles constituting the dielectric layer at the widthwise end of the inner layer (i.e., the boundary with the side margin) was measured. Similarly, the grain diameter of the ceramic particles constituting the dielectric layer at the center of the inner layer was measured. The ratio of the grain diameter at the widthwise end of the inner layer to the grain diameter at the center of the inner layer (i.e., grain diameter at the end / grain diameter at the center) was defined as the end grain diameter ratio, and those with an end grain diameter ratio of less than 1.2 were judged as ○ (good), and those with an end grain diameter ratio of 1.2 or more were judged as × (bad). 【0110】 3. High-Temperature Load Reliability (MTTF, B1 Life) Highly accelerated life testing (HALT) was performed on multilayer ceramic capacitors under the conditions of a test temperature of 150°C and a test voltage of 6.3V to determine the B1 life (the point at which the cumulative failure probability reaches 1%). Capacitors with a B1 life of more than 2.8 hours were judged as ○ (pass), and those with a B1 life of 2.8 hours or less were judged as × (fail). 【0111】4. Compositional Analysis Using LA-ICP-MS or ICP-MS, the content of each element in the side margin and end margin portions of the laminate was measured, and the content of Si and Mg in the ceramic contained in the side margin or end margin portion was determined relative to Ti. 【0112】 【0113】 Although not shown in Table 1, in Examples 1 to 4 and Comparative Examples 1 to 3, the inner layer, end margin, and side margin portions do not contain the volatile components B, Li, and Zn. Furthermore, in Examples 1 to 4 and Comparative Examples 1 to 3, the Si and Mg content relative to Ti in the ceramic contained in the end margin portion is greater than the Si and Mg content relative to Ti in the ceramic contained in the inner layer portion, and the Si and Mg content relative to Ti in the ceramic contained in the side margin portion is greater than the Si and Mg content relative to Ti in the ceramic contained in the inner layer portion. 【0114】 As shown in Table 1, in Examples 1 to 4, where the Si and Mg content relative to Ti in the ceramic contained in the side margin portion is greater than the Si and Mg content relative to Ti in the ceramic contained in the end margin portion, and the Si content relative to Ti in the ceramic contained in the side margin portion is greater than the Mg content, and the Si content relative to Ti in the ceramic contained in the end margin portion is greater than the Mg content, the side margin portion has high density and grain growth is suppressed, resulting in a multilayer ceramic capacitor with excellent high-temperature load reliability. 【0115】100 Multilayer ceramic capacitor 110 Laminate 111 First main surface 112 Second main surface 113 First side surface 114 Second side surface 115 First end surface 116 Second end surface 120 First external electrode 130 Second external electrode 140 Dielectric layer 150 Internal electrode layer 151 First internal electrode layer 152 Second internal electrode layer 211 Ceramic green sheet 212 Internal electrode pattern 213 Ceramic paste layer EM End margin SM Side margin IP Inner layer XP Outer layer CL Cut line L Length direction T Lamination direction W Width direction

Claims

1. A laminate comprising a plurality of dielectric layers and a plurality of internal electrode layers stacked in the stacking direction, having a first main surface and a second main surface facing each other in the stacking direction, a first side surface and a second side surface facing each other in the width direction perpendicular to the stacking direction, and a first end surface and a second end surface facing each other in the length direction perpendicular to the stacking direction and the width direction; a first external electrode provided on the first end surface of the laminate; and a second external electrode provided on the second end surface of the laminate. The laminate is divided into: an inner layer portion in which the internal electrode layers exposed on different end faces of the laminate face each other in the stacking direction via the dielectric layer; a pair of end margin portions located on the first and second end face sides of the inner layer portion in the length direction, respectively, in which the internal electrode layers exposed on the same end face of the laminate face each other in the stacking direction without the internal electrode layers exposed on different end faces of the laminate face each other; a pair of side margin portions located on the first and second side sides of the portion including the inner layer portion and the end margin portions in the width direction, respectively, and provided to cover the ends of the internal electrode layers in the width direction; and a pair of outer layer portions located on the first and second main surface sides of the portion including the inner layer portion, the end margin portions, and the side margin portions in the stacking direction, respectively, and provided to cover the internal electrode layer closest to the first or second main surface of the laminate, respectively. The inner layer, the end margin, and the side margin do not contain volatile components such as boron (B), lithium (Li), and zinc (Zn). The content of silicon (Si) and magnesium (Mg) in the ceramic contained in the end margin is greater than the content of Si and Mg in the ceramic contained in the inner layer, based on titanium (Ti). The content of Si and Mg in the ceramic contained in the side margin is greater than the content of Si and Mg in the ceramic contained in the inner layer, based on Ti.A multilayer ceramic capacitor in which the respective content of Si and Mg relative to Ti in the ceramic contained in the side margin portion is greater than the respective content of Si and Mg relative to Ti in the ceramic contained in the end margin portion, the Si content relative to Ti in the ceramic contained in the side margin portion is greater than the Mg content, and the Si content relative to Ti in the ceramic contained in the end margin portion is greater than the Mg content.

2. The multilayer ceramic capacitor according to claim 1, wherein the Si content in the ceramic contained in the side margin portion is 1.4 mol% or more and 2.5 mol% or less, relative to Ti.

3. The multilayer ceramic capacitor according to claim 1 or 2, wherein the Si content in the ceramic included in the end margin portion is 1.2 mol% or more and 2.1 mol% or less, relative to Ti.

4. The multilayer ceramic capacitor according to any one of claims 1 to 3, wherein the content of Mg relative to Ti in the ceramic contained in the side margin portion is 0.4 mol% or more and 1.4 mol% or less.

5. The multilayer ceramic capacitor according to any one of claims 1 to 4, wherein the content of Mg relative to Ti in the ceramic contained in the end margin portion is 0.2 mol% or more and 0.9 mol% or less.

6. The multilayer ceramic capacitor according to any one of claims 1 to 5, wherein the dielectric layer further comprises barium (Ba).

7. The multilayer ceramic capacitor according to any one of claims 1 to 6, wherein the thickness of the dielectric layer in the inner layer portion is 0.8 μm or less.

8. The multilayer ceramic capacitor according to any one of claims 1 to 7, wherein the thickness of the internal electrode layer in the inner layer portion is 0.6 μm or less.

9. The multilayer ceramic capacitor according to any one of claims 1 to 8, wherein the width dimension of the side margin portion is 90 μm or less.

10. The multilayer ceramic capacitor according to any one of claims 1 to 9, wherein the lengthwise dimension of the end margin portion is 100 μm or less.

11. The multilayer ceramic capacitor according to any one of claims 1 to 10, wherein the dimensions of the outer layer in the stacking direction are 90 μm or less.