Reference voltage generation circuit, reference current generation circuit, reference voltage generation method, and reference current generation method

Abstract

This reference voltage generation circuit (2) comprises: a bandgap reference voltage generation circuit (10) that generates a reference voltage (Vref) on the basis of the difference in current density between collector currents of NPN bipolar transistors (Q1 and Q2); and a current gain compensation current generation circuit (20) that generates first and second current gain compensation currents (a first current (i) and a second current (ii)) having the same value as a base current of the NPN bipolar transistors (Q1 and Q2). The first and second current gain compensation currents (the first current (i) and the second current (ii)) respectively flow only between a base terminal and an emitter terminal of the NPN bipolar transistors (Q1 and Q2).

Description

Reference Voltage Generation Circuit, Reference Current Generation Circuit, Reference Voltage Generation Method, and Reference Current Generation Method 【0001】 The present disclosure relates to a reference voltage generation circuit, a reference current generation circuit, a reference voltage generation method, and a reference current generation method that supply a stable voltage / current regardless of temperature. 【0002】 Lithium-ion batteries are used in various applications as secondary batteries with high energy density. Especially in electric vehicles that require a large capacity, they are used as lithium-ion battery packs composed of a plurality of battery cells combined in series or parallel. 【0003】 Electric vehicles are equipped with a battery management system that controls the charging and discharging of lithium-ion battery packs. As one of the functions of the battery management system, there is an estimation of the state of charge (SOC) of each battery cell. This estimation of the state of charge requires highly accurate voltage measurement, and this highly accurate voltage measurement must be maintained for a period of about 20 years, which is the product life cycle of an electric vehicle. 【0004】 The voltage measurement of a lithium-ion battery pack is performed by an AD converter (Analog to Digital converter) installed inside a battery monitoring IC of the battery management system. Generally, a predetermined reference voltage having a certain voltage value is supplied to the AD converter from a reference voltage generation circuit separately installed inside the battery monitoring IC, and this reference voltage determines the measurement accuracy of the voltage measurement of the lithium-ion battery pack. To achieve highly accurate voltage measurement, it is necessary to supply it stably regardless of temperature, and it is also necessary to supply it stably over the product life cycle. 【0005】To stably supply a predetermined reference voltage regardless of temperature, a reference voltage generation circuit utilizing the bandgap voltage of a semiconductor is known. Generally, a reference voltage generation circuit utilizing the bandgap voltage of a semiconductor has two sets of bipolar transistors with different conduction current densities inside, and outputs a bandgap reference voltage as the reference voltage, which is generated based on the difference in conduction current density. The bipolar transistor group consists of one bipolar transistor or multiple bipolar transistors connected in parallel. 【0006】 In the reference voltage generation circuit that utilizes the semiconductor bandgap voltage described above, the two sets of bipolar transistors are connected at their base and collector terminals, that is, they are used in a so-called diode connection. Generally, a finite, non-zero base current flows through a bipolar transistor, so the conduction current of the two sets of bipolar transistors in the reference voltage generation circuit described above splits into a collector current and a base current. 【0007】 When the current gain of a bipolar transistor is relatively large, the base current becomes small compared to the collector current, and all of the aforementioned conduction current can be considered as collector current. However, in general, in actual semiconductor processes, the current gain of a bipolar transistor can be as low as 5 or less. In this case, the base current component cannot be ignored, and the reference voltage output of the reference voltage generation circuit deviates from the intended voltage value. Furthermore, it is known that the current gain of a bipolar transistor may change due to aging. This makes it difficult to supply a stable reference voltage throughout the product lifecycle of the IC on which the reference voltage generation circuit is installed. 【0008】To supply a stable reference voltage throughout the product lifecycle of an IC, a reference voltage generation circuit, such as the one disclosed in Patent Document 1, has been proposed. Specifically, this method generates the conduction current of the two sets of bipolar transistors mentioned above as the sum of the collector current and base current of the bipolar transistors, and then separates this sum of current into the collector current and base current of the bipolar transistors and energizes them. In this reference voltage generation circuit, even if the current gain changes due to temperature changes or aging degradation, the sum of the collector current and base current that follows the change is generated as the conduction current, so that the collector current of the two sets of bipolar transistors can be set to the intended value regardless of the value of the current gain. 【0009】 U.S. Patent No. 5,684,394 【0010】 However, the reference voltage output of the reference voltage generation circuit disclosed in Patent Document 1 still suffers from the problem of being affected by changes in current gain due to the aging degradation of the bipolar transistor group. 【0011】 Therefore, the present disclosure aims to provide a reference voltage generation circuit, a reference current generation circuit, a reference voltage generation method, and a reference current generation method that utilize the bandgap voltage of a group of bipolar transistors, and which suppress the effects of changes in current gain due to the aging degradation of the group of bipolar transistors compared to conventional methods, and generate a stable reference voltage / reference current regardless of temperature. 【0012】To achieve the above objective, a reference voltage generation circuit according to one embodiment of the present disclosure comprises a bandgap reference voltage generation circuit that generates a reference voltage based on the difference in current density of the collector currents of the first bipolar transistor group and the second bipolar transistor group, comprising a first bipolar transistor group consisting of one or more bipolar transistors and a second bipolar transistor group consisting of one or more bipolar transistors, and a current gain compensation current generation circuit that generates first and second current gain compensation currents, respectively, which are equal to the base currents of the first bipolar transistor group and the second bipolar transistor group, respectively, and the first and second current gain compensation currents flow only between the base terminals and emitter terminals of the first bipolar transistor group and the second bipolar transistor group, respectively. 【0013】 To achieve the above objective, a reference current generation circuit according to one embodiment of the present disclosure comprises a bipolar transistor characteristic current generation circuit that generates a reference current based on the difference in current density of the collector currents of the first bipolar transistor group and the second bipolar transistor group, comprising a first bipolar transistor group composed of one or more bipolar transistors and a second bipolar transistor group composed of one or more bipolar transistors, and a current gain compensation current generation circuit that generates first and second current gain compensation currents, respectively, which are equal to the base currents of the first bipolar transistor group and the second bipolar transistor group, respectively, and the first and second current gain compensation currents flow only between the base terminals and emitter terminals of the first bipolar transistor group and the second bipolar transistor group, respectively. 【0014】To achieve the above objective, a reference voltage generation method according to one embodiment of the present disclosure is a method for generating a reference voltage using the bandgap voltage of a semiconductor, comprising: a bandgap reference voltage generation step of generating a reference voltage based on the difference in current density of the collector currents of the first bipolar transistor group and the second bipolar transistor group, using a first bipolar transistor group consisting of one or more bipolar transistors and a second bipolar transistor group consisting of one or more bipolar transistors; and a current gain compensation current generation step of generating first and second current gain compensation currents, respectively, that are equal to the base currents of the first bipolar transistor group and the second bipolar transistor group, respectively, wherein the first and second current gain compensation currents flow only between the base terminals and emitter terminals of the first bipolar transistor group and the second bipolar transistor group, respectively. 【0015】 To achieve the above objective, a reference current generation method according to one embodiment of the present disclosure is a method for generating a reference current using the bandgap voltage of a semiconductor, comprising: a bipolar transistor characteristic current generation step of generating a reference current based on the difference in current density of the collector currents of the first bipolar transistor group and the second bipolar transistor group, using a first bipolar transistor group composed of one or more bipolar transistors and a second bipolar transistor group composed of one or more bipolar transistors; and a current gain compensation current generation step of generating first and second current gain compensation currents, respectively, that are equal to the base currents of the first bipolar transistor group and the second bipolar transistor group, respectively, wherein the first and second current gain compensation currents flow only between the base terminal and the emitter terminal of the first bipolar transistor group and the second bipolar transistor group, respectively. 【0016】This disclosure provides a reference voltage generation circuit, a reference current generation circuit, a reference voltage generation method, and a reference current generation method that utilize the bandgap voltage of a group of bipolar transistors, and which suppress the effects of changes in current gain due to the aging degradation of the group of bipolar transistors compared to conventional methods, and generate a stable reference voltage / reference current regardless of temperature. 【0017】 Figure 1 is a circuit diagram showing the configuration of a reference voltage generation circuit according to an embodiment. Figure 2 is a circuit diagram showing the configuration of a reference voltage generation circuit according to a modified example of the embodiment. Figure 3 is a circuit diagram showing the configuration of a reference current generation circuit according to an embodiment. Figure 4 is a flowchart showing the procedure for the reference voltage generation method and the procedure for the reference current generation method according to an embodiment. 【0018】 (Knowledge gained by the inventors) Before describing embodiments of the present invention, the inventors' knowledge that led to the creation of the present invention will be described. 【0019】 As described above, the reference voltage output of the reference voltage generation circuit disclosed in Patent Document 1 still suffers from the problem of residual influence from changes in current gain due to the aging degradation of the bipolar transistor group. 【0020】 To understand this issue, the operation of the reference voltage generation circuit described in FIG. 2 of Patent Document 1 will be explained in more detail below. 【0021】 The relationship between the absolute values ​​Vbe1 [V], Vbe2 [V], and Vbe3 [V] of the base-emitter voltages of the NPN bipolar transistor group Q1, Q2, and Q3, and the collector current, is expressed by the following equation 1. 【0022】 【0023】Here, Ic1[A], Ic2[A], and Ic3[A] are the collector currents of the NPN bipolar transistor group Q1, Q2, and Q3, respectively; Is1[A], Is2[A], and Is3[A] are the reverse saturation currents of the NPN bipolar transistor group Q1, Q2, and Q3, respectively; kB[J / K] is Boltzmann's constant; and q[C] is the elementary charge. In the derivation of the final equation for Vbe2[V], it was considered that the ratio of the emitter areas of the NPN bipolar transistor group Q1 and Q2 is 1:N (where N=4). In addition, in the derivation of the final equation for Vbe3[V], it was considered that the emitter areas of the NPN bipolar transistor group Q1 and Q3 are equal, and that the collector currents of the NPN bipolar transistor group Q1 and Q3 are equal. Note that the argument expressions such as Vbe1(T) in Equation 1 represent the dependence of the variable on the absolute temperature T[K], but the argument parts are omitted in this text. The same applies to the formulas described herein below. 【0024】 In the reference voltage generation circuit described in FIG. 2 of Patent Document 1, the bias currents IA[A] and IB[A] are both determined by the voltage difference between the base terminal and emitter terminal of the NPN bipolar transistor group Q1 and Q2 and the resistance value of the resistor R1. That is, the bias currents IA[A] and IB[A] are expressed by the following Equation 2. 【0025】 【0026】 However, the relationship in Equation 1 was taken into consideration when deriving the final equation of Equation 2. 【0027】 In the reference voltage generation circuit (FIG. 2) of Patent Document 1, the reference voltage output Vbg [V] is determined by the sum of the voltage Vbe3 [V] between the base terminal and emitter terminal of the NPN bipolar transistor group Q3 and the voltage across the resistor R2. That is, the following relationship 3 holds true. 【0028】 【0029】Here, it is generally known that the voltage between the base and emitter terminals of a bipolar transistor is approximately a linear function with a negative slope with respect to temperature when the collector current is a current proportional to absolute temperature, the so-called PTAT (Proportional To Absolute Temperature) current. Therefore, the voltage Vbe3 [V] between the base and emitter terminals of the NPN bipolar transistor group Q3 represented by Equation 1 is approximately a linear function with a negative slope with respect to temperature when the collector current Ic3 [A] is a PTAT current. On the other hand, the bias currents IA [A] and IB [A] represented by Equation 2 are linear functions with a positive slope with respect to temperature when the resistance value of the resistor R1 is a constant value that does not depend on temperature, as can be seen from the final equation. In other words, the bias currents IA [A] and IB [A] can also be called PTAT currents. In this case, the ideal implementation method for a reference voltage generation circuit is to make the negative slope of the first term on the right-hand side of Equation 3 equal to the positive slope of the second term by providing some kind of adjustment function to the resistance value of the resistor R2, thereby obtaining a constant voltage value with respect to the absolute temperature T [K]. 【0030】 However, as mentioned above, the bias currents IA [A] and IB [A] represented by Equation 2 are the sum of the collector currents Ic1 [A] and Ic2 [A] and the base currents Ib1 [A] and Ib2 [A]. Therefore, the collector currents Ic1 [A] and Ic2 [A] are not the PTAT currents. In this case, the first term of Equation 3 deviates from a linear function with a negative slope, and the quadratic or higher components become large. Even if these quadratic or higher components are eliminated by some adjustment method, if the current gain of the bipolar transistor group changes due to aging, the values ​​of the base currents Ib1 [A] and Ib2 [A] will also change, and a stable reference voltage cannot be supplied over the product lifecycle of the IC. 【0031】Therefore, the inventor provided a current gain compensation current generation circuit that generates a current gain compensation current that flows only between the base terminal and emitter terminal of a group of bipolar transistors utilizing the bandgap voltage. By superimposing the current gain compensation current generated by the current gain compensation current generation circuit onto the bias current and summing them, the collector current of the bipolar transistor group becomes the bias current Ibias, which is the PTAT current (i.e., their magnitudes become equal). Note that the current gain compensation current that flows only between the base terminal and emitter terminal of the group of bipolar transistors means a current gain compensation current that has the same magnitude (i.e., the same value) as the current flowing between the base terminal and emitter terminal of the group of bipolar transistors. As a result, a reference voltage generation circuit, reference current generation circuit, reference voltage generation method, and reference current generation method that utilize the bandgap voltage of a group of bipolar transistors can be realized that suppresses the effect of changes in current gain due to the aging degradation of the bipolar transistor group more effectively than conventional methods, and generate a stable reference voltage / reference current regardless of temperature. 【0032】 (Embodiments) Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. The embodiments described below are all specific examples of embodiments of the present disclosure. The numerical values, types of circuit elements, performance and connection configurations, signals, steps, and the order of steps shown in the following embodiments are examples and are not intended to limit the present disclosure. In addition, the figures are not necessarily strictly illustrative. In each figure, substantially identical components are denoted by the same reference numerals, and redundant explanations are omitted or simplified. In addition, "connection" means an electrical connection and includes not only cases where two circuit elements are directly connected, but also cases where two circuit elements are indirectly connected with another circuit element inserted between them. Furthermore, the reference numerals associated with circuit elements and signals may be used as identifiers for circuit elements and signals, or as reference numerals indicating characteristic values ​​of circuit elements and signals, depending on the context. For example, the resistance value of resistor R1a is denoted as resistance value R1a. 【0033】Furthermore, "same size" and "equivalent value" mean substantially the same size, and do not need to be exactly the same. Similarly, "identical structure and material" means substantially the same structure and material, and as an example, it means that they are manufactured using the same process in semiconductor manufacturing. 【0034】 Figure 1 is a circuit diagram showing the configuration of the reference voltage generation circuit 2 according to the embodiment. In Figure 1, two types of arrows indicating the magnitude of the current are shown in multiple locations. One is a thick arrow, which indicates the bias current value Ibias corresponding to the magnitude of the bias current, and the other is a thin arrow (first current (i), second current (ii), fifth current (v), and sixth current (vi)) which indicates the current gain compensation current value Icomp corresponding to the magnitude of the current gain compensation current. "2 * Ibias" flowing through the pMOS (p-channel Metal Oxide Semiconductor) transistor Q3 means twice the bias current value Ibias. 【0035】 The reference voltage generation circuit 2 is a circuit that generates a reference voltage Vref using the bandgap voltage of a group of bipolar transistors, and comprises a bandgap reference voltage generation circuit 10, a current gain compensation current generation circuit 20, and a base current replica generation circuit 30, which are arranged between the power line and the ground line. 【0036】The bandgap reference voltage generation circuit 10 includes diode-connected NPN bipolar transistors Q1 and Q2, resistors R1a, R1b, R1c, and R2, an error amplifier Amp, and a pMOS transistor Q3. NPN bipolar transistor Q1 is an example of a first bipolar transistor group consisting of one or more bipolar transistors. More specifically, NPN bipolar transistor Q1 consists of one NPN bipolar transistor or multiple NPN bipolar transistors connected in parallel. NPN bipolar transistor Q2 is an example of a second bipolar transistor group consisting of one or more bipolar transistors. More specifically, NPN bipolar transistor Q2 consists of one NPN bipolar transistor or multiple NPN bipolar transistors connected in parallel. The ratio of the emitter areas of NPN bipolar transistor Q1 and NPN bipolar transistor Q2 is 1:N (for example, N=2). 【0037】 In this bandgap reference voltage generation circuit 10, the error amplifier Amp outputs a bias voltage Vampout, which is applied to the gate terminal of the pMOS transistor Q3, so that nodes Vinp and Vinn at the input terminal of the error amplifier Amp are at the same potential. As a result, the bandgap reference voltage generation circuit 10 outputs a reference voltage Vref from the drain terminal of the pMOS transistor Q3 based on the difference in current density of the collector currents of the NPN bipolar transistors Q1 and Q2. 【0038】The base current replica generation circuit 30 is a circuit that generates a replica current (fifth current (v)) of the base current of at least one of the first and second bipolar transistor groups of the bandgap reference voltage generation circuit 10 (here, the base current of NPN bipolar transistor Q1). It consists of an NPN bipolar transistor Qrep2 which forms a current mirror circuit with NPN bipolar transistor Q1, and an NPN bipolar transistor Qrep1 which is connected in series with NPN bipolar transistor Qrep2 and generates the replica current (fifth current (v)). Note that NPN bipolar transistors Qrep1 and Qrep2 are manufactured in the same process as at least one of the bipolar transistors (here, NPN bipolar transistors Q1 and Q2) that make up the first and second bipolar transistor groups of the bandgap reference voltage generation circuit 10, and have the same structure and materials. 【0039】 In this embodiment, the base current replica generation circuit 30 generates a replica current (fifth current (v)) based on the voltage between the base terminal and emitter terminal of the NPN bipolar transistor Q1 of the bandgap reference voltage generation circuit 10, using a current mirror circuit composed of an NPN bipolar transistor Q1 and an NPN bipolar transistor Qrep2. 【0040】The current gain compensation current generation circuit 20 is a circuit for generating current gain compensation currents (first current (i) and second current (ii)) that are equal in magnitude to the base currents of the NPN bipolar transistors Q1 and Q2 of the bandgap reference voltage generation circuit 10. It includes a current mirror circuit (pMOS transistors Q21 to Q24 with the gate width ratio shown) that takes the replica current (fifth current (v)) generated from the base current replica generation circuit 30 as input and generates three output currents (a current of 1x magnitude, a current of 2x magnitude (first current (i) and sixth current (vi)) and a current of 1x magnitude (second current (ii))), and a current of 1x magnitude (pMOS transistors Q21 to Q24 with the gate width ratio shown) as input, and a current mirror circuit (nMOS (n-channel MOS) transistors Q25 and Q26 with the gate width ratio shown) that diverts a current (fifth current (v)) of magnitude equivalent to the base current (fifth current (v)) from the emitter current output from the NPN bipolar transistor Qrep1 of the base current replica generation circuit 30 to the current gain compensation current generation circuit 20. 【0041】 In this embodiment, the current gain compensation current generation circuit 20 generates current gain compensation currents (first current (i) and second current (ii)) that are equal to the base currents of the NPN bipolar transistors Q1 and Q2 of the bandgap reference voltage generation circuit 10, and also generates current gain compensation currents (fifth current (v) and sixth current (vi)) that are equal to the base currents of the NPN bipolar transistors Qrep1 and Qrep2 that constitute the base current replica generation circuit 30. Of these, the fifth current (v) is, as described above, the current that is diverted from the emitter current output from the NPN bipolar transistor Qrep1 of the base current replica generation circuit 30 to the current gain compensation current generation circuit 20, while the sixth current (vi) is the current that flows only between the base terminal and the emitter terminal of the NPN bipolar transistor Qrep2. 【0042】 The operation of the reference voltage generation circuit 2 according to the embodiment configured as described above is as follows. Here, we will focus on the current gain compensation currents (first current (i), second current (ii), fifth current (v), and sixth current (vi)). 【0043】Since the NPN bipolar transistor Q1 of the bandgap reference voltage generation circuit 10 and the NPN bipolar transistor Qrep2 of the base current replica generation circuit 30 form a current mirror circuit, the magnitudes of the collector currents of the NPN bipolar transistor Q1 and the NPN bipolar transistor Qrep2 are the same. Focusing on the NPN bipolar transistor Qrep1 of the base current replica generation circuit 30, since a current (fifth current (v)) corresponding to the base current (fifth current (v)) is shunted from the emitter current output from the emitter terminal of the NPN bipolar transistor Qrep1 to the current gain compensation current generation circuit 20, the magnitude of the collector current of the NPN bipolar transistor Qrep1 is the same as the magnitude of the collector current of the NPN bipolar transistor Qrep2, that is, the same as the magnitude of the collector current of the NPN bipolar transistor Q1 of the bandgap reference voltage generation circuit 10. As a result, the magnitude of the replica current generated by the base current replica generation circuit 30, that is, the base current (fifth current (v)) of the NPN bipolar transistor Qrep1, is the same as the magnitude of the base current (first current (i)) required to flow a collector current in the NPN bipolar transistor Q1 of the bandgap reference voltage generation circuit 10. 【0044】 Focusing on the branch including the NPN bipolar transistor Q1 in the bandgap reference voltage generation circuit 10, the replica current (fifth current (v)) generated by the base current replica generation circuit 30 becomes a current gain compensation current (first current (i) and sixth current (vi)) having a magnitude twice as large by the current mirror circuit (pMOS transistors Q21 and Q23) of the current gain compensation current generation circuit 20, is applied to the connection point between the resistance element R1b and the NPN bipolar transistor Q1 in the bandgap reference voltage generation circuit 10, is added to the bias current Ibias, and becomes a combined current (combined current of the bias current Ibias, the first current (i), and the sixth current (vi)), and flows toward the NPN bipolar transistor Q1. 【0045】Of the combined current flowing toward the NPN bipolar transistor Q1, a first current (i) branches off toward the base terminal of the NPN bipolar transistor Q1, and in addition, a sixth current (vi) branches off toward the base terminal of the NPN bipolar transistor Qrep2 of the base current replica generation circuit 30. As a result, the remaining bias current Ibias becomes the collector current flowing through the collector terminal of the NPN bipolar transistor Q1. That is, the collector current of the NPN bipolar transistor Q1 becomes the bias current Ibias itself which is a PTAT current (i.e., they have the same magnitude). 【0046】 On the other hand, focusing on the branch including the NPN bipolar transistor Q2 in the bandgap reference voltage generation circuit 10, the replica current (fifth current (v)) generated by the base current replica generation circuit 30 becomes a current gain compensation current (second current (ii)) having the same magnitude by the current mirror circuit (pMOS transistors Q21 and Q24) of the current gain compensation current generation circuit 20, and is applied to the connection point between the resistor element R2 and the NPN bipolar transistor Q2 in the bandgap reference voltage generation circuit 10, and is combined with the bias current Ibias to become a combined current (the combined current of the bias current Ibias and the second current (ii)), and flows toward the NPN bipolar transistor Q2. 【0047】 Of the combined current flowing toward the NPN bipolar transistor Q2, since the second current (ii) branches off toward the base terminal of the NPN bipolar transistor Q2, the remaining bias current Ibias becomes the collector current flowing through the collector terminal of the NPN bipolar transistor Q2. That is, the collector current of the NPN bipolar transistor Q2 becomes the bias current Ibias itself which is a PTAT current (i.e., they have the same magnitude). 【0048】Thus, in the reference voltage generation circuit 2 according to this embodiment, by providing the current gain compensation current generation circuit 20 and the base current replica generation circuit 30, the collector currents of the NPN bipolar transistors Q1 and Q2 in the bandgap reference voltage generation circuit 10 become the bias current Ibias itself, which is the PTAT current (i.e., their magnitudes become equal). The significance of this will be explained in detail below using equations. 【0049】 It is generally known that the relationship between the base-emitter voltage Vbe of an NPN bipolar transistor and the collector current can be expressed by the following equation 4. 【0050】 【0051】 Here, Ic [A] is the collector current of a typical NPN bipolar transistor, Is [A] is the reverse saturation current of a typical NPN bipolar transistor, kB [J / K] is the Boltzmann constant, and q [C] is the elementary charge. 【0052】 In the reference voltage generation circuit 2, the bias current value Ibias [A], which is the magnitude of the current flowing through the branches containing the NPN bipolar transistors Q1 and Q2 respectively, is obtained by dividing the voltage across the resistor R2 by the resistance value R2 [Ω]. At this time, considering that nodes Vinp and Vinn are adjusted to the same potential by the virtual short circuit of the error amplifier Amp, and taking into account the above equation 4, it can be expressed as shown in the following equation 5. 【0053】 【0054】Here, Vbex [V] (where x is either 1 or 2 corresponding to NPN bipolar transistors Q1 and Q2, and so on) is the voltage between the base terminal and emitter terminal of NPN bipolar transistors Q1 and Q2, and Isx [V] is the reverse saturation current of NPN bipolar transistors Q1 and Q2. The derivation of the final equation of Equation 5 takes advantage of the assumption that the reverse saturation current of an NPN bipolar transistor is directly proportional to the emitter area, and that NPN bipolar transistors Q1 and Q2 have an emitter area ratio of 1:N, that is, the ratio of their respective reverse saturation currents Is1 [A] and Is2 [A] is 1:N. Furthermore, focusing on the final equation of Equation 5, it can be seen that the parts other than the absolute temperature T [K] are constants, and the bias current value Ibias [A] in the reference voltage generation circuit 2 is, in principle, a current that does not depend on anything other than the absolute temperature T [K], i.e., the PTAT current. 【0055】 At this time, given the circuit configuration of the reference voltage generation circuit 2, the reference voltage Vref [V] output from the reference voltage generation circuit 2 is obtained by adding the voltage across both resistors R1a and R1b to the voltage Vbe1 [V] between the base terminal and emitter terminal of the NPN bipolar transistor Q1, and can be expressed as shown in Equation 6 below using the bias current value Ibias [A]. 【0056】 【0057】 However, the resistance value R1 [Ω] in Equation 6 is expressed as shown in Equation 7 below, using the resistance value R1a [Ω] of the resistor element R1a and the resistance value R1b [Ω] of the resistor element R1b. 【0058】 【0059】As described above, in the reference voltage generation circuit 2 according to this embodiment, the collector currents of the NPN bipolar transistors Q1 and Q2 become the bias current Ibias itself, which is the PTAT current (i.e., their magnitudes are equal), and therefore, the first term on the right side of equation 6 is a linear function with a negative slope, unaffected by changes in current gain due to temperature changes or aging. The second term, as described above, is a linear function with a positive slope with respect to temperature. Therefore, by providing some kind of adjustment function to either the resistance value R1 (the resistance values ​​of the resistive elements R1a and R1b (and R1c which is paired with R1b)) or the resistance value R2 for the reference voltage Vref [V] represented by equation 6, the slope values ​​of the negative slope of the first term on the right side of equation 6 and the positive slope of the second term can be made to match, and a constant voltage value can be obtained with respect to the absolute temperature T [K]. 【0060】 As described above, the reference voltage generation circuit 2 according to this embodiment comprises a bandgap reference voltage generation circuit 10 that generates a reference voltage Vref based on the difference in current density of the collector currents of the first bipolar transistor group and the second bipolar transistor group, and a current gain compensation current generation circuit 20 that generates first and second current gain compensation currents (first current (i) and second current (ii)) which are equal to the base currents of the first and second bipolar transistor groups, respectively, and the first and second current gain compensation currents (first current (i) and second current (ii)) flow only between the base terminals and emitter terminals of the first and second bipolar transistor groups, respectively. 【0061】As a result, the first and second current gain compensation currents supplied from the current gain compensation current generation circuit 20 flow through the base terminals of the first and second bipolar transistor groups, respectively. Therefore, in the bandgap reference voltage generation circuit 10, the collector currents of the first and second bipolar transistor groups become the bias current Ibias, which is the PTAT current applied to the first and second bipolar transistor groups (i.e., their magnitudes become equal). Therefore, the first term on the right-hand side of Equation 6 becomes a linear function with a negative slope, unaffected by changes in current gain due to temperature changes or aging. By providing some kind of adjustment function to either the resistance value R1 (the resistance values ​​of the resistive elements R1a and R1b (and R1c which is paired with R1b)) or the resistance value R2 for the reference voltage Vref [V] represented by Equation 6, the slope value of the negative first term on the right-hand side of Equation 6 and the positive slope of the second term, which is a linear function with a positive slope with respect to temperature, can be made to match, resulting in a constant voltage value with respect to absolute temperature T [K]. As a result, the effect of changes in current gain due to aging of the bipolar transistor group is suppressed more than in conventional designs, and a reference voltage generation circuit 2 that generates a stable reference voltage regardless of temperature is realized. In the reference voltage generation circuit 2, a stable value refers to a voltage value that is constant with respect to absolute temperature. 【0062】Furthermore, the reference voltage generation circuit 2 includes at least a fifth bipolar transistor group (NPN bipolar transistor Qrep1) composed of one or more bipolar transistors having the same structure and material as at least one of the bipolar transistors constituting the first and second bipolar transistor groups (NPN bipolar transistor Q1 in this embodiment), and includes a base current replica generation circuit 30 that generates a replica current (fifth current (v)) of the base current of at least one of the first and second bipolar transistor groups, and the current gain compensation current generation circuit 20 further generates at least one of the first and second current gain compensation currents (first current (i) and second current (ii)) based on the replica current. Thus, by utilizing the base current replica generation circuit 30, a current gain compensation current generation circuit 20 is realized that generates first and second current gain compensation currents (first current (i) and second current (ii)) that are equal in value to the base currents of the first and second bipolar transistor groups, respectively. 【0063】 Furthermore, the base current replica generation circuit 30 generates a replica current based on the voltage between the base terminal and emitter terminal of the first or second bipolar transistor group (in this embodiment, the NPN bipolar transistor Q1). This realizes a base current replica generation circuit 30 that generates a replica current (fifth current (v)) of the base current of at least one of the first and second bipolar transistor groups with a simple circuit configuration. 【0064】Furthermore, the current gain compensation current generation circuit 20 generates current gain compensation currents (fifth current (v) and sixth current (vi)) that are equal to the base current of each bipolar transistor group (NPN bipolar transistors Qrep1 and Qrep2) provided in the base current replica generation circuit 30. These current gain compensation currents (fifth current (v) and sixth current (vi)) flow only between the base terminal and emitter terminal of each bipolar transistor group (NPN bipolar transistors Qrep1 and Qrep2) provided in the base current replica generation circuit 30. This realizes a base current replica generation circuit 30 that utilizes the current gain compensation current generation circuit 20 to generate a replica current (fifth current (v)) of the base current of at least one of the first and second bipolar transistor groups. 【0065】 Figure 2 is a circuit diagram showing the configuration of a reference voltage generation circuit 4 according to a modified embodiment. In addition to the two types of arrows similar to those in Figure 1 (a thick arrow corresponding to the bias current value Ibias, and thin arrows corresponding to the magnitudes of the first current (i), second current (ii), fifth current (v), and sixth current (vi)), Figure 2 also shows even thinner arrows corresponding to the magnitudes of the current gain compensation currents (third current (iii) and fourth current (iv)) used to compensate for the base current of the bipolar transistors constituting the input stage of the error amplifier Amp. 【0066】 The reference voltage generation circuit 4 is a circuit that generates a reference voltage Vref using the bandgap voltage of a group of bipolar transistors, and has a configuration similar to the reference voltage generation circuit 2 in the embodiment, namely, a bandgap reference voltage generation circuit 12, a current gain compensation current generation circuit 22, and a base current replica generation circuit 30. In this modified example, the current gain compensation current generation circuit 22 differs from the embodiment in that, in addition to the current gain compensation current generated by the current gain compensation current generation circuit 20 in the embodiment, it also generates current gain compensation currents (third current (iii) and fourth current (iv)) to compensate for the base current of the bipolar transistors constituting the input stage of the error amplifier Amp. The differences from the embodiment will be explained below. 【0067】The bandgap reference voltage generation circuit 12 basically has the same configuration as the bandgap reference voltage generation circuit 10 according to the embodiment. However, in this modified example, the error amplifier Amp is manufactured in the same process as the NPN bipolar transistors Q1 and Q2 and has the same structure and materials. Note that the error amplifier Amp and the NPN bipolar transistors Q1 and Q2 do not necessarily have to be manufactured in the same process. If they are not manufactured in the same process, the current gain compensation current generation circuit 22 will supply a compensation current with a different current value to the input stage of the error amplifier Amp, corresponding to the input stage of the error amplifier Amp, which is different from the value in this modified example. 【0068】The error amplifier Amp consists of an input stage composed of NPN bipolar transistors Qinp and Qinn, a resistor R3, and pMOS transistors Q11 and Q12 that constitute a current mirror circuit. In this modified example, the emitter area ratio of NPN bipolar transistors Qinp and Qinn to NPN bipolar transistor Q2 is 0.5 * N:N, as shown in the figure, and resistor R3 has the same resistance value as resistor R2. Nodes Vinp and Vinn are ultimately adjusted to the same potential by a virtual short circuit of the error amplifier Amp. At this time, the sum of the voltage drop across resistor R2 and the voltage between the base terminal and emitter terminal of NPN bipolar transistor Q2 is equal to the sum of the voltage between the base terminal and emitter terminal of NPN bipolar transistor Qinp (or the voltage between the base terminal and emitter terminal of NPN bipolar transistor Qinn that is equal to that voltage) and the voltage drop across resistor R3. Considering that the resistance values ​​of resistors R2 and R3 are equal, and that the emitter area of ​​NPN bipolar transistor Q2 is equal to the combined emitter area of ​​NPN bipolar transistors Qinp and Qinn, the voltage drops across resistors R2 and R3 are the same. Furthermore, the voltage between the base terminal and emitter terminal of NPN bipolar transistor Q2 is equal to the voltage between the base terminal and emitter terminal of NPN bipolar transistor Qinp (or the voltage between the base terminal and emitter terminal of NPN bipolar transistor Qinn that is equal to that voltage). In other words, the current conducting through resistor R3 is equal to the value of the bias current Ibias, and the collector currents of NPN bipolar transistors Qinp and Qinn are half the value of the bias current Ibias. As a result, the base currents of NPN bipolar transistors Qinp and Qinn are each half the value of the base current of NPN bipolar transistor Q2. 【0069】The current gain compensation current generation circuit 22 generates current gain compensation currents (first current (i) and second current (ii)) that are equal to the base currents of the NPN bipolar transistors Q1 and Q2 of the bandgap reference voltage generation circuit 12, and also generates current gain compensation currents (third current (iii) and fourth current (iv)) to compensate for the base currents of the NPN bipolar transistors Qinp and Qinn that constitute the input stage of the error amplifier Amp. The circuit comprises a current mirror circuit (pMOS transistors Q21, Q22, Q23a, Q23b and Q24 having the gate width ratios shown) and another current mirror circuit (nMOS transistors Q25 to Q27 having the gate width ratios shown). 【0070】 The difference from the current gain compensation current generation circuit 20 according to the embodiment is that the base current replica generation circuit 30 generates current gain compensation currents (first current (i), sixth current (vi), and fourth current (iv)) that are 2.5 times the magnitude of the replica current (fifth current (v)) and apply them to the branch of the bandgap reference voltage generation circuit 12 that includes the NPN bipolar transistor Q1 (the connection point between the resistor R1b and the NPN bipolar transistor Q1). In addition, the base current replica generation circuit 30 generates a current gain compensation current (third current (iii)) that is 0.5 times the magnitude of the replica current (fifth current (v)) and applies it to the branch of the bandgap reference voltage generation circuit 12 that includes the NPN bipolar transistor Q2 (the connection point between the resistor R1c and the resistor R2). Furthermore, a current mirror circuit composed of nMOS transistors Q26 and Q27 divides the sum of the emitter current output from the NPN bipolar transistor Qinp and the emitter current output from the NPN bipolar transistor Qinn in the error amplifier Amp into a current gain compensation current (third current (iii) and fourth current (iv)) of the same magnitude as the replica current (fifth current (v)), which is then diverted to the current gain compensation current generation circuit 22 (nMOS transistor Q27). 【0071】The operation of the reference voltage generation circuit 4 according to a modified version of the embodiment configured as described above is as follows. Here, we will focus on the current gain compensation currents (third current (iii) and fourth current (iv)) that have been added to the embodiment. 【0072】 Focusing on the branch in the bandgap reference voltage generation circuit 12 that includes the NPN bipolar transistor Q1, the replica current (fifth current (v)) generated in the base current replica generation circuit 30 is converted into a current gain compensation current (first current (i), sixth current (vi), and fourth current (iv)) with 2.5 times the magnitude by the current mirror circuit (pMOS transistors Q21 and Q23a) of the current gain compensation current generation circuit 22. This current is applied to the connection point between the resistor R1b and the NPN bipolar transistor Q1 in the bandgap reference voltage generation circuit 12, and is added to the bias current Ibias to become a combined current (the sum of the bias current Ibias, the first current (i), the sixth current (vi), and the fourth current (iv)), which flows towards the NPN bipolar transistor Q1. 【0073】 The total current flowing towards the NPN bipolar transistor Q1 is divided as follows: a fourth current (iv) flows towards the base terminal of the NPN bipolar transistor Qinn of the error amplifier Amp; a first current (i) flows towards the base terminal of the NPN bipolar transistor Q1; and a sixth current (vi) flows towards the base terminal of the NPN bipolar transistor Qrep2 of the base current replica generation circuit 30. As a result, the remaining bias current Ibias becomes the collector current flowing through the collector terminal of the NPN bipolar transistor Q1. In other words, the collector current of the NPN bipolar transistor Q1 is the bias current Ibias, which is the PTAT current (i.e., their magnitudes are equal). 【0074】On the other hand, focusing on the branch in the bandgap reference voltage generation circuit 12 that includes the NPN bipolar transistor Q2, the replica current (fifth current (v)) generated in the base current replica generation circuit 30 is converted into a current gain compensation current (third current (iii)) with a magnitude of 0.5 times by the current mirror circuit (pMOS transistors Q21 and Q23b) of the current gain compensation current generation circuit 22. This current is applied to the connection point between resistor R1c and resistor R2 in the bandgap reference voltage generation circuit 12, and is added to the bias current Ibias to become a combined current (the sum of the bias current Ibias and the third current (iii)), which flows toward resistor R2. 【0075】 Of the total current flowing toward the resistor R2, a third current (iii) is diverted toward the base terminal of the NPN bipolar transistor Qinp of the error amplifier Amp, and the remaining bias current Ibias flows toward the resistor R2. The current gain compensation current (second current (ii)) applied from the current gain compensation current generation circuit 22 to the connection point between the resistor R2 and the NPN bipolar transistor Q2 is the same as in the embodiment, and is added with the bias current Ibias to become a combined current (the combined current of bias current Ibias and second current (ii)), which flows toward the NPN bipolar transistor Q2. Of this, the second current (ii) is diverted toward the base terminal of the NPN bipolar transistor Q2, so the remaining bias current Ibias becomes the collector current flowing toward the collector terminal of the NPN bipolar transistor Q2. In other words, the collector current of the NPN bipolar transistor Q2 becomes the bias current Ibias, which is the PTAT current (i.e., their magnitudes become equal). 【0076】As described above, in the reference voltage generation circuit 4 according to a modified example of this embodiment, the bandgap reference voltage generation circuit 12 includes an error amplifier Amp composed of third and fourth bipolar transistor groups (NPN bipolar transistor Qinp and NPN bipolar transistor Qinn) each having one or more bipolar transistors as differential input elements, and the current gain compensation current generation circuit 22 further generates third and fourth current gain compensation currents (third current (iii) and fourth current (iv)) which are equal to the base currents of the third and fourth bipolar transistor groups, respectively, and the third and fourth current gain compensation currents flow only between the base terminal and emitter terminal of the third and fourth bipolar transistor groups, respectively. As a result, the base current flowing between the base and emitter terminals of the NPN bipolar transistors Qinp and Qinn of the error amplifier Amp is also compensated, and the collector currents of the NPN bipolar transistors Q1 and Q2 become the bias current Ibias, which is the PTAT current (i.e., their magnitudes become equal). 【0077】 Figure 3 is a circuit diagram showing the configuration of the reference current generation circuit 6 according to the embodiment. The reference current generation circuit 6 is a circuit that generates a reference current Iptat using the bandgap voltage of a group of bipolar transistors, and includes a bipolar transistor characteristic current generation circuit 14 having a configuration similar to the bandgap reference voltage generation circuit 10 provided in the reference voltage generation circuit 2 according to the embodiment, and a current gain compensation current generation circuit 20 and a base current replica generation circuit 30, which are the same as those provided in the reference voltage generation circuit 2 according to the embodiment. The following description will focus on the differences from the reference voltage generation circuit 2 according to the embodiment. 【0078】The bipolar transistor characteristic current generation circuit 14 has a configuration that is modified from the bandgap reference voltage generation circuit 10 according to the embodiment by removing the resistive element R1a and short-circuiting it, and by adding a pMOS transistor Q4 that forms a current mirror circuit with the pMOS transistor Q3. As shown in the figure, the pMOS transistor Q4 has half the gate width ratio of the pMOS transistor Q3. Therefore, the bipolar transistor characteristic current generation circuit 14 outputs a reference current Iptat from the drain terminal of the pMOS transistor Q4 that is half the magnitude of the current (2 * Ibias) output by the pMOS transistor Q3 (i.e., Ibias). 【0079】 The connection relationship between the bipolar transistor characteristic current generation circuit 14, the current gain compensation current generation circuit 20, and the base current replica generation circuit 30 is the same as the connection relationship between the bandgap reference voltage generation circuit 10, the current gain compensation current generation circuit 20, and the base current replica generation circuit 30 according to the embodiment. 【0080】 Therefore, the collector currents of the NPN bipolar transistors Q1 and Q2 in the bipolar transistor characteristic current generation circuit 14 become the bias current Ibias, which is the PTAT current (i.e., their magnitudes become equal). As a result, the reference current generation circuit 6 according to the embodiment can generate a stable reference current regardless of temperature, by suppressing the effects of changes in current gain due to the aging of the bipolar transistor group, similar to how the reference voltage generation circuit 2 according to the embodiment suppressed the effects of changes in current gain due to the aging of the bipolar transistor group and generated a stable reference voltage regardless of temperature. 【0081】Furthermore, the characteristic features of the reference voltage generation circuit 4 according to a modified embodiment shown in Figure 2 may also be applied to the reference current generation circuit 6 according to this embodiment. In other words, in the reference current generation circuit 6 according to this embodiment, the error amplifier Amp of the bipolar transistor characteristic current generation circuit 14 may be replaced with the error amplifier Amp according to the modified embodiment shown in Figure 2, the current gain compensation current generation circuit 20 may be replaced with the current gain compensation current generation circuit 22 according to the modified embodiment shown in Figure 2, and the connection relationship between the bipolar transistor characteristic current generation circuit 14 and the current gain compensation current generation circuit 20 may be replaced with the connection relationship between the bandgap reference voltage generation circuit 12 and the current gain compensation current generation circuit 22 according to the modified embodiment shown in Figure 2. This makes it possible to compensate for the base current flowing between the base terminal and emitter terminal of the NPN bipolar transistors Qinp and Qinn of the error amplifier Amp, and to make the collector current of the NPN bipolar transistors Q1 and Q2 the bias current Ibias itself, which is the PTAT current (i.e., make their magnitudes equal). 【0082】 As described above, the reference current generation circuit 6 according to this embodiment comprises a first bipolar transistor group (NPN bipolar transistor Q1) composed of one or more bipolar transistors, and a second bipolar transistor group (NPN bipolar transistor Q2) composed of one or more bipolar transistors, and includes a bipolar transistor characteristic current generation circuit 14 that generates a reference current Iptat based on the difference in current density of the collector currents of the first bipolar transistor group and the second bipolar transistor group, and a current gain compensation current generation circuit 20 that generates first and second current gain compensation currents (for example, first current (i) and second current (ii)) that are equal to the base currents of the first bipolar transistor group and the second bipolar transistor group, respectively, and the first and second current gain compensation currents (first current (i) and second current (ii)) flow only between the base terminal and the emitter terminal of the first bipolar transistor group and the second bipolar transistor group, respectively. 【0083】As a result, the first and second current gain compensation currents supplied from the current gain compensation current generation circuit 20 flow through the base terminals of the first and second bipolar transistor groups, respectively. Therefore, in the bipolar transistor characteristic current generation circuit 14, the collector currents of the first and second bipolar transistor groups become the bias current Ibias, which is the PTAT current applied to the first and second bipolar transistor groups (i.e., their magnitudes become equal). This bias current Ibias becomes the reference current Iptat output from the drain terminal of pMOS transistor Q4 through the current mirror circuit composed of pMOS transistors Q3 and Q4. Furthermore, since this bias current Ibias is expressed by equation 5 above, the reference current Iptat also becomes a PTAT current with the same value as the final equation of equation 5. At this time, the proportionality constant of the PTAT current can be set to a desired value by providing some kind of adjustment function to the resistance value R2. As a result, the influence of changes in current gain due to the aging degradation of the bipolar transistor group is suppressed compared to conventional designs, and a reference current generation circuit 6 that generates a stable reference current regardless of temperature is realized. In the reference current generation circuit 6, a stable value refers to a current value that is proportional to the absolute temperature. 【0084】Furthermore, as in the modified example above, the bipolar transistor characteristic current generation circuit 14 further includes an error amplifier Amp composed of a third and fourth group of bipolar transistors (NPN bipolar transistor Qinp and NPN bipolar transistor Qinn) each having one or more differential input elements, and the current gain compensation current generation circuit 20 further generates third and fourth current gain compensation currents (third current (iii) and fourth current (iv)) that are equal to the base currents of the third and fourth bipolar transistor groups, respectively, and the third and fourth current gain compensation currents may flow only between the base terminal and emitter terminal of the third and fourth bipolar transistor groups, respectively. This allows the base current flowing between the base and emitter terminals of the NPN bipolar transistors Qinp and Qinn of the error amplifier Amp to be compensated, and the collector currents of the NPN bipolar transistors Q1 and Q2 to be the bias current Ibias, which is the PTAT current (i.e., their magnitudes are made equal). 【0085】 Furthermore, the reference current generation circuit 6 includes at least a fifth bipolar transistor group (NPN bipolar transistor Qrep1) consisting of one or more bipolar transistors having the same structure and material as at least one of the bipolar transistors constituting the first and second bipolar transistor groups, and includes a base current replica generation circuit 30 that generates a replica current (fifth current (v)) of the base current of at least one of the first and second bipolar transistor groups, and the current gain compensation current generation circuit 20 further generates at least one of the first and second current gain compensation currents based on the replica current. Thus, by utilizing the base current replica generation circuit 30, a current gain compensation current generation circuit 20 is realized that generates first and second current gain compensation currents (first current (i) and second current (ii)) that are equal in value to the base currents of the first and second bipolar transistor groups, respectively. 【0086】Furthermore, the base current replica generation circuit 30 generates a replica current based on the voltage between the base terminal and emitter terminal of the first or second bipolar transistor group (NPN bipolar transistor Q1). This realizes a base current replica generation circuit 30 that generates a replica current (fifth current (v)) of the base current of at least one of the first and second bipolar transistor groups with a simple circuit configuration. 【0087】 Furthermore, the current gain compensation current generation circuit 20 generates current gain compensation currents (fifth current (v) and sixth current (vi)) that are equal in value to the base current of each bipolar transistor group (NPN bipolar transistors Qrep1 and Qrep2) provided in the base current replica generation circuit 30. These current gain compensation currents (fifth current (v) and sixth current (vi)) flow only between the base terminal and emitter terminal of each bipolar transistor group (NPN bipolar transistors Qrep1 and Qrep2) provided in the base current replica generation circuit 30. This realizes a base current replica generation circuit 30 that utilizes the current gain compensation current generation circuit 20 to generate a replica current (fifth current (v)) of the base current of at least one of the first and second bipolar transistor groups. 【0088】 Next, a reference voltage generation method and a reference current generation method according to an embodiment will be described. 【0089】 Figure 4 is a flowchart showing the procedure for the reference voltage generation method (Figure 4(a)) and the procedure for the reference current generation method (Figure 4(b)) according to the embodiment. 【0090】 Figure 4(a) shows the procedure for the reference voltage generation method according to the embodiment, that is, the operation procedure of the reference voltage generation circuit 2 shown in Figure 1. 【0091】The reference voltage generation circuit 2 uses a first bipolar transistor group (NPN bipolar transistor Q1) composed of one or more bipolar transistors and a second bipolar transistor group (NPN bipolar transistor Q2) composed of one or more bipolar transistors to perform a bandgap reference voltage generation step S10 in which a reference voltage Vref is generated based on the difference in current density of the collector currents of the first bipolar transistor group and the second bipolar transistor group, and a current gain compensation current generation step S11 in which first and second current gain compensation currents (first current (i) and second current (ii)) are generated that are equal to the base currents of the first and second bipolar transistor groups, respectively, so that the first and second current gain compensation currents (first current (i) and second current (ii)) flow only between the base terminals and emitter terminals of the first and second bipolar transistor groups, respectively (S12). 【0092】 As a result, the collector currents of NPN bipolar transistors Q1 and Q2 become the bias current Ibias, which is the PTAT current (i.e., their magnitudes become equal). Therefore, the effect of changes in current gain due to the aging degradation of the bipolar transistor group is suppressed more than in the conventional method, and a reference voltage generation method that generates a stable reference voltage regardless of temperature is realized. Note that steps S10 to S12 shown in Figure 4(a) may be performed simultaneously. In the reference voltage generation circuits 2 and 4 shown in Figures 1 and 2, steps S10 to S12 are performed simultaneously. 【0093】 Figure 4(b) shows the procedure for the reference current generation method according to the embodiment, that is, the operation procedure of the reference current generation circuit 6 shown in Figure 3. 【0094】The reference current generation circuit 6 generates a reference current Iptat using the bandgap voltage of a semiconductor, and uses a first bipolar transistor group (NPN bipolar transistor Q1) composed of one or more bipolar transistors and a second bipolar transistor group (NPN bipolar transistor Q2) composed of one or more bipolar transistors to generate a reference current Iptat based on the difference in current density of the collector currents of the first bipolar transistor group and the second bipolar transistor group. By performing the transistor characteristic current generation step S20 and the current gain compensation current generation step S21, which generates first and second current gain compensation currents (first current (i) and second current (ii)) that are equal to the base currents of the first bipolar transistor group and the second bipolar transistor group, respectively, the first and second current gain compensation currents (first current (i) and second current (ii)) are made to flow only between the base terminals and emitter terminals of the first bipolar transistor group and the second bipolar transistor group, respectively (S22). 【0095】 As a result, the collector currents of NPN bipolar transistors Q1 and Q2 become the bias current Ibias, which is the PTAT current (i.e., their magnitudes become equal). Therefore, the effect of changes in current gain due to the aging degradation of the bipolar transistor group is suppressed more than in the conventional method, and a reference current generation method that generates a stable reference current regardless of temperature is realized. Note that steps S20 to S22 shown in Figure 4(b) may be performed simultaneously. In the reference current generation circuit 6 shown in Figure 3, steps S20 to S22 are performed simultaneously. 【0096】 The reference voltage generation circuit, reference current generation circuit, reference voltage generation method, and reference current generation method of this disclosure have been described above based on embodiments and modifications. However, this disclosure is not limited to these embodiments and modifications. Within the scope of this disclosure, various modifications that a person skilled in the art can conceive of, as long as they do not depart from the spirit of this disclosure, and other forms constructed by combining some of the components of the embodiments and modifications are also included. 【0097】 For example, the various MOS transistors used in the embodiments and modifications may be replaced with bipolar transistors. 【0098】 Furthermore, the reference voltage generation method shown in Figure 4(a) may be performed not only by the reference voltage generation circuit 2 according to the embodiment shown in Figure 1, but also by the reference voltage generation circuit 4 according to a modified example of the embodiment shown in Figure 2. 【0099】 Similarly, the reference current generation method shown in Figure 4(b) may be performed not only by the reference current generation circuit 6 according to the embodiment shown in Figure 3, but also by a modified reference current generation circuit obtained by applying features such as the error amplifier Amp according to a modified embodiment shown in Figure 2 to the reference current generation circuit 6 according to the embodiment shown in Figure 3. 【0100】 The reference voltage generation circuit described herein can be used as a reference voltage generation circuit with suppressed characteristic variations, for example, as a reference voltage generation circuit used in an AD converter or voltage measuring instrument that requires high precision and high stability and is built into an IC chip product for measuring physical quantities. 【0101】 2, 4 Reference voltage generation circuit 6 Reference current generation circuit 10, 12 Bandgap reference voltage generation circuit 14 Bipolar transistor characteristic current generation circuit 20, 22 Current gain compensation current generation circuit 30 Base current replica generation circuit Q1, Q2, Qrep1, Qrep2, Qinp, Qinn NPN bipolar transistor Amp Error amplifier R1a, R1b, R1c, R2, R3 Resistor element Q3, Q4, Q11, Q12, Q21, Q22, Q23, Q23a, Q23b, Q24 pMOS transistor Q25-Q27 nMOS transistor Vref Reference voltage Icomp Current gain compensation current value Vampout Bias voltage Ibias Bias current Iptat Reference current

Claims

1. A reference voltage generation circuit comprising: a first bipolar transistor group consisting of one or more bipolar transistors; a second bipolar transistor group consisting of one or more bipolar transistors; a bandgap reference voltage generation circuit that generates a reference voltage based on the difference in current density of the collector currents of the first bipolar transistor group and the second bipolar transistor group; and a current gain compensation current generation circuit that generates first and second current gain compensation currents, respectively, that are equal to the base currents of the first bipolar transistor group and the second bipolar transistor group, respectively, wherein the first and second current gain compensation currents flow only between the base terminals and emitter terminals of the first bipolar transistor group and the second bipolar transistor group, respectively.

2. The reference voltage generation circuit according to claim 1, wherein the bandgap reference voltage generation circuit comprises an error amplifier composed of a third and a fourth group of bipolar transistors, each of which has one or more bipolar transistors as differential input elements, and the current gain compensation current generation circuit further generates third and fourth current gain compensation currents, each equal to the base current of the third and the fourth group of bipolar transistors, and the third and the fourth current gain compensation currents flow only between the base terminal and the emitter terminal of the third and the fourth group of bipolar transistors, each.

3. A reference voltage generation circuit according to claim 1, comprising at least a fifth bipolar transistor group consisting of one or more bipolar transistors having the same structure and material as at least one of the bipolar transistors constituting the first and second bipolar transistor groups, a base current replica generation circuit that generates a replica current of the base current of at least one of the first and second bipolar transistor groups, and the current gain compensation current generation circuit further generates at least one of the first and second current gain compensation currents based on the replica current.

4. The reference voltage generation circuit according to claim 3, wherein the base current replica generation circuit generates the replica current based on the voltage between the base terminal and the emitter terminal of the first or second bipolar transistor group.

5. The current gain compensation current generation circuit further generates a current gain compensation current equal to the base current of each bipolar transistor group provided in the base current replica generation circuit, wherein the current gain compensation current flows only between the base terminal and the emitter terminal of each bipolar transistor group provided in the base current replica generation circuit, the reference voltage generation circuit according to claim 3 or 4.

6. A reference current generation circuit comprising a first bipolar transistor group consisting of one or more bipolar transistors and a second bipolar transistor group consisting of one or more bipolar transistors, wherein the bipolar transistor characteristic current generation circuit generates a reference current based on the difference in current density of the collector currents of the first bipolar transistor group and the second bipolar transistor group, and a current gain compensation current generation circuit generates first and second current gain compensation currents, respectively, that are equal to the base currents of the first bipolar transistor group and the second bipolar transistor group, respectively, wherein the first and second current gain compensation currents flow only between the base terminals and emitter terminals of the first bipolar transistor group and the second bipolar transistor group, respectively.

7. The reference current generation circuit according to claim 6, wherein the bipolar transistor characteristic current generation circuit further comprises an error amplifier composed of a third and a fourth group of bipolar transistors, each of which has one or more bipolar transistors as differential input elements, and the current gain compensation current generation circuit further generates third and fourth current gain compensation currents, each having the same value as the base current of the third and the fourth group of bipolar transistors, and the third and the fourth current gain compensation currents flow only between the base terminal and the emitter terminal of the third and the fourth group of bipolar transistors, each.

8. A reference current generation circuit according to claim 6, comprising at least a fifth bipolar transistor group consisting of one or more bipolar transistors having the same structure and material as at least one of the bipolar transistors constituting the first and second bipolar transistor groups, a base current replica generation circuit that generates a replica current of the base current of at least one of the first and second bipolar transistor groups, and the current gain compensation current generation circuit further generates at least one of the first and second current gain compensation currents based on the replica current.

9. The reference current generation circuit according to claim 8, wherein the base current replica generation circuit generates the replica current based on the voltage between the base terminal and the emitter terminal of the first or second bipolar transistor group.

10. The current gain compensation current generation circuit further generates a current gain compensation current equal to the base current of each bipolar transistor group provided in the base current replica generation circuit, wherein the current gain compensation current flows only between the base terminal and the emitter terminal of each bipolar transistor group provided in the base current replica generation circuit, the reference current generation circuit according to claim 8 or 9.

11. A method for generating a reference voltage using the bandgap voltage of a semiconductor, comprising: a bandgap reference voltage generation step of generating a reference voltage based on the difference in current density of the collector currents of a first bipolar transistor group and a second bipolar transistor group, using a first bipolar transistor group composed of one or more bipolar transistors and a second bipolar transistor group composed of one or more bipolar transistors; and a current gain compensation current generation step of generating first and second current gain compensation currents, respectively, that are equal to the base currents of the first bipolar transistor group and the second bipolar transistor group, respectively, wherein the first and second current gain compensation currents flow only between the base terminals and emitter terminals of the first bipolar transistor group and the second bipolar transistor group, respectively.

12. A method for generating a reference current using the bandgap voltage of a semiconductor, comprising: a bipolar transistor characteristic current generation step of generating a reference current based on the difference in current density of the collector currents of a first bipolar transistor group and a second bipolar transistor group, using a first bipolar transistor group composed of one or more bipolar transistors and a second bipolar transistor group composed of one or more bipolar transistors; and a current gain compensation current generation step of generating first and second current gain compensation currents, respectively, that are equal to the base currents of the first bipolar transistor group and the second bipolar transistor group, respectively, wherein the first and second current gain compensation currents flow only between the base terminals and emitter terminals of the first bipolar transistor group and the second bipolar transistor group, respectively.

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